[PATCH v1 10/13] phy: cadence-torrent: Add single link SGMII/QSGMII register sequences
Add support for single link SGMII/QSGMII configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 89 +++
1 file changed, 89 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index 216b25512a08..b291b63afba8 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -1824,6 +1824,13 @@ static int cdns_torrent_phy_init(struct phy *phy)
if (phy_type == TYPE_DP)
return cdns_torrent_dp_init(phy);
+ /**
+* Spread spectrum generation is not required or supported
+* for SGMII/QSGMII
+*/
+ if (phy_type == TYPE_SGMII || phy_type == TYPE_QSGMII)
+ ssc = NO_SSC;
+
/* PHY configuration specific registers for single link */
link_cmn_vals = init_data->link_cmn_vals[phy_type][TYPE_NONE][ssc];
if (link_cmn_vals) {
@@ -2543,6 +2550,28 @@ static struct cdns_torrent_vals
qsgmii_100_int_ssc_cmn_vals = {
.num_regs = ARRAY_SIZE(qsgmii_100_int_ssc_cmn_regs),
};
+/* Single SGMII/QSGMII link configuration */
+static struct cdns_reg_pairs sl_sgmii_link_cmn_regs[] = {
+ {0x, PHY_PLL_CFG},
+ {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0}
+};
+
+static struct cdns_reg_pairs sl_sgmii_xcvr_diag_ln_regs[] = {
+ {0x, XCVR_DIAG_HSCLK_SEL},
+ {0x0003, XCVR_DIAG_HSCLK_DIV},
+ {0x0013, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_torrent_vals sl_sgmii_link_cmn_vals = {
+ .reg_pairs = sl_sgmii_link_cmn_regs,
+ .num_regs = ARRAY_SIZE(sl_sgmii_link_cmn_regs),
+};
+
+static struct cdns_torrent_vals sl_sgmii_xcvr_diag_ln_vals = {
+ .reg_pairs = sl_sgmii_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(sl_sgmii_xcvr_diag_ln_regs),
+};
+
/* Multi link PCIe, 100 MHz Ref clk, internal SSC */
static struct cdns_reg_pairs pcie_100_int_ssc_cmn_regs[] = {
{0x0004, CMN_PLL0_DSM_DIAG_M0},
@@ -2701,6 +2730,9 @@ static const struct cdns_torrent_data cdns_map_torrent = {
},
},
[TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = _sgmii_link_cmn_vals,
+ },
[TYPE_PCIE] = {
[NO_SSC] = _sgmii_link_cmn_vals,
[EXTERNAL_SSC] = _sgmii_link_cmn_vals,
@@ -2708,6 +2740,9 @@ static const struct cdns_torrent_data cdns_map_torrent = {
},
},
[TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = _sgmii_link_cmn_vals,
+ },
[TYPE_PCIE] = {
[NO_SSC] = _sgmii_link_cmn_vals,
[EXTERNAL_SSC] = _sgmii_link_cmn_vals,
@@ -2734,6 +2769,9 @@ static const struct cdns_torrent_data cdns_map_torrent = {
},
},
[TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = _sgmii_xcvr_diag_ln_vals,
+ },
[TYPE_PCIE] = {
[NO_SSC] = _pcie_xcvr_diag_ln_vals,
[EXTERNAL_SSC] = _pcie_xcvr_diag_ln_vals,
@@ -2741,6 +2779,9 @@ static const struct cdns_torrent_data cdns_map_torrent = {
},
},
[TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = _sgmii_xcvr_diag_ln_vals,
+ },
[TYPE_PCIE] = {
[NO_SSC] = _pcie_xcvr_diag_ln_vals,
[EXTERNAL_SSC] = _pcie_xcvr_diag_ln_vals,
@@ -2767,6 +2808,9 @@ static const struct cdns_torrent_data cdns_map_torrent = {
},
},
[TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = _100_no_ssc_cmn_vals,
+ },
[TYPE_PCIE] = {
[NO_SSC] = _100_no_ssc_cmn_vals,
[EXTERNAL_SSC] = _100_no_ssc_cmn_vals,
@@ -2774,6 +2818,9 @@ static const struct cdns_torrent_data cdns_map_torrent = {
},
},
[TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = _100_no_ssc_cmn_vals,
+ },
[TYPE_PCIE] = {
[NO_SSC] = _100_no_ssc_cmn_vals,
[EXTERNAL_SSC] = _100_no_ssc_cmn_vals,
@@ -2800,6 +2847,9 @@ static const struct cdns_torrent_data cdns_map_torrent = {
},
},
[TYPE_SGMII] =
[PATCH v1 03/13] phy: cadence-torrent: Add PHY APB reset support
Add support for PHY APB reset and make it optional.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index 8c6e1aa93b64..7ccdb3105783 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -228,6 +228,7 @@ struct cdns_torrent_phy {
void __iomem *sd_base; /* SD0801 registers base */
u32 max_bit_rate; /* Maximum link bit rate to use (in Mbps) */
struct reset_control *phy_rst;
+ struct reset_control *apb_rst;
struct device *dev;
struct clk *clk;
unsigned long ref_clk_rate;
@@ -1884,6 +1885,13 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
return PTR_ERR(cdns_phy->phy_rst);
}
+ cdns_phy->apb_rst = devm_reset_control_get_optional(dev, "torrent_apb");
+ if (IS_ERR(cdns_phy->apb_rst)) {
+ dev_err(dev, "%s: failed to get apb reset\n",
+ dev->of_node->full_name);
+ return PTR_ERR(cdns_phy->apb_rst);
+ }
+
cdns_phy->clk = devm_clk_get(dev, "refclk");
if (IS_ERR(cdns_phy->clk)) {
dev_err(dev, "phy ref clock not found\n");
@@ -1908,6 +1916,9 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
if (ret)
return ret;
+ /* Enable APB */
+ reset_control_deassert(cdns_phy->apb_rst);
+
for_each_available_child_of_node(dev->of_node, child) {
struct phy *gphy;
@@ -2062,6 +2073,7 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
for (i = 0; i < node; i++)
reset_control_put(cdns_phy->phys[i].lnk_rst);
of_node_put(child);
+ reset_control_assert(cdns_phy->apb_rst);
return ret;
}
@@ -2071,6 +2083,7 @@ static int cdns_torrent_phy_remove(struct platform_device
*pdev)
int i;
reset_control_assert(cdns_phy->phy_rst);
+ reset_control_assert(cdns_phy->apb_rst);
for (i = 0; i < cdns_phy->nsubnodes; i++) {
reset_control_assert(cdns_phy->phys[i].lnk_rst);
reset_control_put(cdns_phy->phys[i].lnk_rst);
--
2.26.1
[PATCH v1 12/13] phy: cadence-torrent: Add PCIe + USB multilink configuration
Add PCIe + USB Unique SSC multilink configuration sequences.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 216 ++
1 file changed, 216 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index 9b4eb4647401..3eafb72014fa 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -1938,6 +1938,7 @@ int cdns_torrent_phy_configure_multilink(struct
cdns_torrent_phy *cdns_phy)
struct cdns_torrent_vals *cmn_vals, *tx_ln_vals, *rx_ln_vals;
struct cdns_torrent_vals *link_cmn_vals, *xcvr_diag_vals;
enum cdns_torrent_phy_type phy_t1, phy_t2, tmp_phy_type;
+ struct cdns_torrent_vals *pcs_cmn_vals;
int i, j, node, mlane, num_lanes, ret;
struct cdns_reg_pairs *reg_pairs;
enum cdns_torrent_ssc_mode ssc;
@@ -2011,6 +2012,17 @@ int cdns_torrent_phy_configure_multilink(struct
cdns_torrent_phy *cdns_phy)
}
}
+ /* PHY PCS common registers configurations */
+ pcs_cmn_vals = init_data->pcs_cmn_vals[phy_t1][phy_t2][ssc];
+ if (pcs_cmn_vals) {
+ reg_pairs = pcs_cmn_vals->reg_pairs;
+ num_regs = pcs_cmn_vals->num_regs;
+ regmap = cdns_phy->regmap_phy_pcs_common_cdb;
+ for (i = 0; i < num_regs; i++)
+ regmap_write(regmap, reg_pairs[i].off,
+reg_pairs[i].val);
+ }
+
/* PMA common registers configurations */
cmn_vals = init_data->cmn_vals[phy_t1][phy_t2][ssc];
if (cmn_vals) {
@@ -2334,6 +2346,100 @@ static int cdns_torrent_phy_remove(struct
platform_device *pdev)
return 0;
}
+/* PCIe and USB Unique SSC link configuration */
+static struct cdns_reg_pairs pcie_usb_link_cmn_regs[] = {
+ {0x0003, PHY_PLL_CFG},
+ {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0},
+ {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M1},
+ {0x8600, CMN_PDIAG_PLL1_CLK_SEL_M0}
+};
+
+static struct cdns_reg_pairs pcie_usb_xcvr_diag_ln_regs[] = {
+ {0x, XCVR_DIAG_HSCLK_SEL},
+ {0x0001, XCVR_DIAG_HSCLK_DIV},
+ {0x0012, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_reg_pairs usb_pcie_xcvr_diag_ln_regs[] = {
+ {0x0011, XCVR_DIAG_HSCLK_SEL},
+ {0x0001, XCVR_DIAG_HSCLK_DIV},
+ {0x00C9, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_torrent_vals pcie_usb_link_cmn_vals = {
+ .reg_pairs = pcie_usb_link_cmn_regs,
+ .num_regs = ARRAY_SIZE(pcie_usb_link_cmn_regs),
+};
+
+static struct cdns_torrent_vals pcie_usb_xcvr_diag_ln_vals = {
+ .reg_pairs = pcie_usb_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(pcie_usb_xcvr_diag_ln_regs),
+};
+
+static struct cdns_torrent_vals usb_pcie_xcvr_diag_ln_vals = {
+ .reg_pairs = usb_pcie_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(usb_pcie_xcvr_diag_ln_regs),
+};
+
+/* USB 100 MHz Ref clk, internal SSC */
+static struct cdns_reg_pairs usb_100_int_ssc_cmn_regs[] = {
+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
+ {0x0004, CMN_PLL0_DSM_DIAG_M1},
+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
+ {0x0064, CMN_PLL0_INTDIV_M0},
+ {0x0050, CMN_PLL0_INTDIV_M1},
+ {0x0064, CMN_PLL1_INTDIV_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M1},
+ {0x0002, CMN_PLL1_FRACDIVH_M0},
+ {0x0044, CMN_PLL0_HIGH_THR_M0},
+ {0x0036, CMN_PLL0_HIGH_THR_M1},
+ {0x0044, CMN_PLL1_HIGH_THR_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M1},
+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M1},
+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
+ {0x0058, CMN_PLL0_SS_CTRL3_M1},
+ {0x006E, CMN_PLL1_SS_CTRL3_M0},
+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
+ {0x0012, CMN_PLL0_SS_CTRL4_M1},
+ {0x000E, CMN_PLL1_SS_CTRL4_M0},
+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
+ {0x0003, CMN_PLL1_VCOCAL_TCTRL},
+ {0x00C7,
[PATCH v1 00/13] PHY: Add support for multilink configurations in Cadence Torrent PHY driver
Cadence Torrent PHY is a multiprotocol PHY supporting different multilink PHY configurations including DisplayPort, PCIe, USB, SGMII, QSGMII etc. This patch series extends functionality of Torrent PHY driver to support following configurations: - Single link PCIe configuration - PCIe + SGMII/QSGMII Unique SSC multilink configuration - Single link SGMII/QSGMII configuration - Single link USB configuration - PCIe + USB Unique SSC multilink configuration - USB + SGMII/QSGMII multilink configuration The changes have been validated on TI J7200 platform. This patch series is dependent on [1] and [2] and should be applied on top of these. [1] https://lkml.org/lkml/2020/7/17/158 [2] https://lkml.org/lkml/2020/8/7/338 Swapnil Jakhade (13): phy: cadence-torrent: Add single link PCIe support phy: cadence-torrent: Check cmn_ready assertion during PHY power on phy: cadence-torrent: Add PHY APB reset support dt-bindings: phy: Add PHY_TYPE_QSGMII definition phy: cadence-torrent: Add support for PHY multilink configuration phy: cadence-torrent: Update PHY reset for multilink configuration phy: cadence-torrent: Add clk changes for multilink configuration phy: cadence-torrent: Add PHY link configuration sequences for single link phy: cadence-torrent: Configure PHY_PLL_CFG as part of link_cmn_vals phy: cadence-torrent: Add single link SGMII/QSGMII register sequences phy: cadence-torrent: Add single link USB register sequences phy: cadence-torrent: Add PCIe + USB multilink configuration phy: cadence-torrent: Add USB + SGMII/QSGMII multilink configuration drivers/phy/cadence/phy-cadence-torrent.c | 1975 - include/dt-bindings/phy/phy.h |1 + 2 files changed, 1934 insertions(+), 42 deletions(-) -- 2.26.1
[PATCH v1 13/13] phy: cadence-torrent: Add USB + SGMII/QSGMII multilink configuration
Add USB + SGMII/QSGMII multilink configuration sequences.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 254 ++
1 file changed, 254 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index 3eafb72014fa..124d00e07f85 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -2346,6 +2346,40 @@ static int cdns_torrent_phy_remove(struct
platform_device *pdev)
return 0;
}
+/* USB and SGMII/QSGMII link configuration */
+static struct cdns_reg_pairs usb_sgmii_link_cmn_regs[] = {
+ {0x0002, PHY_PLL_CFG},
+ {0x8600, CMN_PDIAG_PLL0_CLK_SEL_M0},
+ {0x0601, CMN_PDIAG_PLL1_CLK_SEL_M0}
+};
+
+static struct cdns_reg_pairs usb_sgmii_xcvr_diag_ln_regs[] = {
+ {0x, XCVR_DIAG_HSCLK_SEL},
+ {0x0001, XCVR_DIAG_HSCLK_DIV},
+ {0x0041, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_reg_pairs sgmii_usb_xcvr_diag_ln_regs[] = {
+ {0x0011, XCVR_DIAG_HSCLK_SEL},
+ {0x0003, XCVR_DIAG_HSCLK_DIV},
+ {0x009B, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_torrent_vals usb_sgmii_link_cmn_vals = {
+ .reg_pairs = usb_sgmii_link_cmn_regs,
+ .num_regs = ARRAY_SIZE(usb_sgmii_link_cmn_regs),
+};
+
+static struct cdns_torrent_vals usb_sgmii_xcvr_diag_ln_vals = {
+ .reg_pairs = usb_sgmii_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(usb_sgmii_xcvr_diag_ln_regs),
+};
+
+static struct cdns_torrent_vals sgmii_usb_xcvr_diag_ln_vals = {
+ .reg_pairs = sgmii_usb_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(sgmii_usb_xcvr_diag_ln_regs),
+};
+
/* PCIe and USB Unique SSC link configuration */
static struct cdns_reg_pairs pcie_usb_link_cmn_regs[] = {
{0x0003, PHY_PLL_CFG},
@@ -3019,6 +3053,11 @@ static const struct cdns_torrent_data cdns_map_torrent =
{
[EXTERNAL_SSC] = _sgmii_link_cmn_vals,
[INTERNAL_SSC] = _sgmii_link_cmn_vals,
},
+ [TYPE_USB] = {
+ [NO_SSC] = _sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = _sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = _sgmii_link_cmn_vals,
+ },
},
[TYPE_QSGMII] = {
[TYPE_NONE] = {
@@ -3029,6 +3068,11 @@ static const struct cdns_torrent_data cdns_map_torrent =
{
[EXTERNAL_SSC] = _sgmii_link_cmn_vals,
[INTERNAL_SSC] = _sgmii_link_cmn_vals,
},
+ [TYPE_USB] = {
+ [NO_SSC] = _sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = _sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = _sgmii_link_cmn_vals,
+ },
},
[TYPE_USB] = {
[TYPE_NONE] = {
@@ -3041,6 +3085,16 @@ static const struct cdns_torrent_data cdns_map_torrent =
{
[EXTERNAL_SSC] = _usb_link_cmn_vals,
[INTERNAL_SSC] = _usb_link_cmn_vals,
},
+ [TYPE_SGMII] = {
+ [NO_SSC] = _sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = _sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = _sgmii_link_cmn_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = _sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = _sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = _sgmii_link_cmn_vals,
+ },
},
},
.xcvr_diag_vals = {
@@ -3075,6 +3129,11 @@ static const struct cdns_torrent_data cdns_map_torrent =
{
[EXTERNAL_SSC] = _pcie_xcvr_diag_ln_vals,
[INTERNAL_SSC] = _pcie_xcvr_diag_ln_vals,
},
+ [TYPE_USB] = {
+ [NO_SSC] = _usb_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = _usb_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = _usb_xcvr_diag_ln_vals,
+ },
},
[TYPE_QSGMII] = {
[TYPE_NONE] = {
@@ -3085,6 +3144,11 @@ static const struct cdns_torrent_data cdns_map_torrent =
{
[EXTERNAL_SSC] = _pcie_xcvr_diag_ln_vals,
[INTERNAL_SSC] = _pcie_xcvr_diag_ln_vals,
},
+ [TYPE_USB] = {
+ [NO_SSC] = _usb_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = _usb_xcvr_diag_ln_vals,
+
[PATCH v1 06/13] phy: cadence-torrent: Update PHY reset for multilink configuration
For multilink configuration, deassert PHY and link reset after PHY
registers are configured in probe and only check link status in
power_on callback.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 28 +--
1 file changed, 21 insertions(+), 7 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index c55f8bde52f1..fc5720845ec7 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -1603,13 +1603,15 @@ static int cdns_torrent_phy_on(struct phy *phy)
u32 read_val;
int ret;
- /* Take the PHY out of reset */
- ret = reset_control_deassert(cdns_phy->phy_rst);
- if (ret)
- return ret;
+ if (cdns_phy->nsubnodes == 1) {
+ /* Take the PHY lane group out of reset */
+ reset_control_deassert(inst->lnk_rst);
- /* Take the PHY lane group out of reset */
- reset_control_deassert(inst->lnk_rst);
+ /* Take the PHY out of reset */
+ ret = reset_control_deassert(cdns_phy->phy_rst);
+ if (ret)
+ return ret;
+ }
/*
* Wait for cmn_ready assertion
@@ -1623,6 +1625,8 @@ static int cdns_torrent_phy_on(struct phy *phy)
return ret;
}
+ mdelay(10);
+
return 0;
}
@@ -1632,6 +1636,9 @@ static int cdns_torrent_phy_off(struct phy *phy)
struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
int ret;
+ if (cdns_phy->nsubnodes != 1)
+ return 0;
+
ret = reset_control_assert(cdns_phy->phy_rst);
if (ret)
return ret;
@@ -1886,7 +1893,7 @@ int cdns_torrent_phy_configure_multilink(struct
cdns_torrent_phy *cdns_phy)
struct cdns_torrent_vals *cmn_vals, *tx_ln_vals, *rx_ln_vals;
struct cdns_torrent_vals *link_cmn_vals, *xcvr_diag_vals;
enum cdns_torrent_phy_type phy_t1, phy_t2, tmp_phy_type;
- int i, j, node, mlane, num_lanes;
+ int i, j, node, mlane, num_lanes, ret;
struct cdns_reg_pairs *reg_pairs;
enum cdns_torrent_ssc_mode ssc;
struct regmap *regmap;
@@ -1989,8 +1996,15 @@ int cdns_torrent_phy_configure_multilink(struct
cdns_torrent_phy *cdns_phy)
reg_pairs[j].val);
}
}
+
+ reset_control_deassert(cdns_phy->phys[node].lnk_rst);
}
+ /* Take the PHY out of reset */
+ ret = reset_control_deassert(cdns_phy->phy_rst);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.26.1
[PATCH v1 11/13] phy: cadence-torrent: Add single link USB register sequences
Add support for single link USB configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 260 +-
1 file changed, 259 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index b291b63afba8..9b4eb4647401 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -29,7 +29,7 @@
#define DEFAULT_MAX_BIT_RATE 8100 /* in Mbps */
#define NUM_SSC_MODE 3
-#define NUM_PHY_TYPE 5
+#define NUM_PHY_TYPE 6
#define POLL_TIMEOUT_US5000
#define PLL_LOCK_TIMEOUT 10
@@ -82,6 +82,8 @@
#define CMN_PLLSM0_PLLLOCK_TMR 0x002CU
#define CMN_PLLSM1_PLLPRE_TMR 0x0032U
#define CMN_PLLSM1_PLLLOCK_TMR 0x0034U
+#define CMN_CDIAG_CDB_PWRI_OVRD0x0041U
+#define CMN_CDIAG_XCVRC_PWRI_OVRD 0x0047U
#define CMN_BGCAL_INIT_TMR 0x0064U
#define CMN_BGCAL_ITER_TMR 0x0065U
#define CMN_IBCAL_INIT_TMR 0x0074U
@@ -159,13 +161,16 @@
/* PMA TX Lane registers */
#define TX_TXCC_CTRL 0x0040U
#define TX_TXCC_CPOST_MULT_00 0x004CU
+#define TX_TXCC_CPOST_MULT_01 0x004DU
#define TX_TXCC_MGNFS_MULT_000 0x0050U
#define DRV_DIAG_TX_DRV0x00C6U
#define XCVR_DIAG_PLLDRC_CTRL 0x00E5U
#define XCVR_DIAG_HSCLK_SEL0x00E6U
#define XCVR_DIAG_HSCLK_DIV0x00E7U
#define XCVR_DIAG_BIDI_CTRL0x00EAU
+#define XCVR_DIAG_PSC_OVRD 0x00EBU
#define TX_PSC_A0 0x0100U
+#define TX_PSC_A1 0x0101U
#define TX_PSC_A2 0x0102U
#define TX_PSC_A3 0x0103U
#define TX_RCVDET_ST_TMR 0x0123U
@@ -174,27 +179,37 @@
/* PMA RX Lane registers */
#define RX_PSC_A0 0xU
+#define RX_PSC_A1 0x0001U
#define RX_PSC_A2 0x0002U
#define RX_PSC_A3 0x0003U
#define RX_PSC_CAL 0x0006U
#define RX_CDRLF_CNFG 0x0080U
+#define RX_CDRLF_CNFG3 0x0082U
+#define RX_SIGDET_HL_FILT_TMR 0x0090U
#define RX_REE_GCSM1_CTRL 0x0108U
#define RX_REE_GCSM1_EQENM_PH1 0x0109U
#define RX_REE_GCSM1_EQENM_PH2 0x010AU
#define RX_REE_GCSM2_CTRL 0x0110U
#define RX_REE_PERGCSM_CTRL0x0118U
+#define RX_REE_ATTEN_THR 0x0149U
#define RX_REE_TAP1_CLIP 0x0171U
#define RX_REE_TAP2TON_CLIP0x0172U
+#define RX_REE_SMGM_CTRL1 0x0177U
+#define RX_REE_SMGM_CTRL2 0x0178U
#define RX_DIAG_DFE_CTRL 0x01E0U
#define RX_DIAG_DFE_AMP_TUNE_2 0x01E2U
#define RX_DIAG_DFE_AMP_TUNE_3 0x01E3U
#define RX_DIAG_NQST_CTRL 0x01E5U
+#define RX_DIAG_SIGDET_TUNE0x01E8U
#define RX_DIAG_PI_RATE0x01F4U
#define RX_DIAG_PI_CAP 0x01F5U
#define RX_DIAG_ACYA 0x01FFU
/* PHY PCS common registers */
#define PHY_PLL_CFG0x000EU
+#define PHY_PIPE_USB3_GEN2_PRE_CFG00x0020U
+#define PHY_PIPE_USB3_GEN2_POST_CFG0 0x0022U
+#define PHY_PIPE_USB3_GEN2_POST_CFG1 0x0023U
/* PHY PMA common registers */
#define PHY_PMA_CMN_CTRL1 0xU
@@ -222,6 +237,7 @@ enum cdns_torrent_phy_type {
TYPE_PCIE,
TYPE_SGMII,
TYPE_QSGMII,
+ TYPE_USB,
};
enum cdns_torrent_ssc_mode {
@@ -327,6 +343,8 @@ struct cdns_torrent_data {
[NUM_SSC_MODE];
struct cdns_torrent_vals *xcvr_diag_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
[NUM_SSC_MODE];
+ struct cdns_torrent_vals *pcs_cmn_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
+ [NUM_SSC_MODE];
struct cdns_torrent_vals *cmn_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
[NUM_SSC_MODE];
struct cdns_torrent_vals *tx_ln_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
@@ -1813,6 +1831,7 @@ static int cdns_torrent_phy_init(struct phy *phy)
struct cdns_torrent_inst *inst = phy_get_drvdata(phy);
enum cdns_torrent_phy_type phy_type = inst->phy_type;
enum cdns_torrent_ssc_mode ssc = inst->ssc_mode;
+ struct cdns_torrent_vals *pcs_cmn_vals;
struct cdns_reg_pairs *reg_pairs;
struct regmap *regmap;
u32 num_regs;
@@ -1861,6 +1880,17 @@ static int cdns_torrent_phy_init(struct phy *phy)
}
}
+ /* PHY PCS common registers configurations */
+ pcs_cmn_vals = init_data->pcs_cmn_vals[phy_type][TYPE_NONE][ssc];
+ if (pcs_cmn_vals) {
+ reg_pairs = pcs_cmn_vals->reg_pairs;
+ num_regs =
[PATCH v1 02/13] phy: cadence-torrent: Check cmn_ready assertion during PHY power on
Check if cmn_ready is set after both PLL0 and PLL1 are locked.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index a703fcb355a8..8c6e1aa93b64 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -32,6 +32,7 @@
#define NUM_PHY_TYPE 2
#define POLL_TIMEOUT_US5000
+#define PLL_LOCK_TIMEOUT 10
#define TORRENT_COMMON_CDB_OFFSET 0x0
@@ -183,12 +184,16 @@
#define PHY_PLL_CFG0x000EU
/* PHY PMA common registers */
+#define PHY_PMA_CMN_CTRL1 0xU
#define PHY_PMA_CMN_CTRL2 0x0001U
#define PHY_PMA_PLL_RAW_CTRL 0x0003U
static const struct reg_field phy_pll_cfg =
REG_FIELD(PHY_PLL_CFG, 0, 1);
+static const struct reg_field phy_pma_cmn_ctrl_1 =
+ REG_FIELD(PHY_PMA_CMN_CTRL1, 0, 0);
+
static const struct reg_field phy_pma_cmn_ctrl_2 =
REG_FIELD(PHY_PMA_CMN_CTRL2, 0, 7);
@@ -237,6 +242,7 @@ struct cdns_torrent_phy {
struct regmap *regmap_rx_lane_cdb[MAX_NUM_LANES];
struct regmap *regmap_dptx_phy_reg;
struct regmap_field *phy_pll_cfg;
+ struct regmap_field *phy_pma_cmn_ctrl_1;
struct regmap_field *phy_pma_cmn_ctrl_2;
struct regmap_field *phy_pma_pll_raw_ctrl;
struct regmap_field *phy_reset_ctrl;
@@ -1570,6 +1576,7 @@ static int cdns_torrent_phy_on(struct phy *phy)
{
struct cdns_torrent_inst *inst = phy_get_drvdata(phy);
struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
+ u32 read_val;
int ret;
/* Take the PHY out of reset */
@@ -1578,7 +1585,21 @@ static int cdns_torrent_phy_on(struct phy *phy)
return ret;
/* Take the PHY lane group out of reset */
- return reset_control_deassert(inst->lnk_rst);
+ reset_control_deassert(inst->lnk_rst);
+
+ /*
+* Wait for cmn_ready assertion
+* PHY_PMA_CMN_CTRL1[0] == 1
+*/
+ ret = regmap_field_read_poll_timeout(cdns_phy->phy_pma_cmn_ctrl_1,
+read_val, read_val, 1000,
+PLL_LOCK_TIMEOUT);
+ if (ret) {
+ dev_err(cdns_phy->dev, "Timeout waiting for CMN ready\n");
+ return ret;
+ }
+
+ return 0;
}
static int cdns_torrent_phy_off(struct phy *phy)
@@ -1643,6 +1664,14 @@ static int cdns_torrent_regfield_init(struct
cdns_torrent_phy *cdns_phy)
}
cdns_phy->phy_pll_cfg = field;
+ regmap = cdns_phy->regmap_phy_pma_common_cdb;
+ field = devm_regmap_field_alloc(dev, regmap, phy_pma_cmn_ctrl_1);
+ if (IS_ERR(field)) {
+ dev_err(dev, "PHY_PMA_CMN_CTRL1 reg field init failed\n");
+ return PTR_ERR(field);
+ }
+ cdns_phy->phy_pma_cmn_ctrl_1 = field;
+
regmap = cdns_phy->regmap_phy_pma_common_cdb;
field = devm_regmap_field_alloc(dev, regmap, phy_pma_cmn_ctrl_2);
if (IS_ERR(field)) {
--
2.26.1
[PATCH v1 08/13] phy: cadence-torrent: Add PHY link configuration sequences for single link
Add support to configure link_cmn_vals and xcvr_diag_vals in case of single
link PHY configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 44 +++
1 file changed, 44 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index 691d4aa5b2ed..d01a44b93e99 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -1809,6 +1809,7 @@ static int cdns_torrent_phy_init(struct phy *phy)
struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
const struct cdns_torrent_data *init_data = cdns_phy->init_data;
struct cdns_torrent_vals *cmn_vals, *tx_ln_vals, *rx_ln_vals;
+ struct cdns_torrent_vals *link_cmn_vals, *xcvr_diag_vals;
struct cdns_torrent_inst *inst = phy_get_drvdata(phy);
enum cdns_torrent_phy_type phy_type = inst->phy_type;
enum cdns_torrent_ssc_mode ssc = inst->ssc_mode;
@@ -1823,6 +1824,29 @@ static int cdns_torrent_phy_init(struct phy *phy)
if (phy_type == TYPE_DP)
return cdns_torrent_dp_init(phy);
+ /* PHY configuration specific registers for single link */
+ link_cmn_vals = init_data->link_cmn_vals[phy_type][TYPE_NONE][ssc];
+ if (link_cmn_vals) {
+ reg_pairs = link_cmn_vals->reg_pairs;
+ num_regs = link_cmn_vals->num_regs;
+ regmap = cdns_phy->regmap_common_cdb;
+ for (i = 0; i < num_regs; i++)
+ regmap_write(regmap, reg_pairs[i].off,
+reg_pairs[i].val);
+ }
+
+ xcvr_diag_vals = init_data->xcvr_diag_vals[phy_type][TYPE_NONE][ssc];
+ if (xcvr_diag_vals) {
+ reg_pairs = xcvr_diag_vals->reg_pairs;
+ num_regs = xcvr_diag_vals->num_regs;
+ for (i = 0; i < inst->num_lanes; i++) {
+ regmap = cdns_phy->regmap_tx_lane_cdb[i + inst->mlane];
+ for (j = 0; j < num_regs; j++)
+ regmap_write(regmap, reg_pairs[j].off,
+reg_pairs[j].val);
+ }
+ }
+
/* PMA common registers configurations */
cmn_vals = init_data->cmn_vals[phy_type][TYPE_NONE][ssc];
if (cmn_vals) {
@@ -2646,6 +2670,11 @@ static const struct cdns_torrent_data cdns_map_torrent =
{
.reg_offset_shift = 0x2,
.link_cmn_vals = {
[TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
[TYPE_SGMII] = {
[NO_SSC] = _sgmii_link_cmn_vals,
[EXTERNAL_SSC] = _sgmii_link_cmn_vals,
@@ -2674,6 +2703,11 @@ static const struct cdns_torrent_data cdns_map_torrent =
{
},
.xcvr_diag_vals = {
[TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
[TYPE_SGMII] = {
[NO_SSC] = _sgmii_xcvr_diag_ln_vals,
[EXTERNAL_SSC] = _sgmii_xcvr_diag_ln_vals,
@@ -2806,6 +2840,11 @@ static const struct cdns_torrent_data
ti_j721e_map_torrent = {
.reg_offset_shift = 0x1,
.link_cmn_vals = {
[TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
[TYPE_SGMII] = {
[NO_SSC] = _sgmii_link_cmn_vals,
[EXTERNAL_SSC] = _sgmii_link_cmn_vals,
@@ -2834,6 +2873,11 @@ static const struct cdns_torrent_data
ti_j721e_map_torrent = {
},
.xcvr_diag_vals = {
[TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
[TYPE_SGMII] = {
[NO_SSC] = _sgmii_xcvr_diag_ln_vals,
[EXTERNAL_SSC] = _sgmii_xcvr_diag_ln_vals,
--
2.26.1
[PATCH v1 04/13] dt-bindings: phy: Add PHY_TYPE_QSGMII definition
Add definition for QSGMII phy type. Signed-off-by: Swapnil Jakhade --- include/dt-bindings/phy/phy.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h index 36e8c241cf48..887a31b250a8 100644 --- a/include/dt-bindings/phy/phy.h +++ b/include/dt-bindings/phy/phy.h @@ -19,5 +19,6 @@ #define PHY_TYPE_DP6 #define PHY_TYPE_XPCS 7 #define PHY_TYPE_SGMII 8 +#define PHY_TYPE_QSGMII9 #endif /* _DT_BINDINGS_PHY */ -- 2.26.1
[PATCH v1 01/13] phy: cadence-torrent: Add single link PCIe support
Add single link PCIe register sequences in Torrent PHY driver.
Also, add support for getting SSC type from DT.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 296 +++---
1 file changed, 266 insertions(+), 30 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index 82f48ca5dcc6..a703fcb355a8 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -28,6 +28,9 @@
#define MAX_NUM_LANES 4
#define DEFAULT_MAX_BIT_RATE 8100 /* in Mbps */
+#define NUM_SSC_MODE 3
+#define NUM_PHY_TYPE 2
+
#define POLL_TIMEOUT_US5000
#define TORRENT_COMMON_CDB_OFFSET 0x0
@@ -98,6 +101,14 @@
#define CMN_PLL0_LOCK_REFCNT_START 0x009CU
#define CMN_PLL0_LOCK_PLLCNT_START 0x009EU
#define CMN_PLL0_LOCK_PLLCNT_THR0x009FU
+#define CMN_PLL0_INTDIV_M1 0x00A0U
+#define CMN_PLL0_FRACDIVH_M1 0x00A2U
+#define CMN_PLL0_HIGH_THR_M1 0x00A3U
+#define CMN_PLL0_DSM_DIAG_M1 0x00A4U
+#define CMN_PLL0_SS_CTRL1_M1 0x00A8U
+#define CMN_PLL0_SS_CTRL2_M1 0x00A9U
+#define CMN_PLL0_SS_CTRL3_M1 0x00AAU
+#define CMN_PLL0_SS_CTRL4_M1 0x00ABU
#define CMN_PLL1_VCOCAL_TCTRL 0x00C2U
#define CMN_PLL1_VCOCAL_INIT_TMR 0x00C4U
#define CMN_PLL1_VCOCAL_ITER_TMR 0x00C5U
@@ -130,8 +141,10 @@
#define CMN_PDIAG_PLL0_CP_PADJ_M0 0x01A4U
#define CMN_PDIAG_PLL0_CP_IADJ_M0 0x01A5U
#define CMN_PDIAG_PLL0_FILT_PADJ_M00x01A6U
+#define CMN_PDIAG_PLL0_CTRL_M1 0x01B0U
#define CMN_PDIAG_PLL0_CP_PADJ_M1 0x01B4U
#define CMN_PDIAG_PLL0_CP_IADJ_M1 0x01B5U
+#define CMN_PDIAG_PLL0_FILT_PADJ_M10x01B6U
#define CMN_PDIAG_PLL1_CTRL_M0 0x01C0U
#define CMN_PDIAG_PLL1_CLK_SEL_M0 0x01C1U
#define CMN_PDIAG_PLL1_CP_PADJ_M0 0x01C4U
@@ -162,6 +175,9 @@
#define RX_REE_GCSM1_CTRL 0x0108U
#define RX_REE_GCSM2_CTRL 0x0110U
#define RX_REE_PERGCSM_CTRL0x0118U
+#define RX_REE_TAP1_CLIP 0x0171U
+#define RX_REE_TAP2TON_CLIP0x0172U
+#define RX_DIAG_ACYA 0x01FFU
/* PHY PCS common registers */
#define PHY_PLL_CFG0x000EU
@@ -182,12 +198,24 @@ static const struct reg_field phy_pma_pll_raw_ctrl =
static const struct reg_field phy_reset_ctrl =
REG_FIELD(PHY_RESET, 8, 8);
+enum cdns_torrent_phy_type {
+ TYPE_DP,
+ TYPE_PCIE
+};
+
+enum cdns_torrent_ssc_mode {
+ NO_SSC,
+ EXTERNAL_SSC,
+ INTERNAL_SSC
+};
+
struct cdns_torrent_inst {
struct phy *phy;
u32 mlane;
- u32 phy_type;
+ enum cdns_torrent_phy_type phy_type;
u32 num_lanes;
struct reset_control *lnk_rst;
+ enum cdns_torrent_ssc_mode ssc_mode;
};
struct cdns_torrent_phy {
@@ -221,8 +249,9 @@ enum phy_powerstate {
POWERSTATE_A3 = 3,
};
+static int cdns_torrent_phy_init(struct phy *phy);
+static int cdns_torrent_phy_exit(struct phy *phy);
static int cdns_torrent_dp_init(struct phy *phy);
-static int cdns_torrent_dp_exit(struct phy *phy);
static int cdns_torrent_dp_run(struct cdns_torrent_phy *cdns_phy,
u32 num_lanes);
static
@@ -252,17 +281,30 @@ static int cdns_torrent_phy_on(struct phy *phy);
static int cdns_torrent_phy_off(struct phy *phy);
static const struct phy_ops cdns_torrent_phy_ops = {
- .init = cdns_torrent_dp_init,
- .exit = cdns_torrent_dp_exit,
+ .init = cdns_torrent_phy_init,
+ .exit = cdns_torrent_phy_exit,
.configure = cdns_torrent_dp_configure,
.power_on = cdns_torrent_phy_on,
.power_off = cdns_torrent_phy_off,
.owner = THIS_MODULE,
};
+struct cdns_reg_pairs {
+ u32 val;
+ u32 off;
+};
+
+struct cdns_torrent_vals {
+ struct cdns_reg_pairs *reg_pairs;
+ u32 num_regs;
+};
+
struct cdns_torrent_data {
- u8 block_offset_shift;
- u8 reg_offset_shift;
+ u8 block_offset_shift;
+ u8 reg_offset_shift;
+ struct cdns_torrent_vals *cmn_vals[NUM_PHY_TYPE][NUM_SSC_MODE];
+ struct cdns_torrent_vals *tx_ln_vals[NUM_PHY_TYPE][NUM_SSC_MODE];
+ struct cdns_torrent_vals *rx_ln_vals[NUM_PHY_TYPE][NUM_SSC_MODE];
};
struct cdns_regmap_cdb_context {
@@ -846,19 +888,6 @@ static int cdns_torrent_dp_init(struct phy *phy)
struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
- ret = clk_prepare_enable(cdns_phy->clk);
- if (ret) {
- dev_err(cdns_phy->dev, "Failed to prepare ref clock\n");
- return ret;
- }
-
- cdns_phy->ref_clk_rate =
Re: [PATCH] x86/paravirt: Add missing noinstr to arch_local*() helpers
On Fri, Aug 07, 2020 at 12:35PM +0200, Jürgen Groß wrote: > On 07.08.20 11:50, Marco Elver wrote: > > On Fri, Aug 07, 2020 at 11:24AM +0200, Jürgen Groß wrote: > > > On 07.08.20 11:01, Marco Elver wrote: > > > > On Thu, 6 Aug 2020 at 18:06, Marco Elver wrote: > > > > > On Thu, 6 Aug 2020 at 15:17, Marco Elver wrote: > > > > > > On Thu, Aug 06, 2020 at 01:32PM +0200, pet...@infradead.org wrote: > > > > > > > On Thu, Aug 06, 2020 at 09:47:23AM +0200, Marco Elver wrote: > > > > > > > > Testing my hypothesis that raw then nested non-raw > > > > > > > > local_irq_save/restore() breaks IRQ state tracking -- see the > > > > > > > > reproducer > > > > > > > > below. This is at least 1 case I can think of that we're bound > > > > > > > > to hit. > > > > > > ... > > > > > > > > > > > > > > /me goes ponder things... > > > > > > > > > > > > > > How's something like this then? > > > > > > > > > > > > > > --- > > > > > > >include/linux/sched.h | 3 --- > > > > > > >kernel/kcsan/core.c | 62 > > > > > > > --- > > > > > > >2 files changed, 44 insertions(+), 21 deletions(-) > > > > > > > > > > > > Thank you! That approach seems to pass syzbot (also with > > > > > > CONFIG_PARAVIRT) and kcsan-test tests. > > > > > > > > > > > > I had to modify it some, so that report.c's use of the restore logic > > > > > > works and not mess up the IRQ trace printed on KCSAN reports (with > > > > > > CONFIG_KCSAN_VERBOSE). > > > > > > > > > > > > I still need to fully convince myself all is well now and we don't > > > > > > end > > > > > > up with more fixes. :-) If it passes further testing, I'll send it > > > > > > as a > > > > > > real patch (I want to add you as Co-developed-by, but would need > > > > > > your > > > > > > Signed-off-by for the code you pasted, I think.) > > > > > > > > I let it run on syzbot through the night, and it's fine without > > > > PARAVIRT (see below). I have sent the patch (need your Signed-off-by > > > > as it's based on your code, thank you!): > > > > https://lkml.kernel.org/r/20200807090031.3506555-1-el...@google.com > > > > > > > > > With CONFIG_PARAVIRT=y (without the notrace->noinstr patch), I still > > > > > get lockdep DEBUG_LOCKS_WARN_ON(!lockdep_hardirqs_enabled()), although > > > > > it takes longer for syzbot to hit them. But I think that's expected > > > > > because we can still get the recursion that I pointed out, and will > > > > > need that patch. > > > > > > > > Never mind, I get these warnings even if I don't turn on KCSAN > > > > (CONFIG_KCSAN=n). Something else is going on with PARAVIRT=y that > > > > throws off IRQ state tracking. :-/ > > > > > > What are the settings of CONFIG_PARAVIRT_XXL and > > > CONFIG_PARAVIRT_SPINLOCKS in this case? > > > > I attached a config. > > > > $> grep PARAVIRT .config > > CONFIG_PARAVIRT=y > > CONFIG_PARAVIRT_XXL=y > > # CONFIG_PARAVIRT_DEBUG is not set > > CONFIG_PARAVIRT_SPINLOCKS=y > > # CONFIG_PARAVIRT_TIME_ACCOUNTING is not set > > CONFIG_PARAVIRT_CLOCK=y > > Anything special I need to do to reproduce the problem? Or would you be > willing to do some more rounds with different config settings? I can only test it with syzkaller, but that probably doesn't help if you don't already have it set up. It can't seem to find a C reproducer. I did some more rounds with different configs. > I think CONFIG_PARAVIRT_XXL shouldn't matter, but I'm not completely > sure about that. CONFIG_PARAVIRT_SPINLOCKS would be my primary suspect. Yes, PARAVIRT_XXL doesn't make a different. When disabling PARAVIRT_SPINLOCKS, however, the warnings go away. Thanks, -- Marco
Re: [PATCH 20/20] arm64: dts: renesas: r8a774e1: Add VIN and CSI-2 nodes
Hi Niklas,
On Fri, Aug 7, 2020 at 1:27 PM Niklas Söderlund
wrote:
> On 2020-08-06 13:47:58 +0200, Geert Uytterhoeven wrote:
> > On Thu, Aug 6, 2020 at 1:17 PM Lad, Prabhakar
> > wrote:
> > > On Wed, Aug 5, 2020 at 12:19 PM Geert Uytterhoeven
> > > wrote:
> > > > On Thu, Jul 16, 2020 at 7:20 PM Lad Prabhakar
> > > > wrote:
> > > > > Add VIN and CSI-2 nodes to RZ/G2H (R8A774E1) SoC dtsi.
> > > > >
> > > > > Signed-off-by: Lad Prabhakar
> > > > > Reviewed-by: Marian-Cristian Rotariu
> > > > >
> > > >
> > > > Reviewed-by: Geert Uytterhoeven
> > > >
> > > > However, before I queue this in renesas-devel for v5.10, I'd like to
> > > > have some clarification about the issue below.
> > > >
> > > > > --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> > > > > +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> > > >
> > > > > + vin4: video@e6ef4000 {
> > > > > + compatible = "renesas,vin-r8a774e1";
> > > > > + reg = <0 0xe6ef4000 0 0x1000>;
> > > > > + interrupts = > > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > > + clocks = < CPG_MOD 807>;
> > > > > + power-domains = < R8A774E1_PD_ALWAYS_ON>;
> > > > > + resets = < 807>;
> > > > > + renesas,id = <4>;
> > > > > + status = "disabled";
> > > > > +
> > > > > + ports {
> > > > > + #address-cells = <1>;
> > > > > + #size-cells = <0>;
> > > > > +
> > > > > + port@1 {
> > > > > + #address-cells = <1>;
> > > > > + #size-cells = <0>;
> > > >
> > > > "make dtbs W=1" says:
> > > >
> > > > arch/arm64/boot/dts/renesas/r8a774e1.dtsi:1562.12-1572.7: Warning
> > > > (graph_child_address): /soc/video@e6ef4000/ports/port@1: graph node
> > > > has single child node 'endpoint@0', #address-cells/#size-cells are not
> > > > necessary
> > > >
> > > > (same for vin5-7 below)
> > > >
> > > Referring to commit 5e53dbf4edb4d ("arm64: dts: renesas: r8a77990: Fix
> > > VIN endpoint numbering") we definitely need endpoint numbering.
> > > Probably the driver needs to be fixed to handle such cases.
> >
> > > > > +
> > > > > + reg = <1>;
> > > > > +
> > > > > + vin4csi20: endpoint@0 {
> > > > > + reg = <0>;
> > > > > + remote-endpoint =
> > > > > <>;
> >
> > On R-Car E3, the single endpoint is at address 2, so "make dtbs W=1"doesn't
> > complain. Here it is at address 0.
> >
> > Niklas?
>
> First the R-Car VIN driver makes decisions based on which endpoint is
> described, each endpoint 0-3 represents a different CSI-2 block on the
> other end (0: CSI20, 1: CSI21, 2: CSI40 and 3: CSI41).
That's my understanding, too.
> Then how to handle the warning I'm not sure. I can only really see 2
> options.
>
> 1. Ignore the warning.
> 2. Remove #address-cells, #size-cells and reg properties from port@ if
>the only endpoint described is endpoint@0.
>
> I would prefers option 2. that is what we do in other cases (for example
> on Gen2 boards that only have a single parallel sensor in some early DTS
> files we don't have the ports node and just describe a single port with
> the same reasoning.
>
> We are not at risk at someone describing a second CSI-2 bock as an
> overlay so I see no real harm in option 2.
Yeah, no overlay possible for on-SoC wiring ;-)
> What are your thoughts Geert?
> You know more about DT then me.
You have too much faith in me ;-)
AFAIK we don't get this warning for e.g. SPI buses, which can have a
single device at address 0, and #{address,size}-cells is mandatory
there. So endpoints (or SPI?) are treated special?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v2 18/41] ARM: s5pv210: don't imply CONFIG_PLAT_SAMSUNG
On Thu, Aug 06, 2020 at 08:20:35PM +0200, Krzysztof Kozlowski wrote: > From: Arnd Bergmann > > The plat-samsung directory and mach-s5pv210 can be build > completely independently, so split the two Kconfig symbols > CONFIG_PLAT_SAMSUNG and CONFIG_ARCH_S5PV210. Acked-by: Mark Brown signature.asc Description: PGP signature
Re: [PATCH v2 20/41] ARM: s3c24xx: move regs-spi.h into spi driver
On Thu, Aug 06, 2020 at 08:20:37PM +0200, Krzysztof Kozlowski wrote: > From: Arnd Bergmann > > The file is mostly specific to the driver, the few bits that > are actually used by the platform code get moved to mach/map.h > instead. Acked-by: Mark Brown signature.asc Description: PGP signature
Re: [RFC PATCH v2 6/6] sched/fair: Implement starvation monitor
On 8/7/20 12:46 PM, pet...@infradead.org wrote: > On Fri, Aug 07, 2020 at 11:56:04AM +0200, Juri Lelli wrote: >> Starting deadline server for lower priority classes right away when >> first task is enqueued might break guarantees, as tasks belonging to >> intermediate priority classes could be uselessly preempted. E.g., a well >> behaving (non hog) FIFO task can be preempted by NORMAL tasks even if >> there are still CPU cycles available for NORMAL tasks to run, as they'll >> be running inside the fair deadline server for some period of time. >> >> To prevent this issue, implement a starvation monitor mechanism that >> starts the deadline server only if a (fair in this case) task hasn't >> been scheduled for some interval of time after it has been enqueued. >> Use pick/put functions to manage starvation monitor status. > One thing I considerd was scheduling this as a least-laxity entity -- > such that it runs late, not early -- and start the server when > rq->nr_running != rq->cfs.h_nr_running, IOW when there's !fair tasks > around. > > Not saying we should do it like that, but that's perhaps more > deterministic than this. > I agree, what we want here is something that schedules the server if it still retains some runtime when the laxity is 0. But this is easier said than done, as this would require another scheduler (other pros and cons and analysis (and hours of work)...). But, for the starvation monitor purpose, the goal is not (necessarily) to provide a deterministic guarantee for the starving task, but to avoid system issues while minimizing the damage to the "real" real-time workload. With that in mind, we could relax our ambitions... Thoughts? -- Daniel
[PATCH] drivers: watchdog: rdc321x_wdt: Fix race condition bugs
From: Madhuparna Bhowmik
In rdc321x_wdt_probe(), rdc321x_wdt_device.queue is initialized
after misc_register(), hence if ioctl is called before its
initialization which can call rdc321x_wdt_start() function,
it will see an uninitialized value of rdc321x_wdt_device.queue,
hence initialize it before misc_register().
Also, rdc321x_wdt_device.default_ticks is accessed in reset()
function called from write callback, thus initialize it before
misc_register().
Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Madhuparna Bhowmik
---
drivers/watchdog/rdc321x_wdt.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/watchdog/rdc321x_wdt.c b/drivers/watchdog/rdc321x_wdt.c
index 57187efeb86f..f0c94ea51c3e 100644
--- a/drivers/watchdog/rdc321x_wdt.c
+++ b/drivers/watchdog/rdc321x_wdt.c
@@ -231,6 +231,8 @@ static int rdc321x_wdt_probe(struct platform_device *pdev)
rdc321x_wdt_device.sb_pdev = pdata->sb_pdev;
rdc321x_wdt_device.base_reg = r->start;
+ rdc321x_wdt_device.queue = 0;
+ rdc321x_wdt_device.default_ticks = ticks;
err = misc_register(_wdt_misc);
if (err < 0) {
@@ -245,14 +247,11 @@ static int rdc321x_wdt_probe(struct platform_device *pdev)
rdc321x_wdt_device.base_reg, RDC_WDT_RST);
init_completion(_wdt_device.stop);
- rdc321x_wdt_device.queue = 0;
clear_bit(0, _wdt_device.inuse);
timer_setup(_wdt_device.timer, rdc321x_wdt_trigger, 0);
- rdc321x_wdt_device.default_ticks = ticks;
-
dev_info(>dev, "watchdog init success\n");
return 0;
--
2.17.1
drivers/usb/gadget/udc/max3420_udc.c:975 max3420_nuke() error: double unlocked 'ep->lock' (orig line 970)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 86cfccb66937dd6cbf26ed619958b9e587e6a115
commit: 48ba02b2e2b1a1c80718e93fefe99c8319597c4a usb: gadget: add udc driver
for max3420
date: 5 months ago
config: parisc-randconfig-m031-20200807 (attached as .config)
compiler: hppa-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot
smatch warnings:
drivers/usb/gadget/udc/max3420_udc.c:975 max3420_nuke() error: double unlocked
'ep->lock' (orig line 970)
drivers/usb/gadget/udc/max3420_udc.c:1002 max3420_ep_disable() error: double
unlocked 'ep->lock' (orig line 1000)
vim +975 drivers/usb/gadget/udc/max3420_udc.c
959
960 static void max3420_nuke(struct max3420_ep *ep, int status)
961 {
962 struct max3420_req *req, *r;
963 unsigned long flags;
964
965 spin_lock_irqsave(>lock, flags);
966
967 list_for_each_entry_safe(req, r, >queue, queue) {
968 list_del_init(>queue);
969
> 970 spin_unlock_irqrestore(>lock, flags);
971 max3420_req_done(req, status);
972 spin_lock_irqsave(>lock, flags);
973 }
974
> 975 spin_unlock_irqrestore(>lock, flags);
976 }
977
978 static void __max3420_ep_disable(struct max3420_ep *ep)
979 {
980 struct max3420_udc *udc = ep->udc;
981 unsigned long flags;
982
983 spin_lock_irqsave(>lock, flags);
984
985 ep->ep_usb.desc = NULL;
986
987 ep->todo &= ~ENABLE_EP;
988 ep->todo |= DISABLE;
989
990 spin_unlock_irqrestore(>lock, flags);
991
992 dev_dbg(udc->dev, "Disabled %s\n", ep->name);
993 }
994
995 static int max3420_ep_disable(struct usb_ep *_ep)
996 {
997 struct max3420_ep *ep = to_max3420_ep(_ep);
998 struct max3420_udc *udc = ep->udc;
999
> 1000 max3420_nuke(ep, -ESHUTDOWN);
1001
> 1002 __max3420_ep_disable(ep);
1003
1004 wake_up_process(udc->thread_task);
1005
1006 return 0;
1007 }
1008
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip
Re: [PATCH 20/20] arm64: dts: renesas: r8a774e1: Add VIN and CSI-2 nodes
Hi Geert, Lad,
On 2020-08-06 13:47:58 +0200, Geert Uytterhoeven wrote:
> Hi Prabhakar,
>
> On Thu, Aug 6, 2020 at 1:17 PM Lad, Prabhakar
> wrote:
> > On Wed, Aug 5, 2020 at 12:19 PM Geert Uytterhoeven
> > wrote:
> > > On Thu, Jul 16, 2020 at 7:20 PM Lad Prabhakar
> > > wrote:
> > > > Add VIN and CSI-2 nodes to RZ/G2H (R8A774E1) SoC dtsi.
> > > >
> > > > Signed-off-by: Lad Prabhakar
> > > > Reviewed-by: Marian-Cristian Rotariu
> > > >
> > >
> > > Reviewed-by: Geert Uytterhoeven
> > >
> > > However, before I queue this in renesas-devel for v5.10, I'd like to
> > > have some clarification about the issue below.
> > >
> > > > --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> > > > +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> > >
> > > > + vin4: video@e6ef4000 {
> > > > + compatible = "renesas,vin-r8a774e1";
> > > > + reg = <0 0xe6ef4000 0 0x1000>;
> > > > + interrupts = ;
> > > > + clocks = < CPG_MOD 807>;
> > > > + power-domains = < R8A774E1_PD_ALWAYS_ON>;
> > > > + resets = < 807>;
> > > > + renesas,id = <4>;
> > > > + status = "disabled";
> > > > +
> > > > + ports {
> > > > + #address-cells = <1>;
> > > > + #size-cells = <0>;
> > > > +
> > > > + port@1 {
> > > > + #address-cells = <1>;
> > > > + #size-cells = <0>;
> > >
> > > "make dtbs W=1" says:
> > >
> > > arch/arm64/boot/dts/renesas/r8a774e1.dtsi:1562.12-1572.7: Warning
> > > (graph_child_address): /soc/video@e6ef4000/ports/port@1: graph node
> > > has single child node 'endpoint@0', #address-cells/#size-cells are not
> > > necessary
> > >
> > > (same for vin5-7 below)
> > >
> > Referring to commit 5e53dbf4edb4d ("arm64: dts: renesas: r8a77990: Fix
> > VIN endpoint numbering") we definitely need endpoint numbering.
> > Probably the driver needs to be fixed to handle such cases.
>
> > > > +
> > > > + reg = <1>;
> > > > +
> > > > + vin4csi20: endpoint@0 {
> > > > + reg = <0>;
> > > > + remote-endpoint =
> > > > <>;
>
> On R-Car E3, the single endpoint is at address 2, so "make dtbs W=1"doesn't
> complain. Here it is at address 0.
>
> Niklas?
First the R-Car VIN driver makes decisions based on which endpoint is
described, each endpoint 0-3 represents a different CSI-2 block on the
other end (0: CSI20, 1: CSI21, 2: CSI40 and 3: CSI41).
Then how to handle the warning I'm not sure. I can only really see 2
options.
1. Ignore the warning.
2. Remove #address-cells, #size-cells and reg properties from port@ if
the only endpoint described is endpoint@0.
I would prefers option 2. that is what we do in other cases (for example
on Gen2 boards that only have a single parallel sensor in some early DTS
files we don't have the ports node and just describe a single port with
the same reasoning.
We are not at risk at someone describing a second CSI-2 bock as an
overlay so I see no real harm in option 2. What are your thoughts Geert?
You know more about DT then me.
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> ge...@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds
--
Regards,
Niklas Söderlund
RE: [PATCH 1/1] arm64: add support for PAGE_SIZE aligned kernel stack
Hi Mark, >>If you are seeing issues with the current stack size, can you please >>explain that in more detail? Where are you seeing problems? Which >>configuration options do you have selected? >> We checked on our system with netflix and youtube 4K videos running max stack consumption was 7 KB: sh-3.2# cat /sys/kernel/debug/tracing/stack_max_size 7312 Thus we thought 16KB wil waste a lot of memory for our ARM64 target, and 8KB can be less in some exceptional case. So we decided for 12 KB change. >>I'm not keen on making kernel stack sizes configurable as it's not >>currently possible for the person building the kernel to figure out a >>safe size (and if this were possible, it's be better to handle this >>automatically). >> Ok, can we do something else?, like not making it configurable, but do code changes to support it for PAGE_SIZE aligned stacks rather than power of 2 alignement. Although with configurable also, it depends on VMAP stack, so user will have stack exhaust exception and can increase acccordingly also. > >Motivation behind these changes is saving memory on our system. >Our system runs around 2500 threads concurrently so saving 4Kb >might help us in saving 10MB memory. > >To ensure 12KB is sufficient for our system we have used stack tracing and >realised maximum stack used is not more than 9KB. > /sys/kernel/tracing/stack_max_size > >Tracing interface defined by kernel to track maximum stack size can be used >by others to decide appropriate stack size. > Thanks
Re: [Q] devicetree overlays
On 16.04.20 16:46, Sven Van Asbroeck wrote: Hello folks, > My situation is this: I have hardware which consists of several modules. > Knowledge about the type and location of these modules is located in an > on-board eeprom. I've got a somewhat similar use cases, but not necessarily on DT-native platforms: a) composite devices that are probed via PCI or DMI and just instantiate a bunch of other (more generic) devices. For example the APUv2/3/4 board driver: it eg. instanciates the gpio-amd-fch driver first, and then binds specific gpio lines to appropriate functions, eg. reset key (input), LEDs, ... b) I2C devices behind an USB-based bus adapter. In both cases it would be nice to have the actual device configuration written as a DT snippet, which just needs to be loaded. Let me know, if anybody has an idea how to do that. --mtx --- -- --- Hinweis: unverschlüsselte E-Mails können leicht abgehört und manipuliert werden ! Für eine vertrauliche Kommunikation senden Sie bitte ihren GPG/PGP-Schlüssel zu. --- Enrico Weigelt, metux IT consult Free software and Linux embedded engineering i...@metux.net -- +49-151-27565287
Re: [PATCH v5 1/2] net: dsa: Add protocol support for 802.1AD when adding or deleting vlan for dsa switch port
On 07/08/2020 14:13, hongbo.w...@nxp.com wrote:
> From: "hongbo.wang"
>
> the following command will be supported:
>
> Set bridge's vlan protocol:
> ip link set br0 type bridge vlan_protocol 802.1ad
> Add VLAN:
> ip link add link swp1 name swp1.100 type vlan protocol 802.1ad id 100
> Delete VLAN:
> ip link del link swp1 name swp1.100
>
> Signed-off-by: hongbo.wang
> ---
> include/net/switchdev.h | 1 +
> net/bridge/br_switchdev.c | 22
> net/dsa/dsa_priv.h| 4 +--
> net/dsa/port.c| 6 +++--
> net/dsa/slave.c | 53 ++-
> net/dsa/tag_8021q.c | 4 +--
> 6 files changed, 66 insertions(+), 24 deletions(-)
>
Hi,
Please put the bridge changes in a separate patch with proper description.
Reviewers would easily miss these bridge changes. Also I believe net-next
is currently closed and that's where these patches should be targeted (i.e.
have net-next after PATCH in the subject). Few more comments below.
Thanks,
Nik
> diff --git a/include/net/switchdev.h b/include/net/switchdev.h
> index ff2246914301..7594ea82879f 100644
> --- a/include/net/switchdev.h
> +++ b/include/net/switchdev.h
> @@ -97,6 +97,7 @@ struct switchdev_obj_port_vlan {
> u16 flags;
> u16 vid_begin;
> u16 vid_end;
> + u16 proto;
> };
>
> #define SWITCHDEV_OBJ_PORT_VLAN(OBJ) \
> diff --git a/net/bridge/br_switchdev.c b/net/bridge/br_switchdev.c
> index 015209bf44aa..bcfa00d6d5eb 100644
> --- a/net/bridge/br_switchdev.c
> +++ b/net/bridge/br_switchdev.c
> @@ -146,6 +146,26 @@ br_switchdev_fdb_notify(const struct
> net_bridge_fdb_entry *fdb, int type)
> }
> }
>
> +static u16 br_switchdev_get_bridge_vlan_proto(struct net_device *dev)
const
> +{
> + u16 vlan_proto = ETH_P_8021Q;
> + struct net_device *br = NULL;
> + struct net_bridge_port *p;
> +
> + if (netif_is_bridge_master(dev)) {
> + br = dev;
> + } else if (netif_is_bridge_port(dev)) {
You can use br_port_get_rtnl_rcu() and just check if p is not NULL.
But in general these helpers are used only on bridge devices, I don't think you
can reach them with a device that's not either a bridge or a port. So you can
just
check if it's a bridge master else it's a port.
> + p = br_port_get_rcu(dev);
> + if (p && p->br)
No need to check for p->br, it always exists.
> + br = p->br->dev;
> + }
> +
> + if (br)
> + br_vlan_get_proto(br, _proto);
> +
> + return vlan_proto;
> +}
> +
> int br_switchdev_port_vlan_add(struct net_device *dev, u16 vid, u16 flags,
> struct netlink_ext_ack *extack)
> {
> @@ -157,6 +177,7 @@ int br_switchdev_port_vlan_add(struct net_device *dev,
> u16 vid, u16 flags,
> .vid_end = vid,
> };
>
> + v.proto = br_switchdev_get_bridge_vlan_proto(dev);
> return switchdev_port_obj_add(dev, , extack);
> }
>
> @@ -169,5 +190,6 @@ int br_switchdev_port_vlan_del(struct net_device *dev,
> u16 vid)
> .vid_end = vid,
> };
>
> + v.proto = br_switchdev_get_bridge_vlan_proto(dev);
> return switchdev_port_obj_del(dev, );
> }
Re: [LTP] [PATCH] selftests: vdso: hash entry size on alpha, s390x is 8 bytes
- Original Message - > > - Original Message - > > Hi! > > As much as it's worth the changes looks good to me. > > > > @Jan: I guess that we can as well fix this in LTP first then we can try > > to get the kernel version fixed... > > Fine by me, I'll give it couple more days then push it. Pushed.
Re: [PATCH v3 10/38] virtio_gpu: correct tags for config space fields
On Wed, Aug 05, 2020 at 09:43:42AM -0400, Michael S. Tsirkin wrote: > Since gpu is a modern-only device, > tag config space fields as having little endian-ness. > > Signed-off-by: Michael S. Tsirkin > Reviewed-by: Cornelia Huck Reviewed-by: Gerd Hoffmann
Re: [PATCH v3 34/38] drm/virtio: convert to LE accessors
On Wed, Aug 05, 2020 at 09:44:48AM -0400, Michael S. Tsirkin wrote: > Virtgpu is modern-only. Use LE accessors for config space. > > Signed-off-by: Michael S. Tsirkin Reviewed-by: Gerd Hoffmann
drivers/video/fbdev/sstfb.c:337:23: sparse: expected void
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 86cfccb66937dd6cbf26ed619958b9e587e6a115 commit: 80591e61a0f7e88deaada69844e4a31280c4a38f kbuild: tell sparse about the $ARCH date: 9 months ago config: s390-randconfig-s031-20200807 (attached as .config) compiler: s390-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.2-118-ge1578773-dirty git checkout 80591e61a0f7e88deaada69844e4a31280c4a38f # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=s390 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot sparse warnings: (new ones prefixed by >>) drivers/video/fbdev/sstfb.c:337:23: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void *p @@ got char [noderef] *screen_base @@ >> drivers/video/fbdev/sstfb.c:337:23: sparse: expected void *p drivers/video/fbdev/sstfb.c:337:23: sparse: got char [noderef] *screen_base drivers/video/fbdev/sstfb.c: note: in included file (through arch/s390/include/asm/io.h, include/linux/fb.h): include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:225:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@ include/asm-generic/io.h:225:22: sparse: expected unsigned int [usertype] val include/asm-generic/io.h:225:22: sparse: got restricted __le32 [usertype] include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:225:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@ include/asm-generic/io.h:225:22: sparse: expected unsigned int [usertype] val include/asm-generic/io.h:225:22: sparse: got restricted __le32 [usertype] include/asm-generic/io.h:225:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@ include/asm-generic/io.h:225:22: sparse: expected unsigned int [usertype] val include/asm-generic/io.h:225:22: sparse: got restricted __le32 [usertype] include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:225:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@ include/asm-generic/io.h:225:22: sparse: expected unsigned int [usertype] val include/asm-generic/io.h:225:22: sparse: got restricted __le32 [usertype] include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:225:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@ include/asm-generic/io.h:225:22: sparse: expected unsigned in
Re: [PATCH 9/9] mfd: mt6360: Merge different sub-devices I2C read/write
On Fri, Aug 07, 2020 at 10:16:08AM +0800, Gene Chen wrote: > Mark Brown 於 2020年8月6日 週四 下午8:13寫道： > > You really also need to write a much clearer changelog, I would be hard > > pressed to tell from the changelog that this was moving things to the > > regmap core rather than shuffling regmaps within the device. > MT6360 has 4 I2C worker devices It's still just a single user with a single driver. signature.asc Description: PGP signature
Re: [PATCH 2/2 resend] iio:temperature:mlx90632: Adding extended calibration option
On Fri, 7 Aug 2020 at 12:29, Andy Shevchenko wrote:
>
> On Fri, Aug 7, 2020 at 12:21 PM Crt Mori wrote:
>
> Oh yeah, you are right, there will be some comments :-)
>
Told ya. No matter how many times I go through it, I always find
something. I will prepare v3 with fixes, except for some additional
questions below.
> > For some time market wants medical grade accuracy in medical range,
>
> the market
>
> > while still retaining the declared accuracy outside of the medical range
> > within the same sensor. That is why we created extended calibration
> > which is automatically switched to when object temperature is too high.
> >
> > This patch also introduces the object_ambient_temperature variable which
> > is needed for more accurate calculation of the object infra-red
> > footprint as sensor's ambient temperature might be totally different
> > than what the ambient temperature is at object and that is why we can
> > have some more error which can be eliminated. Currently this temperature
>
> errors
>
> > is fixed at 25, but interface to adjust it by user (with external sensor
>
> the interface
>
> > or just IR measurement of the another object which acts as ambient),
>
> 'of another' or 'the other' if we know what it is exactly.
>
> > will be introduced in another commit.
>
> ...
>
> > struct mlx90632_data {
> > struct i2c_client *client;
> > struct mutex lock; /* Multiple reads for single measurement */
> > struct regmap *regmap;
> > u16 emissivity;
>
> > + u8 mtyp; /* measurement type - to enable extended range
> > calculations */
>
> Perhaps better to switch this struct to follow kernel doc in one of
> preparatory patches and add the description of this field accordingly.
>
Can you explain a bit more? I was looking in kernel doc, but could not
find much about how to comment these members.
> > + u32 object_ambient_temperature;
> > };
>
> ...
>
> > +static int mlx90632_set_meas_type(struct regmap *regmap, u8 type)
> > +{
> > + int ret;
> > +
> > + if ((type != MLX90632_MTYP_MEDICAL) & (type !=
> > MLX90632_MTYP_EXTENDED))
> > + return -EINVAL;
>
> Not sure I understand the point of & vs. && here.
>
Should indeed be &&, if it is needed at all. Both are boolean types.
> > + ret = regmap_write(regmap, MLX90632_REG_I2C_CMD,
> > MLX90632_RESET_CMD);
> > + if (ret < 0)
> > + return ret;
> > +
> > + ret = regmap_write_bits(regmap, MLX90632_REG_CONTROL,
> > +(MLX90632_CFG_MTYP_MASK |
> > MLX90632_CFG_PWR_MASK),
> > +(MLX90632_MTYP_STATUS(type) |
> > MLX90632_PWR_STATUS_HALT));
> > + if (ret < 0)
> > + return ret;
> > +
> > + mlx90632_pwr_continuous(regmap);
>
> > +
> > + return ret;
>
> Since you are using ' < 0' above and below (and I think it doesn't
> worth it, i.o.w. you may drop them) here is something interesting
> might be returned (actually not, see first part of this sentence).
> Should be
>
> return 0;
>
> > +}
>
> ...
>
> > +static int mlx90632_read_ambient_raw_extended(struct regmap *regmap,
> > + s16 *ambient_new_raw, s16
> > *ambient_old_raw)
> > +{
>
> > + int ret;
> > + unsigned int read_tmp;
>
> Please keep them in reversed xmas tree format.
>
> > +
> > + ret = regmap_read(regmap, MLX90632_RAM_3(17), _tmp);
> > + if (ret < 0)
> > + return ret;
> > + *ambient_new_raw = (s16)read_tmp;
> > +
> > + ret = regmap_read(regmap, MLX90632_RAM_3(18), _tmp);
> > + if (ret < 0)
> > + return ret;
> > + *ambient_old_raw = (s16)read_tmp;
>
> > + return ret;
>
> Same comments as per previous function.
>
> > +}
>
> > +static int mlx90632_read_object_raw_extended(struct regmap *regmap, s16
> > *object_new_raw)
> > +{
> > + int ret;
> > + unsigned int read_tmp;
> > + s32 read;
>
> Besides all above comments being applicable here...
>
> > + ret = regmap_read(regmap, MLX90632_RAM_1(17), _tmp);
> > + if (ret < 0)
> > + return ret;
> > + read = (s16)read_tmp;
> > +
> > + ret = regmap_read(regmap, MLX90632_RAM_2(17), _tmp);
> > + if (ret < 0)
> > + return ret;
> > + read = read - (s16)read_tmp;
>
> ...I'm wondering if you can use bulk reads of those registers.
I cant, sensor does not support it and single read case did not work
few years back, but maybe regmap now improved...
> Also I'm not sure you need explicit castings.
>
> > + ret = regmap_read(regmap, MLX90632_RAM_1(18), _tmp);
> > + if (ret < 0)
> > + return ret;
> > + read = read - (s16)read_tmp;
> > +
> > + ret = regmap_read(regmap, MLX90632_RAM_2(18), _tmp);
> > + if (ret < 0)
> > + return ret;
> > + read = (read + (s16)read_tmp) / 2;
>
> Ditto.
>
> > + ret =
drivers/video/fbdev/pxafb.c:916:24: sparse: sparse: incorrect type in assignment (different address spaces)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 86cfccb66937dd6cbf26ed619958b9e587e6a115 commit: 670d0a4b10704667765f7d18f7592993d02783aa sparse: use identifiers to define address spaces date: 7 weeks ago config: arm-randconfig-s031-20200807 (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.2-118-ge1578773-dirty git checkout 670d0a4b10704667765f7d18f7592993d02783aa # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot sparse warnings: (new ones prefixed by >>) >> drivers/video/fbdev/pxafb.c:916:24: sparse: sparse: incorrect type in >> assignment (different address spaces) @@ expected void [noderef] __iomem >> *video_mem @@ got void * @@ >> drivers/video/fbdev/pxafb.c:916:24: sparse: expected void [noderef] >> __iomem *video_mem drivers/video/fbdev/pxafb.c:916:24: sparse: got void * >> drivers/video/fbdev/pxafb.c:921:47: sparse: sparse: incorrect type in >> argument 1 (different address spaces) @@ expected void const volatile *x >> @@ got void [noderef] __iomem *video_mem @@ drivers/video/fbdev/pxafb.c:921:47: sparse: expected void const volatile *x >> drivers/video/fbdev/pxafb.c:921:47: sparse: got void [noderef] __iomem >> *video_mem >> drivers/video/fbdev/pxafb.c:977:53: sparse: sparse: incorrect type in >> argument 1 (different address spaces) @@ expected void *virt @@ got >> void [noderef] __iomem *video_mem @@ drivers/video/fbdev/pxafb.c:977:53: sparse: expected void *virt drivers/video/fbdev/pxafb.c:977:53: sparse: got void [noderef] __iomem *video_mem drivers/video/fbdev/pxafb.c:1714:24: sparse: sparse: incorrect type in assignment (different address spaces) @@ expected void [noderef] __iomem *video_mem @@ got void * @@ drivers/video/fbdev/pxafb.c:1714:24: sparse: expected void [noderef] __iomem *video_mem drivers/video/fbdev/pxafb.c:1714:24: sparse: got void * drivers/video/fbdev/pxafb.c:1718:47: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile *x @@ got void [noderef] __iomem *video_mem @@ drivers/video/fbdev/pxafb.c:1718:47: sparse: expected void const volatile *x drivers/video/fbdev/pxafb.c:1718:47: sparse: got void [noderef] __iomem *video_mem drivers/video/fbdev/pxafb.c:2392:29: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void *virt @@ got void [noderef] __iomem *video_mem @@ drivers/video/fbdev/pxafb.c:2392:29: sparse: expected void *virt drivers/video/fbdev/pxafb.c:2392:29: sparse: got void [noderef] __iomem *video_mem drivers/video/fbdev/pxafb.c:2418:29: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void *virt @@ got void [noderef] __iomem *video_mem @@ drivers/video/fbdev/pxafb.c:2418:29: sparse: expected void *virt drivers/video/fbdev/pxafb.c:2418:29: sparse: got void [noderef] __iomem *video_mem -- >> drivers/firmware/efi/test/efi_test.c:157:13: sparse: sparse: incorrect type >> in initializer (different address spaces) @@ expected unsigned long >> [noderef] __user *register __p @@ got unsigned long *[addressable] >> data_size @@ >> drivers/firmware/efi/test/efi_test.c:157:13: sparse: expected unsigned >> long [noderef] __user *register __p drivers/firmware/efi/test/efi_test.c:157:13: sparse: got unsigned long *[addressable] data_size drivers/firmware/efi/test/efi_test.c:160:61: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void const [noderef] __user *from @@ got struct guid_t [usertype] *[addressable] vendor_guid @@ drivers/firmware/efi/test/efi_test.c:160:61: sparse: expected void const [noderef] __user *from drivers/firmware/efi/test/efi_test.c:160:61: sparse: got struct guid_t [usertype] *[addressable] vendor_guid drivers/firmware/efi/test/efi_test.c:167:60: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected unsigned short [noderef] [usertype] __user *src @@ got unsigned short [usertype] *[addressable] variable_name @@ drivers/firmware/efi/test/efi_test.c:167:60: sparse: expected unsigned short [noderef] [usertype] __user *src drivers/firmware/efi/test/efi_test.c:167:60: sparse: got unsigned short
Re: [PATCH 1/2] lockdep: improve current->(hard|soft)irqs_enabled synchronisation with actual irq state
What's wrong with something like this?
AFAICT there's no reason to actually try and add IRQ tracing here, it's
just a hand full of instructions at the most.
---
diff --git a/arch/powerpc/include/asm/hw_irq.h
b/arch/powerpc/include/asm/hw_irq.h
index 3a0db7b0b46e..6be22c1838e2 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -196,33 +196,6 @@ static inline bool arch_irqs_disabled(void)
arch_local_irq_restore(flags); \
} while(0)
-#ifdef CONFIG_TRACE_IRQFLAGS
-#define powerpc_local_irq_pmu_save(flags) \
-do { \
- raw_local_irq_pmu_save(flags); \
- trace_hardirqs_off(); \
- } while(0)
-#define powerpc_local_irq_pmu_restore(flags) \
- do {\
- if (raw_irqs_disabled_flags(flags)) { \
- raw_local_irq_pmu_restore(flags); \
- trace_hardirqs_off(); \
- } else {\
- trace_hardirqs_on();\
- raw_local_irq_pmu_restore(flags); \
- } \
- } while(0)
-#else
-#define powerpc_local_irq_pmu_save(flags) \
- do {\
- raw_local_irq_pmu_save(flags); \
- } while(0)
-#define powerpc_local_irq_pmu_restore(flags) \
- do {\
- raw_local_irq_pmu_restore(flags); \
- } while (0)
-#endif /* CONFIG_TRACE_IRQFLAGS */
-
#endif /* CONFIG_PPC_BOOK3S */
#ifdef CONFIG_PPC_BOOK3E
diff --git a/arch/powerpc/include/asm/local.h b/arch/powerpc/include/asm/local.h
index bc4bd19b7fc2..b357a35672b1 100644
--- a/arch/powerpc/include/asm/local.h
+++ b/arch/powerpc/include/asm/local.h
@@ -32,9 +32,9 @@ static __inline__ void local_##op(long i, local_t *l)
\
{ \
unsigned long flags;\
\
- powerpc_local_irq_pmu_save(flags); \
+ raw_powerpc_local_irq_pmu_save(flags); \
l->v c_op i;\
- powerpc_local_irq_pmu_restore(flags); \
+ raw_powerpc_local_irq_pmu_restore(flags);
\
}
#define LOCAL_OP_RETURN(op, c_op) \
@@ -43,9 +43,9 @@ static __inline__ long local_##op##_return(long a, local_t
*l)\
long t; \
unsigned long flags;\
\
- powerpc_local_irq_pmu_save(flags); \
+ raw_powerpc_local_irq_pmu_save(flags); \
t = (l->v c_op a); \
- powerpc_local_irq_pmu_restore(flags); \
+ raw_powerpc_local_irq_pmu_restore(flags);
\
\
return t; \
}
@@ -81,11 +81,11 @@ static __inline__ long local_cmpxchg(local_t *l, long o,
long n)
long t;
unsigned long flags;
- powerpc_local_irq_pmu_save(flags);
+ raw_powerpc_local_irq_pmu_save(flags);
t = l->v;
if (t == o)
l->v = n;
- powerpc_local_irq_pmu_restore(flags);
+ raw_powerpc_local_irq_pmu_restore(flags);
return t;
}
@@ -95,10 +95,10 @@ static __inline__ long local_xchg(local_t *l, long n)
long t;
unsigned long flags;
- powerpc_local_irq_pmu_save(flags);
+ raw_powerpc_local_irq_pmu_save(flags);
t = l->v;
l->v = n;
- powerpc_local_irq_pmu_restore(flags);
+ raw_powerpc_local_irq_pmu_restore(flags);
return t;
}
@@ -117,12 +117,12 @@ static __inline__ int local_add_unless(local_t *l, long
a, long u)
unsigned long flags;
int ret = 0;
- powerpc_local_irq_pmu_save(flags);
+ raw_powerpc_local_irq_pmu_save(flags);
if (l->v != u) {
l->v += a;
ret = 1;
}
- powerpc_local_irq_pmu_restore(flags);
+ raw_powerpc_local_irq_pmu_restore(flags);
[PATCH v5 0/2] Add 802.1AD protocol support for dsa switch and ocelot driver
From: "hongbo.wang" 1. the patch 0001* is for setting single port into 802.1AD(QinQ) mode, before this patch, the function dsa_slave_vlan_rx_add_vid didn't pass the parameter "proto" to next port level, so switch's port can't get parameter "proto" after applying this patch, the following command can be supported: ip link set br0 type bridge vlan_protocol 802.1ad ip link add link swp1 name swp1.100 type vlan protocol 802.1ad id 100 2. the patch 0002* is for setting QinQ related registers in ocelot switch driver, after applying this patch, the switch(VSC99599)'s port can enable or disable QinQ mode. 3. Version log v5: a. add devlink to enable qinq_mode of ocelot's single port b. modify br_switchdev_port_vlan_add to pass bridge's vlan_proto to port driver c. enable NETIF_F_HW_VLAN_STAG_FILTER in ocelot driver v4: a. modify slave.c to support "ip set br0 type bridge vlan_protocol 802.1ad" b. modify ocelot.c, if enable QinQ, set VLAN_AWARE_ENA and VLAN_POP_CNT per port when vlan_filter=1 v3: combine two patches to one post hongbo.wang (2): net: dsa: Add protocol support for 802.1AD when adding or deleting vlan for dsa switch port net: dsa: ocelot: Add support for QinQ Operation drivers/net/dsa/ocelot/felix.c | 124 + drivers/net/ethernet/mscc/ocelot.c | 40 -- include/net/switchdev.h| 1 + include/soc/mscc/ocelot.h | 4 + net/bridge/br_switchdev.c | 22 + net/dsa/dsa_priv.h | 4 +- net/dsa/port.c | 6 +- net/dsa/slave.c| 53 +++- net/dsa/tag_8021q.c| 4 +- 9 files changed, 228 insertions(+), 30 deletions(-) -- 2.17.1
[PATCH v5 2/2] net: dsa: ocelot: Add support for QinQ Operation
From: "hongbo.wang"
This feature can be test in the following case:
Customer <-> swp0 <-> swp1 <-> ISP
Customer will send and receive packets with single VLAN tag(CTAG),
ISP will send and receive packets with double VLAN tag(STAG and CTAG).
This refers to "4.3.3 Provider Bridges and Q-in-Q Operation" in
VSC99599_1_00_TS.pdf.
The related test commands:
1.
devlink dev param set pci/:00:00.5 name qinq_port_bitmap \
value 2 cmode runtime
ip link add dev br0 type bridge vlan_protocol 802.1ad
ip link set dev swp0 master br0
ip link set dev swp1 master br0
2.
ip link set dev br0 type bridge vlan_filtering 1
bridge vlan add dev swp0 vid 100 pvid
bridge vlan add dev swp1 vid 100
Result:
Customer(tpid:8100 vid:111) -> swp0 -> swp1 -> ISP(STAG \
tpid:88A8 vid:100, CTAG tpid:8100 vid:111)
3.
bridge vlan del dev swp0 vid 1 pvid
bridge vlan add dev swp0 vid 100 pvid untagged
Result:
ISP(tpid:88A8 vid:100 tpid:8100 vid:222) -> swp1 -> swp0 ->\
Customer(tpid:8100 vid:222)
Signed-off-by: hongbo.wang
---
drivers/net/dsa/ocelot/felix.c | 124 +
drivers/net/ethernet/mscc/ocelot.c | 40 --
include/soc/mscc/ocelot.h | 4 +
3 files changed, 162 insertions(+), 6 deletions(-)
diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c
index c69d9592a2b7..f9d50af4be65 100644
--- a/drivers/net/dsa/ocelot/felix.c
+++ b/drivers/net/dsa/ocelot/felix.c
@@ -147,9 +147,26 @@ static void felix_vlan_add(struct dsa_switch *ds, int port,
vid, port, err);
return;
}
+
+ if (vlan->proto == ETH_P_8021AD) {
+ if (!ocelot->qinq_enable) {
+ ocelot->qinq_enable = true;
+ kref_init(>qinq_refcount);
+ } else {
+ kref_get(>qinq_refcount);
+ }
+ }
}
}
+static void felix_vlan_qinq_release(struct kref *ref)
+{
+ struct ocelot *ocelot;
+
+ ocelot = container_of(ref, struct ocelot, qinq_refcount);
+ ocelot->qinq_enable = false;
+}
+
static int felix_vlan_del(struct dsa_switch *ds, int port,
const struct switchdev_obj_port_vlan *vlan)
{
@@ -164,7 +181,11 @@ static int felix_vlan_del(struct dsa_switch *ds, int port,
vid, port, err);
return err;
}
+
+ if (ocelot->qinq_enable && vlan->proto == ETH_P_8021AD)
+ kref_put(>qinq_refcount,
felix_vlan_qinq_release);
}
+
return 0;
}
@@ -172,9 +193,13 @@ static int felix_port_enable(struct dsa_switch *ds, int
port,
struct phy_device *phy)
{
struct ocelot *ocelot = ds->priv;
+ struct net_device *slave;
ocelot_port_enable(ocelot, port, phy);
+ slave = dsa_to_port(ds, port)->slave;
+ slave->features |= NETIF_F_HW_VLAN_STAG_FILTER;
+
return 0;
}
@@ -568,6 +593,97 @@ static struct ptp_clock_info ocelot_ptp_clock_info = {
.enable = ocelot_ptp_enable,
};
+static int felix_qinq_port_bitmap_get(struct dsa_switch *ds, u32 *bitmap)
+{
+ struct ocelot *ocelot = ds->priv;
+ struct ocelot_port *ocelot_port;
+ int port;
+
+ *bitmap = 0;
+ for (port = 0; port < ds->num_ports; port++) {
+ ocelot_port = ocelot->ports[port];
+ if (ocelot_port->qinq_mode)
+ *bitmap |= 0x01 << port;
+ }
+
+ return 0;
+}
+
+static int felix_qinq_port_bitmap_set(struct dsa_switch *ds, u32 bitmap)
+{
+ struct ocelot *ocelot = ds->priv;
+ struct ocelot_port *ocelot_port;
+ int port;
+
+ for (port = 0; port < ds->num_ports; port++) {
+ ocelot_port = ocelot->ports[port];
+ if (bitmap & (0x01 << port))
+ ocelot_port->qinq_mode = true;
+ else
+ ocelot_port->qinq_mode = false;
+ }
+
+ return 0;
+}
+
+enum felix_devlink_param_id {
+ FELIX_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
+ FELIX_DEVLINK_PARAM_ID_QINQ_PORT_BITMAP,
+};
+
+static int felix_devlink_param_get(struct dsa_switch *ds, u32 id,
+ struct devlink_param_gset_ctx *ctx)
+{
+ int err;
+
+ switch (id) {
+ case FELIX_DEVLINK_PARAM_ID_QINQ_PORT_BITMAP:
+ err = felix_qinq_port_bitmap_get(ds, >val.vu32);
+ break;
+ default:
+ err = -EOPNOTSUPP;
+ break;
+ }
+
+ return err;
+}
+
+static int felix_devlink_param_set(struct dsa_switch *ds, u32 id,
+ struct devlink_param_gset_ctx *ctx)
+{
+ int err;
+
+ switch (id) {
+ case
[PATCH v5 1/2] net: dsa: Add protocol support for 802.1AD when adding or deleting vlan for dsa switch port
From: "hongbo.wang"
the following command will be supported:
Set bridge's vlan protocol:
ip link set br0 type bridge vlan_protocol 802.1ad
Add VLAN:
ip link add link swp1 name swp1.100 type vlan protocol 802.1ad id 100
Delete VLAN:
ip link del link swp1 name swp1.100
Signed-off-by: hongbo.wang
---
include/net/switchdev.h | 1 +
net/bridge/br_switchdev.c | 22
net/dsa/dsa_priv.h| 4 +--
net/dsa/port.c| 6 +++--
net/dsa/slave.c | 53 ++-
net/dsa/tag_8021q.c | 4 +--
6 files changed, 66 insertions(+), 24 deletions(-)
diff --git a/include/net/switchdev.h b/include/net/switchdev.h
index ff2246914301..7594ea82879f 100644
--- a/include/net/switchdev.h
+++ b/include/net/switchdev.h
@@ -97,6 +97,7 @@ struct switchdev_obj_port_vlan {
u16 flags;
u16 vid_begin;
u16 vid_end;
+ u16 proto;
};
#define SWITCHDEV_OBJ_PORT_VLAN(OBJ) \
diff --git a/net/bridge/br_switchdev.c b/net/bridge/br_switchdev.c
index 015209bf44aa..bcfa00d6d5eb 100644
--- a/net/bridge/br_switchdev.c
+++ b/net/bridge/br_switchdev.c
@@ -146,6 +146,26 @@ br_switchdev_fdb_notify(const struct net_bridge_fdb_entry
*fdb, int type)
}
}
+static u16 br_switchdev_get_bridge_vlan_proto(struct net_device *dev)
+{
+ u16 vlan_proto = ETH_P_8021Q;
+ struct net_device *br = NULL;
+ struct net_bridge_port *p;
+
+ if (netif_is_bridge_master(dev)) {
+ br = dev;
+ } else if (netif_is_bridge_port(dev)) {
+ p = br_port_get_rcu(dev);
+ if (p && p->br)
+ br = p->br->dev;
+ }
+
+ if (br)
+ br_vlan_get_proto(br, _proto);
+
+ return vlan_proto;
+}
+
int br_switchdev_port_vlan_add(struct net_device *dev, u16 vid, u16 flags,
struct netlink_ext_ack *extack)
{
@@ -157,6 +177,7 @@ int br_switchdev_port_vlan_add(struct net_device *dev, u16
vid, u16 flags,
.vid_end = vid,
};
+ v.proto = br_switchdev_get_bridge_vlan_proto(dev);
return switchdev_port_obj_add(dev, , extack);
}
@@ -169,5 +190,6 @@ int br_switchdev_port_vlan_del(struct net_device *dev, u16
vid)
.vid_end = vid,
};
+ v.proto = br_switchdev_get_bridge_vlan_proto(dev);
return switchdev_port_obj_del(dev, );
}
diff --git a/net/dsa/dsa_priv.h b/net/dsa/dsa_priv.h
index 1653e3377cb3..52685b9875e5 100644
--- a/net/dsa/dsa_priv.h
+++ b/net/dsa/dsa_priv.h
@@ -164,8 +164,8 @@ int dsa_port_vlan_add(struct dsa_port *dp,
struct switchdev_trans *trans);
int dsa_port_vlan_del(struct dsa_port *dp,
const struct switchdev_obj_port_vlan *vlan);
-int dsa_port_vid_add(struct dsa_port *dp, u16 vid, u16 flags);
-int dsa_port_vid_del(struct dsa_port *dp, u16 vid);
+int dsa_port_vid_add(struct dsa_port *dp, u16 vid, u16 proto, u16 flags);
+int dsa_port_vid_del(struct dsa_port *dp, u16 vid, u16 proto);
int dsa_port_link_register_of(struct dsa_port *dp);
void dsa_port_link_unregister_of(struct dsa_port *dp);
extern const struct phylink_mac_ops dsa_port_phylink_mac_ops;
diff --git a/net/dsa/port.c b/net/dsa/port.c
index e23ece229c7e..c98bbac3980a 100644
--- a/net/dsa/port.c
+++ b/net/dsa/port.c
@@ -433,13 +433,14 @@ int dsa_port_vlan_del(struct dsa_port *dp,
return dsa_port_notify(dp, DSA_NOTIFIER_VLAN_DEL, );
}
-int dsa_port_vid_add(struct dsa_port *dp, u16 vid, u16 flags)
+int dsa_port_vid_add(struct dsa_port *dp, u16 vid, u16 proto, u16 flags)
{
struct switchdev_obj_port_vlan vlan = {
.obj.id = SWITCHDEV_OBJ_ID_PORT_VLAN,
.flags = flags,
.vid_begin = vid,
.vid_end = vid,
+ .proto = proto,
};
struct switchdev_trans trans;
int err;
@@ -454,12 +455,13 @@ int dsa_port_vid_add(struct dsa_port *dp, u16 vid, u16
flags)
}
EXPORT_SYMBOL(dsa_port_vid_add);
-int dsa_port_vid_del(struct dsa_port *dp, u16 vid)
+int dsa_port_vid_del(struct dsa_port *dp, u16 vid, u16 proto)
{
struct switchdev_obj_port_vlan vlan = {
.obj.id = SWITCHDEV_OBJ_ID_PORT_VLAN,
.vid_begin = vid,
.vid_end = vid,
+ .proto = proto,
};
return dsa_port_vlan_del(dp, );
diff --git a/net/dsa/slave.c b/net/dsa/slave.c
index 41d60eeefdbd..f01deda00492 100644
--- a/net/dsa/slave.c
+++ b/net/dsa/slave.c
@@ -328,6 +328,7 @@ static int dsa_slave_vlan_add(struct net_device *dev,
* it doesn't make sense to program a PVID, so clear this flag.
*/
vlan.flags &= ~BRIDGE_VLAN_INFO_PVID;
+ vlan.proto = ETH_P_8021Q;
err = dsa_port_vlan_add(dp->cpu_dp, , trans);
if (err)
@@ -1229,11 +1230,38 @@ static int dsa_slave_get_ts_info(struct net_device *dev,
return ds->ops->get_ts_info(ds, p->dp->index, ts);
srvfs: file system for posting open file descriptors into fs namespace
Hello folks, here's the first version of my "srvfs" implementation - a synthentic filesystem which allows a process to "publish" an open file descriptor into the file system, so other processes can continue from there, with whatever state the fd is already in. This is a concept from Plan9. The main purpose is allowing applications "dialing" some connection, do initial handshakes (eg. authentication) and then publish the connection to other applications, that now can now make use of the already dialed connection. I'm currently developing it out-of-tree - will convert it to patches, once it reached a stable state. https://github.com/metux/linux-srvfs-oot Some quick background pointers on how it works on Plan9: http://man.cat-v.org/plan_9/4/exportfs https://9fans.github.io/plan9port/man/man3/dial.html have fun, -- Enrico Weigelt, metux IT consult Free software and Linux embedded engineering i...@metux.net -- +49-151-27565287
Re: [PATCH] arm64: kaslr: Use standard early random function
On Thu, Aug 06, 2020 at 05:49:04PM -0700, Guenter Roeck wrote: > Use arch_get_random_seed_long_early() instead of arm64 specific functions > to solve the problem. As a side effect of this change, the code no longer > bypasses ARCH_RANDOM, which I consider desirable (after all, ARCH_RANDOM > was disabled for a reason). This should be fine since the entire implementation is still static inline in the header other than the prints in the WARN_ON() which should never be triggered here so it should be fine. Reviewed-by: Mark Brown Tested-by: Mark Brown signature.asc Description: PGP signature
Re: [PATCH v3 1/3] driver core: Revert default driver_deferred_probe_timeout value to 0
On Thu, Aug 06, 2020 at 07:09:16PM -0700, John Stultz wrote:
> On Thu, Aug 6, 2020 at 6:52 AM Thierry Reding
> wrote:
> >
> > On Wed, Apr 22, 2020 at 08:32:43PM +, John Stultz wrote:
> > > This patch addresses a regression in 5.7-rc1+
> > >
> > > In commit c8c43cee29f6 ("driver core: Fix
> > > driver_deferred_probe_check_state() logic"), we both cleaned up
> > > the logic and also set the default driver_deferred_probe_timeout
> > > value to 30 seconds to allow for drivers that are missing
> > > dependencies to have some time so that the dependency may be
> > > loaded from userland after initcalls_done is set.
> > >
> > > However, Yoshihiro Shimoda reported that on his device that
> > > expects to have unmet dependencies (due to "optional links" in
> > > its devicetree), was failing to mount the NFS root.
> > >
> > > In digging further, it seemed the problem was that while the
> > > device properly probes after waiting 30 seconds for any missing
> > > modules to load, the ip_auto_config() had already failed,
> > > resulting in NFS to fail. This was due to ip_auto_config()
> > > calling wait_for_device_probe() which doesn't wait for the
> > > driver_deferred_probe_timeout to fire.
> > >
> > > Fixing that issue is possible, but could also introduce 30
> > > second delays in bootups for users who don't have any
> > > missing dependencies, which is not ideal.
> > >
> > > So I think the best solution to avoid any regressions is to
> > > revert back to a default timeout value of zero, and allow
> > > systems that need to utilize the timeout in order for userland
> > > to load any modules that supply misisng dependencies in the dts
> > > to specify the timeout length via the exiting documented boot
> > > argument.
> > >
> > > Thanks to Geert for chasing down that ip_auto_config was why NFS
> > > was failing in this case!
> > >
> > > Cc: "David S. Miller"
> > > Cc: Alexey Kuznetsov
> > > Cc: Hideaki YOSHIFUJI
> > > Cc: Jakub Kicinski
> > > Cc: Greg Kroah-Hartman
> > > Cc: Rafael J. Wysocki
> > > Cc: Rob Herring
> > > Cc: Geert Uytterhoeven
> > > Cc: Yoshihiro Shimoda
> > > Cc: Robin Murphy
> > > Cc: Andy Shevchenko
> > > Cc: Sudeep Holla
> > > Cc: Andy Shevchenko
> > > Cc: Naresh Kamboju
> > > Cc: Basil Eljuse
> > > Cc: Ferry Toth
> > > Cc: Arnd Bergmann
> > > Cc: Anders Roxell
> > > Cc: netdev
> > > Cc: linux...@vger.kernel.org
> > > Reported-by: Yoshihiro Shimoda
> > > Tested-by: Yoshihiro Shimoda
> > > Fixes: c8c43cee29f6 ("driver core: Fix
> > > driver_deferred_probe_check_state() logic")
> > > Signed-off-by: John Stultz
> > > ---
> > > drivers/base/dd.c | 13 ++---
> > > 1 file changed, 2 insertions(+), 11 deletions(-)
> >
> > Sorry for being a bit late to the party, but this breaks suspend/resume
> > support on various Tegra devices. I've only noticed now because, well,
> > suspend/resume have been broken for other reasons for a little while and
> > it's taken us a bit to resolve those issues.
> >
> > But now that those other issues have been fixed, I've started seeing an
> > issue where after resume from suspend some of the I2C controllers are no
> > longer working. The reason for this is that they share pins with DP AUX
> > controllers via the pinctrl framework. The DP AUX driver registers as
> > part of the DRM/KMS driver, which usually happens in userspace. Since
> > the deferred probe timeout was set to 0 by default this no longer works
> > because no pinctrl states are assigned to the I2C controller and
> > therefore upon resume the pins cannot be configured for I2C operation.
>
> Oof. My apologies!
>
> > I'm also somewhat confused by this patch and a few before because they
> > claim that they restore previous default behaviour, but that's just not
> > true. Originally when this timeout was introduced it was -1, which meant
> > that there was no timeout at all and hence users had to opt-in if they
> > wanted to use a deferred probe timeout.
>
> I don't think that's quite true, since the point of my original
> changes were to avoid troubles I was seeing with drivers not loading
> because once the timeout fired after init, driver loading would fail
> with ENODEV instead of returning EPROBE_DEFER. The logic that existed
> was buggy so the timeout handling didn't really work (changing the
> boot argument wouldn't help, because after init the logic would return
> ENODEV before it checked the timeout value).
>
> That said, looking at it now, I do realize the
> driver_deferred_probe_check_state_continue() logic in effect never
> returned ETIMEDOUT before was consolidated in the earlier changes, and
> now we've backed the default timeout to 0, old user (see bec6c0ecb243)
> will now get ETIMEDOUT where they wouldn't before.
>
> So would the following fix it up for you? (sorry its whitespace corrupted)
>
> diff --git a/drivers/pinctrl/devicetree.c b/drivers/pinctrl/devicetree.c
> index c6fe7d64c913..c7448be64d07 100644
> --- a/drivers/pinctrl/devicetree.c
> +++
[PATCH v2] drm/qxl: don't take vga ports on rev5+
qemu 5.0 introduces a new qxl hardware revision 5. Unlike revision 4
(and below) the device doesn't switch back into vga compatibility mode
when someone touches the vga ports. So we don't have to reserve the
vga ports any more to avoid that happening.
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/qxl/qxl_drv.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/qxl/qxl_drv.c b/drivers/gpu/drm/qxl/qxl_drv.c
index 13872b882775..6e7f16f4cec7 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.c
+++ b/drivers/gpu/drm/qxl/qxl_drv.c
@@ -96,7 +96,7 @@ qxl_pci_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
if (ret)
goto disable_pci;
- if (is_vga(pdev)) {
+ if (is_vga(pdev) && pdev->revision < 5) {
ret = vga_get_interruptible(pdev, VGA_RSRC_LEGACY_IO);
if (ret) {
DRM_ERROR("can't get legacy vga ioports\n");
@@ -127,7 +127,7 @@ qxl_pci_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
unload:
qxl_device_fini(qdev);
put_vga:
- if (is_vga(pdev))
+ if (is_vga(pdev) && pdev->revision < 5)
vga_put(pdev, VGA_RSRC_LEGACY_IO);
disable_pci:
pci_disable_device(pdev);
@@ -155,7 +155,7 @@ qxl_pci_remove(struct pci_dev *pdev)
drm_dev_unregister(dev);
drm_atomic_helper_shutdown(dev);
- if (is_vga(pdev))
+ if (is_vga(pdev) && pdev->revision < 5)
vga_put(pdev, VGA_RSRC_LEGACY_IO);
}
--
2.18.4
[PATCH] docs: update trusted-encrypted.rst
The parameters in tmp2 commands are outdated, people are not able to create trusted key by the example commands. This patch updates the paramerters of tpm2 commands, they are verified by tpm2-tools-4.1 with Linux v5.8 kernel. Signed-off-by: Coly Li Cc: Stefan Berger Cc: Dan Williams Cc: Mimi Zohar --- Documentation/security/keys/trusted-encrypted.rst | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/Documentation/security/keys/trusted-encrypted.rst b/Documentation/security/keys/trusted-encrypted.rst index 9483a7425ad5..442a2775156e 100644 --- a/Documentation/security/keys/trusted-encrypted.rst +++ b/Documentation/security/keys/trusted-encrypted.rst @@ -39,10 +39,9 @@ With the IBM TSS 2 stack:: Or with the Intel TSS 2 stack:: - #> tpm2_createprimary --hierarchy o -G rsa2048 -o key.ctxt + #> tpm2_createprimary --hierarchy o -G rsa2048 key.ctxt [...] - handle: 0x80FF - #> tpm2_evictcontrol -c key.ctxt -p 0x8101 + #> tpm2_evictcontrol -c key.ctxt 0x8101 persistentHandle: 0x8101 Usage:: @@ -115,7 +114,7 @@ append 'keyhandle=0x8101' to statements between quotes, such as :: -$ keyctl add trusted kmk "new 32" @u +$ keyctl add trusted kmk "new 32 keyhandle=0x8101" @u 440502848 $ keyctl show @@ -138,7 +137,7 @@ append 'keyhandle=0x8101' to statements between quotes, such as Load a trusted key from the saved blob:: -$ keyctl add trusted kmk "load `cat kmk.blob`" @u +$ keyctl add trusted kmk "load `cat kmk.blob` keyhandle=0x8101" @u 268728824 $ keyctl print 268728824 -- 2.26.2
[PATCH] drm/virtio: fix unblank
When going through a disable/enable cycle without changing the
framebuffer the optimization added by commit 3954ff10e06e ("drm/virtio:
skip set_scanout if framebuffer didn't change") causes the screen stay
blank. Add a bool to force an update to fix that.
Cc: 1882...@bugs.launchpad.net
Fixes: 3954ff10e06e ("drm/virtio: skip set_scanout if framebuffer didn't
change")
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_drv.h | 1 +
drivers/gpu/drm/virtio/virtgpu_display.c | 1 +
drivers/gpu/drm/virtio/virtgpu_plane.c | 4 +++-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h
b/drivers/gpu/drm/virtio/virtgpu_drv.h
index 9ff9f4ac0522..7b0c319f23c9 100644
--- a/drivers/gpu/drm/virtio/virtgpu_drv.h
+++ b/drivers/gpu/drm/virtio/virtgpu_drv.h
@@ -138,6 +138,7 @@ struct virtio_gpu_output {
int cur_x;
int cur_y;
bool enabled;
+ bool need_update;
};
#define drm_crtc_to_virtio_gpu_output(x) \
container_of(x, struct virtio_gpu_output, crtc)
diff --git a/drivers/gpu/drm/virtio/virtgpu_display.c
b/drivers/gpu/drm/virtio/virtgpu_display.c
index cc7fd957a307..378be5956b30 100644
--- a/drivers/gpu/drm/virtio/virtgpu_display.c
+++ b/drivers/gpu/drm/virtio/virtgpu_display.c
@@ -100,6 +100,7 @@ static void virtio_gpu_crtc_atomic_enable(struct drm_crtc
*crtc,
struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
output->enabled = true;
+ output->need_update = true;
}
static void virtio_gpu_crtc_atomic_disable(struct drm_crtc *crtc,
diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c
b/drivers/gpu/drm/virtio/virtgpu_plane.c
index 52d24179bcec..5948031a9ce8 100644
--- a/drivers/gpu/drm/virtio/virtgpu_plane.c
+++ b/drivers/gpu/drm/virtio/virtgpu_plane.c
@@ -163,7 +163,8 @@ static void virtio_gpu_primary_plane_update(struct
drm_plane *plane,
plane->state->src_w != old_state->src_w ||
plane->state->src_h != old_state->src_h ||
plane->state->src_x != old_state->src_x ||
- plane->state->src_y != old_state->src_y) {
+ plane->state->src_y != old_state->src_y ||
+ output->need_update) {
DRM_DEBUG("handle 0x%x, crtc %dx%d+%d+%d, src %dx%d+%d+%d\n",
bo->hw_res_handle,
plane->state->crtc_w, plane->state->crtc_h,
@@ -178,6 +179,7 @@ static void virtio_gpu_primary_plane_update(struct
drm_plane *plane,
plane->state->src_h >> 16,
plane->state->src_x >> 16,
plane->state->src_y >> 16);
+ output->need_update = false;
}
virtio_gpu_cmd_resource_flush(vgdev, bo->hw_res_handle,
--
2.18.4
Re: [PATCH v5 11/11] arm64: tegra: Add DT binding for AHUB components
On 19/07/2020 06:01, Sameer Pujar wrote:
> This patch adds few AHUB modules for Tegra210, Tegra186 and Tegra194.
> Bindings for following modules are added.
> * AHUB added as a child node under ACONNECT
> * AHUB includes many HW accelerators and below components are added
>as its children.
>* ADMAIF
>* I2S
>* DMIC
>* DSPK (added for Tegra186 and Tegra194 only, since Tegra210 does
> not have this module)
>
> Signed-off-by: Sameer Pujar
> ---
> arch/arm64/boot/dts/nvidia/tegra186.dtsi | 217 -
> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 225
> ++-
> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 140 +++
> 3 files changed, 580 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> index 34d249d..7869aec 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> @@ -85,7 +85,7 @@
> ranges = <0x0290 0x0 0x0290 0x20>;
> status = "disabled";
>
> - dma-controller@293 {
> + adma: dma-controller@293 {
> compatible = "nvidia,tegra186-adma";
> reg = <0x0293 0x2>;
> interrupt-parent = <>;
> @@ -140,6 +140,221 @@
> clock-names = "clk";
> status = "disabled";
> };
> +
> + tegra_ahub: ahub@2900800 {
> + compatible = "nvidia,tegra186-ahub";
> + reg = <0x02900800 0x800>;
> + clocks = < TEGRA186_CLK_AHUB>;
> + clock-names = "ahub";
> + assigned-clocks = < TEGRA186_CLK_AHUB>;
> + assigned-clock-parents = <
> TEGRA186_CLK_PLL_A_OUT0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x02900800 0x02900800 0x11800>;
> + status = "disabled";
> +
> + tegra_admaif: admaif@290f000 {
> + compatible = "nvidia,tegra186-admaif";
> + reg = <0x0290f000 0x1000>;
> + dmas = < 1>, < 1>,
> +< 2>, < 2>,
> +< 3>, < 3>,
> +< 4>, < 4>,
> +< 5>, < 5>,
> +< 6>, < 6>,
> +< 7>, < 7>,
> +< 8>, < 8>,
> +< 9>, < 9>,
> +< 10>, < 10>,
> +< 11>, < 11>,
> +< 12>, < 12>,
> +< 13>, < 13>,
> +< 14>, < 14>,
> +< 15>, < 15>,
> +< 16>, < 16>,
> +< 17>, < 17>,
> +< 18>, < 18>,
> +< 19>, < 19>,
> +< 20>, < 20>;
> + dma-names = "rx1", "tx1",
> + "rx2", "tx2",
> + "rx3", "tx3",
> + "rx4", "tx4",
> + "rx5", "tx5",
> + "rx6", "tx6",
> + "rx7", "tx7",
> + "rx8", "tx8",
> + "rx9", "tx9",
> + "rx10", "tx10",
> + "rx11", "tx11",
> + "rx12", "tx12",
> + "rx13", "tx13",
> + "rx14", "tx14",
> + "rx15", "tx15",
> + "rx16", "tx16",
> + "rx17", "tx17",
> + "rx18", "tx18",
> + "rx19", "tx19",
> + "rx20", "tx20";
> + status = "disabled";
> + };
> +
> + tegra_i2s1: i2s@2901000 {
> + compatible = "nvidia,tegra186-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901000 0x100>;
> + clocks = < TEGRA186_CLK_I2S1>,
> + < TEGRA186_CLK_I2S1_SYNC_INPUT>;
> +
Re: [RFC PATCH v2 6/6] sched/fair: Implement starvation monitor
On Fri, Aug 07, 2020 at 11:56:04AM +0200, Juri Lelli wrote: > Starting deadline server for lower priority classes right away when > first task is enqueued might break guarantees, as tasks belonging to > intermediate priority classes could be uselessly preempted. E.g., a well > behaving (non hog) FIFO task can be preempted by NORMAL tasks even if > there are still CPU cycles available for NORMAL tasks to run, as they'll > be running inside the fair deadline server for some period of time. > > To prevent this issue, implement a starvation monitor mechanism that > starts the deadline server only if a (fair in this case) task hasn't > been scheduled for some interval of time after it has been enqueued. > Use pick/put functions to manage starvation monitor status. One thing I considerd was scheduling this as a least-laxity entity -- such that it runs late, not early -- and start the server when rq->nr_running != rq->cfs.h_nr_running, IOW when there's !fair tasks around. Not saying we should do it like that, but that's perhaps more deterministic than this.
drivers/usb/cdns3/gadget.c:429 cdns3_free_aligned_request_buf() error: double unlocked 'priv_dev->lock' (orig line 421)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 86cfccb66937dd6cbf26ed619958b9e587e6a115
commit: 7733f6c32e36ff9d7adadf40001039bf219b1cbe usb: cdns3: Add Cadence USB3
DRD Driver
date: 11 months ago
config: parisc-randconfig-m031-20200807 (attached as .config)
compiler: hppa-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot
smatch warnings:
drivers/usb/cdns3/gadget.c:429 cdns3_free_aligned_request_buf() error: double
unlocked 'priv_dev->lock' (orig line 421)
vim +429 drivers/usb/cdns3/gadget.c
402
403 static void cdns3_free_aligned_request_buf(struct work_struct *work)
404 {
405 struct cdns3_device *priv_dev = container_of(work, struct
cdns3_device,
406 aligned_buf_wq);
407 struct cdns3_aligned_buf *buf, *tmp;
408 unsigned long flags;
409
410 spin_lock_irqsave(_dev->lock, flags);
411
412 list_for_each_entry_safe(buf, tmp, _dev->aligned_buf_list,
list) {
413 if (!buf->in_use) {
414 list_del(>list);
415
416 /*
417 * Re-enable interrupts to free DMA capable
memory.
418 * Driver can't free this memory with disabled
419 * interrupts.
420 */
> 421 spin_unlock_irqrestore(_dev->lock, flags);
422 dma_free_coherent(priv_dev->sysdev, buf->size,
423buf->buf, buf->dma);
424 kfree(buf);
425 spin_lock_irqsave(_dev->lock, flags);
426 }
427 }
428
> 429 spin_unlock_irqrestore(_dev->lock, flags);
430 }
431
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip
Re: [PATCH v5 10/11] arm64: tegra: Enable ACONNECT, ADMA and AGIC on Jetson Nano
On 19/07/2020 06:01, Sameer Pujar wrote:
> These devices are required for audio sub system and current patch
> ensures probe path of these devices gets tested. Later sound card
> support would be added which can use these devices at runtime.
>
> Signed-off-by: Sameer Pujar
> ---
> arch/arm64/boot/dts/nvidia/tegra210-p3450-.dts | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-.dts
> b/arch/arm64/boot/dts/nvidia/tegra210-p3450-.dts
> index 9b63469..0325fc0 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-.dts
> +++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-.dts
> @@ -806,4 +806,16 @@
>
> vin-supply = <_1v05_pll>;
> };
> +
> + aconnect@702c {
> + status = "okay";
> +
> + dma@702e2000 {
> + status = "okay";
> + };
> +
> + interrupt-controller@702f9000 {
> + status = "okay";
> + };
> + };
> };
>
Reviewed-by: Jon Hunter
Thanks!
Jon
--
nvpublic
Re: [PATCH] x86/paravirt: Add missing noinstr to arch_local*() helpers
On 07.08.20 11:50, Marco Elver wrote: On Fri, Aug 07, 2020 at 11:24AM +0200, Jürgen Groß wrote: On 07.08.20 11:01, Marco Elver wrote: On Thu, 6 Aug 2020 at 18:06, Marco Elver wrote: On Thu, 6 Aug 2020 at 15:17, Marco Elver wrote: On Thu, Aug 06, 2020 at 01:32PM +0200, pet...@infradead.org wrote: On Thu, Aug 06, 2020 at 09:47:23AM +0200, Marco Elver wrote: Testing my hypothesis that raw then nested non-raw local_irq_save/restore() breaks IRQ state tracking -- see the reproducer below. This is at least 1 case I can think of that we're bound to hit. ... /me goes ponder things... How's something like this then? --- include/linux/sched.h | 3 --- kernel/kcsan/core.c | 62 --- 2 files changed, 44 insertions(+), 21 deletions(-) Thank you! That approach seems to pass syzbot (also with CONFIG_PARAVIRT) and kcsan-test tests. I had to modify it some, so that report.c's use of the restore logic works and not mess up the IRQ trace printed on KCSAN reports (with CONFIG_KCSAN_VERBOSE). I still need to fully convince myself all is well now and we don't end up with more fixes. :-) If it passes further testing, I'll send it as a real patch (I want to add you as Co-developed-by, but would need your Signed-off-by for the code you pasted, I think.) I let it run on syzbot through the night, and it's fine without PARAVIRT (see below). I have sent the patch (need your Signed-off-by as it's based on your code, thank you!): https://lkml.kernel.org/r/20200807090031.3506555-1-el...@google.com With CONFIG_PARAVIRT=y (without the notrace->noinstr patch), I still get lockdep DEBUG_LOCKS_WARN_ON(!lockdep_hardirqs_enabled()), although it takes longer for syzbot to hit them. But I think that's expected because we can still get the recursion that I pointed out, and will need that patch. Never mind, I get these warnings even if I don't turn on KCSAN (CONFIG_KCSAN=n). Something else is going on with PARAVIRT=y that throws off IRQ state tracking. :-/ What are the settings of CONFIG_PARAVIRT_XXL and CONFIG_PARAVIRT_SPINLOCKS in this case? I attached a config. $> grep PARAVIRT .config CONFIG_PARAVIRT=y CONFIG_PARAVIRT_XXL=y # CONFIG_PARAVIRT_DEBUG is not set CONFIG_PARAVIRT_SPINLOCKS=y # CONFIG_PARAVIRT_TIME_ACCOUNTING is not set CONFIG_PARAVIRT_CLOCK=y Anything special I need to do to reproduce the problem? Or would you be willing to do some more rounds with different config settings? I think CONFIG_PARAVIRT_XXL shouldn't matter, but I'm not completely sure about that. CONFIG_PARAVIRT_SPINLOCKS would be my primary suspect. Juergen
splice: infinite busy loop lockup bug
syzbot is reporting hung task at pipe_release() [1], for for_each_bvec() from
iterate_bvec() from iterate_all_kinds() from iov_iter_alignment() from
ext4_unaligned_io() from ext4_dio_write_iter() from ext4_file_write_iter() from
call_write_iter() from do_iter_readv_writev() from do_iter_write() from
vfs_iter_write() from iter_file_splice_write() falls into infinite busy loop
with pipe->mutex held.
The reason of falling into infinite busy loop is that iter_file_splice_write()
for some reason generates "struct bio_vec" entry with .bv_len=0 and .bv_offset=0
while for_each_bvec() cannot handle .bv_len == 0.
--- a/fs/splice.c
+++ b/fs/splice.c
@@ -747,6 +747,14 @@ iter_file_splice_write(struct pipe_inode_info *pipe,
struct file *out,
}
iov_iter_bvec(, WRITE, array, n, sd.total_len - left);
+ if (!strncmp(current->comm, "syz-executor", 12)) {
+ int i;
+ printk("Starting vfs_write_iter from.type=%d
from.iov_offset=%zu from.count=%zu n=%u sd.total_len=%zu left=%zu\n",
+ from.type, from.iov_offset, from.count, n,
sd.total_len, left);
+ for (i = 0; i < n; i++)
+ printk(" array[%u]: bv_page=%px bv_len=%u
bv_offset=%u\n",
+ i, array[i].bv_page, array[i].bv_len,
array[i].bv_offset);
+ }
ret = vfs_iter_write(out, , , 0);
if (ret <= 0)
break;
When splice() from pipe to file works.
[ 31.704915][ T6552] Starting vfs_write_iter from.type=17 from.iov_offset=0
from.count=4096 n=1 sd.total_len=65504 left=61408
[ 31.709098][ T6552] array[0]: bv_page=ea000870a7c0 bv_len=4096
bv_offset=0
When splice() from pipe to file falls into infinite busy loop.
[ 31.717178][ T6553] Starting vfs_write_iter from.type=17 from.iov_offset=0
from.count=4096 n=2 sd.total_len=65504 left=61408
[ 31.720983][ T6553] array[0]: bv_page=ea0008706680 bv_len=0 bv_offset=0
[ 31.723565][ T6553] array[1]: bv_page=ea00086f4e80 bv_len=4096
bv_offset=0
Is it normal behavior that an empty page is linked to pipe's array?
If yes, don't we need to skip empty pages when iter_file_splice_write() fills
in "struct bio_vec *array" ?
[1]
https://syzkaller.appspot.com/bug?id=2ccac875e85dc852911a0b5b788ada82dc0a081e
Re: [PATCH 2/2 resend] iio:temperature:mlx90632: Adding extended calibration option
On Fri, Aug 7, 2020 at 12:21 PM Crt Mori wrote:
Oh yeah, you are right, there will be some comments :-)
> For some time market wants medical grade accuracy in medical range,
the market
> while still retaining the declared accuracy outside of the medical range
> within the same sensor. That is why we created extended calibration
> which is automatically switched to when object temperature is too high.
>
> This patch also introduces the object_ambient_temperature variable which
> is needed for more accurate calculation of the object infra-red
> footprint as sensor's ambient temperature might be totally different
> than what the ambient temperature is at object and that is why we can
> have some more error which can be eliminated. Currently this temperature
errors
> is fixed at 25, but interface to adjust it by user (with external sensor
the interface
> or just IR measurement of the another object which acts as ambient),
'of another' or 'the other' if we know what it is exactly.
> will be introduced in another commit.
...
> struct mlx90632_data {
> struct i2c_client *client;
> struct mutex lock; /* Multiple reads for single measurement */
> struct regmap *regmap;
> u16 emissivity;
> + u8 mtyp; /* measurement type - to enable extended range calculations
> */
Perhaps better to switch this struct to follow kernel doc in one of
preparatory patches and add the description of this field accordingly.
> + u32 object_ambient_temperature;
> };
...
> +static int mlx90632_set_meas_type(struct regmap *regmap, u8 type)
> +{
> + int ret;
> +
> + if ((type != MLX90632_MTYP_MEDICAL) & (type !=
> MLX90632_MTYP_EXTENDED))
> + return -EINVAL;
Not sure I understand the point of & vs. && here.
> + ret = regmap_write(regmap, MLX90632_REG_I2C_CMD, MLX90632_RESET_CMD);
> + if (ret < 0)
> + return ret;
> +
> + ret = regmap_write_bits(regmap, MLX90632_REG_CONTROL,
> +(MLX90632_CFG_MTYP_MASK |
> MLX90632_CFG_PWR_MASK),
> +(MLX90632_MTYP_STATUS(type) |
> MLX90632_PWR_STATUS_HALT));
> + if (ret < 0)
> + return ret;
> +
> + mlx90632_pwr_continuous(regmap);
> +
> + return ret;
Since you are using ' < 0' above and below (and I think it doesn't
worth it, i.o.w. you may drop them) here is something interesting
might be returned (actually not, see first part of this sentence).
Should be
return 0;
> +}
...
> +static int mlx90632_read_ambient_raw_extended(struct regmap *regmap,
> + s16 *ambient_new_raw, s16
> *ambient_old_raw)
> +{
> + int ret;
> + unsigned int read_tmp;
Please keep them in reversed xmas tree format.
> +
> + ret = regmap_read(regmap, MLX90632_RAM_3(17), _tmp);
> + if (ret < 0)
> + return ret;
> + *ambient_new_raw = (s16)read_tmp;
> +
> + ret = regmap_read(regmap, MLX90632_RAM_3(18), _tmp);
> + if (ret < 0)
> + return ret;
> + *ambient_old_raw = (s16)read_tmp;
> + return ret;
Same comments as per previous function.
> +}
> +static int mlx90632_read_object_raw_extended(struct regmap *regmap, s16
> *object_new_raw)
> +{
> + int ret;
> + unsigned int read_tmp;
> + s32 read;
Besides all above comments being applicable here...
> + ret = regmap_read(regmap, MLX90632_RAM_1(17), _tmp);
> + if (ret < 0)
> + return ret;
> + read = (s16)read_tmp;
> +
> + ret = regmap_read(regmap, MLX90632_RAM_2(17), _tmp);
> + if (ret < 0)
> + return ret;
> + read = read - (s16)read_tmp;
...I'm wondering if you can use bulk reads of those registers.
Also I'm not sure you need explicit castings.
> + ret = regmap_read(regmap, MLX90632_RAM_1(18), _tmp);
> + if (ret < 0)
> + return ret;
> + read = read - (s16)read_tmp;
> +
> + ret = regmap_read(regmap, MLX90632_RAM_2(18), _tmp);
> + if (ret < 0)
> + return ret;
> + read = (read + (s16)read_tmp) / 2;
Ditto.
> + ret = regmap_read(regmap, MLX90632_RAM_1(19), _tmp);
> + if (ret < 0)
> + return ret;
> + read = read + (s16)read_tmp;
> +
> + ret = regmap_read(regmap, MLX90632_RAM_2(19), _tmp);
> + if (ret < 0)
> + return ret;
> + read = read + (s16)read_tmp;
> + if (read > 32767 || read < -32768)
These are defined as S16_MIN and S16_MAX. Use limits.h.
> + return -EINVAL;
-ERANGE
> + *object_new_raw = (int16_t)read;
Oh, no. Please avoid user space types in the kernel. And what's the
point anyway after checking the range?
> + return ret;
> +}
...
> +static int mlx90632_read_all_channel_extended(struct mlx90632_data *data,
> s16 *object_new_raw,
> + s16
[PATCH v6 0/6] PCI: uniphier: Add features for UniPhier PCIe host controller
This series adds some features for UniPhier PCIe host controller. - Add support for PME and AER invoked by MSI interrupt - Add iATU register view support for PCIe version >= 4.80 - Add an error message when failing to get phy driver This adds a new function called by MSI handler in DesignWare PCIe framework, that invokes PME and AER funcions to detect the factor from SoC-dependent registers. Changes since v5: - Add pcie_port_service_get_irq() function to pcie/portdrv - Call pcie_port_service_get_irq() to get vIRQ interrupt number for PME/AER - Rebase to the latest linux-next branch, and remove devm_platform_ioremap_resource_byname() replacement patch Changes since v4: - Add Acked-by: line to dwc patch Changes since v3: - Move msi_host_isr() call into dw_handle_msi_irq() - Move uniphier_pcie_misc_isr() call into the guard of chained_irq - Use a bool argument is_msi instead of pci_msi_enabled() - Consolidate handler calls for the same interrupt - Fix typos in commit messages Changes since v2: - Avoid printing phy error message in case of EPROBE_DEFER - Fix iATU register mapping method - dt-bindings: Add Acked-by: line - Fix typos in commit messages - Use devm_platform_ioremap_resource_byname() Changes since v1: - Add check if struct resource is NULL - Fix warning in the type of dev_err() argument Kunihiko Hayashi (6): PCI: portdrv: Add pcie_port_service_get_irq() function PCI: dwc: Add msi_host_isr() callback PCI: uniphier: Add misc interrupt handler to invoke PME and AER dt-bindings: PCI: uniphier: Add iATU register description PCI: uniphier: Add iATU register support PCI: uniphier: Add error message when failed to get phy .../devicetree/bindings/pci/uniphier-pcie.txt | 1 + drivers/pci/controller/dwc/pcie-designware-host.c | 3 + drivers/pci/controller/dwc/pcie-designware.h | 1 + drivers/pci/controller/dwc/pcie-uniphier.c | 90 ++ drivers/pci/pcie/portdrv.h | 1 + drivers/pci/pcie/portdrv_core.c| 16 6 files changed, 99 insertions(+), 13 deletions(-) -- 2.7.4
[PATCH v6 3/6] PCI: uniphier: Add misc interrupt handler to invoke PME and AER
This patch adds misc interrupt handler to detect and invoke PME/AER event.
In UniPhier PCIe controller, PME/AER signals are assigned to the same
signal as MSI by the internal logic. These signals should be detected by
the internal register, however, DWC MSI handler can't handle these signals.
DWC MSI handler calls .msi_host_isr() callback function, that detects
PME/AER signals with the internal register and invokes the interrupt
with PME/AER vIRQ numbers.
These vIRQ numbers is obtained from portdrv in uniphier_add_pcie_port()
function.
Cc: Marc Zyngier
Cc: Jingoo Han
Cc: Gustavo Pimentel
Cc: Lorenzo Pieralisi
Signed-off-by: Kunihiko Hayashi
---
drivers/pci/controller/dwc/pcie-uniphier.c | 77 +-
1 file changed, 66 insertions(+), 11 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-uniphier.c
b/drivers/pci/controller/dwc/pcie-uniphier.c
index 3a7f403..55a7166 100644
--- a/drivers/pci/controller/dwc/pcie-uniphier.c
+++ b/drivers/pci/controller/dwc/pcie-uniphier.c
@@ -21,6 +21,7 @@
#include
#include "pcie-designware.h"
+#include "../../pcie/portdrv.h"
#define PCL_PINCTRL0 0x002c
#define PCL_PERST_PLDN_REGEN BIT(12)
@@ -44,7 +45,9 @@
#define PCL_SYS_AUX_PWR_DETBIT(8)
#define PCL_RCV_INT0x8108
+#define PCL_RCV_INT_ALL_INT_MASK GENMASK(28, 25)
#define PCL_RCV_INT_ALL_ENABLE GENMASK(20, 17)
+#define PCL_RCV_INT_ALL_MSI_MASK GENMASK(12, 9)
#define PCL_CFG_BW_MGT_STATUS BIT(4)
#define PCL_CFG_LINK_AUTO_BW_STATUSBIT(3)
#define PCL_CFG_AER_RC_ERR_MSI_STATUS BIT(2)
@@ -68,6 +71,8 @@ struct uniphier_pcie_priv {
struct reset_control *rst;
struct phy *phy;
struct irq_domain *legacy_irq_domain;
+ int aer_irq;
+ int pme_irq;
};
#define to_uniphier_pcie(x)dev_get_drvdata((x)->dev)
@@ -167,7 +172,15 @@ static void uniphier_pcie_stop_link(struct dw_pcie *pci)
static void uniphier_pcie_irq_enable(struct uniphier_pcie_priv *priv)
{
- writel(PCL_RCV_INT_ALL_ENABLE, priv->base + PCL_RCV_INT);
+ u32 val;
+
+ val = PCL_RCV_INT_ALL_ENABLE;
+ if (pci_msi_enabled())
+ val |= PCL_RCV_INT_ALL_INT_MASK;
+ else
+ val |= PCL_RCV_INT_ALL_MSI_MASK;
+
+ writel(val, priv->base + PCL_RCV_INT);
writel(PCL_RCV_INTX_ALL_ENABLE, priv->base + PCL_RCV_INTX);
}
@@ -231,28 +244,52 @@ static const struct irq_domain_ops
uniphier_intx_domain_ops = {
.map = uniphier_pcie_intx_map,
};
-static void uniphier_pcie_irq_handler(struct irq_desc *desc)
+static void uniphier_pcie_misc_isr(struct pcie_port *pp, bool is_msi)
{
- struct pcie_port *pp = irq_desc_get_handler_data(desc);
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
struct uniphier_pcie_priv *priv = to_uniphier_pcie(pci);
- struct irq_chip *chip = irq_desc_get_chip(desc);
- unsigned long reg;
- u32 val, bit, virq;
+ u32 val;
- /* INT for debug */
val = readl(priv->base + PCL_RCV_INT);
if (val & PCL_CFG_BW_MGT_STATUS)
dev_dbg(pci->dev, "Link Bandwidth Management Event\n");
+
if (val & PCL_CFG_LINK_AUTO_BW_STATUS)
dev_dbg(pci->dev, "Link Autonomous Bandwidth Event\n");
- if (val & PCL_CFG_AER_RC_ERR_MSI_STATUS)
- dev_dbg(pci->dev, "Root Error\n");
- if (val & PCL_CFG_PME_MSI_STATUS)
- dev_dbg(pci->dev, "PME Interrupt\n");
+
+ if (is_msi) {
+ if (val & PCL_CFG_AER_RC_ERR_MSI_STATUS) {
+ dev_dbg(pci->dev, "Root Error Status\n");
+ if (priv->aer_irq)
+ generic_handle_irq(priv->aer_irq);
+ }
+
+ if (val & PCL_CFG_PME_MSI_STATUS) {
+ dev_dbg(pci->dev, "PME Interrupt\n");
+ if (priv->pme_irq)
+ generic_handle_irq(priv->pme_irq);
+ }
+ }
writel(val, priv->base + PCL_RCV_INT);
+}
+
+static void uniphier_pcie_msi_host_isr(struct pcie_port *pp)
+{
+ uniphier_pcie_misc_isr(pp, true);
+}
+
+static void uniphier_pcie_irq_handler(struct irq_desc *desc)
+{
+ struct pcie_port *pp = irq_desc_get_handler_data(desc);
+ struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+ struct uniphier_pcie_priv *priv = to_uniphier_pcie(pci);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned long reg;
+ u32 val, bit, virq;
+
+ uniphier_pcie_misc_isr(pp, false);
/* INTx */
chained_irq_enter(chip, desc);
@@ -330,6 +367,7 @@ static int uniphier_pcie_host_init(struct pcie_port *pp)
static const struct dw_pcie_host_ops uniphier_pcie_host_ops = {
.host_init = uniphier_pcie_host_init,
+ .msi_host_isr = uniphier_pcie_msi_host_isr,
};
static int uniphier_add_pcie_port(struct uniphier_pcie_priv
[PATCH v6 5/6] PCI: uniphier: Add iATU register support
This gets iATU register area from reg property. In Synopsys DWC version 4.80 or later, since iATU register area is separated from core register area, this area is necessary to get from DT independently. Signed-off-by: Kunihiko Hayashi --- drivers/pci/controller/dwc/pcie-uniphier.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-uniphier.c b/drivers/pci/controller/dwc/pcie-uniphier.c index 55a7166..93ef608 100644 --- a/drivers/pci/controller/dwc/pcie-uniphier.c +++ b/drivers/pci/controller/dwc/pcie-uniphier.c @@ -471,6 +471,11 @@ static int uniphier_pcie_probe(struct platform_device *pdev) if (IS_ERR(priv->pci.dbi_base)) return PTR_ERR(priv->pci.dbi_base); + priv->pci.atu_base = + devm_platform_ioremap_resource_byname(pdev, "atu"); + if (IS_ERR(priv->pci.atu_base)) + priv->pci.atu_base = NULL; + priv->base = devm_platform_ioremap_resource_byname(pdev, "link"); if (IS_ERR(priv->base)) return PTR_ERR(priv->base); -- 2.7.4
[PATCH v6 1/6] PCI: portdrv: Add pcie_port_service_get_irq() function
Add pcie_port_service_get_irq() that returns the virtual IRQ number
for specified portdrv service.
Cc: Lorenzo Pieralisi
Signed-off-by: Kunihiko Hayashi
---
drivers/pci/pcie/portdrv.h | 1 +
drivers/pci/pcie/portdrv_core.c | 16
2 files changed, 17 insertions(+)
diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h
index af7cf23..e256456 100644
--- a/drivers/pci/pcie/portdrv.h
+++ b/drivers/pci/pcie/portdrv.h
@@ -150,4 +150,5 @@ static inline void pcie_pme_interrupt_enable(struct pci_dev
*dev, bool en) {}
#endif /* !CONFIG_PCIE_PME */
struct device *pcie_port_find_device(struct pci_dev *dev, u32 service);
+int pcie_port_service_get_irq(struct pci_dev *dev, u32 service);
#endif /* _PORTDRV_H_ */
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 50a9522..f92daf8 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -480,6 +480,22 @@ struct device *pcie_port_find_device(struct pci_dev *dev,
}
EXPORT_SYMBOL_GPL(pcie_port_find_device);
+/*
+ * pcie_port_service_get_irq - get irq of the service
+ * @dev: PCI Express port the service is associated with
+ * @service: For the service to find
+ *
+ * Get irq number associated with given service on a pci_dev
+ */
+int pcie_port_service_get_irq(struct pci_dev *dev, u32 service)
+{
+ struct pcie_device *pciedev;
+
+ pciedev = to_pcie_device(pcie_port_find_device(dev, service));
+
+ return pciedev->irq;
+}
+
/**
* pcie_port_device_remove - unregister PCI Express port service devices
* @dev: PCI Express port the service devices to unregister are associated with
--
2.7.4
[PATCH v6 4/6] dt-bindings: PCI: uniphier: Add iATU register description
In the dt-bindings, "atu" reg-names is required to get the register space for iATU in Synopsys DWC version 4.80 or later. Signed-off-by: Kunihiko Hayashi Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/uniphier-pcie.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt index 1fa2c59..c4b7381 100644 --- a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt +++ b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt @@ -16,6 +16,7 @@ Required properties: "dbi"- controller configuration registers "link" - SoC-specific glue layer registers "config" - PCIe configuration space +"atu"- iATU registers for DWC version 4.80 or later - clocks: A phandle to the clock gate for PCIe glue layer including the host controller. - resets: A phandle to the reset line for PCIe glue layer including -- 2.7.4
[PATCH v6 6/6] PCI: uniphier: Add error message when failed to get phy
Even if phy driver doesn't probe, the error message can't be distinguished
from other errors. This displays error message caused by the phy driver
explicitly.
Signed-off-by: Kunihiko Hayashi
---
drivers/pci/controller/dwc/pcie-uniphier.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-uniphier.c
b/drivers/pci/controller/dwc/pcie-uniphier.c
index 93ef608..7c8721e 100644
--- a/drivers/pci/controller/dwc/pcie-uniphier.c
+++ b/drivers/pci/controller/dwc/pcie-uniphier.c
@@ -489,8 +489,12 @@ static int uniphier_pcie_probe(struct platform_device
*pdev)
return PTR_ERR(priv->rst);
priv->phy = devm_phy_optional_get(dev, "pcie-phy");
- if (IS_ERR(priv->phy))
- return PTR_ERR(priv->phy);
+ if (IS_ERR(priv->phy)) {
+ ret = PTR_ERR(priv->phy);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get phy (%d)\n", ret);
+ return ret;
+ }
platform_set_drvdata(pdev, priv);
--
2.7.4
[PATCH v6 2/6] PCI: dwc: Add msi_host_isr() callback
This adds msi_host_isr() callback function support to describe
SoC-dependent service triggered by MSI.
For example, when AER interrupt is triggered by MSI, the callback function
reads SoC-dependent registers and detects that the interrupt is from AER,
and invoke AER interrupts related to MSI.
Cc: Marc Zyngier
Cc: Jingoo Han
Cc: Gustavo Pimentel
Signed-off-by: Kunihiko Hayashi
Acked-by: Gustavo Pimentel
---
drivers/pci/controller/dwc/pcie-designware-host.c | 3 +++
drivers/pci/controller/dwc/pcie-designware.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c
b/drivers/pci/controller/dwc/pcie-designware-host.c
index 9dafecb..7948bf1 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -83,6 +83,9 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp)
u32 status, num_ctrls;
irqreturn_t ret = IRQ_NONE;
+ if (pp->ops->msi_host_isr)
+ pp->ops->msi_host_isr(pp);
+
num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
for (i = 0; i < num_ctrls; i++) {
diff --git a/drivers/pci/controller/dwc/pcie-designware.h
b/drivers/pci/controller/dwc/pcie-designware.h
index f911760..401cbd9 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -170,6 +170,7 @@ struct dw_pcie_host_ops {
void (*scan_bus)(struct pcie_port *pp);
void (*set_num_vectors)(struct pcie_port *pp);
int (*msi_host_init)(struct pcie_port *pp);
+ void (*msi_host_isr)(struct pcie_port *pp);
};
struct pcie_port {
--
2.7.4
Re: [PATCH v7 06/13] pwm: add support for sl28cpld PWM controller
Hi Michael,
On Fri, Aug 07, 2020 at 09:55:19AM +0200, Michael Walle wrote:
> Am 2020-08-07 09:45, schrieb Uwe Kleine-König:
> > On Fri, Aug 07, 2020 at 09:28:31AM +0200, Michael Walle wrote:
> > > Am 2020-08-06 10:40, schrieb Uwe Kleine-König:
> > > > On Mon, Aug 03, 2020 at 11:35:52AM +0200, Michael Walle wrote:
> > > > > +static void sl28cpld_pwm_get_state(struct pwm_chip *chip,
> > > > > +struct pwm_device *pwm,
> > > > > +struct pwm_state *state)
> > > > > +{
> > > > > + struct sl28cpld_pwm *priv = dev_get_drvdata(chip->dev);
> > > > > + unsigned int reg;
> > > > > + int prescaler;
> > > > > +
> > > > > + sl28cpld_pwm_read(priv, SL28CPLD_PWM_CTRL, );
> > > > > +
> > > > > + state->enabled = reg & SL28CPLD_PWM_CTRL_ENABLE;
> > > > > +
> > > > > + prescaler = FIELD_GET(SL28CPLD_PWM_CTRL_PRESCALER_MASK, reg);
> > > > > + state->period = SL28CPLD_PWM_PERIOD(prescaler);
> > > > > +
> > > > > + sl28cpld_pwm_read(priv, SL28CPLD_PWM_CYCLE, );
> > > > > + state->duty_cycle = SL28CPLD_PWM_TO_DUTY_CYCLE(reg);
> > > >
> > > > Should reg be masked to SL28CPLD_PWM_CYCLE_MAX, or is it guaranteed that
> > > > the upper bits are zero?
> > >
> > > Mh, the hardware guarantees that bit7 is zero. So masking with
> > > SL28CPLD_PWM_CYCLE_MAX won't buy us much. But what I could think
> > > could go wrong is this: someone set the prescaler to != 0 and the
> > > duty cycle to a value greater than the max value for this particular
> > > prescaler mode. For the above calculations this would result in a
> > > duty_cycle greater than the period, if I'm not mistaken.
> > >
> > > The behavior of the hardware is undefined in that case (at the moment
> > > it will be always on, I guess). So this isn't a valid setting.
> > > Nevertheless it might happen. So what about the following:
> > >
> > > state->duty_cycle = min(state->duty_cycle, state->period);
> >
> > If you care about this: This can also happen (at least shortly) in
> > sl28cpld_pwm_apply() as you write SL28CPLD_PWM_CTRL before
> > SL28CPLD_PWM_CYCLE there.
>
> It could also happen if it was the other way around, couldn't it?
> Changing modes might glitch.
If you want to prevent this, you have to order the writes depending on
prescaler increasing or decreasing.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König|
Industrial Linux Solutions | https://www.pengutronix.de/ |
signature.asc
Description: PGP signature
Re: [PATCH v3 4/7] x86/paravirt: remove 32-bit support from PARAVIRT_XXL
On Fri, Aug 07, 2020 at 12:02:59PM +0200, Jürgen Groß wrote:
> On 07.08.20 11:39, pet...@infradead.org wrote:
> > On Fri, Aug 07, 2020 at 10:38:23AM +0200, Juergen Gross wrote:
> >
> > > -# else
> > > - const unsigned char cpu_iret[1];
> > > -# endif
> > > };
> > > static const struct patch_xxl patch_data_xxl = {
> > > @@ -42,7 +38,6 @@ static const struct patch_xxl patch_data_xxl = {
> > > .irq_save_fl= { 0x9c, 0x58 }, // pushf; pop
> > > %[re]ax
> > > .mmu_read_cr2 = { 0x0f, 0x20, 0xd0 }, // mov %cr2,
> > > %[re]ax
> > > .mmu_read_cr3 = { 0x0f, 0x20, 0xd8 }, // mov %cr3,
> > > %[re]ax
> > > -# ifdef CONFIG_X86_64
> > > .mmu_write_cr3 = { 0x0f, 0x22, 0xdf }, // mov %rdi,
> > > %cr3
> > > .irq_restore_fl = { 0x57, 0x9d }, // push %rdi;
> > > popfq
> > > .cpu_wbinvd = { 0x0f, 0x09 }, // wbinvd
> > > @@ -50,19 +45,11 @@ static const struct patch_xxl patch_data_xxl = {
> > > 0x48, 0x0f, 0x07 }, // swapgs;
> > > sysretq
> > > .cpu_swapgs = { 0x0f, 0x01, 0xf8 }, // swapgs
> > > .mov64 = { 0x48, 0x89, 0xf8 }, // mov %rdi,
> > > %rax
> > > -# else
> > > - .mmu_write_cr3 = { 0x0f, 0x22, 0xd8 }, // mov %eax, %cr3
> > > - .irq_restore_fl = { 0x50, 0x9d }, // push %eax; popf
> > > - .cpu_iret = { 0xcf }, // iret
> > > -# endif
> >
> > I was looking at x86_64 paravirt the other day and found we actually
> > have pv_ops.cpu.iret users there..
>
> On x86_64 we have (without PARAVIRT_XXL):
>
> #define INTERRUPT_RETURNjmp native_iret
>
> and with PARAVIRT_XXL this is basically a jmp *pv_ops.cpu.iret which
> will then be patched to either jmp native_iret or jmp xen_iret.
Ah, okay. Clearly I didn't look hard enough. Thanks!
[PATCH] powerpc:entry_32: correct the path and function name in the comment
Update the comment for file's directory and function name changed.
Fixes: facd04a904ff ("powerpc: convert to copy_thread_tls")
Fixes: 14cf11af6cf6 ("powerpc: Merge enough to start building in arch/powerpc.")
Signed-off-by: chenzefeng
---
arch/powerpc/kernel/entry_32.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 8420abd4ea1c..9937593d3a33 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -696,8 +696,8 @@ handle_dabr_fault:
* to the "_switch" path. If you change this , you'll have to
* change the fork code also.
*
- * The code which creates the new task context is in 'copy_thread'
- * in arch/ppc/kernel/process.c
+ * The code which creates the new task context is in 'copy_thread_tls'
+ * in arch/powerpc/kernel/process.c
*/
_GLOBAL(_switch)
stwur1,-INT_FRAME_SIZE(r1)
--
2.12.3
Re: [PATCH] arm64: kaslr: Use standard early random function
Hi Guenter,
On Thu, Aug 06, 2020 at 05:49:04PM -0700, Guenter Roeck wrote:
> Commit 585524081ecd ("random: random.h should include archrandom.h, not
> the other way around") tries to fix a problem with recursive inclusion
> of linux/random.h and arch/archrandom.h for arm64. Unfortunately, this
> results in the following compile error if ARCH_RANDOM is disabled.
>
> arch/arm64/kernel/kaslr.c: In function 'kaslr_early_init':
> arch/arm64/kernel/kaslr.c:128:6: error: implicit declaration of function
> '__early_cpu_has_rndr'; did you mean '__early_pfn_to_nid'?
> [-Werror=implicit-function-declaration]
> if (__early_cpu_has_rndr()) {
> ^~~~
> __early_pfn_to_nid
> arch/arm64/kernel/kaslr.c:131:7: error: implicit declaration of function
> '__arm64_rndr' [-Werror=implicit-function-declaration]
>if (__arm64_rndr())
>^~~~
>
> Problem is that arch/archrandom.h is only included from linux/random.h if
> ARCH_RANDOM is enabled. If not, __arm64_rndr() and __early_cpu_has_rndr()
> are undeclared, causing the problem.
>
> Use arch_get_random_seed_long_early() instead of arm64 specific functions
> to solve the problem. As a side effect of this change, the code no longer
> bypasses ARCH_RANDOM, which I consider desirable (after all, ARCH_RANDOM
> was disabled for a reason).
There's no bypass of ARCH_RANDOM; the bits KASLR depends on are empty
stubs when ARCH_RANDOM is not selected. I added the common early
functions after this code was written.
> Reported-by: Qian Cai
> Fixes: 585524081ecd ("random: random.h should include archrandom.h, not the
> other way around")
This is where things broke; there was no need to change kaslr.c's
include of , since kaslr.c only depends on the RNDR
bits defined there./
> Fixes: 2e8e1ea88cbc ("arm64: Use v8.5-RNG entropy for KASLR seed")
I don't think this tag is necessary; this commit built and worked fine,
and there wasn't any ARCH_RANDOM bypass to speak of.
> Cc: Qian Cai
> Cc: Mark Brown
> Signed-off-by: Guenter Roeck
This patch itself looks fine, but as above I think the commit message is
misleading w.r.t. bypassing ARCH_RANDOM, and the second fixes tag isn't
necessary.
With those bits gone:
Reviewed-by: Mark Rutland
Mark.
> ---
> arch/arm64/kernel/kaslr.c | 12 +---
> 1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/kernel/kaslr.c b/arch/arm64/kernel/kaslr.c
> index 9ded4237e1c1..b181e0544b79 100644
> --- a/arch/arm64/kernel/kaslr.c
> +++ b/arch/arm64/kernel/kaslr.c
> @@ -84,6 +84,7 @@ u64 __init kaslr_early_init(u64 dt_phys)
> void *fdt;
> u64 seed, offset, mask, module_range;
> const u8 *cmdline, *str;
> + unsigned long raw;
> int size;
>
> /*
> @@ -122,15 +123,12 @@ u64 __init kaslr_early_init(u64 dt_phys)
> }
>
> /*
> - * Mix in any entropy obtainable architecturally, open coded
> - * since this runs extremely early.
> + * Mix in any entropy obtainable architecturally if enabled
> + * and supported.
>*/
> - if (__early_cpu_has_rndr()) {
> - unsigned long raw;
>
> - if (__arm64_rndr())
> - seed ^= raw;
> - }
> + if (arch_get_random_seed_long_early())
> + seed ^= raw;
>
> if (!seed) {
> kaslr_status = KASLR_DISABLED_NO_SEED;
> --
> 2.17.1
>
Re: [PATCH 9/9] mfd: mt6360: Merge different sub-devices I2C read/write
Mark Brown 於 2020年8月6日 週四 下午8:13寫道： > > On Thu, Aug 06, 2020 at 11:30:56AM +0800, Gene Chen wrote: > > Mark Brown 於 2020年8月6日 週四 上午12:10寫道： > > > > It's not clear why this isn't just done in the device regmap, there's > > > exactly one user? > > > because I use one regmap to access 4 I2C devices, > > There appears to be only one device here? > > > I need change the regmap_bus struct to fit I2C read/write with CRC bit > > Therefore, MFD reviewer suggests I can move the regmap api to regmap > > folder such as regmap-ac97.c > > AC'97 is an industry standard bus used by a range of devices in > different subsystems. You can already have custom operations for a > device just in a regular regmap using the reg_read() and reg_write() > operations which are there so devices that individual device support > doesn't need to be added to the regmap core. > I need use regmap_raw_read to access MT6360 TYPEC part, so we need implement bus read control > You really also need to write a much clearer changelog, I would be hard > pressed to tell from the changelog that this was moving things to the > regmap core rather than shuffling regmaps within the device. MT6360 has 4 I2C worker devices First, I increase reg_bits from 8 to 16 bits. Higher 8 bits, bank, indicated which worker device I want access Then, if worker devices is PMIC or LDO part, I need calculate or check CRC8 bits when we write or read data. CRC8 bits is calculated by 3 parts. 1'st part include 1 byte is worker address and R/W in LSB. 2'nd part include 1 byte is register address 3'nd part include written data or read data from MT6360 I also need 1 dummy byte when write data @Lee Jones, I found out drivers/iio/chemical/bme680_spi.c implement their own regmap_bus too. Can I move regmap control back to mt6360-core.c?
[PATCH v1 1/7] phy: cadence-torrent: Use of_device_get_match_data() to get driver data
Use of_device_get_match_data() to get driver data instead of boilerplate
code.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index af81707ff0c6..50c30d49300e 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -183,8 +183,6 @@ static const struct reg_field phy_pma_pll_raw_ctrl =
static const struct reg_field phy_reset_ctrl =
REG_FIELD(PHY_RESET, 8, 8);
-static const struct of_device_id cdns_torrent_phy_of_match[];
-
struct cdns_torrent_inst {
struct phy *phy;
u32 mlane;
@@ -203,6 +201,7 @@ struct cdns_torrent_phy {
unsigned long ref_clk_rate;
struct cdns_torrent_inst phys[MAX_NUM_LANES];
int nsubnodes;
+ const struct cdns_torrent_data *init_data;
struct regmap *regmap;
struct regmap *regmap_common_cdb;
struct regmap *regmap_phy_pcs_common_cdb;
@@ -1711,24 +1710,22 @@ static int cdns_torrent_phy_probe(struct
platform_device *pdev)
struct device *dev = >dev;
struct phy_provider *phy_provider;
struct phy_attrs torrent_attr;
- const struct of_device_id *match;
- struct cdns_torrent_data *data;
+ const struct cdns_torrent_data *data;
struct device_node *child;
int ret, subnodes, node = 0, i;
/* Get init data for this PHY */
- match = of_match_device(cdns_torrent_phy_of_match, dev);
- if (!match)
+ data = of_device_get_match_data(dev);
+ if (!data)
return -EINVAL;
- data = (struct cdns_torrent_data *)match->data;
-
cdns_phy = devm_kzalloc(dev, sizeof(*cdns_phy), GFP_KERNEL);
if (!cdns_phy)
return -ENOMEM;
dev_set_drvdata(dev, cdns_phy);
cdns_phy->dev = dev;
+ cdns_phy->init_data = data;
cdns_phy->phy_rst = devm_reset_control_get_exclusive_by_index(dev, 0);
if (IS_ERR(cdns_phy->phy_rst)) {
--
2.26.1
[PATCH v1 7/7] dt-bindings: phy: cadence-torrent: Update Torrent PHY bindings for generic use
Torrent PHY can be used in different multi-link multi-protocol
configurations including protocols other than DisplayPort also,
such as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have
support for these configurations.
Signed-off-by: Swapnil Jakhade
---
.../bindings/phy/phy-cadence-torrent.yaml | 76 ++-
1 file changed, 58 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
index a7ee19d27c19..b2275712363d 100644
--- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
@@ -4,11 +4,13 @@
$id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#;
$schema: "http://devicetree.org/meta-schemas/core.yaml#;
-title: Cadence Torrent SD0801 PHY binding for DisplayPort
+title: Cadence Torrent SD0801 PHY binding
description:
This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
- hardware included with the Cadence MHDP DisplayPort controller.
+ hardware included with the Cadence MHDP DisplayPort controller. Torrent
+ PHY also supports multilink multiprotocol combinations including protocols
+ such as PCIe, USB, SGMII, QSGMII etc.
maintainers:
- Swapnil Jakhade
@@ -49,13 +51,14 @@ properties:
- const: dptx_phy
resets:
-maxItems: 1
-description:
- Torrent PHY reset.
- See Documentation/devicetree/bindings/reset/reset.txt
+minItems: 1
+maxItems: 2
+items:
+ - description: Torrent PHY reset.
+ - description: Torrent APB reset. This is optional.
patternProperties:
- '^phy@[0-7]+$':
+ '^link@[0-7]+$':
type: object
description:
Each group of PHY lanes with a single master lane should be represented
as a sub-node.
@@ -78,13 +81,13 @@ patternProperties:
Specifies the type of PHY for which the group of PHY lanes is used.
Refer include/dt-bindings/phy/phy.h. Constants from the header
should be used.
$ref: /schemas/types.yaml#/definitions/uint32
-enum: [1, 2, 3, 4, 5, 6]
+enum: [1, 2, 3, 4, 5, 6, 7, 8, 9]
cdns,num-lanes:
description:
- Number of DisplayPort lanes.
+ Number of lanes.
$ref: /schemas/types.yaml#/definitions/uint32
-enum: [1, 2, 4]
+enum: [1, 2, 3, 4]
default: 4
cdns,ssc-mode:
@@ -108,6 +111,7 @@ patternProperties:
- resets
- "#phy-cells"
- cdns,phy-type
+ - cdns,num-lanes
additionalProperties: false
@@ -141,15 +145,51 @@ examples:
clock-names = "refclk";
#address-cells = <1>;
#size-cells = <0>;
-phy@0 {
- reg = <0>;
- resets = < 1>, < 2>,
- < 3>, < 4>;
- #phy-cells = <0>;
- cdns,phy-type = ;
- cdns,num-lanes = <4>;
- cdns,max-bit-rate = <8100>;
+link@0 {
+reg = <0>;
+resets = < 1>, < 2>,
+ < 3>, < 4>;
+#phy-cells = <0>;
+cdns,phy-type = ;
+cdns,num-lanes = <4>;
+cdns,max-bit-rate = <8100>;
+};
+};
+};
+ - |
+#include
+#include
+
+bus {
+#address-cells = <2>;
+#size-cells = <2>;
+
+torrent-phy@f0fb50 {
+compatible = "cdns,torrent-phy";
+reg = <0xf0 0xfb50 0x0 0x0010>;
+reg-names = "torrent_phy";
+resets = < 0>, < 1>;
+clocks = <_clk>;
+clock-names = "refclk";
+#address-cells = <1>;
+#size-cells = <0>;
+link@0 {
+reg = <0>;
+resets = < 2>, < 3>;
+#phy-cells = <0>;
+cdns,phy-type = ;
+cdns,num-lanes = <2>;
+cdns,ssc-mode = ;
};
+
+link@2 {
+reg = <2>;
+resets = < 4>;
+#phy-cells = <0>;
+cdns,phy-type = ;
+cdns,num-lanes = <1>;
+cdns,ssc-mode = ;
+ };
};
};
...
--
2.26.1
[PATCH v1 0/7] PHY: Prepare Cadence Torrent PHY driver to support multilink configurations
Cadence Torrent PHY is a multiprotocol PHY supporting different multilink PHY configurations including DisplayPort, PCIe, USB, SGMII, QSGMII etc. Existing Torrent PHY driver supports only DisplayPort. This patch series prepares Torrent PHY driver so that different multilink configurations can be supported. It also updates DT bindings accordingly. Support for different multilink configurations with register sequences for protocols above will be added in a separate patch series. This patch series is dependent on PHY patch series [1]. [1] https://lkml.org/lkml/2020/7/17/158 Swapnil Jakhade (7): phy: cadence-torrent: Use of_device_get_match_data() to get driver data phy: cadence-torrent: Use devm_platform_ioremap_resource() to get reg addresses phy: cadence-torrent: Enable support for multiple subnodes phy: cadence-torrent: Add separate regmap functions for torrent and DP phy: cadence-torrent: Check total lane count for all subnodes is within limit dt-bindings: phy: cadence-torrent: Add binding to specify SSC mode dt-bindings: phy: cadence-torrent: Update Torrent PHY bindings for generic use .../bindings/phy/phy-cadence-torrent.yaml | 85 +++--- drivers/phy/cadence/phy-cadence-torrent.c | 146 ++ include/dt-bindings/phy/phy-cadence-torrent.h | 13 ++ 3 files changed, 164 insertions(+), 80 deletions(-) create mode 100644 include/dt-bindings/phy/phy-cadence-torrent.h -- 2.26.1
[PATCH v1 4/7] phy: cadence-torrent: Add separate regmap functions for torrent and DP
Added separate functions for regmap initialization of torrent PHY
generic registers and DP specific registers.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 99 +++
1 file changed, 66 insertions(+), 33 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index 8ef97af7308d..aff85e55348f 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -1584,7 +1584,24 @@ static struct regmap *cdns_regmap_init(struct device
*dev, void __iomem *base,
return devm_regmap_init(dev, NULL, ctx, config);
}
-static int cdns_regfield_init(struct cdns_torrent_phy *cdns_phy)
+static int cdns_torrent_dp_regfield_init(struct cdns_torrent_phy *cdns_phy)
+{
+ struct device *dev = cdns_phy->dev;
+ struct regmap_field *field;
+ struct regmap *regmap;
+
+ regmap = cdns_phy->regmap_dptx_phy_reg;
+ field = devm_regmap_field_alloc(dev, regmap, phy_reset_ctrl);
+ if (IS_ERR(field)) {
+ dev_err(dev, "PHY_RESET reg field init failed\n");
+ return PTR_ERR(field);
+ }
+ cdns_phy->phy_reset_ctrl = field;
+
+ return 0;
+}
+
+static int cdns_torrent_regfield_init(struct cdns_torrent_phy *cdns_phy)
{
struct device *dev = cdns_phy->dev;
struct regmap_field *field;
@@ -1614,28 +1631,44 @@ static int cdns_regfield_init(struct cdns_torrent_phy
*cdns_phy)
}
cdns_phy->phy_pma_pll_raw_ctrl = field;
- regmap = cdns_phy->regmap_dptx_phy_reg;
- field = devm_regmap_field_alloc(dev, regmap, phy_reset_ctrl);
- if (IS_ERR(field)) {
- dev_err(dev, "PHY_RESET reg field init failed\n");
- return PTR_ERR(field);
+ return 0;
+}
+
+static int cdns_torrent_dp_regmap_init(struct cdns_torrent_phy *cdns_phy)
+{
+ void __iomem *base = cdns_phy->base;
+ struct device *dev = cdns_phy->dev;
+ struct regmap *regmap;
+ u8 reg_offset_shift;
+ u32 block_offset;
+
+ reg_offset_shift = cdns_phy->init_data->reg_offset_shift;
+
+ block_offset = TORRENT_DPTX_PHY_OFFSET;
+ regmap = cdns_regmap_init(dev, base, block_offset,
+ reg_offset_shift,
+ _torrent_dptx_phy_config);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "Failed to init DPTX PHY regmap\n");
+ return PTR_ERR(regmap);
}
- cdns_phy->phy_reset_ctrl = field;
+ cdns_phy->regmap_dptx_phy_reg = regmap;
return 0;
}
-static int cdns_regmap_init_torrent_dp(struct cdns_torrent_phy *cdns_phy,
- void __iomem *sd_base,
- void __iomem *base,
- u8 block_offset_shift,
- u8 reg_offset_shift)
+static int cdns_torrent_regmap_init(struct cdns_torrent_phy *cdns_phy)
{
+ void __iomem *sd_base = cdns_phy->sd_base;
+ u8 block_offset_shift, reg_offset_shift;
struct device *dev = cdns_phy->dev;
struct regmap *regmap;
u32 block_offset;
int i;
+ block_offset_shift = cdns_phy->init_data->block_offset_shift;
+ reg_offset_shift = cdns_phy->init_data->reg_offset_shift;
+
for (i = 0; i < MAX_NUM_LANES; i++) {
block_offset = TORRENT_TX_LANE_CDB_OFFSET(i, block_offset_shift,
reg_offset_shift);
@@ -1690,16 +1723,6 @@ static int cdns_regmap_init_torrent_dp(struct
cdns_torrent_phy *cdns_phy,
}
cdns_phy->regmap_phy_pma_common_cdb = regmap;
- block_offset = TORRENT_DPTX_PHY_OFFSET;
- regmap = cdns_regmap_init(dev, base, block_offset,
- reg_offset_shift,
- _torrent_dptx_phy_config);
- if (IS_ERR(regmap)) {
- dev_err(dev, "Failed to init DPTX PHY regmap\n");
- return PTR_ERR(regmap);
- }
- cdns_phy->regmap_dptx_phy_reg = regmap;
-
return 0;
}
@@ -1712,6 +1735,7 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
const struct cdns_torrent_data *data;
struct device_node *child;
int ret, subnodes, node = 0, i;
+ u8 init_dp_regmap = 0;
/* Get init data for this PHY */
data = of_device_get_match_data(dev);
@@ -1749,6 +1773,14 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
return -EINVAL;
}
+ ret = cdns_torrent_regmap_init(cdns_phy);
+ if (ret)
+ return ret;
+
+ ret = cdns_torrent_regfield_init(cdns_phy);
+ if (ret)
+ return ret;
+
for_each_available_child_of_node(dev->of_node, child) {
struct phy *gphy;
@@ -1831,6 +1863,18 @@ static int
[PATCH v1 2/7] phy: cadence-torrent: Use devm_platform_ioremap_resource() to get reg addresses
Use devm_platform_ioremap_resource() to get register addresses instead of
boilerplate code.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index 50c30d49300e..177120afcc35 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -1705,7 +1705,6 @@ static int cdns_regmap_init_torrent_dp(struct
cdns_torrent_phy *cdns_phy,
static int cdns_torrent_phy_probe(struct platform_device *pdev)
{
- struct resource *regs;
struct cdns_torrent_phy *cdns_phy;
struct device *dev = >dev;
struct phy_provider *phy_provider;
@@ -1740,8 +1739,7 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
return PTR_ERR(cdns_phy->clk);
}
- regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- cdns_phy->sd_base = devm_ioremap_resource(>dev, regs);
+ cdns_phy->sd_base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(cdns_phy->sd_base))
return PTR_ERR(cdns_phy->sd_base);
@@ -1831,9 +1829,7 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
}
/* DPTX registers */
- regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- cdns_phy->base = devm_ioremap_resource(>dev,
- regs);
+ cdns_phy->base = devm_platform_ioremap_resource(pdev,
1);
if (IS_ERR(cdns_phy->base)) {
ret = PTR_ERR(cdns_phy->base);
goto put_child;
--
2.26.1
[PATCH v1 5/7] phy: cadence-torrent: Check total lane count for all subnodes is within limit
Add checking if total number of lanes for all subnodes is not greater than
number of lanes supported by PHY.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index aff85e55348f..82f48ca5dcc6 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -25,7 +25,6 @@
#define REF_CLK_19_2MHz1920
#define REF_CLK_25MHz 2500
-#define DEFAULT_NUM_LANES 4
#define MAX_NUM_LANES 4
#define DEFAULT_MAX_BIT_RATE 8100 /* in Mbps */
@@ -1735,6 +1734,7 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
const struct cdns_torrent_data *data;
struct device_node *child;
int ret, subnodes, node = 0, i;
+ u32 total_num_lanes = 0;
u8 init_dp_regmap = 0;
/* Get init data for this PHY */
@@ -1809,9 +1809,15 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
goto put_child;
}
- cdns_phy->phys[node].num_lanes = DEFAULT_NUM_LANES;
- of_property_read_u32(child, "cdns,num-lanes",
-_phy->phys[node].num_lanes);
+ if (of_property_read_u32(child, "cdns,num-lanes",
+_phy->phys[node].num_lanes)) {
+ dev_err(dev, "%s: No \"cdns,num-lanes\"-property.\n",
+ child->full_name);
+ ret = -EINVAL;
+ goto put_child;
+ }
+
+ total_num_lanes += cdns_phy->phys[node].num_lanes;
if (cdns_phy->phys[node].phy_type == PHY_TYPE_DP) {
switch (cdns_phy->phys[node].num_lanes) {
@@ -1893,6 +1899,11 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
}
cdns_phy->nsubnodes = node;
+ if (total_num_lanes > MAX_NUM_LANES) {
+ dev_err(dev, "Invalid lane configuration\n");
+ goto put_lnk_rst;
+ }
+
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
if (IS_ERR(phy_provider)) {
ret = PTR_ERR(phy_provider);
--
2.26.1
Re: [PATCH v5 2/6] PCI: uniphier: Add misc interrupt handler to invoke PME and AER
On 2020/07/15 19:04, Kunihiko Hayashi wrote: Hi Lorenzo, On 2020/07/14 22:27, Lorenzo Pieralisi wrote: On Thu, Jun 18, 2020 at 05:38:09PM +0900, Kunihiko Hayashi wrote: The misc interrupts consisting of PME, AER, and Link event, is handled by INTx handler, however, these interrupts should be also handled by MSI handler. Define what you mean please. [snip] I think this is wrong. pp->irq_domain is the DWC MSI domain, how do you know that hwirq 0 *is* the AER/PME interrupt ? When AER/PME drivers are probed, AER/PME interrupts are registered as MSI-0. The pcie_message_numbers() function refers the following fields of PCI registers, - PCI_EXP_FLAGS_IRQ (for PME) - PCI_ERR_ROOT_AER_IRQ (for AER) and decides AER/PME interrupts numbers in MSI domain. Initial values of both fields are 0, so these interrupts are set to MSI-0. However, pcie_uniphier driver doesn't know that these interrupts are MSI-0. Surely using 0 here is wrong. I think that the method to get virq for AER/PME from pcieport is needed. To avoid using hard-coded MSI-0, I'll add new function to get a virq number corresponding to each service (AER/PME) to portdrv. I'll update the series in v6. Thank you, --- Best Regards Kunihiko Hayashi
[PATCH v1 6/7] dt-bindings: phy: cadence-torrent: Add binding to specify SSC mode
Add binding to specify Spread Spectrum Clocking mode used. Signed-off-by: Swapnil Jakhade --- .../bindings/phy/phy-cadence-torrent.yaml | 9 + include/dt-bindings/phy/phy-cadence-torrent.h | 13 + 2 files changed, 22 insertions(+) create mode 100644 include/dt-bindings/phy/phy-cadence-torrent.h diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml index 4071438be2ba..a7ee19d27c19 100644 --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml @@ -87,6 +87,15 @@ patternProperties: enum: [1, 2, 4] default: 4 + cdns,ssc-mode: +description: + Specifies the Spread Spectrum Clocking mode used. It can be NO_SSC, + EXTERNAL_SSC or INTERNAL_SSC. + Refer include/dt-bindings/phy/phy-cadence-torrent.h for the constants to be used. +$ref: /schemas/types.yaml#/definitions/uint32 +enum: [0, 1, 2] +default: 0 + cdns,max-bit-rate: description: Maximum DisplayPort link bit rate to use, in Mbps diff --git a/include/dt-bindings/phy/phy-cadence-torrent.h b/include/dt-bindings/phy/phy-cadence-torrent.h new file mode 100644 index ..e387b6a95741 --- /dev/null +++ b/include/dt-bindings/phy/phy-cadence-torrent.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for Cadence Torrent SERDES. + */ + +#ifndef _DT_BINDINGS_TORRENT_SERDES_H +#define _DT_BINDINGS_TORRENT_SERDES_H + +#define TORRENT_SERDES_NO_SSC 0 +#define TORRENT_SERDES_EXTERNAL_SSC1 +#define TORRENT_SERDES_INTERNAL_SSC2 + +#endif /* _DT_BINDINGS_TORRENT_SERDES_H */ -- 2.26.1
[PATCH v1 3/7] phy: cadence-torrent: Enable support for multiple subnodes
Enable support for multiple subnodes in torrent PHY to
include multi-link combinations.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index 177120afcc35..8ef97af7308d 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -1747,9 +1747,6 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
if (subnodes == 0) {
dev_err(dev, "No available link subnodes found\n");
return -EINVAL;
- } else if (subnodes != 1) {
- dev_err(dev, "Driver supports only one link subnode.\n");
- return -EINVAL;
}
for_each_available_child_of_node(dev->of_node, child) {
@@ -1772,14 +1769,6 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
goto put_child;
}
- if (cdns_phy->phys[node].mlane != 0) {
- dev_err(dev,
- "%s: Driver supports only lane-0 as master
lane.\n",
- child->full_name);
- ret = -EINVAL;
- goto put_child;
- }
-
if (of_property_read_u32(child, "cdns,phy-type",
_phy->phys[node].phy_type)) {
dev_err(dev, "%s: No \"cdns,phy-type\"-property.\n",
@@ -1852,10 +1841,6 @@ static int cdns_torrent_phy_probe(struct platform_device
*pdev)
torrent_attr.mode = PHY_MODE_DP;
phy_set_attrs(gphy, torrent_attr);
- } else {
- dev_err(dev, "Driver supports only PHY_TYPE_DP\n");
- ret = -ENOTSUPP;
- goto put_child;
}
cdns_phy->phys[node].phy = gphy;
phy_set_drvdata(gphy, _phy->phys[node]);
--
2.26.1
Re: [PATCH] x86/mm/64: Do not dereference non-present PGD entries
On Fri, Aug 07, 2020 at 10:40:13AM +0200, Joerg Roedel wrote:
> From: Joerg Roedel
>
> The code for preallocate_vmalloc_pages() was written under the
> assumption that the p4d_offset() and pud_offset() functions will perform
> present checks before dereferencing the parent entries.
>
> This assumption is wrong an leads to a bug in the code which causes the
> physical address found in the PGD be used as a page-table page, even if
> the PGD is not present.
>
> So the code flow currently is:
>
> pgd = pgd_offset_k(addr);
> p4d = p4d_offset(pgd, addr);
> if (p4d_none(*p4d))
> p4d = p4d_alloc(_mm, pgd, addr);
>
> This lacks a check for pgd_none() at least, the correct flow would be:
>
> pgd = pgd_offset_k(addr);
> if (pgd_none(*pgd))
> p4d = p4d_alloc(_mm, pgd, addr);
> else
> p4d = p4d_offset(pgd, addr);
>
> But this is the same flow that the p4d_alloc() and the pud_alloc()
> functions use internally, so there is no need to duplicate them.
>
> Remove the p?d_none() checks from the function and just call into
> p4d_alloc() and pud_alloc() to correctly pre-allocate the PGD entries.
>
> Reported-by: Jason A. Donenfeld
> Fixes: 6eb82f994026 ("x86/mm: Pre-allocate P4D/PUD pages for vmalloc area")
> Signed-off-by: Joerg Roedel
LGTM,
Reviewed-by: Mike Rapoport
> ---
> arch/x86/mm/init_64.c | 31 +--
> 1 file changed, 13 insertions(+), 18 deletions(-)
>
> diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
> index 3f4e29a78f2b..449e071240e1 100644
> --- a/arch/x86/mm/init_64.c
> +++ b/arch/x86/mm/init_64.c
> @@ -1253,28 +1253,23 @@ static void __init preallocate_vmalloc_pages(void)
> p4d_t *p4d;
> pud_t *pud;
>
> - p4d = p4d_offset(pgd, addr);
> - if (p4d_none(*p4d)) {
> - /* Can only happen with 5-level paging */
> - p4d = p4d_alloc(_mm, pgd, addr);
> - if (!p4d) {
> - lvl = "p4d";
> - goto failed;
> - }
> - }
> + lvl = "p4d";
> + p4d = p4d_alloc(_mm, pgd, addr);
> + if (!p4d)
> + goto failed;
>
> + /*
> + * With 5-level paging the P4D level is not folded. So the PGDs
> + * are now populated and there is no need to walk down to the
> + * PUD level.
> + */
> if (pgtable_l5_enabled())
> continue;
>
> - pud = pud_offset(p4d, addr);
> - if (pud_none(*pud)) {
> - /* Ends up here only with 4-level paging */
> - pud = pud_alloc(_mm, p4d, addr);
> - if (!pud) {
> - lvl = "pud";
> - goto failed;
> - }
> - }
> + lvl = "pud";
> + pud = pud_alloc(_mm, p4d, addr);
> + if (!pud)
> + goto failed;
> }
>
> return;
> --
> 2.26.2
>
--
Sincerely yours,
Mike.
drivers/usb/chipidea/core.c:657 ci_usb_role_switch_set() error: double unlocked 'ci->lock' (orig line 638)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 86cfccb66937dd6cbf26ed619958b9e587e6a115
commit: 05559f10ed797b79f7fa47313682c48919a2b111 usb: chipidea: add role switch
class support
date: 12 months ago
config: parisc-randconfig-m031-20200807 (attached as .config)
compiler: hppa-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot
smatch warnings:
drivers/usb/chipidea/core.c:657 ci_usb_role_switch_set() error: double unlocked
'ci->lock' (orig line 638)
vim +657 drivers/usb/chipidea/core.c
615
616 static int ci_usb_role_switch_set(struct device *dev, enum usb_role
role)
617 {
618 struct ci_hdrc *ci = dev_get_drvdata(dev);
619 struct ci_hdrc_cable *cable = NULL;
620 enum usb_role current_role = ci_role_to_usb_role(ci);
621 unsigned long flags;
622
623 if (current_role == role)
624 return 0;
625
626 pm_runtime_get_sync(ci->dev);
627 /* Stop current role */
628 spin_lock_irqsave(>lock, flags);
629 if (current_role == USB_ROLE_DEVICE)
630 cable = >platdata->vbus_extcon;
631 else if (current_role == USB_ROLE_HOST)
632 cable = >platdata->id_extcon;
633
634 if (cable) {
635 cable->changed = true;
636 cable->connected = false;
637 ci_irq(ci->irq, ci);
> 638 spin_unlock_irqrestore(>lock, flags);
639 if (ci->wq && role != USB_ROLE_NONE)
640 flush_workqueue(ci->wq);
641 spin_lock_irqsave(>lock, flags);
642 }
643
644 cable = NULL;
645
646 /* Start target role */
647 if (role == USB_ROLE_DEVICE)
648 cable = >platdata->vbus_extcon;
649 else if (role == USB_ROLE_HOST)
650 cable = >platdata->id_extcon;
651
652 if (cable) {
653 cable->changed = true;
654 cable->connected = true;
655 ci_irq(ci->irq, ci);
656 }
> 657 spin_unlock_irqrestore(>lock, flags);
658 pm_runtime_put_sync(ci->dev);
659
660 return 0;
661 }
662
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip
[PATCH v2 4/4] MIPS: BCM63xx: refactor board declarations
Current board declarations are a mess. Let's put some order and make them
follow the same structure. Also board declarations tabs.
Switch to SPDX license identifier.
Signed-off-by: Álvaro Fernández Rojas
---
v2: switch to SPDX license identifier.
arch/mips/bcm63xx/boards/board_bcm963xx.c | 620 +++---
1 file changed, 306 insertions(+), 314 deletions(-)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c
b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index ac9570b66f37..01aff80a5967 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1,8 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
* Copyright (C) 2008 Maxime Bizon
* Copyright (C) 2008 Florian Fainelli
*/
@@ -41,30 +38,28 @@ static struct board_info board;
*/
#ifdef CONFIG_BCM63XX_CPU_3368
static struct board_info __initdata board_cvg834g = {
- .name = "CVG834G_E15R3921",
- .expected_cpu_id= 0x3368,
+ .name = "CVG834G_E15R3921",
+ .expected_cpu_id = 0x3368,
- .has_uart0 = 1,
- .has_uart1 = 1,
-
- .has_enet0 = 1,
- .has_pci= 1,
+ .ephy_reset_gpio = 36,
+ .ephy_reset_gpio_flags = GPIOF_INIT_HIGH,
+ .has_pci = 1,
+ .has_uart0 = 1,
+ .has_uart1 = 1,
+ .has_enet0 = 1,
.enet0 = {
- .has_phy= 1,
- .use_internal_phy = 1,
+ .has_phy = 1,
+ .use_internal_phy = 1,
},
.leds = {
{
- .name = "CVG834G:green:power",
- .gpio = 37,
+ .name = "CVG834G:green:power",
+ .gpio = 37,
.default_trigger= "default-on",
},
},
-
- .ephy_reset_gpio= 36,
- .ephy_reset_gpio_flags = GPIOF_INIT_HIGH,
};
#endif /* CONFIG_BCM63XX_CPU_3368 */
@@ -73,44 +68,44 @@ static struct board_info __initdata board_cvg834g = {
*/
#ifdef CONFIG_BCM63XX_CPU_6328
static struct board_info __initdata board_96328avng = {
- .name = "96328avng",
- .expected_cpu_id= 0x6328,
+ .name = "96328avng",
+ .expected_cpu_id = 0x6328,
- .has_uart0 = 1,
- .has_pci= 1,
- .has_usbd = 0,
+ .has_pci = 1,
+ .has_uart0 = 1,
+ .has_usbd = 0,
.usbd = {
- .use_fullspeed = 0,
- .port_no= 0,
+ .use_fullspeed = 0,
+ .port_no = 0,
},
.leds = {
{
- .name = "96328avng::ppp-fail",
- .gpio = 2,
- .active_low = 1,
+ .name = "96328avng::ppp-fail",
+ .gpio = 2,
+ .active_low = 1,
},
{
- .name = "96328avng::power",
- .gpio = 4,
- .active_low = 1,
+ .name = "96328avng::power",
+ .gpio = 4,
+ .active_low = 1,
.default_trigger = "default-on",
},
{
- .name = "96328avng::power-fail",
- .gpio = 8,
- .active_low = 1,
+ .name = "96328avng::power-fail",
+ .gpio = 8,
+ .active_low = 1,
},
{
- .name = "96328avng::wps",
- .gpio = 9,
- .active_low = 1,
+ .name = "96328avng::wps",
+ .gpio = 9,
+ .active_low = 1,
},
{
- .name = "96328avng::ppp",
- .gpio = 11,
- .active_low = 1,
+ .name = "96328avng::ppp",
+ .gpio = 11,
+ .active_low = 1,
},
},
};
@@ -121,85 +116,86 @@ static struct board_info __initdata board_96328avng = {
*/
#ifdef CONFIG_BCM63XX_CPU_6338
static struct board_info __initdata board_96338gw = {
- .name = "96338GW",
- .expected_cpu_id= 0x6338,
+ .name =
Re: [PATCH v5 3/3] mm/page_alloc: Keep memoryless cpuless node 0 offline
On Fri, Aug 07, 2020 at 08:58:09AM +0200, David Hildenbrand wrote: > On 07.08.20 06:32, Andrew Morton wrote: > > On Fri, 3 Jul 2020 18:28:23 +0530 Srikar Dronamraju > > wrote: > > > >>> The memory hotplug changes that somehow because you can hotremove numa > >>> nodes and therefore make the nodemask sparse but that is not a common > >>> case. I am not sure what would happen if a completely new node was added > >>> and its corresponding node was already used by the renumbered one > >>> though. It would likely conflate the two I am afraid. But I am not sure > >>> this is really possible with x86 and a lack of a bug report would > >>> suggest that nobody is doing that at least. > >>> > >> > >> JFYI, > >> Satheesh copied in this mailchain had opened a bug a year on crash with > >> vcpu > >> hotplug on memoryless node. > >> > >> https://bugzilla.kernel.org/show_bug.cgi?id=202187 > > > > So... do we merge this patch or not? Seems that the overall view is > > "risky but nobody is likely to do anything better any time soon"? > > I recall the issue Michal saw was "fix powerpc" vs. "break other > architectures". @Michal how should we proceed? At least x86-64 won't be > affected IIUC. There is a patch to introduce the node remapping on ppc as well which should eliminate the empty node 0. https://patchwork.ozlabs.org/project/linuxppc-dev/patch/2020073916.243569-1-aneesh.ku...@linux.ibm.com/ Thanks Michal
[PATCH v2 2/4] MIPS: BCM63xx: remove EHCI from BCM6348 boards
There's no EHCI controller on BCM6348.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes.
arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c
b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 744aa16bab12..45f1bc437245 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -285,7 +285,6 @@ static struct board_info __initdata board_96348gw_10 = {
.has_ohci0 = 1,
.has_pccard = 1,
- .has_ehci0 = 1,
.leds = {
{
@@ -338,7 +337,6 @@ static struct board_info __initdata board_96348gw_11 = {
.has_ohci0 = 1,
.has_pccard = 1,
- .has_ehci0 = 1,
.leds = {
{
@@ -441,7 +439,6 @@ static struct board_info __initdata board_FAST2404 = {
.has_ohci0 = 1,
.has_pccard = 1,
- .has_ehci0 = 1,
};
static struct board_info __initdata board_rta1025w_16 = {
--
2.27.0
[PATCH v2 1/4] MIPS: BCM63xx: remove duplicated new lines
There are 3 duplicated new lines, let's remove them.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes.
arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c
b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 230bf27c1fb8..744aa16bab12 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -32,7 +32,6 @@
#include
-
#define HCS_OFFSET_128K0x2
static struct board_info board;
@@ -337,7 +336,6 @@ static struct board_info __initdata board_96348gw_11 = {
.force_duplex_full = 1,
},
-
.has_ohci0 = 1,
.has_pccard = 1,
.has_ehci0 = 1,
@@ -580,7 +578,6 @@ static struct board_info __initdata board_96358vw2 = {
.force_duplex_full = 1,
},
-
.has_ohci0 = 1,
.has_pccard = 1,
.has_ehci0 = 1,
--
2.27.0
[PATCH v2 3/4] MIPS: BCM63xx: enable EHCI for DWV-S0 board
EHCI and OHCI share the same USB ports. Therefore, if the board has OHCI
it should also have EHCI.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes.
arch/mips/bcm63xx/boards/board_bcm963xx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c
b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 45f1bc437245..ac9570b66f37 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -645,6 +645,7 @@ static struct board_info __initdata board_DWVS0 = {
},
.has_ohci0 = 1,
+ .has_ehci0 = 1,
};
#endif /* CONFIG_BCM63XX_CPU_6358 */
--
2.27.0
[PATCH v2 0/4] MIPS: BCM63xx: board improvements
Theses patches improve BCM63xx board declarations and source code. v2: switch to SPDX license identifier. Álvaro Fernández Rojas (4): MIPS: BCM63xx: remove duplicated new lines MIPS: BCM63xx: remove EHCI from BCM6348 boards MIPS: BCM63xx: enable EHCI for DWV-S0 board MIPS: BCM63xx: refactor board declarations arch/mips/bcm63xx/boards/board_bcm963xx.c | 625 +++--- 1 file changed, 306 insertions(+), 319 deletions(-) -- 2.27.0
I wait for your urgent response
Greetings dear, I am Mrs. Maddalena Nicholaus, a Finnish citizen and 85 years old with grief. I am looking for your help due to my medical situation here in London. My medical condition is not in good shape and I will need your assistance to grant my last wish over the inheritance of my Late father which currently belongs to me. I want to hand it over to you for a charity project. feel free to get back to me for more details if you are interested. I wait for your urgent response. Regards, Mrs. Maddalena Nicholaus.
Re: [PATCH v3 4/7] x86/paravirt: remove 32-bit support from PARAVIRT_XXL
On 07.08.20 11:39, pet...@infradead.org wrote:
On Fri, Aug 07, 2020 at 10:38:23AM +0200, Juergen Gross wrote:
-# else
- const unsigned char cpu_iret[1];
-# endif
};
static const struct patch_xxl patch_data_xxl = {
@@ -42,7 +38,6 @@ static const struct patch_xxl patch_data_xxl = {
.irq_save_fl= { 0x9c, 0x58 }, // pushf; pop %[re]ax
.mmu_read_cr2 = { 0x0f, 0x20, 0xd0 }, // mov %cr2, %[re]ax
.mmu_read_cr3 = { 0x0f, 0x20, 0xd8 }, // mov %cr3, %[re]ax
-# ifdef CONFIG_X86_64
.mmu_write_cr3 = { 0x0f, 0x22, 0xdf }, // mov %rdi, %cr3
.irq_restore_fl = { 0x57, 0x9d }, // push %rdi; popfq
.cpu_wbinvd = { 0x0f, 0x09 }, // wbinvd
@@ -50,19 +45,11 @@ static const struct patch_xxl patch_data_xxl = {
0x48, 0x0f, 0x07 }, // swapgs; sysretq
.cpu_swapgs = { 0x0f, 0x01, 0xf8 }, // swapgs
.mov64 = { 0x48, 0x89, 0xf8 }, // mov %rdi, %rax
-# else
- .mmu_write_cr3 = { 0x0f, 0x22, 0xd8 }, // mov %eax, %cr3
- .irq_restore_fl = { 0x50, 0x9d }, // push %eax; popf
- .cpu_iret = { 0xcf }, // iret
-# endif
I was looking at x86_64 paravirt the other day and found we actually
have pv_ops.cpu.iret users there..
On x86_64 we have (without PARAVIRT_XXL):
#define INTERRUPT_RETURNjmp native_iret
and with PARAVIRT_XXL this is basically a jmp *pv_ops.cpu.iret which
will then be patched to either jmp native_iret or jmp xen_iret.
On x86_32 INTERRUPT_RETURN was just "iret" for the non-paravirt case.
This is the reason for above dropping of the static patch data.
So we want to change the above to also patch iret on x86_64 or do we
need to fix x86_64 to not have pv-iret?
We want it to stay how it is. This will let both variants (PARVIRT y/n)
continue to work.
Juergen
arch/sh/include/asm/bitops-op32.h:39:17: sparse: sparse: context imbalance in 'mptcp_sk_clone' - unexpected unlock
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 86cfccb66937dd6cbf26ed619958b9e587e6a115
commit: 2c5ebd001d4f0c64a2dfda94eb1d9b31a8863c8d mptcp: refactor token container
date: 6 weeks ago
config: sh-randconfig-s031-20200807 (attached as .config)
compiler: sh4-linux-gcc (GCC) 9.3.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.2-118-ge1578773-dirty
git checkout 2c5ebd001d4f0c64a2dfda94eb1d9b31a8863c8d
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=sh
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot
sparse warnings: (new ones prefixed by >>)
net/mptcp/protocol.c: note: in included file (through
arch/sh/include/asm/bitops.h, include/linux/bitops.h, include/linux/kernel.h):
>> arch/sh/include/asm/bitops-op32.h:39:17: sparse: sparse: context imbalance
>> in 'mptcp_sk_clone' - unexpected unlock
vim +/mptcp_sk_clone +39 arch/sh/include/asm/bitops-op32.h
0d5bbe0bc2583c Paul Mundt 2008-11-25 35
0d5bbe0bc2583c Paul Mundt 2008-11-25 36 static inline void
__clear_bit(int nr, volatile unsigned long *addr)
0d5bbe0bc2583c Paul Mundt 2008-11-25 37 {
e3c0f6f3fbdaca Masahiro Yamada 2019-07-23 38 if (__builtin_constant_p(nr)) {
0d5bbe0bc2583c Paul Mundt 2008-11-25 @39 __asm__ __volatile__ (
0d5bbe0bc2583c Paul Mundt 2008-11-25 40 "bclr.b %1,
@(%O2,%0) ! __clear_bit\n\t"
0d5bbe0bc2583c Paul Mundt 2008-11-25 41 : "+r" (addr)
0d5bbe0bc2583c Paul Mundt 2008-11-25 42 : "i"
(BYTE_OFFSET(nr)),
0d5bbe0bc2583c Paul Mundt 2008-11-25 43 "i"
(BYTE_NUMBER(nr))
0d5bbe0bc2583c Paul Mundt 2008-11-25 44 : "t", "memory"
0d5bbe0bc2583c Paul Mundt 2008-11-25 45 );
0d5bbe0bc2583c Paul Mundt 2008-11-25 46 } else {
0d5bbe0bc2583c Paul Mundt 2008-11-25 47 unsigned long mask =
BIT_MASK(nr);
0d5bbe0bc2583c Paul Mundt 2008-11-25 48 unsigned long *p =
((unsigned long *)addr) + BIT_WORD(nr);
0d5bbe0bc2583c Paul Mundt 2008-11-25 49
0d5bbe0bc2583c Paul Mundt 2008-11-25 50 *p &= ~mask;
0d5bbe0bc2583c Paul Mundt 2008-11-25 51 }
0d5bbe0bc2583c Paul Mundt 2008-11-25 52 }
0d5bbe0bc2583c Paul Mundt 2008-11-25 53
:: The code at line 39 was first introduced by commit
:: 0d5bbe0bc2583c4dc06ea00adccf07c3acd1481d sh: Provide optimized
non-atomic bitops for SH-2A.
:: TO: Paul Mundt
:: CC: Paul Mundt
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip
[RFC PATCH v2 6/6] sched/fair: Implement starvation monitor
Starting deadline server for lower priority classes right away when
first task is enqueued might break guarantees, as tasks belonging to
intermediate priority classes could be uselessly preempted. E.g., a well
behaving (non hog) FIFO task can be preempted by NORMAL tasks even if
there are still CPU cycles available for NORMAL tasks to run, as they'll
be running inside the fair deadline server for some period of time.
To prevent this issue, implement a starvation monitor mechanism that
starts the deadline server only if a (fair in this case) task hasn't
been scheduled for some interval of time after it has been enqueued.
Use pick/put functions to manage starvation monitor status.
Signed-off-by: Juri Lelli
---
kernel/sched/fair.c | 57 ++--
kernel/sched/sched.h | 4
2 files changed, 59 insertions(+), 2 deletions(-)
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 6a97ee2a4e26d..5cdf76e508074 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -5494,6 +5494,53 @@ static int sched_idle_cpu(int cpu)
}
#endif
+
+static void fair_server_watchdog(struct timer_list *list)
+{
+ struct rq *rq = container_of(list, struct rq, fair_server_wd);
+ struct rq_flags rf;
+
+ rq_lock_irqsave(rq, );
+ rq->fair_server_wd_running = 0;
+
+ if (!rq->cfs.h_nr_running)
+ goto out;
+
+ update_rq_clock(rq);
+ dl_server_start(>fair_server);
+ rq->fair_server_active = 1;
+ resched_curr(rq);
+
+out:
+ rq_unlock_irqrestore(rq, );
+}
+
+static inline void fair_server_watchdog_start(struct rq *rq)
+{
+ if (rq->fair_server_wd_running || rq->fair_server_active)
+ return;
+
+ timer_setup(>fair_server_wd, fair_server_watchdog, 0);
+ rq->fair_server_wd.expires = jiffies + FAIR_SERVER_WATCHDOG_INTERVAL;
+ add_timer_on(>fair_server_wd, cpu_of(rq));
+ rq->fair_server_active = 0;
+ rq->fair_server_wd_running = 1;
+}
+
+static inline void fair_server_watchdog_stop(struct rq *rq, bool stop_server)
+{
+ if (!rq->fair_server_wd_running && !stop_server)
+ return;
+
+ del_timer(>fair_server_wd);
+ rq->fair_server_wd_running = 0;
+
+ if (stop_server && rq->fair_server_active) {
+ dl_server_stop(>fair_server);
+ rq->fair_server_active = 0;
+ }
+}
+
/*
* The enqueue_task method is called before nr_running is
* increased. Here we update the fair scheduling stats and
@@ -5515,7 +5562,7 @@ enqueue_task_fair(struct rq *rq, struct task_struct *p,
int flags)
util_est_enqueue(>cfs, p);
if (!rq->cfs.h_nr_running)
- dl_server_start(>fair_server);
+ fair_server_watchdog_start(rq);
/*
* If in_iowait is set, the code below may not trigger any cpufreq
@@ -5670,7 +5717,7 @@ static void dequeue_task_fair(struct rq *rq, struct
task_struct *p, int flags)
dequeue_throttle:
if (!rq->cfs.h_nr_running)
- dl_server_stop(>fair_server);
+ fair_server_watchdog_stop(rq, true);
util_est_dequeue(>cfs, p, task_sleep);
hrtick_update(rq);
@@ -7123,6 +7170,7 @@ done: __maybe_unused;
hrtick_start_fair(rq, p);
update_misfit_status(p, rq);
+ fair_server_watchdog_stop(rq, false);
return p;
@@ -7178,6 +7226,8 @@ void fair_server_init(struct rq *rq)
dl_se->dl_period = 20 * TICK_NSEC;
dl_server_init(dl_se, rq, fair_server_has_tasks, fair_server_pick);
+
+ rq->fair_server_wd_running = 0;
}
/*
@@ -7192,6 +7242,9 @@ static void put_prev_task_fair(struct rq *rq, struct
task_struct *prev)
cfs_rq = cfs_rq_of(se);
put_prev_entity(cfs_rq, se);
}
+
+ if (rq->cfs.h_nr_running)
+ fair_server_watchdog_start(rq);
}
/*
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index bf8c9c07705c9..1e1a5436be725 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -375,6 +375,7 @@ extern void dl_server_init(struct sched_dl_entity *dl_se,
struct rq *rq,
dl_server_has_tasks_f has_tasks,
dl_server_pick_f pick);
+#define FAIR_SERVER_WATCHDOG_INTERVAL (HZ >> 1)
extern void fair_server_init(struct rq *);
#ifdef CONFIG_CGROUP_SCHED
@@ -962,6 +963,9 @@ struct rq {
struct dl_rqdl;
struct sched_dl_entity fair_server;
+ int fair_server_active;
+ struct timer_list fair_server_wd;
+ int fair_server_wd_running;
#ifdef CONFIG_FAIR_GROUP_SCHED
/* list of leaf cfs_rq on this CPU: */
--
2.26.2
Re: [PATCH] staging: atomisp: move null check to earlier point
Beyond that, though, I feel like the rules are stupid because I've seen more than a couple commit messages which were contorted to avoid imperative. My own standard for commit messages is that 1) Is the problem explained, especially what it looks like to user space? 2) Is it clear what the solution is? 3) Does the patch itself raise any questions that I can't figure out and which aren't explained in the commit message. And I figure I'm not a domain expert but if I can understand the commit message probably anyone can. We've got people who speak English as a second language and then start imposing pointless rules on top? It's crazy. I've had to ask someone recently to redo a commit message and it seemed very obvious they were focused on nonsense about imperative and avoiding saying "this patch" to the extent that I literally could not figure out what they were saying. When I read the patch, of course, I could see what they were doing but from the commit message it was impossible. regards, dan carpenter
Re: [GIT PULL] x86/mm changes for v5.9
Hey Joerg, On Thu, Aug 6, 2020 at 9:23 PM Joerg Roedel wrote: > Jason, can you share more details about the test setup which triggers > this? Like the .config and the machine setup, ideally a qemu > command-line, and how to reproduce it on that setup. make -C tools/testing/selftests/wireguard/qemu -j$(nproc) I can also confirm that the patch you sent to the list fixes the issue. Jason
Re: [PATCH] x86/mm/64: Do not dereference non-present PGD entries
On Fri, Aug 7, 2020 at 10:40 AM Joerg Roedel wrote:
>
> From: Joerg Roedel
>
> The code for preallocate_vmalloc_pages() was written under the
> assumption that the p4d_offset() and pud_offset() functions will perform
> present checks before dereferencing the parent entries.
>
> This assumption is wrong an leads to a bug in the code which causes the
> physical address found in the PGD be used as a page-table page, even if
> the PGD is not present.
>
> So the code flow currently is:
>
> pgd = pgd_offset_k(addr);
> p4d = p4d_offset(pgd, addr);
> if (p4d_none(*p4d))
> p4d = p4d_alloc(_mm, pgd, addr);
>
> This lacks a check for pgd_none() at least, the correct flow would be:
>
> pgd = pgd_offset_k(addr);
> if (pgd_none(*pgd))
> p4d = p4d_alloc(_mm, pgd, addr);
> else
> p4d = p4d_offset(pgd, addr);
>
> But this is the same flow that the p4d_alloc() and the pud_alloc()
> functions use internally, so there is no need to duplicate them.
>
> Remove the p?d_none() checks from the function and just call into
> p4d_alloc() and pud_alloc() to correctly pre-allocate the PGD entries.
>
> Reported-by: Jason A. Donenfeld
> Fixes: 6eb82f994026 ("x86/mm: Pre-allocate P4D/PUD pages for vmalloc area")
> Signed-off-by: Joerg Roedel
> ---
> arch/x86/mm/init_64.c | 31 +--
> 1 file changed, 13 insertions(+), 18 deletions(-)
>
> diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
> index 3f4e29a78f2b..449e071240e1 100644
> --- a/arch/x86/mm/init_64.c
> +++ b/arch/x86/mm/init_64.c
> @@ -1253,28 +1253,23 @@ static void __init preallocate_vmalloc_pages(void)
> p4d_t *p4d;
> pud_t *pud;
>
> - p4d = p4d_offset(pgd, addr);
> - if (p4d_none(*p4d)) {
> - /* Can only happen with 5-level paging */
> - p4d = p4d_alloc(_mm, pgd, addr);
> - if (!p4d) {
> - lvl = "p4d";
> - goto failed;
> - }
> - }
> + lvl = "p4d";
> + p4d = p4d_alloc(_mm, pgd, addr);
> + if (!p4d)
> + goto failed;
>
> + /*
> +* With 5-level paging the P4D level is not folded. So the
> PGDs
> +* are now populated and there is no need to walk down to the
> +* PUD level.
> +*/
> if (pgtable_l5_enabled())
> continue;
>
> - pud = pud_offset(p4d, addr);
> - if (pud_none(*pud)) {
> - /* Ends up here only with 4-level paging */
> - pud = pud_alloc(_mm, p4d, addr);
> - if (!pud) {
> - lvl = "pud";
> - goto failed;
> - }
> - }
> + lvl = "pud";
> + pud = pud_alloc(_mm, p4d, addr);
> + if (!pud)
> + goto failed;
> }
>
> return;
> --
> 2.26.2
This appears to fix the issue, so:
Tested-by: Jason A. Donenfeld
[RFC PATCH v2 3/6] sched/deadline: Move bandwidth accounting into {en,de}queue_dl_entity
From: Peter Zijlstra
In preparation of introducing !task sched_dl_entity; move the
bandwidth accounting into {en.de}queue_dl_entity().
Signed-off-by: Peter Zijlstra (Intel)
---
kernel/sched/deadline.c | 128 ++--
kernel/sched/sched.h| 6 ++
2 files changed, 77 insertions(+), 57 deletions(-)
diff --git a/kernel/sched/deadline.c b/kernel/sched/deadline.c
index 8d909bdb9a119..d4007d1461522 100644
--- a/kernel/sched/deadline.c
+++ b/kernel/sched/deadline.c
@@ -275,12 +275,12 @@ static void __dl_clear_params(struct sched_dl_entity
*dl_se);
* up, and checks if the task is still in the "ACTIVE non contending"
* state or not (in the second case, it updates running_bw).
*/
-static void task_non_contending(struct task_struct *p)
+static void task_non_contending(struct sched_dl_entity *dl_se)
{
- struct sched_dl_entity *dl_se = >dl;
struct hrtimer *timer = _se->inactive_timer;
struct dl_rq *dl_rq = dl_rq_of_se(dl_se);
struct rq *rq = rq_of_dl_rq(dl_rq);
+ struct task_struct *p = dl_task_of(dl_se);
s64 zerolag_time;
/*
@@ -312,13 +312,14 @@ static void task_non_contending(struct task_struct *p)
if ((zerolag_time < 0) || hrtimer_active(_se->inactive_timer)) {
if (dl_task(p))
sub_running_bw(dl_se, dl_rq);
+
if (!dl_task(p) || p->state == TASK_DEAD) {
struct dl_bw *dl_b = dl_bw_of(task_cpu(p));
if (p->state == TASK_DEAD)
- sub_rq_bw(>dl, >dl);
+ sub_rq_bw(dl_se, >dl);
raw_spin_lock(_b->lock);
- __dl_sub(dl_b, p->dl.dl_bw, dl_bw_cpus(task_cpu(p)));
+ __dl_sub(dl_b, dl_se->dl_bw, dl_bw_cpus(task_cpu(p)));
__dl_clear_params(dl_se);
raw_spin_unlock(_b->lock);
}
@@ -1477,6 +1478,41 @@ enqueue_dl_entity(struct sched_dl_entity *dl_se,
{
BUG_ON(on_dl_rq(dl_se));
+ /*
+* Check if a constrained deadline task was activated
+* after the deadline but before the next period.
+* If that is the case, the task will be throttled and
+* the replenishment timer will be set to the next period.
+*/
+ if (!dl_se->dl_throttled && !dl_is_implicit(dl_se))
+ dl_check_constrained_dl(dl_se);
+
+ if (flags & (ENQUEUE_RESTORE|ENQUEUE_MIGRATING)) {
+ struct dl_rq *dl_rq = dl_rq_of_se(dl_se);
+
+ add_rq_bw(dl_se, dl_rq);
+ add_running_bw(dl_se, dl_rq);
+ }
+
+ /*
+* If p is throttled, we do not enqueue it. In fact, if it exhausted
+* its budget it needs a replenishment and, since it now is on
+* its rq, the bandwidth timer callback (which clearly has not
+* run yet) will take care of this.
+* However, the active utilization does not depend on the fact
+* that the task is on the runqueue or not (but depends on the
+* task's state - in GRUB parlance, "inactive" vs "active contending").
+* In other words, even if a task is throttled its utilization must
+* be counted in the active utilization; hence, we need to call
+* add_running_bw().
+*/
+ if (dl_se->dl_throttled && !(flags & ENQUEUE_REPLENISH)) {
+ if (flags & ENQUEUE_WAKEUP)
+ task_contending(dl_se, flags);
+
+ return;
+ }
+
/*
* If this is a wakeup or a new instance, the scheduling
* parameters of the task might need updating. Otherwise,
@@ -1496,9 +1532,28 @@ enqueue_dl_entity(struct sched_dl_entity *dl_se,
__enqueue_dl_entity(dl_se);
}
-static void dequeue_dl_entity(struct sched_dl_entity *dl_se)
+static void dequeue_dl_entity(struct sched_dl_entity *dl_se, int flags)
{
__dequeue_dl_entity(dl_se);
+
+ if (flags & (DEQUEUE_SAVE|DEQUEUE_MIGRATING)) {
+ struct dl_rq *dl_rq = dl_rq_of_se(dl_se);
+
+ sub_running_bw(dl_se, dl_rq);
+ sub_rq_bw(dl_se, dl_rq);
+ }
+
+ /*
+* This check allows to start the inactive timer (or to immediately
+* decrease the active utilization, if needed) in two cases:
+* when the task blocks and when it is terminating
+* (p->state == TASK_DEAD). We can handle the two cases in the same
+* way, because from GRUB's point of view the same thing is happening
+* (the task moves from "active contending" to "active non contending"
+* or "inactive")
+*/
+ if (flags & DEQUEUE_SLEEP)
+ task_non_contending(dl_se);
}
static void enqueue_task_dl(struct rq *rq, struct task_struct *p, int flags)
@@ -1528,72 +1583,31 @@ static void enqueue_task_dl(struct rq *rq, struct
task_struct *p, int flags)
Re: [PATCH] scsi: sd: add runtime pm to open / release
On 04.08.20 11:39, Martin Kepplinger wrote:
> On 30.07.20 17:10, Alan Stern wrote:
>> On Thu, Jul 30, 2020 at 10:52:14AM +0200, Martin Kepplinger wrote:
>>> Maybe I should just start a new discussion with a patch, but the below
>>> is what makes sense to me (when I understand you correctly) and seems to
>>> work. I basically add a new flag, so that the old flags behave unchanged
>>> and only call it during *runtime* resume for SD cards:
>>>
>>>
>>> --- a/drivers/scsi/scsi_error.c
>>> +++ b/drivers/scsi/scsi_error.c
>>> @@ -553,15 +553,21 @@ int scsi_check_sense(struct scsi_cmnd *scmd)
>>> * information that we should pass up to the upper-level
>>> driver
>>> * so that we can deal with it there.
>>> */
>>> - if (scmd->device->expecting_cc_ua) {
>>> + if (scmd->device->expecting_cc_ua ||
>>> + scmd->device->expecting_media_change) {
>>> /*
>>> * Because some device does not queue unit
>>> * attentions correctly, we carefully check
>>> * additional sense code and qualifier so as
>>> -* not to squash media change unit attention.
>>> +* not to squash media change unit attention;
>>> +* unless expecting_media_change is set, indicating
>>> +* that the media (most likely) didn't change
>>> +* but a device only believes so (for example
>>> +* because of suspend/resume).
>>> */
>>> - if (sshdr.asc != 0x28 || sshdr.ascq != 0x00) {
>>> - scmd->device->expecting_cc_ua = 0;
>>> + if ((sshdr.asc != 0x28 || sshdr.ascq != 0x00) ||
>>> + scmd->device->expecting_media_change) {
>>> + scmd->device->expecting_media_change = 0;
>>> return NEEDS_RETRY;
>>> }
>>> }
>>> diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
>>> index d90fefffe31b..b647fab2b663 100644
>>> --- a/drivers/scsi/sd.c
>>> +++ b/drivers/scsi/sd.c
>>> @@ -114,6 +114,7 @@ static void sd_shutdown(struct device *);
>>> static int sd_suspend_system(struct device *);
>>> static int sd_suspend_runtime(struct device *);
>>> static int sd_resume(struct device *);
>>> +static int sd_resume_runtime(struct device *);
>>> static void sd_rescan(struct device *);
>>> static blk_status_t sd_init_command(struct scsi_cmnd *SCpnt);
>>> static void sd_uninit_command(struct scsi_cmnd *SCpnt);
>>> @@ -574,7 +575,7 @@ static const struct dev_pm_ops sd_pm_ops = {
>>> .poweroff = sd_suspend_system,
>>> .restore= sd_resume,
>>> .runtime_suspend= sd_suspend_runtime,
>>> - .runtime_resume = sd_resume,
>>> + .runtime_resume = sd_resume_runtime,
>>> };
>>>
>>> static struct scsi_driver sd_template = {
>>> @@ -3652,6 +3653,21 @@ static int sd_resume(struct device *dev)
>>> return ret;
>>> }
>>>
>>> +static int sd_resume_runtime(struct device *dev)
>>> +{
>>> + struct scsi_disk *sdkp = dev_get_drvdata(dev);
>>> +
>>> + /* Some SD cardreaders report media change when resuming from
>>> suspend
>>> +* because they can't keep track during suspend. */
>>> +
>>> + /* XXX This is not unproblematic though: We won't notice when a card
>>> +* was really changed during runtime suspend! We basically rely
>>> on users
>>> +* to unmount or suspend before doing so. */
>>> + sdkp->device->expecting_media_change = 1;
>>> +
>>> + return sd_resume(dev);
>>> +}
>>> +
>>> /**
>>> * init_sd - entry point for this driver (both when built in or when
>>> * a module).
>>> diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
>>> index bc5909033d13..8c8f053f71c8 100644
>>> --- a/include/scsi/scsi_device.h
>>> +++ b/include/scsi/scsi_device.h
>>> @@ -169,6 +169,8 @@ struct scsi_device {
>>> * this device */
>>> unsigned expecting_cc_ua:1; /* Expecting a CHECK_CONDITION/UNIT_ATTN
>>> * because we did a bus reset. */
>>> + unsigned expecting_media_change:1; /* Expecting media change
>>> ASC/ASCQ
>>> + when it actually doesn't
>>> change */
>>> unsigned use_10_for_rw:1; /* first try 10-byte read / write */
>>> unsigned use_10_for_ms:1; /* first try 10-byte mode sense/select */
>>> unsigned set_dbd_for_ms:1; /* Set "DBD" field in mode sense */
>>
>> That's pretty much what James was suggesting, except for one thing: You
>> must not set sdkp->device->expecting_media_change to 1 for all devices
>> in sd_runtime_resume(). Only for
[RFC PATCH v2 5/6] sched/fair: Add trivial fair server
From: Peter Zijlstra
Use deadline servers to service fair tasks.
This patch adds a fair_server deadline entity which acts as a container
for fair entities and can be used to fix starvation when higher priority
(wrt fair) tasks are monopolizing CPU(s).
Signed-off-by: Peter Zijlstra (Intel)
---
kernel/sched/core.c | 1 +
kernel/sched/fair.c | 29 +
kernel/sched/sched.h | 4
3 files changed, 34 insertions(+)
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 7c471961fd0b8..6537637139c63 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -7170,6 +7170,7 @@ void __init sched_init(void)
#endif /* CONFIG_SMP */
hrtick_rq_init(rq);
atomic_set(>nr_iowait, 0);
+ fair_server_init(rq);
}
set_load_weight(_task, false);
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 5130239c0e1e5..6a97ee2a4e26d 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -5514,6 +5514,9 @@ enqueue_task_fair(struct rq *rq, struct task_struct *p,
int flags)
*/
util_est_enqueue(>cfs, p);
+ if (!rq->cfs.h_nr_running)
+ dl_server_start(>fair_server);
+
/*
* If in_iowait is set, the code below may not trigger any cpufreq
* utilization updates, so do it here explicitly with the IOWAIT flag
@@ -5666,6 +5669,9 @@ static void dequeue_task_fair(struct rq *rq, struct
task_struct *p, int flags)
rq->next_balance = jiffies;
dequeue_throttle:
+ if (!rq->cfs.h_nr_running)
+ dl_server_stop(>fair_server);
+
util_est_dequeue(>cfs, p, task_sleep);
hrtick_update(rq);
}
@@ -7151,6 +7157,29 @@ static struct task_struct *__pick_next_task_fair(struct
rq *rq)
return pick_next_task_fair(rq, NULL, NULL);
}
+static bool fair_server_has_tasks(struct sched_dl_entity *dl_se)
+{
+ return !!dl_se->rq->cfs.nr_running;
+}
+
+static struct task_struct *fair_server_pick(struct sched_dl_entity *dl_se)
+{
+ return pick_next_task_fair(dl_se->rq, NULL, NULL);
+}
+
+void fair_server_init(struct rq *rq)
+{
+ struct sched_dl_entity *dl_se = >fair_server;
+
+ init_dl_entity(dl_se);
+
+ dl_se->dl_runtime = TICK_NSEC;
+ dl_se->dl_deadline = 20 * TICK_NSEC;
+ dl_se->dl_period = 20 * TICK_NSEC;
+
+ dl_server_init(dl_se, rq, fair_server_has_tasks, fair_server_pick);
+}
+
/*
* Account for a descheduled task:
*/
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index f035cd8ccd224..bf8c9c07705c9 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -375,6 +375,8 @@ extern void dl_server_init(struct sched_dl_entity *dl_se,
struct rq *rq,
dl_server_has_tasks_f has_tasks,
dl_server_pick_f pick);
+extern void fair_server_init(struct rq *);
+
#ifdef CONFIG_CGROUP_SCHED
#include
@@ -959,6 +961,8 @@ struct rq {
struct rt_rqrt;
struct dl_rqdl;
+ struct sched_dl_entity fair_server;
+
#ifdef CONFIG_FAIR_GROUP_SCHED
/* list of leaf cfs_rq on this CPU: */
struct list_headleaf_cfs_rq_list;
--
2.26.2
[RFC PATCH v2 4/6] sched/deadline: Introduce deadline servers
From: Peter Zijlstra
Low priority tasks (e.g., SCHED_OTHER) can suffer starvation if tasks
with higher priority (e.g., SCHED_FIFO) monopolize CPU(s).
RT Throttling has been introduced a while ago as a (mostly debug)
countermeasure one can utilize to reserve some CPU time for low priority
tasks (usually background type of work, e.g. workqueues, timers, etc.).
It however has its own problems (see documentation) and the undesired
effect of unconditionally throttling FIFO tasks even when no lower
priority activity needs to run (there are mechanisms to fix this issue
as well, but, again, with their own problems).
Introduce deadline servers to service low priority tasks needs under
starvation conditions. Deadline servers are built extending SCHED_DEADLINE
implementation to allow 2-level scheduling (a sched_deadline entity
becomes a container for lower priority scheduling entities).
Signed-off-by: Peter Zijlstra (Intel)
---
include/linux/sched.h | 26 +++-
kernel/sched/core.c | 17 ++
kernel/sched/deadline.c | 336 ++--
kernel/sched/fair.c | 4 +
kernel/sched/sched.h| 29
5 files changed, 298 insertions(+), 114 deletions(-)
diff --git a/include/linux/sched.h b/include/linux/sched.h
index f7b9ba04970bc..3ede6dd39e55e 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -55,12 +55,14 @@ struct robust_list_head;
struct root_domain;
struct rq;
struct sched_attr;
+struct sched_dl_entity;
struct sched_param;
struct seq_file;
struct sighand_struct;
struct signal_struct;
struct task_delay_info;
struct task_group;
+struct task_struct;
/*
* Task state bitmask. NOTE! These bits are also
@@ -501,6 +503,9 @@ struct sched_rt_entity {
#endif
} __randomize_layout;
+typedef bool (*dl_server_has_tasks_f)(struct sched_dl_entity *);
+typedef struct task_struct *(*dl_server_pick_f)(struct sched_dl_entity *);
+
struct sched_dl_entity {
struct rb_node rb_node;
@@ -553,6 +558,7 @@ struct sched_dl_entity {
unsigned intdl_yielded: 1;
unsigned intdl_non_contending : 1;
unsigned intdl_overrun: 1;
+ unsigned intdl_server : 1;
/*
* Bandwidth enforcement timer. Each -deadline task has its
@@ -567,7 +573,20 @@ struct sched_dl_entity {
* timer is needed to decrease the active utilization at the correct
* time.
*/
- struct hrtimer inactive_timer;
+ struct hrtimer inactive_timer;
+
+ /*
+* Bits for DL-server functionality. Also see the comment near
+* dl_server_update().
+*
+* @rq the runqueue this server is for
+*
+* @server_has_tasks() returns true if @server_pick return a
+* runnable task.
+*/
+ struct rq *rq;
+ dl_server_has_tasks_f server_has_tasks;
+ dl_server_pick_fserver_pick;
};
#ifdef CONFIG_UCLAMP_TASK
@@ -680,10 +699,13 @@ struct task_struct {
const struct sched_class*sched_class;
struct sched_entity se;
struct sched_rt_entity rt;
+ struct sched_dl_entity dl;
+
+ struct sched_dl_entity *server;
+
#ifdef CONFIG_CGROUP_SCHED
struct task_group *sched_task_group;
#endif
- struct sched_dl_entity dl;
#ifdef CONFIG_UCLAMP_TASK
/*
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 6b36bf82b53c2..7c471961fd0b8 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -3100,6 +3100,8 @@ static void __sched_fork(unsigned long clone_flags,
struct task_struct *p)
#ifdef CONFIG_SMP
p->wake_entry.u_flags = CSD_TYPE_TTWU;
#endif
+
+ p->server = NULL;
}
DEFINE_STATIC_KEY_FALSE(sched_numa_balancing);
@@ -4348,12 +4350,27 @@ pick_next_task(struct rq *rq, struct task_struct *prev,
struct rq_flags *rf)
p = pick_next_task_idle(rq);
}
+ /*
+* This is the fast path; it cannot be a DL server pick;
+* therefore even if @p == @prev, ->server must be NULL.
+*/
+ if (p->server)
+ p->server = NULL;
+
return p;
}
restart:
put_prev_task_balance(rq, prev, rf);
+ /*
+* We've updated @prev and no longer need the server link, clear it.
+* Must be done before ->pick_next_task() because that can (re)set
+* ->server.
+*/
+ if (prev->server)
+ prev->server = NULL;
+
for_each_class(class) {
p = class->pick_next_task(rq);
if (p)
diff --git a/kernel/sched/deadline.c b/kernel/sched/deadline.c
index d4007d1461522..26dd82f0a586a 100644
--- a/kernel/sched/deadline.c
+++
[RFC PATCH v2 2/6] sched/deadline: Collect sched_dl_entity initialization
From: Peter Zijlstra
Create a single function that initializes a sched_dl_entity.
Signed-off-by: Peter Zijlstra (Intel)
---
kernel/sched/core.c | 5 +
kernel/sched/deadline.c | 22 +++---
kernel/sched/sched.h| 5 +
3 files changed, 17 insertions(+), 15 deletions(-)
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 12e1f3a2cabc6..6b36bf82b53c2 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -3081,10 +3081,7 @@ static void __sched_fork(unsigned long clone_flags,
struct task_struct *p)
memset(>se.statistics, 0, sizeof(p->se.statistics));
#endif
- RB_CLEAR_NODE(>dl.rb_node);
- init_dl_task_timer(>dl);
- init_dl_inactive_task_timer(>dl);
- __dl_clear_params(p);
+ init_dl_entity(>dl);
INIT_LIST_HEAD(>rt.run_list);
p->rt.timeout = 0;
diff --git a/kernel/sched/deadline.c b/kernel/sched/deadline.c
index 2ece83b5991f5..8d909bdb9a119 100644
--- a/kernel/sched/deadline.c
+++ b/kernel/sched/deadline.c
@@ -219,6 +219,8 @@ static void dl_change_utilization(struct task_struct *p,
u64 new_bw)
__add_rq_bw(new_bw, >dl);
}
+static void __dl_clear_params(struct sched_dl_entity *dl_se);
+
/*
* The utilization of a task cannot be immediately removed from
* the rq active utilization (running_bw) when the task blocks.
@@ -317,7 +319,7 @@ static void task_non_contending(struct task_struct *p)
sub_rq_bw(>dl, >dl);
raw_spin_lock(_b->lock);
__dl_sub(dl_b, p->dl.dl_bw, dl_bw_cpus(task_cpu(p)));
- __dl_clear_params(p);
+ __dl_clear_params(dl_se);
raw_spin_unlock(_b->lock);
}
@@ -1123,7 +1125,7 @@ static enum hrtimer_restart dl_task_timer(struct hrtimer
*timer)
return HRTIMER_NORESTART;
}
-void init_dl_task_timer(struct sched_dl_entity *dl_se)
+static void init_dl_task_timer(struct sched_dl_entity *dl_se)
{
struct hrtimer *timer = _se->dl_timer;
@@ -1335,7 +1337,7 @@ static enum hrtimer_restart inactive_task_timer(struct
hrtimer *timer)
raw_spin_lock(_b->lock);
__dl_sub(dl_b, p->dl.dl_bw, dl_bw_cpus(task_cpu(p)));
raw_spin_unlock(_b->lock);
- __dl_clear_params(p);
+ __dl_clear_params(dl_se);
goto unlock;
}
@@ -1351,7 +1353,7 @@ static enum hrtimer_restart inactive_task_timer(struct
hrtimer *timer)
return HRTIMER_NORESTART;
}
-void init_dl_inactive_task_timer(struct sched_dl_entity *dl_se)
+static void init_dl_inactive_task_timer(struct sched_dl_entity *dl_se)
{
struct hrtimer *timer = _se->inactive_timer;
@@ -2741,10 +2743,8 @@ bool __checkparam_dl(const struct sched_attr *attr)
/*
* This function clears the sched_dl_entity static params.
*/
-void __dl_clear_params(struct task_struct *p)
+static void __dl_clear_params(struct sched_dl_entity *dl_se)
{
- struct sched_dl_entity *dl_se = >dl;
-
dl_se->dl_runtime = 0;
dl_se->dl_deadline = 0;
dl_se->dl_period= 0;
@@ -2759,6 +2759,14 @@ void __dl_clear_params(struct task_struct *p)
dl_se->dl_overrun = 0;
}
+void init_dl_entity(struct sched_dl_entity *dl_se)
+{
+ RB_CLEAR_NODE(_se->rb_node);
+ init_dl_task_timer(dl_se);
+ init_dl_inactive_task_timer(dl_se);
+ __dl_clear_params(dl_se);
+}
+
bool dl_param_changed(struct task_struct *p, const struct sched_attr *attr)
{
struct sched_dl_entity *dl_se = >dl;
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index 963c16fc27500..62304d4de99cc 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -255,8 +255,6 @@ struct rt_bandwidth {
unsigned intrt_period_active;
};
-void __dl_clear_params(struct task_struct *p);
-
/*
* To keep the bandwidth of -deadline tasks and groups under control
* we need some place where:
@@ -1939,8 +1937,7 @@ extern void init_rt_bandwidth(struct rt_bandwidth *rt_b,
u64 period, u64 runtime
extern struct dl_bandwidth def_dl_bandwidth;
extern void init_dl_bandwidth(struct dl_bandwidth *dl_b, u64 period, u64
runtime);
-extern void init_dl_task_timer(struct sched_dl_entity *dl_se);
-extern void init_dl_inactive_task_timer(struct sched_dl_entity *dl_se);
+extern void init_dl_entity(struct sched_dl_entity *dl_se);
#define BW_SHIFT 20
#define BW_UNIT(1 << BW_SHIFT)
--
2.26.2
[RFC PATCH v2 0/6] SCHED_DEADLINE server infrastructure
Hi,
This is RFC v2 of Peter's SCHED_DEADLINE server infrastructure
implementation [1].
SCHED_DEADLINE servers can help fixing starvation issues of low priority
tasks (e.g., SCHED_OTHER) when higher priority tasks monopolize CPU
cycles. Today we have RT Throttling; DEADLINE servers should be able to
replace and improve that.
I rebased Peter's patches (adding changelogs where needed) on
tip/sched/core as of today and incorporated fixes to issues discussed
during RFC v1. Current set seems to even boot on real HW! :-)
While playing with RFC v1 set (and discussing it further offline with
Daniel) it has emerged the need to slightly change the behavior. Patch
6/6 is a (cumbersome?) attempt to show what's probably needed.
The problem with "original" implementation is that FIFO tasks might
suffer preemption from NORMAL even when spare CPU cycles are available.
In fact, fair deadline server is enqueued right away when NORMAL tasks
wake up and they are first scheduled by the server, thus potentially
preempting a well behaving FIFO task. This is of course not ideal.
So, in patch 6/6 I propose to use some kind of starvation monitor/
watchdog that delays enqueuing of deadline servers to the point when
fair tasks might start to actually suffer from starvation (just randomly
picked HZ/2 for now). One problem I already see with the current
implementation is that it adds overhead to fair paths, so I'm pretty
sure there are better ways to implement the idea (e.g., Daniel already
suggested using a starvation monitor kthread sort of thing).
Receiving comments and suggestions is the sole purpose of this posting
at this stage. Hopefully we can further discuss the idea at Plumbers in
a few weeks. So, please don't focus too much into actual implementation
(which I plan to revise anyway after I'm back from pto :), but try to
see if this might actually fly. The feature seems to be very much needed.
Thanks!
Juri
1 - https://lore.kernel.org/lkml/20190726145409.947503...@infradead.org/
Juri Lelli (1):
sched/fair: Implement starvation monitor
Peter Zijlstra (5):
sched: Unify runtime accounting across classes
sched/deadline: Collect sched_dl_entity initialization
sched/deadline: Move bandwidth accounting into {en,de}queue_dl_entity
sched/deadline: Introduce deadline servers
sched/fair: Add trivial fair server
include/linux/sched.h| 28 ++-
kernel/sched/core.c | 23 +-
kernel/sched/deadline.c | 483 ---
kernel/sched/fair.c | 136 ++-
kernel/sched/rt.c| 17 +-
kernel/sched/sched.h | 50 +++-
kernel/sched/stop_task.c | 16 +-
7 files changed, 522 insertions(+), 231 deletions(-)
--
2.26.2
[RFC PATCH v2 1/6] sched: Unify runtime accounting across classes
From: Peter Zijlstra
All classes use sched_entity::exec_start to track runtime and have
copies of the exact same code around to compute runtime.
Collapse all that.
Signed-off-by: Peter Zijlstra (Intel)
---
include/linux/sched.h| 2 +-
kernel/sched/deadline.c | 17 +++---
kernel/sched/fair.c | 50 +++-
kernel/sched/rt.c| 17 +++---
kernel/sched/sched.h | 2 ++
kernel/sched/stop_task.c | 16 +
6 files changed, 49 insertions(+), 55 deletions(-)
diff --git a/include/linux/sched.h b/include/linux/sched.h
index a6bf77c346876..f7b9ba04970bc 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -424,7 +424,7 @@ struct sched_statistics {
u64 block_start;
u64 block_max;
- u64 exec_max;
+ s64 exec_max;
u64 slice_max;
u64 nr_migrations_cold;
diff --git a/kernel/sched/deadline.c b/kernel/sched/deadline.c
index 3862a28cd05d0..2ece83b5991f5 100644
--- a/kernel/sched/deadline.c
+++ b/kernel/sched/deadline.c
@@ -1221,9 +1221,8 @@ static void update_curr_dl(struct rq *rq)
{
struct task_struct *curr = rq->curr;
struct sched_dl_entity *dl_se = >dl;
- u64 delta_exec, scaled_delta_exec;
+ s64 delta_exec, scaled_delta_exec;
int cpu = cpu_of(rq);
- u64 now;
if (!dl_task(curr) || !on_dl_rq(dl_se))
return;
@@ -1236,23 +1235,13 @@ static void update_curr_dl(struct rq *rq)
* natural solution, but the full ramifications of this
* approach need further study.
*/
- now = rq_clock_task(rq);
- delta_exec = now - curr->se.exec_start;
- if (unlikely((s64)delta_exec <= 0)) {
+ delta_exec = update_curr_common(rq);
+ if (unlikely(delta_exec <= 0)) {
if (unlikely(dl_se->dl_yielded))
goto throttle;
return;
}
- schedstat_set(curr->se.statistics.exec_max,
- max(curr->se.statistics.exec_max, delta_exec));
-
- curr->se.sum_exec_runtime += delta_exec;
- account_group_exec_runtime(curr, delta_exec);
-
- curr->se.exec_start = now;
- cgroup_account_cputime(curr, delta_exec);
-
if (dl_entity_is_special(dl_se))
return;
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 2ba8f230feb9a..10a230d85104a 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -836,30 +836,58 @@ static void update_tg_load_avg(struct cfs_rq *cfs_rq, int
force)
}
#endif /* CONFIG_SMP */
+static s64 update_curr_se(struct rq *rq, struct sched_entity *curr)
+{
+ u64 now = rq_clock_task(rq);
+ s64 delta_exec;
+
+ delta_exec = now - curr->exec_start;
+ if (unlikely(delta_exec <= 0))
+ return delta_exec;
+
+ curr->exec_start = now;
+ curr->sum_exec_runtime += delta_exec;
+
+ schedstat_set(curr->statistics.exec_max,
+ max(delta_exec, curr->statistics.exec_max));
+
+ return delta_exec;
+}
+
+/*
+ * Used by other classes to account runtime.
+ */
+s64 update_curr_common(struct rq *rq)
+{
+ struct task_struct *curr = rq->curr;
+ s64 delta_exec;
+
+ delta_exec = update_curr_se(rq, >se);
+ if (unlikely(delta_exec <= 0))
+ return delta_exec;
+
+ account_group_exec_runtime(curr, delta_exec);
+ cgroup_account_cputime(curr, delta_exec);
+
+ return delta_exec;
+}
+
/*
* Update the current task's runtime statistics.
*/
static void update_curr(struct cfs_rq *cfs_rq)
{
struct sched_entity *curr = cfs_rq->curr;
- u64 now = rq_clock_task(rq_of(cfs_rq));
- u64 delta_exec;
+ s64 delta_exec;
if (unlikely(!curr))
return;
- delta_exec = now - curr->exec_start;
- if (unlikely((s64)delta_exec <= 0))
+ delta_exec = update_curr_se(rq_of(cfs_rq), curr);
+ if (unlikely(delta_exec <= 0))
return;
- curr->exec_start = now;
-
- schedstat_set(curr->statistics.exec_max,
- max(delta_exec, curr->statistics.exec_max));
-
- curr->sum_exec_runtime += delta_exec;
schedstat_add(cfs_rq->exec_clock, delta_exec);
-
curr->vruntime += calc_delta_fair(delta_exec, curr);
update_min_vruntime(cfs_rq);
diff --git a/kernel/sched/rt.c b/kernel/sched/rt.c
index f215eea6a9661..196171fbf5978 100644
--- a/kernel/sched/rt.c
+++ b/kernel/sched/rt.c
@@ -997,26 +997,15 @@ static void update_curr_rt(struct rq *rq)
{
struct task_struct *curr = rq->curr;
struct sched_rt_entity *rt_se = >rt;
- u64 delta_exec;
- u64 now;
+ s64 delta_exec;
if (curr->sched_class != _sched_class)
return;
-
Re: Re: [PATCH] ALSA: usb-audio: Fix memleak in scarlett2_add_new_ctl
Takashi Iwai ti...@suse.de写道： > On Fri, 07 Aug 2020 09:12:27 +0200, > Dinghao Liu wrote: > > > > When snd_usb_mixer_add_control() fails, elem needs to be > > freed just like when snd_ctl_new1() fails. However, current > > code is returning directly and ends up leaking memory. > > No, this would lead to double-free. snd_ctl_add() shows a kind of > special behavior, it already releases the object at its error path. > It's clear to me, thanks! Regards, Dinghao
drivers/tty/ipwireless/hardware.c:431:30: sparse: sparse: incorrect type in argument 1 (different base types)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 86cfccb66937dd6cbf26ed619958b9e587e6a115 commit: 05933aac7b11911955de307a329dc2a7a14b7bd0 ia64: remove now unused machvec indirections date: 12 months ago config: ia64-randconfig-s031-20200807 (attached as .config) compiler: ia64-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.2-118-ge1578773-dirty git checkout 05933aac7b11911955de307a329dc2a7a14b7bd0 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=ia64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot sparse warnings: (new ones prefixed by >>) >> drivers/tty/ipwireless/hardware.c:431:30: sparse: sparse: incorrect type in >> argument 1 (different base types) @@ expected unsigned short val @@ >> got restricted __le16 [assigned] [usertype] raw_data @@ >> drivers/tty/ipwireless/hardware.c:431:30: sparse: expected unsigned >> short val drivers/tty/ipwireless/hardware.c:431:30: sparse: got restricted __le16 [assigned] [usertype] raw_data drivers/tty/ipwireless/hardware.c:445:30: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned short val @@ got restricted __le16 [assigned] [usertype] raw_data @@ drivers/tty/ipwireless/hardware.c:445:30: sparse: expected unsigned short val drivers/tty/ipwireless/hardware.c:445:30: sparse: got restricted __le16 [assigned] [usertype] raw_data drivers/tty/ipwireless/hardware.c:872:46: sparse: sparse: incorrect type in initializer (different base types) @@ expected restricted __le16 [usertype] raw_data @@ got unsigned int @@ drivers/tty/ipwireless/hardware.c:872:46: sparse: expected restricted __le16 [usertype] raw_data drivers/tty/ipwireless/hardware.c:872:46: sparse: got unsigned int drivers/tty/ipwireless/hardware.c:889:46: sparse: sparse: incorrect type in initializer (different base types) @@ expected restricted __le16 [usertype] raw_data @@ got unsigned int @@ drivers/tty/ipwireless/hardware.c:889:46: sparse: expected restricted __le16 [usertype] raw_data drivers/tty/ipwireless/hardware.c:889:46: sparse: got unsigned int drivers/tty/ipwireless/hardware.c: note: in included file (through arch/ia64/include/asm/io.h, arch/ia64/include/asm/smp.h, include/linux/smp.h, ...): include/asm-generic/io.h:215:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned short [usertype] value @@ got restricted __le16 [usertype] @@ include/asm-generic/io.h:215:22: sparse: expected unsigned short [usertype] value include/asm-generic/io.h:215:22: sparse: got restricted __le16 [usertype] include/asm-generic/io.h:166:15: sparse: sparse: cast to restricted __le16 include/asm-generic/io.h:215:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned short [usertype] value @@ got restricted __le16 [usertype] @@ include/asm-generic/io.h:215:22: sparse: expected unsigned short [usertype] value include/asm-generic/io.h:215:22: sparse: got restricted __le16 [usertype] include/asm-generic/io.h:215:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned short [usertype] value @@ got restricted __le16 [usertype] @@ include/asm-generic/io.h:215:22: sparse: expected unsigned short [usertype] value include/asm-generic/io.h:215:22: sparse: got restricted __le16 [usertype] include/asm-generic/io.h:215:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned short [usertype] value @@ got restricted __le16 [usertype] @@ include/asm-generic/io.h:215:22: sparse: expected unsigned short [usertype] value include/asm-generic/io.h:215:22: sparse: got restricted __le16 [usertype] include/asm-generic/io.h:179:15: sparse: sparse: cast to restricted __le32 include/asm-generic/io.h:166:15: sparse: sparse: cast to restricted __le16 include/asm-generic/io.h:215:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned short [usertype] value @@ got restricted __le16 [usertype] @@ include/asm-generic/io.h:215:22: sparse: expected unsigned short [usertype] value include/asm-generic/io.h:215:22: sparse: got restricted __le16 [usertype] include/asm-generic/io.h:166:15: sparse: sparse: cast to restricted __le16 include/asm-generic/io.h:166:15: sparse: sparse: cast to restricted __le16 include/asm-gener
[PATCH v4 3/4] arm64: dts: rockchip: Add Radxa ROCK Pi 4B support
RockPI 4B has AP6256 Wifi/BT, so enable them in 4B dts
instead of enable in common dtsi.
Signed-off-by: Jagan Teki
---
Changes for v4, v3:
- none
Changes for v2:
- update commit message
- add radxa,rockpi4b
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 23 --
.../boot/dts/rockchip/rk3399-rock-pi-4b.dts | 42 +++
3 files changed, 43 insertions(+), 23 deletions(-)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 42f9e1861461..8832d05c2571 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -34,6 +34,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index e163f438f836..678a336010bf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -584,17 +584,6 @@ {
pinctrl-names = "default";
pinctrl-0 = <_bus4 _cmd _clk>;
sd-uhs-sdr104;
- status = "okay";
-
- brcmf: wifi@1 {
- compatible = "brcm,bcm4329-fmac";
- reg = <1>;
- interrupt-parent = <>;
- interrupts = ;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <_host_wake_l>;
- };
};
{
@@ -663,18 +652,6 @@ u2phy1_host: host-port {
{
pinctrl-names = "default";
pinctrl-0 = <_xfer _cts _rts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = < 1>;
- clock-names = "ext_clock";
- device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
- };
};
{
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
new file mode 100644
index ..f0055ce2fda0
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Akash Gajjar
+ * Copyright (c) 2019 Pragnesh Patel
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4B";
+ compatible = "radxa,rockpi4b", "radxa,rockpi4", "rockchip,rk3399";
+};
+
+ {
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <>;
+ interrupts = ;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l>;
+ };
+};
+
+ {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
+ };
+};
--
2.25.1
[PATCH v4 2/4] arm64: dts: rockchip: Mark rock-pi-4 as rock-pi-4a dts
ROCKPi 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.
- ROCKPi 4A has no Wif/BT.
- ROCKPi 4B has AP6256 Wifi/BT, PoE.
- ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C
So move common nodes, properties into dtsi file and include
on respective variant dts files.
Signed-off-by: Jagan Teki
---
Changes for v4, v3:
- none
Changes for v2:
- update commit message
- add radxa,rockpi4a
arch/arm64/boot/dts/rockchip/Makefile | 2 +-
.../{rk3399-rock-pi-4.dts => rk3399-rock-pi-4.dtsi} | 3 ---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts | 13 +
3 files changed, 14 insertions(+), 4 deletions(-)
rename arch/arm64/boot/dts/rockchip/{rk3399-rock-pi-4.dts =>
rk3399-rock-pi-4.dtsi} (99%)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index b87b1f773083..42f9e1861461 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -33,7 +33,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
similarity index 99%
rename from arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
rename to arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index 60f98a3e19d8..e163f438f836 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -11,9 +11,6 @@
#include "rk3399-opp.dtsi"
/ {
- model = "Radxa ROCK Pi 4";
- compatible = "radxa,rockpi4", "rockchip,rk3399";
-
chosen {
stdout-path = "serial2:150n8";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
new file mode 100644
index ..89f2af5e111d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Akash Gajjar
+ * Copyright (c) 2019 Pragnesh Patel
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4A";
+ compatible = "radxa,rockpi4a", "radxa,rockpi4", "rockchip,rk3399";
+};
--
2.25.1
Re: [PATCH] tty: Add MOXA NPort Real TTY Driver
On Fri, Aug 07, 2020 at 09:18:57AM +, Johnson CH Chen (陳昭勳) wrote:
> > > + if (info->modem_control & UART_MCR_RTS)
> > > + nd->cmd_buffer[6] = 1;
> > > + else
> > > + nd->cmd_buffer[6] = 0;
> > > +
> > > + if (termio->c_cflag & CRTSCTS) {
> > > + nd->cmd_buffer[7] = 1;
> > > + nd->cmd_buffer[8] = 1;
> > > + } else {
> > > + nd->cmd_buffer[7] = 0;
> > > + nd->cmd_buffer[8] = 0;
> > > + }
> > > +
> > > + if (termio->c_iflag & IXON)
> > > + nd->cmd_buffer[9] = 1;
> > > + else
> > > + nd->cmd_buffer[9] = 0;
> > > +
> > > + if (termio->c_iflag & IXOFF)
> > > + nd->cmd_buffer[10] = 1;
> > > + else
> > > + nd->cmd_buffer[10] = 0;
> >
> > What is this cmd_buffer good for actually? Only to let the user know?
> > Then -- drop it.
>
> Because detailed iterations for cmd_buffer and cmd_rsp with Nport
> server device are regarded proprietary for our company, is it good to
> reveal value of cmd_buffer[] with macros only for upstream this
> driver?
There is nothing "proprietary" for Linux kernel code, sorry. Please
document this properly so we can understand, review, and maintain it
over time correctly.
thanks,
greg k-h
[PATCH v4 1/4] dt-bindings: arm: rockchip: Update ROCKPi 4 binding
ROCKPi 4 has 3 variants of hardware platforms called ROCKPi 4A, 4B, and 4C. - ROCKPi 4A has no Wif/BT. - ROCKPi 4B has AP6256 Wifi/BT, PoE. - ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled GPIO pin change compared to 4B, 4C So, update the existing ROCKPi 4 binding to support ROCKPi 4A/B/C hardware platforms. Signed-off-by: Jagan Teki --- Changes for v4: - update binding to satisfy dt_binding_check. Changes for v3: - new patch Documentation/devicetree/bindings/arm/rockchip.yaml | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index db2e35796795..7025d00c06cc 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -430,8 +430,12 @@ properties: - const: radxa,rock - const: rockchip,rk3188 - - description: Radxa ROCK Pi 4 + - description: Radxa ROCK Pi 4A/B/C items: + - enum: + - radxa,rockpi4a + - radxa,rockpi4b + - radxa,rockpi4c - const: radxa,rockpi4 - const: rockchip,rk3399 -- 2.25.1
[PATCH v4 4/4] arm64: dts: rockchip: Add Radxa ROCK Pi 4C support
Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.
So, add or enable difference nodes/properties in 4C dts
by including common dtsi.
Signed-off-by: Jagan Teki
---
Changes for v4, v3:
- none
Changes for v2:
- update commit message
- add radxa,rockpi4c
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3399-rock-pi-4c.dts | 51 +++
2 files changed, 52 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 8832d05c2571..02cdb3c4a6c1 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -35,6 +35,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
new file mode 100644
index ..4c7ebb1c5d2d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Radxa Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4C";
+ compatible = "radxa,rockpi4c", "radxa,rockpi4", "rockchip,rk3399";
+};
+
+ {
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <>;
+ interrupts = ;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l>;
+ };
+};
+
+ {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
+ };
+};
+
+_host {
+ gpio = < RK_PD6 GPIO_ACTIVE_HIGH>;
+};
+
+_host_en {
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO _pull_none>;
+};
--
2.25.1
Re: [PATCH 3/5] net: Set fput_needed iff FDPUT_FPUT is set
Al Viro wrote:
>On Thu, Aug 06, 2020 at 12:59:16PM +0100, Al Viro wrote:
>> On Thu, Aug 06, 2020 at 07:53:16PM +0800, linmiaohe wrote:
>> > From: Miaohe Lin
>> >
>> > We should fput() file iff FDPUT_FPUT is set. So we should set
>> > fput_needed accordingly.
>> >
>> > Fixes: 00e188ef6a7e ("sockfd_lookup_light(): switch to fdget^W^Waway
>> > from fget_light")
>>
>> Explain, please. We are getting it from fdget(); what else can we get in
>> flags there?
>
>FWIW, struct fd ->flags may have two bits set: FDPUT_FPUT and FDPUT_POS_UNLOCK.
>The latter is set only by __fdget_pos() and its callers, and that only for
>regular files and directories.
>
>Nevermind that sockfd_lookup_light() does *not* use ..._pos() family of
>primitives, even if it started to use e.g. fdget_pos() it *still* would not
>end up with anything other than FDPUT_FPUT to deal with on that path - it
>checks that what it got is a socket. Anything else is dropped right there,
>without leaving fput() to caller.
>
>So could you explain what exactly the bug is - if you are seeing some breakage
>and this patch fixes it, something odd is definitely going on and it would be
>nice to figure out what that something is.
I'am sorry, but I did not find something odd. I do this because this would make
code more clear and consistent. It's pure a clean up patch.
Maybe Fixes tag makes this looks like a bugfix.
Thanks for your reply and detailed explaination. :)
And sorry for my rookie mistake, I wasn't meant to make these as a patch set...
Re: [PATCH 1/5] net: Fix potential deadloop in skb_copy_ubufs()
Willem de Bruijn wrote:
>On Thu, Aug 6, 2020 at 1:48 PM linmiaohe wrote:
>>
>> From: Miaohe Lin
>>
>> We could be trapped in deadloop when we try to copy userspace skb
>> frags buffers to kernel with a cloned skb:
>
>> Catch this unexpected case and return -EINVAL in skb_orphan_frags()
>> before we call skb_copy_ubufs() to fix it.
>
>Is this a hypothetical codepath?
>
>skb zerocopy carefully tracks clone calls where necessary. See the call to
>skb_orphan_frags in skb_clone, and the implementation of that callee.
>
>The only caller of skb zerocopy with nouarg is tpacket_fill_skb, as of commit
>5cd8d46ea156 ("packet: copy user buffers before orphan or clone").
>
>As the commit subject indicates, this sets skb_zcopy_set_nouarg exactly to be
>sure that any clone will trigger a copy of "zerocopy"
>user data to private kernel memory.
>
>No clone must happen between alloc_skb and skb_zcopy_set_nouarg, indeed. But
>AFAIK, none exists.
Many thanks for your reply and explaination. As you say, this is a hypothetical
codepath. This would not be triggerd normally.
I catch this suspicious patch just in case.
Re: [PATCH 4/4] MIPS: BCM63xx: refactor board declarations
在 2020/8/7 下午5:38, Álvaro Fernández Rojas 写道: Current board declarations are a mess. Let's put some order and make them follow the same structure. Also remove board declarations tabs and double whitespace in the header. Signed-off-by: Álvaro Fernández Rojas --- arch/mips/bcm63xx/boards/board_bcm963xx.c | 617 +++--- 1 file changed, 306 insertions(+), 311 deletions(-) diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c index ac9570b66f37..36dd356374b1 100644 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c @@ -1,6 +1,6 @@ /* * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive + * License. See the file "COPYING" in the main directory of this archive You'd better replace licenses text with SPDX identifier. * for more details. * * Copyright (C) 2008 Maxime Bizon @@ -41,30 +41,28 @@ static struct board_info board; */ Thanks - Jiaxun
[PATCH] kernel/debug: Fix spelling mistake in debug_core.c
Fix typo: "notifiter" --> "notifier"
"overriden" --> "overridden"
Signed-off-by: Youling Tang
---
kernel/debug/debug_core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/kernel/debug/debug_core.c b/kernel/debug/debug_core.c
index b16dbc1..30a 100644
--- a/kernel/debug/debug_core.c
+++ b/kernel/debug/debug_core.c
@@ -80,7 +80,7 @@ static intexception_level;
struct kgdb_io *dbg_io_ops;
static DEFINE_SPINLOCK(kgdb_registration_lock);
-/* Action for the reboot notifiter, a global allow kdb to change it */
+/* Action for the reboot notifier, a global allow kdb to change it */
static int kgdbreboot;
/* kgdb console driver is loaded */
static int kgdb_con_registered;
@@ -163,7 +163,7 @@ early_param("nokgdbroundup", opt_nokgdbroundup);
/*
* Weak aliases for breakpoint management,
- * can be overriden by architectures when needed:
+ * can be overridden by architectures when needed:
*/
int __weak kgdb_arch_set_breakpoint(struct kgdb_bkpt *bpt)
{
--
2.1.0
