RE: [PATCH v2 3/3] scsi: ufs: Introduce event_notify variant function
Hi Avri, On Thu, 2020-12-03 at 07:32 +, Avri Altman wrote: > > > > Introduce event_notify variant function to allow > > vendor to get notification of important events and connect > > to vendor-specific debugging facilities. > You need to add an implementation of this vop, > otherwise it's just dead code. Sure, I will post it by new version. Thanks, Stanley Chu
Re: [PATCH v2 1/2] x86: make VMware support optional
On Wed, Dec 02, 2020 at 10:19:48PM +0100, Enrico Weigelt, metux IT consult wrote: > Make it possible to opt-out from VMware support, for minimized kernels > that never will be run under Vmware (eg. high-density virtualization > or embedded systems). > > Average distro kernel will leave it on, therefore default to y. > > Signed-off-by: Enrico Weigelt > --- > arch/x86/Kconfig | 11 +++ > arch/x86/kernel/cpu/Makefile | 4 +++- > arch/x86/kernel/cpu/hypervisor.c | 2 ++ > drivers/input/mouse/Kconfig | 2 +- > drivers/misc/Kconfig | 2 +- > drivers/ptp/Kconfig | 2 +- > 6 files changed, 19 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index f6946b81f74a..eff12460cb3c 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -801,6 +801,17 @@ config X86_HV_CALLBACK_VECTOR > > source "arch/x86/xen/Kconfig" > > +config VMWARE_GUEST > + bool "VMware Guest support" > + default y > + help > + This option enables several optimizations for running under the > + VMware hypervisor. > + > + Disabling it saves a few kb, for stripped down kernels eg. in high I was actually expecting for you to do your own measurements and show data. Anyway, I did it for you: textdata bss dec hex filename 15949304127806978 36597916180354198 abffc96 vmlinux.before 15947650127802430 36602012180352092 abff45c vmlinux.after this is with my .config. How much is it with a stripped down kernel? I bet it is even less. Which makes this whole effort not worth it... Also, when you send a new version of your patches, please rework *all* review feedback you've received on the previous one. Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette
Re: [RFC 1/2] perf core: Add PERF_COUNT_SW_CGROUP_SWITCHES event
On Thu, Dec 03, 2020 at 11:10:30AM +0900, Namhyung Kim wrote:
> On Thu, Dec 3, 2020 at 1:19 AM Peter Zijlstra wrote:
>
> > diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
> > index 9a38f579bc76..5eb284819ee5 100644
> > --- a/include/linux/perf_event.h
> > +++ b/include/linux/perf_event.h
> > @@ -1174,25 +1174,19 @@ DECLARE_PER_CPU(struct pt_regs, __perf_regs[4]);
> > * which is guaranteed by us not actually scheduling inside other swevents
> > * because those disable preemption.
> > */
> > -static __always_inline void
> > -perf_sw_event_sched(u32 event_id, u64 nr, u64 addr)
> > +static __always_inline void __perf_sw_event_sched(u32 event_id, u64 nr,
> > u64 addr)
>
> It'd be nice to avoid the __ prefix if possible.
Not having __ would seem to suggest its a function of generic utility.
Still, *shrug* ;-)
> > {
> > - if
> > (static_key_false(&perf_swevent_enabled[PERF_COUNT_SW_CPU_MIGRATIONS]))
> > - return true;
> > - return false;
> > + return static_key_false(&perf_swevent_enabled[swevt]);
> > }
> >
> > static inline void perf_event_task_migrate(struct task_struct *task)
> > @@ -1207,11 +1201,9 @@ static inline void perf_event_task_sched_in(struct
> > task_struct *prev,
> > if (static_branch_unlikely(&perf_sched_events))
> > __perf_event_task_sched_in(prev, task);
> >
> > - if (perf_sw_migrate_enabled() && task->sched_migrated) {
> > - struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]);
> > -
> > - perf_fetch_caller_regs(regs);
> > - ___perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, regs, 0);
> > + if (__perf_sw_enabled(PERF_COUNT_SW_CPU_MIGRATIONS) &&
> > + task->sched_migrated) {
>
> It seems task->sched_migrate is set only if the event is enabled,
> then can we just check the value here?
Why suffer the unconditional load and test? Your L1 too big?
> > + __perf_sw_event_sched(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 0);
> > task->sched_migrated = 0;
> > }
> > }
> > @@ -1219,7 +1211,13 @@ static inline void perf_event_task_sched_in(struct
> > task_struct *prev,
> > static inline void perf_event_task_sched_out(struct task_struct *prev,
> > struct task_struct *next)
> > {
> > - perf_sw_event_sched(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, 0);
> > + if (__perf_sw_enabled(PERF_COUNT_SW_CONTEXT_SWITCHES))
> > + __perf_sw_event_sched(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, 0);
> > +
> > + if (__perf_sw_enabled(PERF_COUNT_SW_CGROUP_SWITCHES) &&
> > + (task_css_check(prev, perf_event_cgrp_id, 1)->cgroup !=
> > +task_css_check(next, perf_event_cgrp_id, 1)->cgroup))
> > + __perf_sw_event_sched(PERF_COUNT_SW_CGROUP_SWITCHES, 1, 0);
>
> I was not clear about the RCU protection here. Is it ok to access
> the task's css_set directly?
We're here with preemption and IRQs disabled, good luck trying to get
RCU to consider that not a critical section and spirit things away under
us.
Re: [v6,3/3] reset-controller: ti: force the write operation when assert or deassert
On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > Force the write operation in case the read already happens > to return the correct value. > > Signed-off-by: Crystal Guo > --- > drivers/reset/reset-ti-syscon.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > index 5d1f8306cd4f..c34394f1e9e2 100644 > --- a/drivers/reset/reset-ti-syscon.c > +++ b/drivers/reset/reset-ti-syscon.c > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct > reset_controller_dev *rcdev, > mask = BIT(control->assert_bit); > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, > value); > + return regmap_write_bits(data->regmap, control->assert_offset, mask, > value); > } > > /** > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct > reset_controller_dev *rcdev, > mask = BIT(control->deassert_bit); > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, > value); > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, > value); > } > > /** > -- > 2.18.0 Thank you. Since Suman tested v4, this should be safe. Applied to reset/next. regards Philipp
[PATCH] spi: spi-geni-qcom: Fix NULL pointer access in geni_spi_isr
Here, there is a chance of race condition occurrence which leads to
NULL pointer dereference with struct spi_geni_master member 'cur_xfer'
between setup_fifo_xfer() and handle_fifo_timeout() functions.
Fix this race condition with guarding the 'cur_xfer' where it gets updated,
with spin_lock_irq/spin_unlock_irq in setup_fifo_xfer() as we do in
handle_fifo_timeout() function.
Call trace:
geni_spi_isr+0x114/0x34c
__handle_irq_event_percpu+0xe0/0x23c
handle_irq_event_percpu+0x34/0x8c
handle_irq_event+0x48/0x94
handle_fasteoi_irq+0xd0/0x140
__handle_domain_irq+0x8c/0xcc
gic_handle_irq+0x114/0x1dc
el1_irq+0xcc/0x180
geni_spi a8.spi: Failed to cancel/abort m_cmd
dev_watchdog+0x348/0x354
call_timer_fn+0xc4/0x220
__run_timers+0x228/0x2d4
spi_master spi6: failed to transfer one message from queue
run_timer_softirq+0x24/0x44
__do_softirq+0x16c/0x344
irq_exit+0xa8/0xac
__handle_domain_irq+0x94/0xcc
gic_handle_irq+0x114/0x1dc
el1_irq+0xcc/0x180
cpuidle_enter_state+0xf8/0x204
cpuidle_enter+0x38/0x4c
cros-ec-spi spi6.0: spi transfer failed: -110
...
Fixes: 2ee471a1e28e ("spi: spi-geni-qcom: Mo' betta locking")
Signed-off-by: Roja Rani Yarubandi
---
drivers/spi/spi-geni-qcom.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index 25810a7eef10..e65d6676602b 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/spi/spi-geni-qcom.c
@@ -457,7 +457,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer,
len = xfer->len / (mas->cur_bits_per_word / BITS_PER_BYTE + 1);
len &= TRANS_LEN_MSK;
- mas->cur_xfer = xfer;
if (xfer->tx_buf) {
m_cmd |= SPI_TX_ONLY;
mas->tx_rem_bytes = xfer->len;
@@ -475,6 +474,7 @@ static void setup_fifo_xfer(struct spi_transfer *xfer,
* interrupt could come in at any time now.
*/
spin_lock_irq(&mas->lock);
+ mas->cur_xfer = xfer;
geni_se_setup_m_cmd(se, m_cmd, FRAGMENTATION);
/*
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
[RESEND PATCH 2/2] clk: axi-clkgen: move the OF table at the bottom of the file
The change is mostly cosmetic. No functional changes.
Since the driver now uses of_device_get_match_data() to obtain some driver
specific info, there is no need to define the OF table before the probe
function.
Signed-off-by: Alexandru Ardelean
---
drivers/clk/clk-axi-clkgen.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/clk-axi-clkgen.c b/drivers/clk/clk-axi-clkgen.c
index 963a62e9c728..ad86e031ba3e 100644
--- a/drivers/clk/clk-axi-clkgen.c
+++ b/drivers/clk/clk-axi-clkgen.c
@@ -496,15 +496,6 @@ static const struct clk_ops axi_clkgen_ops = {
.get_parent = axi_clkgen_get_parent,
};
-static const struct of_device_id axi_clkgen_ids[] = {
- {
- .compatible = "adi,axi-clkgen-2.00.a",
- .data = &axi_clkgen_zynq_default_limits,
- },
- { },
-};
-MODULE_DEVICE_TABLE(of, axi_clkgen_ids);
-
static int axi_clkgen_probe(struct platform_device *pdev)
{
const struct axi_clkgen_limits *dflt_limits;
@@ -568,6 +559,15 @@ static int axi_clkgen_remove(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id axi_clkgen_ids[] = {
+ {
+ .compatible = "adi,axi-clkgen-2.00.a",
+ .data = &axi_clkgen_zynq_default_limits,
+ },
+ { }
+};
+MODULE_DEVICE_TABLE(of, axi_clkgen_ids);
+
static struct platform_driver axi_clkgen_driver = {
.driver = {
.name = "adi-axi-clkgen",
--
2.27.0
[RESEND PATCH 1/2] clk: axi-clkgen: wrap limits in a struct and keep copy on the state object
Up until the these limits were global/hard-coded, since they are typically
limits of the fabric.
However, since this is an FPGA generated clock, this may run on setups
where one clock is on a fabric, and another one synthesized on another
fabric connected via PCIe (or some other inter-connect, and then these
limits need to be adjusted for each instance of the AXI CLKGEN.
This change wraps the current constants in 'axi_clkgen_limits' struct and
the 'axi_clkgen' instance keeps a copy of these limits, which is
initialized at probe from the default limits.
The limits are stored on the device-tree OF table, so that we can adjust
them via the compatible string.
Signed-off-by: Alexandru Ardelean
---
Initial send:
https://lore.kernel.org/linux-clk/20201019111809.56374-1-alexandru.ardel...@analog.com/
drivers/clk/clk-axi-clkgen.c | 48 +++-
1 file changed, 31 insertions(+), 17 deletions(-)
diff --git a/drivers/clk/clk-axi-clkgen.c b/drivers/clk/clk-axi-clkgen.c
index 14d803e6af62..963a62e9c728 100644
--- a/drivers/clk/clk-axi-clkgen.c
+++ b/drivers/clk/clk-axi-clkgen.c
@@ -46,9 +46,17 @@
#define MMCM_CLK_DIV_DIVIDEBIT(11)
#define MMCM_CLK_DIV_NOCOUNT BIT(12)
+struct axi_clkgen_limits {
+ unsigned int fpfd_min;
+ unsigned int fpfd_max;
+ unsigned int fvco_min;
+ unsigned int fvco_max;
+};
+
struct axi_clkgen {
void __iomem *base;
struct clk_hw clk_hw;
+ struct axi_clkgen_limits limits;
};
static uint32_t axi_clkgen_lookup_filter(unsigned int m)
@@ -100,12 +108,15 @@ static uint32_t axi_clkgen_lookup_lock(unsigned int m)
return 0x1f1f00fa;
}
-static const unsigned int fpfd_min = 1;
-static const unsigned int fpfd_max = 30;
-static const unsigned int fvco_min = 60;
-static const unsigned int fvco_max = 120;
+static const struct axi_clkgen_limits axi_clkgen_zynq_default_limits = {
+ .fpfd_min = 1,
+ .fpfd_max = 30,
+ .fvco_min = 60,
+ .fvco_max = 120,
+};
-static void axi_clkgen_calc_params(unsigned long fin, unsigned long fout,
+static void axi_clkgen_calc_params(const struct axi_clkgen_limits *limits,
+ unsigned long fin, unsigned long fout,
unsigned int *best_d, unsigned int *best_m, unsigned int *best_dout)
{
unsigned long d, d_min, d_max, _d_min, _d_max;
@@ -122,12 +133,12 @@ static void axi_clkgen_calc_params(unsigned long fin,
unsigned long fout,
*best_m = 0;
*best_dout = 0;
- d_min = max_t(unsigned long, DIV_ROUND_UP(fin, fpfd_max), 1);
- d_max = min_t(unsigned long, fin / fpfd_min, 80);
+ d_min = max_t(unsigned long, DIV_ROUND_UP(fin, limits->fpfd_max), 1);
+ d_max = min_t(unsigned long, fin / limits->fpfd_min, 80);
again:
- fvco_min_fract = fvco_min << fract_shift;
- fvco_max_fract = fvco_max << fract_shift;
+ fvco_min_fract = limits->fvco_min << fract_shift;
+ fvco_max_fract = limits->fvco_max << fract_shift;
m_min = max_t(unsigned long, DIV_ROUND_UP(fvco_min_fract, fin) * d_min,
1);
m_max = min_t(unsigned long, fvco_max_fract * d_max / fin, 64 <<
fract_shift);
@@ -319,6 +330,7 @@ static int axi_clkgen_set_rate(struct clk_hw *clk_hw,
unsigned long rate, unsigned long parent_rate)
{
struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw);
+ const struct axi_clkgen_limits *limits = &axi_clkgen->limits;
unsigned int d, m, dout;
struct axi_clkgen_div_params params;
uint32_t power = 0;
@@ -328,7 +340,7 @@ static int axi_clkgen_set_rate(struct clk_hw *clk_hw,
if (parent_rate == 0 || rate == 0)
return -EINVAL;
- axi_clkgen_calc_params(parent_rate, rate, &d, &m, &dout);
+ axi_clkgen_calc_params(limits, parent_rate, rate, &d, &m, &dout);
if (d == 0 || dout == 0 || m == 0)
return -EINVAL;
@@ -368,10 +380,12 @@ static int axi_clkgen_set_rate(struct clk_hw *clk_hw,
static long axi_clkgen_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
+ struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(hw);
+ const struct axi_clkgen_limits *limits = &axi_clkgen->limits;
unsigned int d, m, dout;
unsigned long long tmp;
- axi_clkgen_calc_params(*parent_rate, rate, &d, &m, &dout);
+ axi_clkgen_calc_params(limits, *parent_rate, rate, &d, &m, &dout);
if (d == 0 || dout == 0 || m == 0)
return -EINVAL;
@@ -485,6 +499,7 @@ static const struct clk_ops axi_clkgen_ops = {
static const struct of_device_id axi_clkgen_ids[] = {
{
.compatible = "adi,axi-clkgen-2.00.a",
+ .data = &axi_clkgen_zynq_default_limits,
},
{ },
};
@@ -492,7 +507,7 @@ MODULE_DEVICE_TABLE(of, axi_clkgen_ids);
static int axi_clkgen_probe(struct platform_device *pdev)
{
- const struct of_device_id *id;
+
Re: [drm/fb] 1d46491d4a: WARNING:at_drivers/gpu/drm/drm_fb_helper.c:#drm_fb_helper_damage_work[drm_kms_helper]
Hi
there should be a line in the kernel log that says something like
"Damage blitter failed" with an error code. Is there any chance of
recovering it?
Best regards
Thomas
Am 02.12.20 um 03:29 schrieb kernel test robot:
Greeting,
FYI, we noticed the following commit (built with gcc-9):
commit: 1d46491d4a08d7ee657e09808f87d169444a2652 ("drm/fb-helper: Move damage blit
code and its setup into separate routine")
https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git master
in testcase: locktorture
version:
with following parameters:
runtime: 300s
test: cpuhotplug
test-description: This torture test consists of creating a number of kernel
threads which acquire the lock and hold it for specific amount of time, thus
simulating different critical region behaviors.
test-url: https://www.kernel.org/doc/Documentation/locking/locktorture.txt
on test machine: qemu-system-i386 -enable-kvm -cpu SandyBridge -smp 2 -m 8G
caused below changes (please refer to attached dmesg/kmsg for entire
log/backtrace):
+---+++
|
| fd2d856538 | 1d46491d4a |
+---+++
|
WARNING:at_drivers/gpu/drm/drm_fb_helper.c:#drm_fb_helper_damage_work[drm_kms_helper]
| 0 | 26 |
| EIP:drm_fb_helper_damage_work
| 0 | 26 |
+---+++
If you fix the issue, kindly add following tag
Reported-by: kernel test robot
[ 28.261007] WARNING: CPU: 0 PID: 122 at drivers/gpu/drm/drm_fb_helper.c:434
drm_fb_helper_damage_work+0x109/0x2d0 [drm_kms_helper]
[ 28.263802] Modules linked in: locktorture(E) torture(E) mousedev(E)
ppdev(E) psmouse(E) crc32c_intel(E) input_leds(E) bochs_drm(E)
drm_vram_helper(E) drm_ttm_helper(E) ttm(E) drm_kms_helper(E) parport_pc(E)
rtc_cmos(E) parport(E) drm(E) evbug(E) i6300esb(E) i2c_piix4(E) autofs4(E)
[ 28.271897] CPU: 0 PID: 122 Comm: kworker/0:2 Tainted: GE
5.10.0-rc3-01102-g1d46491d4a08 #1
[ 28.273904] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS
1.12.0-1 04/01/2014
[ 28.275819] Workqueue: events drm_fb_helper_damage_work [drm_kms_helper]
[ 28.279884] EIP: drm_fb_helper_damage_work+0x109/0x2d0 [drm_kms_helper]
[ 28.281467] Code: 47 10 8b 58 2c 85 db 0f 84 bc 01 00 00 e8 1f f0 da f4 89 74 24
0c 89 5c 24 08 89 44 24 04 c7 04 24 98 c1 40 df e8 f7 50 1d f5 <0f> 0b 31 c9 c7
04 24 01 00 00 00 ba 01 00 00 00 b8 3c e8 40 df e8
[ 28.285055] EAX: 0036 EBX: c1c91420 ECX: EDX:
[ 28.289443] ESI: fff4 EDI: d2014000 EBP: d2c0dee4 ESP: d2c0de9c
[ 28.291058] DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068 EFLAGS: 00010292
[ 28.292717] CR0: 80050033 CR2: b727a028 CR3: 12141000 CR4: 00040690
[ 28.294316] DR0: DR1: DR2: DR3:
[ 28.295915] DR6: fffe0ff0 DR7: 0400
[ 28.300768] Call Trace:
[ 28.302117] process_one_work+0x31b/0x7b0
[ 28.303532] ? process_one_work+0x272/0x7b0
[ 28.304976] worker_thread+0x29a/0x5d0
[ 28.308712] ? process_one_work+0x7b0/0x7b0
[ 28.310129] kthread+0x181/0x1a0
[ 28.311464] ? process_one_work+0x7b0/0x7b0
[ 28.312878] ? kthread_create_worker_on_cpu+0x30/0x30
[ 28.314318] ret_from_fork+0x1c/0x28
[ 28.315645] CPU: 0 PID: 122 Comm: kworker/0:2 Tainted: GE
5.10.0-rc3-01102-g1d46491d4a08 #1
[ 28.317414] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS
1.12.0-1 04/01/2014
[ 28.319096] Workqueue: events drm_fb_helper_damage_work [drm_kms_helper]
[ 28.320674] Call Trace:
[ 28.321947] dump_stack+0x6d/0x8b
[ 28.323278] __warn.cold+0x24/0x49
[ 28.324639] ? drm_fb_helper_damage_work+0x109/0x2d0 [drm_kms_helper]
[ 28.326167] ? drm_fb_helper_damage_work+0x109/0x2d0 [drm_kms_helper]
[ 28.327670] ? drm_fb_helper_damage_work+0x109/0x2d0 [drm_kms_helper]
[ 28.329165] report_bug+0xb0/0xf0
[ 28.330438] ? irq_work_queue+0x13/0x70
[ 28.331729] ? exc_overflow+0x60/0x60
[ 28.333002] handle_bug+0x2a/0x50
[ 28.334227] exc_invalid_op+0x28/0x80
[ 28.335462] handle_exception+0x15d/0x15d
[ 28.336729] EIP: drm_fb_helper_damage_work+0x109/0x2d0 [drm_kms_helper]
[ 28.338148] Code: 47 10 8b 58 2c 85 db 0f 84 bc 01 00 00 e8 1f f0 da f4 89 74 24
0c 89 5c 24 08 89 44 24 04 c7 04 24 98 c1 40 df e8 f7 50 1d f5 <0f> 0b 31 c9 c7
04 24 01 00 00 00 ba 01 00 00 00 b8 3c e8 40 df e8
[ 28.341442] EAX: 0036 EBX: c1c91420 ECX: EDX:
[ 28.342910] ESI: fff4 EDI: d2014000 EBP: d2c0dee4 ESP: d2c0de9c
[ 28.344372] DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068 EFLAGS: 00010292
[ 28.3458
linux-next: build warning after merge of the rdma tree
Hi all,
After merging the rdma tree, today's linux-next build (htmldocs) produced
this warning:
drivers/infiniband/core/verbs.c:1206: warning: Function parameter or member
'caller' not described in 'ib_create_named_qp'
Introduced by commit
66f57b871efc ("RDMA/restrack: Support all QP types")
--
Cheers,
Stephen Rothwell
pgp8kvZS5UzNT.pgp
Description: OpenPGP digital signature
Re: [PATCH v2 5/6] drm/imx: Introduce i.MX8qm/qxp DPU DRM
Hi Liu, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on shawnguo/for-next] [also build test WARNING on robh/for-next soc/for-next clk/clk-next linus/master v5.10-rc6 next-20201201] [cannot apply to xlnx/master] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Liu-Ying/drm-imx-Introduce-i-MX8qm-qxp-DPU-DRM/20201203-111805 base: https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next config: arm-allyesconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/9782ac29f477208d26405e56ccaa08703bef8354 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Liu-Ying/drm-imx-Introduce-i-MX8qm-qxp-DPU-DRM/20201203-111805 git checkout 9782ac29f477208d26405e56ccaa08703bef8354 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): >> drivers/gpu/drm/imx/dpu/dpu-gammacor.c:34: warning: "MODE_MASK" redefined 34 | #define MODE_MASK BIT(0) | In file included from arch/arm/include/asm/ptrace.h:10, from arch/arm/include/asm/irqflags.h:7, from include/linux/irqflags.h:16, from arch/arm/include/asm/bitops.h:28, from include/linux/bitops.h:29, from include/linux/kernel.h:12, from include/asm-generic/bug.h:20, from arch/arm/include/asm/bug.h:60, from include/linux/bug.h:5, from include/linux/io.h:11, from drivers/gpu/drm/imx/dpu/dpu-gammacor.c:7: arch/arm/include/uapi/asm/ptrace.h:67: note: this is the location of the previous definition 67 | #define MODE_MASK 0x001f | -- >> drivers/gpu/drm/imx/dpu/dpu-hscaler.c:23: warning: "MODE_MASK" redefined 23 | #define MODE_MASK 0x1 | In file included from arch/arm/include/asm/ptrace.h:10, from arch/arm/include/asm/irqflags.h:7, from include/linux/irqflags.h:16, from arch/arm/include/asm/bitops.h:28, from include/linux/bitops.h:29, from include/linux/kernel.h:12, from include/asm-generic/bug.h:20, from arch/arm/include/asm/bug.h:60, from include/linux/bug.h:5, from include/linux/io.h:11, from drivers/gpu/drm/imx/dpu/dpu-hscaler.c:7: arch/arm/include/uapi/asm/ptrace.h:67: note: this is the location of the previous definition 67 | #define MODE_MASK 0x001f | -- >> drivers/gpu/drm/imx/dpu/dpu-layerblend.c:32: warning: "MODE_MASK" redefined 32 | #define MODE_MASKBIT(0) | In file included from arch/arm/include/asm/ptrace.h:10, from arch/arm/include/asm/irqflags.h:7, from include/linux/irqflags.h:16, from arch/arm/include/asm/bitops.h:28, from include/linux/bitops.h:29, from include/linux/kernel.h:12, from include/asm-generic/bug.h:20, from arch/arm/include/asm/bug.h:60, from include/linux/bug.h:5, from include/linux/io.h:11, from drivers/gpu/drm/imx/dpu/dpu-layerblend.c:8: arch/arm/include/uapi/asm/ptrace.h:67: note: this is the location of the previous definition 67 | #define MODE_MASK 0x001f | -- >> drivers/gpu/drm/imx/dpu/dpu-vscaler.c:25: warning: "MODE_MASK" redefined 25 | #define MODE_MASK 0x1 | In file included from arch/arm/include/asm/ptrace.h:10, from arch/arm/include/asm/irqflags.h:7, from include/linux/irqflags.h:16, from arch/arm/include/asm/bitops.h:28, from include/linux/bitops.h:29, from include/linux/kernel.h:12, from include/asm-generic/bug.h:20, from arch/arm/include/asm/bug.h:60, from include/linux/bug.h:5, from include/linux/io.h:11, from drivers/gpu/drm/imx/dpu/dpu-vscaler.c:7: arch/arm/include/uapi/asm/ptrace.h:67: note: this is the location of the previous definitio
Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas
Hi, On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > Add a YAML documentation for Mediatek, which uses ti reset-controller > driver directly. The TI reset controller provides a common reset > management, and is suitable for Mediatek SoCs. > > Signed-off-by: Crystal Guo > --- > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++ > 1 file changed, 51 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > diff --git > a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > new file mode 100644 > index ..7871550c3c69 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek Reset Controller > + > +maintainers: > + - Crystal Guo > + > +description: > + The bindings describe the reset-controller for Mediatek SoCs, > + which is based on TI reset controller. For more detail, please > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > + > +properties: > + compatible: > +const: mediatek,syscon-reset > + > + '#reset-cells': > +const: 1 > + > + mediatek,reset-bits: > +description: > > + Contains the reset control register information, please refer to > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. I would really like some input from Rob on this, in v4 he asked not to repeat 'ti,reset-bits'. regards Philipp
linux-next: build warning after merge of the block tree
Hi all,
After merging the block tree, today's linux-next build (htmldocs)
produced this warning:
fs/block_dev.c:1838: warning: Function parameter or member 'dev' not described
in 'lookup_bdev'
Introduced by commit
4e7b5671c6a8 ("block: remove i_bdev")
--
Cheers,
Stephen Rothwell
pgpR6qOHwBhgB.pgp
Description: OpenPGP digital signature
linux-next: build warning after merge of the block tree
Hi all,
After merging the block tree, today's linux-next build (htmldocs)
produced this warning:
fs/block_dev.c:1067: warning: Excess function parameter 'whole' description in
'bd_abort_claiming'
Introduced by commit
37c3fc9abb25 ("block: simplify the block device claiming interface")
--
Cheers,
Stephen Rothwell
pgpjDG8CMFQ2Z.pgp
Description: OpenPGP digital signature
Re: [PATCH] clk: sunxi-ng: Make sure divider tables have sentinel
Hi,
On Wed, Dec 02, 2020 at 09:38:17PM +0100, Jernej Skrabec wrote:
> Two clock divider tables are missing sentinel at the end. Effect of that
> is that clock framework reads past the last entry. Fix that with adding
> sentinel at the end.
>
> Issue was discovered with KASan.
>
> Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks")
> Fixes: c6a0637460c2 ("clk: sunxi-ng: Add A64 clocks")
> Signed-off-by: Jernej Skrabec
Acked-by: Maxime Ripard
Mike, Stephen, it's the only patch we're going to send your way for this
release, could you pick it up directly?
Thanks!
Maxime
signature.asc
Description: PGP signature
RE: [PATCH v2 3/3] scsi: ufs: Introduce event_notify variant function
> > Introduce event_notify variant function to allow > vendor to get notification of important events and connect > to vendor-specific debugging facilities. You need to add an implementation of this vop, otherwise it's just dead code. Thanks, Avri
[PATCH] gpio: mpc8xxx: resolve coverity warnings
From: Biwen Li
Resolve coverity warnings as follows,
cond_at_most: Checking gpio >= 28U implies that gpio may be up
to 27 on the false branch.
overrun-call: Overrunning callees array of size 3 by passing
argument gpio (which evaluates to 27)
in call to *mpc8xxx_gc->direction_output
cond_at_least: Checking gpio <= 3U implies that gpio is at least 4 on
the false branch.
overrun-call: Overrunning callee's array of size 3 by passing argument
gpio (which evaluates to 4) in call to *mpc8xxx_gc->direction_output
Signed-off-by: Biwen Li
---
drivers/gpio/gpio-mpc8xxx.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index a6c2bbdcaa10..12c9a91d87b7 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -3,6 +3,7 @@
*
* Copyright (C) 2008 Peter Korsgaard
* Copyright (C) 2016 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
@@ -80,7 +81,7 @@ static int mpc5121_gpio_dir_out(struct gpio_chip *gc,
{
struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
/* GPIO 28..31 are input only on MPC5121 */
- if (gpio >= 28)
+ if (gpio >= 28U)
return -EINVAL;
return mpc8xxx_gc->direction_output(gc, gpio, val);
@@ -91,7 +92,7 @@ static int mpc5125_gpio_dir_out(struct gpio_chip *gc,
{
struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
/* GPIO 0..3 are input only on MPC5125 */
- if (gpio <= 3)
+ if (gpio <= 3U)
return -EINVAL;
return mpc8xxx_gc->direction_output(gc, gpio, val);
--
2.17.1
Re: [PATCH v2 0/2] Let illegal access to user-space memory die
Hi Eric, On Thu, Dec 3, 2020 at 8:51 AM Eric Lin wrote: > > Accesses to user-space memory without calling uaccess routine > leads to hanging in page fault handler. Like arm64, we let it > die earlier in page fault handler. > > Changes in v2: > -Add a die_kernel_fault() helper > -Split one long line code into two Please also make no_context() use the new helper. Other than that: Reviewed-by: Pekka Enberg
Re: [PATCH] (fixed after review) Documentation: fix typos found in admin-guide subdirectory
On 12/2/20 11:22 PM, Andrew Klychkov wrote: > Fixed twelve typos in cppc_sysfs.rst, binderfs.rst, paride.rst, > zram.rst, bug-hunting.rst, introduction.rst, usage.rst, dm-crypt.rst > > Signed-off-by: Andrew Klychkov > --- > Documentation/admin-guide/acpi/cppc_sysfs.rst| 4 ++-- > Documentation/admin-guide/binderfs.rst | 2 +- > Documentation/admin-guide/blockdev/paride.rst| 2 +- > Documentation/admin-guide/blockdev/zram.rst | 2 +- > Documentation/admin-guide/bug-hunting.rst| 2 +- > Documentation/admin-guide/cifs/introduction.rst | 2 +- > Documentation/admin-guide/cifs/usage.rst | 6 +++--- > Documentation/admin-guide/device-mapper/dm-crypt.rst | 4 ++-- > 8 files changed, 12 insertions(+), 12 deletions(-) > (as previously:) Reviewed-by: Randy Dunlap Thanks. -- ~Randy
RE: [PATCH 2/3] scsi: ufs: Keep device power on only fWriteBoosterBufferFlushDuringHibernate == 1
> > From: Bean Huo > > Keep device power mode as active power mode and VCC supply only if > fWriteBoosterBufferFlushDuringHibernate setting 1 is successful. Why would it fail? Since UFSHCD_CAP_WB_EN is toggled off on ufshcd_wb_probe If the device doesn't support wb, The check ufshcd_is_wb_allowed should suffice, isn't it? Thanks, Avri
[tip:irq/core] BUILD SUCCESS d14ce74f1fb376ccbbc0b05ded477ada51253729
nommu_virt_defconfig powerpcgamecube_defconfig mipsmaltaup_defconfig arm omap1_defconfig mips ip32_defconfig h8300h8300h-sim_defconfig arm corgi_defconfig sh sh7770_generic_defconfig powerpc mpc85xx_cds_defconfig sh landisk_defconfig mips cu1000-neo_defconfig m68k m5275evb_defconfig ia64 allmodconfig ia64defconfig ia64 allyesconfig m68k allmodconfig m68k allyesconfig nios2 defconfig arc allyesconfig nds32 allnoconfig c6x allyesconfig nds32 defconfig nios2allyesconfig cskydefconfig alpha defconfig alphaallyesconfig xtensa allyesconfig h8300allyesconfig arc defconfig sh allmodconfig parisc defconfig s390 allyesconfig parisc allyesconfig s390defconfig i386 allyesconfig sparcallyesconfig sparc defconfig i386defconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig x86_64 randconfig-a004-20201202 x86_64 randconfig-a006-20201202 x86_64 randconfig-a001-20201202 x86_64 randconfig-a002-20201202 x86_64 randconfig-a005-20201202 x86_64 randconfig-a003-20201202 i386 randconfig-a004-20201202 i386 randconfig-a005-20201202 i386 randconfig-a001-20201202 i386 randconfig-a002-20201202 i386 randconfig-a006-20201202 i386 randconfig-a003-20201202 i386 randconfig-a004-20201203 i386 randconfig-a005-20201203 i386 randconfig-a001-20201203 i386 randconfig-a002-20201203 i386 randconfig-a006-20201203 i386 randconfig-a003-20201203 x86_64 randconfig-a016-20201203 x86_64 randconfig-a012-20201203 x86_64 randconfig-a014-20201203 x86_64 randconfig-a013-20201203 x86_64 randconfig-a015-20201203 x86_64 randconfig-a011-20201203 i386 randconfig-a014-20201202 i386 randconfig-a013-20201202 i386 randconfig-a011-20201202 i386 randconfig-a015-20201202 i386 randconfig-a012-20201202 i386 randconfig-a016-20201202 i386 randconfig-a014-20201203 i386 randconfig-a013-20201203 i386 randconfig-a011-20201203 i386 randconfig-a015-20201203 i386 randconfig-a012-20201203 i386 randconfig-a016-20201203 riscvnommu_k210_defconfig riscvallyesconfig riscv defconfig riscv rv32_defconfig riscvallmodconfig x86_64 rhel x86_64 allyesconfig x86_64rhel-7.6-kselftests x86_64 defconfig x86_64 rhel-8.3 x86_64 kexec clang tested configs: x86_64 randconfig-a016-20201202 x86_64 randconfig-a012-20201202 x86_64 randconfig-a014-20201202 x86_64 randconfig-a013-20201202 x86_64 randconfig-a015-20201202 x86_64 randconfig-a011-20201202 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
Re: [PATCH] netfilter: conntrack: fix -Wformat
On Thu, Dec 3, 2020 at 1:46 AM Tom Rix wrote:
>
>
> On 12/2/20 2:34 PM, Nick Desaulniers wrote:
> > On Tue, Nov 10, 2020 at 2:04 PM Joe Perches wrote:
> >> On Tue, 2020-11-10 at 14:00 -0800, Nick Desaulniers wrote:
> >>
> >>> Yeah, we could go through and remove %h and %hh to solve this, too, right?
> >> Yup.
> >>
> >> I think one of the checkpatch improvement mentees is adding
> >> some suggestion and I hope an automated fix mechanism for that.
> >>
> >> https://lore.kernel.org/lkml/5e3265c241602bb54286fbaae9222070daa4768e.ca...@perches.com/
> > + Tom, who's been looking at leveraging clang-tidy to automate such
> > treewide mechanical changes.
> > ex. https://reviews.llvm.org/D91789
>
> This looks like a good one to automate.
>
> If you don't mind, I'll give it a try next.
>
> Need a break from semicolons ;)
>
> Tom
>
> >
> > See also commit cbacb5ab0aa0 ("docs: printk-formats: Stop encouraging
> > use of unnecessary %h[xudi] and %hh[xudi]") for a concise summary of
> > related context.
>
Nick, Tom,
It is not a competition between checkpatch and clang-format, but if it would be:
...checkpatch was first...
But jokes aside: Dwaipayan Ray, a mentee Joe and I are working with,
has already submitted a patch to checkpatch that identifies those
patterns and provides a fix:
https://lore.kernel.org/lkml/20201128200046.78739-1-dwaipayanr...@gmail.com/
Maybe that is helpful; and of course, clean-up patches to the various
places still need to be sent out and having a second tool with
clang-format that can check and provide automatic fixes as well is
great.
Tom, go for it: that clean-up is certainly helpful to get a "make
CC=clang -W1" warning-free kernel build. For some smaller x86 kernel
config (my playground config), there were not too many warnings
outstanding, but the -Wformat was still among the larger class among
them.
Lukas
arch/mips/kernel/cmpxchg.c:44:12: warning: converting the result of '<<' to a boolean always evaluates to true
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 34816d20f173a90389c8a7e641166d8ea9dce70a commit: afe956c577b2d5a3d9834e4424587c1ebcf90c4c kbuild: Enable -Wtautological-compare date: 8 months ago config: mips-randconfig-r021-20201203 (attached as .config) compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 32c501dd88b62787d3a5ffda7aabcf4650dbe3cd) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install mips cross compiling tool for clang build # apt-get install binutils-mips-linux-gnu # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=afe956c577b2d5a3d9834e4424587c1ebcf90c4c git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout afe956c577b2d5a3d9834e4424587c1ebcf90c4c # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=mips If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): >> arch/mips/kernel/cmpxchg.c:44:12: warning: converting the result of '<<' to >> a boolean always evaluates to true [-Wtautological-constant-compare] load32 = cmpxchg(ptr32, old32, new32); ^ arch/mips/include/asm/cmpxchg.h:194:7: note: expanded from macro 'cmpxchg' if (!__SYNC_loongson3_war) \ ^ arch/mips/include/asm/sync.h:147:34: note: expanded from macro '__SYNC_loongson3_war' # define __SYNC_loongson3_war (1 << 31) ^ >> arch/mips/kernel/cmpxchg.c:44:12: warning: converting the result of '<<' to >> a boolean always evaluates to true [-Wtautological-constant-compare] arch/mips/include/asm/cmpxchg.h:204:7: note: expanded from macro 'cmpxchg' if (!__SYNC_loongson3_war) \ ^ arch/mips/include/asm/sync.h:147:34: note: expanded from macro '__SYNC_loongson3_war' # define __SYNC_loongson3_war (1 << 31) ^ arch/mips/kernel/cmpxchg.c:100:12: warning: converting the result of '<<' to a boolean always evaluates to true [-Wtautological-constant-compare] load32 = cmpxchg(ptr32, old32, new32); ^ arch/mips/include/asm/cmpxchg.h:194:7: note: expanded from macro 'cmpxchg' if (!__SYNC_loongson3_war) \ ^ arch/mips/include/asm/sync.h:147:34: note: expanded from macro '__SYNC_loongson3_war' # define __SYNC_loongson3_war (1 << 31) ^ arch/mips/kernel/cmpxchg.c:100:12: warning: converting the result of '<<' to a boolean always evaluates to true [-Wtautological-constant-compare] arch/mips/include/asm/cmpxchg.h:204:7: note: expanded from macro 'cmpxchg' if (!__SYNC_loongson3_war) \ ^ arch/mips/include/asm/sync.h:147:34: note: expanded from macro '__SYNC_loongson3_war' # define __SYNC_loongson3_war (1 << 31) ^ 4 warnings generated. Assembler messages: Fatal error: invalid -march= option: `mips64r2' clang-12: error: assembler command failed with exit code 1 (use -v to see invocation) -- In file included from arch/mips/kernel/cpu-probe.c:12: In file included from include/linux/ptrace.h:6: In file included from include/linux/sched.h:12: In file included from ./arch/mips/include/generated/asm/current.h:1: In file included from include/asm-generic/current.h:5: In file included from include/linux/thread_info.h:38: In file included from arch/mips/include/asm/thread_info.h:16: In file included from arch/mips/include/asm/processor.h:14: In file included from include/linux/atomic.h:7: >> arch/mips/include/asm/atomic.h:49:1: warning: converting the result of '<<' >> to a boolean always evaluates to true [-Wtautological-constant-compare] ATOMIC_OPS(atomic, int) ^ arch/mips/include/asm/atomic.h:40:9: note: expanded from macro 'ATOMIC_OPS' return cmpxchg(&v->counter, o, n); \ ^ arch/mips/include/asm/cmpxchg.h:194:7: note: expanded from macro 'cmpxchg' if (!__SYNC_loongson3_war) \ ^ arch/mips/include/asm/sync.h:147:34: note: expanded from macro '__SYNC_loongson3_war' # define __SYNC_loongson3_war (1 << 31) ^ In file included from arch/mips/kernel/cpu-probe.c:12: In file included from include/linux/pt
[PATCH] iio: adc: ti_am335x_adc: remove omitted iio_kfifo_free()
When the conversion was done to use devm_iio_kfifo_allocate(), a call to
iio_kfifo_free() was omitted (to be removed).
This change removes it.
Fixes: 3c5308058899 ("iio: adc: ti_am335x_adc: alloc kfifo & IRQ via devm_
functions")
Signed-off-by: Alexandru Ardelean
---
Seems I was doing too many things at once when I wrote this.
drivers/iio/adc/ti_am335x_adc.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c
index b11c8c47ba2a..e946903b0993 100644
--- a/drivers/iio/adc/ti_am335x_adc.c
+++ b/drivers/iio/adc/ti_am335x_adc.c
@@ -397,16 +397,12 @@ static int tiadc_iio_buffered_hardware_setup(struct
device *dev,
ret = devm_request_threaded_irq(dev, irq, pollfunc_th, pollfunc_bh,
flags, indio_dev->name, indio_dev);
if (ret)
- goto error_kfifo_free;
+ return ret;
indio_dev->setup_ops = setup_ops;
indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
return 0;
-
-error_kfifo_free:
- iio_kfifo_free(indio_dev->buffer);
- return ret;
}
static const char * const chan_name_ain[] = {
--
2.27.0
[PATCH v2 2/3] scsi: ufs: Refine error history functions
Nowadays UFS error history does not only have "history of errors"
but also have history of some other events which are not defined
as errors.
This patch fixes the confused naming of related functions,
and change the way for updating and printing history as preparation
of next patch.
This patch shall not change any functionality.
Reviewed-by: Can Guo
Signed-off-by: Stanley Chu
---
drivers/scsi/ufs/ufshcd.c | 118 +-
drivers/scsi/ufs/ufshcd.h | 71 ++-
2 files changed, 97 insertions(+), 92 deletions(-)
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 7067b86a8e08..f630955141df 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -411,20 +411,25 @@ static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
}
}
-static void ufshcd_print_err_hist(struct ufs_hba *hba,
- struct ufs_err_reg_hist *err_hist,
- char *err_name)
+static void ufshcd_print_evt(struct ufs_hba *hba, u32 id,
+char *err_name)
{
int i;
bool found = false;
+ struct ufs_event_hist *e;
- for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
- int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
+ if (id >= UFS_EVT_CNT)
+ return;
+
+ e = &hba->ufs_stats.event[id];
- if (err_hist->tstamp[p] == 0)
+ for (i = 0; i < UFS_EVENT_HIST_LENGTH; i++) {
+ int p = (i + e->pos) % UFS_EVENT_HIST_LENGTH;
+
+ if (e->tstamp[p] == 0)
continue;
dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
- err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
+ e->val[p], ktime_to_us(e->tstamp[p]));
found = true;
}
@@ -432,26 +437,26 @@ static void ufshcd_print_err_hist(struct ufs_hba *hba,
dev_err(hba->dev, "No record of %s\n", err_name);
}
-static void ufshcd_print_host_regs(struct ufs_hba *hba)
+static void ufshcd_print_evt_hist(struct ufs_hba *hba)
{
ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
- "auto_hibern8_err");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
- "link_startup_fail");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
- "suspend_fail");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
- ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
+ ufshcd_print_evt(hba, UFS_EVT_PA_ERR, "pa_err");
+ ufshcd_print_evt(hba, UFS_EVT_DL_ERR, "dl_err");
+ ufshcd_print_evt(hba, UFS_EVT_NL_ERR, "nl_err");
+ ufshcd_print_evt(hba, UFS_EVT_TL_ERR, "tl_err");
+ ufshcd_print_evt(hba, UFS_EVT_DME_ERR, "dme_err");
+ ufshcd_print_evt(hba, UFS_EVT_AUTO_HIBERN8_ERR,
+"auto_hibern8_err");
+ ufshcd_print_evt(hba, UFS_EVT_FATAL_ERR, "fatal_err");
+ ufshcd_print_evt(hba, UFS_EVT_LINK_STARTUP_FAIL,
+"link_startup_fail");
+ ufshcd_print_evt(hba, UFS_EVT_RESUME_ERR, "resume_fail");
+ ufshcd_print_evt(hba, UFS_EVT_SUSPEND_ERR,
+"suspend_fail");
+ ufshcd_print_evt(hba, UFS_EVT_DEV_RESET, "dev_reset");
+ ufshcd_print_evt(hba, UFS_EVT_HOST_RESET, "host_reset");
+ ufshcd_print_evt(hba, UFS_EVT_ABORT, "task_abort");
ufshcd_vops_dbg_register_dump(hba);
}
@@ -3852,7 +3857,7 @@ static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba,
struct uic_command *cmd)
if (ret) {
ufshcd_print_host_state(hba);
ufshcd_print_pwr_info(hba);
- ufshcd_print_host_regs(hba);
+ ufshcd_print_evt_hist(hba);
}
spin_lock_irqsave(hba->host->host_lock, flags);
@@ -4464,14 +4469,19 @@ static inline int ufshcd_disable_device_tx_lcc(struct
ufs_hba *hba)
return ufshcd_disable_tx_lcc(hba, true);
}
-void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
- u32 reg)
+void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val)
{
- reg_hist->
[PATCH v2 0/3] Refine error history and introduce event_notify vop
Hi, This series refines error history functions and introduce a new event_notify vop to allow vendor to get notification of important events. Change since v1: - Change notify_event() to event_notify() to follow vop naming covention. Stanley Chu (3): scsi: ufs: Add error history for abort event in UFS Device W-LUN scsi: ufs: Refine error history functions scsi: ufs: Introduce event_notify variant function drivers/scsi/ufs/ufshcd.c | 122 ++ drivers/scsi/ufs/ufshcd.h | 82 - 2 files changed, 112 insertions(+), 92 deletions(-) -- 2.18.0
[PATCH v2 1/3] scsi: ufs: Add error history for abort event in UFS Device W-LUN
Add error history for abort event in UFS Device W-LUN.
Besides, use specified value as parameter of ufshcd_update_reg_hist()
to identify the aborted tag or LUNs.
Reviewed-by: Can Guo
Signed-off-by: Stanley Chu
---
drivers/scsi/ufs/ufshcd.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 11a4aad09f3a..7067b86a8e08 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -6738,8 +6738,10 @@ static int ufshcd_abort(struct scsi_cmnd *cmd)
* To avoid these unnecessary/illegal step we skip to the last error
* handling stage: reset and restore.
*/
- if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
+ if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN) {
+ ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, lrbp->lun);
return ufshcd_eh_host_reset_handler(cmd);
+ }
ufshcd_hold(hba, false);
reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
@@ -6763,7 +6765,7 @@ static int ufshcd_abort(struct scsi_cmnd *cmd)
*/
scsi_print_command(hba->lrb[tag].cmd);
if (!hba->req_abort_count) {
- ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
+ ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, tag);
ufshcd_print_host_regs(hba);
ufshcd_print_host_state(hba);
ufshcd_print_pwr_info(hba);
--
2.18.0
[PATCH v2 3/3] scsi: ufs: Introduce event_notify variant function
Introduce event_notify variant function to allow
vendor to get notification of important events and connect
to vendor-specific debugging facilities.
Reviewed-by: Can Guo
Signed-off-by: Stanley Chu
---
drivers/scsi/ufs/ufshcd.c | 2 ++
drivers/scsi/ufs/ufshcd.h | 11 +++
2 files changed, 13 insertions(+)
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index f630955141df..308f624b3830 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -4480,6 +4480,8 @@ void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id,
u32 val)
e->val[e->pos] = val;
e->tstamp[e->pos] = ktime_get();
e->pos = (e->pos + 1) % UFS_EVENT_HIST_LENGTH;
+
+ ufshcd_vops_event_notify(hba, id, &val);
}
EXPORT_SYMBOL_GPL(ufshcd_update_evt_hist);
diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
index b2eab23a17e8..815993239898 100644
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -320,6 +320,7 @@ struct ufs_pwr_mode_info {
* @phy_initialization: used to initialize phys
* @device_reset: called to issue a reset pulse on the UFS device
* @program_key: program or evict an inline encryption key
+ * @event_notify: called to notify important events
*/
struct ufs_hba_variant_ops {
const char *name;
@@ -355,6 +356,8 @@ struct ufs_hba_variant_ops {
void *data);
int (*program_key)(struct ufs_hba *hba,
const union ufs_crypto_cfg_entry *cfg, int slot);
+ void(*event_notify)(struct ufs_hba *hba,
+ enum ufs_event_type evt, void *data);
};
/* clock gating state */
@@ -1102,6 +1105,14 @@ static inline int ufshcd_vops_clk_scale_notify(struct
ufs_hba *hba,
return 0;
}
+static inline void ufshcd_vops_event_notify(struct ufs_hba *hba,
+ enum ufs_event_type evt,
+ void *data)
+{
+ if (hba->vops && hba->vops->event_notify)
+ hba->vops->event_notify(hba, evt, data);
+}
+
static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
enum ufs_notify_change_status status)
{
--
2.18.0
[PATCH] MIPS: Enable GCOV
Enable gcov profiling of the entire kernel on mips. Required changes include disabling profiling for: * arch/kernel/boot/compressed: not linked to main kernel. Lightly tested on Loongson 3A3000 an 3A4000, seems to work as expected. without "GCOV_PROFILE := n" in compressed Makefile, build errors as follows: ... ld: arch/mips/boot/compressed/string.o:(.data+0x88): undefined reference to `__gcov_merge_add' ld: arch/mips/boot/compressed/string.o: in function `_GLOBAL__sub_I_00100_0_memcpy': string.c:(.text.startup+0x4): undefined reference to `__gcov_init' ld: arch/mips/boot/compressed/string.o: in function `_GLOBAL__sub_D_00100_1_memcpy': string.c:(.text.exit+0x0): undefined reference to `__gcov_exit' ... Signed-off-by: Youling Tang Signed-off-by: Xingxing Su --- arch/mips/Kconfig | 1 + arch/mips/boot/compressed/Makefile | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 2000bb2..52664a30 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -9,6 +9,7 @@ config MIPS select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_HAS_UBSAN_SANITIZE_ALL + select ARCH_HAS_GCOV_PROFILE_ALL select ARCH_SUPPORTS_UPROBES select ARCH_USE_BUILTIN_BSWAP select ARCH_USE_CMPXCHG_LOCKREF if 64BIT diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile index d665118..405b47a 100644 --- a/arch/mips/boot/compressed/Makefile +++ b/arch/mips/boot/compressed/Makefile @@ -36,6 +36,7 @@ KBUILD_AFLAGS := $(KBUILD_AFLAGS) -D__ASSEMBLY__ \ # Prevents link failures: __sanitizer_cov_trace_pc() is not linked in. KCOV_INSTRUMENT:= n +GCOV_PROFILE := n # decompressor objects (linked with vmlinuz) vmlinuzobjs-y := $(obj)/head.o $(obj)/decompress.o $(obj)/string.o -- 2.1.0
[PATCH] (fixed after review) Documentation: fix typos found in admin-guide subdirectory
Fixed twelve typos in cppc_sysfs.rst, binderfs.rst, paride.rst, zram.rst, bug-hunting.rst, introduction.rst, usage.rst, dm-crypt.rst Signed-off-by: Andrew Klychkov --- Documentation/admin-guide/acpi/cppc_sysfs.rst| 4 ++-- Documentation/admin-guide/binderfs.rst | 2 +- Documentation/admin-guide/blockdev/paride.rst| 2 +- Documentation/admin-guide/blockdev/zram.rst | 2 +- Documentation/admin-guide/bug-hunting.rst| 2 +- Documentation/admin-guide/cifs/introduction.rst | 2 +- Documentation/admin-guide/cifs/usage.rst | 6 +++--- Documentation/admin-guide/device-mapper/dm-crypt.rst | 4 ++-- 8 files changed, 12 insertions(+), 12 deletions(-) diff --git a/Documentation/admin-guide/acpi/cppc_sysfs.rst b/Documentation/admin-guide/acpi/cppc_sysfs.rst index a4b99af..fccf221 100644 --- a/Documentation/admin-guide/acpi/cppc_sysfs.rst +++ b/Documentation/admin-guide/acpi/cppc_sysfs.rst @@ -8,7 +8,7 @@ CPPC CPPC defined in the ACPI spec describes a mechanism for the OS to manage the -performance of a logical processor on a contigious and abstract performance +performance of a logical processor on a contiguous and abstract performance scale. CPPC exposes a set of registers to describe abstract performance scale, to request performance levels and to measure per-cpu delivered performance. @@ -45,7 +45,7 @@ for each cpu X:: * lowest_freq : CPU frequency corresponding to lowest_perf (in MHz). * nominal_freq : CPU frequency corresponding to nominal_perf (in MHz). The above frequencies should only be used to report processor performance in - freqency instead of abstract scale. These values should not be used for any + frequency instead of abstract scale. These values should not be used for any functional decisions. * feedback_ctrs : Includes both Reference and delivered performance counter. diff --git a/Documentation/admin-guide/binderfs.rst b/Documentation/admin-guide/binderfs.rst index 8243af9..199d843 100644 --- a/Documentation/admin-guide/binderfs.rst +++ b/Documentation/admin-guide/binderfs.rst @@ -70,5 +70,5 @@ Deleting binder Devices Binderfs binder devices can be deleted via `unlink() `_. This means that the `rm() `_ tool can be used to delete them. Note that the ``binder-control`` device cannot be deleted since this would make the binderfs -instance unuseable. The ``binder-control`` device will be deleted when the +instance unusable. The ``binder-control`` device will be deleted when the binderfs instance is unmounted and all references to it have been dropped. diff --git a/Documentation/admin-guide/blockdev/paride.rst b/Documentation/admin-guide/blockdev/paride.rst index 87b4278..e1ce90a 100644 --- a/Documentation/admin-guide/blockdev/paride.rst +++ b/Documentation/admin-guide/blockdev/paride.rst @@ -220,7 +220,7 @@ example:: Finally, you can load high-level drivers for each kind of device that you have connected. By default, each driver will autoprobe for a single device, but you can support up to four similar devices by giving their -individual co-ordinates when you load the driver. +individual coordinates when you load the driver. For example, if you had two no-name CD-ROM drives both using the KingByte KBIC-951A adapter, one on port 0x378 and the other on 0x3bc diff --git a/Documentation/admin-guide/blockdev/zram.rst b/Documentation/admin-guide/blockdev/zram.rst index a6fd1f9..9093228 100644 --- a/Documentation/admin-guide/blockdev/zram.rst +++ b/Documentation/admin-guide/blockdev/zram.rst @@ -360,7 +360,7 @@ like below:: /sys/block/zram0/writeback_limit. $ echo 1 > /sys/block/zram0/writeback_limit_enable -If admins want to allow further write again once the bugdet is exhausted, +If admins want to allow further write again once the budget is exhausted, he could do it like below:: $ echo $((400<>4K_SHIFT)) > \ diff --git a/Documentation/admin-guide/bug-hunting.rst b/Documentation/admin-guide/bug-hunting.rst index f7c80f4..95299b0 100644 --- a/Documentation/admin-guide/bug-hunting.rst +++ b/Documentation/admin-guide/bug-hunting.rst @@ -263,7 +263,7 @@ Please notice that it will point to: - The last developers that touched the source code (if this is done inside a git tree). On the above example, Tejun and Bhaktipriya (in this - specific case, none really envolved on the development of this file); + specific case, none really involved on the development of this file); - The driver maintainer (Hans Verkuil); - The subsystem maintainer (Mauro Carvalho Chehab); - The driver and/or subsystem mailing list (linux-me...@vger.kernel.org); diff --git a/Documentation/admin-guide/cifs/introduction.rst b/Documentation/admin-guide/cifs/introduction.rst index 0b98f67..cc2851d 100644 --- a/Documentation/admin-guide/cifs/introduction.rst +++ b/Documentation/admin-guide/cifs/introduction.rst @@ -9,7 +9,7 @@ Introduction PC operating systems. New and improved versi
[PATCH] MAINTAINERS: Add entry for Marvell Prestera Ethernet Switch driver
Add maintainers info for new Marvell Prestera Ethernet switch driver. Signed-off-by: Mickey Rachamim --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index a7bdebf955bb..04a27eb89428 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10540,6 +10540,15 @@ S: Supported F: Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst F: drivers/net/ethernet/marvell/octeontx2/af/ +MARVELL PRESTERA ETHERNET SWITCH DRIVER +M: Vadym Kochan +M: Taras Chornyi +M: Mickey Rachamim +L: net...@vger.kernel.org +S: Supported +W: http://www.marvell.com +F: drivers/net/ethernet/marvell/prestera/ + MARVELL SOC MMC/SD/SDIO CONTROLLER DRIVER M: Nicolas Pitre S: Odd Fixes -- 2.17.1
Re: [PATCH v2 3/3] edac: Supporting AST2400 and AST2600 edac driver
On Thu, Dec 03, 2020 at 01:27:27AM +, Troy Lee wrote: > Hi Broislav and Andrew, > > I removed these exported function and submitted v3 PATCH. I saw that. A couple of comments: First of all, please do not top-post on a public mailing list. Secondly, Joel gave you Reviewed-by: and Acked-by: for your patches 1 and 2 which are not in your new submission. But they should be, please have a look at Documentation/process/ while you're waiting for his review of your v3. You don't have to resend now with those added and I can add them if Joel is fine with patch 3 but pls remember to pick up tags reviewers have given you, in the future. Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette
[PATCH v2 2/2] platform/x86/drivers/acerhdf: Check the interval value when it is set
Currently the code checks the interval value when the temperature is
read which is bad for two reasons:
- checking and setting the interval in the get_temp callback is
inaccurate and awful, that can be done when changing the value.
- Changing the thermal zone structure internals is an abuse of the
exported structure, moreover no lock is taken here.
The goal of this patch is to solve the first item by using the 'set'
function called when changing the interval. The check is done there
and removed from the get_temp function. If the thermal zone was not
initialized yet, the interval is not updated in this case as that will
happen in the init function when registering the thermal zone device.
I don't have any hardware to test the changes.
Signed-off-by: Daniel Lezcano
---
V2:
- Fixed static function annotation
---
drivers/platform/x86/acerhdf.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/platform/x86/acerhdf.c b/drivers/platform/x86/acerhdf.c
index 19fc8ff2225c..b6aa6e5514f4 100644
--- a/drivers/platform/x86/acerhdf.c
+++ b/drivers/platform/x86/acerhdf.c
@@ -334,7 +334,10 @@ static void acerhdf_check_param(struct thermal_zone_device
*thermal)
}
if (verbose)
pr_notice("interval changed to: %d\n", interval);
- thermal->polling_delay = interval*1000;
+
+ if (thermal)
+ thermal->polling_delay = interval*1000;
+
prev_interval = interval;
}
}
@@ -349,8 +352,6 @@ static int acerhdf_get_ec_temp(struct thermal_zone_device
*thermal, int *t)
{
int temp, err = 0;
- acerhdf_check_param(thermal);
-
err = acerhdf_get_temp(&temp);
if (err)
return err;
@@ -823,8 +824,21 @@ MODULE_ALIAS("dmi:*:*Acer*:pnExtensa*5420*:");
module_init(acerhdf_init);
module_exit(acerhdf_exit);
+static int interval_set_uint(const char *val, const struct kernel_param *kp)
+{
+ int ret;
+
+ ret = param_set_uint(val, kp);
+ if (ret)
+ return ret;
+
+ acerhdf_check_param(thz_dev);
+
+ return 0;
+}
+
static const struct kernel_param_ops interval_ops = {
- .set = param_set_uint,
+ .set = interval_set_uint,
.get = param_get_uint,
};
--
2.25.1
Re: [PATCH] venus: core: add support to dump FW region
Quoting Dikshita Agarwal (2020-11-29 21:36:12)
> diff --git a/drivers/media/platform/qcom/venus/core.c
> b/drivers/media/platform/qcom/venus/core.c
> index 6103aaf..01a0cfe 100644
> --- a/drivers/media/platform/qcom/venus/core.c
> +++ b/drivers/media/platform/qcom/venus/core.c
> @@ -22,6 +24,48 @@
> #include "firmware.h"
> #include "pm_helpers.h"
>
> +static int subsystem_dump(struct venus_core *core)
> +{
> + struct device_node *node;
> + struct device *dev;
> + struct resource r;
> + void *mem_va;
> + size_t mem_size;
> + void *data;
> + int ret;
> +
> + dev = core->dev;
> + node = of_parse_phandle(dev->of_node, "memory-region", 0);
Any chance this could be done at probe time and saved away as some sort
of pointer?
> + if (!node)
> + return -EINVAL;
> +
> + ret = of_address_to_resource(node, 0, &r);
of_node_put(node);
> + if (ret)
> + goto err_put_node;
And then just return ret;
> +
> + mem_size = resource_size(&r);
> +
> + mem_va = memremap(r.start, mem_size, MEMREMAP_WC);
> + if (!mem_va) {
> + ret = -ENOMEM;
> + goto err_put_node;
And return -ENOMEM;
> + }
> +
> + data = vmalloc(mem_size);
> + if (!data) {
> + ret = -EINVAL;
> + goto err_unmap;
> + }
> +
> + memcpy(data, mem_va, mem_size);
> +
> + dev_coredumpv(dev, data, mem_size, GFP_KERNEL);
> +err_unmap:
> + memunmap(mem_va);
> +err_put_node:
> + of_node_put(node);
> + return ret;
> +}
> static void venus_event_notify(struct venus_core *core, u32 event)
> {
> struct venus_inst *inst;
> @@ -67,6 +111,9 @@ static void venus_sys_error_handler(struct work_struct
> *work)
>
> venus_shutdown(core);
>
> + dev_warn(core->dev, "dumping FW region!\n");
Do we need this warning?
> + subsystem_dump(core);
Maybe call it venus_do_coredump() so it isn't so generic.
> +
> pm_runtime_put_sync(core->dev);
>
> while (core->pmdomains[0] && pm_runtime_active(core->pmdomains[0]))
[PATCH v2 1/2] platform/x86/drivers/acerhdf: Use module_param_cb to set/get polling interval
The module parameter can be set by using ops to get and set the
values. The change will allow to check the correctness of the interval
value everytime it is changed instead of checking in the get_temp
function.
Signed-off-by: Daniel Lezcano
---
drivers/platform/x86/acerhdf.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/platform/x86/acerhdf.c b/drivers/platform/x86/acerhdf.c
index 44b6bfbd32df..19fc8ff2225c 100644
--- a/drivers/platform/x86/acerhdf.c
+++ b/drivers/platform/x86/acerhdf.c
@@ -84,8 +84,6 @@ static struct platform_device *acerhdf_dev;
module_param(kernelmode, uint, 0);
MODULE_PARM_DESC(kernelmode, "Kernel mode fan control on / off");
-module_param(interval, uint, 0600);
-MODULE_PARM_DESC(interval, "Polling interval of temperature check");
module_param(fanon, uint, 0600);
MODULE_PARM_DESC(fanon, "Turn the fan on above this temperature");
module_param(fanoff, uint, 0600);
@@ -824,3 +822,11 @@ MODULE_ALIAS("dmi:*:*Acer*:pnExtensa*5420*:");
module_init(acerhdf_init);
module_exit(acerhdf_exit);
+
+static const struct kernel_param_ops interval_ops = {
+ .set = param_set_uint,
+ .get = param_get_uint,
+};
+
+module_param_cb(interval, &interval_ops, &interval, 0600);
+MODULE_PARM_DESC(interval, "Polling interval of temperature check");
--
2.25.1
[PATCH 2/2] regulator: qcom-rpmh: Add support for PM8350/PM8350c
Add support from RPMH regulators found in PM8350 and PM8350c PMICs
Signed-off-by: Vinod Koul
---
drivers/regulator/qcom-rpmh-regulator.c | 62 +
1 file changed, 62 insertions(+)
diff --git a/drivers/regulator/qcom-rpmh-regulator.c
b/drivers/regulator/qcom-rpmh-regulator.c
index d488325499a9..800072b90efd 100644
--- a/drivers/regulator/qcom-rpmh-regulator.c
+++ b/drivers/regulator/qcom-rpmh-regulator.c
@@ -865,6 +865,60 @@ static const struct rpmh_vreg_init_data
pm8150l_vreg_data[] = {
{},
};
+static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {
+ RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
+ RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
+ RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
+ RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
+ RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
+ RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
+ RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
+ RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
+ RPMH_VREG("smps10", "smp%s10", &pmic5_hfsmps510, "vdd-s10"),
+ RPMH_VREG("smps11", "smp%s11", &pmic5_hfsmps510, "vdd-s11"),
+ RPMH_VREG("smps12", "smp%s12", &pmic5_hfsmps510, "vdd-s12"),
+ RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4"),
+ RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
+ RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l5"),
+ RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4"),
+ RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l5"),
+ RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
+ RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
+ RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
+ RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
+ RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
+ {},
+};
+
+static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {
+ RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
+ RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
+ RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
+ RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
+ RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
+ RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
+ RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
+ RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
+ RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
+ RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l12"),
+ RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo_lv, "vdd-l2-l8"),
+ RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
+ RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
+ RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
+ RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l9-l11"),
+ RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
+ RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l2-l8"),
+ RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l6-l9-l11"),
+ RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l10"),
+ RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l6-l9-l11"),
+ RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"),
+ RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
+ RPMH_VREG("bob","bob%s1", &pmic5_bob, "vdd-bob"),
+ {},
+};
+
static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515, "vdd-s2"),
@@ -984,6 +1038,14 @@ static const struct of_device_id __maybe_unused
rpmh_regulator_match_table[] = {
.compatible = "qcom,pm8150l-rpmh-regulators",
.data = pm8150l_vreg_data,
},
+ {
+ .compatible = "qcom,pm8350-rpmh-regulators",
+ .data = pm8350_vreg_data,
+ },
+ {
+ .compatible = "qcom,pm8350c-rpmh-regulators",
+ .data = pm8350c_vreg_data,
+ },
{
.compatible = "qcom,pm8998-rpmh-regulators",
.data = pm8998_vreg_data,
--
2.26.2
[PATCH 1/2] regulator: dt-bindings: Add PM8350x compatibles
Add PM8350 and PM8350C compatibles for these PMICs found in some Qualcomm platforms. Signed-off-by: Vinod Koul --- .../devicetree/bindings/regulator/qcom,rpmh-regulator.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.txt index 97c3e0b7611c..0f5f4029d9a2 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.txt @@ -26,6 +26,8 @@ Supported regulator node names: PM8009: smps1 - smps2, ldo1 - ldo7 PM8150: smps1 - smps10, ldo1 - ldo18 PM8150L:smps1 - smps8, ldo1 - ldo11, bob, flash, rgb + PM8350: smps1 - smps12, ldo1 - ldo10, + PM8350C:smps1 - smps10, ldo1 - ldo13, bob PM8998: smps1 - smps13, ldo1 - ldo28, lvs1 - lvs2 PMI8998:bob PM6150: smps1 - smps5, ldo1 - ldo19 @@ -43,6 +45,8 @@ First Level Nodes - PMIC "qcom,pm8009-rpmh-regulators" "qcom,pm8150-rpmh-regulators" "qcom,pm8150l-rpmh-regulators" + "qcom,pm8350-rpmh-regulators" + "qcom,pm8350c-rpmh-regulators" "qcom,pm8998-rpmh-regulators" "qcom,pmi8998-rpmh-regulators" "qcom,pm6150-rpmh-regulators" -- 2.26.2
Re: [MOCKUP] x86/mm: Lightweight lazy mm refcounting
Hi Andy, I love your patch! Yet something to improve: [auto build test ERROR on tip/x86/core] [also build test ERROR on tip/x86/mm soc/for-next linus/master v5.10-rc6 next-20201201] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Andy-Lutomirski/x86-mm-Lightweight-lazy-mm-refcounting/20201203-132706 base: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 238c91115cd05c71447ea071624a4c9fe661f970 config: m68k-randconfig-s032-20201203 (attached as .config) compiler: m68k-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.3-179-ga00755aa-dirty # https://github.com/0day-ci/linux/commit/0d9b23b22e621d8e588095b4d0f9f39110a57901 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Andy-Lutomirski/x86-mm-Lightweight-lazy-mm-refcounting/20201203-132706 git checkout 0d9b23b22e621d8e588095b4d0f9f39110a57901 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=m68k If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All errors (new ones prefixed by >>): m68k-linux-ld: kernel/fork.o: in function `__mmput': >> fork.c:(.text+0x214): undefined reference to `arch_fixup_lazy_mm_refs' m68k-linux-ld: kernel/fork.o: in function `mmput_async_fn': fork.c:(.text+0x990): undefined reference to `arch_fixup_lazy_mm_refs' m68k-linux-ld: kernel/fork.o: in function `mmput': fork.c:(.text+0xa68): undefined reference to `arch_fixup_lazy_mm_refs' m68k-linux-ld: kernel/fork.o: in function `dup_mm.isra.0': fork.c:(.text+0x1192): undefined reference to `arch_fixup_lazy_mm_refs' m68k-linux-ld: kernel/fork.o: in function `mm_access': fork.c:(.text+0x13c6): undefined reference to `arch_fixup_lazy_mm_refs' --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org .config.gz Description: application/gzip
[PATCH 2/2] pinctrl: qcom: Add SM8350 pinctrl driver
From: Raghavendra Rao Ananta
This adds pincontrol driver for tlmm block found in SM8350 SoC
Signed-off-by: Raghavendra Rao Ananta
Signed-off-by: Jeevan Shriram
[vkoul: rebase and tidy up for upstream]
Signed-off-by: Vinod Koul
---
drivers/pinctrl/qcom/Kconfig |9 +
drivers/pinctrl/qcom/Makefile |1 +
drivers/pinctrl/qcom/pinctrl-sm8350.c | 1654 +
3 files changed, 1664 insertions(+)
create mode 100644 drivers/pinctrl/qcom/pinctrl-sm8350.c
diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index 5fe7b8aaf69d..1d6b81671655 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -236,4 +236,13 @@ config PINCTRL_SM8250
Qualcomm Technologies Inc TLMM block found on the Qualcomm
Technologies Inc SM8250 platform.
+config PINCTRL_SM8350
+ tristate "Qualcomm Technologies Inc SM8350 pin controller driver"
+ depends on GPIOLIB && OF
+ select PINCTRL_MSM
+ help
+ This is the pinctrl, pinmux, pinconf and gpiolib driver for the
+ Qualcomm Technologies Inc TLMM block found on the Qualcomm
+ Technologies Inc SM8350 platform.
+
endif
diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
index 9e3d9c91a444..fb71be6796ed 100644
--- a/drivers/pinctrl/qcom/Makefile
+++ b/drivers/pinctrl/qcom/Makefile
@@ -28,3 +28,4 @@ obj-$(CONFIG_PINCTRL_SDM660) += pinctrl-sdm660.o
obj-$(CONFIG_PINCTRL_SDM845) += pinctrl-sdm845.o
obj-$(CONFIG_PINCTRL_SM8150) += pinctrl-sm8150.o
obj-$(CONFIG_PINCTRL_SM8250) += pinctrl-sm8250.o
+obj-$(CONFIG_PINCTRL_SM8350) += pinctrl-sm8350.o
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8350.c
b/drivers/pinctrl/qcom/pinctrl-sm8350.c
new file mode 100644
index ..8767e2c2c89c
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-sm8350.c
@@ -0,0 +1,1654 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2020, Linaro Limited
+ */
+
+#include
+#include
+#include
+#include
+
+#include "pinctrl-msm.h"
+
+#define FUNCTION(fname)\
+ [msm_mux_##fname] = { \
+ .name = #fname, \
+ .groups = fname##_groups, \
+ .ngroups = ARRAY_SIZE(fname##_groups), \
+ }
+
+#define REG_SIZE 0x1000
+
+#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
+ { \
+ .name = "gpio" #id, \
+ .pins = gpio##id##_pins,\
+ .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
+ .funcs = (int[]){ \
+ msm_mux_gpio, /* gpio mode */ \
+ msm_mux_##f1, \
+ msm_mux_##f2, \
+ msm_mux_##f3, \
+ msm_mux_##f4, \
+ msm_mux_##f5, \
+ msm_mux_##f6, \
+ msm_mux_##f7, \
+ msm_mux_##f8, \
+ msm_mux_##f9\
+ }, \
+ .nfuncs = 10, \
+ .ctl_reg = REG_SIZE * id, \
+ .io_reg = REG_SIZE * id + 0x4, \
+ .intr_cfg_reg = REG_SIZE * id + 0x8,\
+ .intr_status_reg = REG_SIZE * id + 0xc, \
+ .intr_target_reg = REG_SIZE * id + 0x8, \
+ .mux_bit = 2, \
+ .pull_bit = 0, \
+ .drv_bit = 6, \
+ .oe_bit = 9,\
+ .in_bit = 0,\
+ .out_bit = 1, \
+ .intr_enable_bit = 0, \
+ .intr_status_bit = 0, \
+ .intr_target_bit = 5, \
+ .intr_target_kpss_val = 3, \
+ .intr_raw_status_bit = 4, \
+ .intr_polarity_bit = 1, \
+ .intr_detection_bit = 2,\
+ .intr_detection_width = 2, \
+ }
+
+#define SDC_PINGROUP(pg_name, ctl, pull, drv) \
+ { \
+ .name = #pg_name, \
+ .pins = pg_name##_pins, \
+ .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
+ .ctl_reg = ctl, \
+ .io_reg = 0,\
+ .intr_cfg_reg = 0, \
+
RE: [PATCH v6 4/4] mmc: sdhci-of-arasan: Enable UHS-1 support for Keem Bay SOC
Hi Linus,
Thanks for your input. I replied inline.
>-Original Message-
>From: Linus Walleij
>Sent: Thursday, December 3, 2020 2:55 AM
>To: Zulkifli, Muhammad Husaini
>Cc: Ulf Hansson ; Hunter, Adrian
>; Michal Simek ; linux-
>mmc ; Linux ARM ker...@lists.infradead.org>; linux-kernel@vger.kernel.org; Shevchenko,
>Andriy ; Raja Subramanian, Lakshmi Bai
>; Wan Mohamad, Wan Ahmad
>Zainie ; Mark Gross
>
>Subject: Re: [PATCH v6 4/4] mmc: sdhci-of-arasan: Enable UHS-1 support for
>Keem Bay SOC
>
>Hi Muhammad,
>
>thanks for your patch!
>
>On Wed, Dec 2, 2020 at 8:04 AM
>wrote:
>
>> Keem Bay SOC can support dual voltage operations for GPIO SD Pins to
>> either 1.8V or 3.3V for bus IO line power. In order to operate the
>> GPIOs line for Clk,Cmd and Data on Keem Bay Hardware, it is important
>> to configure the supplied voltage applied to their I/O Rail and the
>> output of the i2c expander pin. Final Voltage applied on the GPIOs
>> Line are dependent by both supplied voltage rail and expander pin
>> output as it is been set after passing through the voltage sense resistor.
>
>I think I understand this part.
>
>> The Keem Bay HW is somewhat unique in the way of how IO bus line
>> voltage are been controlled. Output of the Expander pins is been
>> configured using regulator.
>
>That much is clear.
>
>> Voltage rail output is being configured using
>> keembay_io_rail_supplied_voltage() API in the sdhci driver directly.
>
>And that is an SMC call like that:
>
>+static inline int keembay_io_rail_supplied_voltage(int volt) {
>+ struct arm_smccc_res res;
>+
>+
>arm_smccc_1_1_invoke(ARM_SMCCC_SIP_KEEMBAY_SET_SD_VOLTAGE,
>volt, &res);
>+ if ((int)res.a0 < 0)
>+ return -EINVAL;
>+
>+ return 0;
>
>That can set the voltage by calling into the Arm secure world I guess?
Yes calling the Arm SMCC .
The selection of the supply voltage applied to the rail depends on the
AON_CFG1[9] .
Setting Bit9 will change the voltage rail supply.
Set Bit 9 = 1 // Operation voltage is 1.8V
Set Bit 9 = 0 // Operation voltage is 3.3V
>
>> Pin control based implementation becomes problematic to control the
>> voltage rail due to the base address of Always On Register is
>> different fromThe driver does not have to be in the the base address
>> of GPIO(Pinctrl). Thus, there is no way to control the I/O Rail using GPIO
>Pad configuration.
>
>I don't see why this would be pin control related, and that is as you point out
>leading to some confused discussions here.
This is not related to a pin control. I pointed out this in the commit
description to
indicate that for Keem Bay HW to modelling as pinctrl to call the SMCC Arm is
not
a good approach.
>
>We do have something like this generic pin config:
>
> * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different
>power
> * supplies, the argument to this parameter (on a custom format) tells
> * the driver which alternative power source to use.
>
>But it's ... yeah. It usually has a very specific purpose of selecting one of
>two
>available voltage rails inside the SoC. And it needs to apply to one pin or pin
>group. Also it kind of implies that those voltages are always on.
>
For Keembay HW, we could not apply on any pins because we do not have a
direct access to control this pad. That is why, currently I configure this
voltage rail
supply through the SMCCs Arm wrapper.
Unless if we fake some pin example GPIO32-37 for SD, which using "*pinconf_set"
pointed
to config param of PIN_CONFIG_POWER_SOURCE, then call the
keembay_io_rail_supplied_voltage()
to change the IO rail voltage feeding.
By means calling keembay_io_rail_supplied_voltage(), we call ARM SMCC in this
case condition ?
I was referring to this
https://elixir.bootlin.com/linux/v5.10-rc6/source/drivers/pinctrl/renesas/pinctrl.c#L706
>As you say:
>
>> From the Databook itself with additional confirmation from Keem Bay HW
>> SOC Design Architect, there is no direct control of these AON register
>> bits from GPIO pads.
>
>The keembay_io_rail_supplied_voltage() more resembles a selector (choose
>one on a menu) voltage regulator to me if anything.
Keem Bay HW SoC does not have its own voltage regulator for sd card.
Final IO line voltage depends on supplied voltage applied to their I/O
Rail and the output of the i2c expander pin which go into power mux.
>
>> On the other hand, using ARM SMC (Secure Monitor Call) directly from
>> pin control driver for the sake of implement it as pin control model
>> is not a good approach.
>
>Yeah it has to be called from somewhere, if you want an abstraction to make
>the driver neutral to any machine, then use a selector regulator. It can be
>placed anywhere in the kernel as long as you can reference it.
Sorry. I am not really aware of selector regulator. Can you point me to any
references
for this?
>
>The register is called (according to the code) AON_CGF1 (really? not
>AON_CFG1?) and the "ON" part in "AON" makes it sound li
[PATCH 1/2] dt-bindings: pinctrl: qcom: Add SM8350 pinctrl bindings
Add device tree binding Documentation details for Qualcomm SM8350
pinctrl driver.
Signed-off-by: Vinod Koul
---
.../pinctrl/qcom,sdm8350-pinctrl.yaml | 151 ++
1 file changed, 151 insertions(+)
create mode 100644
Documentation/devicetree/bindings/pinctrl/qcom,sdm8350-pinctrl.yaml
diff --git
a/Documentation/devicetree/bindings/pinctrl/qcom,sdm8350-pinctrl.yaml
b/Documentation/devicetree/bindings/pinctrl/qcom,sdm8350-pinctrl.yaml
new file mode 100644
index ..a47d120a3fd0
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm8350-pinctrl.yaml
@@ -0,0 +1,151 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/qcom,sdm8350-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. SM8350 TLMM block
+
+maintainers:
+ - Vinod Koul
+
+description: |
+ This binding describes the Top Level Mode Multiplexer block found in the
+ SM8350 platform.
+
+properties:
+ compatible:
+const: qcom,sm8350-pinctrl
+
+ reg:
+description: Specifies the base address and size of the TLMM register space
+maxItems: 1
+
+ interrupts:
+description: Specifies the TLMM summary IRQ
+maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+description: Specifies the PIN numbers and Flags, as defined in
+ include/dt-bindings/interrupt-controller/irq.h
+const: 2
+
+ gpio-controller: true
+
+ '#gpio-cells':
+description: Specifying the pin number and flags, as defined in
+ include/dt-bindings/gpio/gpio.h
+const: 2
+
+ gpio-ranges:
+maxItems: 1
+
+ gpio-reserved-ranges:
+maxItems: 1
+
+#PIN CONFIGURATION NODES
+patternProperties:
+ '-pins$':
+type: object
+description:
+ Pinctrl node's client devices use subnodes for desired pin configuration.
+ Client device subnodes use below standard properties.
+$ref: "/schemas/pinctrl/pincfg-node.yaml"
+
+properties:
+ pins:
+description:
+ List of gpio pins affected by the properties specified in this
subnode.
+items:
+ oneOf:
+- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
+- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
sdc2_data ]
+minItems: 1
+maxItems: 36
+
+ function:
+description:
+ Specify the alternative function to be configured for the specified
+ pins. Functions are only valid for gpio pins.
+enum: [ atest_char, atest_usb, audio_ref, cam_mclk, cci_async,
+cci_i2c, cci_timer, cmu_rng, coex_uart1, coex_uart2, cri_trng,
+cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1,
+ddr_pxi2, ddr_pxi3, dp_hot, dp_lcd, gcc_gp1, gcc_gp2, gcc_gp3,
+gpio, ibi_i3c, jitter_bist, lpass_slimbus, mdp_vsync,
mdp_vsync0,
+mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s0_data0, mi2s0_data1,
+mi2s0_sck, mi2s0_ws, mi2s1_data0, mi2s1_data1, mi2s1_sck,
+mi2s1_ws, mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws,
+mss_grfc0, mss_grfc1, mss_grfc10, mss_grfc11, mss_grfc12,
+mss_grfc2, mss_grfc3, mss_grfc4, mss_grfc5, mss_grfc6,
+mss_grfc7, mss_grfc8, mss_grfc9, nav_gpio, pa_indicator,
+pcie0_clkreqn, pcie1_clkreqn, phase_flag, pll_bist, pll_clk,
+pri_mi2s, prng_rosc, qdss_cti, qdss_gpio, qlink0_enable,
+qlink0_request, qlink0_wmss, qlink1_enable, qlink1_request,
+qlink1_wmss, qlink2_enable, qlink2_request, qlink2_wmss, qspi0,
+qspi1, qspi2, qspi3, qspi_clk, qspi_cs, qup0, qup1, qup10,
+qup11, qup12, qup13, qup14, qup15, qup16, qup17, qup18, qup19,
+qup2, qup3, qup4, qup5, qup6, qup7, qup8, qup9, qup_l4, qup_l5,
+qup_l6, sd_write, sdc40, sdc41, sdc42, sdc43, sdc4_clk,
+sdc4_cmd, sec_mi2s, tb_trig, tgu_ch0, tgu_ch1, tgu_ch2,
+tgu_ch3, tsense_pwm1, tsense_pwm2, uim0_clk, uim0_data,
+uim0_present, uim0_reset, uim1_clk, uim1_data, uim1_present,
+uim1_reset, usb2phy_ac, usb_phy, vfr_0, vfr_1, vsense_trigger ]
+
+
+ drive-strength:
+enum: [2, 4, 6, 8, 10, 12, 14, 16]
+default: 2
+description:
+ Selects the drive strength for the specified pins, in mA.
+
+ bias-pull-down: true
+
+ bias-pull-up: true
+
+ bias-disable: true
+
+ output-high: true
+
+ output-low: true
+
+required:
+ - pins
+ - function
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - '#interrupt-cells'
+ - gpio-controller
+ - '#gpio-cells'
+ - gpio-ranges
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+tlmm: pinctrl@f00 {
+
Re: [f2fs-dev] [PATCH v3] f2fs: add F2FS_IOC_DECOMPRESS_FILE and F2FS_IOC_COMPRESS_FILE
On 2020/12/3 14:56, Daeho Jeong wrote: From: Daeho Jeong Added two ioctl to decompress/compress explicitly the compression enabled file in "compress_mode=user" mount option. Using these two ioctls, the users can make a control of compression and decompression of their files. Signed-off-by: Daeho Jeong Reviewed-by: Chao Yu Thanks,
[PATCH v3 2/3] hwmon: ltc2992: Add support for GPIOs.
From: Alexandru Tachici
LTC2992 has 4 open-drain GPIOS. This patch exports to user
space the 4 GPIOs using the GPIO driver Linux API.
Signed-off-by: Alexandru Tachici
---
drivers/hwmon/Kconfig | 1 +
drivers/hwmon/ltc2992.c | 160 +++-
2 files changed, 160 insertions(+), 1 deletion(-)
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index bf9e387270d6..8a8eb42fb1ec 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -861,6 +861,7 @@ config SENSORS_LTC2990
config SENSORS_LTC2992
tristate "Linear Technology LTC2992"
depends on I2C
+ depends on GPIOLIB
help
If you say yes here you get support for Linear Technology LTC2992
I2C System Monitor. The LTC2992 measures current, voltage, and
diff --git a/drivers/hwmon/ltc2992.c b/drivers/hwmon/ltc2992.c
index c11d585a9600..69dbb5aa5dc2 100644
--- a/drivers/hwmon/ltc2992.c
+++ b/drivers/hwmon/ltc2992.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -54,6 +55,9 @@
#define LTC2992_G4_MAX_THRESH 0x74
#define LTC2992_G4_MIN_THRESH 0x76
#define LTC2992_FAULT3 0x92
+#define LTC2992_GPIO_STATUS0x95
+#define LTC2992_GPIO_IO_CTRL 0x96
+#define LTC2992_GPIO_CTRL 0x97
#define LTC2992_POWER(x) (LTC2992_POWER1 + ((x) * 0x32))
#define LTC2992_POWER_MAX(x) (LTC2992_POWER1_MAX + ((x) * 0x32))
@@ -96,8 +100,18 @@
#define LTC2992_VADC_UV_LSB25000
#define LTC2992_VADC_GPIO_UV_LSB 500
+#define LTC2992_GPIO_NR4
+#define LTC2992_GPIO1_BIT 7
+#define LTC2992_GPIO2_BIT 6
+#define LTC2992_GPIO3_BIT 0
+#define LTC2992_GPIO4_BIT 6
+#define LTC2992_GPIO_BIT(x)(LTC2992_GPIO_NR - (x) - 1)
+
struct ltc2992_state {
struct i2c_client *client;
+ struct gpio_chipgc;
+ struct mutexgpio_mutex; /* lock for gpio access */
+ const char *gpio_names[LTC2992_GPIO_NR];
struct regmap *regmap;
u32 r_sense_uohm[2];
};
@@ -111,6 +125,8 @@ struct ltc2992_gpio_regs {
u8 alarm;
u8 min_alarm_msk;
u8 max_alarm_msk;
+ u8 ctrl;
+ u8 ctrl_bit;
};
static const struct ltc2992_gpio_regs ltc2992_gpio_addr_map[] = {
@@ -123,6 +139,8 @@ static const struct ltc2992_gpio_regs
ltc2992_gpio_addr_map[] = {
.alarm = LTC2992_FAULT1,
.min_alarm_msk = LTC2992_GPIO1_FAULT_MSK(0),
.max_alarm_msk = LTC2992_GPIO1_FAULT_MSK(1),
+ .ctrl = LTC2992_GPIO_IO_CTRL,
+ .ctrl_bit = LTC2992_GPIO1_BIT,
},
{
.data = LTC2992_G2,
@@ -133,6 +151,8 @@ static const struct ltc2992_gpio_regs
ltc2992_gpio_addr_map[] = {
.alarm = LTC2992_FAULT2,
.min_alarm_msk = LTC2992_GPIO2_FAULT_MSK(0),
.max_alarm_msk = LTC2992_GPIO2_FAULT_MSK(1),
+ .ctrl = LTC2992_GPIO_IO_CTRL,
+ .ctrl_bit = LTC2992_GPIO2_BIT,
},
{
.data = LTC2992_G3,
@@ -143,6 +163,8 @@ static const struct ltc2992_gpio_regs
ltc2992_gpio_addr_map[] = {
.alarm = LTC2992_FAULT3,
.min_alarm_msk = LTC2992_GPIO3_FAULT_MSK(0),
.max_alarm_msk = LTC2992_GPIO3_FAULT_MSK(1),
+ .ctrl = LTC2992_GPIO_IO_CTRL,
+ .ctrl_bit = LTC2992_GPIO3_BIT,
},
{
.data = LTC2992_G4,
@@ -153,14 +175,20 @@ static const struct ltc2992_gpio_regs
ltc2992_gpio_addr_map[] = {
.alarm = LTC2992_FAULT3,
.min_alarm_msk = LTC2992_GPIO4_FAULT_MSK(0),
.max_alarm_msk = LTC2992_GPIO4_FAULT_MSK(1),
+ .ctrl = LTC2992_GPIO_CTRL,
+ .ctrl_bit = LTC2992_GPIO4_BIT,
},
};
+static const char *ltc2992_gpio_names[LTC2992_GPIO_NR] = {
+ "GPIO1", "GPIO2", "GPIO3", "GPIO4",
+};
+
static int ltc2992_read_reg(struct ltc2992_state *st, u8 addr, const u8
reg_len)
{
u8 regvals[4];
- int ret;
int val;
+ int ret;
int i;
ret = regmap_bulk_read(st->regmap, addr, regvals, reg_len);
@@ -185,6 +213,132 @@ static int ltc2992_write_reg(struct ltc2992_state *st, u8
addr, const u8 reg_len
return regmap_bulk_write(st->regmap, addr, regvals, reg_len);
}
+static int ltc2992_gpio_get(struct gpio_chip *chip, unsigned int offset)
+{
+ struct ltc2992_state *st = gpiochip_get_data(chip);
+ unsigned long gpio_status;
+ int reg;
+
+ mutex_lock(&st->gpio_mutex);
+ reg = ltc2992_read_reg(st, LTC2992_GPIO_STATUS, 1);
+ mutex_unlock(&st->gpio_mutex);
+
+ if (reg < 0)
+ return reg;
+
+ gpio_status = reg;
+
+ ret
[PATCH v3 3/3] dt-binding: hwmon: Add documentation for ltc2992
From: Alexandru Tachici
Add documentation for ltc2992.
Signed-off-by: Alexandru Tachici
---
.../bindings/hwmon/adi,ltc2992.yaml | 80 +++
1 file changed, 80 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml
diff --git a/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml
b/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml
new file mode 100644
index ..64a8fcb7bc46
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwmon/adi,ltc2992.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Linear Technology 2992 Power Monitor
+
+maintainers:
+ - Alexandru Tachici
+
+description: |
+ Linear Technology 2992 Dual Wide Range Power Monitor
+
https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2992.pdf
+
+properties:
+ compatible:
+enum:
+ - adi,ltc2992
+
+ reg:
+maxItems: 1
+
+ '#address-cells':
+const: 1
+
+ '#size-cells':
+const: 0
+
+ avcc-supply: true
+
+patternProperties:
+ "^channel@([0-1])$":
+type: object
+description: |
+ Represents the two supplies to be monitored.
+
+properties:
+ reg:
+description: |
+ The channel number. LTC2992 can monitor two supplies.
+items:
+ minimum: 0
+ maximum: 1
+
+ shunt-resistor-micro-ohms:
+description:
+ The value of curent sense resistor in microohms.
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+i2c1 {
+#address-cells = <1>;
+#size-cells = <0>;
+
+ltc2992@6F {
+#address-cells = <1>;
+#size-cells = <0>;
+
+compatible = "adi,ltc2992";
+reg = <0x6F>;
+
+channel@0 {
+reg = <0x0>;
+shunt-resistor-micro-ohms = <1>;
+};
+
+channel@1 {
+reg = <0x1>;
+shunt-resistor-micro-ohms = <1>;
+};
+};
+};
+...
--
2.20.1
[PATCH v3 1/3] hwmon: ltc2992: Add support
From: Alexandru Tachici LTC2992 is a rail-to-rail system monitor that measures current, voltage, and power of two supplies. Two ADCs simultaneously measure each supply’s current. A third ADC monitors the input voltages and four auxiliary external voltages. Signed-off-by: Alexandru Tachici --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/ltc2992.rst | 56 +++ drivers/hwmon/Kconfig | 11 + drivers/hwmon/Makefile | 1 + drivers/hwmon/ltc2992.c | 813 5 files changed, 882 insertions(+) create mode 100644 Documentation/hwmon/ltc2992.rst create mode 100644 drivers/hwmon/ltc2992.c diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index e6b91ab12978..98575a8b1918 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -100,6 +100,7 @@ Hardware Monitoring Kernel Drivers lm95234 lm95245 lochnagar + ltc2992 ltc2945 ltc2947 ltc2978 diff --git a/Documentation/hwmon/ltc2992.rst b/Documentation/hwmon/ltc2992.rst new file mode 100644 index ..46aa1aa84a1a --- /dev/null +++ b/Documentation/hwmon/ltc2992.rst @@ -0,0 +1,56 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver ltc2992 += + +Supported chips: + * Linear Technology LTC2992 +Prefix: 'ltc2992' +Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2992.pdf + +Author: Alexandru Tachici + + +Description +--- + +This driver supports hardware monitoring for Linear Technology LTC2992 power monitor. + +LTC2992 is a rail-to-rail system monitor that measures current, +voltage, and power of two supplies. + +Two ADCs simultaneously measure each supply’s current. A third ADC monitors +the input voltages and four auxiliary external voltages. + + +Sysfs entries +- + +The following attributes are supported. Limits are read-write, +all other attributes are read-only. + +in_reset_history Reset all highest/lowest values. + +inX_input Measured voltage. +inX_lowest Minimum measured voltage. +inX_highestMaximum measured voltage. +inX_minMinimum voltage allowed. +inX_maxMaximum voltage allowed. +inX_min_alarm An undervoltage occurred. Cleared on read. +inX_max_alarm An overvoltage occurred. Cleared on read. + +currX_inputMeasured current. +currX_lowest Minimum measured current. +currX_highest Maximum measured current. +currX_min Minimum current allowed. +currX_max Maximum current allowed. +currX_min_alarmAn undercurrent occurred. Cleared on read. +currX_max_alarmAn overcurrent occurred. Cleared on read. + +powerX_input Measured power. +powerX_input_lowestMinimum measured voltage. +powerX_input_highest Maximum measured voltage. +powerX_min Minimum power. +powerX_max Maximum power. +powerX_min_alarm An underpower occurred. Cleared on read. +powerX_max_alarm An overpower occurred. Cleared on read. diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index a850e4f0e0bd..bf9e387270d6 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -858,6 +858,17 @@ config SENSORS_LTC2990 This driver can also be built as a module. If so, the module will be called ltc2990. +config SENSORS_LTC2992 + tristate "Linear Technology LTC2992" + depends on I2C + help + If you say yes here you get support for Linear Technology LTC2992 + I2C System Monitor. The LTC2992 measures current, voltage, and + power of two supplies. + + This driver can also be built as a module. If so, the module will + be called ltc2992. + config SENSORS_LTC4151 tristate "Linear Technology LTC4151" depends on I2C diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 9db2903b61e5..d6172c4807c4 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -118,6 +118,7 @@ obj-$(CONFIG_SENSORS_LTC2947) += ltc2947-core.o obj-$(CONFIG_SENSORS_LTC2947_I2C) += ltc2947-i2c.o obj-$(CONFIG_SENSORS_LTC2947_SPI) += ltc2947-spi.o obj-$(CONFIG_SENSORS_LTC2990) += ltc2990.o +obj-$(CONFIG_SENSORS_LTC2992) += ltc2992.o obj-$(CONFIG_SENSORS_LTC4151) += ltc4151.o obj-$(CONFIG_SENSORS_LTC4215) += ltc4215.o obj-$(CONFIG_SENSORS_LTC4222) += ltc4222.o diff --git a/drivers/hwmon/ltc2992.c b/drivers/hwmon/ltc2992.c new file mode 100644 index ..c11d585a9600 --- /dev/null +++ b/drivers/hwmon/ltc2992.c @@ -0,0 +1,813 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * LTC2992 - Dual Wide Range Power Monitor + * + * Copyright 2020 Analog Devices Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define LTC2992_CTRLB
[PATCH v3 0/3] hwmon: ltc2992: Add support
From: Alexandru Tachici LTC2992 is a rail-to-rail system monitor that measures current, voltage, and power of two supplies. Two ADCs simultaneously measure each supply’s current. A third ADC monitors the input voltages and four auxiliary external voltages (GPIOs). 1. Use hwmon to create sysfs entries for current, voltage and power of two 0V to 100V supplies. Create sysfs entries for voltage sensed on the 4 GPIO pins. 2. Expose to userspace the 4 open-drain GPIOs provided by ltc2992. 3. DT bindings for ltc2992. Alexandru Tachici (3): hwmon: ltc2992: Add support hwmon: ltc2992: Add support for GPIOs. dt-binding: hwmon: Add documentation for ltc2992 Changelog v2 -> v3: - removed unnecessary includes - removed unnecessary initialization of 'reg' in ltc2992_write_in() and ltc2992_write_power(). - removed i2c_check_functionality() in ltc2992_i2c_probe .../bindings/hwmon/adi,ltc2992.yaml | 80 ++ Documentation/hwmon/index.rst | 1 + Documentation/hwmon/ltc2992.rst | 56 + drivers/hwmon/Kconfig | 12 + drivers/hwmon/Makefile| 1 + drivers/hwmon/ltc2992.c | 971 ++ 6 files changed, 1121 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml create mode 100644 Documentation/hwmon/ltc2992.rst create mode 100644 drivers/hwmon/ltc2992.c -- 2.20.1
Herzlichen Glückwunsch zum Gewinn !!!
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Re: [f2fs-dev] [PATCH v2 1/2] f2fs: add compress_mode mount option
On 2020/12/1 12:08, Daeho Jeong wrote: From: Daeho Jeong We will add a new "compress_mode" mount option to control file compression mode. This supports "fs" and "user". In "fs" mode (default), f2fs does automatic compression on the compression enabled files. In "user" mode, f2fs disables the automaic compression and gives the user discretion of choosing the target file and the timing. It means the user can do manual compression/decompression on the compression enabled files using ioctls. Signed-off-by: Daeho Jeong Reviewed-by: Chao Yu Thanks,
[PATCH 4/5] clk: qcom: clk-alpha-pll: Add support for Lucid 5LPE PLL
From: Vivek Aknurwar
Lucid 5LPE is a slightly different Lucid PLL with different offsets and
porgramming sequence so add support for these
Signed-off-by: Vivek Aknurwar
Signed-off-by: Jeevan Shriram
[vkoul: rebase and tidy up for upstream]
Signed-off-by: Vinod Koul
---
drivers/clk/qcom/clk-alpha-pll.c | 223 +++
drivers/clk/qcom/clk-alpha-pll.h | 4 +
2 files changed, 227 insertions(+)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index 564431130a76..31d86e5e55b7 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -146,6 +146,12 @@ EXPORT_SYMBOL_GPL(clk_alpha_pll_regs);
/* LUCID PLL specific settings and offsets */
#define LUCID_PCAL_DONEBIT(27)
+/* LUCID 5LPE PLL specific settings and offsets */
+#define LUCID_5LPE_PCAL_DONE BIT(11)
+#define LUCID_5LPE_ENABLE_VOTE_RUN BIT(21)
+#define LUCID_5LPE_PLL_LATCH_INPUT BIT(14)
+#define LUCID_5LPE_ALPHA_PLL_ACK_LATCH BIT(13)
+
#define pll_alpha_width(p) \
((PLL_ALPHA_VAL_U(p) - PLL_ALPHA_VAL(p) == 4) ? \
ALPHA_REG_BITWIDTH : ALPHA_REG_16BIT_WIDTH)
@@ -1561,3 +1567,220 @@ const struct clk_ops clk_alpha_pll_postdiv_lucid_ops = {
.set_rate = clk_alpha_pll_postdiv_fabia_set_rate,
};
EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_lucid_ops);
+
+static int alpha_pll_lucid_5lpe_enable(struct clk_hw *hw)
+{
+ struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
+ u32 val;
+ int ret;
+
+ ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);
+ if (ret)
+ return ret;
+
+ /* If in FSM mode, just vote for it */
+ if (val & LUCID_5LPE_ENABLE_VOTE_RUN) {
+ ret = clk_enable_regmap(hw);
+ if (ret)
+ return ret;
+ return wait_for_pll_enable_lock(pll);
+ }
+
+ /* Check if PLL is already enabled */
+ ret = trion_pll_is_enabled(pll, pll->clkr.regmap);
+ if (ret < 0)
+ return ret;
+
+ ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N,
PLL_RESET_N);
+ if (ret)
+ return ret;
+
+ /* Set operation mode to RUN */
+ regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_RUN);
+
+ ret = wait_for_pll_enable_lock(pll);
+ if (ret)
+ return ret;
+
+ /* Enable the PLL outputs */
+ ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
PLL_OUT_MASK, PLL_OUT_MASK);
+ if (ret)
+ return ret;
+
+ /* Enable the global PLL outputs */
+ ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL,
PLL_OUTCTRL);
+ if (ret)
+ return ret;
+
+ /* Ensure that the write above goes through before returning. */
+ mb();
+ return ret;
+}
+
+static void alpha_pll_lucid_5lpe_disable(struct clk_hw *hw)
+{
+ struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
+ u32 val;
+ int ret;
+
+ ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);
+ if (ret)
+ return;
+
+ /* If in FSM mode, just unvote it */
+ if (val & LUCID_5LPE_ENABLE_VOTE_RUN) {
+ clk_disable_regmap(hw);
+ return;
+ }
+
+ /* Disable the global PLL output */
+ ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL,
0);
+ if (ret)
+ return;
+
+ /* Disable the PLL outputs */
+ ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
PLL_OUT_MASK, 0);
+ if (ret)
+ return;
+
+ /* Place the PLL mode in STANDBY */
+ regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_STANDBY);
+}
+
+/*
+ * The Lucid 5LPE PLL requires a power-on self-calibration which happens
+ * when the PLL comes out of reset. Calibrate in case it is not completed.
+ */
+static int alpha_pll_lucid_5lpe_prepare(struct clk_hw *hw)
+{
+ struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
+ struct clk_hw *p;
+ u32 regval;
+ int ret;
+
+ /* Return early if calibration is not needed. */
+ regmap_read(pll->clkr.regmap, PLL_MODE(pll), ®val);
+ if (regval & LUCID_5LPE_PCAL_DONE)
+ return 0;
+
+ p = clk_hw_get_parent(hw);
+ if (!p)
+ return -EINVAL;
+
+ ret = alpha_pll_lucid_5lpe_enable(hw);
+ if (ret)
+ return ret;
+
+ alpha_pll_lucid_5lpe_disable(hw);
+
+ return 0;
+}
+
+static int alpha_pll_lucid_5lpe_set_rate(struct clk_hw *hw, unsigned long rate,
+unsigned long prate)
+{
+ struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
+ unsigned long rrate;
+ u32 regval, l;
+ u64 a;
+ int ret;
+
+ rrate = alpha_pll_round_rate(rate, prate, &l, &a,
ALPHA_REG_16BIT_W
[PATCH 5/5] clk: qcom: gcc: Add clock driver for SM8350
From: Vivek Aknurwar
This adds Global Clock controller (GCC) driver for SM8350 SoC
Signed-off-by: Vivek Aknurwar
Signed-off-by: Jeevan Shriram
[vkoul: rebase and tidy up for upstream]
Signed-off-by: Vinod Koul
---
drivers/clk/qcom/Kconfig |9 +
drivers/clk/qcom/Makefile |1 +
drivers/clk/qcom/gcc-sm8350.c | 3959 +
3 files changed, 3969 insertions(+)
create mode 100644 drivers/clk/qcom/gcc-sm8350.c
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 3a965bd326d5..5015dd9332cd 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -437,6 +437,15 @@ config SM_GCC_8250
Say Y if you want to use peripheral devices such as UART,
SPI, I2C, USB, SD/UFS, PCIe etc.
+config SM_GCC_8350
+ tristate "SM8350 Global Clock Controller"
+ select QCOM_GDSC
+ help
+ Support for the global clock controller on SM8350 devices.
+ Say Y if you want to use peripheral devices such as UART,
+ SPI, I2C, USB, SD/UFS, PCIe etc.
+
+
config SM_GPUCC_8150
tristate "SM8150 Graphics Clock Controller"
select SM_GCC_8150
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index 11ae86febe87..915794872e38 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -67,6 +67,7 @@ obj-$(CONFIG_SDM_VIDEOCC_845) += videocc-sdm845.o
obj-$(CONFIG_SM_DISPCC_8250) += dispcc-sm8250.o
obj-$(CONFIG_SM_GCC_8150) += gcc-sm8150.o
obj-$(CONFIG_SM_GCC_8250) += gcc-sm8250.o
+obj-$(CONFIG_SM_GCC_8350) += gcc-sm8350.o
obj-$(CONFIG_SM_GPUCC_8150) += gpucc-sm8150.o
obj-$(CONFIG_SM_GPUCC_8250) += gpucc-sm8250.o
obj-$(CONFIG_SM_VIDEOCC_8150) += videocc-sm8150.o
diff --git a/drivers/clk/qcom/gcc-sm8350.c b/drivers/clk/qcom/gcc-sm8350.c
new file mode 100644
index ..c6114a9c5655
--- /dev/null
+++ b/drivers/clk/qcom/gcc-sm8350.c
@@ -0,0 +1,3959 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2020 Linaro Limited
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "clk-alpha-pll.h"
+#include "clk-branch.h"
+#include "clk-pll.h"
+#include "clk-rcg.h"
+#include "clk-regmap.h"
+#include "clk-regmap-divider.h"
+#include "clk-regmap-mux.h"
+#include "common.h"
+#include "reset.h"
+
+enum {
+ P_BI_TCXO,
+ P_CORE_BI_PLL_TEST_SE,
+ P_GCC_GPLL0_OUT_EVEN,
+ P_GCC_GPLL0_OUT_MAIN,
+ P_GCC_GPLL4_OUT_MAIN,
+ P_GCC_GPLL9_OUT_MAIN,
+ P_PCIE_0_PIPE_CLK,
+ P_PCIE_1_PIPE_CLK,
+ P_SLEEP_CLK,
+ P_UFS_CARD_RX_SYMBOL_0_CLK,
+ P_UFS_CARD_RX_SYMBOL_1_CLK,
+ P_UFS_CARD_TX_SYMBOL_0_CLK,
+ P_UFS_PHY_RX_SYMBOL_0_CLK,
+ P_UFS_PHY_RX_SYMBOL_1_CLK,
+ P_UFS_PHY_TX_SYMBOL_0_CLK,
+ P_USB3_PHY_WRAPPER_GCC_USB30_PIPE_CLK,
+ P_USB3_UNI_PHY_SEC_GCC_USB30_PIPE_CLK,
+};
+
+static struct clk_alpha_pll gcc_gpll0 = {
+ .offset = 0x0,
+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID],
+ .clkr = {
+ .enable_reg = 0x52018,
+ .enable_mask = BIT(0),
+ .hw.init = &(struct clk_init_data){
+ .name = "gcc_gpll0",
+ .parent_data = &(const struct clk_parent_data){
+ .fw_name = "bi_tcxo",
+ },
+ .num_parents = 1,
+ .ops = &clk_alpha_pll_fixed_lucid_5lpe_ops,
+ },
+ },
+};
+
+static const struct clk_div_table post_div_table_gcc_gpll0_out_even[] = {
+ { 0x1, 2 },
+ { }
+};
+
+static struct clk_alpha_pll_postdiv gcc_gpll0_out_even = {
+ .offset = 0x0,
+ .post_div_shift = 8,
+ .post_div_table = post_div_table_gcc_gpll0_out_even,
+ .num_post_div = ARRAY_SIZE(post_div_table_gcc_gpll0_out_even),
+ .width = 4,
+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID],
+ .clkr.hw.init = &(struct clk_init_data){
+ .name = "gcc_gpll0_out_even",
+ .parent_data = &(const struct clk_parent_data){
+ .hw = &gcc_gpll0.clkr.hw,
+ },
+ .num_parents = 1,
+ .ops = &clk_alpha_pll_postdiv_lucid_5lpe_ops,
+ },
+};
+
+static struct clk_alpha_pll gcc_gpll4 = {
+ .offset = 0x76000,
+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID],
+ .clkr = {
+ .enable_reg = 0x52018,
+ .enable_mask = BIT(4),
+ .hw.init = &(struct clk_init_data){
+ .name = "gcc_gpll4",
+ .parent_data = &(const struct clk_parent_data){
+ .fw_name = "bi_tcxo",
+ .name = "bi_tcxo",
+ },
+ .num_parents = 1,
+
[PATCH 0/5] Add clock drivers for SM8350
This add rpmhcc and gcc clock controller drivers for the controllers found in SM8350 SoC Vinod Koul (3): dt-bindings: clock: Add RPMHCC bindings for SM8350 clk: qcom: rpmh: add support for SM8350 rpmh clocks dt-bindings: clock: Add SM8350 GCC clock bindings Vivek Aknurwar (2): clk: qcom: clk-alpha-pll: Add support for Lucid 5LPE PLL clk: qcom: gcc: Add clock driver for SM8350 .../bindings/clock/qcom,gcc-sm8350.yaml | 68 + .../bindings/clock/qcom,rpmhcc.yaml |1 + drivers/clk/qcom/Kconfig |9 + drivers/clk/qcom/Makefile |1 + drivers/clk/qcom/clk-alpha-pll.c | 223 + drivers/clk/qcom/clk-alpha-pll.h |4 + drivers/clk/qcom/clk-rpmh.c | 34 + drivers/clk/qcom/gcc-sm8350.c | 3959 + include/dt-bindings/clock/qcom,gcc-sm8350.h | 261 ++ include/dt-bindings/clock/qcom,rpmh.h |8 + 10 files changed, 4568 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml create mode 100644 drivers/clk/qcom/gcc-sm8350.c create mode 100644 include/dt-bindings/clock/qcom,gcc-sm8350.h -- 2.26.2
Re: [PATCH v5 0/4] kasan: add workqueue stack for generic KASAN
On Thu, Dec 3, 2020 at 3:21 AM Walter Wu wrote: > > Syzbot reports many UAF issues for workqueue, see [1]. > In some of these access/allocation happened in process_one_work(), > we see the free stack is useless in KASAN report, it doesn't help > programmers to solve UAF for workqueue issue. > > This patchset improves KASAN reports by making them to have workqueue > queueing stack. It is useful for programmers to solve use-after-free > or double-free memory issue. > > Generic KASAN also records the last two workqueue stacks and prints > them in KASAN report. It is only suitable for generic KASAN. > > [1]https://groups.google.com/g/syzkaller-bugs/search?q=%22use-after-free%22+process_one_work > [2]https://bugzilla.kernel.org/show_bug.cgi?id=198437 > > Walter Wu (4): > workqueue: kasan: record workqueue stack > kasan: print workqueue stack > lib/test_kasan.c: add workqueue test case > kasan: update documentation for generic kasan > > --- > Changes since v4: > - Not found timer use case, so that remove timer patch > - remove a mention of call_rcu() from the kasan_record_aux_stack() > Thanks for Dmitry and Alexander suggestion. > > Changes since v3: > - testcases have merge conflict, so that need to > be rebased onto the KASAN-KUNIT. > > Changes since v2: > - modify kasan document to be readable, > Thanks for Marco suggestion. > > Changes since v1: > - Thanks for Marco and Thomas suggestion. > - Remove unnecessary code and fix commit log > - reuse kasan_record_aux_stack() and aux_stack > to record timer and workqueue stack. > - change the aux stack title for common name. > > --- > Documentation/dev-tools/kasan.rst | 5 +++-- > kernel/workqueue.c| 3 +++ > lib/test_kasan_module.c | 29 + > mm/kasan/generic.c| 4 +--- > mm/kasan/report.c | 4 ++-- > 5 files changed, 38 insertions(+), 7 deletions(-) Hi Walter, Thanks for the update. The series still looks good to me. I see patches already have my Reviewed-by, so I will not resend them.
[PATCH 2/5] clk: qcom: rpmh: add support for SM8350 rpmh clocks
This adds the RPMH clocks present in SM8350 SoC
Signed-off-by: Vinod Koul
---
drivers/clk/qcom/clk-rpmh.c | 34 +++
include/dt-bindings/clock/qcom,rpmh.h | 8 +++
2 files changed, 42 insertions(+)
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index e2c669b08aff..64cab4403a17 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c
@@ -432,6 +432,39 @@ static const struct clk_rpmh_desc clk_rpmh_sm8250 = {
.num_clks = ARRAY_SIZE(sm8250_rpmh_clocks),
};
+DEFINE_CLK_RPMH_VRM(sm8350, div_clk1, div_clk1_ao, "divclka1", 2);
+DEFINE_CLK_RPMH_VRM(sm8350, rf_clk4, rf_clk4_ao, "rfclka4", 1);
+DEFINE_CLK_RPMH_VRM(sm8350, rf_clk5, rf_clk5_ao, "rfclka5", 1);
+DEFINE_CLK_RPMH_BCM(sm8350, pka, "PKA0");
+DEFINE_CLK_RPMH_BCM(sm8350, hwkm, "HK0");
+
+static struct clk_hw *sm8350_rpmh_clocks[] = {
+ [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw,
+ [RPMH_CXO_CLK_A]= &sdm845_bi_tcxo_ao.hw,
+ [RPMH_DIV_CLK1] = &sm8350_div_clk1.hw,
+ [RPMH_DIV_CLK1_A] = &sm8350_div_clk1_ao.hw,
+ [RPMH_LN_BB_CLK1] = &sm8250_ln_bb_clk1.hw,
+ [RPMH_LN_BB_CLK1_A] = &sm8250_ln_bb_clk1_ao.hw,
+ [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw,
+ [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw,
+ [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw,
+ [RPMH_RF_CLK1_A]= &sdm845_rf_clk1_ao.hw,
+ [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw,
+ [RPMH_RF_CLK3_A]= &sdm845_rf_clk3_ao.hw,
+ [RPMH_RF_CLK4] = &sm8350_rf_clk4.hw,
+ [RPMH_RF_CLK4_A]= &sm8350_rf_clk4_ao.hw,
+ [RPMH_RF_CLK5] = &sm8350_rf_clk5.hw,
+ [RPMH_RF_CLK5_A]= &sm8350_rf_clk5_ao.hw,
+ [RPMH_IPA_CLK] = &sdm845_ipa.hw,
+ [RPMH_PKA_CLK] = &sm8350_pka.hw,
+ [RPMH_HWKM_CLK] = &sm8350_hwkm.hw,
+};
+
+static const struct clk_rpmh_desc clk_rpmh_sm8350 = {
+ .clks = sm8350_rpmh_clocks,
+ .num_clks = ARRAY_SIZE(sm8350_rpmh_clocks),
+};
+
static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
void *data)
{
@@ -519,6 +552,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
{ .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845},
{ .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150},
{ .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250},
+ { .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350},
{ }
};
MODULE_DEVICE_TABLE(of, clk_rpmh_match_table);
diff --git a/include/dt-bindings/clock/qcom,rpmh.h
b/include/dt-bindings/clock/qcom,rpmh.h
index 2e6c54e65455..6dbe5d398bf0 100644
--- a/include/dt-bindings/clock/qcom,rpmh.h
+++ b/include/dt-bindings/clock/qcom,rpmh.h
@@ -21,5 +21,13 @@
#define RPMH_IPA_CLK 12
#define RPMH_LN_BB_CLK113
#define RPMH_LN_BB_CLK1_A 14
+#define RPMH_DIV_CLK1 15
+#define RPMH_DIV_CLK1_A16
+#define RPMH_RF_CLK4 17
+#define RPMH_RF_CLK4_A 18
+#define RPMH_RF_CLK5 19
+#define RPMH_RF_CLK5_A 20
+#define RPMH_PKA_CLK 21
+#define RPMH_HWKM_CLK 22
#endif
--
2.26.2
[PATCH 3/5] dt-bindings: clock: Add SM8350 GCC clock bindings
Add device tree bindings for global clock controller on SM8350 SoCs.
Signed-off-by: Vinod Koul
---
.../bindings/clock/qcom,gcc-sm8350.yaml | 68 +
include/dt-bindings/clock/qcom,gcc-sm8350.h | 261 ++
2 files changed, 329 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml
create mode 100644 include/dt-bindings/clock/qcom,gcc-sm8350.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml
b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml
new file mode 100644
index ..2b0939f81162
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Global Clock & Reset Controller Binding for SM8350
+
+maintainers:
+ - Vinod Koul
+
+description: |
+ Qualcomm global clock control module which supports the clocks, resets and
+ power domains on SM8350.
+
+ See also:
+ - dt-bindings/clock/qcom,gcc-sm8350.h
+
+properties:
+ compatible:
+const: qcom,gcc-sm8350
+
+ clocks:
+items:
+ - description: Board XO source
+ - description: Sleep clock source
+
+ clock-names:
+items:
+ - const: bi_tcxo
+ - const: sleep_clk
+
+ '#clock-cells':
+const: 1
+
+ '#reset-cells':
+const: 1
+
+ '#power-domain-cells':
+const: 1
+
+ reg:
+maxItems: 1
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - reg
+ - '#clock-cells'
+ - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+clock-controller@10 {
+ compatible = "qcom,gcc-sm8350";
+ reg = <0x0010 0x1f>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&sleep_clk>;
+ clock-names = "bi_tcxo", "sleep_clk";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+};
+
+...
diff --git a/include/dt-bindings/clock/qcom,gcc-sm8350.h
b/include/dt-bindings/clock/qcom,gcc-sm8350.h
new file mode 100644
index ..2462f64f6e75
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,gcc-sm8350.h
@@ -0,0 +1,261 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2020, Linaro Limited
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_GCC_SM8350_H
+#define _DT_BINDINGS_CLK_QCOM_GCC_SM8350_H
+
+/* GCC HW clocks */
+#define CORE_BI_PLL_TEST_SE0
+#define PCIE_0_PIPE_CLK1
+#define PCIE_1_PIPE_CLK2
+#define UFS_CARD_RX_SYMBOL_0_CLK 3
+#define UFS_CARD_RX_SYMBOL_1_CLK 4
+#define UFS_CARD_TX_SYMBOL_0_CLK 5
+#define UFS_PHY_RX_SYMBOL_0_CLK6
+#define UFS_PHY_RX_SYMBOL_1_CLK7
+#define UFS_PHY_TX_SYMBOL_0_CLK8
+#define USB3_PHY_WRAPPER_GCC_USB30_PIPE_CLK9
+#define USB3_UNI_PHY_SEC_GCC_USB30_PIPE_CLK10
+
+/* GCC clocks */
+#define GCC_AGGRE_NOC_PCIE_0_AXI_CLK 11
+#define GCC_AGGRE_NOC_PCIE_1_AXI_CLK 12
+#define GCC_AGGRE_NOC_PCIE_TBU_CLK 13
+#define GCC_AGGRE_UFS_CARD_AXI_CLK 14
+#define GCC_AGGRE_UFS_CARD_AXI_HW_CTL_CLK 15
+#define GCC_AGGRE_UFS_PHY_AXI_CLK 16
+#define GCC_AGGRE_UFS_PHY_AXI_HW_CTL_CLK 17
+#define GCC_AGGRE_USB3_PRIM_AXI_CLK18
+#define GCC_AGGRE_USB3_SEC_AXI_CLK 19
+#define GCC_BOOT_ROM_AHB_CLK 20
+#define GCC_CAMERA_AHB_CLK 21
+#define GCC_CAMERA_HF_AXI_CLK 22
+#define GCC_CAMERA_SF_AXI_CLK 23
+#define GCC_CAMERA_XO_CLK 24
+#define GCC_CFG_NOC_USB3_PRIM_AXI_CLK 25
+#define GCC_CFG_NOC_USB3_SEC_AXI_CLK 26
+#define GCC_DDRSS_GPU_AXI_CLK 27
+#define GCC_DDRSS_PCIE_SF_TBU_CLK 28
+#define GCC_DISP_AHB_CLK 29
+#define GCC_DISP_HF_AXI_CLK30
+#define GCC_DISP_SF_AXI_CLK31
+#define GCC_DISP_XO_CLK32
+#define GCC_GP1_CLK33
+#define GCC_GP1_CLK_SRC34
+#define GCC_GP2_CLK
[PATCH 1/5] dt-bindings: clock: Add RPMHCC bindings for SM8350
Add bindings and update documentation for clock rpmh driver on SM8350. Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml index a46a3a799a70..3037eb98c810 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml @@ -21,6 +21,7 @@ properties: - qcom,sdm845-rpmh-clk - qcom,sm8150-rpmh-clk - qcom,sm8250-rpmh-clk + - qcom,sm8350-rpmh-clk clocks: maxItems: 1 -- 2.26.2
Re: [PATCH 3/3] soc: qcom: rpmh: Conditionally check lockdep_assert_irqs_disabled()
Quoting Maulik Shah (2020-11-26 02:18:18)
> lockdep_assert_irqs_disabled() was added to check rpmh_flush()
> can only be invoked when irqs are disabled, this is true for
> APPS RSC as the last CPU going to deepest low power mode is
> writing sleep and wake TCSes.
>
> However for RSCs that support solver mode, drivers can invoke
> rpmh_write_sleep_and_wake() to immediately write cached sleep
> and wake sets to TCSes from any CPU. Conditionally check if RSC
> controller supports 'HW solver' mode then do not check for irqs
> disabled as such RSCs can write sleepand wake TCSes at any point.
>
> Signed-off-by: Maulik Shah
> ---
> drivers/soc/qcom/rpmh-internal.h | 5 +
> drivers/soc/qcom/rpmh-rsc.c | 3 +++
> drivers/soc/qcom/rpmh.c | 26 ++
> 3 files changed, 30 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/soc/qcom/rpmh-internal.h
> b/drivers/soc/qcom/rpmh-internal.h
> index 79486d6..39fa3c5 100644
> --- a/drivers/soc/qcom/rpmh-internal.h
> +++ b/drivers/soc/qcom/rpmh-internal.h
> @@ -17,6 +17,9 @@
> #define MAX_TCS_NR (MAX_TCS_PER_TYPE * TCS_TYPE_NR)
> #define MAX_TCS_SLOTS (MAX_CMDS_PER_TCS * MAX_TCS_PER_TYPE)
>
> +/* CTRLR specific flags */
> +#define SOLVER_PRESENT 1
> +
> struct rsc_drv;
>
> /**
> @@ -78,6 +81,7 @@ struct rpmh_request {
> * @cache_lock: synchronize access to the cache data
> * @dirty: was the cache updated since flush
> * @in_solver_mode: Controller is busy in solver mode
> + * @flags: Controller specific flags
> * @batch_cache: Cache sleep and wake requests sent as batch
> */
> struct rpmh_ctrlr {
> @@ -85,6 +89,7 @@ struct rpmh_ctrlr {
> spinlock_t cache_lock;
> bool dirty;
> bool in_solver_mode;
> + u32 flags;
Maybe unsigned long is more appropriate? Do we rely on 32-bits vs.
64-bits?
> struct list_head batch_cache;
> };
>
> diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c
> index ffb4ca7..4caaddf 100644
> --- a/drivers/soc/qcom/rpmh-rsc.c
> +++ b/drivers/soc/qcom/rpmh-rsc.c
> @@ -1031,6 +1031,9 @@ static int rpmh_rsc_probe(struct platform_device *pdev)
> if (!solver_config) {
> drv->rsc_pm.notifier_call = rpmh_rsc_cpu_pm_callback;
> cpu_pm_register_notifier(&drv->rsc_pm);
> + drv->client.flags &= ~SOLVER_PRESENT;
> + } else {
> + drv->client.flags |= SOLVER_PRESENT;
It looks like this could be tested by checking for
drv->rsc_pm.notifier_call being non-NULL?
> }
>
> /* Enable the active TCS to send requests immediately */
> diff --git a/drivers/soc/qcom/rpmh.c b/drivers/soc/qcom/rpmh.c
> index 725b8f0..604d511 100644
> --- a/drivers/soc/qcom/rpmh.c
> +++ b/drivers/soc/qcom/rpmh.c
> @@ -83,6 +83,9 @@ static int check_ctrlr_state(struct rpmh_ctrlr *ctrlr, enum
> rpmh_state state)
> if (state != RPMH_ACTIVE_ONLY_STATE)
> return ret;
>
> + if (!(ctrlr->flags & SOLVER_PRESENT))
> + return ret;
> +
> /* Do not allow sending active votes when in solver mode */
> spin_lock(&ctrlr->cache_lock);
> if (ctrlr->in_solver_mode)
> @@ -468,12 +471,24 @@ int rpmh_flush(struct rpmh_ctrlr *ctrlr)
> struct cache_req *p;
> int ret = 0;
>
> - lockdep_assert_irqs_disabled();
> + /*
> +* For RSC that don't have solver mode,
> +* rpmh_flush() is only called when we think we're running
> +* on the last CPU with irqs_disabled.
> +*
> +* For RSC that have solver mode,
> +* rpmh_flush() can be invoked with irqs enabled by any CPU.
> +*
> +* Conditionally check for irqs_disabled only when solver mode
> +* is not available.
> +*/
> +
> + if (!(ctrlr->flags & SOLVER_PRESENT))
> + lockdep_assert_irqs_disabled();
Can we have a different function that is called for the case where
solver mode is present and where solver mode isn't present? It would be
good to clearly show that rpmh_flush() thinks it is being called from
the last CPU vs. from some other random place because the code is
assuming solver vs. non-solver enabled state. It would be clearer from
the call site too.
>
> /*
> -* Currently rpmh_flush() is only called when we think we're running
> -* on the last processor. If the lock is busy it means another
> -* processor is up and it's better to abort than spin.
> +* If the lock is busy it means another transaction is on going,
> +* in such case it's better to abort than spin.
> */
> if (!spin_trylock(&ctrlr->cache_lock))
> return -EBUSY;
Re: [PATCH] mm/vmalloc: randomize vmalloc() allocations
On Wed, Dec 02, 2020 at 08:49:06PM +0200, Topi Miettinen wrote: > On 1.12.2020 23.45, Topi Miettinen wrote: > > Memory mappings inside kernel allocated with vmalloc() are in > > predictable order and packed tightly toward the low addresses. With > > new kernel boot parameter 'randomize_vmalloc=1', the entire area is > > used randomly to make the allocations less predictable and harder to > > guess for attackers. > > > > This also seems to randomize module addresses. I was going to check that > next, so nice surprise! Heh, that's because module_alloc() uses vmalloc() in that way or another :) > -Topi > > > spin_unlock(&free_vmap_area_lock); > > if (unlikely(addr == vend)) > > > -- Sincerely yours, Mike.
Re: [PATCH] bcache: fix panic due to cache_set is null
On 12/3/20 2:25 PM, Yi Li wrote: >> On 12/1/20 12:35 PM, Yi Li wrote: >>> sorry, This patch will cause deadlock, i will check and redo it. >> >> Can you try latest upstream kernel firstly ? Before spending more time >> on the fix. >> > > This issue just happened three times （xenserver7.5 dom0 kernel） on the > same machine and cannot reproduce it now. and have not reproduce it > using the lastest uptream kernel. > Hmm, this is something very probably that I am not able to help. It seems the kernel is a third-part maintained Linux v4.4 based kernel + bcache backport, which is out of my view. If similar problem happens on latest upstream kernel, or at least v5.8+ kernel, I can help to take a look. >> If I remember correctly, when cancel_writeback_rate_update_dwork() is >> not timed out, the cache set memory won't be freed before the >> writeback_rate_update worker terminates. It is possible that I miss >> something in the code, but I suggest to test with a kernel after v5.3, >> and better a v5.8+ kernel. >> >> Coly Li >> > Thanks. > > it is confused that why writeback_rate_update worker run again after > cancel_delayed_work_sync( kernel log telled). > [snipped] Coly Li
[PATCH] MIPS: SMP-CPS: Add support for irq migration when CPU offline
Currently we won't migrate irqs when offline CPUs, which has been implemented on most architectures. That will lead to some devices work incorrectly if the bound cores are offline. While that can be easily supported by enabling GENERIC_IRQ_MIGRATION. But i don't pretty known the reason it was not supported on all MIPS platforms. This patch add the support for irq migration on MIPS CPS platform, and it's tested on the interAptiv processor. Signed-off-by: Wei Li --- arch/mips/Kconfig | 1 + arch/mips/kernel/smp-cps.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a48cb9a71471..8ece19ffe255 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -2510,6 +2510,7 @@ config MIPS_CPS select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 select SYS_SUPPORTS_SMP select WEAK_ORDERING + select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU help Select this if you wish to run an SMP kernel across multiple cores within a MIPS Coherent Processing System. When this option is diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c index 3ab433a8e871..26f74f7d7604 100644 --- a/arch/mips/kernel/smp-cps.c +++ b/arch/mips/kernel/smp-cps.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -465,6 +466,7 @@ static int cps_cpu_disable(void) smp_mb__after_atomic(); set_cpu_online(cpu, false); calculate_cpu_foreign_map(); + irq_migrate_all_off_this_cpu(); return 0; } -- 2.17.1
Re: [f2fs-dev] [PATCH v3] f2fs: avoid race condition for shinker count
On 2020/12/3 14:07, Jaegeuk Kim wrote:
On 11/11, Jaegeuk Kim wrote:
Light reported sometimes shinker gets nat_cnt < dirty_nat_cnt resulting in
wrong do_shinker work. Let's avoid to get stale data by using nat_tree_lock.
Reported-by: Light Hsieh
Signed-off-by: Jaegeuk Kim
---
v3:
- fix to use NM_I(sbi)
fs/f2fs/shrinker.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/fs/f2fs/shrinker.c b/fs/f2fs/shrinker.c
index d66de5999a26..555712ba06d8 100644
--- a/fs/f2fs/shrinker.c
+++ b/fs/f2fs/shrinker.c
@@ -18,7 +18,11 @@ static unsigned int shrinker_run_no;
static unsigned long __count_nat_entries(struct f2fs_sb_info *sbi)
{
- long count = NM_I(sbi)->nat_cnt - NM_I(sbi)->dirty_nat_cnt;
+ long count;
+
+ down_read(&NM_I(sbi)->nat_tree_lock);
+ count = NM_I(sbi)->nat_cnt - NM_I(sbi)->dirty_nat_cnt;
+ up_read(&NM_I(sbi)->nat_tree_lock);
I just fosund this can give kernel hang due to the following backtrace.
f2fs_shrink_count
shrink_slab
shrink_node
do_try_to_free_pages
try_to_free_pages
__alloc_pages_nodemask
alloc_pages_current
allocate_slab
__slab_alloc
__slab_alloc
kmem_cache_alloc
add_free_nid
f2fs_flush_nat_entries
f2fs_write_checkpoint
Oh, I missed that case.
Let me just check like this.
From 971163330224449d90aac90957ea38f77d494f0f Mon Sep 17 00:00:00 2001
From: Jaegeuk Kim
Date: Fri, 6 Nov 2020 13:22:05 -0800
Subject: [PATCH] f2fs: avoid race condition for shrinker count
Light reported sometimes shinker gets nat_cnt < dirty_nat_cnt resulting in
wrong do_shinker work. Let's avoid to return insane overflowed value.
Reported-by: Light Hsieh
Signed-off-by: Jaegeuk Kim
---
fs/f2fs/shrinker.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/fs/f2fs/shrinker.c b/fs/f2fs/shrinker.c
index d66de5999a26..75b5b4aaed99 100644
--- a/fs/f2fs/shrinker.c
+++ b/fs/f2fs/shrinker.c
@@ -18,9 +18,9 @@ static unsigned int shrinker_run_no;
static unsigned long __count_nat_entries(struct f2fs_sb_info *sbi)
{
- long count = NM_I(sbi)->nat_cnt - NM_I(sbi)->dirty_nat_cnt;
-
- return count > 0 ? count : 0;
+ if (NM_I(sbi)->nat_cnt > NM_I(sbi)->dirty_nat_cnt)
+ return NM_I(sbi)->nat_cnt - NM_I(sbi)->dirty_nat_cnt;
Hmm.. in the case that we are not in checkpoint progress, nat_cnt and
dirty_nat_cnt
is mutable, how can we make sure the calculation is non-negative after the check
condition? :(
Thanks
+ return 0;
}
static unsigned long __count_free_nids(struct f2fs_sb_info *sbi)
[PATCH v3] f2fs: add F2FS_IOC_DECOMPRESS_FILE and F2FS_IOC_COMPRESS_FILE
From: Daeho Jeong
Added two ioctl to decompress/compress explicitly the compression
enabled file in "compress_mode=user" mount option.
Using these two ioctls, the users can make a control of compression
and decompression of their files.
Signed-off-by: Daeho Jeong
---
v3: changed error condition and use get_dirty_pages for flush routine
v2: reformed codes based on comments and put gradual flush routine
---
fs/f2fs/file.c| 185 ++
include/uapi/linux/f2fs.h | 2 +
2 files changed, 187 insertions(+)
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index be8db06aca27..3678e25ed17a 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -4026,6 +4026,185 @@ static int f2fs_ioc_set_compress_option(struct file
*filp, unsigned long arg)
return ret;
}
+static int redirty_blocks(struct inode *inode, pgoff_t page_idx, int len)
+{
+ DEFINE_READAHEAD(ractl, NULL, inode->i_mapping, page_idx);
+ struct address_space *mapping = inode->i_mapping;
+ struct page *page;
+ pgoff_t redirty_idx = page_idx;
+ int i, page_len = 0, ret = 0;
+
+ page_cache_ra_unbounded(&ractl, len, 0);
+
+ for (i = 0; i < len; i++, page_idx++) {
+ page = read_cache_page(mapping, page_idx, NULL, NULL);
+ if (IS_ERR(page)) {
+ ret = PTR_ERR(page);
+ break;
+ }
+ page_len++;
+ }
+
+ for (i = 0; i < page_len; i++, redirty_idx++) {
+ page = find_lock_page(mapping, redirty_idx);
+ if (!page)
+ ret = -ENOENT;
+ set_page_dirty(page);
+ f2fs_put_page(page, 1);
+ f2fs_put_page(page, 0);
+ }
+
+ return ret;
+}
+
+static int f2fs_ioc_decompress_file(struct file *filp, unsigned long arg)
+{
+ struct inode *inode = file_inode(filp);
+ struct f2fs_sb_info *sbi = F2FS_I_SB(inode);
+ struct f2fs_inode_info *fi = F2FS_I(inode);
+ pgoff_t page_idx = 0, last_idx;
+ unsigned int blk_per_seg = sbi->blocks_per_seg;
+ int cluster_size = F2FS_I(inode)->i_cluster_size;
+ int count, ret;
+
+ if (!f2fs_sb_has_compression(sbi) ||
+ F2FS_OPTION(sbi).compress_mode != COMPR_MODE_USER)
+ return -EOPNOTSUPP;
+
+ if (!(filp->f_mode & FMODE_WRITE))
+ return -EBADF;
+
+ if (!f2fs_compressed_file(inode))
+ return -EINVAL;
+
+ f2fs_balance_fs(F2FS_I_SB(inode), true);
+
+ file_start_write(filp);
+ inode_lock(inode);
+
+ if (!f2fs_is_compress_backend_ready(inode)) {
+ ret = -EOPNOTSUPP;
+ goto out;
+ }
+
+ if (f2fs_is_mmap_file(inode)) {
+ ret = -EBUSY;
+ goto out;
+ }
+
+ ret = filemap_write_and_wait_range(inode->i_mapping, 0, LLONG_MAX);
+ if (ret)
+ goto out;
+
+ if (!atomic_read(&fi->i_compr_blocks))
+ goto out;
+
+ last_idx = DIV_ROUND_UP(i_size_read(inode), PAGE_SIZE);
+
+ count = last_idx - page_idx;
+ while (count) {
+ int len = min(cluster_size, count);
+
+ ret = redirty_blocks(inode, page_idx, len);
+ if (ret < 0)
+ break;
+
+ if (get_dirty_pages(inode) >= blk_per_seg)
+ filemap_fdatawrite(inode->i_mapping);
+
+ count -= len;
+ page_idx += len;
+ }
+
+ if (!ret)
+ ret = filemap_write_and_wait_range(inode->i_mapping, 0,
+ LLONG_MAX);
+
+ if (ret)
+ f2fs_warn(sbi, "%s: The file might be partially decompressed "
+ "(errno=%d). Please delete the file.\n",
+ __func__, ret);
+out:
+ inode_unlock(inode);
+ file_end_write(filp);
+
+ return ret;
+}
+
+static int f2fs_ioc_compress_file(struct file *filp, unsigned long arg)
+{
+ struct inode *inode = file_inode(filp);
+ struct f2fs_sb_info *sbi = F2FS_I_SB(inode);
+ pgoff_t page_idx = 0, last_idx;
+ unsigned int blk_per_seg = sbi->blocks_per_seg;
+ int cluster_size = F2FS_I(inode)->i_cluster_size;
+ int count, ret;
+
+ if (!f2fs_sb_has_compression(sbi) ||
+ F2FS_OPTION(sbi).compress_mode != COMPR_MODE_USER)
+ return -EOPNOTSUPP;
+
+ if (!(filp->f_mode & FMODE_WRITE))
+ return -EBADF;
+
+ if (!f2fs_compressed_file(inode))
+ return -EINVAL;
+
+ f2fs_balance_fs(F2FS_I_SB(inode), true);
+
+ file_start_write(filp);
+ inode_lock(inode);
+
+ if (!f2fs_is_compress_backend_ready(inode)) {
+ ret = -EOPNOTSUPP;
+ goto out;
+ }
+
+ if (f2fs_is_mmap_file(inode)) {
+ re
[PATCH v1] ASoC: rsnd: core: Check convert rate in rsnd_hw_params
From: Mikhail Durnev
snd_pcm_hw_params_set_rate_near can return incorrect sample rate in
some cases, e.g. when the backend output rate is set to some value higher
than 48000 Hz and the input rate is 8000 Hz. So passing the value returned
by snd_pcm_hw_params_set_rate_near to snd_pcm_hw_params will result in
"FSO/FSI ratio error" and playing no audio at all while the userland
is not properly notified about the issue.
If SRC is unable to convert the requested sample rate to the sample rate
the backend is using, then the requested sample rate should be adjusted in
rsnd_hw_params. The userland will be notified about that change in the
returned hw_params structure.
Signed-off-by: Mikhail Durnev
---
sound/soc/sh/rcar/core.c | 69 +++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
index 6e670b3..289928d 100644
--- a/sound/soc/sh/rcar/core.c
+++ b/sound/soc/sh/rcar/core.c
@@ -1428,8 +1428,75 @@ static int rsnd_hw_params(struct snd_soc_component
*component,
}
if (io->converted_chan)
dev_dbg(dev, "convert channels = %d\n",
io->converted_chan);
- if (io->converted_rate)
+ if (io->converted_rate) {
+ /*
+* SRC supports convert rates from
params_rate(hw_params)/k_down
+* to params_rate(hw_params)*k_up, where k_up is always
6, and
+* k_down depends on number of channels and SRC unit.
+* So all SRC units can upsample audio up to 6 times
regardless
+* its number of channels. And all SRC units can
downsample
+* 2 channel audio up to 6 times too.
+*/
+ int k_up = 6;
+ int k_down = 6;
+ int channel;
+ struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io);
+
dev_dbg(dev, "convert rate = %d\n",
io->converted_rate);
+
+ channel = io->converted_chan ? io->converted_chan :
+ params_channels(hw_params);
+
+ switch (rsnd_mod_id(src_mod)) {
+ /*
+* SRC0 can downsample 4, 6 and 8 channel audio up to 4
times.
+* SRC1, SRC3 and SRC4 can downsample 4 channel audio
+* up to 4 times.
+* SRC1, SRC3 and SRC4 can downsample 6 and 8 channel
audio
+* no more than twice.
+*/
+ case 1:
+ case 3:
+ case 4:
+ if (channel > 4) {
+ k_down = 2;
+ break;
+ }
+ fallthrough;
+ case 0:
+ if (channel > 2)
+ k_down = 4;
+ break;
+
+ /* Other SRC units do not support more than 2 channels
*/
+ default:
+ if (channel > 2)
+ return -EINVAL;
+ }
+
+ if (params_rate(hw_params) > io->converted_rate *
k_down) {
+ hw_param_interval(hw_params,
SNDRV_PCM_HW_PARAM_RATE)->min =
+ io->converted_rate * k_down;
+ hw_param_interval(hw_params,
SNDRV_PCM_HW_PARAM_RATE)->max =
+ io->converted_rate * k_down;
+ hw_params->cmask |= SNDRV_PCM_HW_PARAM_RATE;
+ } else if (params_rate(hw_params) * k_up <
io->converted_rate) {
+ hw_param_interval(hw_params,
SNDRV_PCM_HW_PARAM_RATE)->min =
+ (io->converted_rate + k_up - 1) / k_up;
+ hw_param_interval(hw_params,
SNDRV_PCM_HW_PARAM_RATE)->max =
+ (io->converted_rate + k_up - 1) / k_up;
+ hw_params->cmask |= SNDRV_PCM_HW_PARAM_RATE;
+ }
+
+ /*
+* TBD: Max SRC input and output rates also depend on
number
+* of channels and SRC unit:
+* SRC1, SRC3 and SRC4 do not support more than 128kHz
+* for 6 channel and 96kHz for 8 channel audio.
+* Perhaps this function should return EINVAL if the
input or
+* the output rate exceeds the limitation.
+
[PATCH v3] i2c: ismt: Use dma_set_mask_and_coherent
'pci_set_dma_mask()' + 'pci_set_consistent_dma_mask()' can be replaced by
an equivalent 'dma_set_mask_and_coherent()' which is much less verbose.
Reported-by: kernel test robot
Signed-off-by: Youling Tang
---
v3: Fix build errors of incompatible pointer types.
drivers/i2c/busses/i2c-ismt.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c
index a35a27c..88f6039 100644
--- a/drivers/i2c/busses/i2c-ismt.c
+++ b/drivers/i2c/busses/i2c-ismt.c
@@ -903,16 +903,12 @@ ismt_probe(struct pci_dev *pdev, const struct
pci_device_id *id)
return -ENODEV;
}
- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) ||
- (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0)) {
- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
- (pci_set_consistent_dma_mask(pdev,
-DMA_BIT_MASK(32)) != 0)) {
- dev_err(&pdev->dev, "pci_set_dma_mask fail %p\n",
+ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) != 0)
+ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) !=
0) {
+ dev_err(&pdev->dev, "dma_set_mask_and_coherent fail
%p\n",
pdev);
return -ENODEV;
}
- }
err = ismt_dev_init(priv);
if (err)
--
2.1.0
Re: [PATCH 1/1] efi/efi_test: read RuntimeServicesSupported
On 12/3/20 2:20 AM, ivanhu wrote:
On 12/2/20 7:38 PM, Heinrich Schuchardt wrote:
On 11/30/20 11:38 AM, ivanhu wrote:
On 11/30/20 5:17 PM, Heinrich Schuchardt wrote:
On 11/30/20 9:16 AM, ivanhu wrote:
Hi Heinrich,
Thanks for the patch.
It looks good to me, but I noticed that the runtime_supported_mask was
introduced after 5.7-rc1.
Maybe we should add the kernel version checking for the old kernels.
This is a kernel patch. Why should we check the kernel version in the
kernel code?
As patches may be back-ported we should not make any assumptions in fwts
based on the kernel version. If the ioctl() call fails with errno =
ENOTTY, we know that the kernel does not implement the ioctl call and we
have to assume that all runtime services are available.
Sounds good to me,
Acked-by: Ivan Hu
And I will replace the reading RuntimeServicesSupported efi variable by
using efi_test in fwts RuntimeServicesSupported tests.
FWTS will still test those Unsupported Runtime services to check if it
returns EFI_UNSUPPORTED correctly.
Is that could solve your problem?
If I remember correctly, the problem from you is not to test those
marked Unsupported Runtime services. But from the Spec. 8.1 Runtime
Services Rules and Restrictions,
The problem I reported was that it is impossible to test UEFI runtime
services on U-Boot because FWTS tries to read the non-existent
RuntimeServicesSupported UEFI variable and mistakenly assumes that if
the variable does not exist none of the runtime services is implemented.
Could you provide the result log for me to check?
https://github.com/U-Boot-EFI/u-boot-fwts-results/blob/master/fwts_20_11_fails.txt
is the results log from FWTS 20.11.
https://github.com/U-Boot-EFI/u-boot-fwts-results/blob/master/results-2020-10-31.txt
is the results log from a FWTS built from this branch:
https://github.com/xypron/fwts/commits/bugfixes
Best regards
Heinrich
Ivan
The correct thing to do in FWTS is:
* read RuntimeServicesSupported via the ioctl
* if the ioctl fails assume that all runtime services
are implemented
* if the ioctl fails with errno != ENOTTY write an error message
* for each runtime service marked as not supported
check that it returns EFI_UNSUPPORTED
* for each service marked as supported
check that it works correctly
Best regards
Heinrich
"
Note that this is merely a hint to the OS, which it is free to ignore,
and so the platform is still required to provide callable
implementations of unsupported runtime services that simply return
EFI_UNSUPPORTED.
"
Cheers,
Ivan
Best regards
Heinrich
Cheers,
Ivan
On 11/28/20 3:20 AM, Heinrich Schuchardt wrote:
Since the UEFI 2.8A specification the UEFI enabled firmware provides a
configuration table EFI_RT_PROPERTIES_TABLE which indicates which
runtime
services are enabled. The EFI stub reads this table and saves the
value of
the field RuntimeServicesSupported internally.
The Firmware Test Suite requires the value to determine if UEFI
runtime
services are correctly implemented.
With this patch an IOCTL call is provided to read the value of the
field
RuntimeServicesSupported, e.g.
#define EFI_RUNTIME_GET_SUPPORTED_MASK \
_IOR('p', 0x0C, unsigned int)
unsigned int mask;
fd = open("/dev/efi_test", O_RDWR);
ret = ioctl(fd, EFI_RUNTIME_GET_SUPPORTED_MASK, &mask);
Signed-off-by: Heinrich Schuchardt
---
drivers/firmware/efi/test/efi_test.c | 16
drivers/firmware/efi/test/efi_test.h | 3 +++
2 files changed, 19 insertions(+)
diff --git a/drivers/firmware/efi/test/efi_test.c
b/drivers/firmware/efi/test/efi_test.c
index ddf9eae396fe..47d67bb0a516 100644
--- a/drivers/firmware/efi/test/efi_test.c
+++ b/drivers/firmware/efi/test/efi_test.c
@@ -663,6 +663,19 @@ static long
efi_runtime_query_capsulecaps(unsigned long arg)
return rv;
}
+static long efi_runtime_get_supported_mask(unsigned long arg)
+{
+ unsigned int __user *supported_mask;
+ int rv = 0;
+
+ supported_mask = (unsigned int *)arg;
+
+ if (put_user(efi.runtime_supported_mask, supported_mask))
+ rv = -EFAULT;
+
+ return rv;
+}
+
static long efi_test_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
@@ -699,6 +712,9 @@ static long efi_test_ioctl(struct file *file,
unsigned int cmd,
case EFI_RUNTIME_RESET_SYSTEM:
return efi_runtime_reset_system(arg);
+
+ case EFI_RUNTIME_GET_SUPPORTED_MASK:
+ return efi_runtime_get_supported_mask(arg);
}
return -ENOTTY;
diff --git a/drivers/firmware/efi/test/efi_test.h
b/drivers/firmware/efi/test/efi_test.h
index f2446aa1c2e3..117349e57993 100644
--- a/drivers/firmware/efi/test/efi_test.h
+++ b/drivers/firmware/efi/test/efi_test.h
@@ -118,4 +118,7 @@ struct efi_resetsystem {
#define EFI_RUNTIME_RESET_SYSTEM \
_IOW('p', 0x0B, struct efi_resetsystem)
+#define EFI_RUNTIME_GET_SUPPORTED_MASK \
+ _IOR('p', 0x0C,
[PATCH v2 2/2] riscv/mm: Prevent kernel module to access user memory without uaccess routines
We found this issue in an legacy out-of-tree kernel module
which didn't properly access user space pointer by get/put_user().
Such an illegal access loops in the page fault handler.
To resolve this, let it die here.
Signed-off-by: Eric Lin
Cc: Alan Kao
---
arch/riscv/mm/fault.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c
index 0bcfd0e1b39e..00884c1bac28 100644
--- a/arch/riscv/mm/fault.c
+++ b/arch/riscv/mm/fault.c
@@ -245,6 +245,11 @@ asmlinkage void do_page_fault(struct pt_regs *regs)
if (user_mode(regs))
flags |= FAULT_FLAG_USER;
+ if (!user_mode(regs) && addr < TASK_SIZE &&
+ unlikely(!(regs->status & SR_SUM)))
+ die_kernel_fault("access to user memory without uaccess
routines",
+ addr, regs);
+
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
if (cause == EXC_STORE_PAGE_FAULT)
--
2.17.0
[PATCH v2 1/2] riscv/mm: Introduce a die_kernel_fault() helper function
Like arm64, this patch adds a die_kernel_fault() helper
to ensure the same semantics for the different kernel faults.
Signed-off-by: Eric Lin
Cc: Alan Kao
---
arch/riscv/mm/fault.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c
index 3c8b9e433c67..0bcfd0e1b39e 100644
--- a/arch/riscv/mm/fault.c
+++ b/arch/riscv/mm/fault.c
@@ -19,6 +19,19 @@
#include "../kernel/head.h"
+static void die_kernel_fault(const char *msg, unsigned long addr,
+ struct pt_regs *regs)
+{
+ bust_spinlocks(1);
+
+ pr_alert("Unable to handle kernel %s at virtual address " REG_FMT "\n",
msg,
+ addr);
+
+ bust_spinlocks(0);
+ die(regs, "Oops");
+ do_exit(SIGKILL);
+}
+
static inline void no_context(struct pt_regs *regs, unsigned long addr)
{
/* Are we prepared to handle this kernel fault? */
--
2.17.0
[PATCH v2 0/2] Let illegal access to user-space memory die
Accesses to user-space memory without calling uaccess routine leads to hanging in page fault handler. Like arm64, we let it die earlier in page fault handler. Changes in v2: -Add a die_kernel_fault() helper -Split one long line code into two Eric Lin (2): riscv/mm: Introduce a die_kernel_fault() helper function riscv/mm: Prevent kernel module to access user memory without uaccess routines arch/riscv/mm/fault.c | 18 ++ 1 file changed, 18 insertions(+) -- 2.17.0
Re: [PATCH] vdpa/mlx5: Use random MAC for the vdpa net instance
On Wed, Dec 02, 2020 at 05:00:22PM -0500, Michael S. Tsirkin wrote:
> On Wed, Dec 02, 2020 at 09:48:25PM +0800, Jason Wang wrote:
> >
> > On 2020/12/2 下午5:23, Michael S. Tsirkin wrote:
> > > On Wed, Dec 02, 2020 at 07:57:14AM +0200, Eli Cohen wrote:
> > > > On Wed, Dec 02, 2020 at 12:18:36PM +0800, Jason Wang wrote:
> > > > > On 2020/12/1 下午5:23, Cindy Lu wrote:
> > > > > > On Mon, Nov 30, 2020 at 11:33 PM Michael S.
> > > > > > Tsirkin wrote:
> > > > > > > On Mon, Nov 30, 2020 at 06:41:45PM +0800, Cindy Lu wrote:
> > > > > > > > On Mon, Nov 30, 2020 at 5:33 PM Michael S.
> > > > > > > > Tsirkin wrote:
> > > > > > > > > On Mon, Nov 30, 2020 at 11:27:59AM +0200, Eli Cohen wrote:
> > > > > > > > > > On Mon, Nov 30, 2020 at 04:00:51AM -0500, Michael S.
> > > > > > > > > > Tsirkin wrote:
> > > > > > > > > > > On Mon, Nov 30, 2020 at 08:27:46AM +0200, Eli Cohen wrote:
> > > > > > > > > > > > On Sun, Nov 29, 2020 at 03:08:22PM -0500, Michael S.
> > > > > > > > > > > > Tsirkin wrote:
> > > > > > > > > > > > > On Sun, Nov 29, 2020 at 08:43:51AM +0200, Eli Cohen
> > > > > > > > > > > > > wrote:
> > > > > > > > > > > > > > We should not try to use the VF MAC address as that
> > > > > > > > > > > > > > is used by the
> > > > > > > > > > > > > > regular (e.g. mlx5_core) NIC implementation.
> > > > > > > > > > > > > > Instead, use a random
> > > > > > > > > > > > > > generated MAC address.
> > > > > > > > > > > > > >
> > > > > > > > > > > > > > Suggested by: Cindy Lu
> > > > > > > > > > > > > > Fixes: 1a86b377aa21 ("vdpa/mlx5: Add VDPA driver
> > > > > > > > > > > > > > for supported mlx5 devices")
> > > > > > > > > > > > > > Signed-off-by: Eli Cohen
> > > > > > > > > > > > > I didn't realise it's possible to use VF in two ways
> > > > > > > > > > > > > with and without vdpa.
> > > > > > > > > > > > Using a VF you can create quite a few resources, e.g.
> > > > > > > > > > > > send queues
> > > > > > > > > > > > recieve queues, virtio_net queues etc. So you can
> > > > > > > > > > > > possibly create
> > > > > > > > > > > > several instances of vdpa net devices and nic net
> > > > > > > > > > > > devices.
> > > > > > > > > > > >
> > > > > > > > > > > > > Could you include a bit more description on the
> > > > > > > > > > > > > failure
> > > > > > > > > > > > > mode?
> > > > > > > > > > > > Well, using the MAC address of the nic vport is wrong
> > > > > > > > > > > > since that is the
> > > > > > > > > > > > MAC of the regular NIC implementation of mlx5_core.
> > > > > > > > > > > Right but ATM it doesn't coexist with vdpa so what's the
> > > > > > > > > > > problem?
> > > > > > > > > > >
> > > > > > > > > > This call is wrong: mlx5_query_nic_vport_mac_address()
> > > > > > > > > >
> > > > > > > > > > > > > Is switching to a random mac for such an unusual
> > > > > > > > > > > > > configuration really justified?
> > > > > > > > > > > > Since I can't use the NIC's MAC address, I have two
> > > > > > > > > > > > options:
> > > > > > > > > > > > 1. To get the MAC address as was chosen by the user
> > > > > > > > > > > > administering the
> > > > > > > > > > > > NIC. This should invoke the set_config callback.
> > > > > > > > > > > > Unfortunately this
> > > > > > > > > > > > is not implemented yet.
> > > > > > > > > > > >
> > > > > > > > > > > > 2. Use a random MAC address. This is OK since if (1) is
> > > > > > > > > > > > implemented it
> > > > > > > > > > > > can always override this random configuration.
> > > > > > > > > > > >
> > > > > > > > > > > > > It looks like changing a MAC could break some guests,
> > > > > > > > > > > > > can it not?
> > > > > > > > > > > > >
> > > > > > > > > > > > No, it will not. The current version of mlx5 VDPA does
> > > > > > > > > > > > not allow regular
> > > > > > > > > > > > NIC driver and VDPA to co-exist. I have patches ready
> > > > > > > > > > > > that enable that
> > > > > > > > > > > > from steering point of view. I will post them here once
> > > > > > > > > > > > other patches on
> > > > > > > > > > > > which they depend will be merged.
> > > > > > > > > > > >
> > > > > > > > > > > > https://patchwork.ozlabs.org/project/netdev/patch/20201120230339.651609-12-sae...@nvidia.com/
> > > > > > > > > > > Could you be more explicit on the following points:
> > > > > > > > > > > - which configuration is broken ATM (as in, two device
> > > > > > > > > > > have identical
> > > > > > > > > > > macs? any other issues)?
> > > > > > > > > > The only wrong thing is the call to
> > > > > > > > > > mlx5_query_nic_vport_mac_address().
> > > > > > > > > > It's not breaking anything yet is wrong. The random MAC
> > > > > > > > > > address setting
> > > > > > > > > > is required for the steering patches.
> > > > > > > > > Okay so I'm not sure the Fixes tag at least is appropriate if
> > > > > > > > > it's a
> > > > > > > > > dependency of a new feature.
> > > > > > > > >
> > > > > > > > > > > - why won't device MAC change from guest point of
Re: [PATCH v0] ASoC: rsnd: core: Check convert rate in rsnd_hw_params
On 03.12.2020 08:57, Kuninori Morimoto wrote: I think you want to add "fallthrough" between case 1/3/4 and case 0 ? Hi Morimoto-san, Yes, I will add it in the updated version of the patch. Thanks. The checkpatch script did not tell me about that. Best regards, Misha
[PATCH 2/2] sched: Split the function show_schedstat()
The schedstat include runqueue-specific stats and domain-specific stats,
so split it into two functions, show_rqstat() and show_domainstat().
No functional changes.
Signed-off-by: Yunfeng Ye
---
kernel/sched/stats.c | 101 +++
1 file changed, 54 insertions(+), 47 deletions(-)
diff --git a/kernel/sched/stats.c b/kernel/sched/stats.c
index e99403df3f90..ef75e7d64d32 100644
--- a/kernel/sched/stats.c
+++ b/kernel/sched/stats.c
@@ -12,61 +12,68 @@
*/
#define SCHEDSTAT_VERSION 15
-static int show_schedstat(struct seq_file *seq, void *v)
+static void show_domainstat(struct seq_file *seq, int cpu)
+{
+#ifdef CONFIG_SMP
+ struct sched_domain *sd;
+ int dcount = 0;
+
+ /* domain-specific stats */
+ rcu_read_lock();
+ for_each_domain(cpu, sd) {
+ enum cpu_idle_type itype;
+
+ seq_printf(seq, "domain%d %*pb", dcount++,
+ cpumask_pr_args(sched_domain_span(sd)));
+ for (itype = CPU_IDLE; itype < CPU_MAX_IDLE_TYPES;
+ itype++) {
+ seq_printf(seq, " %u %u %u %u %u %u %u %u",
+ sd->lb_count[itype],
+ sd->lb_balanced[itype],
+ sd->lb_failed[itype],
+ sd->lb_imbalance[itype],
+ sd->lb_gained[itype],
+ sd->lb_hot_gained[itype],
+ sd->lb_nobusyq[itype],
+ sd->lb_nobusyg[itype]);
+ }
+ seq_printf(seq,
+ " %u %u %u %u %u %u %u %u %u %u %u %u\n",
+ sd->alb_count, sd->alb_failed, sd->alb_pushed,
+ sd->sbe_count, sd->sbe_balanced, sd->sbe_pushed,
+ sd->sbf_count, sd->sbf_balanced, sd->sbf_pushed,
+ sd->ttwu_wake_remote, sd->ttwu_move_affine,
+ sd->ttwu_move_balance);
+ }
+ rcu_read_unlock();
+#endif
+}
+
+static void show_rqstat(struct seq_file *seq, int cpu)
{
- int cpu;
+ struct rq *rq = cpu_rq(cpu);
+
+ /* runqueue-specific stats */
+ seq_printf(seq,
+ "cpu%d %u 0 %u %u %u %u %llu %llu %lu\n",
+ cpu, rq->yld_count,
+ rq->sched_count, rq->sched_goidle,
+ rq->ttwu_count, rq->ttwu_local,
+ rq->rq_cpu_time,
+ rq->rq_sched_info.run_delay, rq->rq_sched_info.pcount);
+}
+static int show_schedstat(struct seq_file *seq, void *v)
+{
if (v == (void *)1) {
seq_printf(seq, "version %d\n", SCHEDSTAT_VERSION);
seq_printf(seq, "timestamp %lu\n", jiffies);
} else {
- struct rq *rq;
-#ifdef CONFIG_SMP
- struct sched_domain *sd;
- int dcount = 0;
-#endif
- cpu = (unsigned long)(v - 2);
- rq = cpu_rq(cpu);
+ int cpu = (unsigned long)(v - 2);
- /* runqueue-specific stats */
- seq_printf(seq,
- "cpu%d %u 0 %u %u %u %u %llu %llu %lu\n",
- cpu, rq->yld_count,
- rq->sched_count, rq->sched_goidle,
- rq->ttwu_count, rq->ttwu_local,
- rq->rq_cpu_time,
- rq->rq_sched_info.run_delay, rq->rq_sched_info.pcount);
+ show_rqstat(seq, cpu);
+ show_domainstat(seq, cpu);
-#ifdef CONFIG_SMP
- /* domain-specific stats */
- rcu_read_lock();
- for_each_domain(cpu, sd) {
- enum cpu_idle_type itype;
-
- seq_printf(seq, "domain%d %*pb", dcount++,
- cpumask_pr_args(sched_domain_span(sd)));
- for (itype = CPU_IDLE; itype < CPU_MAX_IDLE_TYPES;
- itype++) {
- seq_printf(seq, " %u %u %u %u %u %u %u %u",
- sd->lb_count[itype],
- sd->lb_balanced[itype],
- sd->lb_failed[itype],
- sd->lb_imbalance[itype],
- sd->lb_gained[itype],
- sd->lb_hot_gained[itype],
- sd->lb_nobusyq[itype],
- sd->lb_nobusyg[itype]);
- }
- seq_printf(seq,
- " %u %u %u %u %u %u %u %u %u %u %u %u\n",
- sd->alb_count, sd->alb_failed, sd->alb_pushed,
- sd->sbe_count, sd->sbe_balanced, sd->sbe_pushed,
- sd->sbf_count, sd->sbf_balanced, sd->sbf_pushed,
- sd->ttwu_wake_remote, sd->ttwu_move_affine,
- sd->ttwu_move
[PATCH 1/2] sched: Move '\n' to the prior seq_printf in show_schedstat()
A little clean up that moving the '\n' to the prior seq_printf. and remove the separate seq_printf which for line breaks. No functional changes. Signed-off-by: Yunfeng Ye --- kernel/sched/stats.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/kernel/sched/stats.c b/kernel/sched/stats.c index 750fb3c67eed..e99403df3f90 100644 --- a/kernel/sched/stats.c +++ b/kernel/sched/stats.c @@ -30,15 +30,13 @@ static int show_schedstat(struct seq_file *seq, void *v) /* runqueue-specific stats */ seq_printf(seq, - "cpu%d %u 0 %u %u %u %u %llu %llu %lu", + "cpu%d %u 0 %u %u %u %u %llu %llu %lu\n", cpu, rq->yld_count, rq->sched_count, rq->sched_goidle, rq->ttwu_count, rq->ttwu_local, rq->rq_cpu_time, rq->rq_sched_info.run_delay, rq->rq_sched_info.pcount); - seq_printf(seq, "\n"); - #ifdef CONFIG_SMP /* domain-specific stats */ rcu_read_lock(); -- 2.18.4
Re: [PATCH 2/2] kernfs: remove mutex in kernfs_dop_revalidate
On Thu, Dec 3, 2020 at 2:46 AM Tejun Heo wrote:
>
> Hello,
>
> On Wed, Dec 02, 2020 at 10:58:37PM +0800, Fox Chen wrote:
> > There is a big mutex in kernfs_dop_revalidate which slows down the
> > concurrent performance of kernfs.
> >
> > Since kernfs_dop_revalidate only does some checks, the lock is
> > largely unnecessary. Also, according to kernel filesystem locking
> > document:
> > https://www.kernel.org/doc/html/latest/filesystems/locking.html
> > locking is not in the protocal for d_revalidate operation.
>
> That's just describing the rules seen from vfs side. It doesn't say anything
> about locking rules internal to each file system implementation.
Oh, Ok, I got it.
> > This patch remove this mutex from
> > kernfs_dop_revalidate, so kernfs_dop_revalidate
> > can run concurrently.
> >
> > Signed-off-by: Fox Chen
> > ---
> > fs/kernfs/dir.c | 9 +++--
> > 1 file changed, 3 insertions(+), 6 deletions(-)
> >
> > diff --git a/fs/kernfs/dir.c b/fs/kernfs/dir.c
> > index 9aec80b9d7c6..c2267c93f546 100644
> > --- a/fs/kernfs/dir.c
> > +++ b/fs/kernfs/dir.c
> > @@ -26,7 +26,6 @@ static DEFINE_SPINLOCK(kernfs_idr_lock);/*
> > root->ino_idr */
> >
> > static bool kernfs_active(struct kernfs_node *kn)
> > {
> > - lockdep_assert_held(&kernfs_mutex);
> > return atomic_read(&kn->active) >= 0;
> > }
> >
> > @@ -557,10 +556,9 @@ static int kernfs_dop_revalidate(struct dentry
> > *dentry, unsigned int flags)
> >
> > /* Always perform fresh lookup for negatives */
> > if (d_really_is_negative(dentry))
> > - goto out_bad_unlocked;
> > + goto out_bad;
> >
> > kn = kernfs_dentry_node(dentry);
> > - mutex_lock(&kernfs_mutex);
> >
> > /* The kernfs node has been deactivated */
> > if (!kernfs_active(kn))
> > @@ -579,11 +577,8 @@ static int kernfs_dop_revalidate(struct dentry
> > *dentry, unsigned int flags)
> > kernfs_info(dentry->d_sb)->ns != kn->ns)
> > goto out_bad;
> >
> > - mutex_unlock(&kernfs_mutex);
> > return 1;
> > out_bad:
> > - mutex_unlock(&kernfs_mutex);
> > -out_bad_unlocked:
> > return 0;
> > }
>
> I don't see how this can be safe. Nothing even protects the dentry from
> turning negative in the middle and it may end up trying to deref NULL. I'm
> sure we can make this not need kernfs_mutex but that'd have to be a lot more
> careful.
>
Sorry Tejun, I don't get it. Even before the patch
if (d_really_is_negative(dentry))
goto out_bad_unlocked;
kn = kernfs_dentry_node(dentry);
mutex_lock(&kernfs_mutex); < we lock here
status of d_really_is_negative is not preserved by the mutex. It could
turn negative between we checked it and we lock kernfs_mutex.
Is it a bug here??
thanks,
fox
Request!!
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Consultation on related issues of Linux kernel4.19
Hi，Jerome I recently migrated the 4.19 kernel and found that the RCA reconfiguration for emMC is available within the mmc_set_relative_addr() function within the mmc_ops.c file, but for SD card or SDIO configuration, the mmc_send_relative_addr() function within the sd_ops.c file is not set.If I want to reset the RCA value of an SD card or SDIO device area to satisfy my need to switch between multiple slave devices, this function cannot be implemented.I'm wondering if the mmc_send_relative_addr () function has no reconfiguration. What is the purpose of this design?If I need this function, is there any interface I can use?Or can I modify it? I am looking forward to your reply. Thank you.
Re: [PATCH v11 3/5] dt-bindings: leds: Add LED_FUNCTION_MOONLIGHT definitions
Pavel Machek 於 2020年12月2日 週三 下午8:23寫道： > > On Wed 2020-12-02 18:46:49, Gene Chen wrote: > > From: Gene Chen > > > > Add LED_FUNCTION_MOONLIGHT definitions > > > > Signed-off-by: Gene Chen > > Acked-by: Jacek Anaszewski > > Acked-by: Rob Herring > > --- > > include/dt-bindings/leds/common.h | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/include/dt-bindings/leds/common.h > > b/include/dt-bindings/leds/common.h > > index 52b619d..843e65d 100644 > > --- a/include/dt-bindings/leds/common.h > > +++ b/include/dt-bindings/leds/common.h > > @@ -78,6 +78,7 @@ > > #define LED_FUNCTION_INDICATOR "indicator" > > #define LED_FUNCTION_LAN "lan" > > #define LED_FUNCTION_MAIL "mail" > > +#define LED_FUNCTION_MOONLIGHT "moonlight" > > There's "torch" function that should be used for this. I guess comment > should be added with explanation what exactly that is and how should > the LED be named. > According to mail, 11/25 "Re: [PATCH v7 2/5] dt-bindings: leds: Add LED_COLOR_ID_MOONLIGHT definitions", The Moonlight LED is LED which maximum current more than torch, but less than flash. Such as front camera fill light. I think our channel is moonlight, not torch. I will add this description to comment. We can't exactly define moonlight current level, because every vendor has their own specification. > Best regards, > Pavel > -- > http://www.livejournal.com/~pavelmachek
Re: [PATCH] drivers/perf: Enable PID_IN_CONTEXTIDR with SPE
Looping in Mathieu at this time. On Thu, Dec 03, 2020 at 02:39:41PM +0800, Leo Yan wrote: > Hi Will, > > [ + Mathieu ] > > On Tue, Dec 01, 2020 at 11:09:36PM +, Will Deacon wrote: > > On Tue, Dec 01, 2020 at 12:10:40PM +0800, Leo Yan wrote: > > > On Mon, Nov 30, 2020 at 04:46:51PM +, Will Deacon wrote: > > > > On Mon, Nov 30, 2020 at 06:24:54PM +0200, James Clark wrote: > > > > > Enable PID_IN_CONTEXTIDR by default when Arm SPE is enabled. > > > > > This flag is required to get PID data in the SPE trace. Without > > > > > it the perf tool will report 0 for PID which isn't very useful, > > > > > especially when doing system wide profiling or profiling > > > > > applications that fork. > > > > > > > > Can perf not figure out the pid some other way? (e.g. by tracing context > > > > switches and correlating that with the SPE data?). > > > > > > For perf 'per-thread' mode, we can use context switch trace event as > > > assisted info to select thread context. But for "system wide" mode and > > > "snapshot" mode in perf tool, since the trace data is continuous, I > > > think we cannot use context switch trace event to correlate the SPE > > > trace data. > > > > Is there no way to correlate them with something like CNTVCT? > > Good point. Yes, we can convert CNTVCT to system time; I read the > code in the perf's intel-pt.c and found the timestamp is used to > correlate the auxtrace heap. I think it's better to dig more for > detailed implementation. > > > > > Also, how does this work with pid namespaces? > > > > > > Here we are studying the implemetation of Intel-PT and Arm CoreSight. > > > > > > The context ID is stored into the hardware trace data when record; > > > afterwards when perf tool decodes the trace data and detects the > > > packet for context ID, it will select the machine's thread context in > > > perf [1]. Since the perf tool gathers all the threads infomation in > > > perf data file, based on the context ID, it can find the corresponding > > > thread pointer with function machine__find_thread() [2]. > > > > > > Since your question is for "pid namespace", to be honest, I don't know > > > how perf tool to handle any confliction for differrent processes share > > > the same PID, and I am not sure if you are asking CGroup related stuff > > > or not. If this cannot answer your question, please let me know. > > > > My point was that the pid value written to CONTEXTIDR is a global pid > > and does not take namespacing into account. If perf is run inside a pid > > namespace, it will therefore not work. > > Understand now. > > The perf events PERF_RECORD_ITRACE_START/PERF_RECORD_SWITCH/ > PERF_RECORD_SWITCH_CPU_WIDE can be used to set pid/tid in perf. So this > would be a safe way for perf tool running in pid namespace. > > Loop in Mathieu, this is a common issue for both Arm SPE and CoreSight > (IIRC, though CoreSight's timestamp is not strictly attaching to Arm arch > timer counter, the trend is to unify this for using arch timer > counter). > > I think James could continue to upstream a new patch by following your > suggestion for enabling PID_IN_CONTEXTIDR, eventually, it's a feature > for Arm SPE to record CONTEXTIDR in its packet. > > Your questions inspired me, thanks! > > Leo
[RESEND PATCH v13 6/6] memory: dfl-emif: add the DFL EMIF private feature driver
This driver is for the EMIF private feature implemented under FPGA
Device Feature List (DFL) framework. It is used to expose memory
interface status information as well as memory clearing control.
The purpose of memory clearing block is to zero out all private memory
when FPGA is to be reprogrammed. This gives users a reliable method to
prevent potential data leakage.
Signed-off-by: Xu Yilun
Signed-off-by: Russ Weight
Reviewed-by: Tom Rix
Acked-by: Krzysztof Kozlowski
---
v2: Adjust the position of this driver in Kconfig.
Improves the name of the Kconfig option.
Change the include dfl-bus.h to dfl.h, cause the previous patchset
renames the file.
Some minor fixes and comment improvement.
v3: Adjust the position of the driver in Makefile.
v9: Add static prefix for emif attributes macro.
Update the kernel version of the sysfs interfaces in Doc.
v10: Rebase due to the dfl head file moves to include/linux.
v11: Use sysfs_emit instead of sprintf.
Rebase to rebase to 5.10-rc1.
v12: no change.
v13: no change.
---
.../ABI/testing/sysfs-bus-dfl-devices-emif | 25 +++
drivers/memory/Kconfig | 9 +
drivers/memory/Makefile| 2 +
drivers/memory/dfl-emif.c | 207 +
4 files changed, 243 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-emif
create mode 100644 drivers/memory/dfl-emif.c
diff --git a/Documentation/ABI/testing/sysfs-bus-dfl-devices-emif
b/Documentation/ABI/testing/sysfs-bus-dfl-devices-emif
new file mode 100644
index 000..1ae8ebd
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-dfl-devices-emif
@@ -0,0 +1,25 @@
+What: /sys/bus/dfl/devices/dfl_dev.X/infX_cal_fail
+Date: Oct 2020
+KernelVersion: 5.11
+Contact: Xu Yilun
+Description: Read-only. It indicates if the calibration failed on this
+ memory interface. "1" for calibration failure, "0" for OK.
+ Format: %u
+
+What: /sys/bus/dfl/devices/dfl_dev.X/infX_init_done
+Date: Oct 2020
+KernelVersion: 5.11
+Contact: Xu Yilun
+Description: Read-only. It indicates if the initialization completed on
+ this memory interface. "1" for initialization complete, "0"
+ for not yet.
+ Format: %u
+
+What: /sys/bus/dfl/devices/dfl_dev.X/infX_clear
+Date: Oct 2020
+KernelVersion: 5.11
+Contact: Xu Yilun
+Description: Write-only. Writing "1" to this file will zero out all memory
+ data in this memory interface. Writing of other values is
+ invalid.
+ Format: %u
diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 00e013b..2495bc4 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -137,6 +137,15 @@ config TI_EMIF_SRAM
sequence so this driver provides several relocatable PM functions
for the SoC PM code to use.
+config FPGA_DFL_EMIF
+ tristate "FPGA DFL EMIF Driver"
+ depends on FPGA_DFL && HAS_IOMEM
+ help
+ This driver is for the EMIF private feature implemented under
+ FPGA Device Feature List (DFL) framework. It is used to expose
+ memory interface status information as well as memory clearing
+ control.
+
config MVEBU_DEVBUS
bool "Marvell EBU Device Bus Controller"
default y if PLAT_ORION
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index e71cf7b..bc7663e 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -28,6 +28,8 @@ obj-$(CONFIG_STM32_FMC2_EBI) += stm32-fmc2-ebi.o
obj-$(CONFIG_SAMSUNG_MC) += samsung/
obj-$(CONFIG_TEGRA_MC) += tegra/
obj-$(CONFIG_TI_EMIF_SRAM) += ti-emif-sram.o
+obj-$(CONFIG_FPGA_DFL_EMIF)+= dfl-emif.o
+
ti-emif-sram-objs := ti-emif-pm.o ti-emif-sram-pm.o
AFLAGS_ti-emif-sram-pm.o :=-Wa,-march=armv7-a
diff --git a/drivers/memory/dfl-emif.c b/drivers/memory/dfl-emif.c
new file mode 100644
index 000..3f71981
--- /dev/null
+++ b/drivers/memory/dfl-emif.c
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DFL device driver for EMIF private feature
+ *
+ * Copyright (C) 2020 Intel Corporation, Inc.
+ *
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define FME_FEATURE_ID_EMIF0x9
+
+#define EMIF_STAT 0x8
+#define EMIF_STAT_INIT_DONE_SFT0
+#define EMIF_STAT_CALC_FAIL_SFT8
+#define EMIF_STAT_CLEAR_BUSY_SFT 16
+#define EMIF_CTRL 0x10
+#define EMIF_CTRL_CLEAR_EN_SFT 0
+#define EMIF_CTRL_CLEAR_EN_MSK GENMASK_ULL(3, 0)
+
+#define EMIF_POLL_INVL 1 /* us */
+#define EMIF_POLL_TIMEOUT 500 /* us */
+
+struct dfl_emif {
+ struct device *dev;
+ void __iome
[RESEND PATCH v13 5/6] fpga: dfl: add support for N3000 Nios private feature
This patch adds support for the Nios handshake private feature on Intel PAC (Programmable Acceleration Card) N3000. The Nios is the embedded processor on the FPGA card. This private feature provides a handshake interface to FPGA Nios firmware, which receives retimer configuration command from host and executes via an internal SPI master (spi-altera). When Nios finishes the configuration, host takes over the ownership of the SPI master to control an Intel MAX10 BMC (Board Management Controller) Chip on the SPI bus. For Nios firmware handshake part, this driver requests the retimer configuration for Nios firmware on probe, and adds some sysfs nodes for user to query the onboard retimer's working mode and Nios firmware version. For SPI part, this driver adds a spi-altera platform device as well as the MAX10 BMC spi slave info. A spi-altera driver will be matched to handle the following SPI work. [m...@kernel.org: Fixed up MAINTAINERS file to include added ABI doc] Signed-off-by: Xu Yilun Signed-off-by: Wu Hao Signed-off-by: Matthew Gerlach Signed-off-by: Russ Weight Signed-off-by: YueHaibing Reviewed-by: Tom Rix --- v3: add the doc for this driver minor fixes for comments from Tom v4: move the err log in regmap implementation, and delete n3000_nios_writel/readl(), they have nothing to wrapper now. some minor fixes and comments improvement. v5: fix the output of fec_mode sysfs inf to "no" on 10G configuration, cause no FEC mode could be configured for 10G. rename the dfl_n3000_nios_* to n3000_nios_* improves comments. v6: fix the output of fec_mode sysfs inf to "not supported" if in 10G, or the firmware version major < 3. minor fixes and improves comments. v7: improves comments. v8: add sysfs interfaces for retimer mode, also doc update. delete duplicated sysfs interfaces description in doc. minor fixes. v9: delete the retimer FEC mode configuration via module_parameter. update the kernel version of the sysfs interfaces in Doc. merge the patch "Make m10_n3000_info static" (https://lore.kernel.org/linux-fpga/52d8411e-13d8-1e91-756d-131802f5f...@huawei.com/T/#t) remove the tags of Maintainers, this implementation is changed. v10: improve the name of some macros, functions and variables. refactor the FEC mode setting and reading. refactor the retimer init error checking and dumping. refactor the loop timeout for regbus reading & write. some minor fixes. v11: use sysfs_emit instead of sprintf. rebase to 5.10-rc1. v12: move the MODULE_DEVICE_TABLE() right after its definition. v13: fix the wrong use of logical'||', should use '|' on Nios INIT_DONE and INIT_START check, reported by lkp check. --- .../ABI/testing/sysfs-bus-dfl-devices-n3000-nios | 47 ++ MAINTAINERS| 2 +- drivers/fpga/Kconfig | 11 + drivers/fpga/Makefile | 2 + drivers/fpga/dfl-n3000-nios.c | 588 + 5 files changed, 649 insertions(+), 1 deletion(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-n3000-nios create mode 100644 drivers/fpga/dfl-n3000-nios.c diff --git a/Documentation/ABI/testing/sysfs-bus-dfl-devices-n3000-nios b/Documentation/ABI/testing/sysfs-bus-dfl-devices-n3000-nios new file mode 100644 index 000..a505537 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-dfl-devices-n3000-nios @@ -0,0 +1,47 @@ +What: /sys/bus/dfl/devices/dfl_dev.X/fec_mode +Date: Oct 2020 +KernelVersion: 5.11 +Contact: Xu Yilun +Description: Read-only. Returns the FEC mode of the 25G links of the + ethernet retimers configured by Nios firmware. "rs" for Reed + Solomon FEC, "kr" for Fire Code FEC, "no" for NO FEC. + "not supported" if the FEC mode setting is not supported, this + happens when the Nios firmware version major < 3, or no link is + configured to 25G. + Format: string + +What: /sys/bus/dfl/devices/dfl_dev.X/retimer_A_mode +Date: Oct 2020 +KernelVersion: 5.11 +Contact: Xu Yilun +Description: Read-only. Returns the enumeration value of the working mode of + the retimer A configured by the Nios firmware. The value is + read out from shared registers filled by the Nios firmware. Now + the values could be: + + - "0": Reset + - "1": 4x10G + - "2": 4x25G + - "3": 2x25G + - "4": 2x25G+2x10G + - "5": 1x25G + + If the Nios firmware is updated in future to support more + retimer modes, more enumeration value is expected. + Format: 0x%x + +What: /sys/bus/dfl/devices/dfl_dev.X/retimer_B_mode +Date: Oct 2020 +KernelVersion: 5.11 +Contact: Xu Yilun +Description: Read-
Re: [PATCH] drivers/perf: Enable PID_IN_CONTEXTIDR with SPE
Hi Will, [ + Mathieu ] On Tue, Dec 01, 2020 at 11:09:36PM +, Will Deacon wrote: > On Tue, Dec 01, 2020 at 12:10:40PM +0800, Leo Yan wrote: > > On Mon, Nov 30, 2020 at 04:46:51PM +, Will Deacon wrote: > > > On Mon, Nov 30, 2020 at 06:24:54PM +0200, James Clark wrote: > > > > Enable PID_IN_CONTEXTIDR by default when Arm SPE is enabled. > > > > This flag is required to get PID data in the SPE trace. Without > > > > it the perf tool will report 0 for PID which isn't very useful, > > > > especially when doing system wide profiling or profiling > > > > applications that fork. > > > > > > Can perf not figure out the pid some other way? (e.g. by tracing context > > > switches and correlating that with the SPE data?). > > > > For perf 'per-thread' mode, we can use context switch trace event as > > assisted info to select thread context. But for "system wide" mode and > > "snapshot" mode in perf tool, since the trace data is continuous, I > > think we cannot use context switch trace event to correlate the SPE > > trace data. > > Is there no way to correlate them with something like CNTVCT? Good point. Yes, we can convert CNTVCT to system time; I read the code in the perf's intel-pt.c and found the timestamp is used to correlate the auxtrace heap. I think it's better to dig more for detailed implementation. > > > Also, how does this work with pid namespaces? > > > > Here we are studying the implemetation of Intel-PT and Arm CoreSight. > > > > The context ID is stored into the hardware trace data when record; > > afterwards when perf tool decodes the trace data and detects the > > packet for context ID, it will select the machine's thread context in > > perf [1]. Since the perf tool gathers all the threads infomation in > > perf data file, based on the context ID, it can find the corresponding > > thread pointer with function machine__find_thread() [2]. > > > > Since your question is for "pid namespace", to be honest, I don't know > > how perf tool to handle any confliction for differrent processes share > > the same PID, and I am not sure if you are asking CGroup related stuff > > or not. If this cannot answer your question, please let me know. > > My point was that the pid value written to CONTEXTIDR is a global pid > and does not take namespacing into account. If perf is run inside a pid > namespace, it will therefore not work. Understand now. The perf events PERF_RECORD_ITRACE_START/PERF_RECORD_SWITCH/ PERF_RECORD_SWITCH_CPU_WIDE can be used to set pid/tid in perf. So this would be a safe way for perf tool running in pid namespace. Loop in Mathieu, this is a common issue for both Arm SPE and CoreSight (IIRC, though CoreSight's timestamp is not strictly attaching to Arm arch timer counter, the trend is to unify this for using arch timer counter). I think James could continue to upstream a new patch by following your suggestion for enabling PID_IN_CONTEXTIDR, eventually, it's a feature for Arm SPE to record CONTEXTIDR in its packet. Your questions inspired me, thanks! Leo
[RESEND PATCH v13 4/6] fpga: dfl: move dfl bus related APIs to include/linux/dfl.h
Now the dfl drivers could be made as independent modules and put in
different folders according to their functionalities. In order for
scattered dfl device drivers to include dfl bus APIs, move the
dfl bus APIs to a new header file in the public folder.
[m...@kernel.org: Fixed up header guards to match filename]
Signed-off-by: Xu Yilun
Reviewed-by: Tom Rix
Acked-by: Wu Hao
Signed-off-by: Moritz Fischer
---
v2: updated the MAINTAINERS under FPGA DFL DRIVERS
improve the comments
rename the dfl-bus.h to dfl.h
v3: rebase the patch for previous changes
v9: rebase the patch for bus name changes back to "dfl"
v10: move the head file from inlude/linux/fpga to include/linux
v11: no change
v12: Fixed up header guards to match filename by Moritz
v13: no change
---
MAINTAINERS | 1 +
drivers/fpga/dfl.c | 1 +
drivers/fpga/dfl.h | 72
include/linux/dfl.h | 86 +
4 files changed, 88 insertions(+), 72 deletions(-)
create mode 100644 include/linux/dfl.h
diff --git a/MAINTAINERS b/MAINTAINERS
index e73636b..9bbb378 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6886,6 +6886,7 @@ S:Maintained
F: Documentation/ABI/testing/sysfs-bus-dfl
F: Documentation/fpga/dfl.rst
F: drivers/fpga/dfl*
+F: include/linux/dfl.h
F: include/uapi/linux/fpga-dfl.h
FPGA MANAGER FRAMEWORK
diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
index 5a6ba3b..511b20f 100644
--- a/drivers/fpga/dfl.c
+++ b/drivers/fpga/dfl.c
@@ -10,6 +10,7 @@
* Wu Hao
* Xiao Guangrong
*/
+#include
#include
#include
#include
diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
index 549c790..2b82c96 100644
--- a/drivers/fpga/dfl.h
+++ b/drivers/fpga/dfl.h
@@ -517,76 +517,4 @@ long dfl_feature_ioctl_set_irq(struct platform_device
*pdev,
struct dfl_feature *feature,
unsigned long arg);
-/**
- * enum dfl_id_type - define the DFL FIU types
- */
-enum dfl_id_type {
- FME_ID = 0,
- PORT_ID = 1,
- DFL_ID_MAX,
-};
-
-/**
- * struct dfl_device - represent an dfl device on dfl bus
- *
- * @dev: generic device interface.
- * @id: id of the dfl device.
- * @type: type of DFL FIU of the device. See enum dfl_id_type.
- * @feature_id: feature identifier local to its DFL FIU type.
- * @mmio_res: mmio resource of this dfl device.
- * @irqs: list of Linux IRQ numbers of this dfl device.
- * @num_irqs: number of IRQs supported by this dfl device.
- * @cdev: pointer to DFL FPGA container device this dfl device belongs to.
- * @id_entry: matched id entry in dfl driver's id table.
- */
-struct dfl_device {
- struct device dev;
- int id;
- u16 type;
- u16 feature_id;
- struct resource mmio_res;
- int *irqs;
- unsigned int num_irqs;
- struct dfl_fpga_cdev *cdev;
- const struct dfl_device_id *id_entry;
-};
-
-/**
- * struct dfl_driver - represent an dfl device driver
- *
- * @drv: driver model structure.
- * @id_table: pointer to table of device IDs the driver is interested in.
- * { } member terminated.
- * @probe: mandatory callback for device binding.
- * @remove: callback for device unbinding.
- */
-struct dfl_driver {
- struct device_driver drv;
- const struct dfl_device_id *id_table;
-
- int (*probe)(struct dfl_device *dfl_dev);
- void (*remove)(struct dfl_device *dfl_dev);
-};
-
-#define to_dfl_dev(d) container_of(d, struct dfl_device, dev)
-#define to_dfl_drv(d) container_of(d, struct dfl_driver, drv)
-
-/*
- * use a macro to avoid include chaining to get THIS_MODULE.
- */
-#define dfl_driver_register(drv) \
- __dfl_driver_register(drv, THIS_MODULE)
-int __dfl_driver_register(struct dfl_driver *dfl_drv, struct module *owner);
-void dfl_driver_unregister(struct dfl_driver *dfl_drv);
-
-/*
- * module_dfl_driver() - Helper macro for drivers that don't do
- * anything special in module init/exit. This eliminates a lot of
- * boilerplate. Each module may only use this macro once, and
- * calling it replaces module_init() and module_exit().
- */
-#define module_dfl_driver(__dfl_driver) \
- module_driver(__dfl_driver, dfl_driver_register, \
- dfl_driver_unregister)
-
#endif /* __FPGA_DFL_H */
diff --git a/include/linux/dfl.h b/include/linux/dfl.h
new file mode 100644
index 000..6cc1098
--- /dev/null
+++ b/include/linux/dfl.h
@@ -0,0 +1,86 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Header file for DFL driver and device API
+ *
+ * Copyright (C) 2020 Intel Corporation, Inc.
+ */
+
+#ifndef __LINUX_DFL_H
+#define __LINUX_DFL_H
+
+#include
+#include
+
+/**
+ * enum dfl_id_type - define the DFL FIU types
+ */
+enum dfl_id_type {
+ FME_ID = 0,
+ PORT_ID = 1,
+ DFL_ID_MAX,
+};
+
+/**
+ * struct dfl_device - represent an dfl device on dfl bus
+ *
+ * @dev: generic device interface.
+ * @id: id o
[RESEND PATCH v13 3/6] fpga: dfl: add dfl bus support to MODULE_DEVICE_TABLE()
Device Feature List (DFL) is a linked list of feature headers within the
device MMIO space. It is used by FPGA to enumerate multiple sub features
within it. Each feature can be uniquely identified by DFL type and
feature id, which can be read out from feature headers.
A dfl bus helps DFL framework modularize DFL device drivers for
different sub features. The dfl bus matches its devices and drivers by
DFL type and feature id.
This patch adds dfl bus support to MODULE_DEVICE_TABLE() by adding info
about struct dfl_device_id in devicetable-offsets.c and add a dfl entry
point in file2alias.c.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Signed-off-by: Matthew Gerlach
Signed-off-by: Russ Weight
Acked-by: Wu Hao
Signed-off-by: Moritz Fischer
---
v2: add comments for the format of modalias
v3: changes the names from dfl_XXX to fpga_dfl_XXX
delete the comments of valid bits for modalias format
v9: rebase the patch for bus name changes back to "dfl"
v10: no change
v11: no change
v12: no change
v13: no change
---
scripts/mod/devicetable-offsets.c | 4
scripts/mod/file2alias.c | 13 +
2 files changed, 17 insertions(+)
diff --git a/scripts/mod/devicetable-offsets.c
b/scripts/mod/devicetable-offsets.c
index 27007c1..d8350ee 100644
--- a/scripts/mod/devicetable-offsets.c
+++ b/scripts/mod/devicetable-offsets.c
@@ -243,5 +243,9 @@ int main(void)
DEVID(mhi_device_id);
DEVID_FIELD(mhi_device_id, chan);
+ DEVID(dfl_device_id);
+ DEVID_FIELD(dfl_device_id, type);
+ DEVID_FIELD(dfl_device_id, feature_id);
+
return 0;
}
diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c
index 2417dd1..8a438c9 100644
--- a/scripts/mod/file2alias.c
+++ b/scripts/mod/file2alias.c
@@ -1368,6 +1368,18 @@ static int do_mhi_entry(const char *filename, void
*symval, char *alias)
return 1;
}
+/* Looks like: dfl:tNfN */
+static int do_dfl_entry(const char *filename, void *symval, char *alias)
+{
+ DEF_FIELD(symval, dfl_device_id, type);
+ DEF_FIELD(symval, dfl_device_id, feature_id);
+
+ sprintf(alias, "dfl:t%04Xf%04X", type, feature_id);
+
+ add_wildcard(alias);
+ return 1;
+}
+
/* Does namelen bytes of name exactly match the symbol? */
static bool sym_is(const char *name, unsigned namelen, const char *symbol)
{
@@ -1442,6 +1454,7 @@ static const struct devtable devtable[] = {
{"tee", SIZE_tee_client_device_id, do_tee_entry},
{"wmi", SIZE_wmi_device_id, do_wmi_entry},
{"mhi", SIZE_mhi_device_id, do_mhi_entry},
+ {"dfl", SIZE_dfl_device_id, do_dfl_entry},
};
/* Create MODULE_ALIAS() statements.
--
2.7.4
[RESEND PATCH v13 1/6] fpga: dfl: fix the definitions of type & feature_id for dfl devices
The value of the field dfl_device.type comes from the 12 bits register
field DFH_ID according to DFL spec. So this patch changes the definition
of the type field to u16.
Also it is not necessary to illustrate the valid bits of the type field
in comments. Instead we should explicitly define the possible values in
the enumeration type for it, because they are shared by hardware spec.
We should not let the compiler decide these values.
Similar changes are also applied to dfl_device.feature_id.
This patch also fixed the MODALIAS format according to the changes
above.
Signed-off-by: Xu Yilun
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
v9: no change
v10: no change
v11: no change
v12: no change
v13: no change
---
drivers/fpga/dfl.c | 3 +--
drivers/fpga/dfl.h | 14 +++---
2 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
index b450870..5a6ba3b 100644
--- a/drivers/fpga/dfl.c
+++ b/drivers/fpga/dfl.c
@@ -298,8 +298,7 @@ static int dfl_bus_uevent(struct device *dev, struct
kobj_uevent_env *env)
{
struct dfl_device *ddev = to_dfl_dev(dev);
- /* The type has 4 valid bits and feature_id has 12 valid bits */
- return add_uevent_var(env, "MODALIAS=dfl:t%01Xf%03X",
+ return add_uevent_var(env, "MODALIAS=dfl:t%04Xf%04X",
ddev->type, ddev->feature_id);
}
diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
index 5dc758f..ac373b1 100644
--- a/drivers/fpga/dfl.h
+++ b/drivers/fpga/dfl.h
@@ -520,19 +520,19 @@ long dfl_feature_ioctl_set_irq(struct platform_device
*pdev,
* enum dfl_id_type - define the DFL FIU types
*/
enum dfl_id_type {
- FME_ID,
- PORT_ID,
+ FME_ID = 0,
+ PORT_ID = 1,
DFL_ID_MAX,
};
/**
* struct dfl_device_id - dfl device identifier
- * @type: contains 4 bits DFL FIU type of the device. See enum dfl_id_type.
- * @feature_id: contains 12 bits feature identifier local to its DFL FIU type.
+ * @type: DFL FIU type of the device. See enum dfl_id_type.
+ * @feature_id: feature identifier local to its DFL FIU type.
* @driver_data: driver specific data.
*/
struct dfl_device_id {
- u8 type;
+ u16 type;
u16 feature_id;
unsigned long driver_data;
};
@@ -543,7 +543,7 @@ struct dfl_device_id {
* @dev: generic device interface.
* @id: id of the dfl device.
* @type: type of DFL FIU of the device. See enum dfl_id_type.
- * @feature_id: 16 bits feature identifier local to its DFL FIU type.
+ * @feature_id: feature identifier local to its DFL FIU type.
* @mmio_res: mmio resource of this dfl device.
* @irqs: list of Linux IRQ numbers of this dfl device.
* @num_irqs: number of IRQs supported by this dfl device.
@@ -553,7 +553,7 @@ struct dfl_device_id {
struct dfl_device {
struct device dev;
int id;
- u8 type;
+ u16 type;
u16 feature_id;
struct resource mmio_res;
int *irqs;
--
2.7.4
[RESEND PATCH v13 2/6] fpga: dfl: move dfl_device_id to mod_devicetable.h
In order to support MODULE_DEVICE_TABLE() for dfl device driver, this
patch moves struct dfl_device_id to mod_devicetable.h
Some brief description for DFL (Device Feature List) is added to make
the DFL known to the whole kernel.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Signed-off-by: Matthew Gerlach
Signed-off-by: Russ Weight
Reviewed-by: Tom Rix
Acked-by: Wu Hao
Signed-off-by: Moritz Fischer
---
v2: fix the order for the header file
v3: rebase the patch for dfl bus name change
v9: rebase the patch for dfl bus name changes back to "dfl"
v10: add some comments to describe what is DFL
v11: no change
v12: fix the type of driver_data from unsigned long to kernel_ulong_t
v13: no change
---
drivers/fpga/dfl.h | 13 +
include/linux/mod_devicetable.h | 24
2 files changed, 25 insertions(+), 12 deletions(-)
diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
index ac373b1..549c790 100644
--- a/drivers/fpga/dfl.h
+++ b/drivers/fpga/dfl.h
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -526,18 +527,6 @@ enum dfl_id_type {
};
/**
- * struct dfl_device_id - dfl device identifier
- * @type: DFL FIU type of the device. See enum dfl_id_type.
- * @feature_id: feature identifier local to its DFL FIU type.
- * @driver_data: driver specific data.
- */
-struct dfl_device_id {
- u16 type;
- u16 feature_id;
- unsigned long driver_data;
-};
-
-/**
* struct dfl_device - represent an dfl device on dfl bus
*
* @dev: generic device interface.
diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
index 5b08a47..7d36c8c 100644
--- a/include/linux/mod_devicetable.h
+++ b/include/linux/mod_devicetable.h
@@ -838,4 +838,28 @@ struct mhi_device_id {
kernel_ulong_t driver_data;
};
+/*
+ * DFL (Device Feature List)
+ *
+ * DFL defines a linked list of feature headers within the device MMIO space to
+ * provide an extensible way of adding features. Software can walk through
these
+ * predefined data structures to enumerate features. It is now used in the
FPGA.
+ * See Documentation/fpga/dfl.rst for more information.
+ *
+ * The dfl bus type is introduced to match the individual feature devices (dfl
+ * devices) for specific dfl drivers.
+ */
+
+/**
+ * struct dfl_device_id - dfl device identifier
+ * @type: DFL FIU type of the device. See enum dfl_id_type.
+ * @feature_id: feature identifier local to its DFL FIU type.
+ * @driver_data: driver specific data.
+ */
+struct dfl_device_id {
+ __u16 type;
+ __u16 feature_id;
+ kernel_ulong_t driver_data;
+};
+
#endif /* LINUX_MOD_DEVICETABLE_H */
--
2.7.4
[RESEND PATCH v13 0/6] add DFL bus support to MODULE_DEVICE_TABLE()
Main changes from v1: - A new patch (Patch #3) to fix the description. - Rename the dfl-bus.h to dfl.h - Updated the MAINTAINERS under FPGA DFL DRIVERS. - Improve comments and minor fixes. Main changes from v2: - Change the bus name from "dfl" to "fpga-dfl", also rename related variables, functions ... - Changes the data type of fpga_dfl_device_id.type from u8 to u16 - Explicitly defines the values of enum fpga_dfl_id_type - Delete the comments for the valid bits of type & feature_id - changes MODALIAS format for fpga dfl devices Main changes from v3: - Change the bus name back to "dfl". - Add 2 patches (#5, 6) for dfl drivers. - Delete the retimer FEC mode configuration via module_parameter for Patch #5 - Merge the patch "Make m10_n3000_info static" (https://lore.kernel.org/linux-fpga/52d8411e-13d8-1e91-756d-131802f5f...@huawei.com/T/#t) into Patch #5 - Add static prefix for emif attributes macro for Patch #6 Main changes from v9: - Add the description for struct dfl_device_id in mod_devicetable.h - Move the dfl.h from include/linux/fpga to include/linux - some code refactor and minor fixes for dfl-n3000-nios Main changes from v10: - use sysfs_emit instead of sprintf for both patches - rebase to 5.10-rc1 Main changes from v11: - Fix the type of driver_data from unsigned long to kernel_ulong_t - Fixed up header guards to match filename by Moritz - move the MODULE_DEVICE_TABLE() right after its definition Main changes from v12: - For patch #5, fix the wrong use of logical'||', should use '|' Xu Yilun (6): fpga: dfl: fix the definitions of type & feature_id for dfl devices fpga: dfl: move dfl_device_id to mod_devicetable.h fpga: dfl: add dfl bus support to MODULE_DEVICE_TABLE() fpga: dfl: move dfl bus related APIs to include/linux/dfl.h fpga: dfl: add support for N3000 Nios private feature memory: dfl-emif: add the DFL EMIF private feature driver .../ABI/testing/sysfs-bus-dfl-devices-emif | 25 + .../ABI/testing/sysfs-bus-dfl-devices-n3000-nios | 47 ++ MAINTAINERS| 3 +- drivers/fpga/Kconfig | 11 + drivers/fpga/Makefile | 2 + drivers/fpga/dfl-n3000-nios.c | 588 + drivers/fpga/dfl.c | 4 +- drivers/fpga/dfl.h | 85 +-- drivers/memory/Kconfig | 9 + drivers/memory/Makefile| 2 + drivers/memory/dfl-emif.c | 207 include/linux/dfl.h| 86 +++ include/linux/mod_devicetable.h| 24 + scripts/mod/devicetable-offsets.c | 4 + scripts/mod/file2alias.c | 13 + 15 files changed, 1023 insertions(+), 87 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-emif create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-n3000-nios create mode 100644 drivers/fpga/dfl-n3000-nios.c create mode 100644 drivers/memory/dfl-emif.c create mode 100644 include/linux/dfl.h -- 2.7.4
Re: [PATCH 0/2] kernfs: speed up concurrency performance
On Thu, Dec 3, 2020 at 2:28 AM Greg KH wrote: > > On Wed, Dec 02, 2020 at 10:58:35PM +0800, Fox Chen wrote: > > Hello, > > > > kernfs is an important facillity to support pseudo file systems and cgroup. > > Currently, with a global mutex, reading files concurrently from kernfs > > (e.g. /sys) > > is very slow. > > > > This problem is reported by Brice Goglin on thread: > > Re: [PATCH 1/4] drivers core: Introduce CPU type sysfs interface > > https://lore.kernel.org/lkml/x60dvjot4furc...@kroah.com/ > > > > I independently comfirmed this on a 96-core AWS c5.metal server. > > Do open+read+write on /sys/devices/system/cpu/cpu15/topology/core_id 1000 > > times. > > With a single thread it takes ~2.5 us for each open+read+close. > > With one thread per core, 96 threads running simultaneously takes 540 us > > for each of the same operation (without much variation) -- 200x slower than > > the > > single thread one. > > > > The problem can only be observed in large machines (>=16 cores). > > The more cores you have the slower it can be. > > > > Perf shows that CPUs spend most of the time (>80%) waiting on mutex locks in > > kernfs_iop_permission and kernfs_dop_revalidate. > > > > This patchset contains the following 2 patches: > > 0001-kernfs-replace-the-mutex-in-kernfs_iop_permission-wi.patch > > 0002-kernfs-remove-mutex-in-kernfs_dop_revalidate.patch > > > > 0001 replace the mutex lock in kernfs_iop_permission with a new rwlock and > > 0002 removes the mutex lock in kernfs_dop_revalidate. > > > > After applying this patchset, the multi-thread performance becomes linear > > with > > the fastest one at ~30 us to the worst at ~150 us, very similar as I tested > > it > > on a normal ext4 file system with fastest one at ~20 us to slowest at ~100 > > us. > > And I believe that is largely due to spin_locks in filesystems which are > > normal. > > > > Although it's still slower than single thread, users can benefit from this > > patchset, especially ones working on HPC realm with lots of cpu cores and > > want to > > fetch system information from sysfs. > > Does this mean that the changes slow down the single-threaded case? Or > that it's just not as good as the speed of a single-threaded access? No, It won't influence the single-threaded case. I meant multi-threaded case is still not as good as single-threaded one. > But anyway, thanks so much for looking into this, it should help the > crazy systems out today, which means the normal systems in 5 years will > really appreciate this :) thanks :)
Re: [PATCH 2/2] kernfs: remove mutex in kernfs_dop_revalidate
On Thu, Dec 3, 2020 at 2:26 AM Greg KH wrote:
>
> On Wed, Dec 02, 2020 at 10:58:37PM +0800, Fox Chen wrote:
> > There is a big mutex in kernfs_dop_revalidate which slows down the
> > concurrent performance of kernfs.
> >
> > Since kernfs_dop_revalidate only does some checks, the lock is
> > largely unnecessary. Also, according to kernel filesystem locking
> > document:
> > https://www.kernel.org/doc/html/latest/filesystems/locking.html
> > locking is not in the protocal for d_revalidate operation.
> >
> > This patch remove this mutex from
> > kernfs_dop_revalidate, so kernfs_dop_revalidate
> > can run concurrently.
> >
> > Signed-off-by: Fox Chen
> > ---
> > fs/kernfs/dir.c | 9 +++--
> > 1 file changed, 3 insertions(+), 6 deletions(-)
> >
> > diff --git a/fs/kernfs/dir.c b/fs/kernfs/dir.c
> > index 9aec80b9d7c6..c2267c93f546 100644
> > --- a/fs/kernfs/dir.c
> > +++ b/fs/kernfs/dir.c
> > @@ -26,7 +26,6 @@ static DEFINE_SPINLOCK(kernfs_idr_lock);/*
> > root->ino_idr */
> >
> > static bool kernfs_active(struct kernfs_node *kn)
> > {
> > - lockdep_assert_held(&kernfs_mutex);
> > return atomic_read(&kn->active) >= 0;
> > }
> >
> > @@ -557,10 +556,9 @@ static int kernfs_dop_revalidate(struct dentry
> > *dentry, unsigned int flags)
> >
> > /* Always perform fresh lookup for negatives */
> > if (d_really_is_negative(dentry))
> > - goto out_bad_unlocked;
> > + goto out_bad;
> >
> > kn = kernfs_dentry_node(dentry);
> > - mutex_lock(&kernfs_mutex);
> >
> > /* The kernfs node has been deactivated */
> > if (!kernfs_active(kn))
> > @@ -579,11 +577,8 @@ static int kernfs_dop_revalidate(struct dentry
> > *dentry, unsigned int flags)
> > kernfs_info(dentry->d_sb)->ns != kn->ns)
> > goto out_bad;
> >
> > - mutex_unlock(&kernfs_mutex);
> > return 1;
> > out_bad:
> > - mutex_unlock(&kernfs_mutex);
> > -out_bad_unlocked:
> > return 0;
> > }
> >
> > @@ -650,6 +645,8 @@ static struct kernfs_node *__kernfs_new_node(struct
> > kernfs_root *root,
> > kn->mode = mode;
> > kn->flags = flags;
> >
> > + rwlock_init(&kn->iattr_rwlock);
>
> Ah, now you initialize this, it should go into patch 1, right? :)
>
Yes, it's my fault. It should be in patch 1. Sorry.
RE: [PATCH 1/4] dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
> -Original Message- > From: Andrew Lunn > Sent: 02 December 2020 20:28 > To: Yash Shah > Cc: linux-...@vger.kernel.org; linux-ser...@vger.kernel.org; linux- > p...@vger.kernel.org; linux-...@vger.kernel.org; linux- > ker...@vger.kernel.org; linux-ri...@lists.infradead.org; > devicet...@vger.kernel.org; linux-g...@vger.kernel.org; > broo...@kernel.org; gre...@linuxfoundation.org; a...@eecs.berkeley.edu; > lee.jo...@linaro.org; u.kleine-koe...@pengutronix.de; > thierry.red...@gmail.com; pe...@korsgaard.com; Paul Walmsley ( Sifive) > ; pal...@dabbelt.com; robh...@kernel.org; > bgolaszew...@baylibre.com; linus.wall...@linaro.org; Sachin Ghadi > > Subject: Re: [PATCH 1/4] dt-bindings: riscv: Update DT binding docs to > support SiFive FU740 SoC > > [External Email] Do not click links or attachments unless you recognize the > sender and know the content is safe > > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt > > b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt > > index 6b25a80..1966b2c 100644 > > --- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt > > +++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt > > @@ -3,9 +3,11 @@ Device tree configuration for i2c-ocores Required > > properties: > > - compatible : "opencores,i2c-ocores" > > "aeroflexgaisler,i2cmst" > > -"sifive,fu540-c000-i2c", "sifive,i2c0" > > +"sifive,-i2c", "sifive,i2c0" > > Please make this a full list. At some point, this file will get turned into > yaml, at > which point substitution like this will need expanding. It is better to do > that > now. Ok sure, will do that in patch v2. - Yash > > Andrew
Re: [PATCH 1/2] kernfs: replace the mutex in kernfs_iop_permission with a rwlock
Hi,
Thanks for your comments.
> On Wed, Dec 02, 2020 at 10:58:36PM +0800, Fox Chen wrote:
> > @@ -121,7 +121,7 @@ int kernfs_iop_setattr(struct dentry *dentry, struct
> > iattr *iattr)
> > if (!kn)
> > return -EINVAL;
> >
> > - mutex_lock(&kernfs_mutex);
> > + write_lock(&kn->iattr_rwlock);
> > error = setattr_prepare(dentry, iattr);
> > if (error)
> > goto out;
> > @@ -134,7 +134,7 @@ int kernfs_iop_setattr(struct dentry *dentry, struct
> > iattr *iattr)
> > setattr_copy(inode, iattr);
> >
> > out:
> > - mutex_unlock(&kernfs_mutex);
> > + write_unlock(&kn->iattr_rwlock);
> > return error;
> > }
>
> This is putting GFP_KERNEL allocation inside a rwlock. Can you please test
> with debug options including LOCKDEP and DEBUG_ATOMIC_SLEEP turned on?
>
Ok, I will try that.
Allocation is protected by the write_lock, only one thread can enter
this at a time. It should give the same protection as a mutex, right??
Or am I missing something here?? Any caveat?
On Thu, Dec 3, 2020 at 2:37 AM Tejun Heo wrote:
>
> On Wed, Dec 02, 2020 at 10:58:36PM +0800, Fox Chen wrote:
> > diff --git a/include/linux/kernfs.h b/include/linux/kernfs.h
> > index 89f6a4214a70..545cdb39b34b 100644
> > --- a/include/linux/kernfs.h
> > +++ b/include/linux/kernfs.h
> > @@ -156,6 +156,7 @@ struct kernfs_node {
> > unsigned short flags;
> > umode_t mode;
> > struct kernfs_iattrs*iattr;
> > + rwlock_tiattr_rwlock;
> > };
>
> Also, while this might not look like much, kernfs_node is very size
> sensitive. There are systems with huge number of these nodes, so I don't
> think putting a per-node lock like this is a good idea. Either we can use a
> shared iattr protecting lock or play some cmpxchg games when allocating and
> setting ->iattr and put the lock there.
>
Initially, I tried to put rwlock in kn->iattr, but
__kernfs_setattr(kn, iattr) needs lock protection and kn->iattr may
not exist before calling __kernfs_setattr. It's a chicken-egg paradox.
:)
It's hard to solve. cmpxchg can help, but who sets kn->iattr first
should be clearly defined.
What about I used a global shared rwlock to protect all kn->iattr.
It's easier to implement and I think we read sysfs more than write to
it, I guess it won't be that slow compared to one kn per lock?
thanks,
fox
[PATCH v14 10/10] secretmem: test: add basic selftest for memfd_secret(2)
From: Mike Rapoport
The test verifies that file descriptor created with memfd_secret does
not allow read/write operations, that secret memory mappings respect
RLIMIT_MEMLOCK and that remote accesses with process_vm_read() and
ptrace() to the secret memory fail.
Signed-off-by: Mike Rapoport
---
tools/testing/selftests/vm/.gitignore | 1 +
tools/testing/selftests/vm/Makefile | 3 +-
tools/testing/selftests/vm/memfd_secret.c | 298 ++
tools/testing/selftests/vm/run_vmtests| 17 ++
4 files changed, 318 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/vm/memfd_secret.c
diff --git a/tools/testing/selftests/vm/.gitignore
b/tools/testing/selftests/vm/.gitignore
index 9a35c3f6a557..c8deddc81e7a 100644
--- a/tools/testing/selftests/vm/.gitignore
+++ b/tools/testing/selftests/vm/.gitignore
@@ -21,4 +21,5 @@ va_128TBswitch
map_fixed_noreplace
write_to_hugetlbfs
hmm-tests
+memfd_secret
local_config.*
diff --git a/tools/testing/selftests/vm/Makefile
b/tools/testing/selftests/vm/Makefile
index 62fb15f286ee..9ab98946fbf2 100644
--- a/tools/testing/selftests/vm/Makefile
+++ b/tools/testing/selftests/vm/Makefile
@@ -34,6 +34,7 @@ TEST_GEN_FILES += khugepaged
TEST_GEN_FILES += map_fixed_noreplace
TEST_GEN_FILES += map_hugetlb
TEST_GEN_FILES += map_populate
+TEST_GEN_FILES += memfd_secret
TEST_GEN_FILES += mlock-random-test
TEST_GEN_FILES += mlock2-tests
TEST_GEN_FILES += mremap_dontunmap
@@ -129,7 +130,7 @@ warn_32bit_failure:
endif
endif
-$(OUTPUT)/mlock-random-test: LDLIBS += -lcap
+$(OUTPUT)/mlock-random-test $(OUTPUT)/memfd_secret: LDLIBS += -lcap
$(OUTPUT)/gup_test: ../../../../mm/gup_test.h
diff --git a/tools/testing/selftests/vm/memfd_secret.c
b/tools/testing/selftests/vm/memfd_secret.c
new file mode 100644
index ..79578dfd13e6
--- /dev/null
+++ b/tools/testing/selftests/vm/memfd_secret.c
@@ -0,0 +1,298 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright IBM Corporation, 2020
+ *
+ * Author: Mike Rapoport
+ */
+
+#define _GNU_SOURCE
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "../kselftest.h"
+
+#define fail(fmt, ...) ksft_test_result_fail(fmt, ##__VA_ARGS__)
+#define pass(fmt, ...) ksft_test_result_pass(fmt, ##__VA_ARGS__)
+#define skip(fmt, ...) ksft_test_result_skip(fmt, ##__VA_ARGS__)
+
+#ifdef __NR_memfd_secret
+
+#include
+
+#define PATTERN0x55
+
+static const int prot = PROT_READ | PROT_WRITE;
+static const int mode = MAP_SHARED;
+
+static unsigned long page_size;
+static unsigned long mlock_limit_cur;
+static unsigned long mlock_limit_max;
+
+static int memfd_secret(unsigned long flags)
+{
+ return syscall(__NR_memfd_secret, flags);
+}
+
+static void test_file_apis(int fd)
+{
+ char buf[64];
+
+ if ((read(fd, buf, sizeof(buf)) >= 0) ||
+ (write(fd, buf, sizeof(buf)) >= 0) ||
+ (pread(fd, buf, sizeof(buf), 0) >= 0) ||
+ (pwrite(fd, buf, sizeof(buf), 0) >= 0))
+ fail("unexpected file IO\n");
+ else
+ pass("file IO is blocked as expected\n");
+}
+
+static void test_mlock_limit(int fd)
+{
+ size_t len;
+ char *mem;
+
+ len = mlock_limit_cur;
+ mem = mmap(NULL, len, prot, mode, fd, 0);
+ if (mem == MAP_FAILED) {
+ fail("unable to mmap secret memory\n");
+ return;
+ }
+ munmap(mem, len);
+
+ len = mlock_limit_max * 2;
+ mem = mmap(NULL, len, prot, mode, fd, 0);
+ if (mem != MAP_FAILED) {
+ fail("unexpected mlock limit violation\n");
+ munmap(mem, len);
+ return;
+ }
+
+ pass("mlock limit is respected\n");
+}
+
+static void try_process_vm_read(int fd, int pipefd[2])
+{
+ struct iovec liov, riov;
+ char buf[64];
+ char *mem;
+
+ if (read(pipefd[0], &mem, sizeof(mem)) < 0) {
+ fail("pipe write: %s\n", strerror(errno));
+ exit(KSFT_FAIL);
+ }
+
+ liov.iov_len = riov.iov_len = sizeof(buf);
+ liov.iov_base = buf;
+ riov.iov_base = mem;
+
+ if (process_vm_readv(getppid(), &liov, 1, &riov, 1, 0) < 0) {
+ if (errno == ENOSYS)
+ exit(KSFT_SKIP);
+ exit(KSFT_PASS);
+ }
+
+ exit(KSFT_FAIL);
+}
+
+static void try_ptrace(int fd, int pipefd[2])
+{
+ pid_t ppid = getppid();
+ int status;
+ char *mem;
+ long ret;
+
+ if (read(pipefd[0], &mem, sizeof(mem)) < 0) {
+ perror("pipe write");
+ exit(KSFT_FAIL);
+ }
+
+ ret = ptrace(PTRACE_ATTACH, ppid, 0, 0);
+ if (ret) {
+ perror("ptrace_attach");
+ exit(KSFT_FAIL);
+ }
+
+ ret = waitpid(ppid, &status, WUNTRACED);
+ if ((ret != ppid) || !(WIFSTOPPED(status))) {
+ fpr
[PATCH v14 09/10] arch, mm: wire up memfd_secret system call were relevant
From: Mike Rapoport Wire up memfd_secret system call on architectures that define ARCH_HAS_SET_DIRECT_MAP, namely arm64, risc-v and x86. Signed-off-by: Mike Rapoport Acked-by: Palmer Dabbelt Acked-by: Arnd Bergmann --- arch/arm64/include/uapi/asm/unistd.h | 1 + arch/riscv/include/asm/unistd.h| 1 + arch/x86/entry/syscalls/syscall_32.tbl | 1 + arch/x86/entry/syscalls/syscall_64.tbl | 1 + include/linux/syscalls.h | 1 + include/uapi/asm-generic/unistd.h | 6 +- mm/secretmem.c | 3 +++ scripts/checksyscalls.sh | 4 8 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/uapi/asm/unistd.h b/arch/arm64/include/uapi/asm/unistd.h index f83a70e07df8..ce2ee8f1e361 100644 --- a/arch/arm64/include/uapi/asm/unistd.h +++ b/arch/arm64/include/uapi/asm/unistd.h @@ -20,5 +20,6 @@ #define __ARCH_WANT_SET_GET_RLIMIT #define __ARCH_WANT_TIME32_SYSCALLS #define __ARCH_WANT_SYS_CLONE3 +#define __ARCH_WANT_MEMFD_SECRET #include diff --git a/arch/riscv/include/asm/unistd.h b/arch/riscv/include/asm/unistd.h index 977ee6181dab..6c316093a1e5 100644 --- a/arch/riscv/include/asm/unistd.h +++ b/arch/riscv/include/asm/unistd.h @@ -9,6 +9,7 @@ */ #define __ARCH_WANT_SYS_CLONE +#define __ARCH_WANT_MEMFD_SECRET #include diff --git a/arch/x86/entry/syscalls/syscall_32.tbl b/arch/x86/entry/syscalls/syscall_32.tbl index c52ab1c4a755..109e6681b8fa 100644 --- a/arch/x86/entry/syscalls/syscall_32.tbl +++ b/arch/x86/entry/syscalls/syscall_32.tbl @@ -446,3 +446,4 @@ 439i386faccessat2 sys_faccessat2 440i386process_madvise sys_process_madvise 441i386watch_mount sys_watch_mount +442i386memfd_secretsys_memfd_secret diff --git a/arch/x86/entry/syscalls/syscall_64.tbl b/arch/x86/entry/syscalls/syscall_64.tbl index f3270a9ef467..742cf17d7725 100644 --- a/arch/x86/entry/syscalls/syscall_64.tbl +++ b/arch/x86/entry/syscalls/syscall_64.tbl @@ -363,6 +363,7 @@ 439common faccessat2 sys_faccessat2 440common process_madvise sys_process_madvise 441common watch_mount sys_watch_mount +442common memfd_secretsys_memfd_secret # # Due to a historical design error, certain syscalls are numbered differently diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h index 6d55324363ab..f9d93fbf9b69 100644 --- a/include/linux/syscalls.h +++ b/include/linux/syscalls.h @@ -1010,6 +1010,7 @@ asmlinkage long sys_pidfd_send_signal(int pidfd, int sig, asmlinkage long sys_pidfd_getfd(int pidfd, int fd, unsigned int flags); asmlinkage long sys_watch_mount(int dfd, const char __user *path, unsigned int at_flags, int watch_fd, int watch_id); +asmlinkage long sys_memfd_secret(unsigned long flags); /* * Architecture-specific system calls diff --git a/include/uapi/asm-generic/unistd.h b/include/uapi/asm-generic/unistd.h index 5df46517260e..51151888f330 100644 --- a/include/uapi/asm-generic/unistd.h +++ b/include/uapi/asm-generic/unistd.h @@ -861,9 +861,13 @@ __SYSCALL(__NR_faccessat2, sys_faccessat2) __SYSCALL(__NR_process_madvise, sys_process_madvise) #define __NR_watch_mount 441 __SYSCALL(__NR_watch_mount, sys_watch_mount) +#ifdef __ARCH_WANT_MEMFD_SECRET +#define __NR_memfd_secret 442 +__SYSCALL(__NR_memfd_secret, sys_memfd_secret) +#endif #undef __NR_syscalls -#define __NR_syscalls 442 +#define __NR_syscalls 443 /* * 32 bit systems traditionally used different diff --git a/mm/secretmem.c b/mm/secretmem.c index 7236f4d9458a..b8a32954ac68 100644 --- a/mm/secretmem.c +++ b/mm/secretmem.c @@ -415,6 +415,9 @@ static int __init secretmem_setup(char *str) unsigned long reserved_size; int err; + if (!can_set_direct_map()) + return 0; + reserved_size = memparse(str, NULL); if (!reserved_size) return 0; diff --git a/scripts/checksyscalls.sh b/scripts/checksyscalls.sh index a18b47695f55..b7609958ee36 100755 --- a/scripts/checksyscalls.sh +++ b/scripts/checksyscalls.sh @@ -40,6 +40,10 @@ cat << EOF #define __IGNORE_setrlimit /* setrlimit */ #endif +#ifndef __ARCH_WANT_MEMFD_SECRET +#define __IGNORE_memfd_secret +#endif + /* Missing flags argument */ #define __IGNORE_renameat /* renameat2 */ -- 2.28.0
[PATCH v14 05/10] mm: introduce memfd_secret system call to create "secret" memory areas
From: Mike Rapoport
Introduce "memfd_secret" system call with the ability to create memory
areas visible only in the context of the owning process and not mapped not
only to other processes but in the kernel page tables as well.
The user will create a file descriptor using the memfd_secret() system
call. The memory areas created by mmap() calls from this file descriptor
will be unmapped from the kernel direct map and they will be only mapped in
the page table of the owning mm.
The secret memory remains accessible in the process context using uaccess
primitives, but it is not accessible using direct/linear map addresses.
Functions in the follow_page()/get_user_page() family will refuse to return
a page that belongs to the secret memory area.
A page that was a part of the secret memory area is cleared when it is
freed.
The following example demonstrates creation of a secret mapping (error
handling is omitted):
fd = memfd_secret(0);
ftruncate(fd, MAP_SIZE);
ptr = mmap(NULL, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
Signed-off-by: Mike Rapoport
Acked-by: Hagen Paul Pfeifer
---
arch/x86/Kconfig | 2 +-
include/linux/secretmem.h | 24
include/uapi/linux/magic.h | 1 +
kernel/sys_ni.c| 2 +
mm/Kconfig | 3 +
mm/Makefile| 1 +
mm/gup.c | 10 ++
mm/secretmem.c | 273 +
8 files changed, 315 insertions(+), 1 deletion(-)
create mode 100644 include/linux/secretmem.h
create mode 100644 mm/secretmem.c
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 34d5fb82f674..7d781fea79c2 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -41,7 +41,7 @@ config FORCE_DYNAMIC_FTRACE
in order to test the non static function tracing in the
generic code, as other architectures still use it. But we
only need to keep it around for x86_64. No need to keep it
-for x86_32. For x86_32, force DYNAMIC_FTRACE.
+for x86_32. For x86_32, force DYNAMIC_FTRACE.
#
# Arch settings
#
diff --git a/include/linux/secretmem.h b/include/linux/secretmem.h
new file mode 100644
index ..70e7db9f94fe
--- /dev/null
+++ b/include/linux/secretmem.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+#ifndef _LINUX_SECRETMEM_H
+#define _LINUX_SECRETMEM_H
+
+#ifdef CONFIG_SECRETMEM
+
+bool vma_is_secretmem(struct vm_area_struct *vma);
+bool page_is_secretmem(struct page *page);
+
+#else
+
+static inline bool vma_is_secretmem(struct vm_area_struct *vma)
+{
+ return false;
+}
+
+static inline bool page_is_secretmem(struct page *page)
+{
+ return false;
+}
+
+#endif /* CONFIG_SECRETMEM */
+
+#endif /* _LINUX_SECRETMEM_H */
diff --git a/include/uapi/linux/magic.h b/include/uapi/linux/magic.h
index f3956fc11de6..35687dcb1a42 100644
--- a/include/uapi/linux/magic.h
+++ b/include/uapi/linux/magic.h
@@ -97,5 +97,6 @@
#define DEVMEM_MAGIC 0x454d444d /* "DMEM" */
#define Z3FOLD_MAGIC 0x33
#define PPC_CMM_MAGIC 0xc7571590
+#define SECRETMEM_MAGIC0x5345434d /* "SECM" */
#endif /* __LINUX_MAGIC_H__ */
diff --git a/kernel/sys_ni.c b/kernel/sys_ni.c
index 2dd6cbb8cabc..805fd7a668be 100644
--- a/kernel/sys_ni.c
+++ b/kernel/sys_ni.c
@@ -353,6 +353,8 @@ COND_SYSCALL(pkey_mprotect);
COND_SYSCALL(pkey_alloc);
COND_SYSCALL(pkey_free);
+/* memfd_secret */
+COND_SYSCALL(memfd_secret);
/*
* Architecture specific weak syscall entries.
diff --git a/mm/Kconfig b/mm/Kconfig
index c89c5444924b..d8d170fa5210 100644
--- a/mm/Kconfig
+++ b/mm/Kconfig
@@ -884,4 +884,7 @@ config ARCH_HAS_HUGEPD
config MAPPING_DIRTY_HELPERS
bool
+config SECRETMEM
+ def_bool ARCH_HAS_SET_DIRECT_MAP && !EMBEDDED
+
endmenu
diff --git a/mm/Makefile b/mm/Makefile
index 6eeb4b29efb8..dfda14c48a75 100644
--- a/mm/Makefile
+++ b/mm/Makefile
@@ -121,3 +121,4 @@ obj-$(CONFIG_MEMFD_CREATE) += memfd.o
obj-$(CONFIG_MAPPING_DIRTY_HELPERS) += mapping_dirty_helpers.o
obj-$(CONFIG_PTDUMP_CORE) += ptdump.o
obj-$(CONFIG_PAGE_REPORTING) += page_reporting.o
+obj-$(CONFIG_SECRETMEM) += secretmem.o
diff --git a/mm/gup.c b/mm/gup.c
index 5ec98de1e5de..71164fa83114 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
@@ -793,6 +794,9 @@ struct page *follow_page(struct vm_area_struct *vma,
unsigned long address,
struct follow_page_context ctx = { NULL };
struct page *page;
+ if (vma_is_secretmem(vma))
+ return NULL;
+
page = follow_page_mask(vma, address, foll_flags, &ctx);
if (ctx.pgmap)
put_dev_pagemap(ctx.pgmap);
@@ -923,6 +927,9 @@ static int check_vma_flags(struct vm_area_struct *vma,
unsigned long gup_flags)
if (gup_flags & FOLL_ANON && !vma_is_anonymous(vma))
return -EFAULT;
+ if (v
[PATCH v14 08/10] PM: hibernate: disable when there are active secretmem users
From: Mike Rapoport
It is unsafe to allow saving of secretmem areas to the hibernation snapshot
as they would be visible after the resume and this essentially will defeat
the purpose of secret memory mappings.
Prevent hibernation whenever there are active secret memory users.
Signed-off-by: Mike Rapoport
---
include/linux/secretmem.h | 6 ++
kernel/power/hibernate.c | 5 -
mm/secretmem.c| 15 +++
3 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/include/linux/secretmem.h b/include/linux/secretmem.h
index 70e7db9f94fe..907a6734059c 100644
--- a/include/linux/secretmem.h
+++ b/include/linux/secretmem.h
@@ -6,6 +6,7 @@
bool vma_is_secretmem(struct vm_area_struct *vma);
bool page_is_secretmem(struct page *page);
+bool secretmem_active(void);
#else
@@ -19,6 +20,11 @@ static inline bool page_is_secretmem(struct page *page)
return false;
}
+static inline bool secretmem_active(void)
+{
+ return false;
+}
+
#endif /* CONFIG_SECRETMEM */
#endif /* _LINUX_SECRETMEM_H */
diff --git a/kernel/power/hibernate.c b/kernel/power/hibernate.c
index da0b41914177..559acef3fddb 100644
--- a/kernel/power/hibernate.c
+++ b/kernel/power/hibernate.c
@@ -31,6 +31,7 @@
#include
#include
#include
+#include
#include
#include "power.h"
@@ -81,7 +82,9 @@ void hibernate_release(void)
bool hibernation_available(void)
{
- return nohibernate == 0 && !security_locked_down(LOCKDOWN_HIBERNATION);
+ return nohibernate == 0 &&
+ !security_locked_down(LOCKDOWN_HIBERNATION) &&
+ !secretmem_active();
}
/**
diff --git a/mm/secretmem.c b/mm/secretmem.c
index 2390901d3ff7..7236f4d9458a 100644
--- a/mm/secretmem.c
+++ b/mm/secretmem.c
@@ -45,6 +45,13 @@ struct secretmem_ctx {
static struct cma *secretmem_cma;
+static atomic_t secretmem_users;
+
+bool secretmem_active(void)
+{
+ return !!atomic_read(&secretmem_users);
+}
+
static int secretmem_account_pages(struct page *page, gfp_t gfp, int order)
{
int err;
@@ -179,6 +186,12 @@ static const struct vm_operations_struct secretmem_vm_ops
= {
.fault = secretmem_fault,
};
+static int secretmem_release(struct inode *inode, struct file *file)
+{
+ atomic_dec(&secretmem_users);
+ return 0;
+}
+
static int secretmem_mmap(struct file *file, struct vm_area_struct *vma)
{
unsigned long len = vma->vm_end - vma->vm_start;
@@ -201,6 +214,7 @@ bool vma_is_secretmem(struct vm_area_struct *vma)
}
static const struct file_operations secretmem_fops = {
+ .release= secretmem_release,
.mmap = secretmem_mmap,
};
@@ -318,6 +332,7 @@ SYSCALL_DEFINE1(memfd_secret, unsigned long, flags)
file->f_flags |= O_LARGEFILE;
fd_install(fd, file);
+ atomic_inc(&secretmem_users);
return fd;
err_put_fd:
--
2.28.0
[PATCH v14 06/10] secretmem: use PMD-size pages to amortize direct map fragmentation
From: Mike Rapoport
Removing a PAGE_SIZE page from the direct map every time such page is
allocated for a secret memory mapping will cause severe fragmentation of
the direct map. This fragmentation can be reduced by using PMD-size pages
as a pool for small pages for secret memory mappings.
Add a gen_pool per secretmem inode and lazily populate this pool with
PMD-size pages.
As pages allocated by secretmem become unmovable, use CMA to back large
page caches so that page allocator won't be surprised by failing attempt to
migrate these pages.
The CMA area used by secretmem is controlled by the "secretmem=" kernel
parameter. This allows explicit control over the memory available for
secretmem and provides upper hard limit for secretmem consumption.
Signed-off-by: Mike Rapoport
---
mm/Kconfig | 2 +
mm/secretmem.c | 152 ++---
2 files changed, 135 insertions(+), 19 deletions(-)
diff --git a/mm/Kconfig b/mm/Kconfig
index d8d170fa5210..e0e789398421 100644
--- a/mm/Kconfig
+++ b/mm/Kconfig
@@ -886,5 +886,7 @@ config MAPPING_DIRTY_HELPERS
config SECRETMEM
def_bool ARCH_HAS_SET_DIRECT_MAP && !EMBEDDED
+ select GENERIC_ALLOCATOR
+ select CMA
endmenu
diff --git a/mm/secretmem.c b/mm/secretmem.c
index 781aaaca8c70..52a900a135a5 100644
--- a/mm/secretmem.c
+++ b/mm/secretmem.c
@@ -7,12 +7,15 @@
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
+#include
#include
#include
#include
@@ -35,25 +38,80 @@
#define SECRETMEM_FLAGS_MASK SECRETMEM_MODE_MASK
struct secretmem_ctx {
+ struct gen_pool *pool;
unsigned int mode;
};
-static struct page *secretmem_alloc_page(gfp_t gfp)
+static struct cma *secretmem_cma;
+
+static int secretmem_pool_increase(struct secretmem_ctx *ctx, gfp_t gfp)
{
+ unsigned long nr_pages = (1 << PMD_PAGE_ORDER);
+ struct gen_pool *pool = ctx->pool;
+ unsigned long addr;
+ struct page *page;
+ int err;
+
+ page = cma_alloc(secretmem_cma, nr_pages, PMD_SIZE, gfp & __GFP_NOWARN);
+ if (!page)
+ return -ENOMEM;
+
+ err = set_direct_map_invalid_noflush(page, nr_pages);
+ if (err)
+ goto err_cma_release;
+
+ addr = (unsigned long)page_address(page);
+ err = gen_pool_add(pool, addr, PMD_SIZE, NUMA_NO_NODE);
+ if (err)
+ goto err_set_direct_map;
+
+ flush_tlb_kernel_range(addr, addr + PMD_SIZE);
+
+ return 0;
+
+err_set_direct_map:
/*
-* FIXME: use a cache of large pages to reduce the direct map
-* fragmentation
+* If a split of PUD-size page was required, it already happened
+* when we marked the pages invalid which guarantees that this call
+* won't fail
*/
- return alloc_page(gfp);
+ set_direct_map_default_noflush(page, nr_pages);
+err_cma_release:
+ cma_release(secretmem_cma, page, nr_pages);
+ return err;
+}
+
+static struct page *secretmem_alloc_page(struct secretmem_ctx *ctx,
+gfp_t gfp)
+{
+ struct gen_pool *pool = ctx->pool;
+ unsigned long addr;
+ struct page *page;
+ int err;
+
+ if (gen_pool_avail(pool) < PAGE_SIZE) {
+ err = secretmem_pool_increase(ctx, gfp);
+ if (err)
+ return NULL;
+ }
+
+ addr = gen_pool_alloc(pool, PAGE_SIZE);
+ if (!addr)
+ return NULL;
+
+ page = virt_to_page(addr);
+ get_page(page);
+
+ return page;
}
static vm_fault_t secretmem_fault(struct vm_fault *vmf)
{
+ struct secretmem_ctx *ctx = vmf->vma->vm_file->private_data;
struct address_space *mapping = vmf->vma->vm_file->f_mapping;
struct inode *inode = file_inode(vmf->vma->vm_file);
pgoff_t offset = vmf->pgoff;
vm_fault_t ret = 0;
- unsigned long addr;
struct page *page;
int err;
@@ -62,8 +120,7 @@ static vm_fault_t secretmem_fault(struct vm_fault *vmf)
page = find_get_page(mapping, offset);
if (!page) {
-
- page = secretmem_alloc_page(vmf->gfp_mask);
+ page = secretmem_alloc_page(ctx, vmf->gfp_mask);
if (!page)
return vmf_error(-ENOMEM);
@@ -71,14 +128,8 @@ static vm_fault_t secretmem_fault(struct vm_fault *vmf)
if (unlikely(err))
goto err_put_page;
- err = set_direct_map_invalid_noflush(page, 1);
- if (err)
- goto err_del_page_cache;
-
- addr = (unsigned long)page_address(page);
- flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
-
__SetPageUptodate(page);
+ set_page_private(page, (unsigned long)ctx);
ret = VM_FAULT_LOCKED;
}
@@ -86,8 +137,6 @@ static vm_f
[PATCH v14 07/10] secretmem: add memcg accounting
From: Mike Rapoport
Account memory consumed by secretmem to memcg. The accounting is updated
when the memory is actually allocated and freed.
Signed-off-by: Mike Rapoport
Acked-by: Roman Gushchin
---
mm/filemap.c | 3 ++-
mm/secretmem.c | 36 +++-
2 files changed, 37 insertions(+), 2 deletions(-)
diff --git a/mm/filemap.c b/mm/filemap.c
index 249cf489f5df..cf7f1dc9f4b8 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -42,6 +42,7 @@
#include
#include
#include
+#include
#include "internal.h"
#define CREATE_TRACE_POINTS
@@ -844,7 +845,7 @@ static noinline int __add_to_page_cache_locked(struct page
*page,
page->mapping = mapping;
page->index = offset;
- if (!huge) {
+ if (!huge && !page_is_secretmem(page)) {
error = mem_cgroup_charge(page, current->mm, gfp);
if (error)
goto error;
diff --git a/mm/secretmem.c b/mm/secretmem.c
index 52a900a135a5..2390901d3ff7 100644
--- a/mm/secretmem.c
+++ b/mm/secretmem.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
#include
#include
@@ -44,6 +45,32 @@ struct secretmem_ctx {
static struct cma *secretmem_cma;
+static int secretmem_account_pages(struct page *page, gfp_t gfp, int order)
+{
+ int err;
+
+ err = memcg_kmem_charge_page(page, gfp, order);
+ if (err)
+ return err;
+
+ /*
+* seceremem caches are unreclaimable kernel allocations, so treat
+* them as unreclaimable slab memory for VM statistics purposes
+*/
+ mod_lruvec_page_state(page, NR_SLAB_UNRECLAIMABLE_B,
+ PAGE_SIZE << order);
+
+ return 0;
+}
+
+static void secretmem_unaccount_pages(struct page *page, int order)
+{
+
+ mod_lruvec_page_state(page, NR_SLAB_UNRECLAIMABLE_B,
+ -PAGE_SIZE << order);
+ memcg_kmem_uncharge_page(page, order);
+}
+
static int secretmem_pool_increase(struct secretmem_ctx *ctx, gfp_t gfp)
{
unsigned long nr_pages = (1 << PMD_PAGE_ORDER);
@@ -56,10 +83,14 @@ static int secretmem_pool_increase(struct secretmem_ctx
*ctx, gfp_t gfp)
if (!page)
return -ENOMEM;
- err = set_direct_map_invalid_noflush(page, nr_pages);
+ err = secretmem_account_pages(page, gfp, PMD_PAGE_ORDER);
if (err)
goto err_cma_release;
+ err = set_direct_map_invalid_noflush(page, nr_pages);
+ if (err)
+ goto err_memcg_uncharge;
+
addr = (unsigned long)page_address(page);
err = gen_pool_add(pool, addr, PMD_SIZE, NUMA_NO_NODE);
if (err)
@@ -76,6 +107,8 @@ static int secretmem_pool_increase(struct secretmem_ctx
*ctx, gfp_t gfp)
* won't fail
*/
set_direct_map_default_noflush(page, nr_pages);
+err_memcg_uncharge:
+ secretmem_unaccount_pages(page, PMD_PAGE_ORDER);
err_cma_release:
cma_release(secretmem_cma, page, nr_pages);
return err;
@@ -302,6 +335,7 @@ static void secretmem_cleanup_chunk(struct gen_pool *pool,
int i;
set_direct_map_default_noflush(page, nr_pages);
+ secretmem_unaccount_pages(page, PMD_PAGE_ORDER);
for (i = 0; i < nr_pages; i++)
clear_highpage(page + i);
--
2.28.0
[PATCH v14 01/10] mm: add definition of PMD_PAGE_ORDER
From: Mike Rapoport
The definition of PMD_PAGE_ORDER denoting the number of base pages in the
second-level leaf page is already used by DAX and maybe handy in other
cases as well.
Several architectures already have definition of PMD_ORDER as the size of
second level page table, so to avoid conflict with these definitions use
PMD_PAGE_ORDER name and update DAX respectively.
Signed-off-by: Mike Rapoport
Reviewed-by: David Hildenbrand
---
fs/dax.c| 11 ---
include/linux/pgtable.h | 3 +++
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/fs/dax.c b/fs/dax.c
index 26d5dcd2d69e..0f109eb16196 100644
--- a/fs/dax.c
+++ b/fs/dax.c
@@ -49,9 +49,6 @@ static inline unsigned int pe_order(enum page_entry_size
pe_size)
#define PG_PMD_COLOUR ((PMD_SIZE >> PAGE_SHIFT) - 1)
#define PG_PMD_NR (PMD_SIZE >> PAGE_SHIFT)
-/* The order of a PMD entry */
-#define PMD_ORDER (PMD_SHIFT - PAGE_SHIFT)
-
static wait_queue_head_t wait_table[DAX_WAIT_TABLE_ENTRIES];
static int __init init_dax_wait_table(void)
@@ -98,7 +95,7 @@ static bool dax_is_locked(void *entry)
static unsigned int dax_entry_order(void *entry)
{
if (xa_to_value(entry) & DAX_PMD)
- return PMD_ORDER;
+ return PMD_PAGE_ORDER;
return 0;
}
@@ -1470,7 +1467,7 @@ static vm_fault_t dax_iomap_pmd_fault(struct vm_fault
*vmf, pfn_t *pfnp,
{
struct vm_area_struct *vma = vmf->vma;
struct address_space *mapping = vma->vm_file->f_mapping;
- XA_STATE_ORDER(xas, &mapping->i_pages, vmf->pgoff, PMD_ORDER);
+ XA_STATE_ORDER(xas, &mapping->i_pages, vmf->pgoff, PMD_PAGE_ORDER);
unsigned long pmd_addr = vmf->address & PMD_MASK;
bool write = vmf->flags & FAULT_FLAG_WRITE;
bool sync;
@@ -1529,7 +1526,7 @@ static vm_fault_t dax_iomap_pmd_fault(struct vm_fault
*vmf, pfn_t *pfnp,
* entry is already in the array, for instance), it will return
* VM_FAULT_FALLBACK.
*/
- entry = grab_mapping_entry(&xas, mapping, PMD_ORDER);
+ entry = grab_mapping_entry(&xas, mapping, PMD_PAGE_ORDER);
if (xa_is_internal(entry)) {
result = xa_to_internal(entry);
goto fallback;
@@ -1695,7 +1692,7 @@ dax_insert_pfn_mkwrite(struct vm_fault *vmf, pfn_t pfn,
unsigned int order)
if (order == 0)
ret = vmf_insert_mixed_mkwrite(vmf->vma, vmf->address, pfn);
#ifdef CONFIG_FS_DAX_PMD
- else if (order == PMD_ORDER)
+ else if (order == PMD_PAGE_ORDER)
ret = vmf_insert_pfn_pmd(vmf, pfn, FAULT_FLAG_WRITE);
#endif
else
diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
index 71125a4676c4..7f718b8dc789 100644
--- a/include/linux/pgtable.h
+++ b/include/linux/pgtable.h
@@ -28,6 +28,9 @@
#define USER_PGTABLES_CEILING 0UL
#endif
+/* Number of base pages in a second level leaf page */
+#define PMD_PAGE_ORDER (PMD_SHIFT - PAGE_SHIFT)
+
/*
* A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
*
--
2.28.0
[PATCH v14 03/10] set_memory: allow set_direct_map_*_noflush() for multiple pages
From: Mike Rapoport
The underlying implementations of set_direct_map_invalid_noflush() and
set_direct_map_default_noflush() allow updating multiple contiguous pages
at once.
Add numpages parameter to set_direct_map_*_noflush() to expose this ability
with these APIs.
Signed-off-by: Mike Rapoport
Acked-by: Catalin Marinas # arm64
---
arch/arm64/include/asm/cacheflush.h | 4 ++--
arch/arm64/mm/pageattr.c| 10 ++
arch/riscv/include/asm/set_memory.h | 4 ++--
arch/riscv/mm/pageattr.c| 8
arch/x86/include/asm/set_memory.h | 4 ++--
arch/x86/mm/pat/set_memory.c| 8
include/linux/set_memory.h | 4 ++--
kernel/power/snapshot.c | 4 ++--
mm/vmalloc.c| 5 +++--
9 files changed, 27 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/include/asm/cacheflush.h
b/arch/arm64/include/asm/cacheflush.h
index 45217f21f1fe..d3598419a284 100644
--- a/arch/arm64/include/asm/cacheflush.h
+++ b/arch/arm64/include/asm/cacheflush.h
@@ -138,8 +138,8 @@ static __always_inline void __flush_icache_all(void)
int set_memory_valid(unsigned long addr, int numpages, int enable);
-int set_direct_map_invalid_noflush(struct page *page);
-int set_direct_map_default_noflush(struct page *page);
+int set_direct_map_invalid_noflush(struct page *page, int numpages);
+int set_direct_map_default_noflush(struct page *page, int numpages);
bool kernel_page_present(struct page *page);
#include
diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c
index 92eccaf595c8..b53ef37bf95a 100644
--- a/arch/arm64/mm/pageattr.c
+++ b/arch/arm64/mm/pageattr.c
@@ -148,34 +148,36 @@ int set_memory_valid(unsigned long addr, int numpages,
int enable)
__pgprot(PTE_VALID));
}
-int set_direct_map_invalid_noflush(struct page *page)
+int set_direct_map_invalid_noflush(struct page *page, int numpages)
{
struct page_change_data data = {
.set_mask = __pgprot(0),
.clear_mask = __pgprot(PTE_VALID),
};
+ unsigned long size = PAGE_SIZE * numpages;
if (!debug_pagealloc_enabled() && !rodata_full)
return 0;
return apply_to_page_range(&init_mm,
(unsigned long)page_address(page),
- PAGE_SIZE, change_page_range, &data);
+ size, change_page_range, &data);
}
-int set_direct_map_default_noflush(struct page *page)
+int set_direct_map_default_noflush(struct page *page, int numpages)
{
struct page_change_data data = {
.set_mask = __pgprot(PTE_VALID | PTE_WRITE),
.clear_mask = __pgprot(PTE_RDONLY),
};
+ unsigned long size = PAGE_SIZE * numpages;
if (!debug_pagealloc_enabled() && !rodata_full)
return 0;
return apply_to_page_range(&init_mm,
(unsigned long)page_address(page),
- PAGE_SIZE, change_page_range, &data);
+ size, change_page_range, &data);
}
#ifdef CONFIG_DEBUG_PAGEALLOC
diff --git a/arch/riscv/include/asm/set_memory.h
b/arch/riscv/include/asm/set_memory.h
index d690b08dff2a..92b9bb26bf5e 100644
--- a/arch/riscv/include/asm/set_memory.h
+++ b/arch/riscv/include/asm/set_memory.h
@@ -22,8 +22,8 @@ static inline int set_memory_x(unsigned long addr, int
numpages) { return 0; }
static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; }
#endif
-int set_direct_map_invalid_noflush(struct page *page);
-int set_direct_map_default_noflush(struct page *page);
+int set_direct_map_invalid_noflush(struct page *page, int numpages);
+int set_direct_map_default_noflush(struct page *page, int numpages);
bool kernel_page_present(struct page *page);
#endif /* __ASSEMBLY__ */
diff --git a/arch/riscv/mm/pageattr.c b/arch/riscv/mm/pageattr.c
index 87ba5a68bbb8..0454f2d052c4 100644
--- a/arch/riscv/mm/pageattr.c
+++ b/arch/riscv/mm/pageattr.c
@@ -150,11 +150,11 @@ int set_memory_nx(unsigned long addr, int numpages)
return __set_memory(addr, numpages, __pgprot(0), __pgprot(_PAGE_EXEC));
}
-int set_direct_map_invalid_noflush(struct page *page)
+int set_direct_map_invalid_noflush(struct page *page, int numpages)
{
int ret;
unsigned long start = (unsigned long)page_address(page);
- unsigned long end = start + PAGE_SIZE;
+ unsigned long end = start + PAGE_SIZE * numpages;
struct pageattr_masks masks = {
.set_mask = __pgprot(0),
.clear_mask = __pgprot(_PAGE_PRESENT)
@@ -167,11 +167,11 @@ int set_direct_map_invalid_noflush(struct page *page)
return ret;
}
-int set_direct_map_default_noflush(struct page *page)
+int set_direct_map_default_noflush(struct page *page, int numpages)
{
int ret;
unsigned long start = (un
[PATCH v14 02/10] mmap: make mlock_future_check() global
From: Mike Rapoport
It will be used by the upcoming secret memory implementation.
Signed-off-by: Mike Rapoport
---
mm/internal.h | 3 +++
mm/mmap.c | 5 ++---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/mm/internal.h b/mm/internal.h
index c43ccdddb0f6..ae146a260b14 100644
--- a/mm/internal.h
+++ b/mm/internal.h
@@ -348,6 +348,9 @@ static inline void munlock_vma_pages_all(struct
vm_area_struct *vma)
extern void mlock_vma_page(struct page *page);
extern unsigned int munlock_vma_page(struct page *page);
+extern int mlock_future_check(struct mm_struct *mm, unsigned long flags,
+ unsigned long len);
+
/*
* Clear the page's PageMlocked(). This can be useful in a situation where
* we want to unconditionally remove a page from the pagecache -- e.g.,
diff --git a/mm/mmap.c b/mm/mmap.c
index 61f72b09d990..c481f088bd50 100644
--- a/mm/mmap.c
+++ b/mm/mmap.c
@@ -1348,9 +1348,8 @@ static inline unsigned long round_hint_to_min(unsigned
long hint)
return hint;
}
-static inline int mlock_future_check(struct mm_struct *mm,
-unsigned long flags,
-unsigned long len)
+int mlock_future_check(struct mm_struct *mm, unsigned long flags,
+ unsigned long len)
{
unsigned long locked, lock_limit;
--
2.28.0
[PATCH v14 00/10] mm: introduce memfd_secret system call to create "secret" memory areas
From: Mike Rapoport Hi, @Andrew, this is based on v5.10-rc2-mmotm-2020-11-07-21-40, I can rebase on current mmotm if you prefer. This is an implementation of "secret" mappings backed by a file descriptor. The file descriptor backing secret memory mappings is created using a dedicated memfd_secret system call The desired protection mode for the memory is configured using flags parameter of the system call. The mmap() of the file descriptor created with memfd_secret() will create a "secret" memory mapping. The pages in that mapping will be marked as not present in the direct map and will be present only in the page table of the owning mm. Although normally Linux userspace mappings are protected from other users, such secret mappings are useful for environments where a hostile tenant is trying to trick the kernel into giving them access to other tenants mappings. Additionally, in the future the secret mappings may be used as a mean to protect guest memory in a virtual machine host. For demonstration of secret memory usage we've created a userspace library https://git.kernel.org/pub/scm/linux/kernel/git/jejb/secret-memory-preloader.git that does two things: the first is act as a preloader for openssl to redirect all the OPENSSL_malloc calls to secret memory meaning any secret keys get automatically protected this way and the other thing it does is expose the API to the user who needs it. We anticipate that a lot of the use cases would be like the openssl one: many toolkits that deal with secret keys already have special handling for the memory to try to give them greater protection, so this would simply be pluggable into the toolkits without any need for user application modification. Hiding secret memory mappings behind an anonymous file allows (ab)use of the page cache for tracking pages allocated for the "secret" mappings as well as using address_space_operations for e.g. page migration callbacks. The anonymous file may be also used implicitly, like hugetlb files, to implement mmap(MAP_SECRET) and use the secret memory areas with "native" mm ABIs in the future. To limit fragmentation of the direct map to splitting only PUD-size pages, I've added an amortizing cache of PMD-size pages to each file descriptor that is used as an allocation pool for the secret memory areas. As the memory allocated by secretmem becomes unmovable, we use CMA to back large page caches so that page allocator won't be surprised by failing attempt to migrate these pages. v14: * Finally s/mod_node_page_state/mod_lruvec_page_state/ v13: https://lore.kernel.org/lkml/20201201074559.27742-1-r...@kernel.org * Added Reviewed-by, thanks Catalin and David * s/mod_node_page_state/mod_lruvec_page_state/ as Shakeel suggested v12: https://lore.kernel.org/lkml/20201125092208.12544-1-r...@kernel.org * Add detection of whether set_direct_map has actual effect on arm64 and bail out of CMA allocation for secretmem and the memfd_secret() syscall if pages would not be removed from the direct map v11: https://lore.kernel.org/lkml/20201124092556.12009-1-r...@kernel.org * Drop support for uncached mappings v10: https://lore.kernel.org/lkml/20201123095432.5860-1-r...@kernel.org * Drop changes to arm64 compatibility layer * Add Roman's Ack for memcg accounting Older history: v9: https://lore.kernel.org/lkml/20201117162932.13649-1-r...@kernel.org v8: https://lore.kernel.org/lkml/20201110151444.20662-1-r...@kernel.org v7: https://lore.kernel.org/lkml/20201026083752.13267-1-r...@kernel.org v6: https://lore.kernel.org/lkml/20200924132904.1391-1-r...@kernel.org v5: https://lore.kernel.org/lkml/20200916073539.3552-1-r...@kernel.org v4: https://lore.kernel.org/lkml/20200818141554.13945-1-r...@kernel.org v3: https://lore.kernel.org/lkml/20200804095035.18778-1-r...@kernel.org v2: https://lore.kernel.org/lkml/20200727162935.31714-1-r...@kernel.org v1: https://lore.kernel.org/lkml/20200720092435.17469-1-r...@kernel.org Mike Rapoport (10): mm: add definition of PMD_PAGE_ORDER mmap: make mlock_future_check() global set_memory: allow set_direct_map_*_noflush() for multiple pages set_memory: allow querying whether set_direct_map_*() is actually enabled mm: introduce memfd_secret system call to create "secret" memory areas secretmem: use PMD-size pages to amortize direct map fragmentation secretmem: add memcg accounting PM: hibernate: disable when there are active secretmem users arch, mm: wire up memfd_secret system call were relevant secretmem: test: add basic selftest for memfd_secret(2) arch/arm64/include/asm/Kbuild | 1 - arch/arm64/include/asm/cacheflush.h | 6 - arch/arm64/include/asm/set_memory.h | 17 + arch/arm64/include/uapi/asm/unistd.h | 1 + arch/arm64/kernel/machine_kexec.c | 1 + arch/arm64/mm/mmu.c | 6 +- arch/arm64/mm/pageattr.c | 23 +- arch/riscv/include/asm/set_memory.h | 4 +- arch/riscv/include/asm/unistd.h
[PATCH v14 04/10] set_memory: allow querying whether set_direct_map_*() is actually enabled
From: Mike Rapoport
On arm64, set_direct_map_*() functions may return 0 without actually
changing the linear map. This behaviour can be controlled using kernel
parameters, so we need a way to determine at runtime whether calls to
set_direct_map_invalid_noflush() and set_direct_map_default_noflush() have
any effect.
Extend set_memory API with can_set_direct_map() function that allows
checking if calling set_direct_map_*() will actually change the page table,
replace several occurrences of open coded checks in arm64 with the new
function and provide a generic stub for architectures that always modify
page tables upon calls to set_direct_map APIs.
Signed-off-by: Mike Rapoport
Reviewed-by: Catalin Marinas
Reviewed-by: David Hildenbrand
---
arch/arm64/include/asm/Kbuild | 1 -
arch/arm64/include/asm/cacheflush.h | 6 --
arch/arm64/include/asm/set_memory.h | 17 +
arch/arm64/kernel/machine_kexec.c | 1 +
arch/arm64/mm/mmu.c | 6 +++---
arch/arm64/mm/pageattr.c| 13 +
include/linux/set_memory.h | 12
7 files changed, 42 insertions(+), 14 deletions(-)
create mode 100644 arch/arm64/include/asm/set_memory.h
diff --git a/arch/arm64/include/asm/Kbuild b/arch/arm64/include/asm/Kbuild
index ff9cbb631212..4306136ef329 100644
--- a/arch/arm64/include/asm/Kbuild
+++ b/arch/arm64/include/asm/Kbuild
@@ -4,5 +4,4 @@ generic-y += local64.h
generic-y += mcs_spinlock.h
generic-y += qrwlock.h
generic-y += qspinlock.h
-generic-y += set_memory.h
generic-y += user.h
diff --git a/arch/arm64/include/asm/cacheflush.h
b/arch/arm64/include/asm/cacheflush.h
index d3598419a284..b1bdf83a73db 100644
--- a/arch/arm64/include/asm/cacheflush.h
+++ b/arch/arm64/include/asm/cacheflush.h
@@ -136,12 +136,6 @@ static __always_inline void __flush_icache_all(void)
dsb(ish);
}
-int set_memory_valid(unsigned long addr, int numpages, int enable);
-
-int set_direct_map_invalid_noflush(struct page *page, int numpages);
-int set_direct_map_default_noflush(struct page *page, int numpages);
-bool kernel_page_present(struct page *page);
-
#include
#endif /* __ASM_CACHEFLUSH_H */
diff --git a/arch/arm64/include/asm/set_memory.h
b/arch/arm64/include/asm/set_memory.h
new file mode 100644
index ..ecb6b0f449ab
--- /dev/null
+++ b/arch/arm64/include/asm/set_memory.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef _ASM_ARM64_SET_MEMORY_H
+#define _ASM_ARM64_SET_MEMORY_H
+
+#include
+
+bool can_set_direct_map(void);
+#define can_set_direct_map can_set_direct_map
+
+int set_memory_valid(unsigned long addr, int numpages, int enable);
+
+int set_direct_map_invalid_noflush(struct page *page, int numpages);
+int set_direct_map_default_noflush(struct page *page, int numpages);
+bool kernel_page_present(struct page *page);
+
+#endif /* _ASM_ARM64_SET_MEMORY_H */
diff --git a/arch/arm64/kernel/machine_kexec.c
b/arch/arm64/kernel/machine_kexec.c
index a0b144cfaea7..0cbc50c4fa5a 100644
--- a/arch/arm64/kernel/machine_kexec.c
+++ b/arch/arm64/kernel/machine_kexec.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 86be6d1a78ab..aa5ec08cb902 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
@@ -477,7 +478,7 @@ static void __init map_mem(pgd_t *pgdp)
int flags = 0;
u64 i;
- if (rodata_full || debug_pagealloc_enabled())
+ if (can_set_direct_map())
flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
/*
@@ -1453,8 +1454,7 @@ int arch_add_memory(int nid, u64 start, u64 size,
* KFENCE requires linear map to be mapped at page granularity, so that
* it is possible to protect/unprotect single pages in the KFENCE pool.
*/
- if (rodata_full || debug_pagealloc_enabled() ||
- IS_ENABLED(CONFIG_KFENCE))
+ if (can_set_direct_map() || IS_ENABLED(CONFIG_KFENCE))
flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
__create_pgd_mapping(swapper_pg_dir, start, __phys_to_virt(start),
diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c
index b53ef37bf95a..d505172265b0 100644
--- a/arch/arm64/mm/pageattr.c
+++ b/arch/arm64/mm/pageattr.c
@@ -19,6 +19,11 @@ struct page_change_data {
bool rodata_full __ro_after_init =
IS_ENABLED(CONFIG_RODATA_FULL_DEFAULT_ENABLED);
+bool can_set_direct_map(void)
+{
+ return rodata_full || debug_pagealloc_enabled();
+}
+
static int change_page_range(pte_t *ptep, unsigned long addr, void *data)
{
struct page_change_data *cdata = data;
@@ -156,7 +161,7 @@ int set_direct_map_invalid_noflush(struct page *page, int
numpages)
};
unsigned long size = PAGE_SIZE * numpages;
- if (!debug_pagealloc_enabled() && !rodata_full)
+ if (!can_set_direct_map())
[PATCH] x86/mm: Fix leak of pmd ptlock
Commit 28ee90fe6048 ("x86/mm: implement free pmd/pte page interfaces")
introduced a new location where a pmd was released, but neglected to run
the pmd page destructor. In fact, this happened previously for a
different pmd release path and was fixed by commit:
c283610e44ec ("x86, mm: do not leak page->ptl for pmd page tables").
This issue was hidden until recently because the failure mode is silent,
but commit:
b2b29d6d0119 ("mm: account PMD tables like PTE tables")
...turns the failure mode into this signature:
BUG: Bad page state in process lt-pmem-ns pfn:15943d
page:7262ed7b refcount:0 mapcount:-1024 mapping:
index:0x0 pfn:0x15943d
flags: 0xa8()
raw: 00a8 dead0100
raw: 913a029bcc08 fbff
page dumped because: nonzero mapcount
[..]
dump_stack+0x8b/0xb0
bad_page.cold+0x63/0x94
free_pcp_prepare+0x224/0x270
free_unref_page+0x18/0xd0
pud_free_pmd_page+0x146/0x160
ioremap_pud_range+0xe3/0x350
ioremap_page_range+0x108/0x160
__ioremap_caller.constprop.0+0x174/0x2b0
? memremap+0x7a/0x110
memremap+0x7a/0x110
devm_memremap+0x53/0xa0
pmem_attach_disk+0x4ed/0x530 [nd_pmem]
? __devm_release_region+0x52/0x80
nvdimm_bus_probe+0x85/0x210 [libnvdimm]
Given this is a repeat occurrence it seemed prudent to look for other
places where this destructor might be missing and whether a better
helper is needed. try_to_free_pmd_page() looks like a candidate, but
testing with setting up and tearing down pmd mappings via the dax unit
tests is thus far not triggering the failure. As for a better helper
pmd_free() is close, but it is a messy fit due to requiring an @mm arg.
Also, ___pmd_free_tlb() wants to call paravirt_tlb_remove_table()
instead of free_page(), so open-coded pgtable_pmd_page_dtor() seems the
best way forward for now.
Fixes: 28ee90fe6048 ("x86/mm: implement free pmd/pte page interfaces")
Cc:
Cc: Dave Hansen
Cc: Andy Lutomirski
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: x...@kernel.org
Cc: "H. Peter Anvin"
Co-debugged-by: Matthew Wilcox
Tested-by: Yi Zhang
Signed-off-by: Dan Williams
---
arch/x86/mm/pgtable.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index dfd82f51ba66..f6a9e2e36642 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -829,6 +829,8 @@ int pud_free_pmd_page(pud_t *pud, unsigned long addr)
}
free_page((unsigned long)pmd_sv);
+
+ pgtable_pmd_page_dtor(virt_to_page(pmd));
free_page((unsigned long)pmd);
return 1;
Re: [PATCH v2] Input: document inhibiting
On Wed, Jun 17, 2020 at 12:18:22PM +0200, Andrzej Pietrasiewicz wrote: > Document inhibiting input devices and its relation to being > a wakeup source. > > Signed-off-by: Andrzej Pietrasiewicz Applied, thank you. -- Dmitry
