[PATCH v2] arm64: dts: mt8192: add nor_flash device node
From: bayi cheng
add nor_flash device node
Change-Id: I79f0228529bd8a33e5f354b7a861a4ec8d92e9ba
Signed-off-by: bayi cheng
---
Change in v2:
1: add dependent patch of arm soc
2: change compatible name
Depends on:
https://patchwork.kernel.org/patch/11713559/
[v4,1/3] arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and
Makefile
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index e12e024..751c877 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -379,6 +379,19 @@
status = "disabled";
};
+ nor_flash: spi@11234000 {
+ compatible = "mediatek,mt8192-nor";
+ reg = <0 0x11234000 0 0xe0>;
+ interrupts = ;
+ clocks = <>,
+<>,
+<>;
+ clock-names = "spi", "sf", "axi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disable";
+ };
+
i2c3: i2c3@11cb {
compatible = "mediatek,mt8192-i2c";
reg = <0 0x11cb 0 0x1000>,
--
1.9.1
[PATCH v1] arm64: dts: mt8192: add nor_flash device node
From: bayi cheng
add nor_flash device node
Signed-off-by: bayi cheng
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index e12e024..b15b0d3 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -379,6 +379,19 @@
status = "disabled";
};
+ nor_flash: spi@11234000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x11234000 0 0xe0>;
+ interrupts = ;
+ clocks = <>,
+<>,
+<>;
+ clock-names = "spi", "sf", "axi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disable";
+ };
+
i2c3: i2c3@11cb {
compatible = "mediatek,mt8192-i2c";
reg = <0 0x11cb 0 0x1000>,
--
1.9.1
[PATCH v1] spi: spi-mtk-nor: add axi clock control for MT8192 spi-nor
From: bayi cheng
MT8192 spi-nor is an independent sub system, we need extra control axi
bus clock for it. Add support for the additional axi clock to allow it
to be configured appropriately.
Signed-off-by: bayi cheng
---
drivers/spi/spi-mtk-nor.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c
index b97f26a..bf2d0f9 100644
--- a/drivers/spi/spi-mtk-nor.c
+++ b/drivers/spi/spi-mtk-nor.c
@@ -103,6 +103,7 @@ struct mtk_nor {
dma_addr_t buffer_dma;
struct clk *spi_clk;
struct clk *ctlr_clk;
+ struct clk *axi_clk;
unsigned int spi_freq;
bool wbuf_en;
bool has_irq;
@@ -672,6 +673,7 @@ static void mtk_nor_disable_clk(struct mtk_nor *sp)
{
clk_disable_unprepare(sp->spi_clk);
clk_disable_unprepare(sp->ctlr_clk);
+ clk_disable_unprepare(sp->axi_clk);
}
static int mtk_nor_enable_clk(struct mtk_nor *sp)
@@ -688,6 +690,13 @@ static int mtk_nor_enable_clk(struct mtk_nor *sp)
return ret;
}
+ ret = clk_prepare_enable(sp->axi_clk);
+ if (ret) {
+ clk_disable_unprepare(sp->spi_clk);
+ clk_disable_unprepare(sp->ctlr_clk);
+ return ret;
+ }
+
return 0;
}
@@ -746,7 +755,7 @@ static int mtk_nor_probe(struct platform_device *pdev)
struct spi_controller *ctlr;
struct mtk_nor *sp;
void __iomem *base;
- struct clk *spi_clk, *ctlr_clk;
+ struct clk *spi_clk, *ctlr_clk, *axi_clk;
int ret, irq;
unsigned long dma_bits;
@@ -762,6 +771,10 @@ static int mtk_nor_probe(struct platform_device *pdev)
if (IS_ERR(ctlr_clk))
return PTR_ERR(ctlr_clk);
+ axi_clk = devm_clk_get_optional(>dev, "axi");
+ if (IS_ERR(axi_clk))
+ return PTR_ERR(axi_clk);
+
dma_bits = (unsigned long)of_device_get_match_data(>dev);
if (dma_set_mask_and_coherent(>dev, DMA_BIT_MASK(dma_bits))) {
dev_err(>dev, "failed to set dma mask(%lu)\n", dma_bits);
@@ -794,6 +807,7 @@ static int mtk_nor_probe(struct platform_device *pdev)
sp->dev = >dev;
sp->spi_clk = spi_clk;
sp->ctlr_clk = ctlr_clk;
+ sp->axi_clk = axi_clk;
sp->high_dma = (dma_bits > 32);
sp->buffer = dmam_alloc_coherent(>dev,
MTK_NOR_BOUNCE_BUF_SIZE + MTK_NOR_DMA_ALIGN,
--
1.9.1
[PATCH v1] add axi clock control for MT8192 spi-nor
bayi cheng (1): spi: spi-mtk-nor: add axi clock control for MT8192 spi-nor drivers/spi/spi-mtk-nor.c | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) -- 1.9.1
Re: [PATCH for-4.4 1/2] mtd: spi-nor: fix Spansion regressions (aliased with Winbond)
On Wed, 2016-01-06 at 01:03 +0100, Felix Fietkau wrote:
> On 2016-01-06 01:02, Brian Norris wrote:
> > On Mon, Jan 04, 2016 at 06:29:28PM -0800, Brian Norris wrote:
> >> On Tue, Dec 15, 2015 at 10:48:20AM -0800, Brian Norris wrote:
> >> > Spansion and Winbond have occasionally used the same manufacturer ID,
> >> > and they don't support the same features. Particularly, writing SR=0
> >> > seems to break read access for Spansion's s25fl064k. Unfortunately, we
> >> > don't currently have a way to differentiate these Spansion and Winbond
> >> > parts, so rather than regressing support for these Spansion flash, let's
> >> > drop the new Winbond lock/unlock support for now. We can try to address
> >> > Winbond support during the next release cycle.
> >> >
> >> > Original discussion:
> >> >
> >> > http://patchwork.ozlabs.org/patch/549173/
> >> > http://patchwork.ozlabs.org/patch/553683/
> >> >
> >> > Fixes: 357ca38d4751 ("mtd: spi-nor: support lock/unlock/is_locked for
> >> > Winbond")
> >> > Fixes: c6fc2171b249 ("mtd: spi-nor: disable protection for Winbond flash
> >> > at startup")
> >> > Signed-off-by: Brian Norris
> >> > Reported-by: Felix Fietkau
> >> > Cc: Felix Fietkau
> >>
> >> Felix,
> >>
> >> Can I get a Tested-by? I'm going to send this for 4.4 still, if
> >> possible.
> >
> > Despite the lack of response, pushed both to linux-mtd.git, as they are
> > obvious responses to the reported regressions/bugs.
> Sorry for the delay, I don't have time to test that at the moment. I'll
> try to find the time for it soon.
>
> - Felix
Hi Brain, Sorry for later reply, I have tested these patches. it works
ok on oak-rev4. Although it does not support WP operation for Winbond
nor flash.
Bayi
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH for-4.4 1/2] mtd: spi-nor: fix Spansion regressions (aliased with Winbond)
On Wed, 2016-01-06 at 01:03 +0100, Felix Fietkau wrote:
> On 2016-01-06 01:02, Brian Norris wrote:
> > On Mon, Jan 04, 2016 at 06:29:28PM -0800, Brian Norris wrote:
> >> On Tue, Dec 15, 2015 at 10:48:20AM -0800, Brian Norris wrote:
> >> > Spansion and Winbond have occasionally used the same manufacturer ID,
> >> > and they don't support the same features. Particularly, writing SR=0
> >> > seems to break read access for Spansion's s25fl064k. Unfortunately, we
> >> > don't currently have a way to differentiate these Spansion and Winbond
> >> > parts, so rather than regressing support for these Spansion flash, let's
> >> > drop the new Winbond lock/unlock support for now. We can try to address
> >> > Winbond support during the next release cycle.
> >> >
> >> > Original discussion:
> >> >
> >> > http://patchwork.ozlabs.org/patch/549173/
> >> > http://patchwork.ozlabs.org/patch/553683/
> >> >
> >> > Fixes: 357ca38d4751 ("mtd: spi-nor: support lock/unlock/is_locked for
> >> > Winbond")
> >> > Fixes: c6fc2171b249 ("mtd: spi-nor: disable protection for Winbond flash
> >> > at startup")
> >> > Signed-off-by: Brian Norris
> >> > Reported-by: Felix Fietkau
> >> > Cc: Felix Fietkau
> >>
> >> Felix,
> >>
> >> Can I get a Tested-by? I'm going to send this for 4.4 still, if
> >> possible.
> >
> > Despite the lack of response, pushed both to linux-mtd.git, as they are
> > obvious responses to the reported regressions/bugs.
> Sorry for the delay, I don't have time to test that at the moment. I'll
> try to find the time for it soon.
>
> - Felix
Hi Brain, Sorry for later reply, I have tested these patches. it works
ok on oak-rev4. Although it does not support WP operation for Winbond
nor flash.
Bayi
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[RESEND PATCH] mtd: mtk-nor: adjust sequence of trigger function and assignment function
Move write data register before excute command to avoid
missing first byte write to nor flash
Signed-off-by: Bayi Cheng
---
the previous patch didn't drop the Change-Id
---
drivers/mtd/spi-nor/mtk-quadspi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
b/drivers/mtd/spi-nor/mtk-quadspi.c
index dd269650..04da971 100644
--- a/drivers/mtd/spi-nor/mtk-quadspi.c
+++ b/drivers/mtd/spi-nor/mtk-quadspi.c
@@ -272,10 +272,10 @@ static int mt8173_nor_write_single_byte(struct mt8173_nor
*mt8173_nor,
mt8173_nor_set_addr(mt8173_nor, addr);
for (i = 0; i < length; i++) {
+ writeb(*data++, mt8173_nor->base + MTK_NOR_WDATA_REG);
ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PIO_WR_CMD);
if (ret < 0)
return ret;
- writeb(*data++, mt8173_nor->base + MTK_NOR_WDATA_REG);
}
return 0;
}
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH] mtd: mtk-nor: adjust sequence of trigger function and assignment function
move write data register before excute command to avoid
missing first byte write to nor flash
Change-Id: Ie9d7ae30f9de1f3e976d2e1de5d8ee28837598c8
Signed-off-by: Bayi Cheng
---
drivers/mtd/spi-nor/mtk-quadspi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
b/drivers/mtd/spi-nor/mtk-quadspi.c
index dd269650..04da971 100644
--- a/drivers/mtd/spi-nor/mtk-quadspi.c
+++ b/drivers/mtd/spi-nor/mtk-quadspi.c
@@ -272,10 +272,10 @@ static int mt8173_nor_write_single_byte(struct mt8173_nor
*mt8173_nor,
mt8173_nor_set_addr(mt8173_nor, addr);
for (i = 0; i < length; i++) {
+ writeb(*data++, mt8173_nor->base + MTK_NOR_WDATA_REG);
ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PIO_WR_CMD);
if (ret < 0)
return ret;
- writeb(*data++, mt8173_nor->base + MTK_NOR_WDATA_REG);
}
return 0;
}
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[RESEND PATCH] mtd: mtk-nor: adjust sequence of trigger function and assignment function
Move write data register before excute command to avoid
missing first byte write to nor flash
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
the previous patch didn't drop the Change-Id
---
drivers/mtd/spi-nor/mtk-quadspi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
b/drivers/mtd/spi-nor/mtk-quadspi.c
index dd269650..04da971 100644
--- a/drivers/mtd/spi-nor/mtk-quadspi.c
+++ b/drivers/mtd/spi-nor/mtk-quadspi.c
@@ -272,10 +272,10 @@ static int mt8173_nor_write_single_byte(struct mt8173_nor
*mt8173_nor,
mt8173_nor_set_addr(mt8173_nor, addr);
for (i = 0; i < length; i++) {
+ writeb(*data++, mt8173_nor->base + MTK_NOR_WDATA_REG);
ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PIO_WR_CMD);
if (ret < 0)
return ret;
- writeb(*data++, mt8173_nor->base + MTK_NOR_WDATA_REG);
}
return 0;
}
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH] mtd: mtk-nor: adjust sequence of trigger function and assignment function
move write data register before excute command to avoid
missing first byte write to nor flash
Change-Id: Ie9d7ae30f9de1f3e976d2e1de5d8ee28837598c8
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
drivers/mtd/spi-nor/mtk-quadspi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
b/drivers/mtd/spi-nor/mtk-quadspi.c
index dd269650..04da971 100644
--- a/drivers/mtd/spi-nor/mtk-quadspi.c
+++ b/drivers/mtd/spi-nor/mtk-quadspi.c
@@ -272,10 +272,10 @@ static int mt8173_nor_write_single_byte(struct mt8173_nor
*mt8173_nor,
mt8173_nor_set_addr(mt8173_nor, addr);
for (i = 0; i < length; i++) {
+ writeb(*data++, mt8173_nor->base + MTK_NOR_WDATA_REG);
ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PIO_WR_CMD);
if (ret < 0)
return ret;
- writeb(*data++, mt8173_nor->base + MTK_NOR_WDATA_REG);
}
return 0;
}
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] arm64: dts: mt8173: Add nor flash node
On Mon, 2015-12-07 at 12:34 +0800, bayi cheng wrote:
> On Mon, 2015-12-07 at 12:09 +0800, Daniel Kurtz wrote:
> > Bayi,
> >
> > On Mon, Dec 7, 2015 at 11:53 AM, Bayi Cheng wrote:
> > > Add Mediatek nor flash node
> > >
> > > Signed-off-by: Bayi Cheng
> > > Acked-by: Brian Norris
> > > ---
> > > Previous version of this patch is
> > > http://lists.infradead.org/pipermail/linux-arm-kernel/2015-November/386005.html
> > > Drop flash node from mt8173.dtsi accroding review comment
> >
> > Is there a flash on mt8173-evb that can be accessed by the nor_flash ?
> > If so, can you include flash@0 node in the mt8173-evb.dts.
> >
> > -Dan
> >
> Hi Daniel, Thanks for your comments! you are right, there is a flash on
> mt8173-evb which can be accessed by the nor_flash, and I will include
> flash@0 node in mt8173-evb.dts (kernel v3.18) too.
>
> Bayi
Hi Dan, I have reworked a EVB board for spi nor verify, we replaced the
spi nand flash with spi nor flash on EVB board,
and our shipping EVB board haven't support spi nor flash, So I will not
include flash@0 node in the mt8173-evb.dts. I am sorry to made you
confused!
Bayi
> > >
> > > ---
> > > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 11 +++
> > > 1 file changed, 11 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > > index 4dd5f93..af08e97 100644
> > > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > > @@ -387,6 +387,17 @@
> > > status = "disabled";
> > > };
> > >
> > > + nor_flash: spi@1100d000 {
> > > + compatible = "mediatek,mt8173-nor";
> > > + reg = <0 0x1100d000 0 0xe0>;
> > > + clocks = < CLK_PERI_SPI>,
> > > +< CLK_TOP_SPINFI_IFR_SEL>;
> > > + clock-names = "spi", "sf";
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + status = "disabled";
> > > + };
> > > +
> > > i2c3: i2c@1101 {
> > > compatible = "mediatek,mt8173-i2c";
> > > reg = <0 0x1101 0 0x70>,
> > > --
> > > 1.8.1.1.dirty
> > >
>
>
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] arm64: dts: mt8173: Add nor flash node
On Mon, 2015-12-07 at 12:09 +0800, Daniel Kurtz wrote:
> Bayi,
>
> On Mon, Dec 7, 2015 at 11:53 AM, Bayi Cheng wrote:
> > Add Mediatek nor flash node
> >
> > Signed-off-by: Bayi Cheng
> > Acked-by: Brian Norris
> > ---
> > Previous version of this patch is
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2015-November/386005.html
> > Drop flash node from mt8173.dtsi accroding review comment
>
> Is there a flash on mt8173-evb that can be accessed by the nor_flash ?
> If so, can you include flash@0 node in the mt8173-evb.dts.
>
> -Dan
>
Hi Daniel, Thanks for your comments! you are right, there is a flash on
mt8173-evb which can be accessed by the nor_flash, and I will include
flash@0 node in mt8173-evb.dts (kernel v3.18) too.
Bayi
> >
> > ---
> > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 11 +++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > index 4dd5f93..af08e97 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > @@ -387,6 +387,17 @@
> > status = "disabled";
> > };
> >
> > + nor_flash: spi@1100d000 {
> > + compatible = "mediatek,mt8173-nor";
> > + reg = <0 0x1100d000 0 0xe0>;
> > + clocks = < CLK_PERI_SPI>,
> > +< CLK_TOP_SPINFI_IFR_SEL>;
> > + clock-names = "spi", "sf";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + status = "disabled";
> > + };
> > +
> > i2c3: i2c@1101 {
> > compatible = "mediatek,mt8173-i2c";
> > reg = <0 0x1101 0 0x70>,
> > --
> > 1.8.1.1.dirty
> >
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng
Acked-by: Brian Norris
---
Previous version of this patch is
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-November/386005.html
Drop flash node from mt8173.dtsi accroding review comment
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 4dd5f93..af08e97 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -387,6 +387,17 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
i2c3: i2c@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
Acked-by: Brian Norris <computersforpe...@gmail.com>
---
Previous version of this patch is
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-November/386005.html
Drop flash node from mt8173.dtsi accroding review comment
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 4dd5f93..af08e97 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -387,6 +387,17 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
i2c3: i2c@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] arm64: dts: mt8173: Add nor flash node
On Mon, 2015-12-07 at 12:09 +0800, Daniel Kurtz wrote:
> Bayi,
>
> On Mon, Dec 7, 2015 at 11:53 AM, Bayi Cheng <bayi.ch...@mediatek.com> wrote:
> > Add Mediatek nor flash node
> >
> > Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
> > Acked-by: Brian Norris <computersforpe...@gmail.com>
> > ---
> > Previous version of this patch is
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2015-November/386005.html
> > Drop flash node from mt8173.dtsi accroding review comment
>
> Is there a flash on mt8173-evb that can be accessed by the nor_flash ?
> If so, can you include flash@0 node in the mt8173-evb.dts.
>
> -Dan
>
Hi Daniel, Thanks for your comments! you are right, there is a flash on
mt8173-evb which can be accessed by the nor_flash, and I will include
flash@0 node in mt8173-evb.dts (kernel v3.18) too.
Bayi
> >
> > ---
> > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 11 +++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > index 4dd5f93..af08e97 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > @@ -387,6 +387,17 @@
> > status = "disabled";
> > };
> >
> > + nor_flash: spi@1100d000 {
> > + compatible = "mediatek,mt8173-nor";
> > + reg = <0 0x1100d000 0 0xe0>;
> > + clocks = < CLK_PERI_SPI>,
> > +< CLK_TOP_SPINFI_IFR_SEL>;
> > + clock-names = "spi", "sf";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + status = "disabled";
> > + };
> > +
> > i2c3: i2c@1101 {
> > compatible = "mediatek,mt8173-i2c";
> > reg = <0 0x1101 0 0x70>,
> > --
> > 1.8.1.1.dirty
> >
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] arm64: dts: mt8173: Add nor flash node
On Mon, 2015-12-07 at 12:34 +0800, bayi cheng wrote:
> On Mon, 2015-12-07 at 12:09 +0800, Daniel Kurtz wrote:
> > Bayi,
> >
> > On Mon, Dec 7, 2015 at 11:53 AM, Bayi Cheng <bayi.ch...@mediatek.com> wrote:
> > > Add Mediatek nor flash node
> > >
> > > Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
> > > Acked-by: Brian Norris <computersforpe...@gmail.com>
> > > ---
> > > Previous version of this patch is
> > > http://lists.infradead.org/pipermail/linux-arm-kernel/2015-November/386005.html
> > > Drop flash node from mt8173.dtsi accroding review comment
> >
> > Is there a flash on mt8173-evb that can be accessed by the nor_flash ?
> > If so, can you include flash@0 node in the mt8173-evb.dts.
> >
> > -Dan
> >
> Hi Daniel, Thanks for your comments! you are right, there is a flash on
> mt8173-evb which can be accessed by the nor_flash, and I will include
> flash@0 node in mt8173-evb.dts (kernel v3.18) too.
>
> Bayi
Hi Dan, I have reworked a EVB board for spi nor verify, we replaced the
spi nand flash with spi nor flash on EVB board,
and our shipping EVB board haven't support spi nor flash, So I will not
include flash@0 node in the mt8173-evb.dts. I am sorry to made you
confused!
Bayi
> > >
> > > ---
> > > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 11 +++
> > > 1 file changed, 11 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > > index 4dd5f93..af08e97 100644
> > > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > > @@ -387,6 +387,17 @@
> > > status = "disabled";
> > > };
> > >
> > > + nor_flash: spi@1100d000 {
> > > + compatible = "mediatek,mt8173-nor";
> > > + reg = <0 0x1100d000 0 0xe0>;
> > > + clocks = < CLK_PERI_SPI>,
> > > +< CLK_TOP_SPINFI_IFR_SEL>;
> > > + clock-names = "spi", "sf";
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + status = "disabled";
> > > + };
> > > +
> > > i2c3: i2c@1101 {
> > > compatible = "mediatek,mt8173-i2c";
> > > reg = <0 0x1101 0 0x70>,
> > > --
> > > 1.8.1.1.dirty
> > >
>
>
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v8 2/2] arm64: dts: mt8173: Add nor flash node
On Thu, 2015-11-26 at 09:20 +0800, Daniel Kurtz wrote:
> Hi Bayi, Matthias,
>
> Sorry for the late review, one comment below...
>
> On Wed, Nov 18, 2015 at 11:30 AM, Bayi Cheng wrote:
> > Add Mediatek nor flash node
> >
> > Signed-off-by: Bayi Cheng
> > Acked-by: Brian Norris
> > ---
> > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 +-
> > 1 file changed, 17 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > index 4dd5f93..7988656 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > @@ -387,7 +387,23 @@
> > status = "disabled";
> > };
> >
> > - i2c3: i2c@1101 {
> > + nor_flash: spi@1100d000 {
> > + compatible = "mediatek,mt8173-nor";
> > + reg = <0 0x1100d000 0 0xe0>;
> > + clocks = < CLK_PERI_SPI>,
> > +< CLK_TOP_SPINFI_IFR_SEL>;
> > + clock-names = "spi", "sf";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + status = "disabled";
> > +
> > + flash@0 {
> > + compatible = "jedec,spi-nor";
> > + reg = <0>;
> > + };
>
> I think this flash@0 node represents the flash device present on the
> board and should therefore be moved to the board-specific .dts.
>
> -Dan
>
Hi Daniel, Thanks for your comments, and I will fixed it in the next
patch.
> > + };
> > +
> > + i2c3: i2c3@1101 {
> > compatible = "mediatek,mt8173-i2c";
> > reg = <0 0x1101 0 0x70>,
> > <0 0x11000280 0 0x80>;
> > --
> > 1.8.1.1.dirty
> >
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v8 2/2] arm64: dts: mt8173: Add nor flash node
On Thu, 2015-11-26 at 09:20 +0800, Daniel Kurtz wrote:
> Hi Bayi, Matthias,
>
> Sorry for the late review, one comment below...
>
> On Wed, Nov 18, 2015 at 11:30 AM, Bayi Cheng <bayi.ch...@mediatek.com> wrote:
> > Add Mediatek nor flash node
> >
> > Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
> > Acked-by: Brian Norris <computersforpe...@gmail.com>
> > ---
> > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 +-
> > 1 file changed, 17 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > index 4dd5f93..7988656 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > @@ -387,7 +387,23 @@
> > status = "disabled";
> > };
> >
> > - i2c3: i2c@1101 {
> > + nor_flash: spi@1100d000 {
> > + compatible = "mediatek,mt8173-nor";
> > + reg = <0 0x1100d000 0 0xe0>;
> > + clocks = < CLK_PERI_SPI>,
> > +< CLK_TOP_SPINFI_IFR_SEL>;
> > + clock-names = "spi", "sf";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + status = "disabled";
> > +
> > + flash@0 {
> > + compatible = "jedec,spi-nor";
> > + reg = <0>;
> > + };
>
> I think this flash@0 node represents the flash device present on the
> board and should therefore be moved to the board-specific .dts.
>
> -Dan
>
Hi Daniel, Thanks for your comments, and I will fixed it in the next
patch.
> > + };
> > +
> > + i2c3: i2c3@1101 {
> > compatible = "mediatek,mt8173-i2c";
> > reg = <0 0x1101 0 0x70>,
> > <0 0x11000280 0 0x80>;
> > --
> > 1.8.1.1.dirty
> >
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v8 1/2] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 486 ++ 3 files changed, 494 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 2fe2a7e..0dc9275 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Mediatek MT81xx SPI NOR flash controller" + help + This enables access to SPI NOR flash, using MT81xx SPI NOR flash + controller. This controller does not support generic SPI BUS, it only + supports SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..0bf3a7f8 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o +obj-$(CONFIG_MTD_MT81xx_NOR)+= mtk-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..7723ac7 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,486 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK_NOR_ENABLE_SF_CMD 0x30 +#define MTK_NOR_DUAD_ADDR_EN
[PATCH v8 2/2] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng
Acked-by: Brian Norris
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 4dd5f93..7988656 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -387,7 +387,23 @@
status = "disabled";
};
- i2c3: i2c@1101 {
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
+ i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
<0 0x11000280 0 0x80>;
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v8 0/2] Mediatek SPI-NOR flash driver
This series is based on v4.4-rc1 and l2-mtd.git [0] and erase_sector implementation patch [1] [0]: git://git.infradead.org/l2-mtd.git [1]: http://lists.infradead.org/pipermail/linux-mtd/2015-October//062959.html Change in v8: 1: rewrite the macro MTK_NOR_MAX_SHIFT from 6 to 7 2: add a new macro MTK_NOR_MAX_RX_TX_SHIFT for max len of TX Change in v7: 1: change PRGDATA3 to PRGDATA4 for quad mode 2: drop PRGDATA3 for signal read mode 3: drop unnecessary partition parser data 4: convert mtd_device_parse_register to mtd_device_register 5: disable clocks on failure Change in v6: 1: delete mt8173_nor_do_rx 2: delete mt8173_nor_do_rx 3: add mt8173_nor_do_tx_rx for general usage 4: support nor flash with 6 IDs 5: delete mt8173_nor_erase_sector and use "nor->erase_opcode" 6: add mt8173_nor_set_addr to programming the address register 7: initialize the ppdata in mtk_nor_init Change in v5: 1: add "status = "disable"" to device tree 2: add document "flash" node 3: fix some statement error in Kconfig file 4: fix alphabetical order error in makefile 5: delete the parament "mtd_info *mtd" in mt8173_nor structure 6: delete SPINOR_OP_WREN repeated calls 7: add mt8173_nor_do_tx & mt8173_nor_do_rx for them full potential 8: use a subnode to represent the flash Change in v4: 1: delete the parament "write_enable" for mt8173_nor_write_reg 2: fix the build warning for calling mt8173_nor_write_single_byte Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (2): mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 +- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c| 483 +++ 4 files changed, 508 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 0/2] Mediatek SPI-NOR flash driver
This series is based on v4.4-rc1 and l2-mtd.git [0] and erase_sector implementation patch [1] [0]: git://git.infradead.org/l2-mtd.git [1]: http://lists.infradead.org/pipermail/linux-mtd/2015-October//062959.html Change in v7: 1: change PRGDATA3 to PRGDATA4 for quad mode 2: drop PRGDATA3 for signal read mode 3: drop unnecessary partition parser data 4: convert mtd_device_parse_register to mtd_device_register 5: disable clocks on failure Change in v6: 1: delete mt8173_nor_do_rx 2: delete mt8173_nor_do_rx 3: add mt8173_nor_do_tx_rx for general usage 4: support nor flash with 6 IDs 5: delete mt8173_nor_erase_sector and use "nor->erase_opcode" 6: add mt8173_nor_set_addr to programming the address register 7: initialize the ppdata in mtk_nor_init Change in v5: 1: add "status = "disable"" to device tree 2: add document "flash" node 3: fix some statement error in Kconfig file 4: fix alphabetical order error in makefile 5: delete the parament "mtd_info *mtd" in mt8173_nor structure 6: delete SPINOR_OP_WREN repeated calls 7: add mt8173_nor_do_tx & mt8173_nor_do_rx for them full potential 8: use a subnode to represent the flash Change in v4: 1: delete the parament "write_enable" for mt8173_nor_write_reg 2: fix the build warning for calling mt8173_nor_write_single_byte Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (2): mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 +- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c| 483 +++ 4 files changed, 508 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 1/2] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 483 ++ 3 files changed, 491 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 2fe2a7e..0dc9275 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Mediatek MT81xx SPI NOR flash controller" + help + This enables access to SPI NOR flash, using MT81xx SPI NOR flash + controller. This controller does not support generic SPI BUS, it only + supports SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..0bf3a7f8 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o +obj-$(CONFIG_MTD_MT81xx_NOR)+= mtk-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..c12bb66 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,483 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK_NOR_ENABLE_SF_CMD 0x30 +#define MTK_NOR_DUAD_ADDR_EN
[PATCH v7 2/2] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng
Acked-by: Brian Norris
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 4dd5f93..7988656 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -387,7 +387,23 @@
status = "disabled";
};
- i2c3: i2c@1101 {
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
+ i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
<0 0x11000280 0 0x80>;
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v8 0/2] Mediatek SPI-NOR flash driver
This series is based on v4.4-rc1 and l2-mtd.git [0] and erase_sector implementation patch [1] [0]: git://git.infradead.org/l2-mtd.git [1]: http://lists.infradead.org/pipermail/linux-mtd/2015-October//062959.html Change in v8: 1: rewrite the macro MTK_NOR_MAX_SHIFT from 6 to 7 2: add a new macro MTK_NOR_MAX_RX_TX_SHIFT for max len of TX Change in v7: 1: change PRGDATA3 to PRGDATA4 for quad mode 2: drop PRGDATA3 for signal read mode 3: drop unnecessary partition parser data 4: convert mtd_device_parse_register to mtd_device_register 5: disable clocks on failure Change in v6: 1: delete mt8173_nor_do_rx 2: delete mt8173_nor_do_rx 3: add mt8173_nor_do_tx_rx for general usage 4: support nor flash with 6 IDs 5: delete mt8173_nor_erase_sector and use "nor->erase_opcode" 6: add mt8173_nor_set_addr to programming the address register 7: initialize the ppdata in mtk_nor_init Change in v5: 1: add "status = "disable"" to device tree 2: add document "flash" node 3: fix some statement error in Kconfig file 4: fix alphabetical order error in makefile 5: delete the parament "mtd_info *mtd" in mt8173_nor structure 6: delete SPINOR_OP_WREN repeated calls 7: add mt8173_nor_do_tx & mt8173_nor_do_rx for them full potential 8: use a subnode to represent the flash Change in v4: 1: delete the parament "write_enable" for mt8173_nor_write_reg 2: fix the build warning for calling mt8173_nor_write_single_byte Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (2): mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 +- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c| 483 +++ 4 files changed, 508 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v8 2/2] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
Acked-by: Brian Norris <computersforpe...@gmail.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 4dd5f93..7988656 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -387,7 +387,23 @@
status = "disabled";
};
- i2c3: i2c@1101 {
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
+ i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
<0 0x11000280 0 0x80>;
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v8 1/2] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com> --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 486 ++ 3 files changed, 494 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 2fe2a7e..0dc9275 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Mediatek MT81xx SPI NOR flash controller" + help + This enables access to SPI NOR flash, using MT81xx SPI NOR flash + controller. This controller does not support generic SPI BUS, it only + supports SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..0bf3a7f8 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o +obj-$(CONFIG_MTD_MT81xx_NOR)+= mtk-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..7723ac7 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,486 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng <bayi.ch...@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK
[PATCH v7 0/2] Mediatek SPI-NOR flash driver
This series is based on v4.4-rc1 and l2-mtd.git [0] and erase_sector implementation patch [1] [0]: git://git.infradead.org/l2-mtd.git [1]: http://lists.infradead.org/pipermail/linux-mtd/2015-October//062959.html Change in v7: 1: change PRGDATA3 to PRGDATA4 for quad mode 2: drop PRGDATA3 for signal read mode 3: drop unnecessary partition parser data 4: convert mtd_device_parse_register to mtd_device_register 5: disable clocks on failure Change in v6: 1: delete mt8173_nor_do_rx 2: delete mt8173_nor_do_rx 3: add mt8173_nor_do_tx_rx for general usage 4: support nor flash with 6 IDs 5: delete mt8173_nor_erase_sector and use "nor->erase_opcode" 6: add mt8173_nor_set_addr to programming the address register 7: initialize the ppdata in mtk_nor_init Change in v5: 1: add "status = "disable"" to device tree 2: add document "flash" node 3: fix some statement error in Kconfig file 4: fix alphabetical order error in makefile 5: delete the parament "mtd_info *mtd" in mt8173_nor structure 6: delete SPINOR_OP_WREN repeated calls 7: add mt8173_nor_do_tx & mt8173_nor_do_rx for them full potential 8: use a subnode to represent the flash Change in v4: 1: delete the parament "write_enable" for mt8173_nor_write_reg 2: fix the build warning for calling mt8173_nor_write_single_byte Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (2): mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 +- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c| 483 +++ 4 files changed, 508 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 1/2] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com> --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 483 ++ 3 files changed, 491 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 2fe2a7e..0dc9275 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Mediatek MT81xx SPI NOR flash controller" + help + This enables access to SPI NOR flash, using MT81xx SPI NOR flash + controller. This controller does not support generic SPI BUS, it only + supports SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..0bf3a7f8 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o +obj-$(CONFIG_MTD_MT81xx_NOR)+= mtk-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..c12bb66 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,483 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng <bayi.ch...@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK
[PATCH v7 2/2] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
Acked-by: Brian Norris <computersforpe...@gmail.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 4dd5f93..7988656 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -387,7 +387,23 @@
status = "disabled";
};
- i2c3: i2c@1101 {
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
+ i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
<0 0x11000280 0 0x80>;
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v6 2/3] mtd: mtk-nor: mtk serial flash controller driver
On Wed, 2015-11-11 at 13:41 -0800, Brian Norris wrote:
> One more small comment, since you're respinning this:
>
> On Fri, Nov 06, 2015 at 11:48:08PM +0800, Bayi Cheng wrote:
> > diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
> > b/drivers/mtd/spi-nor/mtk-quadspi.c
> > new file mode 100644
> > index 000..6582811
> > --- /dev/null
> > +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
> > @@ -0,0 +1,475 @@
>
> ...
>
> > +static int mtk_nor_drv_probe(struct platform_device *pdev)
> > +{
> > + struct device_node *flash_np;
> > + struct resource *res;
> > + int ret;
> > + struct mt8173_nor *mt8173_nor;
> > +
> > + if (!pdev->dev.of_node) {
> > + dev_err(>dev, "No DT found\n");
> > + return -EINVAL;
> > + }
> > +
> > + mt8173_nor = devm_kzalloc(>dev, sizeof(*mt8173_nor), GFP_KERNEL);
> > + if (!mt8173_nor)
> > + return -ENOMEM;
> > + platform_set_drvdata(pdev, mt8173_nor);
> > +
> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + mt8173_nor->base = devm_ioremap_resource(>dev, res);
> > + if (IS_ERR(mt8173_nor->base))
> > + return PTR_ERR(mt8173_nor->base);
> > +
> > + mt8173_nor->spi_clk = devm_clk_get(>dev, "spi");
> > + if (IS_ERR(mt8173_nor->spi_clk)) {
> > + ret = PTR_ERR(mt8173_nor->spi_clk);
> > + goto nor_free;
> > + }
> > +
> > + mt8173_nor->nor_clk = devm_clk_get(>dev, "sf");
> > + if (IS_ERR(mt8173_nor->nor_clk)) {
> > + ret = PTR_ERR(mt8173_nor->nor_clk);
> > + goto nor_free;
> > + }
> > +
> > + mt8173_nor->dev = >dev;
> > + clk_prepare_enable(mt8173_nor->spi_clk);
> > + clk_prepare_enable(mt8173_nor->nor_clk);
>
> You enable the clocks here, but...
>
> > +
> > + /* only support one attached flash */
> > + flash_np = of_get_next_available_child(pdev->dev.of_node, NULL);
> > + if (!flash_np) {
>
> ... you might bail out here if there is no available flash node, and you
> never disable the clocks. (Same is true if we fail to detect the flash;
> you leave the no-longer-needed clocks enabled.) Seems like maybe you
> should disable clocks on failure.
Yes, I have forgot to disable these clocks on failure. and I will fix it
in the next patch! Thanks!
>
> > + dev_err(>dev, "no SPI flash device to configure\n");
> > + ret = -ENODEV;
> > + goto nor_free;
> > + }
> > + ret = mtk_nor_init(mt8173_nor, flash_np);
> > +
> > +nor_free:
> > + return ret;
> > +}
>
> Brian
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v6 1/3] doc: dt: add documentation for Mediatek spi-nor controller
On Wed, 2015-11-11 at 12:38 -0800, Brian Norris wrote:
> On Fri, Nov 06, 2015 at 11:48:07PM +0800, Bayi Cheng wrote:
> > Add device tree binding documentation for serial flash with
> > Mediatek serial flash controller
> >
> > Signed-off-by: Bayi Cheng
> > ---
>
> Applied to l2-mtd.git/next (for 4.5). This will show up in
> linux-next.git after the merge window.
>
> Also squashed in a small diff (below), to fix up some language issues
> and to refer the reader to the jedec,spi-nor.txt document.
>
OK, I will fix it in next patch!
> > .../devicetree/bindings/mtd/mtk-quadspi.txt| 41
> > ++
> > 1 file changed, 41 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> >
> > diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> > b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> > new file mode 100644
> > index 000..866b492
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> > @@ -0,0 +1,41 @@
> > +* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
>
> The DT binding document shouldn't be talking about software (i.e.,
> shouldn't be talking about "drivers").
>
OK, I will fix it.
> > +
> > +Required properties:
> > +- compatible:should be "mediatek,mt8173-nor";
> > +- reg: physical base address and length of the controller's
> > register
> > +- clocks:the phandle of the clock needed by the nor controller
> > +- clock-names: the name of the clocks
> > + the clocks needed "spi" and "sf". "spi" is used for spi bus,
> > + and "sf" is used for controller, these are the clocks witch
> > + hardware needs to enabling nor flash and nor flash controller.
> > + See
> > Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> > +- #address-cells: should be <1>
> > +- #size-cells: should be <0>
> > +
> > +The SPI Flash must be a child of the nor_flash node and must have a
> > +compatible property.
> > +
> > +Required properties:
> > +- compatible:May include a device-specific string consisting of
> > the manufacturer
> > + and name of the chip. Must also include "jedec,spi-nor" for
> > any
> > + SPI NOR flash that can be identified by the JEDEC READ ID
> > opcode (0x9F).
> > +- reg : Chip-Select number
> > +
> > +Example:
> > +
> > +nor_flash: spi@1100d000 {
> > + compatible = "mediatek,mt8173-nor";
> > + reg = <0 0x1100d000 0 0xe0>;
> > + clocks = < CLK_PERI_SPI>,
> > +< CLK_TOP_SPINFI_IFR_SEL>;
> > + clock-names = "spi", "sf";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + status = "disabled";
> > +
> > + flash@0 {
> > + compatible = "jedec,spi-nor";
> > + reg = <0>;
> > + };
> > +};
> > +
>
> diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> index 866b492c38d2..fb314f09861b 100644
> --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> @@ -1,19 +1,19 @@
> -* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
> +* Serial NOR flash controller for MTK MT81xx (and similar)
>
> Required properties:
> - compatible: should be "mediatek,mt8173-nor";
> - reg: physical base address and length of the controller's
> register
> -- clocks: the phandle of the clock needed by the nor controller
> -- clock-names: the name of the clocks
> - the clocks needed "spi" and "sf". "spi" is used for spi bus,
> +- clocks: the phandle of the clocks needed by the nor controller
> +- clock-names: the names of the clocks
> + the clocks should be named "spi" and "sf". "spi" is used for
> spi bus,
> and "sf" is used for controller, these are the clocks witch
> hardware needs to enabling nor flash and nor flash controller.
> See
> Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> - #address-cells: should be <1>
> - #size-cells: should be <0>
>
> -The SPI Flash must be a child of the nor_flash node and must have a
> -compatible property.
> +The SPI flash must be a child of the nor_flash node and must have a
> +compatible property. Also see jedec,spi-nor.txt.
>
> Required properties:
> - compatible: May include a device-specific string consisting of
> the manufacturer
Thanks for your instruction! and I will fix it in the next patch!
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v6 0/3] Mediatek SPI-NOR flash driver
On Wed, 2015-11-11 at 12:26 -0800, Brian Norris wrote:
> On Wed, Nov 11, 2015 at 10:04:14PM +0800, Bayi Cheng wrote:
> > On Mon, 2015-11-09 at 18:46 -0800, Brian Norris wrote:
> > > I believe you didn't completely answer all my questions from v5 though.
> > > I'll repeat a bit here. Particularly, refer to [1].
> > > I'll summarize; I understand that your common transmit/receive operation
> > > works something like this:
> > >
> > > Quoting from [1]:
> > > > (1) total number of bits to send/receive goes in the COUNT register (so
> > > > far, as many as 7*8=56?)
> > > > (2) opcode is written to PRGDATA5
> > > > (3) other "transmit" data (like addresses), if any, are placed on
> > > > PRGDATA4..0
> > > > (4) command is sent (execute_cmd())
> > > > (5) data is read back in SHREG{X..0}, if needed
> > >
> > > My questions were:
> > >
> > > (a) Why does mt8173_nor_set_read_mode() use PRGDATA3? That's not
> > > mentioned in the SoC manual, and it doesn't really match any of the
> > > steps above. Perhaps it's just a quirk of the controller's
> > > programming model?
> > >
> > yes, for this question, I have done some testes, If I change the
> > PRGDATA3 to PRGDATA5 for mt8173_nor_set_read_mode() like others
> > functions, then the controller will be hanged, and I have asked our
> > designer for double confirm.
>
> I wasn't suggesting to change this to PRGDATA5. I just was wondering why
> the difference. It's not documented. (I suppose an acceptable answer is
> just "because that's how the HW works.")
>
I have synced with our designer, and just as you said, that's how the HW
works, and the read operation is different is different from other
operation. By the way, I have double confirm our driver code, and I have
made a mistake for quad read operation, the quad command need use
PRGDATA4 Instead PRGDATA3.
PS: write PRGDATA4 0xEB(4bit I/O read mode) or 0x6B(4 bit output mode),
So I will modify mt8173_nor_set_read_mode function in next patch.
> > > (b) How do you determine X from step (5)?
> > >
> > > Right now, your code seems to answer that X is "rxlen - 1". Correct?
> > >
> > yes, I have used "rxlen -1", because the first of nor flash output is
> > located at SHREG[0], in the other words, the output data starts at
> > SHREG[0] and go up to SHREG[relen -1]
>
> But, we aren't reading from SHREG[0] first; we're reading backwards from
> SHREG[rxlen - 1] down to SHREG[0]. It seems that's correct, right?
Yes, You are right!
>
> > > If that's correct and if I put all of my understanding together
> > > correctly, this means that you can actually shift out (in PRGDATA) up to
> > > 6 bytes (that is, 1 opcode and 5 tx bytes) and shift in (in SHREG) up to
> > > 7 bytes, except that the first byte is received during the opcode cycle,
> > > and so it is discarded, and we effectively receive only 6 bytes.
> > >
> > > Is that all correct? If so, then I think you still need to adjust the
> > > boundary conditions in your do_tx_rx() function. (I'll comment on the
> > > driver to point out the specifics.)
> >
> > Yes, you are right! and I will adjust the boundary conditions in
> > do_tx_rx() function.
>
> OK, good. BTW, can you make sure to rewrite the appropriate MAX macro(s)
> to reflect the right values? It seems like maybe you'll want separate
> macros for the maximum TX and RX -- and total (?), or is this just the
> same as RX? -- since they seem to have different limits.
>
OK, I will use two MAX macros, one is for TX, and the other is for
the total.
> > By the way, could you tell me whether I need to publish a new patch? or
> > you can fix them up directly?
>
> I think there are a few more adjustments to make, so please just post a
> new version of the driver only. The DT binding and DTS changes look good
> to go now.
Yes, I will publish a new patch next week, and Thanks again for your
grate help and support!
>
> Regards,
> Brian
>
> > > [1]
> > > http://lists.infradead.org/pipermail/linux-mtd/2015-October/062951.html
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v6 0/3] Mediatek SPI-NOR flash driver
On Wed, 2015-11-11 at 12:26 -0800, Brian Norris wrote:
> On Wed, Nov 11, 2015 at 10:04:14PM +0800, Bayi Cheng wrote:
> > On Mon, 2015-11-09 at 18:46 -0800, Brian Norris wrote:
> > > I believe you didn't completely answer all my questions from v5 though.
> > > I'll repeat a bit here. Particularly, refer to [1].
> > > I'll summarize; I understand that your common transmit/receive operation
> > > works something like this:
> > >
> > > Quoting from [1]:
> > > > (1) total number of bits to send/receive goes in the COUNT register (so
> > > > far, as many as 7*8=56?)
> > > > (2) opcode is written to PRGDATA5
> > > > (3) other "transmit" data (like addresses), if any, are placed on
> > > > PRGDATA4..0
> > > > (4) command is sent (execute_cmd())
> > > > (5) data is read back in SHREG{X..0}, if needed
> > >
> > > My questions were:
> > >
> > > (a) Why does mt8173_nor_set_read_mode() use PRGDATA3? That's not
> > > mentioned in the SoC manual, and it doesn't really match any of the
> > > steps above. Perhaps it's just a quirk of the controller's
> > > programming model?
> > >
> > yes, for this question, I have done some testes, If I change the
> > PRGDATA3 to PRGDATA5 for mt8173_nor_set_read_mode() like others
> > functions, then the controller will be hanged, and I have asked our
> > designer for double confirm.
>
> I wasn't suggesting to change this to PRGDATA5. I just was wondering why
> the difference. It's not documented. (I suppose an acceptable answer is
> just "because that's how the HW works.")
>
I have synced with our designer, and just as you said, that's how the HW
works, and the read operation is different is different from other
operation. By the way, I have double confirm our driver code, and I have
made a mistake for quad read operation, the quad command need use
PRGDATA4 Instead PRGDATA3.
PS: write PRGDATA4 0xEB(4bit I/O read mode) or 0x6B(4 bit output mode),
So I will modify mt8173_nor_set_read_mode function in next patch.
> > > (b) How do you determine X from step (5)?
> > >
> > > Right now, your code seems to answer that X is "rxlen - 1". Correct?
> > >
> > yes, I have used "rxlen -1", because the first of nor flash output is
> > located at SHREG[0], in the other words, the output data starts at
> > SHREG[0] and go up to SHREG[relen -1]
>
> But, we aren't reading from SHREG[0] first; we're reading backwards from
> SHREG[rxlen - 1] down to SHREG[0]. It seems that's correct, right?
Yes, You are right!
>
> > > If that's correct and if I put all of my understanding together
> > > correctly, this means that you can actually shift out (in PRGDATA) up to
> > > 6 bytes (that is, 1 opcode and 5 tx bytes) and shift in (in SHREG) up to
> > > 7 bytes, except that the first byte is received during the opcode cycle,
> > > and so it is discarded, and we effectively receive only 6 bytes.
> > >
> > > Is that all correct? If so, then I think you still need to adjust the
> > > boundary conditions in your do_tx_rx() function. (I'll comment on the
> > > driver to point out the specifics.)
> >
> > Yes, you are right! and I will adjust the boundary conditions in
> > do_tx_rx() function.
>
> OK, good. BTW, can you make sure to rewrite the appropriate MAX macro(s)
> to reflect the right values? It seems like maybe you'll want separate
> macros for the maximum TX and RX -- and total (?), or is this just the
> same as RX? -- since they seem to have different limits.
>
OK, I will use two MAX macros, one is for TX, and the other is for
the total.
> > By the way, could you tell me whether I need to publish a new patch? or
> > you can fix them up directly?
>
> I think there are a few more adjustments to make, so please just post a
> new version of the driver only. The DT binding and DTS changes look good
> to go now.
Yes, I will publish a new patch next week, and Thanks again for your
grate help and support!
>
> Regards,
> Brian
>
> > > [1]
> > > http://lists.infradead.org/pipermail/linux-mtd/2015-October/062951.html
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v6 1/3] doc: dt: add documentation for Mediatek spi-nor controller
On Wed, 2015-11-11 at 12:38 -0800, Brian Norris wrote:
> On Fri, Nov 06, 2015 at 11:48:07PM +0800, Bayi Cheng wrote:
> > Add device tree binding documentation for serial flash with
> > Mediatek serial flash controller
> >
> > Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
> > ---
>
> Applied to l2-mtd.git/next (for 4.5). This will show up in
> linux-next.git after the merge window.
>
> Also squashed in a small diff (below), to fix up some language issues
> and to refer the reader to the jedec,spi-nor.txt document.
>
OK, I will fix it in next patch!
> > .../devicetree/bindings/mtd/mtk-quadspi.txt| 41
> > ++
> > 1 file changed, 41 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> >
> > diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> > b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> > new file mode 100644
> > index 000..866b492
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> > @@ -0,0 +1,41 @@
> > +* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
>
> The DT binding document shouldn't be talking about software (i.e.,
> shouldn't be talking about "drivers").
>
OK, I will fix it.
> > +
> > +Required properties:
> > +- compatible:should be "mediatek,mt8173-nor";
> > +- reg: physical base address and length of the controller's
> > register
> > +- clocks:the phandle of the clock needed by the nor controller
> > +- clock-names: the name of the clocks
> > + the clocks needed "spi" and "sf". "spi" is used for spi bus,
> > + and "sf" is used for controller, these are the clocks witch
> > + hardware needs to enabling nor flash and nor flash controller.
> > + See
> > Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> > +- #address-cells: should be <1>
> > +- #size-cells: should be <0>
> > +
> > +The SPI Flash must be a child of the nor_flash node and must have a
> > +compatible property.
> > +
> > +Required properties:
> > +- compatible:May include a device-specific string consisting of
> > the manufacturer
> > + and name of the chip. Must also include "jedec,spi-nor" for
> > any
> > + SPI NOR flash that can be identified by the JEDEC READ ID
> > opcode (0x9F).
> > +- reg : Chip-Select number
> > +
> > +Example:
> > +
> > +nor_flash: spi@1100d000 {
> > + compatible = "mediatek,mt8173-nor";
> > + reg = <0 0x1100d000 0 0xe0>;
> > + clocks = < CLK_PERI_SPI>,
> > +< CLK_TOP_SPINFI_IFR_SEL>;
> > + clock-names = "spi", "sf";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + status = "disabled";
> > +
> > + flash@0 {
> > + compatible = "jedec,spi-nor";
> > + reg = <0>;
> > + };
> > +};
> > +
>
> diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> index 866b492c38d2..fb314f09861b 100644
> --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
> @@ -1,19 +1,19 @@
> -* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
> +* Serial NOR flash controller for MTK MT81xx (and similar)
>
> Required properties:
> - compatible: should be "mediatek,mt8173-nor";
> - reg: physical base address and length of the controller's
> register
> -- clocks: the phandle of the clock needed by the nor controller
> -- clock-names: the name of the clocks
> - the clocks needed "spi" and "sf". "spi" is used for spi bus,
> +- clocks: the phandle of the clocks needed by the nor controller
> +- clock-names: the names of the clocks
> + the clocks should be named "spi" and "sf". "spi" is used for
> spi bus,
> and "sf" is used for controller, these are the clocks witch
> hardware needs to enabling nor flash and nor flash controller.
> See
> Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> - #address-cells: should be <1>
> - #size-cells: should be <0>
>
> -The SPI Flash must be a child of the nor_flash node and must have a
> -compatible property.
> +The SPI flash must be a child of the nor_flash node and must have a
> +compatible property. Also see jedec,spi-nor.txt.
>
> Required properties:
> - compatible: May include a device-specific string consisting of
> the manufacturer
Thanks for your instruction! and I will fix it in the next patch!
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v6 2/3] mtd: mtk-nor: mtk serial flash controller driver
On Wed, 2015-11-11 at 13:41 -0800, Brian Norris wrote:
> One more small comment, since you're respinning this:
>
> On Fri, Nov 06, 2015 at 11:48:08PM +0800, Bayi Cheng wrote:
> > diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
> > b/drivers/mtd/spi-nor/mtk-quadspi.c
> > new file mode 100644
> > index 000..6582811
> > --- /dev/null
> > +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
> > @@ -0,0 +1,475 @@
>
> ...
>
> > +static int mtk_nor_drv_probe(struct platform_device *pdev)
> > +{
> > + struct device_node *flash_np;
> > + struct resource *res;
> > + int ret;
> > + struct mt8173_nor *mt8173_nor;
> > +
> > + if (!pdev->dev.of_node) {
> > + dev_err(>dev, "No DT found\n");
> > + return -EINVAL;
> > + }
> > +
> > + mt8173_nor = devm_kzalloc(>dev, sizeof(*mt8173_nor), GFP_KERNEL);
> > + if (!mt8173_nor)
> > + return -ENOMEM;
> > + platform_set_drvdata(pdev, mt8173_nor);
> > +
> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + mt8173_nor->base = devm_ioremap_resource(>dev, res);
> > + if (IS_ERR(mt8173_nor->base))
> > + return PTR_ERR(mt8173_nor->base);
> > +
> > + mt8173_nor->spi_clk = devm_clk_get(>dev, "spi");
> > + if (IS_ERR(mt8173_nor->spi_clk)) {
> > + ret = PTR_ERR(mt8173_nor->spi_clk);
> > + goto nor_free;
> > + }
> > +
> > + mt8173_nor->nor_clk = devm_clk_get(>dev, "sf");
> > + if (IS_ERR(mt8173_nor->nor_clk)) {
> > + ret = PTR_ERR(mt8173_nor->nor_clk);
> > + goto nor_free;
> > + }
> > +
> > + mt8173_nor->dev = >dev;
> > + clk_prepare_enable(mt8173_nor->spi_clk);
> > + clk_prepare_enable(mt8173_nor->nor_clk);
>
> You enable the clocks here, but...
>
> > +
> > + /* only support one attached flash */
> > + flash_np = of_get_next_available_child(pdev->dev.of_node, NULL);
> > + if (!flash_np) {
>
> ... you might bail out here if there is no available flash node, and you
> never disable the clocks. (Same is true if we fail to detect the flash;
> you leave the no-longer-needed clocks enabled.) Seems like maybe you
> should disable clocks on failure.
Yes, I have forgot to disable these clocks on failure. and I will fix it
in the next patch! Thanks!
>
> > + dev_err(>dev, "no SPI flash device to configure\n");
> > + ret = -ENODEV;
> > + goto nor_free;
> > + }
> > + ret = mtk_nor_init(mt8173_nor, flash_np);
> > +
> > +nor_free:
> > + return ret;
> > +}
>
> Brian
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v6 0/3] Mediatek SPI-NOR flash driver
On Mon, 2015-11-09 at 18:46 -0800, Brian Norris wrote:
> Hi Bayi,
>
> On Fri, Nov 06, 2015 at 11:48:06PM +0800, Bayi Cheng wrote:
> > This series is based on v4.3-rc1 and l2-mtd.git [0] and erase_sector
> > implementation patch [1]
> >
> > [0]: git://git.infradead.org/l2-mtd.git
> > [1]:
> > http://lists.infradead.org/pipermail/linux-mtd/2015-October//062959.html
> >
> > Change in v6:
> > 1: delete mt8173_nor_do_rx
> > 2: delete mt8173_nor_do_rx
> > 3: add mt8173_nor_do_tx_rx for general usage
> > 4: support nor flash with 6 IDs
> > 5: delete mt8173_nor_erase_sector and use "nor->erase_opcode"
> > 6: add mt8173_nor_set_addr to programming the address register
> > 7: initialize the ppdata in mtk_nor_init
>
> This series is looking a lot better to me. Thanks for incorporating (and
> I hope fully reviewing and testing!) my suggested changes. I have a just
> a few small comments that I might post to the driver patch, and if
> that's all that's outstanding, I can fix them up myself before applying.
>
> I believe you didn't completely answer all my questions from v5 though.
> I'll repeat a bit here. Particularly, refer to [1].
> I'll summarize; I understand that your common transmit/receive operation
> works something like this:
>
> Quoting from [1]:
> > (1) total number of bits to send/receive goes in the COUNT register (so
> > far, as many as 7*8=56?)
> > (2) opcode is written to PRGDATA5
> > (3) other "transmit" data (like addresses), if any, are placed on
> > PRGDATA4..0
> > (4) command is sent (execute_cmd())
> > (5) data is read back in SHREG{X..0}, if needed
>
> My questions were:
>
> (a) Why does mt8173_nor_set_read_mode() use PRGDATA3? That's not
> mentioned in the SoC manual, and it doesn't really match any of the
> steps above. Perhaps it's just a quirk of the controller's
> programming model?
>
yes, for this question, I have done some testes, If I change the
PRGDATA3 to PRGDATA5 for mt8173_nor_set_read_mode() like others
functions, then the controller will be hanged, and I have asked our
designer for double confirm.
> (b) How do you determine X from step (5)?
>
> Right now, your code seems to answer that X is "rxlen - 1". Correct?
>
yes, I have used "rxlen -1", because the first of nor flash output is
located at SHREG[0], in the other words, the output data starts at
SHREG[0] and go up to SHREG[relen -1]
> If that's correct and if I put all of my understanding together
> correctly, this means that you can actually shift out (in PRGDATA) up to
> 6 bytes (that is, 1 opcode and 5 tx bytes) and shift in (in SHREG) up to
> 7 bytes, except that the first byte is received during the opcode cycle,
> and so it is discarded, and we effectively receive only 6 bytes.
>
> Is that all correct? If so, then I think you still need to adjust the
> boundary conditions in your do_tx_rx() function. (I'll comment on the
> driver to point out the specifics.)
Yes, you are right! and I will adjust the boundary conditions in
do_tx_rx() function.
By the way, could you tell me whether I need to publish a new patch? or
you can fix them up directly?
>
> Regards,
> Brian
>
> [1] http://lists.infradead.org/pipermail/linux-mtd/2015-October/062951.html
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v6 2/3] mtd: mtk-nor: mtk serial flash controller driver
On Mon, 2015-11-09 at 19:01 -0800, Brian Norris wrote:
> Hi Bayi,
>
> A few small comments.
>
> On Fri, Nov 06, 2015 at 11:48:08PM +0800, Bayi Cheng wrote:
> > add spi nor flash driver for mediatek controller
> >
> > Signed-off-by: Bayi Cheng
> > ---
> > drivers/mtd/spi-nor/Kconfig | 7 +
> > drivers/mtd/spi-nor/Makefile | 1 +
> > drivers/mtd/spi-nor/mtk-quadspi.c | 475
> > ++
> > 3 files changed, 483 insertions(+)
> > create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c
>
>
> > diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
> > index e5e..0bf3a7f8 100644
> > --- a/drivers/mtd/spi-nor/Makefile
> > +++ b/drivers/mtd/spi-nor/Makefile
> > @@ -1,3 +1,4 @@
> > obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o
> > obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o
> > +obj-$(CONFIG_MTD_MT81xx_NOR)+= mtk-quadspi.o
> > obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o
> > diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
> > b/drivers/mtd/spi-nor/mtk-quadspi.c
> > new file mode 100644
> > index 000..6582811
> > --- /dev/null
> > +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
> > @@ -0,0 +1,475 @@
>
> ...
>
> > +/* Can shift up to 48 bits (6 bytes) of TX/RX */
> > +#define MTK_NOR_MAX_SHIFT 6
>
> ...
>
> > +static int mt8173_nor_do_tx_rx(struct mt8173_nor *mt8173_nor, u8 op,
> > + u8 *tx, int txlen, u8 *rx, int rxlen)
> > +{
> > + int len = 1 + txlen + rxlen;
> > + int i, ret, idx;
> > +
> > + if (len > MTK_NOR_MAX_SHIFT + 1)
> > + return -EINVAL;
>
> So I see you adjusted these bounds to add 1, which inspired one of my
> questions on the cover letter.
>
> Why do you allow len=7, which means you'd program 7*8 to the COUNT
> register, when the SoC manual says it has a max of 48? Is the manual
> wrong?
>
Hi Brian, you are right, the manual is wrong here, Actually, it has a
max of 56. when we want to read 6 IDs, we need transfer 1 byte command
and 6 bytes null address to nor flash, then we can read the six IDs from
SHREGx register.
> I notice you added the '+ 1' to your driver, so it allows:
>
> do_tx_rx( txlen = 0 , rxlen = 6) /* e.g., for READ ID */
>
> but that means your driver also allows:
>
> do_tx_rx( txlen = 6, rxlen = 0) /* ERROR: this will allow out of
> bounds write on PRGDATA
> register -1 */
>
> If I understand correctly, the following constraints are more correct:
>
> /* Can only transmit 1 opcode and 5 other bytes */
> if (1 + txlen > MTK_NOR_MAX_SHIFT)
> return -EINVAL;
>
> /* Can only receive 6 bytes after the opcode */
> if (rxlen > MTK_NOR_MAX_SHIFT)
> return -EINVAL;
>
> /* Can only handle XXX bytes total */
> /* How many bytes is the max for register MTK_NOR_CNT_REG ? */
> if (len > XXX)
> return -EINVAL;
>
yes, your constraints seems more correct, and I will adapt these lines
to next patch.
> > +
> > + writeb(len * 8, mt8173_nor->base + MTK_NOR_CNT_REG);
> > +
> > + /* start at PRGDATA5, go down to PRGDATA0 */
> > + idx = MTK_NOR_MAX_SHIFT - 1;
> > +
> > + /* opcode */
> > + writeb(op, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
> > + idx--;
> > +
> > + /* program TX data */
> > + for (i = 0; i < txlen; i++, idx--)
> > + writeb(tx[i], mt8173_nor->base + MTK_NOR_PRG_REG(idx));
> > +
> > + /* clear out rest of TX registers */
> > + while (idx >= 0) {
> > + writeb(0, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
> > + idx--;
> > + }
> > +
> > + ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PRG_CMD);
> > + if (ret)
> > + return ret;
> > +
> > + /* restart at first RX byte */
> > + idx = rxlen - 1;
> > +
> > + /* read out RX data */
> > + for (i = 0; i < rxlen; i++, idx--)
> > + rx[i] = readb(mt8173_nor->base + MTK_NOR_SHREG(idx));
> > +
> > + return 0;
> > +}
> > +
>
> ...
>
> > +static int __init mtk_nor_init(struct mt8173_nor *mt8173_nor,
> > + struct device_node *flash_node)
> > +{
> > + struct mtd_part_parser_data ppdata = {
> > + .of_node = flash_node,
> > + };
> > + int ret;
> > + struct spi_nor *no
Re: [PATCH v6 0/3] Mediatek SPI-NOR flash driver
On Mon, 2015-11-09 at 18:46 -0800, Brian Norris wrote:
> Hi Bayi,
>
> On Fri, Nov 06, 2015 at 11:48:06PM +0800, Bayi Cheng wrote:
> > This series is based on v4.3-rc1 and l2-mtd.git [0] and erase_sector
> > implementation patch [1]
> >
> > [0]: git://git.infradead.org/l2-mtd.git
> > [1]:
> > http://lists.infradead.org/pipermail/linux-mtd/2015-October//062959.html
> >
> > Change in v6:
> > 1: delete mt8173_nor_do_rx
> > 2: delete mt8173_nor_do_rx
> > 3: add mt8173_nor_do_tx_rx for general usage
> > 4: support nor flash with 6 IDs
> > 5: delete mt8173_nor_erase_sector and use "nor->erase_opcode"
> > 6: add mt8173_nor_set_addr to programming the address register
> > 7: initialize the ppdata in mtk_nor_init
>
> This series is looking a lot better to me. Thanks for incorporating (and
> I hope fully reviewing and testing!) my suggested changes. I have a just
> a few small comments that I might post to the driver patch, and if
> that's all that's outstanding, I can fix them up myself before applying.
>
> I believe you didn't completely answer all my questions from v5 though.
> I'll repeat a bit here. Particularly, refer to [1].
> I'll summarize; I understand that your common transmit/receive operation
> works something like this:
>
> Quoting from [1]:
> > (1) total number of bits to send/receive goes in the COUNT register (so
> > far, as many as 7*8=56?)
> > (2) opcode is written to PRGDATA5
> > (3) other "transmit" data (like addresses), if any, are placed on
> > PRGDATA4..0
> > (4) command is sent (execute_cmd())
> > (5) data is read back in SHREG{X..0}, if needed
>
> My questions were:
>
> (a) Why does mt8173_nor_set_read_mode() use PRGDATA3? That's not
> mentioned in the SoC manual, and it doesn't really match any of the
> steps above. Perhaps it's just a quirk of the controller's
> programming model?
>
yes, for this question, I have done some testes, If I change the
PRGDATA3 to PRGDATA5 for mt8173_nor_set_read_mode() like others
functions, then the controller will be hanged, and I have asked our
designer for double confirm.
> (b) How do you determine X from step (5)?
>
> Right now, your code seems to answer that X is "rxlen - 1". Correct?
>
yes, I have used "rxlen -1", because the first of nor flash output is
located at SHREG[0], in the other words, the output data starts at
SHREG[0] and go up to SHREG[relen -1]
> If that's correct and if I put all of my understanding together
> correctly, this means that you can actually shift out (in PRGDATA) up to
> 6 bytes (that is, 1 opcode and 5 tx bytes) and shift in (in SHREG) up to
> 7 bytes, except that the first byte is received during the opcode cycle,
> and so it is discarded, and we effectively receive only 6 bytes.
>
> Is that all correct? If so, then I think you still need to adjust the
> boundary conditions in your do_tx_rx() function. (I'll comment on the
> driver to point out the specifics.)
Yes, you are right! and I will adjust the boundary conditions in
do_tx_rx() function.
By the way, could you tell me whether I need to publish a new patch? or
you can fix them up directly?
>
> Regards,
> Brian
>
> [1] http://lists.infradead.org/pipermail/linux-mtd/2015-October/062951.html
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v6 2/3] mtd: mtk-nor: mtk serial flash controller driver
On Mon, 2015-11-09 at 19:01 -0800, Brian Norris wrote:
> Hi Bayi,
>
> A few small comments.
>
> On Fri, Nov 06, 2015 at 11:48:08PM +0800, Bayi Cheng wrote:
> > add spi nor flash driver for mediatek controller
> >
> > Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
> > ---
> > drivers/mtd/spi-nor/Kconfig | 7 +
> > drivers/mtd/spi-nor/Makefile | 1 +
> > drivers/mtd/spi-nor/mtk-quadspi.c | 475
> > ++
> > 3 files changed, 483 insertions(+)
> > create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c
>
>
> > diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
> > index e5e..0bf3a7f8 100644
> > --- a/drivers/mtd/spi-nor/Makefile
> > +++ b/drivers/mtd/spi-nor/Makefile
> > @@ -1,3 +1,4 @@
> > obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o
> > obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o
> > +obj-$(CONFIG_MTD_MT81xx_NOR)+= mtk-quadspi.o
> > obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o
> > diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
> > b/drivers/mtd/spi-nor/mtk-quadspi.c
> > new file mode 100644
> > index 000..6582811
> > --- /dev/null
> > +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
> > @@ -0,0 +1,475 @@
>
> ...
>
> > +/* Can shift up to 48 bits (6 bytes) of TX/RX */
> > +#define MTK_NOR_MAX_SHIFT 6
>
> ...
>
> > +static int mt8173_nor_do_tx_rx(struct mt8173_nor *mt8173_nor, u8 op,
> > + u8 *tx, int txlen, u8 *rx, int rxlen)
> > +{
> > + int len = 1 + txlen + rxlen;
> > + int i, ret, idx;
> > +
> > + if (len > MTK_NOR_MAX_SHIFT + 1)
> > + return -EINVAL;
>
> So I see you adjusted these bounds to add 1, which inspired one of my
> questions on the cover letter.
>
> Why do you allow len=7, which means you'd program 7*8 to the COUNT
> register, when the SoC manual says it has a max of 48? Is the manual
> wrong?
>
Hi Brian, you are right, the manual is wrong here, Actually, it has a
max of 56. when we want to read 6 IDs, we need transfer 1 byte command
and 6 bytes null address to nor flash, then we can read the six IDs from
SHREGx register.
> I notice you added the '+ 1' to your driver, so it allows:
>
> do_tx_rx( txlen = 0 , rxlen = 6) /* e.g., for READ ID */
>
> but that means your driver also allows:
>
> do_tx_rx( txlen = 6, rxlen = 0) /* ERROR: this will allow out of
> bounds write on PRGDATA
> register -1 */
>
> If I understand correctly, the following constraints are more correct:
>
> /* Can only transmit 1 opcode and 5 other bytes */
> if (1 + txlen > MTK_NOR_MAX_SHIFT)
> return -EINVAL;
>
> /* Can only receive 6 bytes after the opcode */
> if (rxlen > MTK_NOR_MAX_SHIFT)
> return -EINVAL;
>
> /* Can only handle XXX bytes total */
> /* How many bytes is the max for register MTK_NOR_CNT_REG ? */
> if (len > XXX)
> return -EINVAL;
>
yes, your constraints seems more correct, and I will adapt these lines
to next patch.
> > +
> > + writeb(len * 8, mt8173_nor->base + MTK_NOR_CNT_REG);
> > +
> > + /* start at PRGDATA5, go down to PRGDATA0 */
> > + idx = MTK_NOR_MAX_SHIFT - 1;
> > +
> > + /* opcode */
> > + writeb(op, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
> > + idx--;
> > +
> > + /* program TX data */
> > + for (i = 0; i < txlen; i++, idx--)
> > + writeb(tx[i], mt8173_nor->base + MTK_NOR_PRG_REG(idx));
> > +
> > + /* clear out rest of TX registers */
> > + while (idx >= 0) {
> > + writeb(0, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
> > + idx--;
> > + }
> > +
> > + ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PRG_CMD);
> > + if (ret)
> > + return ret;
> > +
> > + /* restart at first RX byte */
> > + idx = rxlen - 1;
> > +
> > + /* read out RX data */
> > + for (i = 0; i < rxlen; i++, idx--)
> > + rx[i] = readb(mt8173_nor->base + MTK_NOR_SHREG(idx));
> > +
> > + return 0;
> > +}
> > +
>
> ...
>
> > +static int __init mtk_nor_init(struct mt8173_nor *mt8173_nor,
> > + struct device_node *flash_node)
> > +{
> > + struct mtd_part_parser_data ppdata = {
> > + .of_node = flash_node,
> > + };
> > + int ret;
>
[PATCH v6 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 475 ++ 3 files changed, 483 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..f544bbe 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Mediatek MT81xx SPI NOR flash controller" + help + This enables access to SPI NOR flash, using MT81xx SPI NOR flash + controller. This controller does not support generic SPI BUS, it only + supports SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..0bf3a7f8 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o +obj-$(CONFIG_MTD_MT81xx_NOR)+= mtk-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..6582811 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,475 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK_NOR_ENABLE_SF_CMD 0x30 +#define MTK_NOR_DUAD_ADDR_EN
[PATCH v6 0/3] Mediatek SPI-NOR flash driver
This series is based on v4.3-rc1 and l2-mtd.git [0] and erase_sector implementation patch [1] [0]: git://git.infradead.org/l2-mtd.git [1]: http://lists.infradead.org/pipermail/linux-mtd/2015-October//062959.html Change in v6: 1: delete mt8173_nor_do_rx 2: delete mt8173_nor_do_rx 3: add mt8173_nor_do_tx_rx for general usage 4: support nor flash with 6 IDs 5: delete mt8173_nor_erase_sector and use "nor->erase_opcode" 6: add mt8173_nor_set_addr to programming the address register 7: initialize the ppdata in mtk_nor_init Change in v5: 1: add "status = "disable"" to device tree 2: add document "flash" node 3: fix some statement error in Kconfig file 4: fix alphabetical order error in makefile 5: delete the parament "mtd_info *mtd" in mt8173_nor structure 6: delete SPINOR_OP_WREN repeated calls 7: add mt8173_nor_do_tx & mt8173_nor_do_rx for them full potential 8: use a subnode to represent the flash Change in v4: 1: delete the parament "write_enable" for mt8173_nor_write_reg 2: fix the build warning for calling mt8173_nor_write_single_byte Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 41 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16 + drivers/mtd/spi-nor/Kconfig| 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 475 + 5 files changed, 540 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng
---
.../devicetree/bindings/mtd/mtk-quadspi.txt| 41 ++
1 file changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
new file mode 100644
index 000..866b492
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
@@ -0,0 +1,41 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible:should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's
register
+- clocks:the phandle of the clock needed by the nor controller
+- clock-names: the name of the clocks
+ the clocks needed "spi" and "sf". "spi" is used for spi bus,
+ and "sf" is used for controller, these are the clocks witch
+ hardware needs to enabling nor flash and nor flash controller.
+ See
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+The SPI Flash must be a child of the nor_flash node and must have a
+compatible property.
+
+Required properties:
+- compatible:May include a device-specific string consisting of the
manufacturer
+ and name of the chip. Must also include "jedec,spi-nor" for
any
+ SPI NOR flash that can be identified by the JEDEC READ ID
opcode (0x9F).
+- reg : Chip-Select number
+
+Example:
+
+nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..f5f08eb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,22 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..f5f08eb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,22 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
.../devicetree/bindings/mtd/mtk-quadspi.txt| 41 ++
1 file changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
new file mode 100644
index 000..866b492
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
@@ -0,0 +1,41 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible:should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's
register
+- clocks:the phandle of the clock needed by the nor controller
+- clock-names: the name of the clocks
+ the clocks needed "spi" and "sf". "spi" is used for spi bus,
+ and "sf" is used for controller, these are the clocks witch
+ hardware needs to enabling nor flash and nor flash controller.
+ See
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+The SPI Flash must be a child of the nor_flash node and must have a
+compatible property.
+
+Required properties:
+- compatible:May include a device-specific string consisting of the
manufacturer
+ and name of the chip. Must also include "jedec,spi-nor" for
any
+ SPI NOR flash that can be identified by the JEDEC READ ID
opcode (0x9F).
+- reg : Chip-Select number
+
+Example:
+
+nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 0/3] Mediatek SPI-NOR flash driver
This series is based on v4.3-rc1 and l2-mtd.git [0] and erase_sector implementation patch [1] [0]: git://git.infradead.org/l2-mtd.git [1]: http://lists.infradead.org/pipermail/linux-mtd/2015-October//062959.html Change in v6: 1: delete mt8173_nor_do_rx 2: delete mt8173_nor_do_rx 3: add mt8173_nor_do_tx_rx for general usage 4: support nor flash with 6 IDs 5: delete mt8173_nor_erase_sector and use "nor->erase_opcode" 6: add mt8173_nor_set_addr to programming the address register 7: initialize the ppdata in mtk_nor_init Change in v5: 1: add "status = "disable"" to device tree 2: add document "flash" node 3: fix some statement error in Kconfig file 4: fix alphabetical order error in makefile 5: delete the parament "mtd_info *mtd" in mt8173_nor structure 6: delete SPINOR_OP_WREN repeated calls 7: add mt8173_nor_do_tx & mt8173_nor_do_rx for them full potential 8: use a subnode to represent the flash Change in v4: 1: delete the parament "write_enable" for mt8173_nor_write_reg 2: fix the build warning for calling mt8173_nor_write_single_byte Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 41 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16 + drivers/mtd/spi-nor/Kconfig| 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 475 + 5 files changed, 540 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com> --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 475 ++ 3 files changed, 483 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..f544bbe 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Mediatek MT81xx SPI NOR flash controller" + help + This enables access to SPI NOR flash, using MT81xx SPI NOR flash + controller. This controller does not support generic SPI BUS, it only + supports SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..0bf3a7f8 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o +obj-$(CONFIG_MTD_MT81xx_NOR)+= mtk-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..6582811 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,475 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng <bayi.ch...@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK
[PATCH v5 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 491 ++ 3 files changed, 499 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..387396d 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Mediatek MT81xx SPI NOR flash controller" + help + This enables access to SPI NOR flash, using MT81xx SPI NOR flash + controller. This controller does not support generic SPI BUS, It only + supports SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..0bf3a7f8 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o +obj-$(CONFIG_MTD_MT81xx_NOR)+= mtk-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..33a8dc5 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,491 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK_NOR_ENABLE_SF_CMD 0x30 +#define MTK_NOR_DUAD_A
[PATCH v5 0/3] Mediatek SPI-NOR flash driver
This series is based on v4.3-rc1 and l2-mtd.git (git://git.infradead.org/l2-mtd.git) Change in v5: 1: add "status = "disable"" to device tree 2: add document "flash" node 3: fix some statement error in Kconfig file 4: fix alphabetical order error in makefile 5: delete the parament "mtd_info *mtd" in mt8173_nor structure 6: delete SPINOR_OP_WREN repeated calls 7: add mt8173_nor_do_tx & mt8173_nor_do_rx for them full potential 8: use a subnode to represent the flash Change in v4: 1: delete the parament "write_enable" for mt8173_nor_write_reg 2: fix the build warning for calling mt8173_nor_write_single_byte Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 41 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16 + drivers/mtd/spi-nor/Kconfig| 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 491 + 5 files changed, 556 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..f5f08eb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,22 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng
---
.../devicetree/bindings/mtd/mtk-quadspi.txt| 41 ++
1 file changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
new file mode 100644
index 000..866b492
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
@@ -0,0 +1,41 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible:should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's
register
+- clocks:the phandle of the clock needed by the nor controller
+- clock-names: the name of the clocks
+ the clocks needed "spi" and "sf". "spi" is used for spi bus,
+ and "sf" is used for controller, these are the clocks witch
+ hardware needs to enabling nor flash and nor flash controller.
+ See
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+The SPI Flash must be a child of the nor_flash node and must have a
+compatible property.
+
+Required properties:
+- compatible:May include a device-specific string consisting of the
manufacturer
+ and name of the chip. Must also include "jedec,spi-nor" for
any
+ SPI NOR flash that can be identified by the JEDEC READ ID
opcode (0x9F).
+- reg : Chip-Select number
+
+Example:
+
+nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
.../devicetree/bindings/mtd/mtk-quadspi.txt| 41 ++
1 file changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
new file mode 100644
index 000..866b492
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
@@ -0,0 +1,41 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible:should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's
register
+- clocks:the phandle of the clock needed by the nor controller
+- clock-names: the name of the clocks
+ the clocks needed "spi" and "sf". "spi" is used for spi bus,
+ and "sf" is used for controller, these are the clocks witch
+ hardware needs to enabling nor flash and nor flash controller.
+ See
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+The SPI Flash must be a child of the nor_flash node and must have a
+compatible property.
+
+Required properties:
+- compatible:May include a device-specific string consisting of the
manufacturer
+ and name of the chip. Must also include "jedec,spi-nor" for
any
+ SPI NOR flash that can be identified by the JEDEC READ ID
opcode (0x9F).
+- reg : Chip-Select number
+
+Example:
+
+nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 0/3] Mediatek SPI-NOR flash driver
This series is based on v4.3-rc1 and l2-mtd.git (git://git.infradead.org/l2-mtd.git) Change in v5: 1: add "status = "disable"" to device tree 2: add document "flash" node 3: fix some statement error in Kconfig file 4: fix alphabetical order error in makefile 5: delete the parament "mtd_info *mtd" in mt8173_nor structure 6: delete SPINOR_OP_WREN repeated calls 7: add mt8173_nor_do_tx & mt8173_nor_do_rx for them full potential 8: use a subnode to represent the flash Change in v4: 1: delete the parament "write_enable" for mt8173_nor_write_reg 2: fix the build warning for calling mt8173_nor_write_single_byte Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 41 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16 + drivers/mtd/spi-nor/Kconfig| 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 491 + 5 files changed, 556 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..f5f08eb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,22 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com> --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 491 ++ 3 files changed, 499 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..387396d 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Mediatek MT81xx SPI NOR flash controller" + help + This enables access to SPI NOR flash, using MT81xx SPI NOR flash + controller. This controller does not support generic SPI BUS, It only + supports SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..0bf3a7f8 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o +obj-$(CONFIG_MTD_MT81xx_NOR)+= mtk-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..33a8dc5 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,491 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng <bayi.ch...@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x
[PATCH v4 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng
---
.../devicetree/bindings/mtd/mtk-quadspi.txt| 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
new file mode 100644
index 000..8fff0ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
@@ -0,0 +1,30 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible:should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's
register
+- clocks:the phandle of the clock needed by the nor controller
+- clock-names: the name of the clocks
+ the clocks needed "spi" and "sf". "spi" is used for spi bus,
+ and "sf" is used for controller, these are the clocks witch
+ hardware needs to enabling nor flash and nor flash controller.
+ See
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+Example:
+
+nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+
+ };
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 486 ++ 3 files changed, 494 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..f433890 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Support SPI flash Controller MTD_MT81xx_NOR" + help + This enables access to SPI Nor flash, using MTD_MT81XX_NOR controller. + This controller does nor support generic SPI BUS, It only supports + SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..37c020a 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_MTD_MT81xx_NOR) += mtk-quadspi.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..c6ac366 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,486 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK_NOR_ENABLE_SF_CMD 0x30 +#define MTK_NOR_DUAD_A
[PATCH v4 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..385c2e4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,21 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 0/3] Mediatek SPI-NOR flash driver
This series is based on v4.3-rc1 and l2-mtd.git (git://git.infradead.org/l2-mtd.git) Change in v4: 1: delete the parament "write_enable" for mt8173_nor_write_reg 2: fix the build warning for calling mt8173_nor_write_single_byte Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 30 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 + drivers/mtd/spi-nor/Kconfig| 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 486 + 5 files changed, 539 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..385c2e4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,21 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 0/3] Mediatek SPI-NOR flash driver
This series is based on v4.3-rc1 and l2-mtd.git (git://git.infradead.org/l2-mtd.git) Change in v4: 1: delete the parament "write_enable" for mt8173_nor_write_reg 2: fix the build warning for calling mt8173_nor_write_single_byte Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 30 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 + drivers/mtd/spi-nor/Kconfig| 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 486 + 5 files changed, 539 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com> --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 486 ++ 3 files changed, 494 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..f433890 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Support SPI flash Controller MTD_MT81xx_NOR" + help + This enables access to SPI Nor flash, using MTD_MT81XX_NOR controller. + This controller does nor support generic SPI BUS, It only supports + SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..37c020a 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_MTD_MT81xx_NOR) += mtk-quadspi.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..c6ac366 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,486 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng <bayi.ch...@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK
[PATCH v4 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
.../devicetree/bindings/mtd/mtk-quadspi.txt| 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
new file mode 100644
index 000..8fff0ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
@@ -0,0 +1,30 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible:should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's
register
+- clocks:the phandle of the clock needed by the nor controller
+- clock-names: the name of the clocks
+ the clocks needed "spi" and "sf". "spi" is used for spi bus,
+ and "sf" is used for controller, these are the clocks witch
+ hardware needs to enabling nor flash and nor flash controller.
+ See
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+Example:
+
+nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+
+ };
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 486 ++ 3 files changed, 494 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..f433890 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Support SPI flash Controller MTD_MT81xx_NOR" + help + This enables access to SPI Nor flash, using MTD_MT81XX_NOR controller. + This controller does nor support generic SPI BUS, It only supports + SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..37c020a 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_MTD_MT81xx_NOR) += mtk-quadspi.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..5f25701 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,486 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK_NOR_ENABLE_SF_CMD 0x30 +#define MTK_NOR_DUAD_A
[PATCH v3 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..385c2e4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,21 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng
---
.../devicetree/bindings/mtd/mtk-quadspi.txt| 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
new file mode 100644
index 000..8fff0ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
@@ -0,0 +1,30 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible:should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's
register
+- clocks:the phandle of the clock needed by the nor controller
+- clock-names: the name of the clocks
+ the clocks needed "spi" and "sf". "spi" is used for spi bus,
+ and "sf" is used for controller, these are the clocks witch
+ hardware needs to enabling nor flash and nor flash controller.
+ See
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+Example:
+
+nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+
+ };
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 0/3] Mediatek SPI-NOR flash driver
The patch supports MediaTek's NOR flash controller. THe NOR flash controller is specifically for spi nor flash, and it is more stable and faster than SPI bus, the MTK NOR controller not only support single mode but also support dual mode and quad mode. This series is based on v4.3-rc1 and l2-mtd.git (git://git.infradead.org/l2-mtd.git) Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 30 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 + drivers/mtd/spi-nor/Kconfig| 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 486 + 5 files changed, 539 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com> --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 486 ++ 3 files changed, 494 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..f433890 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Support SPI flash Controller MTD_MT81xx_NOR" + help + This enables access to SPI Nor flash, using MTD_MT81XX_NOR controller. + This controller does nor support generic SPI BUS, It only supports + SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..37c020a 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_MTD_MT81xx_NOR) += mtk-quadspi.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c new file mode 100644 index 000..5f25701 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -0,0 +1,486 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng <bayi.ch...@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 + +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_PIO_WR_CMD 0x90 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK
[PATCH v3 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
.../devicetree/bindings/mtd/mtk-quadspi.txt| 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
new file mode 100644
index 000..8fff0ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
@@ -0,0 +1,30 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible:should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's
register
+- clocks:the phandle of the clock needed by the nor controller
+- clock-names: the name of the clocks
+ the clocks needed "spi" and "sf". "spi" is used for spi bus,
+ and "sf" is used for controller, these are the clocks witch
+ hardware needs to enabling nor flash and nor flash controller.
+ See
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+Example:
+
+nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+
+ };
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 0/3] Mediatek SPI-NOR flash driver
The patch supports MediaTek's NOR flash controller. THe NOR flash controller is specifically for spi nor flash, and it is more stable and faster than SPI bus, the MTK NOR controller not only support single mode but also support dual mode and quad mode. This series is based on v4.3-rc1 and l2-mtd.git (git://git.infradead.org/l2-mtd.git) Change in v3: 1: use switch() to replace some if-else statement 2: use shifts to replace endianness statement 3: delete some unused macros 4: use auto-increment mechanism for single write 5: write address added to 32bytes Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 30 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 + drivers/mtd/spi-nor/Kconfig| 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk-quadspi.c | 486 + 5 files changed, 539 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt create mode 100644 drivers/mtd/spi-nor/mtk-quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..385c2e4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,21 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk_quadspi.c | 483 ++ 3 files changed, 491 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk_quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..f433890 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Support SPI flash Controller MTD_MT81xx_NOR" + help + This enables access to SPI Nor flash, using MTD_MT81XX_NOR controller. + This controller does nor support generic SPI BUS, It only supports + SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..138cfea 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_MTD_MT81xx_NOR) += mtk_quadspi.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk_quadspi.c b/drivers/mtd/spi-nor/mtk_quadspi.c new file mode 100644 index 000..f60560e --- /dev/null +++ b/drivers/mtd/spi-nor/mtk_quadspi.c @@ -0,0 +1,483 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK_NOR_ENABLE_SF_CMD 0x30 +#define MTK_NOR_DUAD_ADDR_EN 0x8 +#define MTK_NOR_QUAD_READ_EN
[PATCH v2 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng
---
.../devicetree/bindings/mtd/mtk_quadspi.txt| 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
new file mode 100644
index 000..380b907
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
@@ -0,0 +1,27 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible:should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's
register
+- clocks:the phandle of the clock needed by the QuadSPI controller
+- clock-names: the name of the clocks
+ See
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+Example:
+
+nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+
+ };
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..385c2e4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,21 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 0/3] Mediatek SPI-NOR flash driver
The patch supports MediaTek's NOR flash controller. THe NOR flash controller is specifically for spi nor flash, and it is more stable and faster than SPI bus, the MTK NOR controller not only support single mode but also support dual mode and quad mode. This series is based on v4.3-rc1 and l2-mtd.git (git://git.infradead.org/l2-mtd.git) Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node .../devicetree/bindings/mtd/mtk_quadspi.txt| 27 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 + drivers/mtd/spi-nor/Kconfig| 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk_quadspi.c | 483 + 5 files changed, 533 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk_quadspi.txt create mode 100644 drivers/mtd/spi-nor/mtk_quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 0/3] Mediatek SPI-NOR flash driver
The patch supports MediaTek's NOR flash controller. THe NOR flash controller is specifically for spi nor flash, and it is more stable and faster than SPI bus, the MTK NOR controller not only support single mode but also support dual mode and quad mode. This series is based on v4.3-rc1 and l2-mtd.git (git://git.infradead.org/l2-mtd.git) Change in v2: 1. Rebase to 4.3-rc1 2. propagate error code 3. delete mux clock and axi clock in dts file 4. descripts more exactly for binding file 5. change file names from mtk-nor.c to mtk_quadspi.c 6. delete some functions witch were used once time Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node .../devicetree/bindings/mtd/mtk_quadspi.txt| 27 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 + drivers/mtd/spi-nor/Kconfig| 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk_quadspi.c | 483 + 5 files changed, 533 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk_quadspi.txt create mode 100644 drivers/mtd/spi-nor/mtk_quadspi.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..385c2e4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,21 @@
status = "disabled";
};
+ nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
.../devicetree/bindings/mtd/mtk_quadspi.txt| 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
new file mode 100644
index 000..380b907
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
@@ -0,0 +1,27 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible:should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's
register
+- clocks:the phandle of the clock needed by the QuadSPI controller
+- clock-names: the name of the clocks
+ See
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+Example:
+
+nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+
+ };
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com> --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk_quadspi.c | 483 ++ 3 files changed, 491 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk_quadspi.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..f433890 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Support SPI flash Controller MTD_MT81xx_NOR" + help + This enables access to SPI Nor flash, using MTD_MT81XX_NOR controller. + This controller does nor support generic SPI BUS, It only supports + SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..138cfea 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_MTD_MT81xx_NOR) += mtk_quadspi.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk_quadspi.c b/drivers/mtd/spi-nor/mtk_quadspi.c new file mode 100644 index 000..f60560e --- /dev/null +++ b/drivers/mtd/spi-nor/mtk_quadspi.c @@ -0,0 +1,483 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi Cheng <bayi.ch...@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK_NOR_ENABLE_SF_CMD 0x30 +#define MT
[PATCH 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Change-Id: Iaecd0bb7ba1b224f1e27bd7063f0b8d7ea30175a
Signed-off-by: Bayi Cheng
---
Documentation/devicetree/bindings/mtd/mtk_quadspi.txt | 18 ++
1 file changed, 18 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
new file mode 100644
index 000..6153227
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
@@ -0,0 +1,18 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible: Should be "mediatek,mt8173-nor";
+- reg: Physical base address and length of the controller's register
+- clocks: spi source clock amd serial flash controller's clock
+- clock-names: "spi", "sf"
+ See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+
+Example:
+nor_flash: nor@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100D000 0 0xE0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Change-Id: Iaecd0bb7ba1b224f1e27bd7063f0b8d7ea30175a
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
Documentation/devicetree/bindings/mtd/mtk_quadspi.txt | 18 ++
1 file changed, 18 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
b/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
new file mode 100644
index 000..6153227
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt
@@ -0,0 +1,18 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+Required properties:
+- compatible: Should be "mediatek,mt8173-nor";
+- reg: Physical base address and length of the controller's register
+- clocks: spi source clock amd serial flash controller's clock
+- clock-names: "spi", "sf"
+ See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+
+Example:
+nor_flash: nor@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100D000 0 0xE0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk_nor.c | 533 ++ 3 files changed, 541 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk_nor.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..f433890 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Support SPI flash Controller MTD_MT81xx_NOR" + help + This enables access to SPI Nor flash, using MTD_MT81XX_NOR controller. + This controller does nor support generic SPI BUS, It only supports + SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..2f4fe62 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_MTD_MT81xx_NOR) += mtk_nor.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk_nor.c b/drivers/mtd/spi-nor/mtk_nor.c new file mode 100644 index 000..e675fb6 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk_nor.c @@ -0,0 +1,533 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi.Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK_NOR_ENABLE_SF_CMD 0x30 +#define MTK_NOR_DUAD_ADDR_EN 0x8 +#define MTK_NOR_QUAD_READ_EN 0x4 +#define
[PATCH 0/3] Mediatek SPI-NOR flash driver
The patch supports MediaTek's NOR flash controller. The NOR flash controller is specifically for spi nor flash, and it is more stable and faster than SPI bus, the MTK NOR controller not only support single mode but also support dual mode and quad mode. This series is based on v4.2-rc1 and l2-mtd.git (git://git.infradead.org/l2-mtd.git) Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node Documentation/devicetree/bindings/mtd/mtk_nor.txt | 25 + arch/arm64/boot/dts/mediatek/mt8173.dtsi | 10 + drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk_nor.c | 533 ++ 5 files changed, 576 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk_nor.txt create mode 100644 drivers/mtd/spi-nor/mtk_nor.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..a14f005 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,16 @@
status = "disabled";
};
+ nor_flash: nor@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_AXI_SEL>,
+< CLK_TOP_UNIVPLL2_D8>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi_clk", "axi_clk", "mux_clk", "sf_clk";
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng
---
Documentation/devicetree/bindings/mtd/mtk_nor.txt | 25 +++
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk_nor.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk_nor.txt
b/Documentation/devicetree/bindings/mtd/mtk_nor.txt
new file mode 100644
index 000..0eca0cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk_nor.txt
@@ -0,0 +1,25 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+MTK MT81xx serial flash controller is designed for serial Flash device.
+It supports one Flash device with signal mode, dual mode and quad mode.
+
+Required properties:
+- compatible: should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's register
+- clocks: spi nor source clock
+- clock-names: "spi_clk", "axi_clk", "mux_clk", "sf_clk"
+
+See Documentation/devicetree/bindings/clock/clock-bindings.txt
+and Documentation/mtd/spi-nor.txt for details.
+
+Example:
+nor_flash: nor@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_AXI_SEL>,
+< CLK_TOP_UNIVPLL2_D8>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi_clk", "axi_clk", "mux_clk", "sf_clk";
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
Documentation/devicetree/bindings/mtd/mtk_nor.txt | 25 +++
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk_nor.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk_nor.txt
b/Documentation/devicetree/bindings/mtd/mtk_nor.txt
new file mode 100644
index 000..0eca0cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk_nor.txt
@@ -0,0 +1,25 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+MTK MT81xx serial flash controller is designed for serial Flash device.
+It supports one Flash device with signal mode, dual mode and quad mode.
+
+Required properties:
+- compatible: should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's register
+- clocks: spi nor source clock
+- clock-names: "spi_clk", "axi_clk", "mux_clk", "sf_clk"
+
+See Documentation/devicetree/bindings/clock/clock-bindings.txt
+and Documentation/mtd/spi-nor.txt for details.
+
+Example:
+nor_flash: nor@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_AXI_SEL>,
+< CLK_TOP_UNIVPLL2_D8>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi_clk", "axi_clk", "mux_clk", "sf_clk";
+};
+
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com> --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk_nor.c | 533 ++ 3 files changed, 541 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk_nor.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..f433890 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Support SPI flash Controller MTD_MT81xx_NOR" + help + This enables access to SPI Nor flash, using MTD_MT81XX_NOR controller. + This controller does nor support generic SPI BUS, It only supports + SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..2f4fe62 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_MTD_MT81xx_NOR) += mtk_nor.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk_nor.c b/drivers/mtd/spi-nor/mtk_nor.c new file mode 100644 index 000..e675fb6 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk_nor.c @@ -0,0 +1,533 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi.Cheng <bayi.ch...@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK_NOR_ENABLE_SF_CMD 0x30 +#define MTK_NOR_DUAD_ADDR_EN 0
[PATCH 0/3] Mediatek SPI-NOR flash driver
The patch supports MediaTek's NOR flash controller. The NOR flash controller is specifically for spi nor flash, and it is more stable and faster than SPI bus, the MTK NOR controller not only support single mode but also support dual mode and quad mode. This series is based on v4.2-rc1 and l2-mtd.git (git://git.infradead.org/l2-mtd.git) Bayi Cheng (3): doc: dt: add documentation for Mediatek spi-nor controller mtd: mtk-nor: mtk serial flash controller driver arm64: dts: mt8173: Add nor flash node Documentation/devicetree/bindings/mtd/mtk_nor.txt | 25 + arch/arm64/boot/dts/mediatek/mt8173.dtsi | 10 + drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk_nor.c | 533 ++ 5 files changed, 576 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk_nor.txt create mode 100644 drivers/mtd/spi-nor/mtk_nor.c -- 1.8.1.1.dirty -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/3] arm64: dts: mt8173: Add nor flash node
Add Mediatek nor flash node
Signed-off-by: Bayi Cheng <bayi.ch...@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..a14f005 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,16 @@
status = "disabled";
};
+ nor_flash: nor@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = < CLK_PERI_SPI>,
+< CLK_TOP_AXI_SEL>,
+< CLK_TOP_UNIVPLL2_D8>,
+< CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi_clk", "axi_clk", "mux_clk", "sf_clk";
+ };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
