Re: [PATCH v5 1/2] Input: touchscreen-iproc: Add Broadcom iProc touchscreen driver

[Bo Shen]

Hi Jonathan Richardson,

On 03/21/2015 08:57 AM, Jonathan Richardson wrote:

+static struct platform_driver iproc_ts_driver = {
+   .probe = iproc_ts_probe,


Just a little curious, is the .remove function missing or it doesn't 
need it.


Thanks.


+   .driver = {
+   .name   = IPROC_TS_NAME,
+   .of_match_table = of_match_ptr(iproc_ts_of_match),
+   },
+};
+
+module_platform_driver(iproc_ts_driver);
+
+MODULE_DESCRIPTION("IPROC Touchscreen driver");
+MODULE_AUTHOR("Broadcom");
+MODULE_LICENSE("GPL v2");


Best Regards,
Bo Shen
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Re: [PATCH v5 1/2] Input: touchscreen-iproc: Add Broadcom iProc touchscreen driver

[Bo Shen]

Hi Jonathan Richardson,

On 03/21/2015 08:57 AM, Jonathan Richardson wrote:

+static struct platform_driver iproc_ts_driver = {
+   .probe = iproc_ts_probe,


Just a little curious, is the .remove function missing or it doesn't 
need it.


Thanks.


+   .driver = {
+   .name   = IPROC_TS_NAME,
+   .of_match_table = of_match_ptr(iproc_ts_of_match),
+   },
+};
+
+module_platform_driver(iproc_ts_driver);
+
+MODULE_DESCRIPTION(IPROC Touchscreen driver);
+MODULE_AUTHOR(Broadcom);
+MODULE_LICENSE(GPL v2);


Best Regards,
Bo Shen
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Re: [PATCH 2/2] MAINTAINERS: change Atmel ssc driver entry

[Bo Shen]

Hi Nicolas,
  Thanks.

On 03/19/2015 05:49 PM, Nicolas Ferre wrote:

I take over the maintainship from Voice.

Signed-off-by: Nicolas Ferre 
Cc: Bo Shen 
Cc: Mark Brown 
Cc: Arnd Bergmann 
Cc: Greg Kroah-Hartman 


Acked-by: Bo Shen 


---
  MAINTAINERS | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 679b2d0cb2d1..6f133f2179ed 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1808,7 +1808,7 @@ S:Supported
  F:drivers/spi/spi-atmel.*

  ATMEL SSC DRIVER
-M: Bo Shen 
+M: Nicolas Ferre 
  L:linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
  S:Supported
  F:drivers/misc/atmel-ssc.c



Best Regards,
Bo Shen
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Re: [PATCH 1/2] MAINTAINERS: change the Atmel audio alsa driver entry

[Bo Shen]

Hi Nicolas,
  Thanks.

On 03/19/2015 05:48 PM, Nicolas Ferre wrote:

I take over the the maintainship of Atmel alsa drivers from Voice.
Thanks for your work!

Signed-off-by: Nicolas Ferre 
Cc: Bo Shen 
Cc: Mark Brown 


Acked-by: Bo Shen 


---
  MAINTAINERS | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index ddc5a8cf9a8a..679b2d0cb2d1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1751,7 +1751,7 @@ S:Supported
  F:drivers/tty/serial/atmel_serial.c

  ATMEL Audio ALSA driver
-M: Bo Shen 
+M: Nicolas Ferre 
  L:alsa-de...@alsa-project.org (moderated for non-subscribers)
  S:Supported
  F:sound/soc/atmel



Best Regards,
Bo Shen
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Re: [PATCH 1/2] MAINTAINERS: change the Atmel audio alsa driver entry

[Bo Shen]

Hi Nicolas,
  Thanks.

On 03/19/2015 05:48 PM, Nicolas Ferre wrote:

I take over the the maintainship of Atmel alsa drivers from Voice.
Thanks for your work!

Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
Cc: Bo Shen voice.s...@atmel.com
Cc: Mark Brown broo...@linaro.org


Acked-by: Bo Shen voice.s...@atmel.com


---
  MAINTAINERS | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index ddc5a8cf9a8a..679b2d0cb2d1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1751,7 +1751,7 @@ S:Supported
  F:drivers/tty/serial/atmel_serial.c

  ATMEL Audio ALSA driver
-M: Bo Shen voice.s...@atmel.com
+M: Nicolas Ferre nicolas.fe...@atmel.com
  L:alsa-de...@alsa-project.org (moderated for non-subscribers)
  S:Supported
  F:sound/soc/atmel



Best Regards,
Bo Shen
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Re: [PATCH 2/2] MAINTAINERS: change Atmel ssc driver entry

[Bo Shen]

Hi Nicolas,
  Thanks.

On 03/19/2015 05:49 PM, Nicolas Ferre wrote:

I take over the maintainship from Voice.

Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
Cc: Bo Shen voice.s...@atmel.com
Cc: Mark Brown broo...@linaro.org
Cc: Arnd Bergmann a...@arndb.de
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org


Acked-by: Bo Shen voice.s...@atmel.com


---
  MAINTAINERS | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 679b2d0cb2d1..6f133f2179ed 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1808,7 +1808,7 @@ S:Supported
  F:drivers/spi/spi-atmel.*

  ATMEL SSC DRIVER
-M: Bo Shen voice.s...@atmel.com
+M: Nicolas Ferre nicolas.fe...@atmel.com
  L:linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
  S:Supported
  F:drivers/misc/atmel-ssc.c



Best Regards,
Bo Shen
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Re: [PATCH v2 0/2] ARM: at91: dt: at91sam9n12ek: enable udp device

[Bo Shen]

Hi Nicolas,

On 02/10/2015 09:55 AM, Bo Shen wrote:

This patch series enable usb device support on at91sam9n12ek board.

Changes in v2:
   - Base on next-20150209 (so, remove the modification of udc driver).
   - Add pinctrl for usb1 vbus sense.

Bo Shen (2):
   ARM: at91: dt: at91sam9n12: add udp device node
   ARM: at91: dt: at91sam9n12ek: enable udp


Any comments for this patch series? (aka ping?)


  arch/arm/boot/dts/at91sam9n12.dtsi  |  9 +
  arch/arm/boot/dts/at91sam9n12ek.dts | 14 ++
  2 files changed, 23 insertions(+)



Best Regards,
Bo Shen
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Re: [PATCH v2 0/2] ARM: at91: dt: at91sam9n12ek: enable udp device

[Bo Shen]

Hi Nicolas,

On 02/10/2015 09:55 AM, Bo Shen wrote:

This patch series enable usb device support on at91sam9n12ek board.

Changes in v2:
   - Base on next-20150209 (so, remove the modification of udc driver).
   - Add pinctrl for usb1 vbus sense.

Bo Shen (2):
   ARM: at91: dt: at91sam9n12: add udp device node
   ARM: at91: dt: at91sam9n12ek: enable udp


Any comments for this patch series? (aka ping?)


  arch/arm/boot/dts/at91sam9n12.dtsi  |  9 +
  arch/arm/boot/dts/at91sam9n12ek.dts | 14 ++
  2 files changed, 23 insertions(+)



Best Regards,
Bo Shen
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Re: [alsa-devel] [PATCH] ASoC: wm8731: let codec to manage clock by itself

[Bo Shen]

On 02/16/2015 08:58 PM, Manuel Lauss wrote:

On Mon, Feb 16, 2015 at 11:31 AM, Charles Keepax
 wrote:

On Thu, Feb 12, 2015 at 04:23:06PM +0800, Bo Shen wrote:

Hi All,

On 02/05/2015 03:35 PM, Bo Shen wrote:

Let the wm8731 codec to manage clock by itself.

Signed-off-by: Bo Shen 
---

   sound/soc/codecs/wm8731.c | 28 
   1 file changed, 28 insertions(+)


Any comments for this patch (aka ping?)


I preferred the idea of having the clock as optional and from the
discussion on the last patch it didn't look too tricky to


me too


OK, I will keep the clock as optional.


achieve. OTOH I think the Atmel system is the only one that uses
both this CODEC and common clock so it doesn't look like this
would cause any problems, but might be nice for this not to be
one more thing for someone to fix up when moving a system to
common clock.


Not quite, there's one MIPS platform I maintain which needs a patch
like the one below (tested):


Do I need to seed the following patch together or you send it?


diff --git a/arch/mips/alchemy/devboards/db1200.c
b/arch/mips/alchemy/devboards/db1200.c
index 8c13675..aa01ab2 100644
--- a/arch/mips/alchemy/devboards/db1200.c
+++ b/arch/mips/alchemy/devboards/db1200.c
@@ -19,6 +19,8 @@
   */

  #include 
+#include 
+#include 
  #include 
  #include 
  #include 
@@ -862,6 +864,12 @@ int __init db1200_dev_setup(void)
  irq_set_status_flags(DB1200_PC1_INSERT_INT, IRQ_NOAUTOEN);
  irq_set_status_flags(DB1200_PC1_EJECT_INT, IRQ_NOAUTOEN);

+/* register the 12MHz crystal for the WM8731 I2S codec */
+c = clk_register_fixed_rate(NULL, "wm8731xtal", NULL,
+CLK_IS_ROOT, 1200);
+if (!IS_ERR(c))
+clk_register_clkdev(c, "mclk", "0-001b");
+
  i2c_register_board_info(0, db1200_i2c_devs,
  ARRAY_SIZE(db1200_i2c_devs));
  spi_register_board_info(db1200_spi_devs,
diff --git a/arch/mips/alchemy/devboards/db1300.c
b/arch/mips/alchemy/devboards/db1300.c
index 1c64fdb..1aa01c8 100644
--- a/arch/mips/alchemy/devboards/db1300.c
+++ b/arch/mips/alchemy/devboards/db1300.c
@@ -5,6 +5,8 @@
   */

  #include 
+#include 
+#include 
  #include 
  #include 
  #include 
@@ -799,6 +801,12 @@ int __init db1300_dev_setup(void)
  if (platform_driver_register(_wm97xx_driver))
  pr_warn("DB1300: failed to init touch pen irq support!\n");

+/* register the 12MHz crystal for the WM8731 I2S codec */
+c = clk_register_fixed_rate(NULL, "wm8731xtal", NULL,
+CLK_IS_ROOT, 1200);
+if (!IS_ERR(c))
+clk_register_clkdev(c, "mclk", "0-001b");
+
  /* Audio PSC clock is supplied by codecs (PSC1, 2) */
  __raw_writel(PSC_SEL_CLK_SERCLK,
  (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);



Best Regards,
Bo Shen
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Please read the FAQ at  http://www.tux.org/lkml/

Re: [alsa-devel] [PATCH] ASoC: wm8731: let codec to manage clock by itself

[Bo Shen]

On 02/16/2015 08:58 PM, Manuel Lauss wrote:

On Mon, Feb 16, 2015 at 11:31 AM, Charles Keepax
ckee...@opensource.wolfsonmicro.com wrote:

On Thu, Feb 12, 2015 at 04:23:06PM +0800, Bo Shen wrote:

Hi All,

On 02/05/2015 03:35 PM, Bo Shen wrote:

Let the wm8731 codec to manage clock by itself.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

   sound/soc/codecs/wm8731.c | 28 
   1 file changed, 28 insertions(+)


Any comments for this patch (aka ping?)


I preferred the idea of having the clock as optional and from the
discussion on the last patch it didn't look too tricky to


me too


OK, I will keep the clock as optional.


achieve. OTOH I think the Atmel system is the only one that uses
both this CODEC and common clock so it doesn't look like this
would cause any problems, but might be nice for this not to be
one more thing for someone to fix up when moving a system to
common clock.


Not quite, there's one MIPS platform I maintain which needs a patch
like the one below (tested):


Do I need to seed the following patch together or you send it?


diff --git a/arch/mips/alchemy/devboards/db1200.c
b/arch/mips/alchemy/devboards/db1200.c
index 8c13675..aa01ab2 100644
--- a/arch/mips/alchemy/devboards/db1200.c
+++ b/arch/mips/alchemy/devboards/db1200.c
@@ -19,6 +19,8 @@
   */

  #include linux/clk.h
+#include linux/clkdev.h
+#include linux/clk-provider.h
  #include linux/dma-mapping.h
  #include linux/gpio.h
  #include linux/i2c.h
@@ -862,6 +864,12 @@ int __init db1200_dev_setup(void)
  irq_set_status_flags(DB1200_PC1_INSERT_INT, IRQ_NOAUTOEN);
  irq_set_status_flags(DB1200_PC1_EJECT_INT, IRQ_NOAUTOEN);

+/* register the 12MHz crystal for the WM8731 I2S codec */
+c = clk_register_fixed_rate(NULL, wm8731xtal, NULL,
+CLK_IS_ROOT, 1200);
+if (!IS_ERR(c))
+clk_register_clkdev(c, mclk, 0-001b);
+
  i2c_register_board_info(0, db1200_i2c_devs,
  ARRAY_SIZE(db1200_i2c_devs));
  spi_register_board_info(db1200_spi_devs,
diff --git a/arch/mips/alchemy/devboards/db1300.c
b/arch/mips/alchemy/devboards/db1300.c
index 1c64fdb..1aa01c8 100644
--- a/arch/mips/alchemy/devboards/db1300.c
+++ b/arch/mips/alchemy/devboards/db1300.c
@@ -5,6 +5,8 @@
   */

  #include linux/clk.h
+#include linux/clkdev.h
+#include linux/clk-provider.h
  #include linux/dma-mapping.h
  #include linux/gpio.h
  #include linux/gpio_keys.h
@@ -799,6 +801,12 @@ int __init db1300_dev_setup(void)
  if (platform_driver_register(db1300_wm97xx_driver))
  pr_warn(DB1300: failed to init touch pen irq support!\n);

+/* register the 12MHz crystal for the WM8731 I2S codec */
+c = clk_register_fixed_rate(NULL, wm8731xtal, NULL,
+CLK_IS_ROOT, 1200);
+if (!IS_ERR(c))
+clk_register_clkdev(c, mclk, 0-001b);
+
  /* Audio PSC clock is supplied by codecs (PSC1, 2) */
  __raw_writel(PSC_SEL_CLK_SERCLK,
  (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);



Best Regards,
Bo Shen
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Re: [PATCH] ASoC: wm8731: let codec to manage clock by itself

[Bo Shen]

Hi All,

On 02/05/2015 03:35 PM, Bo Shen wrote:

Let the wm8731 codec to manage clock by itself.

Signed-off-by: Bo Shen 
---

  sound/soc/codecs/wm8731.c | 28 
  1 file changed, 28 insertions(+)


Any comments for this patch (aka ping?)


diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index b115ed8..ecd8424 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -13,6 +13,7 @@
   * published by the Free Software Foundation.
   */

+#include 
  #include 
  #include 
  #include 
@@ -45,6 +46,7 @@ static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = 
{
  /* codec private data */
  struct wm8731_priv {
struct regmap *regmap;
+   struct clk *mclk;
struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
const struct snd_pcm_hw_constraint_list *constraints;
unsigned int sysclk;
@@ -389,6 +391,9 @@ static int wm8731_set_dai_sysclk(struct snd_soc_dai 
*codec_dai,
switch (clk_id) {
case WM8731_SYSCLK_XTAL:
case WM8731_SYSCLK_MCLK:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   if (clk_set_rate(wm8731->mclk, freq))
+   return -EINVAL;
wm8731->sysclk_type = clk_id;
break;
default:
@@ -490,6 +495,9 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,

switch (level) {
case SND_SOC_BIAS_ON:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   if (clk_prepare_enable(wm8731->mclk))
+   return -EINVAL;
break;
case SND_SOC_BIAS_PREPARE:
break;
@@ -508,6 +516,8 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,
snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
break;
case SND_SOC_BIAS_OFF:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   clk_disable_unprepare(wm8731->mclk);
snd_soc_write(codec, WM8731_PWR, 0x);
regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
   wm8731->supplies);
@@ -666,6 +676,15 @@ static int wm8731_spi_probe(struct spi_device *spi)
if (wm8731 == NULL)
return -ENOMEM;

+   if (IS_ENABLED(CONFIG_COMMON_CLK)) {
+   wm8731->mclk = devm_clk_get(>dev, "mclk");
+   if (IS_ERR(wm8731->mclk)) {
+   ret = PTR_ERR(wm8731->mclk);
+   dev_err(>dev, "Failed to get MCLK\n");
+   return ret;
+   }
+   }
+
mutex_init(>lock);

wm8731->regmap = devm_regmap_init_spi(spi, _regmap);
@@ -717,6 +736,15 @@ static int wm8731_i2c_probe(struct i2c_client *i2c,
if (wm8731 == NULL)
return -ENOMEM;

+   if (IS_ENABLED(CONFIG_COMMON_CLK)) {
+   wm8731->mclk = devm_clk_get(>dev, "mclk");
+   if (IS_ERR(wm8731->mclk)) {
+   ret = PTR_ERR(wm8731->mclk);
+   dev_err(>dev, "Failed to get MCLK\n");
+   return ret;
+   }
+   }
+
mutex_init(>lock);

wm8731->regmap = devm_regmap_init_i2c(i2c, _regmap);



Best Regards,
Bo Shen
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Please read the FAQ at  http://www.tux.org/lkml/

Re: [PATCH] ASoC: wm8731: let codec to manage clock by itself

[Bo Shen]

Hi All,

On 02/05/2015 03:35 PM, Bo Shen wrote:

Let the wm8731 codec to manage clock by itself.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

  sound/soc/codecs/wm8731.c | 28 
  1 file changed, 28 insertions(+)


Any comments for this patch (aka ping?)


diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index b115ed8..ecd8424 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -13,6 +13,7 @@
   * published by the Free Software Foundation.
   */

+#include linux/clk.h
  #include linux/module.h
  #include linux/moduleparam.h
  #include linux/init.h
@@ -45,6 +46,7 @@ static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = 
{
  /* codec private data */
  struct wm8731_priv {
struct regmap *regmap;
+   struct clk *mclk;
struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
const struct snd_pcm_hw_constraint_list *constraints;
unsigned int sysclk;
@@ -389,6 +391,9 @@ static int wm8731_set_dai_sysclk(struct snd_soc_dai 
*codec_dai,
switch (clk_id) {
case WM8731_SYSCLK_XTAL:
case WM8731_SYSCLK_MCLK:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   if (clk_set_rate(wm8731-mclk, freq))
+   return -EINVAL;
wm8731-sysclk_type = clk_id;
break;
default:
@@ -490,6 +495,9 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,

switch (level) {
case SND_SOC_BIAS_ON:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   if (clk_prepare_enable(wm8731-mclk))
+   return -EINVAL;
break;
case SND_SOC_BIAS_PREPARE:
break;
@@ -508,6 +516,8 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,
snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
break;
case SND_SOC_BIAS_OFF:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   clk_disable_unprepare(wm8731-mclk);
snd_soc_write(codec, WM8731_PWR, 0x);
regulator_bulk_disable(ARRAY_SIZE(wm8731-supplies),
   wm8731-supplies);
@@ -666,6 +676,15 @@ static int wm8731_spi_probe(struct spi_device *spi)
if (wm8731 == NULL)
return -ENOMEM;

+   if (IS_ENABLED(CONFIG_COMMON_CLK)) {
+   wm8731-mclk = devm_clk_get(spi-dev, mclk);
+   if (IS_ERR(wm8731-mclk)) {
+   ret = PTR_ERR(wm8731-mclk);
+   dev_err(spi-dev, Failed to get MCLK\n);
+   return ret;
+   }
+   }
+
mutex_init(wm8731-lock);

wm8731-regmap = devm_regmap_init_spi(spi, wm8731_regmap);
@@ -717,6 +736,15 @@ static int wm8731_i2c_probe(struct i2c_client *i2c,
if (wm8731 == NULL)
return -ENOMEM;

+   if (IS_ENABLED(CONFIG_COMMON_CLK)) {
+   wm8731-mclk = devm_clk_get(i2c-dev, mclk);
+   if (IS_ERR(wm8731-mclk)) {
+   ret = PTR_ERR(wm8731-mclk);
+   dev_err(i2c-dev, Failed to get MCLK\n);
+   return ret;
+   }
+   }
+
mutex_init(wm8731-lock);

wm8731-regmap = devm_regmap_init_i2c(i2c, wm8731_regmap);



Best Regards,
Bo Shen
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Re: [PATCH v3] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

Hi Peter,

On 02/09/2015 11:08 PM, Peter Rosin wrote:

From: Peter Rosin 

When the SSC acts as BCK master, use a ratnum rule to limit
the rate instead of only doing the standard rates. When the SSC
acts as BCK slave, allow any BCK frequency up to the SSC master
clock, divided by either of 2, 3 or 6.

Put a cap at 384kHz. Who's /ever/ going to need more than that?

The divider of 2, 3 or 6 is selected based on the Serial Clock Ratio
Considerations section from the SSC documentation:

 The Transmitter and the Receiver can be programmed to operate
 with the clock signals provided on either the TK or RK pins.
 This allows the SSC to support many slave-mode data transfers.
 In this case, the maximum clock speed allowed on the RK pin is:
 - Peripheral clock divided by 2 if Receiver Frame Synchro is input
 - Peripheral clock divided by 3 if Receiver Frame Synchro is output
 In addition, the maximum clock speed allowed on the TK pin is:
 - Peripheral clock divided by 6 if Transmit Frame Synchro is input
 - Peripheral clock divided by 2 if Transmit Frame Synchro is output

Signed-off-by: Peter Rosin 


Thanks for your patch.

Acked-by: Bo Shen 


---
  sound/soc/atmel/atmel_ssc_dai.c |  111 +--
  sound/soc/atmel/atmel_ssc_dai.h |1 +
  2 files changed, 108 insertions(+), 4 deletions(-)

Changes since v2:

- Killed the 500ppm reduction. Just trust the nominal clock
   rates of the given clocks.

- Don't multiply the given SSC clk rate by two to get to the
   SSC master clock rate. That factor was the result of some
   confusion on my part. The SSC clk *is* the SSC master clock.

Changes since v1:

- I have checked all Atmel datasheets I could get my hands on (and
   that seemed relevant), and in every instance where they have
   described the SSC, the description have the exact rate limitations
   on the RK and TK pin that I have implemented here.

- Improved the comments.

- Rebased on top of the latest patches from Bo Chen.

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 379ac2a6ab16..6b8e64899205 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -187,6 +187,94 @@ static irqreturn_t atmel_ssc_interrupt(int irq, void 
*dev_id)
return IRQ_HANDLED;
  }

+/*
+ * When the bit clock is input, limit the maximum rate according to the
+ * Serial Clock Ratio Considerations section from the SSC documentation:
+ *
+ *   The Transmitter and the Receiver can be programmed to operate
+ *   with the clock signals provided on either the TK or RK pins.
+ *   This allows the SSC to support many slave-mode data transfers.
+ *   In this case, the maximum clock speed allowed on the RK pin is:
+ *   - Peripheral clock divided by 2 if Receiver Frame Synchro is input
+ *   - Peripheral clock divided by 3 if Receiver Frame Synchro is output
+ *   In addition, the maximum clock speed allowed on the TK pin is:
+ *   - Peripheral clock divided by 6 if Transmit Frame Synchro is input
+ *   - Peripheral clock divided by 2 if Transmit Frame Synchro is output
+ *
+ * When the bit clock is output, limit the rate according to the
+ * SSC divider restrictions.
+ */
+static int atmel_ssc_hw_rule_rate(struct snd_pcm_hw_params *params,
+ struct snd_pcm_hw_rule *rule)
+{
+   struct atmel_ssc_info *ssc_p = rule->private;
+   struct ssc_device *ssc = ssc_p->ssc;
+   struct snd_interval *i = hw_param_interval(params, rule->var);
+   struct snd_interval t;
+   struct snd_ratnum r = {
+   .den_min = 1,
+   .den_max = 4095,
+   .den_step = 1,
+   };
+   unsigned int num = 0, den = 0;
+   int frame_size;
+   int mck_div = 2;
+   int ret;
+
+   frame_size = snd_soc_params_to_frame_size(params);
+   if (frame_size < 0)
+   return frame_size;
+
+   switch (ssc_p->daifmt & SND_SOC_DAIFMT_MASTER_MASK) {
+   case SND_SOC_DAIFMT_CBM_CFS:
+   if ((ssc_p->dir_mask & SSC_DIR_MASK_CAPTURE)
+   && ssc->clk_from_rk_pin)
+   /* Receiver Frame Synchro (i.e. capture)
+* is output (format is _CFS) and the RK pin
+* is used for input (format is _CBM_).
+*/
+   mck_div = 3;
+   break;
+
+   case SND_SOC_DAIFMT_CBM_CFM:
+   if ((ssc_p->dir_mask & SSC_DIR_MASK_PLAYBACK)
+   && !ssc->clk_from_rk_pin)
+   /* Transmit Frame Synchro (i.e. playback)
+* is input (format is _CFM) and the TK pin
+* is used for input (format _CBM_ but not
+* using the RK pin).
+*/
+   mck_div = 6;
+   break;
+   }
+
+  

[PATCH v2 2/2] ARM: at91: dt: at91sam9n12ek: enable udp

[Bo Shen]

Enable usb device port on at91sam9n12ek board.

Signed-off-by: Bo Shen 
---

Changes in v2:
  - Add pinctrl for usb1 vbus sense.

 arch/arm/boot/dts/at91sam9n12ek.dts | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts 
b/arch/arm/boot/dts/at91sam9n12ek.dts
index 9575c0d..6123109 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -108,6 +108,13 @@
;
};
};
+
+   usb1 {
+   pinctrl_usb1_vbus_sense: 
usb1_vbus_sense {
+   atmel,pins =
+   ;  /* PB16 gpio usb vbus sense, no pull 
up and deglitch */
+   };
+   };
};
 
spi0: spi@f000 {
@@ -120,6 +127,13 @@
};
};
 
+   usb1: gadget@f803c000 {
+   pinctrl-names = "default";
+   pinctrl-0 = <_usb1_vbus_sense>;
+   atmel,vbus-gpio = < 16 GPIO_ACTIVE_HIGH>;
+   status = "okay";
+   };
+
watchdog@fe40 {
status = "okay";
};
-- 
2.3.0.rc0

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[PATCH v2 1/2] ARM: at91: dt: at91sam9n12: add udp device node

[Bo Shen]

Add usb device node for at91sam9n12.

Signed-off-by: Bo Shen 
---

Changes in v2: None

 arch/arm/boot/dts/at91sam9n12.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi 
b/arch/arm/boot/dts/at91sam9n12.dtsi
index c2666a7..e1b6f0b 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -913,6 +913,15 @@
clocks = <_clk>;
status = "disabled";
};
+
+   usb1: gadget@f803c000 {
+   compatible = "atmel,at91sam9260-udc";
+   reg = <0xf803c000 0x4000>;
+   interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
+   clocks = <_clk>, <>;
+   clock-names = "pclk", "hclk";
+   status = "disabled";
+   };
};
 
nand0: nand@4000 {
-- 
2.3.0.rc0

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[PATCH v2 0/2] ARM: at91: dt: at91sam9n12ek: enable udp device

[Bo Shen]

This patch series enable usb device support on at91sam9n12ek board.

Changes in v2:
  - Base on next-20150209 (so, remove the modification of udc driver).
  - Add pinctrl for usb1 vbus sense.

Bo Shen (2):
  ARM: at91: dt: at91sam9n12: add udp device node
  ARM: at91: dt: at91sam9n12ek: enable udp

 arch/arm/boot/dts/at91sam9n12.dtsi  |  9 +
 arch/arm/boot/dts/at91sam9n12ek.dts | 14 ++
 2 files changed, 23 insertions(+)

-- 
2.3.0.rc0

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Re: [PATCH 1/3] USB: gadget: at91_udc: add at91sam9n12 support

[Bo Shen]

Hi Alexandre,

On 02/09/2015 07:14 PM, Alexandre Belloni wrote:

Hi Bo,

On 09/02/2015 at 17:02:50 +0800, Bo Shen wrote :

Add at91sam9n12 SoC support.

Signed-off-by: Bo Shen 
---

  drivers/usb/gadget/udc/at91_udc.c | 9 ++---
  1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/gadget/udc/at91_udc.c 
b/drivers/usb/gadget/udc/at91_udc.c
index c862656..f4c785f 100644
--- a/drivers/usb/gadget/udc/at91_udc.c
+++ b/drivers/usb/gadget/udc/at91_udc.c
@@ -931,7 +931,8 @@ static void pullup(struct at91_udc *udc, int is_on)
at91_udp_write(udc, AT91_UDP_TXVC, 0);
if (cpu_is_at91rm9200())
gpio_set_value(udc->board.pullup_pin, active);
-   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || 
cpu_is_at91sam9g20()) {
+   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() ||
+cpu_is_at91sam9g20() || cpu_is_at91sam9n12()) {


cpu_is_at91xx have been removed from the kernel, using the correct
compatible should be enough, see
http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/drivers/usb/gadget/udc/at91_udc.c?id=f0bceab4e3b528e799aba8fda8d2936fcfd41f1f


Thanks for you information. Missing this patch, check the next-20150209, 
it is here. I will base on next-20150209, so this patch no need anymore, 
only need to change the dts(i) file now.


Thanks again.




u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);

txvc |= AT91_UDP_TXVC_PUON;
@@ -949,7 +950,8 @@ static void pullup(struct at91_udc *udc, int is_on)
at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
if (cpu_is_at91rm9200())
gpio_set_value(udc->board.pullup_pin, !active);
-   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || 
cpu_is_at91sam9g20()) {
+   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() ||
+cpu_is_at91sam9g20() || cpu_is_at91sam9n12()) {
u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);

txvc &= ~AT91_UDP_TXVC_PUON;
@@ -1758,7 +1760,8 @@ static int at91udc_probe(struct platform_device *pdev)
}

/* newer chips have more FIFO memory than rm9200 */
-   if (cpu_is_at91sam9260() || cpu_is_at91sam9g20()) {
+   if (cpu_is_at91sam9260() || cpu_is_at91sam9g20() ||
+   cpu_is_at91sam9n12()) {
udc->ep[0].maxpacket = 64;
udc->ep[3].maxpacket = 64;
udc->ep[4].maxpacket = 512;
--
2.3.0.rc0


Best Regards,
Bo Shen

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Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

Hi Peter,

On 02/09/2015 06:25 PM, Peter Rosin wrote:

Bo Shen wrote:

Hi Peter,



Hi!


On 02/09/2015 05:07 PM, Peter Rosin wrote:

Bo Shen wrote:

Hi Peter,

On 02/09/2015 04:09 PM, Peter Rosin wrote:

[Snip]



 
/*-*\
  * DAI functions
@@ -200,6 +290,7 @@ static int atmel_ssc_startup(struct

snd_pcm_substream *substream,

struct atmel_ssc_info *ssc_p = _info[dai->id];
struct atmel_pcm_dma_params *dma_params;
int dir, dir_mask;
+   int ret;

pr_debug("atmel_ssc_startup: SSC_SR=0x%u\n",
ssc_readl(ssc_p->ssc->regs, SR)); @@ -207,6 +298,7

@@

static

int atmel_ssc_startup(struct snd_pcm_substream *substream,
/* Enable PMC peripheral clock for this SSC */
pr_debug("atmel_ssc_dai: Starting clock\n");
clk_enable(ssc_p->ssc->clk);
+   ssc_p->mck_rate = clk_get_rate(ssc_p->ssc->clk) * 2;


Why the mck_rate is calculated in this form?


What did you have in mind? Add another clock to the ssc node in the
device tree?

IIUC, the device tree (at least normally) has the ssc clk as the
peripheral clock divided by 2, but the ssc specifies (when capturing
in the CBM/CFS
case) the rate limit as the peripheral clock divided by 3 (i.e. ssc clk / 1.5).
Since the SSC spec expresses the rate limit in terms of the
peripheral clock, this was what I came up with. I didn't want to require dt

changes...


You make a misunderstand for the mck for ssc peripheral. The mck here
is not the system mck, it only related with the ssc, it is the PMC output.
For example, in device tree, the ssc clock divided by 2, then the pmc
output for ssc is "system mck / 2", so the ssc mck is "system mck / 2".
If divided by 4, then the ssc mck is "system / 4"


I think the reason for my misunderstanding might be that in the
3.10-at91 tree, the ssc clk is twice the rate compared to what it is
in the 3.18-at91 tree. This made me assume that the ssc clk had


I think maybe you didn't use the latest linux-3.10-at91 code. In that code, we
also divided by 2 in device tree.


That's a rather confusing statement. The clock tree isn't even managed
by the device tree in linux-3.10-at91. Sure, there's the 12MHz system
master clock in sama5d3.dtsi, but that's about it. The rest of the clocks
are in arch/arm/mach-at91/sama5d3.c. And the part about ssc0/ssc1
hasn't been updated since it was added in 3.9. What am I missing?


I am not sure what the kernel you are talking about now.

In linux-3.10-at91 branch on github.com/linux4sam/linux-at91. In the 



--->8---
static struct clk ssc0_clk = {
.name   = "ssc0_clk",
.pid= SAMA5D3_ID_SSC0,
.type   = CLK_TYPE_PERIPHERAL,
.div= AT91_PMC_PCR_DIV2,
};
static struct clk ssc1_clk = {
.name   = "ssc1_clk",
.pid= SAMA5D3_ID_SSC1,
.type   = CLK_TYPE_PERIPHERAL,
.div= AT91_PMC_PCR_DIV2,
};
---8<---

That means, the clock output from PMC is "system clock / 2" which will 
be fed to ssc (here we call it SSC peripheral clock = "system clock / 2").



been changed to mean the rate after the fixed divider by two that is
activated as soon as the ssc clock divider (given by SSC_CMR) is
activated, and that it was a simple matter of multiplying by two to
get to the MCK rate. I further assumed that "Master Clock" in the
"Serial Clock Ratio Considerations" section was this MCK. Maybe the
mistake was to involve the peripheral clock at all?

Ok, so I may have misunderstood, but in that case what does that mean
in terms of finding the "Master Clock" rate that is mentioned in the
"Serial Clock Ratio Considerations" section? Is it perhaps the rate of
the parent clock of the given ssc clk? Or, given the above
explanation, is it correct to simply multiply by two as I have done?


The "Master Clock" actually is the same as "Peripheral clock".

Thanks for your information, I will send this to our datasheet team to update
this part.


You are still not saying how to get to the "Master Clock" rate (i.e. the
"Master Clock" that is mentioned in the "Serial Clock Ratio Considerations"
section. You are only implying that multiplying the ssc clock rate with 2 is
wrong for some reason.


I mean in that section you mentioned. The "Master Clock" is the same as 
"Peripheral Clock". So, you get the SSC peripheral clock is what the 
clock ("Master Clock") you try to get ( clk_get_rate(ssc_p->ssc->clk)).



Are you saying that the ssc clock is supposed to be this "Master Clock"?

Cheers,
Peter



Best Regards,
Bo Shen
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Re: [PATCH 3/3] ARM: at91: dt: at91sam9n12ek: enable udp

[Bo Shen]

Hi Sylvain,

On 02/09/2015 06:04 PM, Sylvain Rochet wrote:

Hello Bo,

On Mon, Feb 09, 2015 at 05:02:52PM +0800, Bo Shen wrote:

Enable usb device port on at91sam9n12ek board.

Signed-off-by: Bo Shen 
---

  arch/arm/boot/dts/at91sam9n12ek.dts | 5 +
  1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts 
b/arch/arm/boot/dts/at91sam9n12ek.dts
index 13bb24e..3e572e5 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -120,6 +120,11 @@
};
};

+   usb1: gadget@f803c000 {
+   atmel,vbus-gpio = < 16 GPIO_ACTIVE_HIGH>;
+   status = "okay";
+   };
+


There is an external resistor divider on PB16, acting like a pull-down
(R22+R23). PB16 reset state is input, pull-up, schmitt trigger, you need
to disable the pull-up in pinctrl this way:

usb1: gadget@f803c000 {
pinctrl-names = "default";
pinctrl-0 = <_board_usb1>;
…
}

pinctrl … {
usb1 {
pinctrl_board_usb1: usb1-board {
atmel,pins = ;/* PB16, no pull up and deglitch */
};
};
};


Thanks.

I will add it in next version.



Sylvain



Best Regards,
Bo Shen

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Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

Hi Peter,

On 02/09/2015 05:07 PM, Peter Rosin wrote:

Bo Shen wrote:

Hi Peter,

On 02/09/2015 04:09 PM, Peter Rosin wrote:

[Snip]




/*-*\
 * DAI functions
@@ -200,6 +290,7 @@ static int atmel_ssc_startup(struct

snd_pcm_substream *substream,

struct atmel_ssc_info *ssc_p = _info[dai->id];
struct atmel_pcm_dma_params *dma_params;
int dir, dir_mask;
+   int ret;

pr_debug("atmel_ssc_startup: SSC_SR=0x%u\n",
ssc_readl(ssc_p->ssc->regs, SR)); @@ -207,6 +298,7 @@

static

int atmel_ssc_startup(struct snd_pcm_substream *substream,
/* Enable PMC peripheral clock for this SSC */
pr_debug("atmel_ssc_dai: Starting clock\n");
clk_enable(ssc_p->ssc->clk);
+   ssc_p->mck_rate = clk_get_rate(ssc_p->ssc->clk) * 2;


Why the mck_rate is calculated in this form?


What did you have in mind? Add another clock to the ssc node in the
device tree?

IIUC, the device tree (at least normally) has the ssc clk as the
peripheral clock divided by 2, but the ssc specifies (when capturing
in the CBM/CFS
case) the rate limit as the peripheral clock divided by 3 (i.e. ssc clk / 1.5).
Since the SSC spec expresses the rate limit in terms of the peripheral
clock, this was what I came up with. I didn't want to require dt changes...


You make a misunderstand for the mck for ssc peripheral. The mck here is
not the system mck, it only related with the ssc, it is the PMC output.
For example, in device tree, the ssc clock divided by 2, then the pmc output
for ssc is "system mck / 2", so the ssc mck is "system mck / 2".
If divided by 4, then the ssc mck is "system / 4"


I think the reason for my misunderstanding might be that in the
3.10-at91 tree, the ssc clk is twice the rate compared to what it is
in the 3.18-at91 tree. This made me assume that the ssc clk had


I think maybe you didn't use the latest linux-3.10-at91 code. In that 
code, we also divided by 2 in device tree.



been changed to mean the rate after the fixed divider by two that
is activated as soon as the ssc clock divider (given by SSC_CMR) is
activated, and that it was a simple matter of multiplying by two to
get to the MCK rate. I further assumed that "Master Clock" in the
"Serial Clock Ratio Considerations" section was this MCK. Maybe
the mistake was to involve the peripheral clock at all?

Ok, so I may have misunderstood, but in that case what does that
mean in terms of finding the "Master Clock" rate that is mentioned
in the "Serial Clock Ratio Considerations" section? Is it perhaps the
rate of the parent clock of the given ssc clk? Or, given the above
explanation, is it correct to simply multiply by two as I have done?


The "Master Clock" actually is the same as "Peripheral clock".

Thanks for your information, I will send this to our datasheet team to 
update this part.



[snip]

Cheers,
Peter



Best Regards,
Bo Shen
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[PATCH 0/3] ARM: at91: at91sam9n12ek: enable usb gadget support

[Bo Shen]

This patch series enable the usb gadget support on at91sam9n12ek
board. On at91sam9n12 SoC which integrate the full speed udc device.


Bo Shen (3):
  USB: gadget: at91_udc: add at91sam9n12 support
  ARM: at91: dt: at91sam9n12: add udp device node
  ARM: at91: dt: at91sam9n12ek: enable udp

 arch/arm/boot/dts/at91sam9n12.dtsi  | 9 +
 arch/arm/boot/dts/at91sam9n12ek.dts | 5 +
 drivers/usb/gadget/udc/at91_udc.c   | 9 ++---
 3 files changed, 20 insertions(+), 3 deletions(-)

-- 
2.3.0.rc0

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[PATCH 1/3] USB: gadget: at91_udc: add at91sam9n12 support

[Bo Shen]

Add at91sam9n12 SoC support.

Signed-off-by: Bo Shen 
---

 drivers/usb/gadget/udc/at91_udc.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/gadget/udc/at91_udc.c 
b/drivers/usb/gadget/udc/at91_udc.c
index c862656..f4c785f 100644
--- a/drivers/usb/gadget/udc/at91_udc.c
+++ b/drivers/usb/gadget/udc/at91_udc.c
@@ -931,7 +931,8 @@ static void pullup(struct at91_udc *udc, int is_on)
at91_udp_write(udc, AT91_UDP_TXVC, 0);
if (cpu_is_at91rm9200())
gpio_set_value(udc->board.pullup_pin, active);
-   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || 
cpu_is_at91sam9g20()) {
+   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() ||
+cpu_is_at91sam9g20() || cpu_is_at91sam9n12()) {
u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
 
txvc |= AT91_UDP_TXVC_PUON;
@@ -949,7 +950,8 @@ static void pullup(struct at91_udc *udc, int is_on)
at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
if (cpu_is_at91rm9200())
gpio_set_value(udc->board.pullup_pin, !active);
-   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || 
cpu_is_at91sam9g20()) {
+   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() ||
+cpu_is_at91sam9g20() || cpu_is_at91sam9n12()) {
u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
 
txvc &= ~AT91_UDP_TXVC_PUON;
@@ -1758,7 +1760,8 @@ static int at91udc_probe(struct platform_device *pdev)
}
 
/* newer chips have more FIFO memory than rm9200 */
-   if (cpu_is_at91sam9260() || cpu_is_at91sam9g20()) {
+   if (cpu_is_at91sam9260() || cpu_is_at91sam9g20() ||
+   cpu_is_at91sam9n12()) {
udc->ep[0].maxpacket = 64;
udc->ep[3].maxpacket = 64;
udc->ep[4].maxpacket = 512;
-- 
2.3.0.rc0

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[PATCH 3/3] ARM: at91: dt: at91sam9n12ek: enable udp

[Bo Shen]

Enable usb device port on at91sam9n12ek board.

Signed-off-by: Bo Shen 
---

 arch/arm/boot/dts/at91sam9n12ek.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts 
b/arch/arm/boot/dts/at91sam9n12ek.dts
index 13bb24e..3e572e5 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -120,6 +120,11 @@
};
};
 
+   usb1: gadget@f803c000 {
+   atmel,vbus-gpio = < 16 GPIO_ACTIVE_HIGH>;
+   status = "okay";
+   };
+
watchdog@fe40 {
status = "okay";
};
-- 
2.3.0.rc0

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[PATCH 2/3] ARM: at91: dt: at91sam9n12: add udp device node

[Bo Shen]

Add usb device node for at91sam9n12.

Signed-off-by: Bo Shen 
---

 arch/arm/boot/dts/at91sam9n12.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi 
b/arch/arm/boot/dts/at91sam9n12.dtsi
index 68eb9ad..6120e03 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -901,6 +901,15 @@
clocks = <_clk>;
status = "disabled";
};
+
+   usb1: gadget@f803c000 {
+   compatible = "atmel,at91rm9200-udc";
+   reg = <0xf803c000 0x4000>;
+   interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
+   clocks = <>, <_clk>, <>;
+   clock-names = "usb_clk", "udc_clk", "udpck";
+   status = "disabled";
+   };
};
 
nand0: nand@4000 {
-- 
2.3.0.rc0

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Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

 struct atmel_ssc_state ssc_state;
+   unsigned long mck_rate;
   };

   int atmel_ssc_set_audio(int ssc_id);



Best Regards,
Bo Shen


Best Regards,
Bo Shen
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Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

Hi Peter,

On 02/09/2015 03:35 PM, Peter Rosin wrote:

Bo Shen wrote:

Hi Peter,


Hi!


On 02/07/2015 06:51 PM, Peter Rosin wrote:

Mark Brown wrote:

On Wed, Feb 04, 2015 at 12:52:25PM +0100, Peter Rosin wrote:


One thing remains a bit unclear, and that is the 500ppm deduction.
Is that really warranted? The number was just pulled out of my hat...


I don't really get what this is supposed to be protecting against.


+   case SND_SOC_DAIFMT_CBM_CFS:
+   case SND_SOC_DAIFMT_CBM_CFM:
+   t.min = 8000;
+   t.max = ssc_p->mck_rate / mck_div / frame_size;
+   /* Take away 500ppm, just to be on the safe side. */
+   t.max -= t.max / 2000;
+   t.openmin = t.openmax = 0;
+   t.integer = 0;
+   ret = snd_interval_refine(i, );


As I understand it this is a straight divider rather than something
that's doing dithering or anything else more fancy.  Given that it
seems as well just to trust the clock rate we've got - we don't do
any error tracking with the clock API (perhaps we should) and for
many applications some degree of divergence from the nominal rate is
not
*too* bad for audio systems (for application specific values of "some"
and "too" of course).  If it is just dividers I'm not sure the
situation is really improved materially by knocking off the top frequency.

If we are doing something more fancy than divididing my analysis is
off base of course.


I'm thinking that the SSC samples the selected BCK pin using the
(possibly
divided) peripheral clock. Getting too near the theoretical rate limit
would be bad, if these two independent clocks drift the wrong way. At
least that is my take on it, but I don't know the internal workings of the SSC, 
so...

I was hoping that someone from Atmel could chime in? Maybe I'm totally


Sorry for late response.


No problem!


off base, and the SSC is doing this completely differently?


What you mean here? I am not sure I fully understand.


The SSC spec list a maximum rate (which varies with the direction
of various signals, ignoring that for the sake of this explanation). Lets
assume that this maximum rate is 11MHz, derived from the peripheral
clock which might be 66MHz. If you then try to input an 11MHz signal
derived from some unrelated xtal you might think it should work. My
theory was that the rate limit would be broken if the peripheral clock
wasn't really 66MHz, but instead a few ppm lower than nominal, and
the unrelated xtal was a few ppm higher than nominal.

If this matters or not depends on how the SSC is implemented.


This is to let the user to know the clock limitation, am I right?

And at the same time deal with the un-precise clock which come to SSC? 
If this case, I think we should trust the clock come to SSC.



There might be other reasons for not caring all that much about
this fringe case, and just trust the nominal rates and limits.


In our application, we're not near the limit. Therefore, it really
doesn't matter much to us.

Should I resend w/o the 500ppm deduction?

Cheers,
Peter



Best Regards,
Bo Shen


Best Regards,
Bo Shen
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[PATCH 3/3] ARM: at91: dt: at91sam9n12ek: enable udp

[Bo Shen]

Enable usb device port on at91sam9n12ek board.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 arch/arm/boot/dts/at91sam9n12ek.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts 
b/arch/arm/boot/dts/at91sam9n12ek.dts
index 13bb24e..3e572e5 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -120,6 +120,11 @@
};
};
 
+   usb1: gadget@f803c000 {
+   atmel,vbus-gpio = pioB 16 GPIO_ACTIVE_HIGH;
+   status = okay;
+   };
+
watchdog@fe40 {
status = okay;
};
-- 
2.3.0.rc0

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[PATCH 2/3] ARM: at91: dt: at91sam9n12: add udp device node

[Bo Shen]

Add usb device node for at91sam9n12.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 arch/arm/boot/dts/at91sam9n12.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi 
b/arch/arm/boot/dts/at91sam9n12.dtsi
index 68eb9ad..6120e03 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -901,6 +901,15 @@
clocks = pwm_clk;
status = disabled;
};
+
+   usb1: gadget@f803c000 {
+   compatible = atmel,at91rm9200-udc;
+   reg = 0xf803c000 0x4000;
+   interrupts = 23 IRQ_TYPE_LEVEL_HIGH 2;
+   clocks = usb, udphs_clk, udpck;
+   clock-names = usb_clk, udc_clk, udpck;
+   status = disabled;
+   };
};
 
nand0: nand@4000 {
-- 
2.3.0.rc0

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[PATCH 0/3] ARM: at91: at91sam9n12ek: enable usb gadget support

[Bo Shen]

This patch series enable the usb gadget support on at91sam9n12ek
board. On at91sam9n12 SoC which integrate the full speed udc device.


Bo Shen (3):
  USB: gadget: at91_udc: add at91sam9n12 support
  ARM: at91: dt: at91sam9n12: add udp device node
  ARM: at91: dt: at91sam9n12ek: enable udp

 arch/arm/boot/dts/at91sam9n12.dtsi  | 9 +
 arch/arm/boot/dts/at91sam9n12ek.dts | 5 +
 drivers/usb/gadget/udc/at91_udc.c   | 9 ++---
 3 files changed, 20 insertions(+), 3 deletions(-)

-- 
2.3.0.rc0

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[PATCH 1/3] USB: gadget: at91_udc: add at91sam9n12 support

[Bo Shen]

Add at91sam9n12 SoC support.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 drivers/usb/gadget/udc/at91_udc.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/gadget/udc/at91_udc.c 
b/drivers/usb/gadget/udc/at91_udc.c
index c862656..f4c785f 100644
--- a/drivers/usb/gadget/udc/at91_udc.c
+++ b/drivers/usb/gadget/udc/at91_udc.c
@@ -931,7 +931,8 @@ static void pullup(struct at91_udc *udc, int is_on)
at91_udp_write(udc, AT91_UDP_TXVC, 0);
if (cpu_is_at91rm9200())
gpio_set_value(udc-board.pullup_pin, active);
-   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || 
cpu_is_at91sam9g20()) {
+   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() ||
+cpu_is_at91sam9g20() || cpu_is_at91sam9n12()) {
u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
 
txvc |= AT91_UDP_TXVC_PUON;
@@ -949,7 +950,8 @@ static void pullup(struct at91_udc *udc, int is_on)
at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
if (cpu_is_at91rm9200())
gpio_set_value(udc-board.pullup_pin, !active);
-   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || 
cpu_is_at91sam9g20()) {
+   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() ||
+cpu_is_at91sam9g20() || cpu_is_at91sam9n12()) {
u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
 
txvc = ~AT91_UDP_TXVC_PUON;
@@ -1758,7 +1760,8 @@ static int at91udc_probe(struct platform_device *pdev)
}
 
/* newer chips have more FIFO memory than rm9200 */
-   if (cpu_is_at91sam9260() || cpu_is_at91sam9g20()) {
+   if (cpu_is_at91sam9260() || cpu_is_at91sam9g20() ||
+   cpu_is_at91sam9n12()) {
udc-ep[0].maxpacket = 64;
udc-ep[3].maxpacket = 64;
udc-ep[4].maxpacket = 512;
-- 
2.3.0.rc0

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Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

Hi Peter,

On 02/09/2015 05:07 PM, Peter Rosin wrote:

Bo Shen wrote:

Hi Peter,

On 02/09/2015 04:09 PM, Peter Rosin wrote:

[Snip]




/*-*\
 * DAI functions
@@ -200,6 +290,7 @@ static int atmel_ssc_startup(struct

snd_pcm_substream *substream,

struct atmel_ssc_info *ssc_p = ssc_info[dai-id];
struct atmel_pcm_dma_params *dma_params;
int dir, dir_mask;
+   int ret;

pr_debug(atmel_ssc_startup: SSC_SR=0x%u\n,
ssc_readl(ssc_p-ssc-regs, SR)); @@ -207,6 +298,7 @@

static

int atmel_ssc_startup(struct snd_pcm_substream *substream,
/* Enable PMC peripheral clock for this SSC */
pr_debug(atmel_ssc_dai: Starting clock\n);
clk_enable(ssc_p-ssc-clk);
+   ssc_p-mck_rate = clk_get_rate(ssc_p-ssc-clk) * 2;


Why the mck_rate is calculated in this form?


What did you have in mind? Add another clock to the ssc node in the
device tree?

IIUC, the device tree (at least normally) has the ssc clk as the
peripheral clock divided by 2, but the ssc specifies (when capturing
in the CBM/CFS
case) the rate limit as the peripheral clock divided by 3 (i.e. ssc clk / 1.5).
Since the SSC spec expresses the rate limit in terms of the peripheral
clock, this was what I came up with. I didn't want to require dt changes...


You make a misunderstand for the mck for ssc peripheral. The mck here is
not the system mck, it only related with the ssc, it is the PMC output.
For example, in device tree, the ssc clock divided by 2, then the pmc output
for ssc is system mck / 2, so the ssc mck is system mck / 2.
If divided by 4, then the ssc mck is system / 4


I think the reason for my misunderstanding might be that in the
3.10-at91 tree, the ssc clk is twice the rate compared to what it is
in the 3.18-at91 tree. This made me assume that the ssc clk had


I think maybe you didn't use the latest linux-3.10-at91 code. In that 
code, we also divided by 2 in device tree.



been changed to mean the rate after the fixed divider by two that
is activated as soon as the ssc clock divider (given by SSC_CMR) is
activated, and that it was a simple matter of multiplying by two to
get to the MCK rate. I further assumed that Master Clock in the
Serial Clock Ratio Considerations section was this MCK. Maybe
the mistake was to involve the peripheral clock at all?

Ok, so I may have misunderstood, but in that case what does that
mean in terms of finding the Master Clock rate that is mentioned
in the Serial Clock Ratio Considerations section? Is it perhaps the
rate of the parent clock of the given ssc clk? Or, given the above
explanation, is it correct to simply multiply by two as I have done?


The Master Clock actually is the same as Peripheral clock.

Thanks for your information, I will send this to our datasheet team to 
update this part.



[snip]

Cheers,
Peter



Best Regards,
Bo Shen
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Re: [PATCH 1/3] USB: gadget: at91_udc: add at91sam9n12 support

[Bo Shen]

Hi Alexandre,

On 02/09/2015 07:14 PM, Alexandre Belloni wrote:

Hi Bo,

On 09/02/2015 at 17:02:50 +0800, Bo Shen wrote :

Add at91sam9n12 SoC support.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

  drivers/usb/gadget/udc/at91_udc.c | 9 ++---
  1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/gadget/udc/at91_udc.c 
b/drivers/usb/gadget/udc/at91_udc.c
index c862656..f4c785f 100644
--- a/drivers/usb/gadget/udc/at91_udc.c
+++ b/drivers/usb/gadget/udc/at91_udc.c
@@ -931,7 +931,8 @@ static void pullup(struct at91_udc *udc, int is_on)
at91_udp_write(udc, AT91_UDP_TXVC, 0);
if (cpu_is_at91rm9200())
gpio_set_value(udc-board.pullup_pin, active);
-   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || 
cpu_is_at91sam9g20()) {
+   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() ||
+cpu_is_at91sam9g20() || cpu_is_at91sam9n12()) {


cpu_is_at91xx have been removed from the kernel, using the correct
compatible should be enough, see
http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/drivers/usb/gadget/udc/at91_udc.c?id=f0bceab4e3b528e799aba8fda8d2936fcfd41f1f


Thanks for you information. Missing this patch, check the next-20150209, 
it is here. I will base on next-20150209, so this patch no need anymore, 
only need to change the dts(i) file now.


Thanks again.




u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);

txvc |= AT91_UDP_TXVC_PUON;
@@ -949,7 +950,8 @@ static void pullup(struct at91_udc *udc, int is_on)
at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
if (cpu_is_at91rm9200())
gpio_set_value(udc-board.pullup_pin, !active);
-   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || 
cpu_is_at91sam9g20()) {
+   else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() ||
+cpu_is_at91sam9g20() || cpu_is_at91sam9n12()) {
u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);

txvc = ~AT91_UDP_TXVC_PUON;
@@ -1758,7 +1760,8 @@ static int at91udc_probe(struct platform_device *pdev)
}

/* newer chips have more FIFO memory than rm9200 */
-   if (cpu_is_at91sam9260() || cpu_is_at91sam9g20()) {
+   if (cpu_is_at91sam9260() || cpu_is_at91sam9g20() ||
+   cpu_is_at91sam9n12()) {
udc-ep[0].maxpacket = 64;
udc-ep[3].maxpacket = 64;
udc-ep[4].maxpacket = 512;
--
2.3.0.rc0


Best Regards,
Bo Shen

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[PATCH v2 1/2] ARM: at91: dt: at91sam9n12: add udp device node

[Bo Shen]

Add usb device node for at91sam9n12.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

Changes in v2: None

 arch/arm/boot/dts/at91sam9n12.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi 
b/arch/arm/boot/dts/at91sam9n12.dtsi
index c2666a7..e1b6f0b 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -913,6 +913,15 @@
clocks = pwm_clk;
status = disabled;
};
+
+   usb1: gadget@f803c000 {
+   compatible = atmel,at91sam9260-udc;
+   reg = 0xf803c000 0x4000;
+   interrupts = 23 IRQ_TYPE_LEVEL_HIGH 2;
+   clocks = udphs_clk, udpck;
+   clock-names = pclk, hclk;
+   status = disabled;
+   };
};
 
nand0: nand@4000 {
-- 
2.3.0.rc0

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[PATCH v2 0/2] ARM: at91: dt: at91sam9n12ek: enable udp device

[Bo Shen]

This patch series enable usb device support on at91sam9n12ek board.

Changes in v2:
  - Base on next-20150209 (so, remove the modification of udc driver).
  - Add pinctrl for usb1 vbus sense.

Bo Shen (2):
  ARM: at91: dt: at91sam9n12: add udp device node
  ARM: at91: dt: at91sam9n12ek: enable udp

 arch/arm/boot/dts/at91sam9n12.dtsi  |  9 +
 arch/arm/boot/dts/at91sam9n12ek.dts | 14 ++
 2 files changed, 23 insertions(+)

-- 
2.3.0.rc0

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[PATCH v2 2/2] ARM: at91: dt: at91sam9n12ek: enable udp

[Bo Shen]

Enable usb device port on at91sam9n12ek board.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

Changes in v2:
  - Add pinctrl for usb1 vbus sense.

 arch/arm/boot/dts/at91sam9n12ek.dts | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts 
b/arch/arm/boot/dts/at91sam9n12ek.dts
index 9575c0d..6123109 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -108,6 +108,13 @@
AT91_PIOB 10 
AT91_PERIPH_B AT91_PINCTRL_NONE;
};
};
+
+   usb1 {
+   pinctrl_usb1_vbus_sense: 
usb1_vbus_sense {
+   atmel,pins =
+   AT91_PIOB 16 
AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH;  /* PB16 gpio usb vbus sense, no pull 
up and deglitch */
+   };
+   };
};
 
spi0: spi@f000 {
@@ -120,6 +127,13 @@
};
};
 
+   usb1: gadget@f803c000 {
+   pinctrl-names = default;
+   pinctrl-0 = pinctrl_usb1_vbus_sense;
+   atmel,vbus-gpio = pioB 16 GPIO_ACTIVE_HIGH;
+   status = okay;
+   };
+
watchdog@fe40 {
status = okay;
};
-- 
2.3.0.rc0

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Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

Hi Peter,

On 02/09/2015 03:35 PM, Peter Rosin wrote:

Bo Shen wrote:

Hi Peter,


Hi!


On 02/07/2015 06:51 PM, Peter Rosin wrote:

Mark Brown wrote:

On Wed, Feb 04, 2015 at 12:52:25PM +0100, Peter Rosin wrote:


One thing remains a bit unclear, and that is the 500ppm deduction.
Is that really warranted? The number was just pulled out of my hat...


I don't really get what this is supposed to be protecting against.


+   case SND_SOC_DAIFMT_CBM_CFS:
+   case SND_SOC_DAIFMT_CBM_CFM:
+   t.min = 8000;
+   t.max = ssc_p-mck_rate / mck_div / frame_size;
+   /* Take away 500ppm, just to be on the safe side. */
+   t.max -= t.max / 2000;
+   t.openmin = t.openmax = 0;
+   t.integer = 0;
+   ret = snd_interval_refine(i, t);


As I understand it this is a straight divider rather than something
that's doing dithering or anything else more fancy.  Given that it
seems as well just to trust the clock rate we've got - we don't do
any error tracking with the clock API (perhaps we should) and for
many applications some degree of divergence from the nominal rate is
not
*too* bad for audio systems (for application specific values of some
and too of course).  If it is just dividers I'm not sure the
situation is really improved materially by knocking off the top frequency.

If we are doing something more fancy than divididing my analysis is
off base of course.


I'm thinking that the SSC samples the selected BCK pin using the
(possibly
divided) peripheral clock. Getting too near the theoretical rate limit
would be bad, if these two independent clocks drift the wrong way. At
least that is my take on it, but I don't know the internal workings of the SSC, 
so...

I was hoping that someone from Atmel could chime in? Maybe I'm totally


Sorry for late response.


No problem!


off base, and the SSC is doing this completely differently?


What you mean here? I am not sure I fully understand.


The SSC spec list a maximum rate (which varies with the direction
of various signals, ignoring that for the sake of this explanation). Lets
assume that this maximum rate is 11MHz, derived from the peripheral
clock which might be 66MHz. If you then try to input an 11MHz signal
derived from some unrelated xtal you might think it should work. My
theory was that the rate limit would be broken if the peripheral clock
wasn't really 66MHz, but instead a few ppm lower than nominal, and
the unrelated xtal was a few ppm higher than nominal.

If this matters or not depends on how the SSC is implemented.


This is to let the user to know the clock limitation, am I right?

And at the same time deal with the un-precise clock which come to SSC? 
If this case, I think we should trust the clock come to SSC.



There might be other reasons for not caring all that much about
this fringe case, and just trust the nominal rates and limits.


In our application, we're not near the limit. Therefore, it really
doesn't matter much to us.

Should I resend w/o the 500ppm deduction?

Cheers,
Peter



Best Regards,
Bo Shen


Best Regards,
Bo Shen
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Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

 Shen


Best Regards,
Bo Shen
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Re: [PATCH 3/3] ARM: at91: dt: at91sam9n12ek: enable udp

[Bo Shen]

Hi Sylvain,

On 02/09/2015 06:04 PM, Sylvain Rochet wrote:

Hello Bo,

On Mon, Feb 09, 2015 at 05:02:52PM +0800, Bo Shen wrote:

Enable usb device port on at91sam9n12ek board.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

  arch/arm/boot/dts/at91sam9n12ek.dts | 5 +
  1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts 
b/arch/arm/boot/dts/at91sam9n12ek.dts
index 13bb24e..3e572e5 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -120,6 +120,11 @@
};
};

+   usb1: gadget@f803c000 {
+   atmel,vbus-gpio = pioB 16 GPIO_ACTIVE_HIGH;
+   status = okay;
+   };
+


There is an external resistor divider on PB16, acting like a pull-down
(R22+R23). PB16 reset state is input, pull-up, schmitt trigger, you need
to disable the pull-up in pinctrl this way:

usb1: gadget@f803c000 {
pinctrl-names = default;
pinctrl-0 = pinctrl_board_usb1;
…
}

pinctrl … {
usb1 {
pinctrl_board_usb1: usb1-board {
atmel,pins = AT91_PIOB 16 AT91_PERIPH_GPIO 
AT91_PINCTRL_DEGLITCH;/* PB16, no pull up and deglitch */
};
};
};


Thanks.

I will add it in next version.



Sylvain



Best Regards,
Bo Shen

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Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

Hi Peter,

On 02/09/2015 06:25 PM, Peter Rosin wrote:

Bo Shen wrote:

Hi Peter,



Hi!


On 02/09/2015 05:07 PM, Peter Rosin wrote:

Bo Shen wrote:

Hi Peter,

On 02/09/2015 04:09 PM, Peter Rosin wrote:

[Snip]



 
/*-*\
  * DAI functions
@@ -200,6 +290,7 @@ static int atmel_ssc_startup(struct

snd_pcm_substream *substream,

struct atmel_ssc_info *ssc_p = ssc_info[dai-id];
struct atmel_pcm_dma_params *dma_params;
int dir, dir_mask;
+   int ret;

pr_debug(atmel_ssc_startup: SSC_SR=0x%u\n,
ssc_readl(ssc_p-ssc-regs, SR)); @@ -207,6 +298,7

@@

static

int atmel_ssc_startup(struct snd_pcm_substream *substream,
/* Enable PMC peripheral clock for this SSC */
pr_debug(atmel_ssc_dai: Starting clock\n);
clk_enable(ssc_p-ssc-clk);
+   ssc_p-mck_rate = clk_get_rate(ssc_p-ssc-clk) * 2;


Why the mck_rate is calculated in this form?


What did you have in mind? Add another clock to the ssc node in the
device tree?

IIUC, the device tree (at least normally) has the ssc clk as the
peripheral clock divided by 2, but the ssc specifies (when capturing
in the CBM/CFS
case) the rate limit as the peripheral clock divided by 3 (i.e. ssc clk / 1.5).
Since the SSC spec expresses the rate limit in terms of the
peripheral clock, this was what I came up with. I didn't want to require dt

changes...


You make a misunderstand for the mck for ssc peripheral. The mck here
is not the system mck, it only related with the ssc, it is the PMC output.
For example, in device tree, the ssc clock divided by 2, then the pmc
output for ssc is system mck / 2, so the ssc mck is system mck / 2.
If divided by 4, then the ssc mck is system / 4


I think the reason for my misunderstanding might be that in the
3.10-at91 tree, the ssc clk is twice the rate compared to what it is
in the 3.18-at91 tree. This made me assume that the ssc clk had


I think maybe you didn't use the latest linux-3.10-at91 code. In that code, we
also divided by 2 in device tree.


That's a rather confusing statement. The clock tree isn't even managed
by the device tree in linux-3.10-at91. Sure, there's the 12MHz system
master clock in sama5d3.dtsi, but that's about it. The rest of the clocks
are in arch/arm/mach-at91/sama5d3.c. And the part about ssc0/ssc1
hasn't been updated since it was added in 3.9. What am I missing?


I am not sure what the kernel you are talking about now.

In linux-3.10-at91 branch on github.com/linux4sam/linux-at91. In the 
arch/arm/mach-at91/sama5d3.c


---8---
static struct clk ssc0_clk = {
.name   = ssc0_clk,
.pid= SAMA5D3_ID_SSC0,
.type   = CLK_TYPE_PERIPHERAL,
.div= AT91_PMC_PCR_DIV2,
};
static struct clk ssc1_clk = {
.name   = ssc1_clk,
.pid= SAMA5D3_ID_SSC1,
.type   = CLK_TYPE_PERIPHERAL,
.div= AT91_PMC_PCR_DIV2,
};
---8---

That means, the clock output from PMC is system clock / 2 which will 
be fed to ssc (here we call it SSC peripheral clock = system clock / 2).



been changed to mean the rate after the fixed divider by two that is
activated as soon as the ssc clock divider (given by SSC_CMR) is
activated, and that it was a simple matter of multiplying by two to
get to the MCK rate. I further assumed that Master Clock in the
Serial Clock Ratio Considerations section was this MCK. Maybe the
mistake was to involve the peripheral clock at all?

Ok, so I may have misunderstood, but in that case what does that mean
in terms of finding the Master Clock rate that is mentioned in the
Serial Clock Ratio Considerations section? Is it perhaps the rate of
the parent clock of the given ssc clk? Or, given the above
explanation, is it correct to simply multiply by two as I have done?


The Master Clock actually is the same as Peripheral clock.

Thanks for your information, I will send this to our datasheet team to update
this part.


You are still not saying how to get to the Master Clock rate (i.e. the
Master Clock that is mentioned in the Serial Clock Ratio Considerations
section. You are only implying that multiplying the ssc clock rate with 2 is
wrong for some reason.


I mean in that section you mentioned. The Master Clock is the same as 
Peripheral Clock. So, you get the SSC peripheral clock is what the 
clock (Master Clock) you try to get ( clk_get_rate(ssc_p-ssc-clk)).



Are you saying that the ssc clock is supposed to be this Master Clock?

Cheers,
Peter



Best Regards,
Bo Shen
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Re: [PATCH v3] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

Hi Peter,

On 02/09/2015 11:08 PM, Peter Rosin wrote:

From: Peter Rosin p...@axentia.se

When the SSC acts as BCK master, use a ratnum rule to limit
the rate instead of only doing the standard rates. When the SSC
acts as BCK slave, allow any BCK frequency up to the SSC master
clock, divided by either of 2, 3 or 6.

Put a cap at 384kHz. Who's /ever/ going to need more than that?

The divider of 2, 3 or 6 is selected based on the Serial Clock Ratio
Considerations section from the SSC documentation:

 The Transmitter and the Receiver can be programmed to operate
 with the clock signals provided on either the TK or RK pins.
 This allows the SSC to support many slave-mode data transfers.
 In this case, the maximum clock speed allowed on the RK pin is:
 - Peripheral clock divided by 2 if Receiver Frame Synchro is input
 - Peripheral clock divided by 3 if Receiver Frame Synchro is output
 In addition, the maximum clock speed allowed on the TK pin is:
 - Peripheral clock divided by 6 if Transmit Frame Synchro is input
 - Peripheral clock divided by 2 if Transmit Frame Synchro is output

Signed-off-by: Peter Rosin p...@axentia.se


Thanks for your patch.

Acked-by: Bo Shen voice.s...@atmel.com


---
  sound/soc/atmel/atmel_ssc_dai.c |  111 +--
  sound/soc/atmel/atmel_ssc_dai.h |1 +
  2 files changed, 108 insertions(+), 4 deletions(-)

Changes since v2:

- Killed the 500ppm reduction. Just trust the nominal clock
   rates of the given clocks.

- Don't multiply the given SSC clk rate by two to get to the
   SSC master clock rate. That factor was the result of some
   confusion on my part. The SSC clk *is* the SSC master clock.

Changes since v1:

- I have checked all Atmel datasheets I could get my hands on (and
   that seemed relevant), and in every instance where they have
   described the SSC, the description have the exact rate limitations
   on the RK and TK pin that I have implemented here.

- Improved the comments.

- Rebased on top of the latest patches from Bo Chen.

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 379ac2a6ab16..6b8e64899205 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -187,6 +187,94 @@ static irqreturn_t atmel_ssc_interrupt(int irq, void 
*dev_id)
return IRQ_HANDLED;
  }

+/*
+ * When the bit clock is input, limit the maximum rate according to the
+ * Serial Clock Ratio Considerations section from the SSC documentation:
+ *
+ *   The Transmitter and the Receiver can be programmed to operate
+ *   with the clock signals provided on either the TK or RK pins.
+ *   This allows the SSC to support many slave-mode data transfers.
+ *   In this case, the maximum clock speed allowed on the RK pin is:
+ *   - Peripheral clock divided by 2 if Receiver Frame Synchro is input
+ *   - Peripheral clock divided by 3 if Receiver Frame Synchro is output
+ *   In addition, the maximum clock speed allowed on the TK pin is:
+ *   - Peripheral clock divided by 6 if Transmit Frame Synchro is input
+ *   - Peripheral clock divided by 2 if Transmit Frame Synchro is output
+ *
+ * When the bit clock is output, limit the rate according to the
+ * SSC divider restrictions.
+ */
+static int atmel_ssc_hw_rule_rate(struct snd_pcm_hw_params *params,
+ struct snd_pcm_hw_rule *rule)
+{
+   struct atmel_ssc_info *ssc_p = rule-private;
+   struct ssc_device *ssc = ssc_p-ssc;
+   struct snd_interval *i = hw_param_interval(params, rule-var);
+   struct snd_interval t;
+   struct snd_ratnum r = {
+   .den_min = 1,
+   .den_max = 4095,
+   .den_step = 1,
+   };
+   unsigned int num = 0, den = 0;
+   int frame_size;
+   int mck_div = 2;
+   int ret;
+
+   frame_size = snd_soc_params_to_frame_size(params);
+   if (frame_size  0)
+   return frame_size;
+
+   switch (ssc_p-daifmt  SND_SOC_DAIFMT_MASTER_MASK) {
+   case SND_SOC_DAIFMT_CBM_CFS:
+   if ((ssc_p-dir_mask  SSC_DIR_MASK_CAPTURE)
+ssc-clk_from_rk_pin)
+   /* Receiver Frame Synchro (i.e. capture)
+* is output (format is _CFS) and the RK pin
+* is used for input (format is _CBM_).
+*/
+   mck_div = 3;
+   break;
+
+   case SND_SOC_DAIFMT_CBM_CFM:
+   if ((ssc_p-dir_mask  SSC_DIR_MASK_PLAYBACK)
+!ssc-clk_from_rk_pin)
+   /* Transmit Frame Synchro (i.e. playback)
+* is input (format is _CFM) and the TK pin
+* is used for input (format _CBM_ but not
+* using the RK pin).
+*/
+   mck_div = 6;
+   break;
+   }
+
+   switch (ssc_p-daifmt

Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

   ret = snd_interval_ratnum(i, 1, , , );
+   if (ret >= 0 && den && rule->var == SNDRV_PCM_HW_PARAM_RATE) {
+   params->rate_num = num;
+   params->rate_den = den;
+   }
+   break;
+
+   case SND_SOC_DAIFMT_CBM_CFS:
+   case SND_SOC_DAIFMT_CBM_CFM:
+   t.min = 8000;
+   t.max = ssc_p->mck_rate / mck_div / frame_size;
+   /* Take away 500ppm, just to be on the safe side. */
+   t.max -= t.max / 2000;
+   t.openmin = t.openmax = 0;
+   t.integer = 0;
+   ret = snd_interval_refine(i, );
+   break;
+
+   default:
+   ret = -EINVAL;
+   break;
+   }
+
+   return ret;
+}

  /*-*\
   * DAI functions
@@ -200,6 +290,7 @@ static int atmel_ssc_startup(struct snd_pcm_substream 
*substream,
struct atmel_ssc_info *ssc_p = _info[dai->id];
struct atmel_pcm_dma_params *dma_params;
int dir, dir_mask;
+   int ret;

pr_debug("atmel_ssc_startup: SSC_SR=0x%u\n",
ssc_readl(ssc_p->ssc->regs, SR));
@@ -207,6 +298,7 @@ static int atmel_ssc_startup(struct snd_pcm_substream 
*substream,
/* Enable PMC peripheral clock for this SSC */
pr_debug("atmel_ssc_dai: Starting clock\n");
clk_enable(ssc_p->ssc->clk);
+   ssc_p->mck_rate = clk_get_rate(ssc_p->ssc->clk) * 2;


Why the mck_rate is calculated in this form?


/* Reset the SSC to keep it at a clean status */
ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
@@ -219,6 +311,17 @@ static int atmel_ssc_startup(struct snd_pcm_substream 
*substream,
dir_mask = SSC_DIR_MASK_CAPTURE;
}

+   ret = snd_pcm_hw_rule_add(substream->runtime, 0,
+ SNDRV_PCM_HW_PARAM_RATE,
+ atmel_ssc_hw_rule_rate,
+ ssc_p,
+ SNDRV_PCM_HW_PARAM_FRAME_BITS,
+ SNDRV_PCM_HW_PARAM_CHANNELS, -1);
+   if (ret < 0) {
+   dev_err(dai->dev, "Failed to specify rate rule: %d\n", ret);
+   return ret;
+   }
+
dma_params = _dma_params[dai->id][dir];
dma_params->ssc = ssc_p->ssc;
dma_params->substream = substream;
@@ -783,8 +886,6 @@ static int atmel_ssc_resume(struct snd_soc_dai *cpu_dai)
  #  define atmel_ssc_resumeNULL
  #endif /* CONFIG_PM */

-#define ATMEL_SSC_RATES (SNDRV_PCM_RATE_8000_96000)
-
  #define ATMEL_SSC_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE 
|\
  SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)

@@ -804,12 +905,16 @@ static struct snd_soc_dai_driver atmel_ssc_dai = {
.playback = {
.channels_min = 1,
.channels_max = 2,
-   .rates = ATMEL_SSC_RATES,
+   .rates = SNDRV_PCM_RATE_CONTINUOUS,
+   .rate_min = 8000,
+   .rate_max = 384000,


Why this need to be changed? Do you mean in your application, the rates 
will exceed 96000?



.formats = ATMEL_SSC_FORMATS,},
.capture = {
.channels_min = 1,
.channels_max = 2,
-   .rates = ATMEL_SSC_RATES,
+   .rates = SNDRV_PCM_RATE_CONTINUOUS,
+   .rate_min = 8000,
+   .rate_max = 384000,


Ditto.


.formats = ATMEL_SSC_FORMATS,},
.ops = _ssc_dai_ops,
  };
diff --git a/sound/soc/atmel/atmel_ssc_dai.h b/sound/soc/atmel/atmel_ssc_dai.h
index b1f08d511495..80b153857a88 100644
--- a/sound/soc/atmel/atmel_ssc_dai.h
+++ b/sound/soc/atmel/atmel_ssc_dai.h
@@ -115,6 +115,7 @@ struct atmel_ssc_info {
unsigned short rcmr_period;
struct atmel_pcm_dma_params *dma_params[2];
struct atmel_ssc_state ssc_state;
+   unsigned long mck_rate;
  };

  int atmel_ssc_set_audio(int ssc_id);



Best Regards,
Bo Shen
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Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

Hi Peter,

On 02/07/2015 06:51 PM, Peter Rosin wrote:

Mark Brown wrote:

On Wed, Feb 04, 2015 at 12:52:25PM +0100, Peter Rosin wrote:


One thing remains a bit unclear, and that is the 500ppm deduction. Is
that really warranted? The number was just pulled out of my hat...


I don't really get what this is supposed to be protecting against.


+   case SND_SOC_DAIFMT_CBM_CFS:
+   case SND_SOC_DAIFMT_CBM_CFM:
+   t.min = 8000;
+   t.max = ssc_p->mck_rate / mck_div / frame_size;
+   /* Take away 500ppm, just to be on the safe side. */
+   t.max -= t.max / 2000;
+   t.openmin = t.openmax = 0;
+   t.integer = 0;
+   ret = snd_interval_refine(i, );


As I understand it this is a straight divider rather than something that's doing
dithering or anything else more fancy.  Given that it seems as well just to
trust the clock rate we've got - we don't do any error tracking with the clock
API (perhaps we should) and for many applications some degree of
divergence from the nominal rate is not
*too* bad for audio systems (for application specific values of "some"
and "too" of course).  If it is just dividers I'm not sure the situation is 
really
improved materially by knocking off the top frequency.

If we are doing something more fancy than divididing my analysis is off base
of course.


I'm thinking that the SSC samples the selected BCK pin using the (possibly
divided) peripheral clock. Getting too near the theoretical rate limit would
be bad, if these two independent clocks drift the wrong way. At least that
is my take on it, but I don't know the internal workings of the SSC, so...

I was hoping that someone from Atmel could chime in? Maybe I'm totally


Sorry for late response.


off base, and the SSC is doing this completely differently?


What you mean here? I am not sure I fully understand.


In our application, we're not near the limit. Therefore, it really doesn't
matter much to us.

Should I resend w/o the 500ppm deduction?

Cheers,
Peter



Best Regards,
Bo Shen
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Re: [PATCH 2/3] ASoC: atmel_ssc_dai: refactor the startup and shutdown

[Bo Shen]

Hi Mark,

On 01/30/2015 09:20 PM, Mark Brown wrote:

On Fri, Jan 30, 2015 at 05:38:43PM +0800, Bo Shen wrote:

In startup function, enable ssc clock and in shutdown function,
disable clock. And also remove disable ssc in shutdown function,
as ssc is disabled in prepare function.


Applied, thanks.  You probably want to convert to clk_prepare_enable()
too but that's a separate thing.


OK, thanks, I will check that. As now, we prepare clock in ssc driver, 
then enable it in dai driver.


Best Regards,
Bo Shen

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Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

);
+   if (ret = 0  den  rule-var == SNDRV_PCM_HW_PARAM_RATE) {
+   params-rate_num = num;
+   params-rate_den = den;
+   }
+   break;
+
+   case SND_SOC_DAIFMT_CBM_CFS:
+   case SND_SOC_DAIFMT_CBM_CFM:
+   t.min = 8000;
+   t.max = ssc_p-mck_rate / mck_div / frame_size;
+   /* Take away 500ppm, just to be on the safe side. */
+   t.max -= t.max / 2000;
+   t.openmin = t.openmax = 0;
+   t.integer = 0;
+   ret = snd_interval_refine(i, t);
+   break;
+
+   default:
+   ret = -EINVAL;
+   break;
+   }
+
+   return ret;
+}

  /*-*\
   * DAI functions
@@ -200,6 +290,7 @@ static int atmel_ssc_startup(struct snd_pcm_substream 
*substream,
struct atmel_ssc_info *ssc_p = ssc_info[dai-id];
struct atmel_pcm_dma_params *dma_params;
int dir, dir_mask;
+   int ret;

pr_debug(atmel_ssc_startup: SSC_SR=0x%u\n,
ssc_readl(ssc_p-ssc-regs, SR));
@@ -207,6 +298,7 @@ static int atmel_ssc_startup(struct snd_pcm_substream 
*substream,
/* Enable PMC peripheral clock for this SSC */
pr_debug(atmel_ssc_dai: Starting clock\n);
clk_enable(ssc_p-ssc-clk);
+   ssc_p-mck_rate = clk_get_rate(ssc_p-ssc-clk) * 2;


Why the mck_rate is calculated in this form?


/* Reset the SSC to keep it at a clean status */
ssc_writel(ssc_p-ssc-regs, CR, SSC_BIT(CR_SWRST));
@@ -219,6 +311,17 @@ static int atmel_ssc_startup(struct snd_pcm_substream 
*substream,
dir_mask = SSC_DIR_MASK_CAPTURE;
}

+   ret = snd_pcm_hw_rule_add(substream-runtime, 0,
+ SNDRV_PCM_HW_PARAM_RATE,
+ atmel_ssc_hw_rule_rate,
+ ssc_p,
+ SNDRV_PCM_HW_PARAM_FRAME_BITS,
+ SNDRV_PCM_HW_PARAM_CHANNELS, -1);
+   if (ret  0) {
+   dev_err(dai-dev, Failed to specify rate rule: %d\n, ret);
+   return ret;
+   }
+
dma_params = ssc_dma_params[dai-id][dir];
dma_params-ssc = ssc_p-ssc;
dma_params-substream = substream;
@@ -783,8 +886,6 @@ static int atmel_ssc_resume(struct snd_soc_dai *cpu_dai)
  #  define atmel_ssc_resumeNULL
  #endif /* CONFIG_PM */

-#define ATMEL_SSC_RATES (SNDRV_PCM_RATE_8000_96000)
-
  #define ATMEL_SSC_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE 
|\
  SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)

@@ -804,12 +905,16 @@ static struct snd_soc_dai_driver atmel_ssc_dai = {
.playback = {
.channels_min = 1,
.channels_max = 2,
-   .rates = ATMEL_SSC_RATES,
+   .rates = SNDRV_PCM_RATE_CONTINUOUS,
+   .rate_min = 8000,
+   .rate_max = 384000,


Why this need to be changed? Do you mean in your application, the rates 
will exceed 96000?



.formats = ATMEL_SSC_FORMATS,},
.capture = {
.channels_min = 1,
.channels_max = 2,
-   .rates = ATMEL_SSC_RATES,
+   .rates = SNDRV_PCM_RATE_CONTINUOUS,
+   .rate_min = 8000,
+   .rate_max = 384000,


Ditto.


.formats = ATMEL_SSC_FORMATS,},
.ops = atmel_ssc_dai_ops,
  };
diff --git a/sound/soc/atmel/atmel_ssc_dai.h b/sound/soc/atmel/atmel_ssc_dai.h
index b1f08d511495..80b153857a88 100644
--- a/sound/soc/atmel/atmel_ssc_dai.h
+++ b/sound/soc/atmel/atmel_ssc_dai.h
@@ -115,6 +115,7 @@ struct atmel_ssc_info {
unsigned short rcmr_period;
struct atmel_pcm_dma_params *dma_params[2];
struct atmel_ssc_state ssc_state;
+   unsigned long mck_rate;
  };

  int atmel_ssc_set_audio(int ssc_id);



Best Regards,
Bo Shen
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Re: [PATCH v2] ASoC: atmel_ssc_dai: Allow more rates

[Bo Shen]

Hi Peter,

On 02/07/2015 06:51 PM, Peter Rosin wrote:

Mark Brown wrote:

On Wed, Feb 04, 2015 at 12:52:25PM +0100, Peter Rosin wrote:


One thing remains a bit unclear, and that is the 500ppm deduction. Is
that really warranted? The number was just pulled out of my hat...


I don't really get what this is supposed to be protecting against.


+   case SND_SOC_DAIFMT_CBM_CFS:
+   case SND_SOC_DAIFMT_CBM_CFM:
+   t.min = 8000;
+   t.max = ssc_p-mck_rate / mck_div / frame_size;
+   /* Take away 500ppm, just to be on the safe side. */
+   t.max -= t.max / 2000;
+   t.openmin = t.openmax = 0;
+   t.integer = 0;
+   ret = snd_interval_refine(i, t);


As I understand it this is a straight divider rather than something that's doing
dithering or anything else more fancy.  Given that it seems as well just to
trust the clock rate we've got - we don't do any error tracking with the clock
API (perhaps we should) and for many applications some degree of
divergence from the nominal rate is not
*too* bad for audio systems (for application specific values of some
and too of course).  If it is just dividers I'm not sure the situation is 
really
improved materially by knocking off the top frequency.

If we are doing something more fancy than divididing my analysis is off base
of course.


I'm thinking that the SSC samples the selected BCK pin using the (possibly
divided) peripheral clock. Getting too near the theoretical rate limit would
be bad, if these two independent clocks drift the wrong way. At least that
is my take on it, but I don't know the internal workings of the SSC, so...

I was hoping that someone from Atmel could chime in? Maybe I'm totally


Sorry for late response.


off base, and the SSC is doing this completely differently?


What you mean here? I am not sure I fully understand.


In our application, we're not near the limit. Therefore, it really doesn't
matter much to us.

Should I resend w/o the 500ppm deduction?

Cheers,
Peter



Best Regards,
Bo Shen
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Re: [PATCH 2/3] ASoC: atmel_ssc_dai: refactor the startup and shutdown

[Bo Shen]

Hi Mark,

On 01/30/2015 09:20 PM, Mark Brown wrote:

On Fri, Jan 30, 2015 at 05:38:43PM +0800, Bo Shen wrote:

In startup function, enable ssc clock and in shutdown function,
disable clock. And also remove disable ssc in shutdown function,
as ssc is disabled in prepare function.


Applied, thanks.  You probably want to convert to clk_prepare_enable()
too but that's a separate thing.


OK, thanks, I will check that. As now, we prepare clock in ssc driver, 
then enable it in dai driver.


Best Regards,
Bo Shen

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[PATCH] ASoC: wm8731: let codec to manage clock by itself

[Bo Shen]

Let the wm8731 codec to manage clock by itself.

Signed-off-by: Bo Shen 
---

 sound/soc/codecs/wm8731.c | 28 
 1 file changed, 28 insertions(+)

diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index b115ed8..ecd8424 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -13,6 +13,7 @@
  * published by the Free Software Foundation.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -45,6 +46,7 @@ static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = 
{
 /* codec private data */
 struct wm8731_priv {
struct regmap *regmap;
+   struct clk *mclk;
struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
const struct snd_pcm_hw_constraint_list *constraints;
unsigned int sysclk;
@@ -389,6 +391,9 @@ static int wm8731_set_dai_sysclk(struct snd_soc_dai 
*codec_dai,
switch (clk_id) {
case WM8731_SYSCLK_XTAL:
case WM8731_SYSCLK_MCLK:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   if (clk_set_rate(wm8731->mclk, freq))
+   return -EINVAL;
wm8731->sysclk_type = clk_id;
break;
default:
@@ -490,6 +495,9 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,
 
switch (level) {
case SND_SOC_BIAS_ON:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   if (clk_prepare_enable(wm8731->mclk))
+   return -EINVAL;
break;
case SND_SOC_BIAS_PREPARE:
break;
@@ -508,6 +516,8 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,
snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
break;
case SND_SOC_BIAS_OFF:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   clk_disable_unprepare(wm8731->mclk);
snd_soc_write(codec, WM8731_PWR, 0x);
regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
   wm8731->supplies);
@@ -666,6 +676,15 @@ static int wm8731_spi_probe(struct spi_device *spi)
if (wm8731 == NULL)
return -ENOMEM;
 
+   if (IS_ENABLED(CONFIG_COMMON_CLK)) {
+   wm8731->mclk = devm_clk_get(>dev, "mclk");
+   if (IS_ERR(wm8731->mclk)) {
+   ret = PTR_ERR(wm8731->mclk);
+   dev_err(>dev, "Failed to get MCLK\n");
+   return ret;
+   }
+   }
+
mutex_init(>lock);
 
wm8731->regmap = devm_regmap_init_spi(spi, _regmap);
@@ -717,6 +736,15 @@ static int wm8731_i2c_probe(struct i2c_client *i2c,
if (wm8731 == NULL)
return -ENOMEM;
 
+   if (IS_ENABLED(CONFIG_COMMON_CLK)) {
+   wm8731->mclk = devm_clk_get(>dev, "mclk");
+   if (IS_ERR(wm8731->mclk)) {
+   ret = PTR_ERR(wm8731->mclk);
+   dev_err(>dev, "Failed to get MCLK\n");
+   return ret;
+   }
+   }
+
mutex_init(>lock);
 
wm8731->regmap = devm_regmap_init_i2c(i2c, _regmap);
-- 
2.3.0.rc0

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[PATCH] ASoC: wm8731: let codec to manage clock by itself

[Bo Shen]

Let the wm8731 codec to manage clock by itself.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 sound/soc/codecs/wm8731.c | 28 
 1 file changed, 28 insertions(+)

diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index b115ed8..ecd8424 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -13,6 +13,7 @@
  * published by the Free Software Foundation.
  */
 
+#include linux/clk.h
 #include linux/module.h
 #include linux/moduleparam.h
 #include linux/init.h
@@ -45,6 +46,7 @@ static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = 
{
 /* codec private data */
 struct wm8731_priv {
struct regmap *regmap;
+   struct clk *mclk;
struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
const struct snd_pcm_hw_constraint_list *constraints;
unsigned int sysclk;
@@ -389,6 +391,9 @@ static int wm8731_set_dai_sysclk(struct snd_soc_dai 
*codec_dai,
switch (clk_id) {
case WM8731_SYSCLK_XTAL:
case WM8731_SYSCLK_MCLK:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   if (clk_set_rate(wm8731-mclk, freq))
+   return -EINVAL;
wm8731-sysclk_type = clk_id;
break;
default:
@@ -490,6 +495,9 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,
 
switch (level) {
case SND_SOC_BIAS_ON:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   if (clk_prepare_enable(wm8731-mclk))
+   return -EINVAL;
break;
case SND_SOC_BIAS_PREPARE:
break;
@@ -508,6 +516,8 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,
snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
break;
case SND_SOC_BIAS_OFF:
+   if (IS_ENABLED(CONFIG_COMMON_CLK))
+   clk_disable_unprepare(wm8731-mclk);
snd_soc_write(codec, WM8731_PWR, 0x);
regulator_bulk_disable(ARRAY_SIZE(wm8731-supplies),
   wm8731-supplies);
@@ -666,6 +676,15 @@ static int wm8731_spi_probe(struct spi_device *spi)
if (wm8731 == NULL)
return -ENOMEM;
 
+   if (IS_ENABLED(CONFIG_COMMON_CLK)) {
+   wm8731-mclk = devm_clk_get(spi-dev, mclk);
+   if (IS_ERR(wm8731-mclk)) {
+   ret = PTR_ERR(wm8731-mclk);
+   dev_err(spi-dev, Failed to get MCLK\n);
+   return ret;
+   }
+   }
+
mutex_init(wm8731-lock);
 
wm8731-regmap = devm_regmap_init_spi(spi, wm8731_regmap);
@@ -717,6 +736,15 @@ static int wm8731_i2c_probe(struct i2c_client *i2c,
if (wm8731 == NULL)
return -ENOMEM;
 
+   if (IS_ENABLED(CONFIG_COMMON_CLK)) {
+   wm8731-mclk = devm_clk_get(i2c-dev, mclk);
+   if (IS_ERR(wm8731-mclk)) {
+   ret = PTR_ERR(wm8731-mclk);
+   dev_err(i2c-dev, Failed to get MCLK\n);
+   return ret;
+   }
+   }
+
mutex_init(wm8731-lock);
 
wm8731-regmap = devm_regmap_init_i2c(i2c, wm8731_regmap);
-- 
2.3.0.rc0

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Re: [RFC PATCH] ASoC: wm8731: let codec to manage clock by itself

[Bo Shen]

Hi Mark,

On 02/04/2015 12:21 AM, Mark Brown wrote:

On Tue, Feb 03, 2015 at 03:40:45PM +0100, Manuel Lauss wrote:

On Tue, Feb 3, 2015 at 1:44 PM, Mark Brown  wrote:



+wm8731->mclk = devm_clk_get(>dev, "mclk");
+if (IS_ERR(wm8731->mclk)) {
+wm8731->mclk = NULL;
+dev_warn(>dev, "assuming static MCLK\n");
+}



This is broken for both deferred probe and in the case where the clock
API genuinely returns a NULL clock.  Other than that it's the kind of
thing that we've done for some other drivers, though it's not good to
have to do this.  Check them for correct behaviour.



Hm, so the only option is to create the simples possible 12MHz clk object?


Well, that's the best option in general.  You can get away with just
making sure that -EPROBE_DEFER is handled and that IS_ERR() is used to
check for an invalid clock but if you can define a clock that's even
better (and should be pretty painless), we're going to want to do that
transition at some point.


Do you mean I send my RFC patch as the formal patch, and let other 
boards which use the wm8731 to add clk object, am I right?


Best Regards,
Bo Shen

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Re: [RFC PATCH] ASoC: wm8731: let codec to manage clock by itself

[Bo Shen]

Hi Mark,

On 02/04/2015 12:21 AM, Mark Brown wrote:

On Tue, Feb 03, 2015 at 03:40:45PM +0100, Manuel Lauss wrote:

On Tue, Feb 3, 2015 at 1:44 PM, Mark Brown broo...@kernel.org wrote:



+wm8731-mclk = devm_clk_get(spi-dev, mclk);
+if (IS_ERR(wm8731-mclk)) {
+wm8731-mclk = NULL;
+dev_warn(spi-dev, assuming static MCLK\n);
+}



This is broken for both deferred probe and in the case where the clock
API genuinely returns a NULL clock.  Other than that it's the kind of
thing that we've done for some other drivers, though it's not good to
have to do this.  Check them for correct behaviour.



Hm, so the only option is to create the simples possible 12MHz clk object?


Well, that's the best option in general.  You can get away with just
making sure that -EPROBE_DEFER is handled and that IS_ERR() is used to
check for an invalid clock but if you can define a clock that's even
better (and should be pretty painless), we're going to want to do that
transition at some point.


Do you mean I send my RFC patch as the formal patch, and let other 
boards which use the wm8731 to add clk object, am I right?


Best Regards,
Bo Shen

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[RFC PATCH] ASoC: wm8731: let codec to manage clock by itself

[Bo Shen]

Let the wm8731 codec to manage clock by itself.

As all at91 related boards have been switch to CCF framework. So, on
the at91 related boards which use wm8731 will let it manage the clock,
or else the board use wm8731 is broken.

However, at the same time the wm8731 codec is used on other boards,
I am sure this change will broken some boards.

For example: poodle and corgi based on PXA SoC (in default configuration
file, no one use it). DB1200 board which is a mips based board. So I have
no idea how to fix them.

So, my suggestion is to add CCF check based on the following patch? Any
idea or suggestions?

Signed-off-by: Bo Shen 
---

 sound/soc/codecs/wm8731.c | 20 
 1 file changed, 20 insertions(+)

diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index b9211b4..83f75d66 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -13,6 +13,7 @@
  * published by the Free Software Foundation.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -45,6 +46,7 @@ static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = 
{
 /* codec private data */
 struct wm8731_priv {
struct regmap *regmap;
+   struct clk *mclk;
struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
const struct snd_pcm_hw_constraint_list *constraints;
unsigned int sysclk;
@@ -389,6 +391,8 @@ static int wm8731_set_dai_sysclk(struct snd_soc_dai 
*codec_dai,
switch (clk_id) {
case WM8731_SYSCLK_XTAL:
case WM8731_SYSCLK_MCLK:
+   if (clk_set_rate(wm8731->mclk, freq))
+   return -EINVAL;
wm8731->sysclk_type = clk_id;
break;
default:
@@ -490,6 +494,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,
 
switch (level) {
case SND_SOC_BIAS_ON:
+   clk_prepare_enable(wm8731->mclk);
break;
case SND_SOC_BIAS_PREPARE:
break;
@@ -508,6 +513,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,
snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
break;
case SND_SOC_BIAS_OFF:
+   clk_disable_unprepare(wm8731->mclk);
snd_soc_write(codec, WM8731_PWR, 0x);
regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
   wm8731->supplies);
@@ -666,6 +672,13 @@ static int wm8731_spi_probe(struct spi_device *spi)
if (wm8731 == NULL)
return -ENOMEM;
 
+   wm8731->mclk = devm_clk_get(>dev, "mclk");
+   if (IS_ERR(wm8731->mclk)) {
+   ret = PTR_ERR(wm8731->mclk);
+   dev_err(>dev, "Failed to get MCLK\n");
+   return ret;
+   }
+
mutex_init(>lock);
 
wm8731->regmap = devm_regmap_init_spi(spi, _regmap);
@@ -717,6 +730,13 @@ static int wm8731_i2c_probe(struct i2c_client *i2c,
if (wm8731 == NULL)
return -ENOMEM;
 
+   wm8731->mclk = devm_clk_get(>dev, "mclk");
+   if (IS_ERR(wm8731->mclk)) {
+   ret = PTR_ERR(wm8731->mclk);
+   dev_err(>dev, "Failed to get MCLK\n");
+   return ret;
+   }
+
wm8731->regmap = devm_regmap_init_i2c(i2c, _regmap);
if (IS_ERR(wm8731->regmap)) {
ret = PTR_ERR(wm8731->regmap);
-- 
2.3.0.rc0

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[RFC PATCH] ASoC: wm8731: let codec to manage clock by itself

[Bo Shen]

Let the wm8731 codec to manage clock by itself.

As all at91 related boards have been switch to CCF framework. So, on
the at91 related boards which use wm8731 will let it manage the clock,
or else the board use wm8731 is broken.

However, at the same time the wm8731 codec is used on other boards,
I am sure this change will broken some boards.

For example: poodle and corgi based on PXA SoC (in default configuration
file, no one use it). DB1200 board which is a mips based board. So I have
no idea how to fix them.

So, my suggestion is to add CCF check based on the following patch? Any
idea or suggestions?

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 sound/soc/codecs/wm8731.c | 20 
 1 file changed, 20 insertions(+)

diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index b9211b4..83f75d66 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -13,6 +13,7 @@
  * published by the Free Software Foundation.
  */
 
+#include linux/clk.h
 #include linux/module.h
 #include linux/moduleparam.h
 #include linux/init.h
@@ -45,6 +46,7 @@ static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = 
{
 /* codec private data */
 struct wm8731_priv {
struct regmap *regmap;
+   struct clk *mclk;
struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
const struct snd_pcm_hw_constraint_list *constraints;
unsigned int sysclk;
@@ -389,6 +391,8 @@ static int wm8731_set_dai_sysclk(struct snd_soc_dai 
*codec_dai,
switch (clk_id) {
case WM8731_SYSCLK_XTAL:
case WM8731_SYSCLK_MCLK:
+   if (clk_set_rate(wm8731-mclk, freq))
+   return -EINVAL;
wm8731-sysclk_type = clk_id;
break;
default:
@@ -490,6 +494,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,
 
switch (level) {
case SND_SOC_BIAS_ON:
+   clk_prepare_enable(wm8731-mclk);
break;
case SND_SOC_BIAS_PREPARE:
break;
@@ -508,6 +513,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec 
*codec,
snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
break;
case SND_SOC_BIAS_OFF:
+   clk_disable_unprepare(wm8731-mclk);
snd_soc_write(codec, WM8731_PWR, 0x);
regulator_bulk_disable(ARRAY_SIZE(wm8731-supplies),
   wm8731-supplies);
@@ -666,6 +672,13 @@ static int wm8731_spi_probe(struct spi_device *spi)
if (wm8731 == NULL)
return -ENOMEM;
 
+   wm8731-mclk = devm_clk_get(spi-dev, mclk);
+   if (IS_ERR(wm8731-mclk)) {
+   ret = PTR_ERR(wm8731-mclk);
+   dev_err(spi-dev, Failed to get MCLK\n);
+   return ret;
+   }
+
mutex_init(wm8731-lock);
 
wm8731-regmap = devm_regmap_init_spi(spi, wm8731_regmap);
@@ -717,6 +730,13 @@ static int wm8731_i2c_probe(struct i2c_client *i2c,
if (wm8731 == NULL)
return -ENOMEM;
 
+   wm8731-mclk = devm_clk_get(i2c-dev, mclk);
+   if (IS_ERR(wm8731-mclk)) {
+   ret = PTR_ERR(wm8731-mclk);
+   dev_err(i2c-dev, Failed to get MCLK\n);
+   return ret;
+   }
+
wm8731-regmap = devm_regmap_init_i2c(i2c, wm8731_regmap);
if (IS_ERR(wm8731-regmap)) {
ret = PTR_ERR(wm8731-regmap);
-- 
2.3.0.rc0

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[PATCH 0/4] ARM: at91: sama5d4ek: enable audio support

[Bo Shen]

This patch set enable audio support on sama5d4ek.
It depends the patch [1] (ASoC: atmel-pcm-dma: won't check direction
when configure dma)
[1] https://patchwork.kernel.org/patch/5759441/


Bo Shen (4):
  ARM: at91: dt: sama5d4: add ssc nodes
  ARM: at91: dt: sama5d4ek: enable ssc0
  ARM: at91: dt: sama5d4ek: add and enable wm8904
  ARM: at91: dt: sama5d4ek: enable audio

 arch/arm/boot/dts/at91-sama5d4ek.dts | 31 
 arch/arm/boot/dts/sama5d4.dtsi   | 70 
 2 files changed, 101 insertions(+)

-- 
2.3.0.rc0

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[PATCH 2/4] ARM: at91: dt: sama5d4ek: enable ssc0

[Bo Shen]

Enable SSC0 node, which will be used for audio.

Signed-off-by: Bo Shen 
---

 arch/arm/boot/dts/at91-sama5d4ek.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts 
b/arch/arm/boot/dts/at91-sama5d4ek.dts
index 9198b71..32e9a9a 100644
--- a/arch/arm/boot/dts/at91-sama5d4ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d4ek.dts
@@ -115,6 +115,10 @@
};
};
 
+   ssc0: ssc@f8008000 {
+   status = "okay";
+   };
+
spi0: spi@f801 {
cs-gpios = < 3 0>, <0>, <0>, <0>;
status = "okay";
-- 
2.3.0.rc0

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[PATCH 1/4] ARM: at91: dt: sama5d4: add ssc nodes

[Bo Shen]

Add SSC 0 and 1 nodes.

Signed-off-by: Bo Shen 
---

 arch/arm/boot/dts/sama5d4.dtsi | 70 ++
 1 file changed, 70 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index b94995d..0b3e5f4 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -66,6 +66,8 @@
tcb0 = 
tcb1 = 
i2c2 = 
+   ssc0 = 
+   ssc1 = 
};
cpus {
#address-cells = <1>;
@@ -793,6 +795,24 @@
clock-names = "mci_clk";
};
 
+   ssc0: ssc@f8008000 {
+   compatible = "atmel,at91sam9g45-ssc";
+   reg = <0xf8008000 0x4000>;
+   interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_ssc0_tx _ssc0_rx>;
+   dmas = <
+   (AT91_XDMAC_DT_MEM_IF(0) | 
AT91_XDMAC_DT_PER_IF(1)
+   | AT91_XDMAC_DT_PERID(26))>,
+  <
+   (AT91_XDMAC_DT_MEM_IF(0) | 
AT91_XDMAC_DT_PER_IF(1)
+   | AT91_XDMAC_DT_PERID(27))>;
+   dma-names = "tx", "rx";
+   clocks = <_clk>;
+   clock-names = "pclk";
+   status = "disabled";
+   };
+
spi0: spi@f801 {
#address-cells = <1>;
#size-cells = <0>;
@@ -941,6 +961,24 @@
status = "disabled";
};
 
+   ssc1: ssc@fc014000 {
+   compatible = "atmel,at91sam9g45-ssc";
+   reg = <0xfc014000 0x4000>;
+   interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_ssc1_tx _ssc1_rx>;
+   dmas = <
+   (AT91_XDMAC_DT_MEM_IF(0) | 
AT91_XDMAC_DT_PER_IF(1)
+   | AT91_XDMAC_DT_PERID(28))>,
+  <
+   (AT91_XDMAC_DT_MEM_IF(0) | 
AT91_XDMAC_DT_PER_IF(1)
+   | AT91_XDMAC_DT_PERID(29))>;
+   dma-names = "tx", "rx";
+   clocks = <_clk>;
+   clock-names = "pclk";
+   status = "disabled";
+   };
+
tcb1: timer@fc02 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xfc02 0x100>;
@@ -1295,6 +1333,38 @@
atmel,pins = ; /* conflicts with A0/NBS0, MCI0_CDB */
};
};
+
+   ssc0 {
+   pinctrl_ssc0_tx: ssc0_tx {
+   atmel,pins =
+   ; /* PB28 periph B TD0 */
+   };
+
+   pinctrl_ssc0_rx: ssc0_rx {
+   atmel,pins =
+   ; /* PB29 periph B RD0 */
+   };
+   };
+
+   ssc1 {
+   pinctrl_ssc1_tx: ssc1_tx {
+   atmel,pins =
+   ; /* PC21 periph B TD1 */
+   };
+
+   pinctrl_ssc1_rx: ssc1_rx {
+   atmel,pins =
+   ; /* PC23 periph B RD1 */
+   };
+   };
};
 
aic: interrupt-controller@fc06e000 {
-- 
2.3.0.rc0

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[PATCH 4/4] ARM: at91: dt: sama5d4ek: enable audio

[Bo Shen]

Enable audio support for sama5d4ek board.

Signed-off-by: Bo Shen 
---

 arch/arm/boot/dts/at91-sama5d4ek.dts | 20 
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts 
b/arch/arm/boot/dts/at91-sama5d4ek.dts
index 7f47d92..0df5f1b 100644
--- a/arch/arm/boot/dts/at91-sama5d4ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d4ek.dts
@@ -190,6 +190,10 @@
atmel,pins =
; /* PE13 gpio */
};
+   pinctrl_pck2_as_audio_mck: 
pck2_as_audio_mck {
+   atmel,pins =
+   ;
+   };
};
};
};
@@ -268,4 +272,20 @@
gpio-key,wakeup;
};
};
+
+   sound {
+   compatible = "atmel,asoc-wm8904";
+   pinctrl-names = "default";
+   pinctrl-0 = <_pck2_as_audio_mck>;
+
+   atmel,model = "wm8904 @ SAMA5D4EK";
+   atmel,audio-routing =
+   "Headphone Jack", "HPOUTL",
+   "Headphone Jack", "HPOUTR",
+   "IN1L", "Line In Jack",
+   "IN1R", "Line In Jack";
+
+   atmel,ssc-controller = <>;
+   atmel,audio-codec = <>;
+   };
 };
-- 
2.3.0.rc0

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[PATCH 3/4] ARM: at91: dt: sama5d4ek: add and enable wm8904

[Bo Shen]

Add wm8904 codec node and enable it.

Signed-off-by: Bo Shen 
---

 arch/arm/boot/dts/at91-sama5d4ek.dts | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts 
b/arch/arm/boot/dts/at91-sama5d4ek.dts
index 32e9a9a..7f47d92 100644
--- a/arch/arm/boot/dts/at91-sama5d4ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d4ek.dts
@@ -131,6 +131,13 @@
 
i2c0: i2c@f8014000 {
status = "okay";
+
+   wm8904: codec@1a {
+   compatible = "wlf,wm8904";
+   reg = <0x1a>;
+   clocks = <>;
+   clock-names = "mclk";
+   };
};
 
macb0: ethernet@f802 {
-- 
2.3.0.rc0

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[PATCH] ASoC: atmel-pcm-dma: won't check direction when configure dma

[Bo Shen]

As DMA framework request DMA using direction only in prep_slave
function, (The At91 xdma driver has adapted to this request).
So won't check direction when do DMA configuration.

Signed-off-by: Bo Shen 
---

 sound/soc/atmel/atmel-pcm-dma.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/sound/soc/atmel/atmel-pcm-dma.c b/sound/soc/atmel/atmel-pcm-dma.c
index 33fb3bb..b8e7bad 100644
--- a/sound/soc/atmel/atmel-pcm-dma.c
+++ b/sound/soc/atmel/atmel-pcm-dma.c
@@ -105,13 +105,11 @@ static int atmel_pcm_configure_dma(struct 
snd_pcm_substream *substream,
return ret;
}
 
-   if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-   slave_config->dst_addr = ssc->phybase + SSC_THR;
-   slave_config->dst_maxburst = 1;
-   } else {
-   slave_config->src_addr = ssc->phybase + SSC_RHR;
-   slave_config->src_maxburst = 1;
-   }
+   slave_config->dst_addr = ssc->phybase + SSC_THR;
+   slave_config->dst_maxburst = 1;
+
+   slave_config->src_addr = ssc->phybase + SSC_RHR;
+   slave_config->src_maxburst = 1;
 
prtd->dma_intr_handler = atmel_pcm_dma_irq;
 
-- 
2.3.0.rc0

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[PATCH] ASoC: atmel-pcm-dma: won't check direction when configure dma

[Bo Shen]

As DMA framework request DMA using direction only in prep_slave
function, (The At91 xdma driver has adapted to this request).
So won't check direction when do DMA configuration.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 sound/soc/atmel/atmel-pcm-dma.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/sound/soc/atmel/atmel-pcm-dma.c b/sound/soc/atmel/atmel-pcm-dma.c
index 33fb3bb..b8e7bad 100644
--- a/sound/soc/atmel/atmel-pcm-dma.c
+++ b/sound/soc/atmel/atmel-pcm-dma.c
@@ -105,13 +105,11 @@ static int atmel_pcm_configure_dma(struct 
snd_pcm_substream *substream,
return ret;
}
 
-   if (substream-stream == SNDRV_PCM_STREAM_PLAYBACK) {
-   slave_config-dst_addr = ssc-phybase + SSC_THR;
-   slave_config-dst_maxburst = 1;
-   } else {
-   slave_config-src_addr = ssc-phybase + SSC_RHR;
-   slave_config-src_maxburst = 1;
-   }
+   slave_config-dst_addr = ssc-phybase + SSC_THR;
+   slave_config-dst_maxburst = 1;
+
+   slave_config-src_addr = ssc-phybase + SSC_RHR;
+   slave_config-src_maxburst = 1;
 
prtd-dma_intr_handler = atmel_pcm_dma_irq;
 
-- 
2.3.0.rc0

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[PATCH 2/4] ARM: at91: dt: sama5d4ek: enable ssc0

[Bo Shen]

Enable SSC0 node, which will be used for audio.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 arch/arm/boot/dts/at91-sama5d4ek.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts 
b/arch/arm/boot/dts/at91-sama5d4ek.dts
index 9198b71..32e9a9a 100644
--- a/arch/arm/boot/dts/at91-sama5d4ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d4ek.dts
@@ -115,6 +115,10 @@
};
};
 
+   ssc0: ssc@f8008000 {
+   status = okay;
+   };
+
spi0: spi@f801 {
cs-gpios = pioC 3 0, 0, 0, 0;
status = okay;
-- 
2.3.0.rc0

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[PATCH 1/4] ARM: at91: dt: sama5d4: add ssc nodes

[Bo Shen]

Add SSC 0 and 1 nodes.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 arch/arm/boot/dts/sama5d4.dtsi | 70 ++
 1 file changed, 70 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index b94995d..0b3e5f4 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -66,6 +66,8 @@
tcb0 = tcb0;
tcb1 = tcb1;
i2c2 = i2c2;
+   ssc0 = ssc0;
+   ssc1 = ssc1;
};
cpus {
#address-cells = 1;
@@ -793,6 +795,24 @@
clock-names = mci_clk;
};
 
+   ssc0: ssc@f8008000 {
+   compatible = atmel,at91sam9g45-ssc;
+   reg = 0xf8008000 0x4000;
+   interrupts = 48 IRQ_TYPE_LEVEL_HIGH 0;
+   pinctrl-names = default;
+   pinctrl-0 = pinctrl_ssc0_tx pinctrl_ssc0_rx;
+   dmas = dma1
+   (AT91_XDMAC_DT_MEM_IF(0) | 
AT91_XDMAC_DT_PER_IF(1)
+   | AT91_XDMAC_DT_PERID(26)),
+  dma1
+   (AT91_XDMAC_DT_MEM_IF(0) | 
AT91_XDMAC_DT_PER_IF(1)
+   | AT91_XDMAC_DT_PERID(27));
+   dma-names = tx, rx;
+   clocks = ssc0_clk;
+   clock-names = pclk;
+   status = disabled;
+   };
+
spi0: spi@f801 {
#address-cells = 1;
#size-cells = 0;
@@ -941,6 +961,24 @@
status = disabled;
};
 
+   ssc1: ssc@fc014000 {
+   compatible = atmel,at91sam9g45-ssc;
+   reg = 0xfc014000 0x4000;
+   interrupts = 49 IRQ_TYPE_LEVEL_HIGH 0;
+   pinctrl-names = default;
+   pinctrl-0 = pinctrl_ssc1_tx pinctrl_ssc1_rx;
+   dmas = dma1
+   (AT91_XDMAC_DT_MEM_IF(0) | 
AT91_XDMAC_DT_PER_IF(1)
+   | AT91_XDMAC_DT_PERID(28)),
+  dma1
+   (AT91_XDMAC_DT_MEM_IF(0) | 
AT91_XDMAC_DT_PER_IF(1)
+   | AT91_XDMAC_DT_PERID(29));
+   dma-names = tx, rx;
+   clocks = ssc1_clk;
+   clock-names = pclk;
+   status = disabled;
+   };
+
tcb1: timer@fc02 {
compatible = atmel,at91sam9x5-tcb;
reg = 0xfc02 0x100;
@@ -1295,6 +1333,38 @@
atmel,pins = AT91_PIOE 0 
AT91_PERIPH_C AT91_PINCTRL_NONE; /* conflicts with A0/NBS0, MCI0_CDB */
};
};
+
+   ssc0 {
+   pinctrl_ssc0_tx: ssc0_tx {
+   atmel,pins =
+   AT91_PIOB 27 
AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB27 periph B TK0 */
+AT91_PIOB 31 
AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB31 periph B TF0 */
+AT91_PIOB 28 
AT91_PERIPH_B AT91_PINCTRL_NONE; /* PB28 periph B TD0 */
+   };
+
+   pinctrl_ssc0_rx: ssc0_rx {
+   atmel,pins =
+   AT91_PIOB 26 
AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB26 periph B RK0 */
+AT91_PIOB 30 
AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB30 periph B RF0 */
+AT91_PIOB 29 
AT91_PERIPH_B AT91_PINCTRL_NONE; /* PB29 periph B RD0 */
+   };
+   };
+
+   ssc1 {
+   pinctrl_ssc1_tx: ssc1_tx {
+   atmel,pins =
+   AT91_PIOC 19 
AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC19 periph B TK1 */
+AT91_PIOC 20 
AT91_PERIPH_B AT91_PINCTRL_NONE

[PATCH 3/4] ARM: at91: dt: sama5d4ek: add and enable wm8904

[Bo Shen]

Add wm8904 codec node and enable it.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 arch/arm/boot/dts/at91-sama5d4ek.dts | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts 
b/arch/arm/boot/dts/at91-sama5d4ek.dts
index 32e9a9a..7f47d92 100644
--- a/arch/arm/boot/dts/at91-sama5d4ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d4ek.dts
@@ -131,6 +131,13 @@
 
i2c0: i2c@f8014000 {
status = okay;
+
+   wm8904: codec@1a {
+   compatible = wlf,wm8904;
+   reg = 0x1a;
+   clocks = pck2;
+   clock-names = mclk;
+   };
};
 
macb0: ethernet@f802 {
-- 
2.3.0.rc0

--
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[PATCH 4/4] ARM: at91: dt: sama5d4ek: enable audio

[Bo Shen]

Enable audio support for sama5d4ek board.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 arch/arm/boot/dts/at91-sama5d4ek.dts | 20 
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts 
b/arch/arm/boot/dts/at91-sama5d4ek.dts
index 7f47d92..0df5f1b 100644
--- a/arch/arm/boot/dts/at91-sama5d4ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d4ek.dts
@@ -190,6 +190,10 @@
atmel,pins =
AT91_PIOE 13 
AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH; /* PE13 gpio */
};
+   pinctrl_pck2_as_audio_mck: 
pck2_as_audio_mck {
+   atmel,pins =
+   AT91_PIOB 10 
AT91_PERIPH_B AT91_PINCTRL_NONE;
+   };
};
};
};
@@ -268,4 +272,20 @@
gpio-key,wakeup;
};
};
+
+   sound {
+   compatible = atmel,asoc-wm8904;
+   pinctrl-names = default;
+   pinctrl-0 = pinctrl_pck2_as_audio_mck;
+
+   atmel,model = wm8904 @ SAMA5D4EK;
+   atmel,audio-routing =
+   Headphone Jack, HPOUTL,
+   Headphone Jack, HPOUTR,
+   IN1L, Line In Jack,
+   IN1R, Line In Jack;
+
+   atmel,ssc-controller = ssc0;
+   atmel,audio-codec = wm8904;
+   };
 };
-- 
2.3.0.rc0

--
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[PATCH 0/4] ARM: at91: sama5d4ek: enable audio support

[Bo Shen]

This patch set enable audio support on sama5d4ek.
It depends the patch [1] (ASoC: atmel-pcm-dma: won't check direction
when configure dma)
[1] https://patchwork.kernel.org/patch/5759441/


Bo Shen (4):
  ARM: at91: dt: sama5d4: add ssc nodes
  ARM: at91: dt: sama5d4ek: enable ssc0
  ARM: at91: dt: sama5d4ek: add and enable wm8904
  ARM: at91: dt: sama5d4ek: enable audio

 arch/arm/boot/dts/at91-sama5d4ek.dts | 31 
 arch/arm/boot/dts/sama5d4.dtsi   | 70 
 2 files changed, 101 insertions(+)

-- 
2.3.0.rc0

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[PATCH 1/3] ASoC: atmel_ssc_dai: fix the setting for DSP mode

[Bo Shen]

When SCC work in DSP A mode, the data outputs/inputs are shift out on
falling edge, the frame sync are sample on the rising edge.

Reported-by: Songjun Wu 
Signed-off-by: Bo Shen 
---

 sound/soc/atmel/atmel_ssc_dai.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 99ff35e..c1d93b8 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -512,7 +512,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rcmr =SSC_BF(RCMR_PERIOD, ssc_p->rcmr_period)
| SSC_BF(RCMR_STTDLY, 1)
| SSC_BF(RCMR_START, SSC_START_RISING_RF)
-   | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
+   | SSC_BF(RCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
| SSC_BF(RCMR_CKS, SSC_CKS_DIV);
 
@@ -527,7 +527,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
tcmr =SSC_BF(TCMR_PERIOD, ssc_p->tcmr_period)
| SSC_BF(TCMR_STTDLY, 1)
| SSC_BF(TCMR_START, SSC_START_RISING_RF)
-   | SSC_BF(TCMR_CKI, SSC_CKI_RISING)
+   | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(TCMR_CKO, SSC_CKO_CONTINUOUS)
| SSC_BF(TCMR_CKS, SSC_CKS_DIV);
 
@@ -556,7 +556,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
| SSC_BF(RCMR_START, SSC_START_RISING_RF)
-   | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
+   | SSC_BF(RCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
| SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
   SSC_CKS_PIN : SSC_CKS_CLOCK);
-- 
2.3.0.rc0

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[PATCH 3/3] ASoC: atmel_ssc_dai: only clean PDC when using PDC

[Bo Shen]

Only using PDC, it needs to clean PDC registers.

Signed-off-by: Bo Shen 
---

 sound/soc/atmel/atmel_ssc_dai.c | 20 +++-
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 0ed5ac3..80eb1f1 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -599,15 +599,17 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rcmr, rfmr, tcmr, tfmr);
 
if (!ssc_p->initialized) {
-   ssc_writel(ssc_p->ssc->regs, PDC_RPR, 0);
-   ssc_writel(ssc_p->ssc->regs, PDC_RCR, 0);
-   ssc_writel(ssc_p->ssc->regs, PDC_RNPR, 0);
-   ssc_writel(ssc_p->ssc->regs, PDC_RNCR, 0);
-
-   ssc_writel(ssc_p->ssc->regs, PDC_TPR, 0);
-   ssc_writel(ssc_p->ssc->regs, PDC_TCR, 0);
-   ssc_writel(ssc_p->ssc->regs, PDC_TNPR, 0);
-   ssc_writel(ssc_p->ssc->regs, PDC_TNCR, 0);
+   if (!ssc_p->ssc->pdata->use_dma) {
+   ssc_writel(ssc_p->ssc->regs, PDC_RPR, 0);
+   ssc_writel(ssc_p->ssc->regs, PDC_RCR, 0);
+   ssc_writel(ssc_p->ssc->regs, PDC_RNPR, 0);
+   ssc_writel(ssc_p->ssc->regs, PDC_RNCR, 0);
+
+   ssc_writel(ssc_p->ssc->regs, PDC_TPR, 0);
+   ssc_writel(ssc_p->ssc->regs, PDC_TCR, 0);
+   ssc_writel(ssc_p->ssc->regs, PDC_TNPR, 0);
+   ssc_writel(ssc_p->ssc->regs, PDC_TNCR, 0);
+   }
 
ret = request_irq(ssc_p->ssc->irq, atmel_ssc_interrupt, 0,
ssc_p->name, ssc_p);
-- 
2.3.0.rc0

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[PATCH 2/3] ASoC: atmel_ssc_dai: refactor the startup and shutdown

[Bo Shen]

In startup function, enable ssc clock and in shutdown function,
disable clock. And also remove disable ssc in shutdown function,
as ssc is disabled in prepare function.

Signed-off-by: Bo Shen 
---

 sound/soc/atmel/atmel_ssc_dai.c | 28 +++-
 1 file changed, 11 insertions(+), 17 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index c1d93b8..0ed5ac3 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -204,6 +204,13 @@ static int atmel_ssc_startup(struct snd_pcm_substream 
*substream,
pr_debug("atmel_ssc_startup: SSC_SR=0x%u\n",
ssc_readl(ssc_p->ssc->regs, SR));
 
+   /* Enable PMC peripheral clock for this SSC */
+   pr_debug("atmel_ssc_dai: Starting clock\n");
+   clk_enable(ssc_p->ssc->clk);
+
+   /* Reset the SSC to keep it at a clean status */
+   ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
+
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
dir = 0;
dir_mask = SSC_DIR_MASK_PLAYBACK;
@@ -250,11 +257,6 @@ static void atmel_ssc_shutdown(struct snd_pcm_substream 
*substream,
dma_params = ssc_p->dma_params[dir];
 
if (dma_params != NULL) {
-   ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);
-   pr_debug("atmel_ssc_shutdown: %s disabled SSC_SR=0x%08x\n",
-   (dir ? "receive" : "transmit"),
-   ssc_readl(ssc_p->ssc->regs, SR));
-
dma_params->ssc = NULL;
dma_params->substream = NULL;
ssc_p->dma_params[dir] = NULL;
@@ -266,10 +268,6 @@ static void atmel_ssc_shutdown(struct snd_pcm_substream 
*substream,
ssc_p->dir_mask &= ~dir_mask;
if (!ssc_p->dir_mask) {
if (ssc_p->initialized) {
-   /* Shutdown the SSC clock. */
-   pr_debug("atmel_ssc_dai: Stopping clock\n");
-   clk_disable(ssc_p->ssc->clk);
-
free_irq(ssc_p->ssc->irq, ssc_p);
ssc_p->initialized = 0;
}
@@ -280,6 +278,10 @@ static void atmel_ssc_shutdown(struct snd_pcm_substream 
*substream,
ssc_p->cmr_div = ssc_p->tcmr_period = ssc_p->rcmr_period = 0;
}
spin_unlock_irq(_p->lock);
+
+   /* Shutdown the SSC clock. */
+   pr_debug("atmel_ssc_dai: Stopping clock\n");
+   clk_disable(ssc_p->ssc->clk);
 }
 
 
@@ -597,14 +599,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rcmr, rfmr, tcmr, tfmr);
 
if (!ssc_p->initialized) {
-
-   /* Enable PMC peripheral clock for this SSC */
-   pr_debug("atmel_ssc_dai: Starting clock\n");
-   clk_enable(ssc_p->ssc->clk);
-
-   /* Reset the SSC and its PDC registers */
-   ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
-
ssc_writel(ssc_p->ssc->regs, PDC_RPR, 0);
ssc_writel(ssc_p->ssc->regs, PDC_RCR, 0);
ssc_writel(ssc_p->ssc->regs, PDC_RNPR, 0);
-- 
2.3.0.rc0

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[PATCH 0/3] ASoC: atmel_ssc_dai: fix and refactor

[Bo Shen]

This patch set do following things:
  - Fix the DSP mode A setting.
  - Refactor the startup and shutdown function.
  - Only clean PDC when use PDC.


Bo Shen (3):
  ASoC: atmel_ssc_dai: fix the setting for DSP mode
  ASoC: atmel_ssc_dai: refactor the startup and shutdown
  ASoC: atmel_ssc_dai: only clean PDC when using PDC

 sound/soc/atmel/atmel_ssc_dai.c | 54 +++--
 1 file changed, 25 insertions(+), 29 deletions(-)

-- 
2.3.0.rc0

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[PATCH 0/3] ASoC: atmel_ssc_dai: fix and refactor

[Bo Shen]

This patch set do following things:
  - Fix the DSP mode A setting.
  - Refactor the startup and shutdown function.
  - Only clean PDC when use PDC.


Bo Shen (3):
  ASoC: atmel_ssc_dai: fix the setting for DSP mode
  ASoC: atmel_ssc_dai: refactor the startup and shutdown
  ASoC: atmel_ssc_dai: only clean PDC when using PDC

 sound/soc/atmel/atmel_ssc_dai.c | 54 +++--
 1 file changed, 25 insertions(+), 29 deletions(-)

-- 
2.3.0.rc0

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[PATCH 2/3] ASoC: atmel_ssc_dai: refactor the startup and shutdown

[Bo Shen]

In startup function, enable ssc clock and in shutdown function,
disable clock. And also remove disable ssc in shutdown function,
as ssc is disabled in prepare function.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 sound/soc/atmel/atmel_ssc_dai.c | 28 +++-
 1 file changed, 11 insertions(+), 17 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index c1d93b8..0ed5ac3 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -204,6 +204,13 @@ static int atmel_ssc_startup(struct snd_pcm_substream 
*substream,
pr_debug(atmel_ssc_startup: SSC_SR=0x%u\n,
ssc_readl(ssc_p-ssc-regs, SR));
 
+   /* Enable PMC peripheral clock for this SSC */
+   pr_debug(atmel_ssc_dai: Starting clock\n);
+   clk_enable(ssc_p-ssc-clk);
+
+   /* Reset the SSC to keep it at a clean status */
+   ssc_writel(ssc_p-ssc-regs, CR, SSC_BIT(CR_SWRST));
+
if (substream-stream == SNDRV_PCM_STREAM_PLAYBACK) {
dir = 0;
dir_mask = SSC_DIR_MASK_PLAYBACK;
@@ -250,11 +257,6 @@ static void atmel_ssc_shutdown(struct snd_pcm_substream 
*substream,
dma_params = ssc_p-dma_params[dir];
 
if (dma_params != NULL) {
-   ssc_writel(ssc_p-ssc-regs, CR, dma_params-mask-ssc_disable);
-   pr_debug(atmel_ssc_shutdown: %s disabled SSC_SR=0x%08x\n,
-   (dir ? receive : transmit),
-   ssc_readl(ssc_p-ssc-regs, SR));
-
dma_params-ssc = NULL;
dma_params-substream = NULL;
ssc_p-dma_params[dir] = NULL;
@@ -266,10 +268,6 @@ static void atmel_ssc_shutdown(struct snd_pcm_substream 
*substream,
ssc_p-dir_mask = ~dir_mask;
if (!ssc_p-dir_mask) {
if (ssc_p-initialized) {
-   /* Shutdown the SSC clock. */
-   pr_debug(atmel_ssc_dai: Stopping clock\n);
-   clk_disable(ssc_p-ssc-clk);
-
free_irq(ssc_p-ssc-irq, ssc_p);
ssc_p-initialized = 0;
}
@@ -280,6 +278,10 @@ static void atmel_ssc_shutdown(struct snd_pcm_substream 
*substream,
ssc_p-cmr_div = ssc_p-tcmr_period = ssc_p-rcmr_period = 0;
}
spin_unlock_irq(ssc_p-lock);
+
+   /* Shutdown the SSC clock. */
+   pr_debug(atmel_ssc_dai: Stopping clock\n);
+   clk_disable(ssc_p-ssc-clk);
 }
 
 
@@ -597,14 +599,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rcmr, rfmr, tcmr, tfmr);
 
if (!ssc_p-initialized) {
-
-   /* Enable PMC peripheral clock for this SSC */
-   pr_debug(atmel_ssc_dai: Starting clock\n);
-   clk_enable(ssc_p-ssc-clk);
-
-   /* Reset the SSC and its PDC registers */
-   ssc_writel(ssc_p-ssc-regs, CR, SSC_BIT(CR_SWRST));
-
ssc_writel(ssc_p-ssc-regs, PDC_RPR, 0);
ssc_writel(ssc_p-ssc-regs, PDC_RCR, 0);
ssc_writel(ssc_p-ssc-regs, PDC_RNPR, 0);
-- 
2.3.0.rc0

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[PATCH 3/3] ASoC: atmel_ssc_dai: only clean PDC when using PDC

[Bo Shen]

Only using PDC, it needs to clean PDC registers.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 sound/soc/atmel/atmel_ssc_dai.c | 20 +++-
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 0ed5ac3..80eb1f1 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -599,15 +599,17 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rcmr, rfmr, tcmr, tfmr);
 
if (!ssc_p-initialized) {
-   ssc_writel(ssc_p-ssc-regs, PDC_RPR, 0);
-   ssc_writel(ssc_p-ssc-regs, PDC_RCR, 0);
-   ssc_writel(ssc_p-ssc-regs, PDC_RNPR, 0);
-   ssc_writel(ssc_p-ssc-regs, PDC_RNCR, 0);
-
-   ssc_writel(ssc_p-ssc-regs, PDC_TPR, 0);
-   ssc_writel(ssc_p-ssc-regs, PDC_TCR, 0);
-   ssc_writel(ssc_p-ssc-regs, PDC_TNPR, 0);
-   ssc_writel(ssc_p-ssc-regs, PDC_TNCR, 0);
+   if (!ssc_p-ssc-pdata-use_dma) {
+   ssc_writel(ssc_p-ssc-regs, PDC_RPR, 0);
+   ssc_writel(ssc_p-ssc-regs, PDC_RCR, 0);
+   ssc_writel(ssc_p-ssc-regs, PDC_RNPR, 0);
+   ssc_writel(ssc_p-ssc-regs, PDC_RNCR, 0);
+
+   ssc_writel(ssc_p-ssc-regs, PDC_TPR, 0);
+   ssc_writel(ssc_p-ssc-regs, PDC_TCR, 0);
+   ssc_writel(ssc_p-ssc-regs, PDC_TNPR, 0);
+   ssc_writel(ssc_p-ssc-regs, PDC_TNCR, 0);
+   }
 
ret = request_irq(ssc_p-ssc-irq, atmel_ssc_interrupt, 0,
ssc_p-name, ssc_p);
-- 
2.3.0.rc0

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[PATCH 1/3] ASoC: atmel_ssc_dai: fix the setting for DSP mode

[Bo Shen]

When SCC work in DSP A mode, the data outputs/inputs are shift out on
falling edge, the frame sync are sample on the rising edge.

Reported-by: Songjun Wu songjun...@atmel.com
Signed-off-by: Bo Shen voice.s...@atmel.com
---

 sound/soc/atmel/atmel_ssc_dai.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 99ff35e..c1d93b8 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -512,7 +512,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rcmr =SSC_BF(RCMR_PERIOD, ssc_p-rcmr_period)
| SSC_BF(RCMR_STTDLY, 1)
| SSC_BF(RCMR_START, SSC_START_RISING_RF)
-   | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
+   | SSC_BF(RCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
| SSC_BF(RCMR_CKS, SSC_CKS_DIV);
 
@@ -527,7 +527,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
tcmr =SSC_BF(TCMR_PERIOD, ssc_p-tcmr_period)
| SSC_BF(TCMR_STTDLY, 1)
| SSC_BF(TCMR_START, SSC_START_RISING_RF)
-   | SSC_BF(TCMR_CKI, SSC_CKI_RISING)
+   | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(TCMR_CKO, SSC_CKO_CONTINUOUS)
| SSC_BF(TCMR_CKS, SSC_CKS_DIV);
 
@@ -556,7 +556,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
| SSC_BF(RCMR_START, SSC_START_RISING_RF)
-   | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
+   | SSC_BF(RCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
| SSC_BF(RCMR_CKS, ssc-clk_from_rk_pin ?
   SSC_CKS_PIN : SSC_CKS_CLOCK);
-- 
2.3.0.rc0

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Re: [PATCH] ASoC: atmel_ssc_dai: Support SND_SOC_DAIFMT_CBM_CFS on I2S

[Bo Shen]

Hi Peter,
  Thanks for you patch.

On 01/29/2015 06:16 PM, Peter Rosin wrote:

From: Peter Rosin 

Signed-off-by: Peter Rosin 


Acked-by: Bo Shen 


---
  sound/soc/atmel/atmel_ssc_dai.c |   48 +++
  1 file changed, 48 insertions(+)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 3cd70597d109..f55f3aab8bdd 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -485,6 +485,54 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
| SSC_BF(TFMR_DATLEN, (bits - 1));
break;

+   case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFS:
+   /* I2S format, CODEC supplies BCLK, SSC supplies LRCLK. */
+   if (bits > 16 && !ssc->pdata->has_fslen_ext) {
+   dev_err(dai->dev,
+   "sample size %d is too large for SSC device\n",
+   bits);
+   return -EINVAL;
+   }
+
+   fslen_ext = (bits - 1) / 16;
+   fslen = (bits - 1) % 16;
+
+   rcmr =SSC_BF(RCMR_PERIOD, ssc_p->rcmr_period)
+   | SSC_BF(RCMR_STTDLY, START_DELAY)
+   | SSC_BF(RCMR_START, SSC_START_FALLING_RF)
+   | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
+   | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
+   | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
+  SSC_CKS_PIN : SSC_CKS_CLOCK);
+
+   rfmr =SSC_BF(RFMR_FSLEN_EXT, fslen_ext)
+   | SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
+   | SSC_BF(RFMR_FSOS, SSC_FSOS_NEGATIVE)
+   | SSC_BF(RFMR_FSLEN, fslen)
+   | SSC_BF(RFMR_DATNB, (channels - 1))
+   | SSC_BIT(RFMR_MSBF)
+   | SSC_BF(RFMR_LOOP, 0)
+   | SSC_BF(RFMR_DATLEN, (bits - 1));
+
+   tcmr =SSC_BF(TCMR_PERIOD, ssc_p->tcmr_period)
+   | SSC_BF(TCMR_STTDLY, START_DELAY)
+   | SSC_BF(TCMR_START, SSC_START_FALLING_RF)
+   | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
+   | SSC_BF(TCMR_CKO, SSC_CKO_NONE)
+   | SSC_BF(TCMR_CKS, ssc->clk_from_rk_pin ?
+  SSC_CKS_CLOCK : SSC_CKS_PIN);
+
+   tfmr =SSC_BF(TFMR_FSLEN_EXT, fslen_ext)
+   | SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_NEGATIVE)
+   | SSC_BF(TFMR_FSDEN, 0)
+   | SSC_BF(TFMR_FSOS, SSC_FSOS_NEGATIVE)
+   | SSC_BF(TFMR_FSLEN, fslen)
+   | SSC_BF(TFMR_DATNB, (channels - 1))
+   | SSC_BIT(TFMR_MSBF)
+   | SSC_BF(TFMR_DATDEF, 0)
+   | SSC_BF(TFMR_DATLEN, (bits - 1));
+   break;
+
case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS:
/*
 * DSP/PCM Mode A format, SSC provides BCLK and LRC clocks.



Best Regards,
Bo Shen
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Re: [PATCH] ASoC: atmel_ssc_dai: Support SND_SOC_DAIFMT_CBM_CFS on I2S

[Bo Shen]

Hi Peter,
  Thanks for you patch.

On 01/29/2015 06:16 PM, Peter Rosin wrote:

From: Peter Rosin p...@axentia.se

Signed-off-by: Peter Rosin p...@axentia.se


Acked-by: Bo Shen voice.s...@atmel.com


---
  sound/soc/atmel/atmel_ssc_dai.c |   48 +++
  1 file changed, 48 insertions(+)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 3cd70597d109..f55f3aab8bdd 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -485,6 +485,54 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
| SSC_BF(TFMR_DATLEN, (bits - 1));
break;

+   case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFS:
+   /* I2S format, CODEC supplies BCLK, SSC supplies LRCLK. */
+   if (bits  16  !ssc-pdata-has_fslen_ext) {
+   dev_err(dai-dev,
+   sample size %d is too large for SSC device\n,
+   bits);
+   return -EINVAL;
+   }
+
+   fslen_ext = (bits - 1) / 16;
+   fslen = (bits - 1) % 16;
+
+   rcmr =SSC_BF(RCMR_PERIOD, ssc_p-rcmr_period)
+   | SSC_BF(RCMR_STTDLY, START_DELAY)
+   | SSC_BF(RCMR_START, SSC_START_FALLING_RF)
+   | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
+   | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
+   | SSC_BF(RCMR_CKS, ssc-clk_from_rk_pin ?
+  SSC_CKS_PIN : SSC_CKS_CLOCK);
+
+   rfmr =SSC_BF(RFMR_FSLEN_EXT, fslen_ext)
+   | SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
+   | SSC_BF(RFMR_FSOS, SSC_FSOS_NEGATIVE)
+   | SSC_BF(RFMR_FSLEN, fslen)
+   | SSC_BF(RFMR_DATNB, (channels - 1))
+   | SSC_BIT(RFMR_MSBF)
+   | SSC_BF(RFMR_LOOP, 0)
+   | SSC_BF(RFMR_DATLEN, (bits - 1));
+
+   tcmr =SSC_BF(TCMR_PERIOD, ssc_p-tcmr_period)
+   | SSC_BF(TCMR_STTDLY, START_DELAY)
+   | SSC_BF(TCMR_START, SSC_START_FALLING_RF)
+   | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
+   | SSC_BF(TCMR_CKO, SSC_CKO_NONE)
+   | SSC_BF(TCMR_CKS, ssc-clk_from_rk_pin ?
+  SSC_CKS_CLOCK : SSC_CKS_PIN);
+
+   tfmr =SSC_BF(TFMR_FSLEN_EXT, fslen_ext)
+   | SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_NEGATIVE)
+   | SSC_BF(TFMR_FSDEN, 0)
+   | SSC_BF(TFMR_FSOS, SSC_FSOS_NEGATIVE)
+   | SSC_BF(TFMR_FSLEN, fslen)
+   | SSC_BF(TFMR_DATNB, (channels - 1))
+   | SSC_BIT(TFMR_MSBF)
+   | SSC_BF(TFMR_DATDEF, 0)
+   | SSC_BF(TFMR_DATLEN, (bits - 1));
+   break;
+
case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS:
/*
 * DSP/PCM Mode A format, SSC provides BCLK and LRC clocks.



Best Regards,
Bo Shen
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[PATCH v3 1/2] ASoC: codecs: wm8904: add dt ids table

[Bo Shen]

From: Alexander Morozov 

The WM8904 and WM8918 has the same data type, while the WM8912
has different data type. So, use the data in dt ids table to
distinguish them.

Signed-off-by: Alexander Morozov 
[voice.s...@atmel.com: add code to distinguish device type]
Signed-off-by: Bo Shen 
---
Changes in v3:
  - Get the device type from match data in probe function.
Changes in v2:
  - Add driver data for distinguish the device capability.

 sound/soc/codecs/wm8904.c | 31 ++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index 4d2d2b1..a80bc52 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -2098,6 +2098,24 @@ static const struct regmap_config wm8904_regmap = {
.num_reg_defaults = ARRAY_SIZE(wm8904_reg_defaults),
 };
 
+#ifdef CONFIG_OF
+static enum wm8904_type wm8904_data = WM8904;
+static enum wm8904_type wm8912_data = WM8912;
+
+static const struct of_device_id wm8904_of_match[] = {
+   {
+   .compatible = "wlf,wm8904",
+   .data = _data,
+   }, {
+   .compatible = "wlf,wm8912",
+   .data = _data,
+   }, {
+   /* sentinel */
+   }
+};
+MODULE_DEVICE_TABLE(of, wm8904_of_match);
+#endif
+
 static int wm8904_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
 {
@@ -2125,7 +2143,17 @@ static int wm8904_i2c_probe(struct i2c_client *i2c,
return ret;
}
 
-   wm8904->devtype = id->driver_data;
+   if (i2c->dev.of_node) {
+   const struct of_device_id *match;
+
+   match = of_match_node(wm8904_of_match, i2c->dev.of_node);
+   if (match == NULL)
+   return -EINVAL;
+   wm8904->devtype = *((enum wm8904_type *)match->data);
+   } else {
+   wm8904->devtype = id->driver_data;
+   }
+
i2c_set_clientdata(i2c, wm8904);
wm8904->pdata = i2c->dev.platform_data;
 
@@ -2259,6 +2287,7 @@ static struct i2c_driver wm8904_i2c_driver = {
.driver = {
.name = "wm8904",
.owner = THIS_MODULE,
+   .of_match_table = of_match_ptr(wm8904_of_match),
},
.probe =wm8904_i2c_probe,
.remove =   wm8904_i2c_remove,
-- 
2.3.0.rc0

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[PATCH v3 2/2] binding: wm8904: add new compatible string

[Bo Shen]

The "wlf,wm8912" compatible string is used for wm8912, which
share driver with wm8904, however, the data type is different.

Signed-off-by: Bo Shen 
---
Changes in v3: None
Changes in v2: None

 Documentation/devicetree/bindings/sound/wm8904.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/sound/wm8904.txt 
b/Documentation/devicetree/bindings/sound/wm8904.txt
index e99f409..66bf261 100644
--- a/Documentation/devicetree/bindings/sound/wm8904.txt
+++ b/Documentation/devicetree/bindings/sound/wm8904.txt
@@ -3,7 +3,7 @@ WM8904 audio CODEC
 This device supports I2C only.
 
 Required properties:
-  - compatible: "wlf,wm8904"
+  - compatible: "wlf,wm8904" or "wlf,wm8912"
   - reg: the I2C address of the device.
   - clock-names: "mclk"
   - clocks: reference to
-- 
2.3.0.rc0

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Re: [alsa-devel] [PATCH v2 1/3] ASoC: codecs: wm8904: add dt ids table

[Bo Shen]

Hi Mark, Lars-Perter,

On 01/27/2015 12:49 AM, Lars-Peter Clausen wrote:

On 01/26/2015 05:42 PM, Mark Brown wrote:

On Mon, Jan 26, 2015 at 04:24:38PM +0100, Nicolas Ferre wrote:

Le 16/01/2015 02:17, Bo Shen a écrit :



Does this end up in the i2c_driver_id driver data or do we need some
extra code when devtype is assigned to check for an of_node and
look at
the DT data instead?  That certainly used to be the case...



At the beginning I think as the same as you, and also add the code to
get the data as I do in . However, as I
remember, I2C seems only use the compatible string after the comma,
that
means only for "wlf,wm8904", it uses "wm8904" to match. So, I remove
all
the code I added, and just keep these, and it can get the device type
correctly.



So, when I submit the patch and keep the code as simple as possible.



I don't understand what's keeping this patch from being applied. Voice,
do you mind re-sending?


I need to convince myself that the above actually works and is doing the
right thing; the above explanation sounds like if it works it might be
relying on a bug.


I'd call it a undocumented feature. But I wouldn't rely on it being
around for ever. In my opinion to be future proof the driver should
explicitly handle the OF case in the probe function.



I will add this into probe function in next version.
Thanks.

Best Regards,
Bo Shen
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Re: [alsa-devel] [PATCH v2 1/3] ASoC: codecs: wm8904: add dt ids table

[Bo Shen]

Hi Mark, Lars-Perter,

On 01/27/2015 12:49 AM, Lars-Peter Clausen wrote:

On 01/26/2015 05:42 PM, Mark Brown wrote:

On Mon, Jan 26, 2015 at 04:24:38PM +0100, Nicolas Ferre wrote:

Le 16/01/2015 02:17, Bo Shen a écrit :



Does this end up in the i2c_driver_id driver data or do we need some
extra code when devtype is assigned to check for an of_node and
look at
the DT data instead?  That certainly used to be the case...



At the beginning I think as the same as you, and also add the code to
get the data as I do in drivers/misc/atmel-ssc.c. However, as I
remember, I2C seems only use the compatible string after the comma,
that
means only for wlf,wm8904, it uses wm8904 to match. So, I remove
all
the code I added, and just keep these, and it can get the device type
correctly.



So, when I submit the patch and keep the code as simple as possible.



I don't understand what's keeping this patch from being applied. Voice,
do you mind re-sending?


I need to convince myself that the above actually works and is doing the
right thing; the above explanation sounds like if it works it might be
relying on a bug.


I'd call it a undocumented feature. But I wouldn't rely on it being
around for ever. In my opinion to be future proof the driver should
explicitly handle the OF case in the probe function.



I will add this into probe function in next version.
Thanks.

Best Regards,
Bo Shen
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[PATCH v3 1/2] ASoC: codecs: wm8904: add dt ids table

[Bo Shen]

From: Alexander Morozov li...@meltdown.ru

The WM8904 and WM8918 has the same data type, while the WM8912
has different data type. So, use the data in dt ids table to
distinguish them.

Signed-off-by: Alexander Morozov li...@meltdown.ru
[voice.s...@atmel.com: add code to distinguish device type]
Signed-off-by: Bo Shen voice.s...@atmel.com
---
Changes in v3:
  - Get the device type from match data in probe function.
Changes in v2:
  - Add driver data for distinguish the device capability.

 sound/soc/codecs/wm8904.c | 31 ++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index 4d2d2b1..a80bc52 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -2098,6 +2098,24 @@ static const struct regmap_config wm8904_regmap = {
.num_reg_defaults = ARRAY_SIZE(wm8904_reg_defaults),
 };
 
+#ifdef CONFIG_OF
+static enum wm8904_type wm8904_data = WM8904;
+static enum wm8904_type wm8912_data = WM8912;
+
+static const struct of_device_id wm8904_of_match[] = {
+   {
+   .compatible = wlf,wm8904,
+   .data = wm8904_data,
+   }, {
+   .compatible = wlf,wm8912,
+   .data = wm8912_data,
+   }, {
+   /* sentinel */
+   }
+};
+MODULE_DEVICE_TABLE(of, wm8904_of_match);
+#endif
+
 static int wm8904_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
 {
@@ -2125,7 +2143,17 @@ static int wm8904_i2c_probe(struct i2c_client *i2c,
return ret;
}
 
-   wm8904-devtype = id-driver_data;
+   if (i2c-dev.of_node) {
+   const struct of_device_id *match;
+
+   match = of_match_node(wm8904_of_match, i2c-dev.of_node);
+   if (match == NULL)
+   return -EINVAL;
+   wm8904-devtype = *((enum wm8904_type *)match-data);
+   } else {
+   wm8904-devtype = id-driver_data;
+   }
+
i2c_set_clientdata(i2c, wm8904);
wm8904-pdata = i2c-dev.platform_data;
 
@@ -2259,6 +2287,7 @@ static struct i2c_driver wm8904_i2c_driver = {
.driver = {
.name = wm8904,
.owner = THIS_MODULE,
+   .of_match_table = of_match_ptr(wm8904_of_match),
},
.probe =wm8904_i2c_probe,
.remove =   wm8904_i2c_remove,
-- 
2.3.0.rc0

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[PATCH v3 2/2] binding: wm8904: add new compatible string

[Bo Shen]

The wlf,wm8912 compatible string is used for wm8912, which
share driver with wm8904, however, the data type is different.

Signed-off-by: Bo Shen voice.s...@atmel.com
---
Changes in v3: None
Changes in v2: None

 Documentation/devicetree/bindings/sound/wm8904.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/sound/wm8904.txt 
b/Documentation/devicetree/bindings/sound/wm8904.txt
index e99f409..66bf261 100644
--- a/Documentation/devicetree/bindings/sound/wm8904.txt
+++ b/Documentation/devicetree/bindings/sound/wm8904.txt
@@ -3,7 +3,7 @@ WM8904 audio CODEC
 This device supports I2C only.
 
 Required properties:
-  - compatible: wlf,wm8904
+  - compatible: wlf,wm8904 or wlf,wm8912
   - reg: the I2C address of the device.
   - clock-names: mclk
   - clocks: reference to
-- 
2.3.0.rc0

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[PATCH v2 1/2] ASoC: atmel_ssc_dai: fix start event for I2S mode

[Bo Shen]

According to the I2S specification information as following:
  - WS = 0, channel 1 (left)
  - WS = 1, channel 2 (right)
So, the start event should be TF/RF falling edge.

Reported-by: Songjun Wu 
Signed-off-by: Bo Shen 
---

Changes in v2: None

 sound/soc/atmel/atmel_ssc_dai.c | 18 --
 1 file changed, 4 insertions(+), 14 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 99ff35e..e691aab 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -348,7 +348,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
struct atmel_pcm_dma_params *dma_params;
int dir, channels, bits;
u32 tfmr, rfmr, tcmr, rcmr;
-   int start_event;
int ret;
int fslen, fslen_ext;
 
@@ -457,19 +456,10 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
 * The SSC transmit clock is obtained from the BCLK signal on
 * on the TK line, and the SSC receive clock is
 * generated from the transmit clock.
-*
-*  For single channel data, one sample is transferred
-* on the falling edge of the LRC clock.
-* For two channel data, one sample is
-* transferred on both edges of the LRC clock.
 */
-   start_event = ((channels == 1)
-   ? SSC_START_FALLING_RF
-   : SSC_START_EDGE_RF);
-
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
-   | SSC_BF(RCMR_START, start_event)
+   | SSC_BF(RCMR_START, SSC_START_FALLING_RF)
| SSC_BF(RCMR_CKI, SSC_CKI_RISING)
| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
| SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
@@ -478,14 +468,14 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rfmr =SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
| SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
| SSC_BF(RFMR_FSLEN, 0)
-   | SSC_BF(RFMR_DATNB, 0)
+   | SSC_BF(RFMR_DATNB, (channels - 1))
| SSC_BIT(RFMR_MSBF)
| SSC_BF(RFMR_LOOP, 0)
| SSC_BF(RFMR_DATLEN, (bits - 1));
 
tcmr =SSC_BF(TCMR_PERIOD, 0)
| SSC_BF(TCMR_STTDLY, START_DELAY)
-   | SSC_BF(TCMR_START, start_event)
+   | SSC_BF(TCMR_START, SSC_START_FALLING_RF)
| SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(TCMR_CKO, SSC_CKO_NONE)
| SSC_BF(TCMR_CKS, ssc->clk_from_rk_pin ?
@@ -495,7 +485,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
| SSC_BF(TFMR_FSDEN, 0)
| SSC_BF(TFMR_FSOS, SSC_FSOS_NONE)
| SSC_BF(TFMR_FSLEN, 0)
-   | SSC_BF(TFMR_DATNB, 0)
+   | SSC_BF(TFMR_DATNB, (channels - 1))
| SSC_BIT(TFMR_MSBF)
| SSC_BF(TFMR_DATDEF, 0)
| SSC_BF(TFMR_DATLEN, (bits - 1));
-- 
2.3.0.rc0

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[PATCH v2 2/2] ASoC: atmel_ssc_dai: remove clock pin comments

[Bo Shen]

As the clock can be get from TK/RK pin, so remove the comments.

Signed-off-by: Bo Shen 
---

Changes in v2:
 - remove the comments for DSP mode A, codec as master

 sound/soc/atmel/atmel_ssc_dai.c | 12 +---
 1 file changed, 1 insertion(+), 11 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index e691aab..3cd7059 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -450,13 +450,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
break;
 
case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
-   /*
-* I2S format, CODEC supplies BCLK and LRC clocks.
-*
-* The SSC transmit clock is obtained from the BCLK signal on
-* on the TK line, and the SSC receive clock is
-* generated from the transmit clock.
-*/
+   /* I2S format, CODEC supplies BCLK and LRC clocks. */
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
| SSC_BF(RCMR_START, SSC_START_FALLING_RF)
@@ -535,10 +529,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
/*
 * DSP/PCM Mode A format, CODEC supplies BCLK and LRC clocks.
 *
-* The SSC transmit clock is obtained from the BCLK signal on
-* on the TK line, and the SSC receive clock is
-* generated from the transmit clock.
-*
 * Data is transferred on first BCLK after LRC pulse rising
 * edge.If stereo, the right channel data is contiguous with
 * the left channel data.
-- 
2.3.0.rc0

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Re: [PATCH 2/2] ASoC: atmel_ssc_dai: remove clock pin comments

[Bo Shen]

Hi Peter,

On 01/19/2015 09:54 PM, Peter Rosin wrote:

As the clock can be get from TK/RK pin, so remove the comments.

Signed-off-by: Bo Shen 
---
  sound/soc/atmel/atmel_ssc_dai.c | 4 
  1 file changed, 4 deletions(-)
diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index e691aab..198661b 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -452,10 +452,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
/*
 * I2S format, CODEC supplies BCLK and LRC clocks.
-*
-* The SSC transmit clock is obtained from the BCLK signal on
-* on the TK line, and the SSC receive clock is
-* generated from the transmit clock.
 */
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
--
2.3.0.rc0


Hi!

You should probably remove that comment from the case with
SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM as well...


Thanks, I will remove it in next version.


Cheers,
Peter



Best Regards,
Bo Shen
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Re: [PATCH 2/2] ASoC: atmel_ssc_dai: remove clock pin comments

[Bo Shen]

Hi Peter,

On 01/19/2015 09:54 PM, Peter Rosin wrote:

As the clock can be get from TK/RK pin, so remove the comments.

Signed-off-by: Bo Shen voice.s...@atmel.com
---
  sound/soc/atmel/atmel_ssc_dai.c | 4 
  1 file changed, 4 deletions(-)
diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index e691aab..198661b 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -452,10 +452,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
/*
 * I2S format, CODEC supplies BCLK and LRC clocks.
-*
-* The SSC transmit clock is obtained from the BCLK signal on
-* on the TK line, and the SSC receive clock is
-* generated from the transmit clock.
 */
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
--
2.3.0.rc0


Hi!

You should probably remove that comment from the case with
SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM as well...


Thanks, I will remove it in next version.


Cheers,
Peter



Best Regards,
Bo Shen
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[PATCH v2 1/2] ASoC: atmel_ssc_dai: fix start event for I2S mode

[Bo Shen]

According to the I2S specification information as following:
  - WS = 0, channel 1 (left)
  - WS = 1, channel 2 (right)
So, the start event should be TF/RF falling edge.

Reported-by: Songjun Wu songjun...@atmel.com
Signed-off-by: Bo Shen voice.s...@atmel.com
---

Changes in v2: None

 sound/soc/atmel/atmel_ssc_dai.c | 18 --
 1 file changed, 4 insertions(+), 14 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 99ff35e..e691aab 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -348,7 +348,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
struct atmel_pcm_dma_params *dma_params;
int dir, channels, bits;
u32 tfmr, rfmr, tcmr, rcmr;
-   int start_event;
int ret;
int fslen, fslen_ext;
 
@@ -457,19 +456,10 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
 * The SSC transmit clock is obtained from the BCLK signal on
 * on the TK line, and the SSC receive clock is
 * generated from the transmit clock.
-*
-*  For single channel data, one sample is transferred
-* on the falling edge of the LRC clock.
-* For two channel data, one sample is
-* transferred on both edges of the LRC clock.
 */
-   start_event = ((channels == 1)
-   ? SSC_START_FALLING_RF
-   : SSC_START_EDGE_RF);
-
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
-   | SSC_BF(RCMR_START, start_event)
+   | SSC_BF(RCMR_START, SSC_START_FALLING_RF)
| SSC_BF(RCMR_CKI, SSC_CKI_RISING)
| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
| SSC_BF(RCMR_CKS, ssc-clk_from_rk_pin ?
@@ -478,14 +468,14 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rfmr =SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
| SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
| SSC_BF(RFMR_FSLEN, 0)
-   | SSC_BF(RFMR_DATNB, 0)
+   | SSC_BF(RFMR_DATNB, (channels - 1))
| SSC_BIT(RFMR_MSBF)
| SSC_BF(RFMR_LOOP, 0)
| SSC_BF(RFMR_DATLEN, (bits - 1));
 
tcmr =SSC_BF(TCMR_PERIOD, 0)
| SSC_BF(TCMR_STTDLY, START_DELAY)
-   | SSC_BF(TCMR_START, start_event)
+   | SSC_BF(TCMR_START, SSC_START_FALLING_RF)
| SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(TCMR_CKO, SSC_CKO_NONE)
| SSC_BF(TCMR_CKS, ssc-clk_from_rk_pin ?
@@ -495,7 +485,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
| SSC_BF(TFMR_FSDEN, 0)
| SSC_BF(TFMR_FSOS, SSC_FSOS_NONE)
| SSC_BF(TFMR_FSLEN, 0)
-   | SSC_BF(TFMR_DATNB, 0)
+   | SSC_BF(TFMR_DATNB, (channels - 1))
| SSC_BIT(TFMR_MSBF)
| SSC_BF(TFMR_DATDEF, 0)
| SSC_BF(TFMR_DATLEN, (bits - 1));
-- 
2.3.0.rc0

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[PATCH v2 2/2] ASoC: atmel_ssc_dai: remove clock pin comments

[Bo Shen]

As the clock can be get from TK/RK pin, so remove the comments.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

Changes in v2:
 - remove the comments for DSP mode A, codec as master

 sound/soc/atmel/atmel_ssc_dai.c | 12 +---
 1 file changed, 1 insertion(+), 11 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index e691aab..3cd7059 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -450,13 +450,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
break;
 
case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
-   /*
-* I2S format, CODEC supplies BCLK and LRC clocks.
-*
-* The SSC transmit clock is obtained from the BCLK signal on
-* on the TK line, and the SSC receive clock is
-* generated from the transmit clock.
-*/
+   /* I2S format, CODEC supplies BCLK and LRC clocks. */
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
| SSC_BF(RCMR_START, SSC_START_FALLING_RF)
@@ -535,10 +529,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
/*
 * DSP/PCM Mode A format, CODEC supplies BCLK and LRC clocks.
 *
-* The SSC transmit clock is obtained from the BCLK signal on
-* on the TK line, and the SSC receive clock is
-* generated from the transmit clock.
-*
 * Data is transferred on first BCLK after LRC pulse rising
 * edge.If stereo, the right channel data is contiguous with
 * the left channel data.
-- 
2.3.0.rc0

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[PATCH 2/2] ASoC: atmel_ssc_dai: remove clock pin comments

[Bo Shen]

As the clock can be get from TK/RK pin, so remove the comments.

Signed-off-by: Bo Shen 
---

 sound/soc/atmel/atmel_ssc_dai.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index e691aab..198661b 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -452,10 +452,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
/*
 * I2S format, CODEC supplies BCLK and LRC clocks.
-*
-* The SSC transmit clock is obtained from the BCLK signal on
-* on the TK line, and the SSC receive clock is
-* generated from the transmit clock.
 */
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
-- 
2.3.0.rc0

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[PATCH 1/2] ASoC: atmel_ssc_dai: fix start event for I2S mode

[Bo Shen]

According to the I2S specification information as following:
  - WS = 0, channel 1 (left)
  - WS = 1, channel 2 (right)
So, the start event should be TF/RF falling edge.

Reported-by: Songjun Wu 
Signed-off-by: Bo Shen 
---

 sound/soc/atmel/atmel_ssc_dai.c | 18 --
 1 file changed, 4 insertions(+), 14 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 99ff35e..e691aab 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -348,7 +348,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
struct atmel_pcm_dma_params *dma_params;
int dir, channels, bits;
u32 tfmr, rfmr, tcmr, rcmr;
-   int start_event;
int ret;
int fslen, fslen_ext;
 
@@ -457,19 +456,10 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
 * The SSC transmit clock is obtained from the BCLK signal on
 * on the TK line, and the SSC receive clock is
 * generated from the transmit clock.
-*
-*  For single channel data, one sample is transferred
-* on the falling edge of the LRC clock.
-* For two channel data, one sample is
-* transferred on both edges of the LRC clock.
 */
-   start_event = ((channels == 1)
-   ? SSC_START_FALLING_RF
-   : SSC_START_EDGE_RF);
-
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
-   | SSC_BF(RCMR_START, start_event)
+   | SSC_BF(RCMR_START, SSC_START_FALLING_RF)
| SSC_BF(RCMR_CKI, SSC_CKI_RISING)
| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
| SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
@@ -478,14 +468,14 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rfmr =SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
| SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
| SSC_BF(RFMR_FSLEN, 0)
-   | SSC_BF(RFMR_DATNB, 0)
+   | SSC_BF(RFMR_DATNB, (channels - 1))
| SSC_BIT(RFMR_MSBF)
| SSC_BF(RFMR_LOOP, 0)
| SSC_BF(RFMR_DATLEN, (bits - 1));
 
tcmr =SSC_BF(TCMR_PERIOD, 0)
| SSC_BF(TCMR_STTDLY, START_DELAY)
-   | SSC_BF(TCMR_START, start_event)
+   | SSC_BF(TCMR_START, SSC_START_FALLING_RF)
| SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(TCMR_CKO, SSC_CKO_NONE)
| SSC_BF(TCMR_CKS, ssc->clk_from_rk_pin ?
@@ -495,7 +485,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
| SSC_BF(TFMR_FSDEN, 0)
| SSC_BF(TFMR_FSOS, SSC_FSOS_NONE)
| SSC_BF(TFMR_FSLEN, 0)
-   | SSC_BF(TFMR_DATNB, 0)
+   | SSC_BF(TFMR_DATNB, (channels - 1))
| SSC_BIT(TFMR_MSBF)
| SSC_BF(TFMR_DATDEF, 0)
| SSC_BF(TFMR_DATLEN, (bits - 1));
-- 
2.3.0.rc0

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Re: [PATCH v2 1/3] ASoC: codecs: wm8904: add dt ids table

[Bo Shen]

Hi Mark,

On 01/15/2015 07:54 PM, Mark Brown wrote:

On Mon, Dec 15, 2014 at 11:31:11AM +0800, Bo Shen wrote:


+#ifdef CONFIG_OF
+static enum wm8904_type wm8904_data = WM8904;
+static enum wm8904_type wm8912_data = WM8912;
+
+static const struct of_device_id wm8904_of_match[] = {
+   {
+   .compatible = "wlf,wm8904",
+   .data = _data,


Does this end up in the i2c_driver_id driver data or do we need some
extra code when devtype is assigned to check for an of_node and look at
the DT data instead?  That certainly used to be the case...


At the beginning I think as the same as you, and also add the code to 
get the data as I do in . However, as I 
remember, I2C seems only use the compatible string after the comma, that 
means only for "wlf,wm8904", it uses "wm8904" to match. So, I remove all 
the code I added, and just keep these, and it can get the device type 
correctly.


So, when I submit the patch and keep the code as simple as possible.

Thanks.

Best Regards,
Bo Shen

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Re: [PATCH v2 1/3] ASoC: codecs: wm8904: add dt ids table

[Bo Shen]

Hi Mark,

On 01/15/2015 07:54 PM, Mark Brown wrote:

On Mon, Dec 15, 2014 at 11:31:11AM +0800, Bo Shen wrote:


+#ifdef CONFIG_OF
+static enum wm8904_type wm8904_data = WM8904;
+static enum wm8904_type wm8912_data = WM8912;
+
+static const struct of_device_id wm8904_of_match[] = {
+   {
+   .compatible = wlf,wm8904,
+   .data = wm8904_data,


Does this end up in the i2c_driver_id driver data or do we need some
extra code when devtype is assigned to check for an of_node and look at
the DT data instead?  That certainly used to be the case...


At the beginning I think as the same as you, and also add the code to 
get the data as I do in drivers/misc/atmel-ssc.c. However, as I 
remember, I2C seems only use the compatible string after the comma, that 
means only for wlf,wm8904, it uses wm8904 to match. So, I remove all 
the code I added, and just keep these, and it can get the device type 
correctly.


So, when I submit the patch and keep the code as simple as possible.

Thanks.

Best Regards,
Bo Shen

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Please read the FAQ at  http://www.tux.org/lkml/

[PATCH 1/2] ASoC: atmel_ssc_dai: fix start event for I2S mode

[Bo Shen]

According to the I2S specification information as following:
  - WS = 0, channel 1 (left)
  - WS = 1, channel 2 (right)
So, the start event should be TF/RF falling edge.

Reported-by: Songjun Wu songjun...@atmel.com
Signed-off-by: Bo Shen voice.s...@atmel.com
---

 sound/soc/atmel/atmel_ssc_dai.c | 18 --
 1 file changed, 4 insertions(+), 14 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 99ff35e..e691aab 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -348,7 +348,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
struct atmel_pcm_dma_params *dma_params;
int dir, channels, bits;
u32 tfmr, rfmr, tcmr, rcmr;
-   int start_event;
int ret;
int fslen, fslen_ext;
 
@@ -457,19 +456,10 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
 * The SSC transmit clock is obtained from the BCLK signal on
 * on the TK line, and the SSC receive clock is
 * generated from the transmit clock.
-*
-*  For single channel data, one sample is transferred
-* on the falling edge of the LRC clock.
-* For two channel data, one sample is
-* transferred on both edges of the LRC clock.
 */
-   start_event = ((channels == 1)
-   ? SSC_START_FALLING_RF
-   : SSC_START_EDGE_RF);
-
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
-   | SSC_BF(RCMR_START, start_event)
+   | SSC_BF(RCMR_START, SSC_START_FALLING_RF)
| SSC_BF(RCMR_CKI, SSC_CKI_RISING)
| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
| SSC_BF(RCMR_CKS, ssc-clk_from_rk_pin ?
@@ -478,14 +468,14 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
rfmr =SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
| SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
| SSC_BF(RFMR_FSLEN, 0)
-   | SSC_BF(RFMR_DATNB, 0)
+   | SSC_BF(RFMR_DATNB, (channels - 1))
| SSC_BIT(RFMR_MSBF)
| SSC_BF(RFMR_LOOP, 0)
| SSC_BF(RFMR_DATLEN, (bits - 1));
 
tcmr =SSC_BF(TCMR_PERIOD, 0)
| SSC_BF(TCMR_STTDLY, START_DELAY)
-   | SSC_BF(TCMR_START, start_event)
+   | SSC_BF(TCMR_START, SSC_START_FALLING_RF)
| SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(TCMR_CKO, SSC_CKO_NONE)
| SSC_BF(TCMR_CKS, ssc-clk_from_rk_pin ?
@@ -495,7 +485,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
| SSC_BF(TFMR_FSDEN, 0)
| SSC_BF(TFMR_FSOS, SSC_FSOS_NONE)
| SSC_BF(TFMR_FSLEN, 0)
-   | SSC_BF(TFMR_DATNB, 0)
+   | SSC_BF(TFMR_DATNB, (channels - 1))
| SSC_BIT(TFMR_MSBF)
| SSC_BF(TFMR_DATDEF, 0)
| SSC_BF(TFMR_DATLEN, (bits - 1));
-- 
2.3.0.rc0

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[PATCH 2/2] ASoC: atmel_ssc_dai: remove clock pin comments

[Bo Shen]

As the clock can be get from TK/RK pin, so remove the comments.

Signed-off-by: Bo Shen voice.s...@atmel.com
---

 sound/soc/atmel/atmel_ssc_dai.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index e691aab..198661b 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -452,10 +452,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
*substream,
case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
/*
 * I2S format, CODEC supplies BCLK and LRC clocks.
-*
-* The SSC transmit clock is obtained from the BCLK signal on
-* on the TK line, and the SSC receive clock is
-* generated from the transmit clock.
 */
rcmr =SSC_BF(RCMR_PERIOD, 0)
| SSC_BF(RCMR_STTDLY, START_DELAY)
-- 
2.3.0.rc0

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Re: [PATCH] Asoc: sam9x5_wm8731: depend on ARCH_AT91 instead of SOC_AT91SAM9X5

[Bo Shen]

Hi Alexandre Belloni,

On 01/13/2015 08:27 PM, Alexandre Belloni wrote:

The SOC_AT91SAM9X5 option is going to be removed, only depend on ARCH_AT91 like
for the other drivers.

Signed-off-by: Alexandre Belloni 


Acked-by: Bo Shen 


---
  sound/soc/atmel/Kconfig | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/atmel/Kconfig b/sound/soc/atmel/Kconfig
index fb3878312bf8..1579e994acf8 100644
--- a/sound/soc/atmel/Kconfig
+++ b/sound/soc/atmel/Kconfig
@@ -45,7 +45,7 @@ config SND_ATMEL_SOC_WM8904

  config SND_AT91_SOC_SAM9X5_WM8731
tristate "SoC Audio support for WM8731-based at91sam9x5 board"
-   depends on ATMEL_SSC && SND_ATMEL_SOC && SOC_AT91SAM9X5
+   depends on ARCH_AT91 && ATMEL_SSC && SND_ATMEL_SOC
select SND_ATMEL_SOC_SSC
select SND_ATMEL_SOC_DMA
    select SND_SOC_WM8731



Best Regards
Bo Shen
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[PATCH v3] ASoC: wm8904: fix runtime warning

[Bo Shen]

Correct the path name for mux to get rid of the following warning:

--->8---
wm8904 1-001a: Control not supported for path ADCL -> [Left] -> AIFOUTL
wm8904 1-001a: ASoC: no dapm match for ADCL --> Left --> AIFOUTL
wm8904 1-001a: ASoC: Failed to add route ADCL -> Left -> AIFOUTL
wm8904 1-001a: Control not supported for path ADCR -> [Right] -> AIFOUTL
wm8904 1-001a: ASoC: no dapm match for ADCR --> Right --> AIFOUTL
wm8904 1-001a: ASoC: Failed to add route ADCR -> Right -> AIFOUTL
wm8904 1-001a: Control not supported for path ADCL -> [Left] -> AIFOUTR
wm8904 1-001a: ASoC: no dapm match for ADCL --> Left --> AIFOUTR
wm8904 1-001a: ASoC: Failed to add route ADCL -> Left -> AIFOUTR
wm8904 1-001a: Control not supported for path ADCR -> [Right] -> AIFOUTR
wm8904 1-001a: ASoC: no dapm match for ADCR --> Right --> AIFOUTR
wm8904 1-001a: ASoC: Failed to add route ADCR -> Right -> AIFOUTR
wm8904 1-001a: Control not supported for path AIFINR -> [Right] -> DACL
wm8904 1-001a: ASoC: no dapm match for AIFINR --> Right --> DACL
wm8904 1-001a: ASoC: Failed to add route AIFINR -> Right -> DACL
wm8904 1-001a: Control not supported for path AIFINL -> [Left] -> DACL
wm8904 1-001a: ASoC: no dapm match for AIFINL --> Left --> DACL
wm8904 1-001a: ASoC: Failed to add route AIFINL -> Left -> DACL
wm8904 1-001a: Control not supported for path AIFINR -> [Right] -> DACR
wm8904 1-001a: ASoC: no dapm match for AIFINR --> Right --> DACR
wm8904 1-001a: ASoC: Failed to add route AIFINR -> Right -> DACR
wm8904 1-001a: Control not supported for path AIFINL -> [Left] -> DACR
wm8904 1-001a: ASoC: no dapm match for AIFINL --> Left --> DACR
wm8904 1-001a: ASoC: Failed to add route AIFINL -> Left -> DACR
---8<---

Signed-off-by: Bo Shen 
---

Changes in v3:
  - Correct the DAC related route path

Changes in v2:
  - Correct the mux path name.
  - Route the mux to the pins.

 sound/soc/codecs/wm8904.c | 23 +++
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index 4d2d2b1..75b87c5 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -1076,10 +1076,13 @@ static const struct snd_soc_dapm_route adc_intercon[] = 
{
{ "Right Capture PGA", NULL, "Right Capture Mux" },
{ "Right Capture PGA", NULL, "Right Capture Inverting Mux" },
 
-   { "AIFOUTL", "Left",  "ADCL" },
-   { "AIFOUTL", "Right", "ADCR" },
-   { "AIFOUTR", "Left",  "ADCL" },
-   { "AIFOUTR", "Right", "ADCR" },
+   { "AIFOUTL Mux", "Left", "ADCL" },
+   { "AIFOUTL Mux", "Right", "ADCR" },
+   { "AIFOUTR Mux", "Left", "ADCL" },
+   { "AIFOUTR Mux", "Right", "ADCR" },
+
+   { "AIFOUTL", NULL, "AIFOUTL Mux" },
+   { "AIFOUTR", NULL, "AIFOUTR Mux" },
 
{ "ADCL", NULL, "CLK_DSP" },
{ "ADCL", NULL, "Left Capture PGA" },
@@ -1089,12 +1092,16 @@ static const struct snd_soc_dapm_route adc_intercon[] = 
{
 };
 
 static const struct snd_soc_dapm_route dac_intercon[] = {
-   { "DACL", "Right", "AIFINR" },
-   { "DACL", "Left",  "AIFINL" },
+   { "DACL Mux", "Left", "AIFINL" },
+   { "DACL Mux", "Right", "AIFINR" },
+
+   { "DACR Mux", "Left", "AIFINL" },
+   { "DACR Mux", "Right", "AIFINR" },
+
+   { "DACL", NULL, "DACL Mux" },
{ "DACL", NULL, "CLK_DSP" },
 
-   { "DACR", "Right", "AIFINR" },
-   { "DACR", "Left",  "AIFINL" },
+   { "DACR", NULL, "DACR Mux" },
{ "DACR", NULL, "CLK_DSP" },
 
{ "Charge pump", NULL, "SYSCLK" },
-- 
2.1.0.24.g4109c28

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Re: [alsa-devel] [PATCH] ASoC: wm8904: fix runtime warning

[Bo Shen]

Hi Lars-Peter Clausen,

On 01/13/2015 04:56 PM, Lars-Peter Clausen wrote:

On 01/13/2015 06:36 AM, Bo Shen wrote:

Hi Lars-Perter Clausen,

On 01/12/2015 05:30 PM, Lars-Peter Clausen wrote:

On 01/12/2015 04:32 AM, Bo Shen wrote:
[...]

diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index 4d2d2b1..38582d7 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -1076,10 +1076,10 @@ static const struct snd_soc_dapm_route
adc_intercon[] = {
  { "Right Capture PGA", NULL, "Right Capture Mux" },
  { "Right Capture PGA", NULL, "Right Capture Inverting Mux" },

-{ "AIFOUTL", "Left",  "ADCL" },
-{ "AIFOUTL", "Right", "ADCR" },
-{ "AIFOUTR", "Left",  "ADCL" },
-{ "AIFOUTR", "Right", "ADCR" },
+{ "AIFOUTL", NULL, "ADCL" },
+{ "AIFOUTL", NULL, "ADCR" },
+{ "AIFOUTR", NULL, "ADCL" },
+{ "AIFOUTR", NULL, "ADCR" },


Is this the right fix here? I am not super familiar with the
driver but it appears to contain an "AIFOUTL Mux" control which
is not connected to anything. Looks like maybe this is a mistake
the mux is indeded to be included in the path? Feels like we
should either remove the control as well or hook it into the
path.


Thank for your information.
I think here it should correct the path name as
--->8---
{ "AIFOUTL Mux", "Left",  "ADCL" },
{ "AIFOUTL Mux", "Right", "ADCR" },
{ "AIFOUTR Mux", "Left",  "ADCL" },
{ "AIFOUTR Mux", "Right", "ADCR" },
---8<---

Thanks again. I will send out the new version.


Your probably also need to connect the mux to the output pins.


Thanks for you information, after check the datasheet, I still don't know
which the mux should connect to which output pins.


AIFOUTL Mux to AIFOUTL
AIFOUTR Mux to AIFOUTR


Thanks. I will send new version patch for review.

Best Regards,
Bo Shen

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[PATCH v2] ASoC: wm8904: fix runtime warning

[Bo Shen]

Correct the path name for mux to get rid of the following warning:

--->8---
wm8904 1-001a: Control not supported for path ADCL -> [Left] -> AIFOUTL
wm8904 1-001a: ASoC: no dapm match for ADCL --> Left --> AIFOUTL
wm8904 1-001a: ASoC: Failed to add route ADCL -> Left -> AIFOUTL
wm8904 1-001a: Control not supported for path ADCR -> [Right] -> AIFOUTL
wm8904 1-001a: ASoC: no dapm match for ADCR --> Right --> AIFOUTL
wm8904 1-001a: ASoC: Failed to add route ADCR -> Right -> AIFOUTL
wm8904 1-001a: Control not supported for path ADCL -> [Left] -> AIFOUTR
wm8904 1-001a: ASoC: no dapm match for ADCL --> Left --> AIFOUTR
wm8904 1-001a: ASoC: Failed to add route ADCL -> Left -> AIFOUTR
wm8904 1-001a: Control not supported for path ADCR -> [Right] -> AIFOUTR
wm8904 1-001a: ASoC: no dapm match for ADCR --> Right --> AIFOUTR
wm8904 1-001a: ASoC: Failed to add route ADCR -> Right -> AIFOUTR
wm8904 1-001a: Control not supported for path AIFINR -> [Right] -> DACL
wm8904 1-001a: ASoC: no dapm match for AIFINR --> Right --> DACL
wm8904 1-001a: ASoC: Failed to add route AIFINR -> Right -> DACL
wm8904 1-001a: Control not supported for path AIFINL -> [Left] -> DACL
wm8904 1-001a: ASoC: no dapm match for AIFINL --> Left --> DACL
wm8904 1-001a: ASoC: Failed to add route AIFINL -> Left -> DACL
wm8904 1-001a: Control not supported for path AIFINR -> [Right] -> DACR
wm8904 1-001a: ASoC: no dapm match for AIFINR --> Right --> DACR
wm8904 1-001a: ASoC: Failed to add route AIFINR -> Right -> DACR
wm8904 1-001a: Control not supported for path AIFINL -> [Left] -> DACR
wm8904 1-001a: ASoC: no dapm match for AIFINL --> Left --> DACR
wm8904 1-001a: ASoC: Failed to add route AIFINL -> Left -> DACR
---8<---

Signed-off-by: Bo Shen 
---

Changes in v2:
- Correct the mux path name.
- Route the mux to the pins.

 sound/soc/codecs/wm8904.c | 25 +
 1 file changed, 17 insertions(+), 8 deletions(-)

diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index 4d2d2b1..110d0e6 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -1076,10 +1076,13 @@ static const struct snd_soc_dapm_route adc_intercon[] = 
{
{ "Right Capture PGA", NULL, "Right Capture Mux" },
{ "Right Capture PGA", NULL, "Right Capture Inverting Mux" },
 
-   { "AIFOUTL", "Left",  "ADCL" },
-   { "AIFOUTL", "Right", "ADCR" },
-   { "AIFOUTR", "Left",  "ADCL" },
-   { "AIFOUTR", "Right", "ADCR" },
+   { "AIFOUTL Mux", "Left", "ADCL" },
+   { "AIFOUTL Mux", "Right", "ADCR" },
+   { "AIFOUTR Mux", "Left", "ADCL" },
+   { "AIFOUTR Mux", "Right", "ADCR" },
+
+   { "AIFOUTL", NULL, "AIFOUTL Mux" },
+   { "AIFOUTR", NULL, "AIFOUTR Mux" },
 
{ "ADCL", NULL, "CLK_DSP" },
{ "ADCL", NULL, "Left Capture PGA" },
@@ -1089,14 +1092,20 @@ static const struct snd_soc_dapm_route adc_intercon[] = 
{
 };
 
 static const struct snd_soc_dapm_route dac_intercon[] = {
-   { "DACL", "Right", "AIFINR" },
-   { "DACL", "Left",  "AIFINL" },
+   { "DACL", NULL, "AIFINL" },
+   { "DACL", NULL, "AIFINR" },
{ "DACL", NULL, "CLK_DSP" },
 
-   { "DACR", "Right", "AIFINR" },
-   { "DACR", "Left",  "AIFINL" },
+   { "DACR", NULL, "AIFINL" },
+   { "DACR", NULL, "AIFINR" },
{ "DACR", NULL, "CLK_DSP" },
 
+   { "DACL Mux", "Left", "DACL" },
+   { "DACL Mux", "Right", "DACR" },
+
+   { "DACR Mux", "Left", "DACL" },
+   { "DACR Mux", "Right", "DACR" },
+
{ "Charge pump", NULL, "SYSCLK" },
 
{ "Headphone Output", NULL, "HPL PGA" },
-- 
2.1.0.24.g4109c28

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Re: [PATCH] Asoc: sam9x5_wm8731: depend on ARCH_AT91 instead of SOC_AT91SAM9X5

[Bo Shen]

Hi Alexandre Belloni,

On 01/13/2015 08:27 PM, Alexandre Belloni wrote:

The SOC_AT91SAM9X5 option is going to be removed, only depend on ARCH_AT91 like
for the other drivers.

Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com


Acked-by: Bo Shen voice.s...@atmel.com


---
  sound/soc/atmel/Kconfig | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/atmel/Kconfig b/sound/soc/atmel/Kconfig
index fb3878312bf8..1579e994acf8 100644
--- a/sound/soc/atmel/Kconfig
+++ b/sound/soc/atmel/Kconfig
@@ -45,7 +45,7 @@ config SND_ATMEL_SOC_WM8904

  config SND_AT91_SOC_SAM9X5_WM8731
tristate SoC Audio support for WM8731-based at91sam9x5 board
-   depends on ATMEL_SSC  SND_ATMEL_SOC  SOC_AT91SAM9X5
+   depends on ARCH_AT91  ATMEL_SSC  SND_ATMEL_SOC
select SND_ATMEL_SOC_SSC
select SND_ATMEL_SOC_DMA
select SND_SOC_WM8731



Best Regards
Bo Shen
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Re: [alsa-devel] [PATCH] ASoC: wm8904: fix runtime warning

[Bo Shen]

Hi Lars-Peter Clausen,

On 01/13/2015 04:56 PM, Lars-Peter Clausen wrote:

On 01/13/2015 06:36 AM, Bo Shen wrote:

Hi Lars-Perter Clausen,

On 01/12/2015 05:30 PM, Lars-Peter Clausen wrote:

On 01/12/2015 04:32 AM, Bo Shen wrote:
[...]

diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index 4d2d2b1..38582d7 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -1076,10 +1076,10 @@ static const struct snd_soc_dapm_route
adc_intercon[] = {
  { Right Capture PGA, NULL, Right Capture Mux },
  { Right Capture PGA, NULL, Right Capture Inverting Mux },

-{ AIFOUTL, Left,  ADCL },
-{ AIFOUTL, Right, ADCR },
-{ AIFOUTR, Left,  ADCL },
-{ AIFOUTR, Right, ADCR },
+{ AIFOUTL, NULL, ADCL },
+{ AIFOUTL, NULL, ADCR },
+{ AIFOUTR, NULL, ADCL },
+{ AIFOUTR, NULL, ADCR },


Is this the right fix here? I am not super familiar with the
driver but it appears to contain an AIFOUTL Mux control which
is not connected to anything. Looks like maybe this is a mistake
the mux is indeded to be included in the path? Feels like we
should either remove the control as well or hook it into the
path.


Thank for your information.
I think here it should correct the path name as
---8---
{ AIFOUTL Mux, Left,  ADCL },
{ AIFOUTL Mux, Right, ADCR },
{ AIFOUTR Mux, Left,  ADCL },
{ AIFOUTR Mux, Right, ADCR },
---8---

Thanks again. I will send out the new version.


Your probably also need to connect the mux to the output pins.


Thanks for you information, after check the datasheet, I still don't know
which the mux should connect to which output pins.


AIFOUTL Mux to AIFOUTL
AIFOUTR Mux to AIFOUTR


Thanks. I will send new version patch for review.

Best Regards,
Bo Shen

--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
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Please read the FAQ at  http://www.tux.org/lkml/

[PATCH v2] ASoC: wm8904: fix runtime warning

[Bo Shen]

Correct the path name for mux to get rid of the following warning:

---8---
wm8904 1-001a: Control not supported for path ADCL - [Left] - AIFOUTL
wm8904 1-001a: ASoC: no dapm match for ADCL -- Left -- AIFOUTL
wm8904 1-001a: ASoC: Failed to add route ADCL - Left - AIFOUTL
wm8904 1-001a: Control not supported for path ADCR - [Right] - AIFOUTL
wm8904 1-001a: ASoC: no dapm match for ADCR -- Right -- AIFOUTL
wm8904 1-001a: ASoC: Failed to add route ADCR - Right - AIFOUTL
wm8904 1-001a: Control not supported for path ADCL - [Left] - AIFOUTR
wm8904 1-001a: ASoC: no dapm match for ADCL -- Left -- AIFOUTR
wm8904 1-001a: ASoC: Failed to add route ADCL - Left - AIFOUTR
wm8904 1-001a: Control not supported for path ADCR - [Right] - AIFOUTR
wm8904 1-001a: ASoC: no dapm match for ADCR -- Right -- AIFOUTR
wm8904 1-001a: ASoC: Failed to add route ADCR - Right - AIFOUTR
wm8904 1-001a: Control not supported for path AIFINR - [Right] - DACL
wm8904 1-001a: ASoC: no dapm match for AIFINR -- Right -- DACL
wm8904 1-001a: ASoC: Failed to add route AIFINR - Right - DACL
wm8904 1-001a: Control not supported for path AIFINL - [Left] - DACL
wm8904 1-001a: ASoC: no dapm match for AIFINL -- Left -- DACL
wm8904 1-001a: ASoC: Failed to add route AIFINL - Left - DACL
wm8904 1-001a: Control not supported for path AIFINR - [Right] - DACR
wm8904 1-001a: ASoC: no dapm match for AIFINR -- Right -- DACR
wm8904 1-001a: ASoC: Failed to add route AIFINR - Right - DACR
wm8904 1-001a: Control not supported for path AIFINL - [Left] - DACR
wm8904 1-001a: ASoC: no dapm match for AIFINL -- Left -- DACR
wm8904 1-001a: ASoC: Failed to add route AIFINL - Left - DACR
---8---

Signed-off-by: Bo Shen voice.s...@atmel.com
---

Changes in v2:
- Correct the mux path name.
- Route the mux to the pins.

 sound/soc/codecs/wm8904.c | 25 +
 1 file changed, 17 insertions(+), 8 deletions(-)

diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index 4d2d2b1..110d0e6 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -1076,10 +1076,13 @@ static const struct snd_soc_dapm_route adc_intercon[] = 
{
{ Right Capture PGA, NULL, Right Capture Mux },
{ Right Capture PGA, NULL, Right Capture Inverting Mux },
 
-   { AIFOUTL, Left,  ADCL },
-   { AIFOUTL, Right, ADCR },
-   { AIFOUTR, Left,  ADCL },
-   { AIFOUTR, Right, ADCR },
+   { AIFOUTL Mux, Left, ADCL },
+   { AIFOUTL Mux, Right, ADCR },
+   { AIFOUTR Mux, Left, ADCL },
+   { AIFOUTR Mux, Right, ADCR },
+
+   { AIFOUTL, NULL, AIFOUTL Mux },
+   { AIFOUTR, NULL, AIFOUTR Mux },
 
{ ADCL, NULL, CLK_DSP },
{ ADCL, NULL, Left Capture PGA },
@@ -1089,14 +1092,20 @@ static const struct snd_soc_dapm_route adc_intercon[] = 
{
 };
 
 static const struct snd_soc_dapm_route dac_intercon[] = {
-   { DACL, Right, AIFINR },
-   { DACL, Left,  AIFINL },
+   { DACL, NULL, AIFINL },
+   { DACL, NULL, AIFINR },
{ DACL, NULL, CLK_DSP },
 
-   { DACR, Right, AIFINR },
-   { DACR, Left,  AIFINL },
+   { DACR, NULL, AIFINL },
+   { DACR, NULL, AIFINR },
{ DACR, NULL, CLK_DSP },
 
+   { DACL Mux, Left, DACL },
+   { DACL Mux, Right, DACR },
+
+   { DACR Mux, Left, DACL },
+   { DACR Mux, Right, DACR },
+
{ Charge pump, NULL, SYSCLK },
 
{ Headphone Output, NULL, HPL PGA },
-- 
2.1.0.24.g4109c28

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[PATCH v3] ASoC: wm8904: fix runtime warning

[Bo Shen]

Correct the path name for mux to get rid of the following warning:

---8---
wm8904 1-001a: Control not supported for path ADCL - [Left] - AIFOUTL
wm8904 1-001a: ASoC: no dapm match for ADCL -- Left -- AIFOUTL
wm8904 1-001a: ASoC: Failed to add route ADCL - Left - AIFOUTL
wm8904 1-001a: Control not supported for path ADCR - [Right] - AIFOUTL
wm8904 1-001a: ASoC: no dapm match for ADCR -- Right -- AIFOUTL
wm8904 1-001a: ASoC: Failed to add route ADCR - Right - AIFOUTL
wm8904 1-001a: Control not supported for path ADCL - [Left] - AIFOUTR
wm8904 1-001a: ASoC: no dapm match for ADCL -- Left -- AIFOUTR
wm8904 1-001a: ASoC: Failed to add route ADCL - Left - AIFOUTR
wm8904 1-001a: Control not supported for path ADCR - [Right] - AIFOUTR
wm8904 1-001a: ASoC: no dapm match for ADCR -- Right -- AIFOUTR
wm8904 1-001a: ASoC: Failed to add route ADCR - Right - AIFOUTR
wm8904 1-001a: Control not supported for path AIFINR - [Right] - DACL
wm8904 1-001a: ASoC: no dapm match for AIFINR -- Right -- DACL
wm8904 1-001a: ASoC: Failed to add route AIFINR - Right - DACL
wm8904 1-001a: Control not supported for path AIFINL - [Left] - DACL
wm8904 1-001a: ASoC: no dapm match for AIFINL -- Left -- DACL
wm8904 1-001a: ASoC: Failed to add route AIFINL - Left - DACL
wm8904 1-001a: Control not supported for path AIFINR - [Right] - DACR
wm8904 1-001a: ASoC: no dapm match for AIFINR -- Right -- DACR
wm8904 1-001a: ASoC: Failed to add route AIFINR - Right - DACR
wm8904 1-001a: Control not supported for path AIFINL - [Left] - DACR
wm8904 1-001a: ASoC: no dapm match for AIFINL -- Left -- DACR
wm8904 1-001a: ASoC: Failed to add route AIFINL - Left - DACR
---8---

Signed-off-by: Bo Shen voice.s...@atmel.com
---

Changes in v3:
  - Correct the DAC related route path

Changes in v2:
  - Correct the mux path name.
  - Route the mux to the pins.

 sound/soc/codecs/wm8904.c | 23 +++
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index 4d2d2b1..75b87c5 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -1076,10 +1076,13 @@ static const struct snd_soc_dapm_route adc_intercon[] = 
{
{ Right Capture PGA, NULL, Right Capture Mux },
{ Right Capture PGA, NULL, Right Capture Inverting Mux },
 
-   { AIFOUTL, Left,  ADCL },
-   { AIFOUTL, Right, ADCR },
-   { AIFOUTR, Left,  ADCL },
-   { AIFOUTR, Right, ADCR },
+   { AIFOUTL Mux, Left, ADCL },
+   { AIFOUTL Mux, Right, ADCR },
+   { AIFOUTR Mux, Left, ADCL },
+   { AIFOUTR Mux, Right, ADCR },
+
+   { AIFOUTL, NULL, AIFOUTL Mux },
+   { AIFOUTR, NULL, AIFOUTR Mux },
 
{ ADCL, NULL, CLK_DSP },
{ ADCL, NULL, Left Capture PGA },
@@ -1089,12 +1092,16 @@ static const struct snd_soc_dapm_route adc_intercon[] = 
{
 };
 
 static const struct snd_soc_dapm_route dac_intercon[] = {
-   { DACL, Right, AIFINR },
-   { DACL, Left,  AIFINL },
+   { DACL Mux, Left, AIFINL },
+   { DACL Mux, Right, AIFINR },
+
+   { DACR Mux, Left, AIFINL },
+   { DACR Mux, Right, AIFINR },
+
+   { DACL, NULL, DACL Mux },
{ DACL, NULL, CLK_DSP },
 
-   { DACR, Right, AIFINR },
-   { DACR, Left,  AIFINL },
+   { DACR, NULL, DACR Mux },
{ DACR, NULL, CLK_DSP },
 
{ Charge pump, NULL, SYSCLK },
-- 
2.1.0.24.g4109c28

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