[PATCH v2 4/4] ASoC: samsung: add to configure dma maxburst size
This patch adds to configure dma maxburst size. Signed-off-by: Boojin Kim --- sound/soc/samsung/dma.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/sound/soc/samsung/dma.c b/sound/soc/samsung/dma.c index 21b7926..bd4faa0 100644 --- a/sound/soc/samsung/dma.c +++ b/sound/soc/samsung/dma.c @@ -172,6 +172,7 @@ static int dma_hw_params(struct snd_pcm_substream *substream, (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM); config.width = prtd->params->dma_size; + config.maxburst = 1; config.fifo = prtd->params->dma_addr; prtd->params->ch = prtd->params->ops->request( prtd->params->channel, &req, rtd->cpu_dai->dev, -- 1.7.5.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 3/4] spi: s3c64xx: add dma maxburst size initialization
This patch adds dma maxburst size initialization.
The maxburst should be set by MODE_CFGn.DMA_TYPE,
because the pl330 dma driver supports burst mode.
Signed-off-by: Hyeonkook Kim
---
drivers/spi/spi-s3c64xx.c | 18 ++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index e862ab8..5e6cafe 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -287,10 +287,20 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
struct s3c64xx_spi_driver_data *sdd;
struct samsung_dma_prep info;
struct samsung_dma_config config;
+ void __iomem *regs;
+ unsigned int mode_cfg;
if (dma->direction == DMA_DEV_TO_MEM) {
sdd = container_of((void *)dma,
struct s3c64xx_spi_driver_data, rx_dma);
+
+ regs = sdd->regs;
+ mode_cfg = readl(regs + S3C64XX_SPI_MODE_CFG);
+ if (mode_cfg & S3C64XX_SPI_MODE_4BURST)
+ config.maxburst = 4;
+ else
+ config.maxburst = 1;
+
config.direction = sdd->rx_dma.direction;
config.fifo = sdd->sfr_start + S3C64XX_SPI_RX_DATA;
config.width = sdd->cur_bpw / 8;
@@ -298,6 +308,14 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
} else {
sdd = container_of((void *)dma,
struct s3c64xx_spi_driver_data, tx_dma);
+
+ regs = sdd->regs;
+ mode_cfg = readl(regs + S3C64XX_SPI_MODE_CFG);
+ if (mode_cfg & S3C64XX_SPI_MODE_4BURST)
+ config.maxburst = 4;
+ else
+ config.maxburst = 1;
+
config.direction = sdd->tx_dma.direction;
config.fifo = sdd->sfr_start + S3C64XX_SPI_TX_DATA;
config.width = sdd->cur_bpw / 8;
--
1.7.5.4
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[PATCH v2 2/4] ARM: EXYNOS: support burst mode for for dev-to-mem and mem-to-dev transmit
This patch adds to support burst mode for for dev-to-mem and dev-to-mem transmit
Signed-off-by: Boojin Kim
---
arch/arm/plat-samsung/dma-ops.c |4 ++--
arch/arm/plat-samsung/include/plat/dma-ops.h |1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 71d58dd..6c90c16 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -60,14 +60,14 @@ static int samsung_dmadev_config(unsigned ch,
slave_config.direction = param->direction;
slave_config.src_addr = param->fifo;
slave_config.src_addr_width = param->width;
- slave_config.src_maxburst = 1;
+ slave_config.src_maxburst = param->maxburst;
dmaengine_slave_config(chan, &slave_config);
} else if (param->direction == DMA_MEM_TO_DEV) {
memset(&slave_config, 0, sizeof(struct dma_slave_config));
slave_config.direction = param->direction;
slave_config.dst_addr = param->fifo;
slave_config.dst_addr_width = param->width;
- slave_config.dst_maxburst = 1;
+ slave_config.dst_maxburst = param->maxburst;
dmaengine_slave_config(chan, &slave_config);
} else {
pr_warn("unsupported direction\n");
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h
b/arch/arm/plat-samsung/include/plat/dma-ops.h
index 1141782..383bd6d 100644
--- a/arch/arm/plat-samsung/include/plat/dma-ops.h
+++ b/arch/arm/plat-samsung/include/plat/dma-ops.h
@@ -35,6 +35,7 @@ struct samsung_dma_prep {
struct samsung_dma_config {
enum dma_transfer_direction direction;
enum dma_slave_buswidth width;
+ u32 maxburst;
dma_addr_t fifo;
};
--
1.7.5.4
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[PATCH v2 1/4] DMA: pl330: support burst mode for dev-to-mem and mem-to-dev transmit
This patch adds to support burst mode for dev-to-mem and mem-to-dev transmit
Change-Id: I9723e49383416773699cf7735168177c8d036f30
Signed-off-by: Boojin Kim
---
drivers/dma/pl330.c | 12 +++-
1 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 80680ee..c67f037 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -1271,10 +1271,11 @@ static inline int _ldst_devtomem(unsigned dry_run, u8
buf[],
const struct _xfer_spec *pxs, int cyc)
{
int off = 0;
+ enum pl330_cond cond = (pxs->r->cfg->brst_len == 1) ? SINGLE : BURST;
while (cyc--) {
- off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->r->peri);
- off += _emit_LDP(dry_run, &buf[off], SINGLE, pxs->r->peri);
+ off += _emit_WFP(dry_run, &buf[off], cond, pxs->r->peri);
+ off += _emit_LDP(dry_run, &buf[off], cond, pxs->r->peri);
off += _emit_ST(dry_run, &buf[off], ALWAYS);
off += _emit_FLUSHP(dry_run, &buf[off], pxs->r->peri);
}
@@ -1286,11 +1287,12 @@ static inline int _ldst_memtodev(unsigned dry_run, u8
buf[],
const struct _xfer_spec *pxs, int cyc)
{
int off = 0;
+ enum pl330_cond cond = (pxs->r->cfg->brst_len == 1) ? SINGLE : BURST;
while (cyc--) {
- off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->r->peri);
+ off += _emit_WFP(dry_run, &buf[off], cond, pxs->r->peri);
off += _emit_LD(dry_run, &buf[off], ALWAYS);
- off += _emit_STP(dry_run, &buf[off], SINGLE, pxs->r->peri);
+ off += _emit_STP(dry_run, &buf[off], cond, pxs->r->peri);
off += _emit_FLUSHP(dry_run, &buf[off], pxs->r->peri);
}
@@ -2835,7 +2837,7 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct
scatterlist *sgl,
}
desc->rqcfg.brst_size = pch->burst_sz;
- desc->rqcfg.brst_len = 1;
+ desc->rqcfg.brst_len = pch->burst_len;
}
/* Return the last desc in the chain */
--
1.7.5.4
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[PATCH 2/2] ARM: EXYNOS: support burst mode for for dev-to-mem and dev-to-mem transmit
This patch adds to support burst mode for for dev-to-mem and dev-to-mem transmit
Signed-off-by: Boojin Kim
---
arch/arm/plat-samsung/dma-ops.c | 10 --
arch/arm/plat-samsung/include/plat/dma-ops.h |1 +
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index d088afa..c25e842 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -54,14 +54,20 @@ static int samsung_dmadev_config(unsigned ch,
slave_config.direction = param->direction;
slave_config.src_addr = param->fifo;
slave_config.src_addr_width = param->width;
- slave_config.src_maxburst = 1;
+ if (param->maxburst)
+ slave_config.src_maxburst = param->maxburst;
+ else
+ slave_config.src_maxburst = 1;
dmaengine_slave_config(chan, &slave_config);
} else if (param->direction == DMA_MEM_TO_DEV) {
memset(&slave_config, 0, sizeof(struct dma_slave_config));
slave_config.direction = param->direction;
slave_config.dst_addr = param->fifo;
slave_config.dst_addr_width = param->width;
- slave_config.dst_maxburst = 1;
+ if (param->maxburst)
+ slave_config.dst_maxburst = param->maxburst;
+ else
+ slave_config.dst_maxburst = 1;
dmaengine_slave_config(chan, &slave_config);
} else {
pr_warn("unsupported direction\n");
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h
b/arch/arm/plat-samsung/include/plat/dma-ops.h
index f5144cd..95893c7 100644
--- a/arch/arm/plat-samsung/include/plat/dma-ops.h
+++ b/arch/arm/plat-samsung/include/plat/dma-ops.h
@@ -35,6 +35,7 @@ struct samsung_dma_prep {
struct samsung_dma_config {
enum dma_transfer_direction direction;
enum dma_slave_buswidth width;
+ u32 maxburst;
dma_addr_t fifo;
};
--
1.7.5.4
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[PATCH 1/2] dma: pl330: support burst mode for dev-to-mem and mem-to-dev transmit
This patch adds to support burst mode for dev-to-mem and mem-to-dev transmit
Signed-off-by: Boojin Kim
---
drivers/dma/pl330.c | 12 +++-
1 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 80680ee..a070160 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -1271,10 +1271,11 @@ static inline int _ldst_devtomem(unsigned dry_run, u8
buf[],
const struct _xfer_spec *pxs, int cyc)
{
int off = 0;
+ enum pl330_cond cond = (pxs->r->cfg->brst_size == 1) ? SINGLE : BURST;
while (cyc--) {
- off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->r->peri);
- off += _emit_LDP(dry_run, &buf[off], SINGLE, pxs->r->peri);
+ off += _emit_WFP(dry_run, &buf[off], cond, pxs->r->peri);
+ off += _emit_LDP(dry_run, &buf[off], cond, pxs->r->peri);
off += _emit_ST(dry_run, &buf[off], ALWAYS);
off += _emit_FLUSHP(dry_run, &buf[off], pxs->r->peri);
}
@@ -1286,11 +1287,12 @@ static inline int _ldst_memtodev(unsigned dry_run, u8
buf[],
const struct _xfer_spec *pxs, int cyc)
{
int off = 0;
+ enum pl330_cond cond = (pxs->r->cfg->brst_size == 1) ? SINGLE : BURST;
while (cyc--) {
- off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->r->peri);
+ off += _emit_WFP(dry_run, &buf[off], cond, pxs->r->peri);
off += _emit_LD(dry_run, &buf[off], ALWAYS);
- off += _emit_STP(dry_run, &buf[off], SINGLE, pxs->r->peri);
+ off += _emit_STP(dry_run, &buf[off], cond, pxs->r->peri);
off += _emit_FLUSHP(dry_run, &buf[off], pxs->r->peri);
}
@@ -2835,7 +2837,7 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct
scatterlist *sgl,
}
desc->rqcfg.brst_size = pch->burst_sz;
- desc->rqcfg.brst_len = 1;
+ desc->rqcfg.brst_len = pch->burst_len;
}
/* Return the last desc in the chain */
--
1.7.5.4
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RE: [PATCH 1/3] ARM: MM: Add the workaround of Errata 774769
Russell King - ARM Linux wrote: > > -3: mov r10, #0 > > + /* Cortex-A15 Errata */ > > +3: ldr r10, =0x0c0f@ Cortex-A15 primary part number > > + teq r0, r10 > > + bne 4f > > +#ifdef CONFIG_ARM_ERRATA_774769 > > There's not much point testing for the part number of the work-around isn't > enabled. The errata 773022 on second patch series is also required to checking the part number. In my opinion, the testing for Cortex-A15 primary part number is required before working the work-around to support several A15 errata. > > > + teq r6, #0x4@ present in r0p4 > > + mrceq p15, 0, r10, c1, c0, 1 @ read aux control register > > tsteq r10, #1 << 15 > > to avoid writing to the aux control register if the errata has already been > applied. Do you mean "tsteq r10, #1 << 25" ? If yes, it needs to branch and will make a little complicated And, I think maybe this function could be the first step to configure this erratum. Thanks for your review > > > + orreq r10, r10, #1 << 25 @ set bit #25 > > + mcreq p15, 0, r10, c1, c0, 1 @ write aux control register > > +#endif > > + > > +4: mov r10, #0 > > mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate > > dsb > > #ifdef CONFIG_MMU > > -- > > 1.7.5.4 > > > > > > > > ___ > linux-arm-kernel mailing list > linux-arm-ker...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/3] ARM: MM: Add the workaround of Errata 766421
This patch adds the workaround of errata 766421 that adds 'dmb' when changing the translation regime after conditions that the errata 766421 may occur. Concretely, Add 'dmb' when changing ASID and secure state for cortex-A15 r0p4. Signed-off-by: Boojin Kim --- arch/arm/Kconfig | 13 + arch/arm/mach-exynos/Kconfig |1 + arch/arm/mm/proc-v7-2level.S |2 ++ 3 files changed, 16 insertions(+), 0 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 93397da..9bd34dd 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1417,6 +1417,19 @@ config ARM_ERRATA_775420 to deadlock. This workaround puts DSB before executing ISB if an abort may occur on cache maintenance. +config ARM_ERRATA_766421 + bool "ARM errata: Strongly-Ordered/Device load or NC LDREX could return incorrect data" + depends on CPU_V7 + help + This option enables the workaround for the erratum 766421 affecting + Cortex-A15 erratum (r0p4). + In certain situations, a strongly ordered or device load instruction, + or a non-cacheable normal memory load-exclusive instruction could + match multiple fill buffers and return incorrect data. + This workaround is add DMB instruction when making any change to the + translation regime and before doing any new loads/stores/preloads + in the new translation regime. + config ARM_ERRATA_773022 bool "ARM errata: incorrect instructions may be executed from loop buffer" depends on CPU_V7 diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index bb92f4c..4e28e1c 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -66,6 +66,7 @@ config SOC_EXYNOS5250 select S5P_PM if PM select S5P_SLEEP if PM select SAMSUNG_DMADEV + select ARM_ERRATA_766421 help Enable EXYNOS5250 SoC support diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S index fd045e7..c663b2e 100644 --- a/arch/arm/mm/proc-v7-2level.S +++ b/arch/arm/mm/proc-v7-2level.S @@ -53,6 +53,8 @@ ENTRY(cpu_v7_switch_mm) #endif #ifdef CONFIG_ARM_ERRATA_754322 dsb +#elif CONFIG_ARM_ERRATA_766421 + dmb #endif mcr p15, 0, r1, c13, c0, 1 @ set context ID isb -- 1.7.5.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3] ARM: MM: Add the workaround of Errata 773022
This patch adds the workaround of Errata 773022 that disables loop buffer. Signed-off-by: Boojin Kim --- arch/arm/Kconfig | 10 ++ arch/arm/mach-exynos/Kconfig |1 + arch/arm/mm/proc-v7.S|6 ++ 3 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 11a57e2..93397da 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1417,6 +1417,16 @@ config ARM_ERRATA_775420 to deadlock. This workaround puts DSB before executing ISB if an abort may occur on cache maintenance. +config ARM_ERRATA_773022 + bool "ARM errata: incorrect instructions may be executed from loop buffer" + depends on CPU_V7 + help + This option enables the workaround for the erratum 773022 affecting + Cortex-A15 (r0p4). + In certain rare sequences of code, the loop buffer may deliver + incorrect instructions. + This workaround is to disable loop buffer. + config ARM_ERRATA_774769 bool "ARM errata: data corruption may occur with store streaming in a system" depends on CPU_V7 diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index e1168fb..bb92f4c 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -22,6 +22,7 @@ config ARCH_EXYNOS4 config ARCH_EXYNOS5 bool "SAMSUNG EXYNOS5" select HAVE_SMP + select ARM_ERRATA_773022 select ARM_ERRATA_774769 help Samsung EXYNOS5 (Cortex-A15) SoC based systems diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 06cbdfa..0b4c518 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -249,6 +249,12 @@ __v7_setup: 3: ldr r10, =0x0c0f@ Cortex-A15 primary part number teq r0, r10 bne 4f +#ifdef CONFIG_ARM_ERRATA_773022 + teq r6, #0x4@ present in r0p4 + mrceq p15, 0, r10, c1, c0, 1 @ read aux control register + orreq r10, r10, #1 << 1 @ set bit #1 + mcreq p15, 0, r10, c1, c0, 1 @ write aux control register +#endif #ifdef CONFIG_ARM_ERRATA_774769 teq r6, #0x4@ present in r0p4 mrceq p15, 0, r10, c1, c0, 1 @ read aux control register -- 1.7.5.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3] ARM: MM: Add the workaround of Errata 774769
This patch adds the workaround of Errata 774769 that configures write streaming on versions of A15 affected by this erratum such that no streaming-write ever allocates into the L2 cache. Signed-off-by: Boojin Kim --- arch/arm/Kconfig | 11 +++ arch/arm/mach-exynos/Kconfig |1 + arch/arm/mm/proc-v7.S| 16 ++-- 3 files changed, 26 insertions(+), 2 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9759fec..11a57e2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1417,6 +1417,17 @@ config ARM_ERRATA_775420 to deadlock. This workaround puts DSB before executing ISB if an abort may occur on cache maintenance. +config ARM_ERRATA_774769 + bool "ARM errata: data corruption may occur with store streaming in a system" + depends on CPU_V7 + help + This option enables the workaround for the erratum 774769 affecting + Cortex-A15 (r0p4). + External memory may be corrupted on erratum 774769. + The workaround is to configure write streaming on versions of A15 + affected by this erratum such that no streaming-write ever allocates + into the L2 cache. + endmenu source "arch/arm/common/Kconfig" diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index da55107..e1168fb 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -22,6 +22,7 @@ config ARCH_EXYNOS4 config ARCH_EXYNOS5 bool "SAMSUNG EXYNOS5" select HAVE_SMP + select ARM_ERRATA_774769 help Samsung EXYNOS5 (Cortex-A15) SoC based systems diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 846d279..06cbdfa 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -208,7 +208,7 @@ __v7_setup: orreq r10, r10, #(1 << 22)@ set the Write Allocate disable bit mcreq p15, 1, r10, c9, c0, 2 @ write the L2 cache aux ctrl register #endif - b 3f + b 4f /* Cortex-A9 Errata */ 2: ldr r10, =0x0c09@ Cortex-A9 primary part number @@ -243,8 +243,20 @@ __v7_setup: mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register 1: #endif + b 4f -3: mov r10, #0 + /* Cortex-A15 Errata */ +3: ldr r10, =0x0c0f@ Cortex-A15 primary part number + teq r0, r10 + bne 4f +#ifdef CONFIG_ARM_ERRATA_774769 + teq r6, #0x4@ present in r0p4 + mrceq p15, 0, r10, c1, c0, 1 @ read aux control register + orreq r10, r10, #1 << 25 @ set bit #25 + mcreq p15, 0, r10, c1, c0, 1 @ write aux control register +#endif + +4: mov r10, #0 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate dsb #ifdef CONFIG_MMU -- 1.7.5.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
