[PATCH] exec: make prepare_bprm_creds static

2018-12-09 Thread Chanho Min
prepare_bprm_creds is not used outside exec.c, so there's no reason for it
to have external linkage.

Signed-off-by: Chanho Min 
---
 fs/exec.c   | 2 +-
 include/linux/binfmts.h | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/fs/exec.c b/fs/exec.c
index fc281b7..b6c9e5f 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -1399,7 +1399,7 @@ EXPORT_SYMBOL(finalize_exec);
  * Or, if exec fails before, free_bprm() should release ->cred and
  * and unlock.
  */
-int prepare_bprm_creds(struct linux_binprm *bprm)
+static int prepare_bprm_creds(struct linux_binprm *bprm)
 {
if (mutex_lock_interruptible(>signal->cred_guard_mutex))
return -ERESTARTNOINTR;
diff --git a/include/linux/binfmts.h b/include/linux/binfmts.h
index e9f5fe6..6a9e43d 100644
--- a/include/linux/binfmts.h
+++ b/include/linux/binfmts.h
@@ -138,7 +138,6 @@ extern int transfer_args_to_stack(struct linux_binprm *bprm,
 extern int bprm_change_interp(const char *interp, struct linux_binprm *bprm);
 extern int copy_strings_kernel(int argc, const char *const *argv,
   struct linux_binprm *bprm);
-extern int prepare_bprm_creds(struct linux_binprm *bprm);
 extern void install_exec_creds(struct linux_binprm *bprm);
 extern void set_binfmt(struct linux_binfmt *new);
 extern ssize_t read_code(struct file *, unsigned long, loff_t, size_t);
-- 
2.1.4



RE: [PATCH] Revert "exec: make de_thread() freezable (was: Re: Linux 4.20-rc4)

2018-12-06 Thread Chanho Min
> >
> > I am sorry for the reverting this patch. It's also my fault that
> > I didn't check lockdep. But, We decided to keep this patch in our product.
> > Freeze fail is a real problem we've had for the last two years,
> > whereas lockdep's notice is not a real problem.
> > We hope this issue will be resolved soon.
> 
> I guess it makes sense for your usage.
> 
> How often do you see the failures without the patch?
Very rare, it happens about 1 in 1000 suspends.

Chanho,



RE: [PATCH] Revert "exec: make de_thread() freezable (was: Re: Linux 4.20-rc4)

2018-12-06 Thread Chanho Min
> >
> > I am sorry for the reverting this patch. It's also my fault that
> > I didn't check lockdep. But, We decided to keep this patch in our product.
> > Freeze fail is a real problem we've had for the last two years,
> > whereas lockdep's notice is not a real problem.
> > We hope this issue will be resolved soon.
> 
> I guess it makes sense for your usage.
> 
> How often do you see the failures without the patch?
Very rare, it happens about 1 in 1000 suspends.

Chanho,



RE: [PATCH] Revert "exec: make de_thread() freezable (was: Re: Linux 4.20-rc4)

2018-12-06 Thread Chanho Min
> From: Oleg Nesterov [mailto:o...@redhat.com]
> Sent: Wednesday, December 05, 2018 11:36 PM
> To: Ingo Molnar
> Cc: Linus Torvalds; Linux List Kernel Mailing; Rafael J. Wysocki; Chanho Min;
> Thomas Gleixner; Peter Zijlstra; Pavel Machek; Michal Hocko
> Subject: Re: [PATCH] Revert "exec: make de_thread() freezable (was: Re: Linux
> 4.20-rc4)
> 
> Ingo, et al,
> 
> Sorry, I am sick and can't participate this discussion right now,
> 
> On 12/04, Ingo Molnar wrote:
> >
> > * Oleg Nesterov  wrote:
> >
> > > we really need to narrow the (huge) scope of ->cred_guard_mutex in exec
> paths.
> > >
> > > my attempt to fix this was nacked, and nobody suggested a better solution
> so far.
> >
> > Any link to your patch and the NAK?
> 
> See https://lore.kernel.org/lkml/20170213141452.ga30...@redhat.com/
> 
> No questions, the patch wasn't pretty. And imo we need to rework the security
> hooks in the long term.
> 
> Oleg.

I am sorry for the reverting this patch. It's also my fault that
I didn't check lockdep. But, We decided to keep this patch in our product.
Freeze fail is a real problem we've had for the last two years,
whereas lockdep's notice is not a real problem.
We hope this issue will be resolved soon.

Special thanks to Oleg,
Chanho



RE: [PATCH] Revert "exec: make de_thread() freezable (was: Re: Linux 4.20-rc4)

2018-12-06 Thread Chanho Min
> From: Oleg Nesterov [mailto:o...@redhat.com]
> Sent: Wednesday, December 05, 2018 11:36 PM
> To: Ingo Molnar
> Cc: Linus Torvalds; Linux List Kernel Mailing; Rafael J. Wysocki; Chanho Min;
> Thomas Gleixner; Peter Zijlstra; Pavel Machek; Michal Hocko
> Subject: Re: [PATCH] Revert "exec: make de_thread() freezable (was: Re: Linux
> 4.20-rc4)
> 
> Ingo, et al,
> 
> Sorry, I am sick and can't participate this discussion right now,
> 
> On 12/04, Ingo Molnar wrote:
> >
> > * Oleg Nesterov  wrote:
> >
> > > we really need to narrow the (huge) scope of ->cred_guard_mutex in exec
> paths.
> > >
> > > my attempt to fix this was nacked, and nobody suggested a better solution
> so far.
> >
> > Any link to your patch and the NAK?
> 
> See https://lore.kernel.org/lkml/20170213141452.ga30...@redhat.com/
> 
> No questions, the patch wasn't pretty. And imo we need to rework the security
> hooks in the long term.
> 
> Oleg.

I am sorry for the reverting this patch. It's also my fault that
I didn't check lockdep. But, We decided to keep this patch in our product.
Freeze fail is a real problem we've had for the last two years,
whereas lockdep's notice is not a real problem.
We hope this issue will be resolved soon.

Special thanks to Oleg,
Chanho



RE: [PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-29 Thread Chanho Min
> Chanho Min wrote:
> >
> > > > > On Mon, 26 Nov 2018 06:36:37 +0100,
> > > > > Chanho Min wrote:
> > > > > >
> > > > > > Commit 67ec1072b053 ("ALSA: pcm: Fix rwsem deadlock for non-
> atomic
> > > > > > PCM
> > > > > > stream") fixes deadlock for non-atomic PCM stream. But, This
> patch
> > > > > causes antother stuck.
> > > > > > If writer is RT thread and reader is a normal thread, the reader
> > > > > > thread will be difficult to get scheduled. It may not give
> chance
> > > > > > to release readlocks and writer gets stuck for a long time if
> they
> > > > > > are
> > > > > pinned to single cpu.
> > > > > >
> > > > > > The deadlock described in the previous commit is because the
> linux
> > > > > > rwsem queues like a FIFO. So, we might need non-FIFO writelock,
> > > > > > not non-
> > > > > block one.
> > > > > >
> > > > > > My suggestion is that the writer gives reader a chance to be
> > > > > > scheduled by using the minimum msleep() instaed of spinning
> > > > > > without blocking by writer. Also, The *_nonblock may be changed
> to
> > > > > > *_nonfifo appropriately
> > > > > to this concept.
> > > > > > In terms of performance, when trylock is failed, this minimum
> > > > > > periodic msleep will have the same performance as the tick-based
> > > > > schedule()/wake_up_q().
> > > > > >
> > > > > > Suggested-by: Wonmin Jung 
> > > > > > Signed-off-by: Chanho Min 
> > > > >
> > > > > Hrm, converting unconditionally with msleep() looks too drastic.
> > > >
> > > > Yes, it looks drastic. But, IMHO, I can't say busy-spin is not non-
> > > drastic.
> > > > To fix the root cause, We may need another rwsem that does not work
> as
> > > > a FIFO.
> > >
> > > Right, but applying msleep(1) unconditionally is really bad.
> > >
> > > > > I guess you've hit this while not explicitly using the linked PCM
> > > > > streams, i.e. in the call of snd_pcm_unlink() at close, right?
> > > > >
> > > > > Then this can be worked around by checking the link before calling
> it.
> > > > > Could you check the patch below?
> > > >
> > > > More testing is needed, but it seems to be fixed by your patch.
> > > > We may not use the linked PCM.
> > >
> > > Then I'm sure that my patch papers over.
> > Thanks, Plz let me know when the patch is merged.
> 
> I'm going to merge the patch below now.
> It slips from the pull request to Linus in today, but will be the next
> one for 4.20-rc6.
> 
> > > > But, If the linked PCM is enabled,  Can snd_pcm_unlink() be called?
> > > > This also seems to be a workaround.
> > >
> > > Yes, for the linked streams, something else is needed *in addition*.
> > >
> > > The original fix with busy loop also assumed that this code path (via
> > > snd_pcm_link() and snd_pcm_unlink()) is the rare occasion, and it
> didn't
> > > consider that it were called for regular use cases.  So the fix to
> make
> > > things just works for regular use cases without any artifact must be
> > > implemented in the first place.  The fix for the linked streams comes
> at
> > > next.  It might be like your msleep() change as a workaround, but in
> > > anyway it's far less urgency.
> >
> > msleep is worst, but If it is harmless, can I apply my patch to the
> private
> > tree
> > temporarily until your next fix comes?
> > We may use the linked streams in the near future. It makes our product
> > unstable.
> > It's urgency for us. How is your opinion?
> 
> I'll add your fix on top of mine for now.  The msleep() is applied
> only for linked streams, so it's not that bad any longer.
> 
> 
> thanks,
> 
> Takashi
> 
> -- 8< --
> From: Takashi Iwai 
> Subject: [PATCH] ALSA: pcm: Call snd_pcm_unlink() conditionally at closing
> 
> Currently the PCM core calls snd_pcm_unlink() always unconditionally
> at closing a stream.  However, since snd_pcm_unlink() invokes the
> global rwsem down, the lock can be easily contended.  More badly, when
> a thread runs in a high priority RT-FIFO, it may stall at spinning.
> 
> Bas

RE: [PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-29 Thread Chanho Min
> Chanho Min wrote:
> >
> > > > > On Mon, 26 Nov 2018 06:36:37 +0100,
> > > > > Chanho Min wrote:
> > > > > >
> > > > > > Commit 67ec1072b053 ("ALSA: pcm: Fix rwsem deadlock for non-
> atomic
> > > > > > PCM
> > > > > > stream") fixes deadlock for non-atomic PCM stream. But, This
> patch
> > > > > causes antother stuck.
> > > > > > If writer is RT thread and reader is a normal thread, the reader
> > > > > > thread will be difficult to get scheduled. It may not give
> chance
> > > > > > to release readlocks and writer gets stuck for a long time if
> they
> > > > > > are
> > > > > pinned to single cpu.
> > > > > >
> > > > > > The deadlock described in the previous commit is because the
> linux
> > > > > > rwsem queues like a FIFO. So, we might need non-FIFO writelock,
> > > > > > not non-
> > > > > block one.
> > > > > >
> > > > > > My suggestion is that the writer gives reader a chance to be
> > > > > > scheduled by using the minimum msleep() instaed of spinning
> > > > > > without blocking by writer. Also, The *_nonblock may be changed
> to
> > > > > > *_nonfifo appropriately
> > > > > to this concept.
> > > > > > In terms of performance, when trylock is failed, this minimum
> > > > > > periodic msleep will have the same performance as the tick-based
> > > > > schedule()/wake_up_q().
> > > > > >
> > > > > > Suggested-by: Wonmin Jung 
> > > > > > Signed-off-by: Chanho Min 
> > > > >
> > > > > Hrm, converting unconditionally with msleep() looks too drastic.
> > > >
> > > > Yes, it looks drastic. But, IMHO, I can't say busy-spin is not non-
> > > drastic.
> > > > To fix the root cause, We may need another rwsem that does not work
> as
> > > > a FIFO.
> > >
> > > Right, but applying msleep(1) unconditionally is really bad.
> > >
> > > > > I guess you've hit this while not explicitly using the linked PCM
> > > > > streams, i.e. in the call of snd_pcm_unlink() at close, right?
> > > > >
> > > > > Then this can be worked around by checking the link before calling
> it.
> > > > > Could you check the patch below?
> > > >
> > > > More testing is needed, but it seems to be fixed by your patch.
> > > > We may not use the linked PCM.
> > >
> > > Then I'm sure that my patch papers over.
> > Thanks, Plz let me know when the patch is merged.
> 
> I'm going to merge the patch below now.
> It slips from the pull request to Linus in today, but will be the next
> one for 4.20-rc6.
> 
> > > > But, If the linked PCM is enabled,  Can snd_pcm_unlink() be called?
> > > > This also seems to be a workaround.
> > >
> > > Yes, for the linked streams, something else is needed *in addition*.
> > >
> > > The original fix with busy loop also assumed that this code path (via
> > > snd_pcm_link() and snd_pcm_unlink()) is the rare occasion, and it
> didn't
> > > consider that it were called for regular use cases.  So the fix to
> make
> > > things just works for regular use cases without any artifact must be
> > > implemented in the first place.  The fix for the linked streams comes
> at
> > > next.  It might be like your msleep() change as a workaround, but in
> > > anyway it's far less urgency.
> >
> > msleep is worst, but If it is harmless, can I apply my patch to the
> private
> > tree
> > temporarily until your next fix comes?
> > We may use the linked streams in the near future. It makes our product
> > unstable.
> > It's urgency for us. How is your opinion?
> 
> I'll add your fix on top of mine for now.  The msleep() is applied
> only for linked streams, so it's not that bad any longer.
> 
> 
> thanks,
> 
> Takashi
> 
> -- 8< --
> From: Takashi Iwai 
> Subject: [PATCH] ALSA: pcm: Call snd_pcm_unlink() conditionally at closing
> 
> Currently the PCM core calls snd_pcm_unlink() always unconditionally
> at closing a stream.  However, since snd_pcm_unlink() invokes the
> global rwsem down, the lock can be easily contended.  More badly, when
> a thread runs in a high priority RT-FIFO, it may stall at spinning.
> 
> Bas

RE: [PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-28 Thread Chanho Min
> > > On Mon, 26 Nov 2018 06:36:37 +0100,
> > > Chanho Min wrote:
> > > >
> > > > Commit 67ec1072b053 ("ALSA: pcm: Fix rwsem deadlock for non-atomic
> > > > PCM
> > > > stream") fixes deadlock for non-atomic PCM stream. But, This patch
> > > causes antother stuck.
> > > > If writer is RT thread and reader is a normal thread, the reader
> > > > thread will be difficult to get scheduled. It may not give chance
> > > > to release readlocks and writer gets stuck for a long time if they
> > > > are
> > > pinned to single cpu.
> > > >
> > > > The deadlock described in the previous commit is because the linux
> > > > rwsem queues like a FIFO. So, we might need non-FIFO writelock,
> > > > not non-
> > > block one.
> > > >
> > > > My suggestion is that the writer gives reader a chance to be
> > > > scheduled by using the minimum msleep() instaed of spinning
> > > > without blocking by writer. Also, The *_nonblock may be changed to
> > > > *_nonfifo appropriately
> > > to this concept.
> > > > In terms of performance, when trylock is failed, this minimum
> > > > periodic msleep will have the same performance as the tick-based
> > > schedule()/wake_up_q().
> > > >
> > > > Suggested-by: Wonmin Jung 
> > > > Signed-off-by: Chanho Min 
> > >
> > > Hrm, converting unconditionally with msleep() looks too drastic.
> >
> > Yes, it looks drastic. But, IMHO, I can't say busy-spin is not non-
> drastic.
> > To fix the root cause, We may need another rwsem that does not work as
> > a FIFO.
> 
> Right, but applying msleep(1) unconditionally is really bad.
> 
> > > I guess you've hit this while not explicitly using the linked PCM
> > > streams, i.e. in the call of snd_pcm_unlink() at close, right?
> > >
> > > Then this can be worked around by checking the link before calling it.
> > > Could you check the patch below?
> >
> > More testing is needed, but it seems to be fixed by your patch.
> > We may not use the linked PCM.
> 
> Then I'm sure that my patch papers over.
Thanks, Plz let me know when the patch is merged.

> 
> > But, If the linked PCM is enabled,  Can snd_pcm_unlink() be called?
> > This also seems to be a workaround.
> 
> Yes, for the linked streams, something else is needed *in addition*.
> 
> The original fix with busy loop also assumed that this code path (via
> snd_pcm_link() and snd_pcm_unlink()) is the rare occasion, and it didn't
> consider that it were called for regular use cases.  So the fix to make
> things just works for regular use cases without any artifact must be
> implemented in the first place.  The fix for the linked streams comes at
> next.  It might be like your msleep() change as a workaround, but in
> anyway it's far less urgency.

msleep is worst, but If it is harmless, can I apply my patch to the private
tree
temporarily until your next fix comes?
We may use the linked streams in the near future. It makes our product
unstable.
It's urgency for us. How is your opinion?

Thanks
Chanho



RE: [PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-28 Thread Chanho Min
> > > On Mon, 26 Nov 2018 06:36:37 +0100,
> > > Chanho Min wrote:
> > > >
> > > > Commit 67ec1072b053 ("ALSA: pcm: Fix rwsem deadlock for non-atomic
> > > > PCM
> > > > stream") fixes deadlock for non-atomic PCM stream. But, This patch
> > > causes antother stuck.
> > > > If writer is RT thread and reader is a normal thread, the reader
> > > > thread will be difficult to get scheduled. It may not give chance
> > > > to release readlocks and writer gets stuck for a long time if they
> > > > are
> > > pinned to single cpu.
> > > >
> > > > The deadlock described in the previous commit is because the linux
> > > > rwsem queues like a FIFO. So, we might need non-FIFO writelock,
> > > > not non-
> > > block one.
> > > >
> > > > My suggestion is that the writer gives reader a chance to be
> > > > scheduled by using the minimum msleep() instaed of spinning
> > > > without blocking by writer. Also, The *_nonblock may be changed to
> > > > *_nonfifo appropriately
> > > to this concept.
> > > > In terms of performance, when trylock is failed, this minimum
> > > > periodic msleep will have the same performance as the tick-based
> > > schedule()/wake_up_q().
> > > >
> > > > Suggested-by: Wonmin Jung 
> > > > Signed-off-by: Chanho Min 
> > >
> > > Hrm, converting unconditionally with msleep() looks too drastic.
> >
> > Yes, it looks drastic. But, IMHO, I can't say busy-spin is not non-
> drastic.
> > To fix the root cause, We may need another rwsem that does not work as
> > a FIFO.
> 
> Right, but applying msleep(1) unconditionally is really bad.
> 
> > > I guess you've hit this while not explicitly using the linked PCM
> > > streams, i.e. in the call of snd_pcm_unlink() at close, right?
> > >
> > > Then this can be worked around by checking the link before calling it.
> > > Could you check the patch below?
> >
> > More testing is needed, but it seems to be fixed by your patch.
> > We may not use the linked PCM.
> 
> Then I'm sure that my patch papers over.
Thanks, Plz let me know when the patch is merged.

> 
> > But, If the linked PCM is enabled,  Can snd_pcm_unlink() be called?
> > This also seems to be a workaround.
> 
> Yes, for the linked streams, something else is needed *in addition*.
> 
> The original fix with busy loop also assumed that this code path (via
> snd_pcm_link() and snd_pcm_unlink()) is the rare occasion, and it didn't
> consider that it were called for regular use cases.  So the fix to make
> things just works for regular use cases without any artifact must be
> implemented in the first place.  The fix for the linked streams comes at
> next.  It might be like your msleep() change as a workaround, but in
> anyway it's far less urgency.

msleep is worst, but If it is harmless, can I apply my patch to the private
tree
temporarily until your next fix comes?
We may use the linked streams in the near future. It makes our product
unstable.
It's urgency for us. How is your opinion?

Thanks
Chanho



RE: [PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-27 Thread Chanho Min
> >
> > Hrm, converting unconditionally with msleep() looks too drastic.
> 
> Yes, it looks drastic. But, IMHO, I can't say busy-spin is not
non-drastic.
Fix typo in this comment:
I can't say busy-spin is not drastic.

Thanks
Chanho



RE: [PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-27 Thread Chanho Min
> >
> > Hrm, converting unconditionally with msleep() looks too drastic.
> 
> Yes, it looks drastic. But, IMHO, I can't say busy-spin is not
non-drastic.
Fix typo in this comment:
I can't say busy-spin is not drastic.

Thanks
Chanho



RE: [PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-27 Thread Chanho Min
> On Mon, 26 Nov 2018 06:36:37 +0100,
> Chanho Min wrote:
> >
> > Commit 67ec1072b053 ("ALSA: pcm: Fix rwsem deadlock for non-atomic PCM
> > stream") fixes deadlock for non-atomic PCM stream. But, This patch
> causes antother stuck.
> > If writer is RT thread and reader is a normal thread, the reader
> > thread will be difficult to get scheduled. It may not give chance to
> > release readlocks and writer gets stuck for a long time if they are
> pinned to single cpu.
> >
> > The deadlock described in the previous commit is because the linux
> > rwsem queues like a FIFO. So, we might need non-FIFO writelock, not non-
> block one.
> >
> > My suggestion is that the writer gives reader a chance to be scheduled
> > by using the minimum msleep() instaed of spinning without blocking by
> > writer. Also, The *_nonblock may be changed to *_nonfifo appropriately
> to this concept.
> > In terms of performance, when trylock is failed, this minimum periodic
> > msleep will have the same performance as the tick-based
> schedule()/wake_up_q().
> >
> > Suggested-by: Wonmin Jung 
> > Signed-off-by: Chanho Min 
> 
> Hrm, converting unconditionally with msleep() looks too drastic.

Yes, it looks drastic. But, IMHO, I can't say busy-spin is not non-drastic.
To fix the root cause, We may need another rwsem that does not work as a
FIFO.

> 
> I guess you've hit this while not explicitly using the linked PCM streams,
> i.e. in the call of snd_pcm_unlink() at close, right?
> 
> Then this can be worked around by checking the link before calling it.
> Could you check the patch below?

More testing is needed, but it seems to be fixed by your patch.
We may not use the linked PCM.
But, If the linked PCM is enabled,  Can snd_pcm_unlink() be called?
This also seems to be a workaround.

> 
> 
> thanks,
> 
> Takashi
> 
> --- a/sound/core/pcm_native.c
> +++ b/sound/core/pcm_native.c
> @@ -2369,7 +2369,8 @@ int snd_pcm_hw_constraints_complete(struct
> snd_pcm_substream *substream)
> 
>  static void pcm_release_private(struct snd_pcm_substream *substream)  {
> - snd_pcm_unlink(substream);
> + if (snd_pcm_stream_linked(substream))
> + snd_pcm_unlink(substream);
>  }
> 
>  void snd_pcm_release_substream(struct snd_pcm_substream *substream)



RE: [PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-27 Thread Chanho Min
> On Mon, 26 Nov 2018 06:36:37 +0100,
> Chanho Min wrote:
> >
> > Commit 67ec1072b053 ("ALSA: pcm: Fix rwsem deadlock for non-atomic PCM
> > stream") fixes deadlock for non-atomic PCM stream. But, This patch
> causes antother stuck.
> > If writer is RT thread and reader is a normal thread, the reader
> > thread will be difficult to get scheduled. It may not give chance to
> > release readlocks and writer gets stuck for a long time if they are
> pinned to single cpu.
> >
> > The deadlock described in the previous commit is because the linux
> > rwsem queues like a FIFO. So, we might need non-FIFO writelock, not non-
> block one.
> >
> > My suggestion is that the writer gives reader a chance to be scheduled
> > by using the minimum msleep() instaed of spinning without blocking by
> > writer. Also, The *_nonblock may be changed to *_nonfifo appropriately
> to this concept.
> > In terms of performance, when trylock is failed, this minimum periodic
> > msleep will have the same performance as the tick-based
> schedule()/wake_up_q().
> >
> > Suggested-by: Wonmin Jung 
> > Signed-off-by: Chanho Min 
> 
> Hrm, converting unconditionally with msleep() looks too drastic.

Yes, it looks drastic. But, IMHO, I can't say busy-spin is not non-drastic.
To fix the root cause, We may need another rwsem that does not work as a
FIFO.

> 
> I guess you've hit this while not explicitly using the linked PCM streams,
> i.e. in the call of snd_pcm_unlink() at close, right?
> 
> Then this can be worked around by checking the link before calling it.
> Could you check the patch below?

More testing is needed, but it seems to be fixed by your patch.
We may not use the linked PCM.
But, If the linked PCM is enabled,  Can snd_pcm_unlink() be called?
This also seems to be a workaround.

> 
> 
> thanks,
> 
> Takashi
> 
> --- a/sound/core/pcm_native.c
> +++ b/sound/core/pcm_native.c
> @@ -2369,7 +2369,8 @@ int snd_pcm_hw_constraints_complete(struct
> snd_pcm_substream *substream)
> 
>  static void pcm_release_private(struct snd_pcm_substream *substream)  {
> - snd_pcm_unlink(substream);
> + if (snd_pcm_stream_linked(substream))
> + snd_pcm_unlink(substream);
>  }
> 
>  void snd_pcm_release_substream(struct snd_pcm_substream *substream)



[PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-25 Thread Chanho Min
Commit 67ec1072b053 ("ALSA: pcm: Fix rwsem deadlock for non-atomic PCM stream")
fixes deadlock for non-atomic PCM stream. But, This patch causes antother stuck.
If writer is RT thread and reader is a normal thread, the reader thread will
be difficult to get scheduled. It may not give chance to release readlocks
and writer gets stuck for a long time if they are pinned to single cpu.

The deadlock described in the previous commit is because the linux rwsem
queues like a FIFO. So, we might need non-FIFO writelock, not non-block one.

My suggestion is that the writer gives reader a chance to be scheduled by using
the minimum msleep() instaed of spinning without blocking by writer. Also,
The *_nonblock may be changed to *_nonfifo appropriately to this concept.
In terms of performance, when trylock is failed, this minimum periodic msleep
will have the same performance as the tick-based schedule()/wake_up_q().

Suggested-by: Wonmin Jung 
Signed-off-by: Chanho Min 
---
 sound/core/pcm_native.c | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index 66c90f4..bdca0e1 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -36,6 +36,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "pcm_local.h"
 
@@ -91,12 +92,12 @@ static DECLARE_RWSEM(snd_pcm_link_rwsem);
  * and this may lead to a deadlock when the code path takes read sem
  * twice (e.g. one in snd_pcm_action_nonatomic() and another in
  * snd_pcm_stream_lock()).  As a (suboptimal) workaround, let writer to
- * spin until it gets the lock.
+ * sleep until all the readers are completed without blocking by writer.
  */
-static inline void down_write_nonblock(struct rw_semaphore *lock)
+static inline void down_write_nonfifo(struct rw_semaphore *lock)
 {
while (!down_write_trylock(lock))
-   cond_resched();
+   msleep(1);
 }
 
 #define PCM_LOCK_DEFAULT   0
@@ -1967,7 +1968,7 @@ static int snd_pcm_link(struct snd_pcm_substream 
*substream, int fd)
res = -ENOMEM;
goto _nolock;
}
-   down_write_nonblock(_pcm_link_rwsem);
+   down_write_nonfifo(_pcm_link_rwsem);
write_lock_irq(_pcm_link_rwlock);
if (substream->runtime->status->state == SNDRV_PCM_STATE_OPEN ||
substream->runtime->status->state != 
substream1->runtime->status->state ||
@@ -2014,7 +2015,7 @@ static int snd_pcm_unlink(struct snd_pcm_substream 
*substream)
struct snd_pcm_substream *s;
int res = 0;
 
-   down_write_nonblock(_pcm_link_rwsem);
+   down_write_nonfifo(_pcm_link_rwsem);
write_lock_irq(_pcm_link_rwlock);
if (!snd_pcm_stream_linked(substream)) {
res = -EALREADY;
-- 
2.1.4



[PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-25 Thread Chanho Min
Commit 67ec1072b053 ("ALSA: pcm: Fix rwsem deadlock for non-atomic PCM stream")
fixes deadlock for non-atomic PCM stream. But, This patch causes antother stuck.
If writer is RT thread and reader is a normal thread, the reader thread will
be difficult to get scheduled. It may not give chance to release readlocks
and writer gets stuck for a long time if they are pinned to single cpu.

The deadlock described in the previous commit is because the linux rwsem
queues like a FIFO. So, we might need non-FIFO writelock, not non-block one.

My suggestion is that the writer gives reader a chance to be scheduled by using
the minimum msleep() instaed of spinning without blocking by writer. Also,
The *_nonblock may be changed to *_nonfifo appropriately to this concept.
In terms of performance, when trylock is failed, this minimum periodic msleep
will have the same performance as the tick-based schedule()/wake_up_q().

Suggested-by: Wonmin Jung 
Signed-off-by: Chanho Min 
---
 sound/core/pcm_native.c | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index 66c90f4..bdca0e1 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -36,6 +36,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "pcm_local.h"
 
@@ -91,12 +92,12 @@ static DECLARE_RWSEM(snd_pcm_link_rwsem);
  * and this may lead to a deadlock when the code path takes read sem
  * twice (e.g. one in snd_pcm_action_nonatomic() and another in
  * snd_pcm_stream_lock()).  As a (suboptimal) workaround, let writer to
- * spin until it gets the lock.
+ * sleep until all the readers are completed without blocking by writer.
  */
-static inline void down_write_nonblock(struct rw_semaphore *lock)
+static inline void down_write_nonfifo(struct rw_semaphore *lock)
 {
while (!down_write_trylock(lock))
-   cond_resched();
+   msleep(1);
 }
 
 #define PCM_LOCK_DEFAULT   0
@@ -1967,7 +1968,7 @@ static int snd_pcm_link(struct snd_pcm_substream 
*substream, int fd)
res = -ENOMEM;
goto _nolock;
}
-   down_write_nonblock(_pcm_link_rwsem);
+   down_write_nonfifo(_pcm_link_rwsem);
write_lock_irq(_pcm_link_rwlock);
if (substream->runtime->status->state == SNDRV_PCM_STATE_OPEN ||
substream->runtime->status->state != 
substream1->runtime->status->state ||
@@ -2014,7 +2015,7 @@ static int snd_pcm_unlink(struct snd_pcm_substream 
*substream)
struct snd_pcm_substream *s;
int res = 0;
 
-   down_write_nonblock(_pcm_link_rwsem);
+   down_write_nonfifo(_pcm_link_rwsem);
write_lock_irq(_pcm_link_rwlock);
if (!snd_pcm_stream_linked(substream)) {
res = -EALREADY;
-- 
2.1.4



[PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-23 Thread Chanho Min
Commit 67ec1072b053 (ALSA: pcm: Fix rwsem deadlock for non-atomic PCM stream)
fixes deadlock for non-atomic PCM stream. But, This patch causes antother stuck.
If writer is RT thread and reader is a normal thread, the reader thread will
be difficult to get scheduled. It may not give chance to release read locks
and writer gets stuck for a long time or forever if they are pinned to single
cpu.

To fix this, The writer gives reader a chance to be scheduled by using the
minimum msleep() instaed of spinning. This is for concept, We may need to
change the function name and comments or suggest another approach.

Signed-off-by: Chanho Min 
---
 sound/core/pcm_native.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index 66c90f4..88d4aab 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -96,7 +96,7 @@ static DECLARE_RWSEM(snd_pcm_link_rwsem);
 static inline void down_write_nonblock(struct rw_semaphore *lock)
 {
while (!down_write_trylock(lock))
-   cond_resched();
+   msleep(1);
 }
 
 #define PCM_LOCK_DEFAULT   0
-- 
2.1.4



[PATCH] ALSA: pcm: Fix starvation on down_write_nonblock()

2018-11-23 Thread Chanho Min
Commit 67ec1072b053 (ALSA: pcm: Fix rwsem deadlock for non-atomic PCM stream)
fixes deadlock for non-atomic PCM stream. But, This patch causes antother stuck.
If writer is RT thread and reader is a normal thread, the reader thread will
be difficult to get scheduled. It may not give chance to release read locks
and writer gets stuck for a long time or forever if they are pinned to single
cpu.

To fix this, The writer gives reader a chance to be scheduled by using the
minimum msleep() instaed of spinning. This is for concept, We may need to
change the function name and comments or suggest another approach.

Signed-off-by: Chanho Min 
---
 sound/core/pcm_native.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index 66c90f4..88d4aab 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -96,7 +96,7 @@ static DECLARE_RWSEM(snd_pcm_link_rwsem);
 static inline void down_write_nonblock(struct rw_semaphore *lock)
 {
while (!down_write_trylock(lock))
-   cond_resched();
+   msleep(1);
 }
 
 #define PCM_LOCK_DEFAULT   0
-- 
2.1.4



RE: [PATCH v2] exec: make de_thread() freezable

2018-11-14 Thread Chanho Min
> > > It's been some time since I have looked into this code so bear with
me.
> > > One thing is not really clear to me. Why does it help to exclude this
> > > particular task from the freezer
> >
> > we don't exclude it,
> >
> > > when it is not sleeping in the freezer.
> >
> > Yes, it is not sleeping in __refrigerator(), but it does
> >
> > schedule();
> > freezer_count();
> >
> > so it will enter __refrigerator() right after wakeup. If it won't be
> woken
> > up we do not care, we can consider it "frozen".
> 
> Right, but this is just silencing the freezing code to exclude this
> task, right?
> 
> > > I can see how other threads need to be zapped and TASK_WAKEKILL
> doesn't
> > > do that but shouldn't we fix that instead?
> >
> > Not sure I understand, but unlikely we can (or want) to make
> __refrigerator()
> > killable.
> 
> Why would that be a problem. If the kill is fatal then why to keep the
> killed task in the fridge?
> 

Is it  different between 'the killed task is frozen' and '__refrigerator()
is killable'?
>From a general '__refrigerator()' implementation point of view I know that
it should not be killable.

> > Otherwise, how can we fix that?
> 
> We can mark all threads PF_NOFREEZE and wake them up. This would require
> some more changes of course but wouldn't that be a more appropriate
> solution? Do we want to block exec for ever just because some threads
> are in the fridge?
> 

IMHO, It seems to be difficult and buggy to control with PF_NOFREEZE.
Because,
The sub-thread can freeze and receive SIG_KILL before the marking of
PF_NOFREEZE
and it should be freezable in other cases. I don't understand why it isn't
appropriate
for exec to block. The exec can freeze. When tasks are thawed, the killed
sub-thread
will die and wake de_thread(). The exec will continue to work from resume.

Chanho



RE: [PATCH v2] exec: make de_thread() freezable

2018-11-14 Thread Chanho Min
> > > It's been some time since I have looked into this code so bear with
me.
> > > One thing is not really clear to me. Why does it help to exclude this
> > > particular task from the freezer
> >
> > we don't exclude it,
> >
> > > when it is not sleeping in the freezer.
> >
> > Yes, it is not sleeping in __refrigerator(), but it does
> >
> > schedule();
> > freezer_count();
> >
> > so it will enter __refrigerator() right after wakeup. If it won't be
> woken
> > up we do not care, we can consider it "frozen".
> 
> Right, but this is just silencing the freezing code to exclude this
> task, right?
> 
> > > I can see how other threads need to be zapped and TASK_WAKEKILL
> doesn't
> > > do that but shouldn't we fix that instead?
> >
> > Not sure I understand, but unlikely we can (or want) to make
> __refrigerator()
> > killable.
> 
> Why would that be a problem. If the kill is fatal then why to keep the
> killed task in the fridge?
> 

Is it  different between 'the killed task is frozen' and '__refrigerator()
is killable'?
>From a general '__refrigerator()' implementation point of view I know that
it should not be killable.

> > Otherwise, how can we fix that?
> 
> We can mark all threads PF_NOFREEZE and wake them up. This would require
> some more changes of course but wouldn't that be a more appropriate
> solution? Do we want to block exec for ever just because some threads
> are in the fridge?
> 

IMHO, It seems to be difficult and buggy to control with PF_NOFREEZE.
Because,
The sub-thread can freeze and receive SIG_KILL before the marking of
PF_NOFREEZE
and it should be freezable in other cases. I don't understand why it isn't
appropriate
for exec to block. The exec can freeze. When tasks are thawed, the killed
sub-thread
will die and wake de_thread(). The exec will continue to work from resume.

Chanho



[PATCH v2] exec: make de_thread() freezable

2018-11-11 Thread Chanho Min
Suspend fails due to the exec family of functions blocking the freezer.
The casue is that de_thread() sleeps in TASK_UNINTERRUPTIBLE waiting for
all sub-threads to die, and we have the deadlock if one of them is frozen.
This also can occur with the schedule() waiting for the group thread leader
to exit if it is frozen.

In our machine, it causes freeze timeout as bellows.

Freezing of tasks failed after 20.010 seconds (1 tasks refusing to freeze, 
wq_busy=0):
setcpushares-ls D ffc8ed70 0  5817   1483 0x004d
 Call trace:
[] __switch_to+0x88/0xa0
[] __schedule+0x1bc/0x720
[] schedule+0x40/0xa8
[] flush_old_exec+0xdc/0x640
[] load_elf_binary+0x2a8/0x1090
[] search_binary_handler+0x9c/0x240
[] load_script+0x20c/0x228
[] search_binary_handler+0x9c/0x240
[] do_execveat_common.isra.14+0x4f8/0x6e8
[] compat_SyS_execve+0x38/0x48
[] el0_svc_naked+0x24/0x28

To fix this, make de_thread() freezable. It looks safe and works fine.

Changes in v2:
 - changes for the same reason in "if (!thread_group_leader(tsk))" branch.
   (reported by Oleg)

Suggested-by: Oleg Nesterov 
Signed-off-by: Chanho Min 
---
 fs/exec.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/fs/exec.c b/fs/exec.c
index 1ebf6e5..6da8745 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -62,6 +62,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -1083,7 +1084,7 @@ static int de_thread(struct task_struct *tsk)
while (sig->notify_count) {
__set_current_state(TASK_KILLABLE);
spin_unlock_irq(lock);
-   schedule();
+   freezable_schedule();
if (unlikely(__fatal_signal_pending(tsk)))
goto killed;
spin_lock_irq(lock);
@@ -,7 +1112,7 @@ static int de_thread(struct task_struct *tsk)
__set_current_state(TASK_KILLABLE);
write_unlock_irq(_lock);
cgroup_threadgroup_change_end(tsk);
-   schedule();
+   freezable_schedule();
if (unlikely(__fatal_signal_pending(tsk)))
goto killed;
}
-- 
2.1.4



[PATCH v2] exec: make de_thread() freezable

2018-11-11 Thread Chanho Min
Suspend fails due to the exec family of functions blocking the freezer.
The casue is that de_thread() sleeps in TASK_UNINTERRUPTIBLE waiting for
all sub-threads to die, and we have the deadlock if one of them is frozen.
This also can occur with the schedule() waiting for the group thread leader
to exit if it is frozen.

In our machine, it causes freeze timeout as bellows.

Freezing of tasks failed after 20.010 seconds (1 tasks refusing to freeze, 
wq_busy=0):
setcpushares-ls D ffc8ed70 0  5817   1483 0x004d
 Call trace:
[] __switch_to+0x88/0xa0
[] __schedule+0x1bc/0x720
[] schedule+0x40/0xa8
[] flush_old_exec+0xdc/0x640
[] load_elf_binary+0x2a8/0x1090
[] search_binary_handler+0x9c/0x240
[] load_script+0x20c/0x228
[] search_binary_handler+0x9c/0x240
[] do_execveat_common.isra.14+0x4f8/0x6e8
[] compat_SyS_execve+0x38/0x48
[] el0_svc_naked+0x24/0x28

To fix this, make de_thread() freezable. It looks safe and works fine.

Changes in v2:
 - changes for the same reason in "if (!thread_group_leader(tsk))" branch.
   (reported by Oleg)

Suggested-by: Oleg Nesterov 
Signed-off-by: Chanho Min 
---
 fs/exec.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/fs/exec.c b/fs/exec.c
index 1ebf6e5..6da8745 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -62,6 +62,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -1083,7 +1084,7 @@ static int de_thread(struct task_struct *tsk)
while (sig->notify_count) {
__set_current_state(TASK_KILLABLE);
spin_unlock_irq(lock);
-   schedule();
+   freezable_schedule();
if (unlikely(__fatal_signal_pending(tsk)))
goto killed;
spin_lock_irq(lock);
@@ -,7 +1112,7 @@ static int de_thread(struct task_struct *tsk)
__set_current_state(TASK_KILLABLE);
write_unlock_irq(_lock);
cgroup_threadgroup_change_end(tsk);
-   schedule();
+   freezable_schedule();
if (unlikely(__fatal_signal_pending(tsk)))
goto killed;
}
-- 
2.1.4



RE: [PATCH] exec: make de_thread() freezable

2018-11-11 Thread Chanho Min
> Thanks, but please note another schedule() in "if
> (!thread_group_leader(tsk))"
> branch, we probably want to change it too?
> 
> Oleg.
Sounds right, The thread group leader might be frozen as well.
I'll prepare v2.



RE: [PATCH] exec: make de_thread() freezable

2018-11-11 Thread Chanho Min
> Thanks, but please note another schedule() in "if
> (!thread_group_leader(tsk))"
> branch, we probably want to change it too?
> 
> Oleg.
Sounds right, The thread group leader might be frozen as well.
I'll prepare v2.



[PATCH] exec: make de_thread() freezable

2018-11-09 Thread Chanho Min
Suspend fails due to the exec family of functions blocking the freezer.
The casue is that de_thread() sleeps in TASK_UNINTERRUPTIBLE waiting for
all sub-threads to die, and we have the deadlock if one of them is frozen.
In our machine, it causes freeze timeout as bellows.

Freezing of tasks failed after 20.010 seconds (1 tasks refusing to freeze, 
wq_busy=0):
setcpushares-ls D ffc8ed70 0  5817   1483 0x004d
 Call trace:
[] __switch_to+0x88/0xa0
[] __schedule+0x1bc/0x720
[] schedule+0x40/0xa8
[] flush_old_exec+0xdc/0x640
[] load_elf_binary+0x2a8/0x1090
[] search_binary_handler+0x9c/0x240
[] load_script+0x20c/0x228
[] search_binary_handler+0x9c/0x240
[] do_execveat_common.isra.14+0x4f8/0x6e8
[] compat_SyS_execve+0x38/0x48
[] el0_svc_naked+0x24/0x28

To fix this, make de_thread() freezable. It looks safe and works fine.

Suggested-by: Oleg Nesterov 
Signed-off-by: Chanho Min 
---
 fs/exec.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/fs/exec.c b/fs/exec.c
index 1ebf6e5..70ccfc8 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -62,6 +62,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -1083,7 +1084,7 @@ static int de_thread(struct task_struct *tsk)
while (sig->notify_count) {
__set_current_state(TASK_KILLABLE);
spin_unlock_irq(lock);
-   schedule();
+   freezable_schedule();
if (unlikely(__fatal_signal_pending(tsk)))
goto killed;
spin_lock_irq(lock);
-- 
2.1.4



[PATCH] exec: make de_thread() freezable

2018-11-09 Thread Chanho Min
Suspend fails due to the exec family of functions blocking the freezer.
The casue is that de_thread() sleeps in TASK_UNINTERRUPTIBLE waiting for
all sub-threads to die, and we have the deadlock if one of them is frozen.
In our machine, it causes freeze timeout as bellows.

Freezing of tasks failed after 20.010 seconds (1 tasks refusing to freeze, 
wq_busy=0):
setcpushares-ls D ffc8ed70 0  5817   1483 0x004d
 Call trace:
[] __switch_to+0x88/0xa0
[] __schedule+0x1bc/0x720
[] schedule+0x40/0xa8
[] flush_old_exec+0xdc/0x640
[] load_elf_binary+0x2a8/0x1090
[] search_binary_handler+0x9c/0x240
[] load_script+0x20c/0x228
[] search_binary_handler+0x9c/0x240
[] do_execveat_common.isra.14+0x4f8/0x6e8
[] compat_SyS_execve+0x38/0x48
[] el0_svc_naked+0x24/0x28

To fix this, make de_thread() freezable. It looks safe and works fine.

Suggested-by: Oleg Nesterov 
Signed-off-by: Chanho Min 
---
 fs/exec.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/fs/exec.c b/fs/exec.c
index 1ebf6e5..70ccfc8 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -62,6 +62,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -1083,7 +1084,7 @@ static int de_thread(struct task_struct *tsk)
while (sig->notify_count) {
__set_current_state(TASK_KILLABLE);
spin_unlock_irq(lock);
-   schedule();
+   freezable_schedule();
if (unlikely(__fatal_signal_pending(tsk)))
goto killed;
spin_lock_irq(lock);
-- 
2.1.4



RE: [PATCH] freezer: fix freeze timeout on exec

2018-11-08 Thread Chanho Min
> >
> > Can't we simply change de_thread() to use freezable_schedule() ?
> >
> > Oleg.
> 
> We need to change freezable_schedule_timeout() instead.
> freezable_schedule also can't be frozen if sub-threads can't stop
> schedule().
> Furthermore, I'm not sure if it is safe to freeze it at de_thread().
> 
> diff --git a/fs/exec.c b/fs/exec.c
> index 9c5ee2a..291cbd6 100644
> --- a/fs/exec.c
> +++ b/fs/exec.c
> @@ -942,7 +942,7 @@ static int de_thread(struct task_struct *tsk)
> while (sig->notify_count) {
> __set_current_state(TASK_KILLABLE);
> spin_unlock_irq(lock);
> -   schedule();
> +   while (!freezable_schedule_timeout(HZ));
> if (unlikely(__fatal_signal_pending(tsk)))
> goto killed;
> spin_lock_irq(lock);
> 
> Chanho

Sorry, I might misunderstand freezer.
Changes to freezable_schedule() works fine. It looks safe.
I'll apply patch again.

Chanho



RE: [PATCH] freezer: fix freeze timeout on exec

2018-11-08 Thread Chanho Min
> >
> > Can't we simply change de_thread() to use freezable_schedule() ?
> >
> > Oleg.
> 
> We need to change freezable_schedule_timeout() instead.
> freezable_schedule also can't be frozen if sub-threads can't stop
> schedule().
> Furthermore, I'm not sure if it is safe to freeze it at de_thread().
> 
> diff --git a/fs/exec.c b/fs/exec.c
> index 9c5ee2a..291cbd6 100644
> --- a/fs/exec.c
> +++ b/fs/exec.c
> @@ -942,7 +942,7 @@ static int de_thread(struct task_struct *tsk)
> while (sig->notify_count) {
> __set_current_state(TASK_KILLABLE);
> spin_unlock_irq(lock);
> -   schedule();
> +   while (!freezable_schedule_timeout(HZ));
> if (unlikely(__fatal_signal_pending(tsk)))
> goto killed;
> spin_lock_irq(lock);
> 
> Chanho

Sorry, I might misunderstand freezer.
Changes to freezable_schedule() works fine. It looks safe.
I'll apply patch again.

Chanho



RE: [PATCH] freezer: fix freeze timeout on exec

2018-11-08 Thread Chanho Min
> >
> > To fix this, I suggest a patch by emboding the mentioned solution.
> > First, revive and rework cancel_freezing_and_thaw() function whitch
> > stops the task from sleeping in refrigirator reliably. And, The task
> > to be killed does not allow to freeze.
> 
> Can't we simply change de_thread() to use freezable_schedule() ?
> 
> Oleg.

We need to change freezable_schedule_timeout() instead.
freezable_schedule also can't be frozen if sub-threads can't stop
schedule().
Furthermore, I'm not sure if it is safe to freeze it at de_thread().

diff --git a/fs/exec.c b/fs/exec.c
index 9c5ee2a..291cbd6 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -942,7 +942,7 @@ static int de_thread(struct task_struct *tsk)
while (sig->notify_count) {
__set_current_state(TASK_KILLABLE);
spin_unlock_irq(lock);
-   schedule();
+   while (!freezable_schedule_timeout(HZ));
if (unlikely(__fatal_signal_pending(tsk)))
goto killed;
spin_lock_irq(lock);

Chanho



RE: [PATCH] freezer: fix freeze timeout on exec

2018-11-08 Thread Chanho Min
> >
> > To fix this, I suggest a patch by emboding the mentioned solution.
> > First, revive and rework cancel_freezing_and_thaw() function whitch
> > stops the task from sleeping in refrigirator reliably. And, The task
> > to be killed does not allow to freeze.
> 
> Can't we simply change de_thread() to use freezable_schedule() ?
> 
> Oleg.

We need to change freezable_schedule_timeout() instead.
freezable_schedule also can't be frozen if sub-threads can't stop
schedule().
Furthermore, I'm not sure if it is safe to freeze it at de_thread().

diff --git a/fs/exec.c b/fs/exec.c
index 9c5ee2a..291cbd6 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -942,7 +942,7 @@ static int de_thread(struct task_struct *tsk)
while (sig->notify_count) {
__set_current_state(TASK_KILLABLE);
spin_unlock_irq(lock);
-   schedule();
+   while (!freezable_schedule_timeout(HZ));
if (unlikely(__fatal_signal_pending(tsk)))
goto killed;
spin_lock_irq(lock);

Chanho



[PATCH] freezer: fix freeze timeout on exec

2018-11-08 Thread Chanho Min
Suspend fails due to the exec family of fuctnions blocking the freezer.
This issue has been found that it is mentioned in the ancient mail thread.
The casue is that de_thread() sleeps in TASK_UNINTERRUPTIBLE waiting for all
sub-threads to die, and we have the "deadlock" if one of them is frozen.
It causes freeze timeout as bellows.

Freezing of tasks failed after 20.010 seconds (1 tasks refusing to freeze, 
wq_busy=0):
setcpushares-ls D ffc8ed70 0  5817   1483 0x004d
 Call trace:
[] __switch_to+0x88/0xa0
[] __schedule+0x1bc/0x720
[] schedule+0x40/0xa8
[] flush_old_exec+0xdc/0x640
[] load_elf_binary+0x2a8/0x1090
[] search_binary_handler+0x9c/0x240
[] load_script+0x20c/0x228
[] search_binary_handler+0x9c/0x240
[] do_execveat_common.isra.14+0x4f8/0x6e8
[] compat_SyS_execve+0x38/0x48
[] el0_svc_naked+0x24/0x28

To fix this, I suggest a patch by emboding the mentioned solution.
First, revive and rework cancel_freezing_and_thaw() function whitch stops the
task from sleeping in refrigirator reliably. And, The task to be killed does not
allow to freeze.

Reference:
http://lkml.iu.edu/hypermail//linux/kernel/0702.2/1300.html

Signed-off-by: Chanho Min 
---
 include/linux/freezer.h |  7 +++
 kernel/freezer.c| 14 ++
 kernel/signal.c |  7 +++
 3 files changed, 28 insertions(+)

diff --git a/include/linux/freezer.h b/include/linux/freezer.h
index 21f5aa0..1c1e3cb 100644
--- a/include/linux/freezer.h
+++ b/include/linux/freezer.h
@@ -57,6 +57,12 @@ static inline bool try_to_freeze_unsafe(void)
might_sleep();
if (likely(!freezing(current)))
return false;
+   /*
+* we are going to call do_exit() really soon,
+* we have a pending SIGKILL
+*/
+   if (unlikely(current->signal->flags & SIGNAL_GROUP_EXIT))
+   return false;
return __refrigerator(false);
 }
 
@@ -68,6 +74,7 @@ static inline bool try_to_freeze(void)
 }
 
 extern bool freeze_task(struct task_struct *p);
+extern void cancel_freezing_thaw_task(struct task_struct *p);
 extern bool set_freezable(void);
 
 #ifdef CONFIG_CGROUP_FREEZER
diff --git a/kernel/freezer.c b/kernel/freezer.c
index b162b74..584c5c8 100644
--- a/kernel/freezer.c
+++ b/kernel/freezer.c
@@ -148,6 +148,20 @@ bool freeze_task(struct task_struct *p)
return true;
 }
 
+void cancel_freezing_thaw_task(struct task_struct *p)
+{
+   unsigned long flags;
+
+   spin_lock_irqsave(_lock, flags);
+   if (freezing(p)) {
+   spin_lock(>sighand->siglock);
+   recalc_sigpending_and_wake(p);
+   spin_unlock(>sighand->siglock);
+   } else if (frozen(p))
+   wake_up_process(p);
+   spin_unlock_irqrestore(_lock, flags);
+}
+
 void __thaw_task(struct task_struct *p)
 {
unsigned long flags;
diff --git a/kernel/signal.c b/kernel/signal.c
index 5843c54..ca9b25b 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -41,6 +41,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define CREATE_TRACE_POINTS
 #include 
@@ -1273,6 +1274,12 @@ int zap_other_threads(struct task_struct *p)
/* Don't bother with already dead threads */
if (t->exit_state)
continue;
+
+   /*
+* we can check sig->group_exit_task to detect de_thread,
+* but perhaps it doesn't hurt if the caller is do_group_exit
+*/
+   cancel_freezing_thaw_task(t);
sigaddset(>pending.signal, SIGKILL);
signal_wake_up(t, 1);
}
-- 
2.7.4



[PATCH] freezer: fix freeze timeout on exec

2018-11-08 Thread Chanho Min
Suspend fails due to the exec family of fuctnions blocking the freezer.
This issue has been found that it is mentioned in the ancient mail thread.
The casue is that de_thread() sleeps in TASK_UNINTERRUPTIBLE waiting for all
sub-threads to die, and we have the "deadlock" if one of them is frozen.
It causes freeze timeout as bellows.

Freezing of tasks failed after 20.010 seconds (1 tasks refusing to freeze, 
wq_busy=0):
setcpushares-ls D ffc8ed70 0  5817   1483 0x004d
 Call trace:
[] __switch_to+0x88/0xa0
[] __schedule+0x1bc/0x720
[] schedule+0x40/0xa8
[] flush_old_exec+0xdc/0x640
[] load_elf_binary+0x2a8/0x1090
[] search_binary_handler+0x9c/0x240
[] load_script+0x20c/0x228
[] search_binary_handler+0x9c/0x240
[] do_execveat_common.isra.14+0x4f8/0x6e8
[] compat_SyS_execve+0x38/0x48
[] el0_svc_naked+0x24/0x28

To fix this, I suggest a patch by emboding the mentioned solution.
First, revive and rework cancel_freezing_and_thaw() function whitch stops the
task from sleeping in refrigirator reliably. And, The task to be killed does not
allow to freeze.

Reference:
http://lkml.iu.edu/hypermail//linux/kernel/0702.2/1300.html

Signed-off-by: Chanho Min 
---
 include/linux/freezer.h |  7 +++
 kernel/freezer.c| 14 ++
 kernel/signal.c |  7 +++
 3 files changed, 28 insertions(+)

diff --git a/include/linux/freezer.h b/include/linux/freezer.h
index 21f5aa0..1c1e3cb 100644
--- a/include/linux/freezer.h
+++ b/include/linux/freezer.h
@@ -57,6 +57,12 @@ static inline bool try_to_freeze_unsafe(void)
might_sleep();
if (likely(!freezing(current)))
return false;
+   /*
+* we are going to call do_exit() really soon,
+* we have a pending SIGKILL
+*/
+   if (unlikely(current->signal->flags & SIGNAL_GROUP_EXIT))
+   return false;
return __refrigerator(false);
 }
 
@@ -68,6 +74,7 @@ static inline bool try_to_freeze(void)
 }
 
 extern bool freeze_task(struct task_struct *p);
+extern void cancel_freezing_thaw_task(struct task_struct *p);
 extern bool set_freezable(void);
 
 #ifdef CONFIG_CGROUP_FREEZER
diff --git a/kernel/freezer.c b/kernel/freezer.c
index b162b74..584c5c8 100644
--- a/kernel/freezer.c
+++ b/kernel/freezer.c
@@ -148,6 +148,20 @@ bool freeze_task(struct task_struct *p)
return true;
 }
 
+void cancel_freezing_thaw_task(struct task_struct *p)
+{
+   unsigned long flags;
+
+   spin_lock_irqsave(_lock, flags);
+   if (freezing(p)) {
+   spin_lock(>sighand->siglock);
+   recalc_sigpending_and_wake(p);
+   spin_unlock(>sighand->siglock);
+   } else if (frozen(p))
+   wake_up_process(p);
+   spin_unlock_irqrestore(_lock, flags);
+}
+
 void __thaw_task(struct task_struct *p)
 {
unsigned long flags;
diff --git a/kernel/signal.c b/kernel/signal.c
index 5843c54..ca9b25b 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -41,6 +41,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define CREATE_TRACE_POINTS
 #include 
@@ -1273,6 +1274,12 @@ int zap_other_threads(struct task_struct *p)
/* Don't bother with already dead threads */
if (t->exit_state)
continue;
+
+   /*
+* we can check sig->group_exit_task to detect de_thread,
+* but perhaps it doesn't hurt if the caller is do_group_exit
+*/
+   cancel_freezing_thaw_task(t);
sigaddset(>pending.signal, SIGKILL);
signal_wake_up(t, 1);
}
-- 
2.7.4



[PATCH v2] mmc: core: add driver strength selection when selecting hs400es

2017-09-25 Thread Chanho Min
The driver strength selection is missed and required when selecting
hs400es. So, It is added here.

v2: add stable tag.

Fixes: 81ac2af65793ecf ("mmc: core: implement enhanced strobe support")
Cc: sta...@vger.kernel.org
Signed-off-by: Hankyung Yu <hankyung...@lge.com>
Signed-off-by: Chanho Min <chanho@lge.com>
Reviewed-by: Adrian Hunter <adrian.hun...@intel.com>
---
 drivers/mmc/core/mmc.c | 36 +++-
 1 file changed, 19 insertions(+), 17 deletions(-)

diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index a7eb623..36217ad 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1286,6 +1286,23 @@ int mmc_hs400_to_hs200(struct mmc_card *card)
return err;
 }
 
+static void mmc_select_driver_type(struct mmc_card *card)
+{
+   int card_drv_type, drive_strength, drv_type;
+
+   card_drv_type = card->ext_csd.raw_driver_strength |
+   mmc_driver_type_mask(0);
+
+   drive_strength = mmc_select_drive_strength(card,
+  card->ext_csd.hs200_max_dtr,
+  card_drv_type, _type);
+
+   card->drive_strength = drive_strength;
+
+   if (drv_type)
+   mmc_set_driver_type(card->host, drv_type);
+}
+
 static int mmc_select_hs400es(struct mmc_card *card)
 {
struct mmc_host *host = card->host;
@@ -1341,6 +1358,8 @@ static int mmc_select_hs400es(struct mmc_card *card)
goto out_err;
}
 
+   mmc_select_driver_type(card);
+
/* Switch card to HS400 */
val = EXT_CSD_TIMING_HS400 |
  card->drive_strength << EXT_CSD_DRV_STR_SHIFT;
@@ -1374,23 +1393,6 @@ static int mmc_select_hs400es(struct mmc_card *card)
return err;
 }
 
-static void mmc_select_driver_type(struct mmc_card *card)
-{
-   int card_drv_type, drive_strength, drv_type;
-
-   card_drv_type = card->ext_csd.raw_driver_strength |
-   mmc_driver_type_mask(0);
-
-   drive_strength = mmc_select_drive_strength(card,
-  card->ext_csd.hs200_max_dtr,
-  card_drv_type, _type);
-
-   card->drive_strength = drive_strength;
-
-   if (drv_type)
-   mmc_set_driver_type(card->host, drv_type);
-}
-
 /*
  * For device supporting HS200 mode, the following sequence
  * should be done before executing the tuning process.
-- 
2.1.4



[PATCH v2] mmc: core: add driver strength selection when selecting hs400es

2017-09-25 Thread Chanho Min
The driver strength selection is missed and required when selecting
hs400es. So, It is added here.

v2: add stable tag.

Fixes: 81ac2af65793ecf ("mmc: core: implement enhanced strobe support")
Cc: sta...@vger.kernel.org
Signed-off-by: Hankyung Yu 
Signed-off-by: Chanho Min 
Reviewed-by: Adrian Hunter 
---
 drivers/mmc/core/mmc.c | 36 +++-
 1 file changed, 19 insertions(+), 17 deletions(-)

diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index a7eb623..36217ad 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1286,6 +1286,23 @@ int mmc_hs400_to_hs200(struct mmc_card *card)
return err;
 }
 
+static void mmc_select_driver_type(struct mmc_card *card)
+{
+   int card_drv_type, drive_strength, drv_type;
+
+   card_drv_type = card->ext_csd.raw_driver_strength |
+   mmc_driver_type_mask(0);
+
+   drive_strength = mmc_select_drive_strength(card,
+  card->ext_csd.hs200_max_dtr,
+  card_drv_type, _type);
+
+   card->drive_strength = drive_strength;
+
+   if (drv_type)
+   mmc_set_driver_type(card->host, drv_type);
+}
+
 static int mmc_select_hs400es(struct mmc_card *card)
 {
struct mmc_host *host = card->host;
@@ -1341,6 +1358,8 @@ static int mmc_select_hs400es(struct mmc_card *card)
goto out_err;
}
 
+   mmc_select_driver_type(card);
+
/* Switch card to HS400 */
val = EXT_CSD_TIMING_HS400 |
  card->drive_strength << EXT_CSD_DRV_STR_SHIFT;
@@ -1374,23 +1393,6 @@ static int mmc_select_hs400es(struct mmc_card *card)
return err;
 }
 
-static void mmc_select_driver_type(struct mmc_card *card)
-{
-   int card_drv_type, drive_strength, drv_type;
-
-   card_drv_type = card->ext_csd.raw_driver_strength |
-   mmc_driver_type_mask(0);
-
-   drive_strength = mmc_select_drive_strength(card,
-  card->ext_csd.hs200_max_dtr,
-  card_drv_type, _type);
-
-   card->drive_strength = drive_strength;
-
-   if (drv_type)
-   mmc_set_driver_type(card->host, drv_type);
-}
-
 /*
  * For device supporting HS200 mode, the following sequence
  * should be done before executing the tuning process.
-- 
2.1.4



[PATCH] mmc: core: add driver strength selection when selecting hs400es

2017-09-25 Thread Chanho Min
From: "hankyung.yu" <hankyung...@lge.com>

The drive strength setting is missed and required when selecting
hs400es. So, It is added here.

Signed-off-by: Hankyung Yu <hankyung...@lge.com>
Signed-off-by: Chanho Min <chanho@lge.com>
---
 drivers/mmc/core/mmc.c | 36 +++-
 1 file changed, 19 insertions(+), 17 deletions(-)

diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 07516f3..bc7586c 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1249,6 +1249,23 @@ out_err:
return err;
 }
 
+static void mmc_select_driver_type(struct mmc_card *card)
+{
+   int card_drv_type, drive_strength, drv_type;
+
+   card_drv_type = card->ext_csd.raw_driver_strength |
+   mmc_driver_type_mask(0);
+
+   drive_strength = mmc_select_drive_strength(card,
+  card->ext_csd.hs200_max_dtr,
+  card_drv_type, _type);
+
+   card->drive_strength = drive_strength;
+
+   if (drv_type)
+   mmc_set_driver_type(card->host, drv_type);
+}
+
 static int mmc_select_hs400es(struct mmc_card *card)
 {
struct mmc_host *host = card->host;
@@ -1300,6 +1317,8 @@ static int mmc_select_hs400es(struct mmc_card *card)
goto out_err;
}
 
+   mmc_select_driver_type(card);
+
/* Switch card to HS400 */
val = EXT_CSD_TIMING_HS400 |
  card->drive_strength << EXT_CSD_DRV_STR_SHIFT;
@@ -1333,23 +1352,6 @@ out_err:
return err;
 }
 
-static void mmc_select_driver_type(struct mmc_card *card)
-{
-   int card_drv_type, drive_strength, drv_type;
-
-   card_drv_type = card->ext_csd.raw_driver_strength |
-   mmc_driver_type_mask(0);
-
-   drive_strength = mmc_select_drive_strength(card,
-  card->ext_csd.hs200_max_dtr,
-  card_drv_type, _type);
-
-   card->drive_strength = drive_strength;
-
-   if (drv_type)
-   mmc_set_driver_type(card->host, drv_type);
-}
-
 /*
  * For device supporting HS200 mode, the following sequence
  * should be done before executing the tuning process.
-- 
2.1.4



[PATCH] mmc: core: add driver strength selection when selecting hs400es

2017-09-25 Thread Chanho Min
From: "hankyung.yu" 

The drive strength setting is missed and required when selecting
hs400es. So, It is added here.

Signed-off-by: Hankyung Yu 
Signed-off-by: Chanho Min 
---
 drivers/mmc/core/mmc.c | 36 +++-
 1 file changed, 19 insertions(+), 17 deletions(-)

diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 07516f3..bc7586c 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1249,6 +1249,23 @@ out_err:
return err;
 }
 
+static void mmc_select_driver_type(struct mmc_card *card)
+{
+   int card_drv_type, drive_strength, drv_type;
+
+   card_drv_type = card->ext_csd.raw_driver_strength |
+   mmc_driver_type_mask(0);
+
+   drive_strength = mmc_select_drive_strength(card,
+  card->ext_csd.hs200_max_dtr,
+  card_drv_type, _type);
+
+   card->drive_strength = drive_strength;
+
+   if (drv_type)
+   mmc_set_driver_type(card->host, drv_type);
+}
+
 static int mmc_select_hs400es(struct mmc_card *card)
 {
struct mmc_host *host = card->host;
@@ -1300,6 +1317,8 @@ static int mmc_select_hs400es(struct mmc_card *card)
goto out_err;
}
 
+   mmc_select_driver_type(card);
+
/* Switch card to HS400 */
val = EXT_CSD_TIMING_HS400 |
  card->drive_strength << EXT_CSD_DRV_STR_SHIFT;
@@ -1333,23 +1352,6 @@ out_err:
return err;
 }
 
-static void mmc_select_driver_type(struct mmc_card *card)
-{
-   int card_drv_type, drive_strength, drv_type;
-
-   card_drv_type = card->ext_csd.raw_driver_strength |
-   mmc_driver_type_mask(0);
-
-   drive_strength = mmc_select_drive_strength(card,
-  card->ext_csd.hs200_max_dtr,
-  card_drv_type, _type);
-
-   card->drive_strength = drive_strength;
-
-   if (drv_type)
-   mmc_set_driver_type(card->host, drv_type);
-}
-
 /*
  * For device supporting HS200 mode, the following sequence
  * should be done before executing the tuning process.
-- 
2.1.4



RE: [PATCH v2 3/6] arm64: dts: lg1313: DT fix s/#interrupts-cells/#interrupt-cells/

2016-10-23 Thread Chanho Min
> 
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> ---
> v2:
>   - New.
> ---

Acked-by: Chanho Min <chanho@lge.com>



RE: [PATCH v2 3/6] arm64: dts: lg1313: DT fix s/#interrupts-cells/#interrupt-cells/

2016-10-23 Thread Chanho Min
> 
> Signed-off-by: Geert Uytterhoeven 
> ---
> v2:
>   - New.
> ---

Acked-by: Chanho Min 



RE: [PATCH v2 2/6] arm64: dts: lg1312: DT fix s/#interrupts-cells/#interrupt-cells/

2016-10-23 Thread Chanho Min
> 
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> Acked-by: Rob Herring <r...@kernel.org>
> ---
> v2:
>   - Add Acked-by,
>   - Rebased.
> ---

Acked-by: Chanho Min <chanho@lge.com>



RE: [PATCH v2 2/6] arm64: dts: lg1312: DT fix s/#interrupts-cells/#interrupt-cells/

2016-10-23 Thread Chanho Min
> 
> Signed-off-by: Geert Uytterhoeven 
> Acked-by: Rob Herring 
> ---
> v2:
>   - Add Acked-by,
>   - Rebased.
> ---

Acked-by: Chanho Min 



[PATCH RESEND] ipconfig : Fix null reference to the freed dev_addr

2016-06-22 Thread Chanho Min
The USB to ethernet can be detached and free netdev after
rtnl mutex is released. It can cause null reference during
the dynamic IP configuration.

sequence is:

ic_open_devs
rtnl_lock();
wait for a carrier
hub_event()
usb_disconnect()
unregister_netdev
rtnl_lock();
rtnl_unlock();
unregister_netdevice
rtnl_unlock();
free_netdev()
ic_dynamic()

another sequence is:

ip_auto_config
ic_dynamic
hub_event
usb_disconnect
free_netdev
ic_bootp_send_if

log:
==
Unable to handle kernel NULL pointer dereference at virtual address 
pgd = 80004000[  318.748428] [] *pgd=
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:[  318.760356] CPU: 1 PID: 1 Comm: swapper/0
task: b44c8000 ti: b44b2000 task.ti: b44b2000
PC is at mmiocpy+0x8c/0x330
LR is at ip_auto_config+0x70c/0x10a4
==

To fix this, I suggested patch that checks if device is available
before the DHCP packet is sended.

Signed-off-by: Chanho Min <chanho@lge.com>
---
 net/ipv4/ipconfig.c |4 
 1 file changed, 4 insertions(+)

diff --git a/net/ipv4/ipconfig.c b/net/ipv4/ipconfig.c
index 0bc7412..5b29a32 100644
--- a/net/ipv4/ipconfig.c
+++ b/net/ipv4/ipconfig.c
@@ -1233,6 +1233,10 @@ static int __init ic_dynamic(void)
get_random_bytes(, sizeof(timeout));
timeout = CONF_BASE_TIMEOUT + (timeout % (unsigned int) 
CONF_TIMEOUT_RANDOM);
for (;;) {
+   if (d->dev->reg_state != NETREG_REGISTERED) {
+   pr_cont(" lost device!\n");
+   break;
+   }
 #ifdef IPCONFIG_BOOTP
/* Track the device we are configuring */
ic_dev_xid = d->xid;
-- 
1.7.9.5



[PATCH RESEND] ipconfig : Fix null reference to the freed dev_addr

2016-06-22 Thread Chanho Min
The USB to ethernet can be detached and free netdev after
rtnl mutex is released. It can cause null reference during
the dynamic IP configuration.

sequence is:

ic_open_devs
rtnl_lock();
wait for a carrier
hub_event()
usb_disconnect()
unregister_netdev
rtnl_lock();
rtnl_unlock();
unregister_netdevice
rtnl_unlock();
free_netdev()
ic_dynamic()

another sequence is:

ip_auto_config
ic_dynamic
hub_event
usb_disconnect
free_netdev
ic_bootp_send_if

log:
==
Unable to handle kernel NULL pointer dereference at virtual address 
pgd = 80004000[  318.748428] [] *pgd=
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:[  318.760356] CPU: 1 PID: 1 Comm: swapper/0
task: b44c8000 ti: b44b2000 task.ti: b44b2000
PC is at mmiocpy+0x8c/0x330
LR is at ip_auto_config+0x70c/0x10a4
==

To fix this, I suggested patch that checks if device is available
before the DHCP packet is sended.

Signed-off-by: Chanho Min 
---
 net/ipv4/ipconfig.c |4 
 1 file changed, 4 insertions(+)

diff --git a/net/ipv4/ipconfig.c b/net/ipv4/ipconfig.c
index 0bc7412..5b29a32 100644
--- a/net/ipv4/ipconfig.c
+++ b/net/ipv4/ipconfig.c
@@ -1233,6 +1233,10 @@ static int __init ic_dynamic(void)
get_random_bytes(, sizeof(timeout));
timeout = CONF_BASE_TIMEOUT + (timeout % (unsigned int) 
CONF_TIMEOUT_RANDOM);
for (;;) {
+   if (d->dev->reg_state != NETREG_REGISTERED) {
+   pr_cont(" lost device!\n");
+   break;
+   }
 #ifdef IPCONFIG_BOOTP
/* Track the device we are configuring */
ic_dev_xid = d->xid;
-- 
1.7.9.5



[PATCH] ipconfig : Fix null reference to the freed dev_addr

2016-06-20 Thread Chanho Min
The USB to ethernet can be detached and free netdev after
rtnl mutex is released. It can cause null reference during
the dynamic IP configuration.

sequence is:

ic_open_devs
rtnl_lock();
wait for a carrier
hub_event()
usb_disconnect()
unregister_netdev
rtnl_lock();
rtnl_unlock();
unregister_netdevice
rtnl_unlock();
free_netdev()
ic_dynamic()

another sequence is:

ip_auto_config
ic_dynamic
hub_event
usb_disconnect
free_netdev
ic_bootp_send_if

log:
==
Unable to handle kernel NULL pointer dereference at virtual address 
pgd = 80004000[  318.748428] [] *pgd=
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:[  318.760356] CPU: 1 PID: 1 Comm: swapper/0
task: b44c8000 ti: b44b2000 task.ti: b44b2000
PC is at mmiocpy+0x8c/0x330
LR is at ip_auto_config+0x70c/0x10a4
==

To fix this, I suggested patch that checks if device is available
before the DHCP packet is sended.

Signed-off-by: Chanho Min <chanho@lge.com>
---
 net/ipv4/ipconfig.c |4 
 1 file changed, 4 insertions(+)

diff --git a/net/ipv4/ipconfig.c b/net/ipv4/ipconfig.c
index 0bc7412..5b29a32 100644
--- a/net/ipv4/ipconfig.c
+++ b/net/ipv4/ipconfig.c
@@ -1233,6 +1233,10 @@ static int __init ic_dynamic(void)
get_random_bytes(, sizeof(timeout));
timeout = CONF_BASE_TIMEOUT + (timeout % (unsigned int) 
CONF_TIMEOUT_RANDOM);
for (;;) {
+   if (d->dev->reg_state != NETREG_REGISTERED) {
+   pr_cont(" lost device!\n");
+   break;
+   }
 #ifdef IPCONFIG_BOOTP
/* Track the device we are configuring */
ic_dev_xid = d->xid;
-- 
1.7.9.5



[PATCH] ipconfig : Fix null reference to the freed dev_addr

2016-06-20 Thread Chanho Min
The USB to ethernet can be detached and free netdev after
rtnl mutex is released. It can cause null reference during
the dynamic IP configuration.

sequence is:

ic_open_devs
rtnl_lock();
wait for a carrier
hub_event()
usb_disconnect()
unregister_netdev
rtnl_lock();
rtnl_unlock();
unregister_netdevice
rtnl_unlock();
free_netdev()
ic_dynamic()

another sequence is:

ip_auto_config
ic_dynamic
hub_event
usb_disconnect
free_netdev
ic_bootp_send_if

log:
==
Unable to handle kernel NULL pointer dereference at virtual address 
pgd = 80004000[  318.748428] [] *pgd=
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:[  318.760356] CPU: 1 PID: 1 Comm: swapper/0
task: b44c8000 ti: b44b2000 task.ti: b44b2000
PC is at mmiocpy+0x8c/0x330
LR is at ip_auto_config+0x70c/0x10a4
==

To fix this, I suggested patch that checks if device is available
before the DHCP packet is sended.

Signed-off-by: Chanho Min 
---
 net/ipv4/ipconfig.c |4 
 1 file changed, 4 insertions(+)

diff --git a/net/ipv4/ipconfig.c b/net/ipv4/ipconfig.c
index 0bc7412..5b29a32 100644
--- a/net/ipv4/ipconfig.c
+++ b/net/ipv4/ipconfig.c
@@ -1233,6 +1233,10 @@ static int __init ic_dynamic(void)
get_random_bytes(, sizeof(timeout));
timeout = CONF_BASE_TIMEOUT + (timeout % (unsigned int) 
CONF_TIMEOUT_RANDOM);
for (;;) {
+   if (d->dev->reg_state != NETREG_REGISTERED) {
+   pr_cont(" lost device!\n");
+   break;
+   }
 #ifdef IPCONFIG_BOOTP
/* Track the device we are configuring */
ic_dev_xid = d->xid;
-- 
1.7.9.5



[PATCH 2/2] arm64: defconfig: Enable Cadence MACB/GEM support

2016-05-31 Thread Chanho Min
This patch enables the cadence MACB/GEM support that is needed
by lg1k SoCs.

Signed-off-by: Chanho Min <chanho@lge.com>
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index fd2d74d..4edbbac 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -120,6 +120,7 @@ CONFIG_TUN=y
 CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
+CONFIG_MACB=y
 CONFIG_E1000E=y
 CONFIG_IGB=y
 CONFIG_IGBVF=y
-- 
1.7.9.5



[PATCH 1/2] arm64: dts: Add dts files for LG Electronics's lg1313 SoC

2016-05-31 Thread Chanho Min
Add dtsi file to support lg1313 SoC which based on Cortex-A53.
Also add dts file to support lg1312 reference board which based
on lg1313 SoC.

Signed-off-by: Chanho Min <chanho@lge.com>
---
 arch/arm64/boot/dts/lg/Makefile   |1 +
 arch/arm64/boot/dts/lg/lg1313-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1313.dtsi|  351 +
 3 files changed, 388 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/lg1313-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1313.dtsi

diff --git a/arch/arm64/boot/dts/lg/Makefile b/arch/arm64/boot/dts/lg/Makefile
index b0cc649..5c7b54c1 100644
--- a/arch/arm64/boot/dts/lg/Makefile
+++ b/arch/arm64/boot/dts/lg/Makefile
@@ -1,4 +1,5 @@
 dtb-$(CONFIG_ARCH_LG1K) += lg1312-ref.dtb
+dtb-$(CONFIG_ARCH_LG1K) += lg1313-ref.dtb
 
 always := $(dtb-y)
 subdir-y   := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/lg/lg1313-ref.dts 
b/arch/arm64/boot/dts/lg/lg1313-ref.dts
new file mode 100644
index 000..df0ece4
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1313-ref.dts
@@ -0,0 +1,36 @@
+/*
+ * dts file for lg1313 Reference Board.
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+/dts-v1/;
+
+#include "lg1313.dtsi"
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   model = "LG Electronics, DTV SoC LG1313 Reference Board";
+   compatible = "lge,lg1313-ref", "lge,lg1313";
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x 0x2000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi 
b/arch/arm64/boot/dts/lg/lg1313.dtsi
new file mode 100644
index 000..e703e11
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1313.dtsi
@@ -0,0 +1,351 @@
+/*
+ * dts file for lg1313 SoC
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+#include 
+#include 
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   compatible = "lge,lg1313";
+   interrupt-parent = <>;
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   next-level-cache = <_0>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   L2_0: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   psci {
+   compatible  = "arm,psci-0.2", "arm,psci";
+   method = "smc";
+   cpu_suspend = <0x8401>;
+   cpu_off = <0x8402>;
+   cpu_on = <0x8403>;
+   };
+
+   gic: interrupt-controller@c0001000 {
+   #interrupt-cells = <3>;
+   compatible = "arm,gic-400";
+   interrupt-controller;
+   reg = <0x0 0xc0001000 0x1000>,
+ <0x0 0xc0002000 0x2000>,
+ <0x0 0xc0004000 0x2000>,
+ <0x0 0xc0006000 0x2000>;
+   };
+
+   pmu {
+   compatible = "arm,cortex-a53-pmu";
+   interrupts = ,
+,
+,
+;
+   interrupt-affinity = <>,
+<>,
+<>,
+<>;
+   };
+
+ 

[PATCH 2/2] arm64: defconfig: Enable Cadence MACB/GEM support

2016-05-31 Thread Chanho Min
This patch enables the cadence MACB/GEM support that is needed
by lg1k SoCs.

Signed-off-by: Chanho Min 
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index fd2d74d..4edbbac 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -120,6 +120,7 @@ CONFIG_TUN=y
 CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
+CONFIG_MACB=y
 CONFIG_E1000E=y
 CONFIG_IGB=y
 CONFIG_IGBVF=y
-- 
1.7.9.5



[PATCH 1/2] arm64: dts: Add dts files for LG Electronics's lg1313 SoC

2016-05-31 Thread Chanho Min
Add dtsi file to support lg1313 SoC which based on Cortex-A53.
Also add dts file to support lg1312 reference board which based
on lg1313 SoC.

Signed-off-by: Chanho Min 
---
 arch/arm64/boot/dts/lg/Makefile   |1 +
 arch/arm64/boot/dts/lg/lg1313-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1313.dtsi|  351 +
 3 files changed, 388 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/lg1313-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1313.dtsi

diff --git a/arch/arm64/boot/dts/lg/Makefile b/arch/arm64/boot/dts/lg/Makefile
index b0cc649..5c7b54c1 100644
--- a/arch/arm64/boot/dts/lg/Makefile
+++ b/arch/arm64/boot/dts/lg/Makefile
@@ -1,4 +1,5 @@
 dtb-$(CONFIG_ARCH_LG1K) += lg1312-ref.dtb
+dtb-$(CONFIG_ARCH_LG1K) += lg1313-ref.dtb
 
 always := $(dtb-y)
 subdir-y   := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/lg/lg1313-ref.dts 
b/arch/arm64/boot/dts/lg/lg1313-ref.dts
new file mode 100644
index 000..df0ece4
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1313-ref.dts
@@ -0,0 +1,36 @@
+/*
+ * dts file for lg1313 Reference Board.
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+/dts-v1/;
+
+#include "lg1313.dtsi"
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   model = "LG Electronics, DTV SoC LG1313 Reference Board";
+   compatible = "lge,lg1313-ref", "lge,lg1313";
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x 0x2000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi 
b/arch/arm64/boot/dts/lg/lg1313.dtsi
new file mode 100644
index 000..e703e11
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1313.dtsi
@@ -0,0 +1,351 @@
+/*
+ * dts file for lg1313 SoC
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+#include 
+#include 
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   compatible = "lge,lg1313";
+   interrupt-parent = <>;
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   next-level-cache = <_0>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   L2_0: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   psci {
+   compatible  = "arm,psci-0.2", "arm,psci";
+   method = "smc";
+   cpu_suspend = <0x8401>;
+   cpu_off = <0x8402>;
+   cpu_on = <0x8403>;
+   };
+
+   gic: interrupt-controller@c0001000 {
+   #interrupt-cells = <3>;
+   compatible = "arm,gic-400";
+   interrupt-controller;
+   reg = <0x0 0xc0001000 0x1000>,
+ <0x0 0xc0002000 0x2000>,
+ <0x0 0xc0004000 0x2000>,
+ <0x0 0xc0006000 0x2000>;
+   };
+
+   pmu {
+   compatible = "arm,cortex-a53-pmu";
+   interrupts = ,
+,
+,
+;
+   interrupt-affinity = <>,
+<>,
+<>,
+<>;
+   };
+
+   timer {
+   compat

RE: [PATCH] arm64: dts: drop "arm,amba-bus" in favor of "simple-bus" part 2

2016-05-30 Thread Chanho Min
> Subject: [PATCH] arm64: dts: drop "arm,amba-bus" in favor of "simple-bus" part
> 2
> 
> Tree-wide replacement was done by commit 2ef7d5f342c1 (ARM, ARM64:
> dts: drop "arm,amba-bus" in favor of "simple-bus"), but we have some
> new users of "arm,amba-bus" at Linux 4.7-rc1.  Eliminate them now.
> 
> Signed-off-by: Masahiro Yamada <yamada.masah...@socionext.com>
> ---
> 
> In order to not leave these compatible strings for the release,
> is it OK to apply this patch for Linux 4.7 ?
> 
> 
> 
>  arch/arm64/boot/dts/lg/lg1312.dtsi   | 2 +-
>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 

> diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi
> b/arch/arm64/boot/dts/lg/lg1312.dtsi
> index 3a4e9a2..fbafa24 100644
> --- a/arch/arm64/boot/dts/lg/lg1312.dtsi
> +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
> @@ -125,7 +125,7 @@
>   #size-cells = <1>;
>   #interrupts-cells = <3>;
> 
> -     compatible = "arm,amba-bus";
> + compatible = "simple-bus";
>   interrupt-parent = <>;
>   ranges;
> 

Acked-by: Chanho Min <chanho@lge.com>

> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 46f325a..d7f8e06 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -163,7 +163,7 @@
>   };
> 
>   amba {
> - compatible = "arm,amba-bus";
> + compatible = "simple-bus";
>   #address-cells = <2>;
>   #size-cells = <2>;
>   ranges;
> --
> 1.9.1



RE: [PATCH] arm64: dts: drop "arm,amba-bus" in favor of "simple-bus" part 2

2016-05-30 Thread Chanho Min
> Subject: [PATCH] arm64: dts: drop "arm,amba-bus" in favor of "simple-bus" part
> 2
> 
> Tree-wide replacement was done by commit 2ef7d5f342c1 (ARM, ARM64:
> dts: drop "arm,amba-bus" in favor of "simple-bus"), but we have some
> new users of "arm,amba-bus" at Linux 4.7-rc1.  Eliminate them now.
> 
> Signed-off-by: Masahiro Yamada 
> ---
> 
> In order to not leave these compatible strings for the release,
> is it OK to apply this patch for Linux 4.7 ?
> 
> 
> 
>  arch/arm64/boot/dts/lg/lg1312.dtsi   | 2 +-
>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 

> diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi
> b/arch/arm64/boot/dts/lg/lg1312.dtsi
> index 3a4e9a2..fbafa24 100644
> --- a/arch/arm64/boot/dts/lg/lg1312.dtsi
> +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
> @@ -125,7 +125,7 @@
>   #size-cells = <1>;
>   #interrupts-cells = <3>;
> 
> - compatible = "arm,amba-bus";
> + compatible = "simple-bus";
>   interrupt-parent = <>;
>   ranges;
> 

Acked-by: Chanho Min 

> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 46f325a..d7f8e06 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -163,7 +163,7 @@
>   };
> 
>   amba {
> - compatible = "arm,amba-bus";
> + compatible = "simple-bus";
>   #address-cells = <2>;
>   #size-cells = <2>;
>   ranges;
> --
> 1.9.1



[RESEND PATCH] arm64: defconfig: Enable Cadence MACB/GEM support

2016-05-18 Thread Chanho Min
This patch enables the cadence MACB/GEM support that is needed
by lg1312 SoC.

Signed-off-by: Chanho Min <chanho@lge.com>
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 14dbe27..ed11cb6 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -105,6 +105,7 @@ CONFIG_TUN=y
 CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
+CONFIG_MACB=y
 CONFIG_E1000E=y
 CONFIG_IGB=y
 CONFIG_IGBVF=y
-- 
1.7.9.5



[RESEND PATCH] arm64: defconfig: Enable Cadence MACB/GEM support

2016-05-18 Thread Chanho Min
This patch enables the cadence MACB/GEM support that is needed
by lg1312 SoC.

Signed-off-by: Chanho Min 
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 14dbe27..ed11cb6 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -105,6 +105,7 @@ CONFIG_TUN=y
 CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
+CONFIG_MACB=y
 CONFIG_E1000E=y
 CONFIG_IGB=y
 CONFIG_IGBVF=y
-- 
1.7.9.5



[PATCH] arm64: defconfig: Enable Cadence MACB/GEM support

2016-05-08 Thread Chanho Min
This patch enables the cadence MACB/GEM support that is needed
by lg1312 SoC.

Signed-off-by: Chanho Min <chanho@lge.com>
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 14dbe27..ed11cb6 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -105,6 +105,7 @@ CONFIG_TUN=y
 CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
+CONFIG_MACB=y
 CONFIG_E1000E=y
 CONFIG_IGB=y
 CONFIG_IGBVF=y
-- 
1.7.9.5



[PATCH] arm64: defconfig: Enable Cadence MACB/GEM support

2016-05-08 Thread Chanho Min
This patch enables the cadence MACB/GEM support that is needed
by lg1312 SoC.

Signed-off-by: Chanho Min 
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 14dbe27..ed11cb6 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -105,6 +105,7 @@ CONFIG_TUN=y
 CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
+CONFIG_MACB=y
 CONFIG_E1000E=y
 CONFIG_IGB=y
 CONFIG_IGBVF=y
-- 
1.7.9.5



[PATCH v3 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k

2016-04-11 Thread Chanho Min
This is an initial series for supporting LG Electronics's lg1k SoCs,
based on ARM Cortex-A53, mainly used for digital TVs.

Chanho Min (4):
  arm64: add Kconfig entry for LG1K SoC family
  arm64: defconfig: enable ARCH_LG1K
  arm64: dts: Add dts files for LG Electronics's lg1312 SoC
  MAINTAINERS: add myself as ARM/LG1K maintainer

 MAINTAINERS   |6 +
 arch/arm64/Kconfig.platforms  |4 +
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 arch/arm64/configs/defconfig  |1 +
 7 files changed, 404 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

-- 
1.7.9.5



[PATCH v3 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k

2016-04-11 Thread Chanho Min
This is an initial series for supporting LG Electronics's lg1k SoCs,
based on ARM Cortex-A53, mainly used for digital TVs.

Chanho Min (4):
  arm64: add Kconfig entry for LG1K SoC family
  arm64: defconfig: enable ARCH_LG1K
  arm64: dts: Add dts files for LG Electronics's lg1312 SoC
  MAINTAINERS: add myself as ARM/LG1K maintainer

 MAINTAINERS   |6 +
 arch/arm64/Kconfig.platforms  |4 +
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 arch/arm64/configs/defconfig  |1 +
 7 files changed, 404 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

-- 
1.7.9.5



[PATCH v3 4/4] MAINTAINERS: add myself as ARM/LG1K maintainer

2016-04-11 Thread Chanho Min
Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- None
Changes for v3:
- None
---
 MAINTAINERS |6 ++
 1 file changed, 6 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4f55edf..20ca61a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1245,6 +1245,12 @@ L:   linux-kernel@vger.kernel.org
 S: Maintained
 F: drivers/memory/*emif*
 
+ARM/LG1K ARCHITECTURE
+M: Chanho Min <chanho@lge.com>
+L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: arch/arm64/boot/dts/lg/
+
 ARM/LOGICPD PXA270 MACHINE SUPPORT
 M: Lennert Buytenhek <ker...@wantstofly.org>
 L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
-- 
1.7.9.5



[PATCH v3 2/4] arm64: defconfig: enable ARCH_LG1K

2016-04-11 Thread Chanho Min
Enable building LG1K support in the defconfig.

Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- None
Changes for v3:
- None
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 86581f7..14dbe27 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -49,6 +49,7 @@ CONFIG_ARCH_UNIPHIER=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_XGENE=y
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_ARCH_LG1K=y
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
 CONFIG_PCI_IOV=y
-- 
1.7.9.5



[PATCH v3 1/4] arm64: add Kconfig entry for LG1K SoC family

2016-04-11 Thread Chanho Min
This patch introduces ARCH_LG1K to enable LG Electronics's LG1K SoC
family in Kconfig.

Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- None
Changes for v3:
- None
---
 arch/arm64/Kconfig.platforms |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f6..b002bba 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -141,4 +141,8 @@ config ARCH_ZYNQMP
help
  This enables support for Xilinx ZynqMP Family
 
+config ARCH_LG1K
+   bool "LG Electronics LG1K SoC Family"
+   help
+ This enables support for LG Electronics LG1K SoC Family
 endmenu
-- 
1.7.9.5



[PATCH v3 3/4] arm64: dts: Add dts files for LG Electronics's lg1312 SoC

2016-04-11 Thread Chanho Min
Add initial dtsi file to support lg1312 SoC which based on
Cortex-A53. Also add dts file to support lg1312 reference board
which based on lg1312 SoC.

Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- remove self-defined macro.
- change root node's #size-cells to <2>.
- remove bootargs property.
- update psci support to the arm,psci-0.2.
- put fixed-clock property under the root node.
- add stdout-path property.
- update the GICC reg length to 0x2000
- add the GICH and GICV interface.
- change pmu compatible property to arm,coretex-a53-pmu.
- remove clock-frequency property from timer.

Changes for v3:
- change the order of arm,psci-0.2 and arm,psci
---
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 4 files changed, 393 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index f832b8a..90ce525 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -16,6 +16,7 @@ dts-dirs += rockchip
 dts-dirs += socionext
 dts-dirs += sprd
 dts-dirs += xilinx
+dts-dirs += lg
 
 subdir-y   := $(dts-dirs)
 
diff --git a/arch/arm64/boot/dts/lg/Makefile b/arch/arm64/boot/dts/lg/Makefile
new file mode 100644
index 000..b0cc649
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_LG1K) += lg1312-ref.dtb
+
+always := $(dtb-y)
+subdir-y   := $(dts-dirs)
+clean-files:= *.dtb
diff --git a/arch/arm64/boot/dts/lg/lg1312-ref.dts 
b/arch/arm64/boot/dts/lg/lg1312-ref.dts
new file mode 100644
index 000..6d78d6b
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312-ref.dts
@@ -0,0 +1,36 @@
+/*
+ * dts file for lg1312 Reference Board.
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+/dts-v1/;
+
+#include "lg1312.dtsi"
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   model = "LG Electronics, DTV SoC LG1312 Reference Board";
+   compatible = "lge,lg1312-ref", "lge,lg1312";
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x 0x2000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi 
b/arch/arm64/boot/dts/lg/lg1312.dtsi
new file mode 100644
index 000..3a4e9a2
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -0,0 +1,351 @@
+/*
+ * dts file for lg1312 SoC
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+#include 
+#include 
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   compatible = "lge,lg1312";
+   interrupt-parent = <>;
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   next-level-cache = <_0>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   L2_0: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   psci {
+   compatible  = "arm,psci-0.2", "arm,psci";
+   method = "smc"

[PATCH v3 4/4] MAINTAINERS: add myself as ARM/LG1K maintainer

2016-04-11 Thread Chanho Min
Signed-off-by: Chanho Min 
---
Changes for v2:
- None
Changes for v3:
- None
---
 MAINTAINERS |6 ++
 1 file changed, 6 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4f55edf..20ca61a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1245,6 +1245,12 @@ L:   linux-kernel@vger.kernel.org
 S: Maintained
 F: drivers/memory/*emif*
 
+ARM/LG1K ARCHITECTURE
+M: Chanho Min 
+L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: arch/arm64/boot/dts/lg/
+
 ARM/LOGICPD PXA270 MACHINE SUPPORT
 M: Lennert Buytenhek 
 L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
-- 
1.7.9.5



[PATCH v3 2/4] arm64: defconfig: enable ARCH_LG1K

2016-04-11 Thread Chanho Min
Enable building LG1K support in the defconfig.

Signed-off-by: Chanho Min 
---
Changes for v2:
- None
Changes for v3:
- None
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 86581f7..14dbe27 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -49,6 +49,7 @@ CONFIG_ARCH_UNIPHIER=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_XGENE=y
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_ARCH_LG1K=y
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
 CONFIG_PCI_IOV=y
-- 
1.7.9.5



[PATCH v3 1/4] arm64: add Kconfig entry for LG1K SoC family

2016-04-11 Thread Chanho Min
This patch introduces ARCH_LG1K to enable LG Electronics's LG1K SoC
family in Kconfig.

Signed-off-by: Chanho Min 
---
Changes for v2:
- None
Changes for v3:
- None
---
 arch/arm64/Kconfig.platforms |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f6..b002bba 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -141,4 +141,8 @@ config ARCH_ZYNQMP
help
  This enables support for Xilinx ZynqMP Family
 
+config ARCH_LG1K
+   bool "LG Electronics LG1K SoC Family"
+   help
+ This enables support for LG Electronics LG1K SoC Family
 endmenu
-- 
1.7.9.5



[PATCH v3 3/4] arm64: dts: Add dts files for LG Electronics's lg1312 SoC

2016-04-11 Thread Chanho Min
Add initial dtsi file to support lg1312 SoC which based on
Cortex-A53. Also add dts file to support lg1312 reference board
which based on lg1312 SoC.

Signed-off-by: Chanho Min 
---
Changes for v2:
- remove self-defined macro.
- change root node's #size-cells to <2>.
- remove bootargs property.
- update psci support to the arm,psci-0.2.
- put fixed-clock property under the root node.
- add stdout-path property.
- update the GICC reg length to 0x2000
- add the GICH and GICV interface.
- change pmu compatible property to arm,coretex-a53-pmu.
- remove clock-frequency property from timer.

Changes for v3:
- change the order of arm,psci-0.2 and arm,psci
---
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 4 files changed, 393 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index f832b8a..90ce525 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -16,6 +16,7 @@ dts-dirs += rockchip
 dts-dirs += socionext
 dts-dirs += sprd
 dts-dirs += xilinx
+dts-dirs += lg
 
 subdir-y   := $(dts-dirs)
 
diff --git a/arch/arm64/boot/dts/lg/Makefile b/arch/arm64/boot/dts/lg/Makefile
new file mode 100644
index 000..b0cc649
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_LG1K) += lg1312-ref.dtb
+
+always := $(dtb-y)
+subdir-y   := $(dts-dirs)
+clean-files:= *.dtb
diff --git a/arch/arm64/boot/dts/lg/lg1312-ref.dts 
b/arch/arm64/boot/dts/lg/lg1312-ref.dts
new file mode 100644
index 000..6d78d6b
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312-ref.dts
@@ -0,0 +1,36 @@
+/*
+ * dts file for lg1312 Reference Board.
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+/dts-v1/;
+
+#include "lg1312.dtsi"
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   model = "LG Electronics, DTV SoC LG1312 Reference Board";
+   compatible = "lge,lg1312-ref", "lge,lg1312";
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x 0x2000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi 
b/arch/arm64/boot/dts/lg/lg1312.dtsi
new file mode 100644
index 000..3a4e9a2
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -0,0 +1,351 @@
+/*
+ * dts file for lg1312 SoC
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+#include 
+#include 
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   compatible = "lge,lg1312";
+   interrupt-parent = <>;
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   next-level-cache = <_0>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   L2_0: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   psci {
+   compatible  = "arm,psci-0.2", "arm,psci";
+   method = "smc";
+   cpu_su

[RESEND PATCH v2 4/4] MAINTAINERS: add myself as ARM/LG1K maintainer

2016-04-10 Thread Chanho Min
Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- None
---
 MAINTAINERS |6 ++
 1 file changed, 6 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4f55edf..20ca61a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1245,6 +1245,12 @@ L:   linux-kernel@vger.kernel.org
 S: Maintained
 F: drivers/memory/*emif*
 
+ARM/LG1K ARCHITECTURE
+M: Chanho Min <chanho@lge.com>
+L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: arch/arm64/boot/dts/lg/
+
 ARM/LOGICPD PXA270 MACHINE SUPPORT
 M: Lennert Buytenhek <ker...@wantstofly.org>
 L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
-- 
1.7.9.5



[RESEND PATCH v2 2/4] arm64: defconfig: enable ARCH_LG1K

2016-04-10 Thread Chanho Min
Enable building LG1K support in the defconfig.

Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- None
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 86581f7..14dbe27 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -49,6 +49,7 @@ CONFIG_ARCH_UNIPHIER=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_XGENE=y
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_ARCH_LG1K=y
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
 CONFIG_PCI_IOV=y
-- 
1.7.9.5



[RESEND PATCH v2 4/4] MAINTAINERS: add myself as ARM/LG1K maintainer

2016-04-10 Thread Chanho Min
Signed-off-by: Chanho Min 
---
Changes for v2:
- None
---
 MAINTAINERS |6 ++
 1 file changed, 6 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4f55edf..20ca61a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1245,6 +1245,12 @@ L:   linux-kernel@vger.kernel.org
 S: Maintained
 F: drivers/memory/*emif*
 
+ARM/LG1K ARCHITECTURE
+M: Chanho Min 
+L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: arch/arm64/boot/dts/lg/
+
 ARM/LOGICPD PXA270 MACHINE SUPPORT
 M: Lennert Buytenhek 
 L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
-- 
1.7.9.5



[RESEND PATCH v2 2/4] arm64: defconfig: enable ARCH_LG1K

2016-04-10 Thread Chanho Min
Enable building LG1K support in the defconfig.

Signed-off-by: Chanho Min 
---
Changes for v2:
- None
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 86581f7..14dbe27 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -49,6 +49,7 @@ CONFIG_ARCH_UNIPHIER=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_XGENE=y
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_ARCH_LG1K=y
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
 CONFIG_PCI_IOV=y
-- 
1.7.9.5



[RESEND PATCH v2 1/4] arm64: add Kconfig entry for LG1K SoC family

2016-04-10 Thread Chanho Min
This patch introduces ARCH_LG1K to enable LG Electronics's LG1K SoC
family in Kconfig.

Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- None
---
 arch/arm64/Kconfig.platforms |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f6..b002bba 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -141,4 +141,8 @@ config ARCH_ZYNQMP
help
  This enables support for Xilinx ZynqMP Family
 
+config ARCH_LG1K
+   bool "LG Electronics LG1K SoC Family"
+   help
+ This enables support for LG Electronics LG1K SoC Family
 endmenu
-- 
1.7.9.5



[RESEND PATCH v2 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k

2016-04-10 Thread Chanho Min
This is an initial series for supporting LG Electronics's lg1k SoCs,
based on ARM Cortex-A53, mainly used for digital TVs.

Chanho Min (4):
  arm64: add Kconfig entry for LG1K SoC family
  arm64: defconfig: enable ARCH_LG1K
  arm64: dts: Add dts files for LG Electronics's lg1312 SoC
  MAINTAINERS: add myself as ARM/LG1K maintainer

 MAINTAINERS   |6 +
 arch/arm64/Kconfig.platforms  |4 +
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 arch/arm64/configs/defconfig  |1 +
 7 files changed, 404 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

-- 
1.7.9.5



[RESEND PATCH v2 1/4] arm64: add Kconfig entry for LG1K SoC family

2016-04-10 Thread Chanho Min
This patch introduces ARCH_LG1K to enable LG Electronics's LG1K SoC
family in Kconfig.

Signed-off-by: Chanho Min 
---
Changes for v2:
- None
---
 arch/arm64/Kconfig.platforms |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f6..b002bba 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -141,4 +141,8 @@ config ARCH_ZYNQMP
help
  This enables support for Xilinx ZynqMP Family
 
+config ARCH_LG1K
+   bool "LG Electronics LG1K SoC Family"
+   help
+ This enables support for LG Electronics LG1K SoC Family
 endmenu
-- 
1.7.9.5



[RESEND PATCH v2 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k

2016-04-10 Thread Chanho Min
This is an initial series for supporting LG Electronics's lg1k SoCs,
based on ARM Cortex-A53, mainly used for digital TVs.

Chanho Min (4):
  arm64: add Kconfig entry for LG1K SoC family
  arm64: defconfig: enable ARCH_LG1K
  arm64: dts: Add dts files for LG Electronics's lg1312 SoC
  MAINTAINERS: add myself as ARM/LG1K maintainer

 MAINTAINERS   |6 +
 arch/arm64/Kconfig.platforms  |4 +
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 arch/arm64/configs/defconfig  |1 +
 7 files changed, 404 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

-- 
1.7.9.5



[RESEND PATCH v2 3/4] arm64: dts: Add dts files for LG Electronics's lg1312 SoC

2016-04-10 Thread Chanho Min
Add initial dtsi file to support lg1312 SoC which based on
Cortex-A53. Also add dts file to support lg1312 reference board
which based on lg1312 SoC.

Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- remove self-defined macro.
- change root node's #size-cells to <2>.
- remove bootargs property.
- update psci support to the arm,psci-0.2.
- put fixed-clock property under the root node.
- add stdout-path property.
- update the GICC reg length to 0x2000
- add the GICH and GICV interface.
- change pmu compatible property to arm,coretex-a53-pmu.
- remove clock-frequency property from timer.
---
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 4 files changed, 393 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index f832b8a..90ce525 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -16,6 +16,7 @@ dts-dirs += rockchip
 dts-dirs += socionext
 dts-dirs += sprd
 dts-dirs += xilinx
+dts-dirs += lg
 
 subdir-y   := $(dts-dirs)
 
diff --git a/arch/arm64/boot/dts/lg/Makefile b/arch/arm64/boot/dts/lg/Makefile
new file mode 100644
index 000..b0cc649
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_LG1K) += lg1312-ref.dtb
+
+always := $(dtb-y)
+subdir-y   := $(dts-dirs)
+clean-files:= *.dtb
diff --git a/arch/arm64/boot/dts/lg/lg1312-ref.dts 
b/arch/arm64/boot/dts/lg/lg1312-ref.dts
new file mode 100644
index 000..6d78d6b
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312-ref.dts
@@ -0,0 +1,36 @@
+/*
+ * dts file for lg1312 Reference Board.
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+/dts-v1/;
+
+#include "lg1312.dtsi"
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   model = "LG Electronics, DTV SoC LG1312 Reference Board";
+   compatible = "lge,lg1312-ref", "lge,lg1312";
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x 0x2000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi 
b/arch/arm64/boot/dts/lg/lg1312.dtsi
new file mode 100644
index 000..f889c74
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -0,0 +1,351 @@
+/*
+ * dts file for lg1312 SoC
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+#include 
+#include 
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   compatible = "lge,lg1312";
+   interrupt-parent = <>;
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   next-level-cache = <_0>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   L2_0: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   psci {
+   compatible  = "arm,psci" ,"arm,psci-0.2";
+   method = "smc";
+   cpu_suspend = <0x8401>;
+

[RESEND PATCH v2 3/4] arm64: dts: Add dts files for LG Electronics's lg1312 SoC

2016-04-10 Thread Chanho Min
Add initial dtsi file to support lg1312 SoC which based on
Cortex-A53. Also add dts file to support lg1312 reference board
which based on lg1312 SoC.

Signed-off-by: Chanho Min 
---
Changes for v2:
- remove self-defined macro.
- change root node's #size-cells to <2>.
- remove bootargs property.
- update psci support to the arm,psci-0.2.
- put fixed-clock property under the root node.
- add stdout-path property.
- update the GICC reg length to 0x2000
- add the GICH and GICV interface.
- change pmu compatible property to arm,coretex-a53-pmu.
- remove clock-frequency property from timer.
---
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 4 files changed, 393 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index f832b8a..90ce525 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -16,6 +16,7 @@ dts-dirs += rockchip
 dts-dirs += socionext
 dts-dirs += sprd
 dts-dirs += xilinx
+dts-dirs += lg
 
 subdir-y   := $(dts-dirs)
 
diff --git a/arch/arm64/boot/dts/lg/Makefile b/arch/arm64/boot/dts/lg/Makefile
new file mode 100644
index 000..b0cc649
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_LG1K) += lg1312-ref.dtb
+
+always := $(dtb-y)
+subdir-y   := $(dts-dirs)
+clean-files:= *.dtb
diff --git a/arch/arm64/boot/dts/lg/lg1312-ref.dts 
b/arch/arm64/boot/dts/lg/lg1312-ref.dts
new file mode 100644
index 000..6d78d6b
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312-ref.dts
@@ -0,0 +1,36 @@
+/*
+ * dts file for lg1312 Reference Board.
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+/dts-v1/;
+
+#include "lg1312.dtsi"
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   model = "LG Electronics, DTV SoC LG1312 Reference Board";
+   compatible = "lge,lg1312-ref", "lge,lg1312";
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x 0x2000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi 
b/arch/arm64/boot/dts/lg/lg1312.dtsi
new file mode 100644
index 000..f889c74
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -0,0 +1,351 @@
+/*
+ * dts file for lg1312 SoC
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+#include 
+#include 
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   compatible = "lge,lg1312";
+   interrupt-parent = <>;
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   next-level-cache = <_0>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   L2_0: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   psci {
+   compatible  = "arm,psci" ,"arm,psci-0.2";
+   method = "smc";
+   cpu_suspend = <0x8401>;
+   cpu

[PATCH] mm/highmem: simplify is_highmem()

2016-03-29 Thread Chanho Min
The is_highmem() is can be simplified by use of is_highmem_idx().
This patch removes redundant code and will make it easier to maintain
if the zone policy is changed or a new zone is added.

Signed-off-by: Chanho Min <chanho@lge.com>
---
 include/linux/mmzone.h |5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index e23a9e7..9ac90c3 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -817,10 +817,7 @@ static inline int is_highmem_idx(enum zone_type idx)
 static inline int is_highmem(struct zone *zone)
 {
 #ifdef CONFIG_HIGHMEM
-   int zone_off = (char *)zone - (char *)zone->zone_pgdat->node_zones;
-   return zone_off == ZONE_HIGHMEM * sizeof(*zone) ||
-  (zone_off == ZONE_MOVABLE * sizeof(*zone) &&
-   zone_movable_is_highmem());
+   return is_highmem_idx(zone_idx(zone));
 #else
return 0;
 #endif
-- 
1.7.9.5



[PATCH] mm/highmem: simplify is_highmem()

2016-03-29 Thread Chanho Min
The is_highmem() is can be simplified by use of is_highmem_idx().
This patch removes redundant code and will make it easier to maintain
if the zone policy is changed or a new zone is added.

Signed-off-by: Chanho Min 
---
 include/linux/mmzone.h |5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index e23a9e7..9ac90c3 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -817,10 +817,7 @@ static inline int is_highmem_idx(enum zone_type idx)
 static inline int is_highmem(struct zone *zone)
 {
 #ifdef CONFIG_HIGHMEM
-   int zone_off = (char *)zone - (char *)zone->zone_pgdat->node_zones;
-   return zone_off == ZONE_HIGHMEM * sizeof(*zone) ||
-  (zone_off == ZONE_MOVABLE * sizeof(*zone) &&
-   zone_movable_is_highmem());
+   return is_highmem_idx(zone_idx(zone));
 #else
return 0;
 #endif
-- 
1.7.9.5



RE: [PATCH v2 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k

2016-03-20 Thread Chanho Min
> Subject: [PATCH v2 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k
> 
> This is an initial series for supporting LG Electronics's lg1k SoCs, based on
> ARM Cortex-A53, mainly used for digital TVs.
> 
> Chanho Min (4):
>   arm64: add Kconfig entry for LG1K SoC family
>   arm64: defconfig: enable ARCH_LG1K
>   arm64: dts: Add dts files for LG Electronics's lg1312 SoC
>   MAINTAINERS: add myself as ARM/LG1K maintainer
> 
>  MAINTAINERS   |6 +
>  arch/arm64/Kconfig.platforms  |4 +
>  arch/arm64/boot/dts/Makefile  |1 +
>  arch/arm64/boot/dts/lg/Makefile   |5 +
>  arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
>  arch/arm64/boot/dts/lg/lg1312.dtsi|  351
+
>  arch/arm64/configs/defconfig  |1 +
>  7 files changed, 404 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/lg/Makefile  create mode 100644
> arch/arm64/boot/dts/lg/lg1312-ref.dts
>  create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

Please review or Ack these patches.

Chanho




RE: [PATCH v2 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k

2016-03-20 Thread Chanho Min
> Subject: [PATCH v2 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k
> 
> This is an initial series for supporting LG Electronics's lg1k SoCs, based on
> ARM Cortex-A53, mainly used for digital TVs.
> 
> Chanho Min (4):
>   arm64: add Kconfig entry for LG1K SoC family
>   arm64: defconfig: enable ARCH_LG1K
>   arm64: dts: Add dts files for LG Electronics's lg1312 SoC
>   MAINTAINERS: add myself as ARM/LG1K maintainer
> 
>  MAINTAINERS   |6 +
>  arch/arm64/Kconfig.platforms  |4 +
>  arch/arm64/boot/dts/Makefile  |1 +
>  arch/arm64/boot/dts/lg/Makefile   |5 +
>  arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
>  arch/arm64/boot/dts/lg/lg1312.dtsi|  351
+
>  arch/arm64/configs/defconfig  |1 +
>  7 files changed, 404 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/lg/Makefile  create mode 100644
> arch/arm64/boot/dts/lg/lg1312-ref.dts
>  create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

Please review or Ack these patches.

Chanho




[PATCH v2 1/4] arm64: add Kconfig entry for LG1K SoC family

2016-03-10 Thread Chanho Min
This patch introduces ARCH_LG1K to enable LG Electronics's LG1K SoC
family in Kconfig.

Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- None
---
 arch/arm64/Kconfig.platforms |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f6..b002bba 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -141,4 +141,8 @@ config ARCH_ZYNQMP
help
  This enables support for Xilinx ZynqMP Family
 
+config ARCH_LG1K
+   bool "LG Electronics LG1K SoC Family"
+   help
+ This enables support for LG Electronics LG1K SoC Family
 endmenu
-- 
1.7.9.5



[PATCH v2 1/4] arm64: add Kconfig entry for LG1K SoC family

2016-03-10 Thread Chanho Min
This patch introduces ARCH_LG1K to enable LG Electronics's LG1K SoC
family in Kconfig.

Signed-off-by: Chanho Min 
---
Changes for v2:
- None
---
 arch/arm64/Kconfig.platforms |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f6..b002bba 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -141,4 +141,8 @@ config ARCH_ZYNQMP
help
  This enables support for Xilinx ZynqMP Family
 
+config ARCH_LG1K
+   bool "LG Electronics LG1K SoC Family"
+   help
+ This enables support for LG Electronics LG1K SoC Family
 endmenu
-- 
1.7.9.5



[PATCH v2 4/4] MAINTAINERS: add myself as ARM/LG1K maintainer

2016-03-10 Thread Chanho Min
Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- None
---
 MAINTAINERS |6 ++
 1 file changed, 6 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4f55edf..20ca61a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1245,6 +1245,12 @@ L:   linux-kernel@vger.kernel.org
 S: Maintained
 F: drivers/memory/*emif*
 
+ARM/LG1K ARCHITECTURE
+M: Chanho Min <chanho@lge.com>
+L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: arch/arm64/boot/dts/lg/
+
 ARM/LOGICPD PXA270 MACHINE SUPPORT
 M: Lennert Buytenhek <ker...@wantstofly.org>
 L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
-- 
1.7.9.5



[PATCH v2 2/4] arm64: defconfig: enable ARCH_LG1K

2016-03-10 Thread Chanho Min
Enable building LG1K support in the defconfig.

Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- None
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 86581f7..14dbe27 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -49,6 +49,7 @@ CONFIG_ARCH_UNIPHIER=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_XGENE=y
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_ARCH_LG1K=y
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
 CONFIG_PCI_IOV=y
-- 
1.7.9.5



[PATCH v2 3/4] arm64: dts: Add dts files for LG Electronics's lg1312 SoC

2016-03-10 Thread Chanho Min
Add initial dtsi file to support lg1312 SoC which based on
Cortex-A53. Also add dts file to support lg1312 reference board
which based on lg1312 SoC.

Signed-off-by: Chanho Min <chanho@lge.com>
---
Changes for v2:
- remove self-defined macro.
- change root node's #size-cells to <2>.
- remove bootargs property.
- update psci support to the arm,psci-0.2.
- put fixed-clock property under the root node.
- add stdout-path property.
- update the GICC reg length to 0x2000
- add the GICH and GICV interface.
- change pmu compatible property to arm,coretex-a53-pmu.
- remove clock-frequency property from timer.
---
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 4 files changed, 393 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index f832b8a..90ce525 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -16,6 +16,7 @@ dts-dirs += rockchip
 dts-dirs += socionext
 dts-dirs += sprd
 dts-dirs += xilinx
+dts-dirs += lg
 
 subdir-y   := $(dts-dirs)
 
diff --git a/arch/arm64/boot/dts/lg/Makefile b/arch/arm64/boot/dts/lg/Makefile
new file mode 100644
index 000..b0cc649
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_LG1K) += lg1312-ref.dtb
+
+always := $(dtb-y)
+subdir-y   := $(dts-dirs)
+clean-files:= *.dtb
diff --git a/arch/arm64/boot/dts/lg/lg1312-ref.dts 
b/arch/arm64/boot/dts/lg/lg1312-ref.dts
new file mode 100644
index 000..6d78d6b
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312-ref.dts
@@ -0,0 +1,36 @@
+/*
+ * dts file for lg1312 Reference Board.
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+/dts-v1/;
+
+#include "lg1312.dtsi"
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   model = "LG Electronics, DTV SoC LG1312 Reference Board";
+   compatible = "lge,lg1312-ref", "lge,lg1312";
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x 0x2000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi 
b/arch/arm64/boot/dts/lg/lg1312.dtsi
new file mode 100644
index 000..f889c74
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -0,0 +1,351 @@
+/*
+ * dts file for lg1312 SoC
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+#include 
+#include 
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   compatible = "lge,lg1312";
+   interrupt-parent = <>;
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   next-level-cache = <_0>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   L2_0: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   psci {
+   compatible  = "arm,psci" ,"arm,psci-0.2";
+   method = "smc";
+   cpu_suspend = <0x8401>;
+

[PATCH v2 4/4] MAINTAINERS: add myself as ARM/LG1K maintainer

2016-03-10 Thread Chanho Min
Signed-off-by: Chanho Min 
---
Changes for v2:
- None
---
 MAINTAINERS |6 ++
 1 file changed, 6 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4f55edf..20ca61a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1245,6 +1245,12 @@ L:   linux-kernel@vger.kernel.org
 S: Maintained
 F: drivers/memory/*emif*
 
+ARM/LG1K ARCHITECTURE
+M: Chanho Min 
+L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: arch/arm64/boot/dts/lg/
+
 ARM/LOGICPD PXA270 MACHINE SUPPORT
 M: Lennert Buytenhek 
 L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
-- 
1.7.9.5



[PATCH v2 2/4] arm64: defconfig: enable ARCH_LG1K

2016-03-10 Thread Chanho Min
Enable building LG1K support in the defconfig.

Signed-off-by: Chanho Min 
---
Changes for v2:
- None
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 86581f7..14dbe27 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -49,6 +49,7 @@ CONFIG_ARCH_UNIPHIER=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_XGENE=y
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_ARCH_LG1K=y
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
 CONFIG_PCI_IOV=y
-- 
1.7.9.5



[PATCH v2 3/4] arm64: dts: Add dts files for LG Electronics's lg1312 SoC

2016-03-10 Thread Chanho Min
Add initial dtsi file to support lg1312 SoC which based on
Cortex-A53. Also add dts file to support lg1312 reference board
which based on lg1312 SoC.

Signed-off-by: Chanho Min 
---
Changes for v2:
- remove self-defined macro.
- change root node's #size-cells to <2>.
- remove bootargs property.
- update psci support to the arm,psci-0.2.
- put fixed-clock property under the root node.
- add stdout-path property.
- update the GICC reg length to 0x2000
- add the GICH and GICV interface.
- change pmu compatible property to arm,coretex-a53-pmu.
- remove clock-frequency property from timer.
---
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 4 files changed, 393 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index f832b8a..90ce525 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -16,6 +16,7 @@ dts-dirs += rockchip
 dts-dirs += socionext
 dts-dirs += sprd
 dts-dirs += xilinx
+dts-dirs += lg
 
 subdir-y   := $(dts-dirs)
 
diff --git a/arch/arm64/boot/dts/lg/Makefile b/arch/arm64/boot/dts/lg/Makefile
new file mode 100644
index 000..b0cc649
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_LG1K) += lg1312-ref.dtb
+
+always := $(dtb-y)
+subdir-y   := $(dts-dirs)
+clean-files:= *.dtb
diff --git a/arch/arm64/boot/dts/lg/lg1312-ref.dts 
b/arch/arm64/boot/dts/lg/lg1312-ref.dts
new file mode 100644
index 000..6d78d6b
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312-ref.dts
@@ -0,0 +1,36 @@
+/*
+ * dts file for lg1312 Reference Board.
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+/dts-v1/;
+
+#include "lg1312.dtsi"
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   model = "LG Electronics, DTV SoC LG1312 Reference Board";
+   compatible = "lge,lg1312-ref", "lge,lg1312";
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x 0x2000>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi 
b/arch/arm64/boot/dts/lg/lg1312.dtsi
new file mode 100644
index 000..f889c74
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -0,0 +1,351 @@
+/*
+ * dts file for lg1312 SoC
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+#include 
+#include 
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   compatible = "lge,lg1312";
+   interrupt-parent = <>;
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   next-level-cache = <_0>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   L2_0: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   psci {
+   compatible  = "arm,psci" ,"arm,psci-0.2";
+   method = "smc";
+   cpu_suspend = <0x8401>;
+   cpu

[PATCH v2 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k

2016-03-10 Thread Chanho Min
This is an initial series for supporting LG Electronics's lg1k SoCs,
based on ARM Cortex-A53, mainly used for digital TVs.

Chanho Min (4):
  arm64: add Kconfig entry for LG1K SoC family
  arm64: defconfig: enable ARCH_LG1K
  arm64: dts: Add dts files for LG Electronics's lg1312 SoC
  MAINTAINERS: add myself as ARM/LG1K maintainer

 MAINTAINERS   |6 +
 arch/arm64/Kconfig.platforms  |4 +
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 arch/arm64/configs/defconfig  |1 +
 7 files changed, 404 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

-- 
1.7.9.5



[PATCH v2 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k

2016-03-10 Thread Chanho Min
This is an initial series for supporting LG Electronics's lg1k SoCs,
based on ARM Cortex-A53, mainly used for digital TVs.

Chanho Min (4):
  arm64: add Kconfig entry for LG1K SoC family
  arm64: defconfig: enable ARCH_LG1K
  arm64: dts: Add dts files for LG Electronics's lg1312 SoC
  MAINTAINERS: add myself as ARM/LG1K maintainer

 MAINTAINERS   |6 +
 arch/arm64/Kconfig.platforms  |4 +
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   36 
 arch/arm64/boot/dts/lg/lg1312.dtsi|  351 +
 arch/arm64/configs/defconfig  |1 +
 7 files changed, 404 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

-- 
1.7.9.5



RE: [PATCH 3/4] arm64: dts: Add dts files for LG Electronics's lg1312 SoC

2016-03-09 Thread Chanho Min
> Hi,
> 
> On Mon, Mar 07, 2016 at 01:09:59PM +0900, Chanho Min wrote:
> > Add initial dtsi file to support lg1312 SoC which based on Cortex-A53.
> > Also add dts file to support lg1312 reference board which based on
> > lg1312 SoC.
> >
> > Signed-off-by: Chanho Min <chanho@lge.com>
> 
> I have a few comments on this patch below.
> 
> > +/ {
> > +   #address-cells = <2>;
> > +   #size-cells = <1>;
> 
> Is there definitely no reason to require a 64-bit size? e.g. ranges?
> 
> Generally I'd expect both address and size to be described as 64 bit
> quantities in the root node, to make it less painful to extend in future.
> 
> > +
> > +   model = "LG Electronics, DTV SoC LG1312 Reference Board";
> > +   compatible = "lge,lg1312-ref", "lge,lg1312";
> > +
> > +   memory {
> > +   device_type = "memory";
> > +   reg = <0x0 0x 0x2000>;
> > +   };
> > +
> > +   chosen {
> > +   bootargs = "root=/dev/nfs ip=dhcp";
> > +   };
> > +};
> 
> Drop these bootargs. This is specific to a particular developer's
> configuration, and they make no sense alone given the lack of an nfsroot, so
> they're evidently being overwritten anyway.
> 
> > +   psci {
> > +   compatible  = "arm,psci";
> > +   method = "smc";
> > +   cpu_suspend = <0x8401>;
> > +   cpu_off = <0x8402>;
> > +   cpu_on = <0x8403>;
> > +   };
> 
> What are you using as your PSCI implementation?
> 
> Is it not PSCI 0.2+ compliant?
No, Our TZ firmware support for psci 0.1 only.

> 
> Which exception level are you booting at?
EL3.

> 
> > +   gic: interrupt-controller@c0001000 {
> > +   #interrupt-cells = <3>;
> > +
> > +   compatible = "arm,gic-400";
> > +   interrupt-controller;
> > +   reg = <0x0 0xc0001000 0x1000>,
> > + <0x0 0xc0002000 0x1000>;
> > +   };
> 
> I believe the CPU interface is too short (as GICC_DIR lives at 0x1000).
> 
> What about GICH and GICV?
> 
> > +   pmu {
> > +   compatible = "arm,armv8-pmuv3";
> 
> Use "arm,cortex-a53-pmu".
> 
> > +   timer {
> > +   compatible = "arm,armv8-timer";
> > +   interrupts = ,
> > +;
> > +   clock-frequency = <2400>;
> > +   };
> 
> Please fix your firmware to program CNTFRQ.
> 
> The clock-frequency property is at best a workaround for a broken system, and
> is not sufficient in general.
> 
> > +   clocks {
> > +   clk_bus: clk_bus {
> > +   #clock-cells = <0>;
> > +
> > +   compatible = "fixed-clock";
> > +   clock-frequency = <19800>;
> > +   clock-output-names = "BUSCLK";
> > +   };
> > +   };
> 
> Just put this fixed-clock under the root node. There is nothing special about
> /clocks; it is not required to be probed and serves no purpose.
> 
> Thanks,
> Mark.

I'll resend this patch with fixes that you and Arnd mentioned.

Thanks
Chanho





RE: [PATCH 3/4] arm64: dts: Add dts files for LG Electronics's lg1312 SoC

2016-03-09 Thread Chanho Min
> Hi,
> 
> On Mon, Mar 07, 2016 at 01:09:59PM +0900, Chanho Min wrote:
> > Add initial dtsi file to support lg1312 SoC which based on Cortex-A53.
> > Also add dts file to support lg1312 reference board which based on
> > lg1312 SoC.
> >
> > Signed-off-by: Chanho Min 
> 
> I have a few comments on this patch below.
> 
> > +/ {
> > +   #address-cells = <2>;
> > +   #size-cells = <1>;
> 
> Is there definitely no reason to require a 64-bit size? e.g. ranges?
> 
> Generally I'd expect both address and size to be described as 64 bit
> quantities in the root node, to make it less painful to extend in future.
> 
> > +
> > +   model = "LG Electronics, DTV SoC LG1312 Reference Board";
> > +   compatible = "lge,lg1312-ref", "lge,lg1312";
> > +
> > +   memory {
> > +   device_type = "memory";
> > +   reg = <0x0 0x 0x2000>;
> > +   };
> > +
> > +   chosen {
> > +   bootargs = "root=/dev/nfs ip=dhcp";
> > +   };
> > +};
> 
> Drop these bootargs. This is specific to a particular developer's
> configuration, and they make no sense alone given the lack of an nfsroot, so
> they're evidently being overwritten anyway.
> 
> > +   psci {
> > +   compatible  = "arm,psci";
> > +   method = "smc";
> > +   cpu_suspend = <0x8401>;
> > +   cpu_off = <0x8402>;
> > +   cpu_on = <0x8403>;
> > +   };
> 
> What are you using as your PSCI implementation?
> 
> Is it not PSCI 0.2+ compliant?
No, Our TZ firmware support for psci 0.1 only.

> 
> Which exception level are you booting at?
EL3.

> 
> > +   gic: interrupt-controller@c0001000 {
> > +   #interrupt-cells = <3>;
> > +
> > +   compatible = "arm,gic-400";
> > +   interrupt-controller;
> > +   reg = <0x0 0xc0001000 0x1000>,
> > + <0x0 0xc0002000 0x1000>;
> > +   };
> 
> I believe the CPU interface is too short (as GICC_DIR lives at 0x1000).
> 
> What about GICH and GICV?
> 
> > +   pmu {
> > +   compatible = "arm,armv8-pmuv3";
> 
> Use "arm,cortex-a53-pmu".
> 
> > +   timer {
> > +   compatible = "arm,armv8-timer";
> > +   interrupts = ,
> > +;
> > +   clock-frequency = <2400>;
> > +   };
> 
> Please fix your firmware to program CNTFRQ.
> 
> The clock-frequency property is at best a workaround for a broken system, and
> is not sufficient in general.
> 
> > +   clocks {
> > +   clk_bus: clk_bus {
> > +   #clock-cells = <0>;
> > +
> > +   compatible = "fixed-clock";
> > +   clock-frequency = <19800>;
> > +   clock-output-names = "BUSCLK";
> > +   };
> > +   };
> 
> Just put this fixed-clock under the root node. There is nothing special about
> /clocks; it is not required to be probed and serves no purpose.
> 
> Thanks,
> Mark.

I'll resend this patch with fixes that you and Arnd mentioned.

Thanks
Chanho





RE: [PATCH] tty: amba-pl011: use sg_table instead of scatterlist

2016-03-08 Thread Chanho Min
> > @@ -344,17 +344,23 @@ static int pl011_sgbuf_init(struct dma_chan *chan,
> struct pl011_sgbuf *sg,
> > enum dma_data_direction dir)
> >  {
> > dma_addr_t dma_addr;
> > +   int ret;
> >
> > sg->buf = dma_alloc_coherent(chan->device->dev,
> > PL011_DMA_BUFFER_SIZE, _addr, GFP_KERNEL);
> > if (!sg->buf)
> > return -ENOMEM;
> 
> sg->buf can be a mapped address, which virt_to_page() will return
> sg->invalid
> results:
> 
> int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
>  void *cpu_addr, dma_addr_t handle, size_t size) {
> struct page *page = virt_to_page(cpu_addr);
> int ret;
> 
> ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
> if (unlikely(ret))
> return ret;
> 
> sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
> return 0;
> }
> EXPORT_SYMBOL(dma_common_get_sgtable);
> 
> I've no idea who is shoveling crap like this into the kernel, but it's
> _really_ far from good that such broken abstractions are being merged as
> generic code.

dma_get_sgtable goes to ops->get_sgtable first, which dma_to_pfn
will return valid address.
IMHO, Only If ops->alloc returns direct mapping address,
dma_common_get_sgtable can be used.

int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
 void *cpu_addr, dma_addr_t handle, size_t size,
 struct dma_attrs *attrs)
{
struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
int ret;




RE: [PATCH] tty: amba-pl011: use sg_table instead of scatterlist

2016-03-08 Thread Chanho Min
> > @@ -344,17 +344,23 @@ static int pl011_sgbuf_init(struct dma_chan *chan,
> struct pl011_sgbuf *sg,
> > enum dma_data_direction dir)
> >  {
> > dma_addr_t dma_addr;
> > +   int ret;
> >
> > sg->buf = dma_alloc_coherent(chan->device->dev,
> > PL011_DMA_BUFFER_SIZE, _addr, GFP_KERNEL);
> > if (!sg->buf)
> > return -ENOMEM;
> 
> sg->buf can be a mapped address, which virt_to_page() will return
> sg->invalid
> results:
> 
> int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
>  void *cpu_addr, dma_addr_t handle, size_t size) {
> struct page *page = virt_to_page(cpu_addr);
> int ret;
> 
> ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
> if (unlikely(ret))
> return ret;
> 
> sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
> return 0;
> }
> EXPORT_SYMBOL(dma_common_get_sgtable);
> 
> I've no idea who is shoveling crap like this into the kernel, but it's
> _really_ far from good that such broken abstractions are being merged as
> generic code.

dma_get_sgtable goes to ops->get_sgtable first, which dma_to_pfn
will return valid address.
IMHO, Only If ops->alloc returns direct mapping address,
dma_common_get_sgtable can be used.

int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
 void *cpu_addr, dma_addr_t handle, size_t size,
 struct dma_attrs *attrs)
{
struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
int ret;




[PATCH] tty: amba-pl011: use sg_table instead of scatterlist

2016-03-07 Thread Chanho Min
The use of phys_to_page is wrong in commit cb06ff102e2d ("ARM: PL011:
Add support for Rx DMA buffer polling."), beacase DMA address is not
physical address. Also, phys_to_page is not declared in some architecture.
The use of virt_to_page is wrong as well because dma_alloc_coherent
implementaion are allowed to returned remapped memory. So I use sg_table
instead of scatterlist and change to dma_get_sgtable() implementaion.

Reported-by: Wang, Annie <annie.w...@amd.com>
Signed-off-by: Chanho Min <chanho@lge.com>
---
 drivers/tty/serial/amba-pl011.c |   33 -
 1 file changed, 20 insertions(+), 13 deletions(-)

diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index c0da0cc..ce8840f 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -197,7 +197,7 @@ static struct vendor_data vendor_zte = {
 /* Deals with DMA transactions */
 
 struct pl011_sgbuf {
-   struct scatterlist sg;
+   struct sg_table sgt;
char *buf;
 };
 
@@ -344,17 +344,23 @@ static int pl011_sgbuf_init(struct dma_chan *chan, struct 
pl011_sgbuf *sg,
enum dma_data_direction dir)
 {
dma_addr_t dma_addr;
+   int ret;
 
sg->buf = dma_alloc_coherent(chan->device->dev,
PL011_DMA_BUFFER_SIZE, _addr, GFP_KERNEL);
if (!sg->buf)
return -ENOMEM;
 
-   sg_init_table(>sg, 1);
-   sg_set_page(>sg, phys_to_page(dma_addr),
-   PL011_DMA_BUFFER_SIZE, offset_in_page(dma_addr));
-   sg_dma_address(>sg) = dma_addr;
-   sg_dma_len(>sg) = PL011_DMA_BUFFER_SIZE;
+   ret = dma_get_sgtable(chan->device->dev, >sgt, sg->buf, dma_addr,
+   PL011_DMA_BUFFER_SIZE);
+
+   if (ret < 0) {
+   dma_free_coherent(chan->device->dev,
+   PL011_DMA_BUFFER_SIZE, sg->buf, dma_addr);
+   return -ENOMEM;
+   }
+   sg_dma_address(sg->sgt.sgl) = dma_addr;
+   sg_dma_len(sg->sgt.sgl) = PL011_DMA_BUFFER_SIZE;
 
return 0;
 }
@@ -365,7 +371,8 @@ static void pl011_sgbuf_free(struct dma_chan *chan, struct 
pl011_sgbuf *sg,
if (sg->buf) {
dma_free_coherent(chan->device->dev,
PL011_DMA_BUFFER_SIZE, sg->buf,
-   sg_dma_address(>sg));
+   sg_dma_address(sg->sgt.sgl));
+   sg_free_table(>sgt);
}
 }
 
@@ -813,7 +820,7 @@ static int pl011_dma_rx_trigger_dma(struct uart_amba_port 
*uap)
/* Start the RX DMA job */
sgbuf = uap->dmarx.use_buf_b ?
>dmarx.sgbuf_b : >dmarx.sgbuf_a;
-   desc = dmaengine_prep_slave_sg(rxchan, >sg, 1,
+   desc = dmaengine_prep_slave_sg(rxchan, sgbuf->sgt.sgl, 1,
DMA_DEV_TO_MEM,
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
/*
@@ -863,7 +870,7 @@ static void pl011_dma_rx_chars(struct uart_amba_port *uap,
 
if (uap->dmarx.poll_rate) {
/* The data can be taken by polling */
-   dmataken = sgbuf->sg.length - dmarx->last_residue;
+   dmataken = sgbuf->sgt.sgl->length - dmarx->last_residue;
/* Recalculate the pending size */
if (pending >= dmataken)
pending -= dmataken;
@@ -888,7 +895,7 @@ static void pl011_dma_rx_chars(struct uart_amba_port *uap,
 
/* Reset the last_residue for Rx DMA poll */
if (uap->dmarx.poll_rate)
-   dmarx->last_residue = sgbuf->sg.length;
+   dmarx->last_residue = sgbuf->sgt.sgl->length;
 
/*
 * Only continue with trying to read the FIFO if all DMA chars have
@@ -948,7 +955,7 @@ static void pl011_dma_rx_irq(struct uart_amba_port *uap)
pl011_write(uap->dmacr, uap, REG_DMACR);
uap->dmarx.running = false;
 
-   pending = sgbuf->sg.length - state.residue;
+   pending = sgbuf->sgt.sgl->length - state.residue;
BUG_ON(pending > PL011_DMA_BUFFER_SIZE);
/* Then we terminate the transfer - we now know our residue */
dmaengine_terminate_all(rxchan);
@@ -994,7 +1001,7 @@ static void pl011_dma_rx_callback(void *data)
 * the DMA irq handler. So we check the residue here.
 */
rxchan->device->device_tx_status(rxchan, dmarx->cookie, );
-   pending = sgbuf->sg.length - state.residue;
+   pending = sgbuf->sgt.sgl->length - state.residue;
BUG_ON(pending > PL011_DMA_BUFFER_SIZE);
/* Then we terminate the transfer - we now know our residue */
dmaengine_terminate_all(rxchan);
@@ -1050,7 +1057,7 @@ static void pl011_dma_rx_poll(unsigned long args)
sgbuf = dmarx->use_buf_b ? >dmarx.sgbuf_b : >dmarx.s

[PATCH] tty: amba-pl011: use sg_table instead of scatterlist

2016-03-07 Thread Chanho Min
The use of phys_to_page is wrong in commit cb06ff102e2d ("ARM: PL011:
Add support for Rx DMA buffer polling."), beacase DMA address is not
physical address. Also, phys_to_page is not declared in some architecture.
The use of virt_to_page is wrong as well because dma_alloc_coherent
implementaion are allowed to returned remapped memory. So I use sg_table
instead of scatterlist and change to dma_get_sgtable() implementaion.

Reported-by: Wang, Annie 
Signed-off-by: Chanho Min 
---
 drivers/tty/serial/amba-pl011.c |   33 -
 1 file changed, 20 insertions(+), 13 deletions(-)

diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index c0da0cc..ce8840f 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -197,7 +197,7 @@ static struct vendor_data vendor_zte = {
 /* Deals with DMA transactions */
 
 struct pl011_sgbuf {
-   struct scatterlist sg;
+   struct sg_table sgt;
char *buf;
 };
 
@@ -344,17 +344,23 @@ static int pl011_sgbuf_init(struct dma_chan *chan, struct 
pl011_sgbuf *sg,
enum dma_data_direction dir)
 {
dma_addr_t dma_addr;
+   int ret;
 
sg->buf = dma_alloc_coherent(chan->device->dev,
PL011_DMA_BUFFER_SIZE, _addr, GFP_KERNEL);
if (!sg->buf)
return -ENOMEM;
 
-   sg_init_table(>sg, 1);
-   sg_set_page(>sg, phys_to_page(dma_addr),
-   PL011_DMA_BUFFER_SIZE, offset_in_page(dma_addr));
-   sg_dma_address(>sg) = dma_addr;
-   sg_dma_len(>sg) = PL011_DMA_BUFFER_SIZE;
+   ret = dma_get_sgtable(chan->device->dev, >sgt, sg->buf, dma_addr,
+   PL011_DMA_BUFFER_SIZE);
+
+   if (ret < 0) {
+   dma_free_coherent(chan->device->dev,
+   PL011_DMA_BUFFER_SIZE, sg->buf, dma_addr);
+   return -ENOMEM;
+   }
+   sg_dma_address(sg->sgt.sgl) = dma_addr;
+   sg_dma_len(sg->sgt.sgl) = PL011_DMA_BUFFER_SIZE;
 
return 0;
 }
@@ -365,7 +371,8 @@ static void pl011_sgbuf_free(struct dma_chan *chan, struct 
pl011_sgbuf *sg,
if (sg->buf) {
dma_free_coherent(chan->device->dev,
PL011_DMA_BUFFER_SIZE, sg->buf,
-   sg_dma_address(>sg));
+   sg_dma_address(sg->sgt.sgl));
+   sg_free_table(>sgt);
}
 }
 
@@ -813,7 +820,7 @@ static int pl011_dma_rx_trigger_dma(struct uart_amba_port 
*uap)
/* Start the RX DMA job */
sgbuf = uap->dmarx.use_buf_b ?
>dmarx.sgbuf_b : >dmarx.sgbuf_a;
-   desc = dmaengine_prep_slave_sg(rxchan, >sg, 1,
+   desc = dmaengine_prep_slave_sg(rxchan, sgbuf->sgt.sgl, 1,
DMA_DEV_TO_MEM,
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
/*
@@ -863,7 +870,7 @@ static void pl011_dma_rx_chars(struct uart_amba_port *uap,
 
if (uap->dmarx.poll_rate) {
/* The data can be taken by polling */
-   dmataken = sgbuf->sg.length - dmarx->last_residue;
+   dmataken = sgbuf->sgt.sgl->length - dmarx->last_residue;
/* Recalculate the pending size */
if (pending >= dmataken)
pending -= dmataken;
@@ -888,7 +895,7 @@ static void pl011_dma_rx_chars(struct uart_amba_port *uap,
 
/* Reset the last_residue for Rx DMA poll */
if (uap->dmarx.poll_rate)
-   dmarx->last_residue = sgbuf->sg.length;
+   dmarx->last_residue = sgbuf->sgt.sgl->length;
 
/*
 * Only continue with trying to read the FIFO if all DMA chars have
@@ -948,7 +955,7 @@ static void pl011_dma_rx_irq(struct uart_amba_port *uap)
pl011_write(uap->dmacr, uap, REG_DMACR);
uap->dmarx.running = false;
 
-   pending = sgbuf->sg.length - state.residue;
+   pending = sgbuf->sgt.sgl->length - state.residue;
BUG_ON(pending > PL011_DMA_BUFFER_SIZE);
/* Then we terminate the transfer - we now know our residue */
dmaengine_terminate_all(rxchan);
@@ -994,7 +1001,7 @@ static void pl011_dma_rx_callback(void *data)
 * the DMA irq handler. So we check the residue here.
 */
rxchan->device->device_tx_status(rxchan, dmarx->cookie, );
-   pending = sgbuf->sg.length - state.residue;
+   pending = sgbuf->sgt.sgl->length - state.residue;
BUG_ON(pending > PL011_DMA_BUFFER_SIZE);
/* Then we terminate the transfer - we now know our residue */
dmaengine_terminate_all(rxchan);
@@ -1050,7 +1057,7 @@ static void pl011_dma_rx_poll(unsigned long args)
sgbuf = dmarx->use_buf_b ? >dmarx.sgbuf_b : >dmarx.sgbuf_a;
rxchan->device->device_tx_status(rxchan, 

RE: [PATCH 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k

2016-03-06 Thread Chanho Min
> 
> The patches look ok in principle, but the timing is unfortunate: we are at -
> rc7 now, just before the merge window, and we need to give this a little extra
> time for review, so I think we should merge this for 4.7, not 4.6.

It's ok for me.

Chanho



RE: [PATCH 0/4] ARM64:SoC add a new platform, LG Electronics's lg1k

2016-03-06 Thread Chanho Min
> 
> The patches look ok in principle, but the timing is unfortunate: we are at -
> rc7 now, just before the merge window, and we need to give this a little extra
> time for review, so I think we should merge this for 4.7, not 4.6.

It's ok for me.

Chanho



[PATCH 2/4] arm64: defconfig: enable ARCH_LG1K

2016-03-06 Thread Chanho Min
Enable building LG1K support in the defconfig.

Signed-off-by: Chanho Min <chanho@lge.com>
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 86581f7..14dbe27 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -49,6 +49,7 @@ CONFIG_ARCH_UNIPHIER=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_XGENE=y
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_ARCH_LG1K=y
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
 CONFIG_PCI_IOV=y
-- 
1.7.9.5



[PATCH 2/4] arm64: defconfig: enable ARCH_LG1K

2016-03-06 Thread Chanho Min
Enable building LG1K support in the defconfig.

Signed-off-by: Chanho Min 
---
 arch/arm64/configs/defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 86581f7..14dbe27 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -49,6 +49,7 @@ CONFIG_ARCH_UNIPHIER=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_XGENE=y
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_ARCH_LG1K=y
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
 CONFIG_PCI_IOV=y
-- 
1.7.9.5



[PATCH 4/4] MAINTAINERS: add myself as ARM/LG1K maintainer

2016-03-06 Thread Chanho Min
Signed-off-by: Chanho Min <chanho@lge.com>
---
 MAINTAINERS |6 ++
 1 file changed, 6 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4f55edf..20ca61a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1245,6 +1245,12 @@ L:   linux-kernel@vger.kernel.org
 S: Maintained
 F: drivers/memory/*emif*
 
+ARM/LG1K ARCHITECTURE
+M: Chanho Min <chanho@lge.com>
+L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: arch/arm64/boot/dts/lg/
+
 ARM/LOGICPD PXA270 MACHINE SUPPORT
 M: Lennert Buytenhek <ker...@wantstofly.org>
 L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
-- 
1.7.9.5



[PATCH 3/4] arm64: dts: Add dts files for LG Electronics's lg1312 SoC

2016-03-06 Thread Chanho Min
Add initial dtsi file to support lg1312 SoC which based on
Cortex-A53. Also add dts file to support lg1312 reference board
which based on lg1312 SoC.

Signed-off-by: Chanho Min <chanho@lge.com>
---
 arch/arm64/boot/dts/Makefile  |1 +
 arch/arm64/boot/dts/lg/Makefile   |5 +
 arch/arm64/boot/dts/lg/lg1312-ref.dts |   26 +++
 arch/arm64/boot/dts/lg/lg1312.dtsi|  346 +
 4 files changed, 378 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lg/Makefile
 create mode 100644 arch/arm64/boot/dts/lg/lg1312-ref.dts
 create mode 100644 arch/arm64/boot/dts/lg/lg1312.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index f832b8a..90ce525 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -16,6 +16,7 @@ dts-dirs += rockchip
 dts-dirs += socionext
 dts-dirs += sprd
 dts-dirs += xilinx
+dts-dirs += lg
 
 subdir-y   := $(dts-dirs)
 
diff --git a/arch/arm64/boot/dts/lg/Makefile b/arch/arm64/boot/dts/lg/Makefile
new file mode 100644
index 000..b0cc649
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_LG1K) += lg1312-ref.dtb
+
+always := $(dtb-y)
+subdir-y   := $(dts-dirs)
+clean-files:= *.dtb
diff --git a/arch/arm64/boot/dts/lg/lg1312-ref.dts 
b/arch/arm64/boot/dts/lg/lg1312-ref.dts
new file mode 100644
index 000..a9b00f3
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312-ref.dts
@@ -0,0 +1,26 @@
+/*
+ * dts file for lg1312 Reference Board.
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+/dts-v1/;
+
+#include "lg1312.dtsi"
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   model = "LG Electronics, DTV SoC LG1312 Reference Board";
+   compatible = "lge,lg1312-ref", "lge,lg1312";
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x 0x2000>;
+   };
+
+   chosen {
+   bootargs = "root=/dev/nfs ip=dhcp";
+   };
+};
diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi 
b/arch/arm64/boot/dts/lg/lg1312.dtsi
new file mode 100644
index 000..3146dbd
--- /dev/null
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -0,0 +1,346 @@
+/*
+ * dts file for lg1312 SoC
+ *
+ * Copyright (C) 2016, LG Electronics
+ */
+
+#include 
+#include 
+
+#define ARMV8_TIMER_IRQ_TYPE   (GIC_CPU_MASK_RAW(0x0f) | IRQ_TYPE_LEVEL_LOW)
+
+/ {
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   compatible = "lge,lg1312";
+   interrupt-parent = <>;
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   next-level-cache = <_0>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <_0>;
+   };
+   L2_0: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   psci {
+   compatible  = "arm,psci";
+   method = "smc";
+   cpu_suspend = <0x8401>;
+   cpu_off = <0x8402>;
+   cpu_on = <0x8403>;
+   };
+
+   gic: interrupt-controller@c0001000 {
+   #interrupt-cells = <3>;
+
+   compatible = "arm,gic-400";
+   interrupt-controller;
+   reg = <0x0 0xc0001000 0x1000>,
+ <0x0 0xc0002000 0x1000>;
+   };
+
+   pmu {
+   compatible = "arm,armv8-pmuv3";
+   interrupts = ,
+,
+,
+;
+  

[PATCH 4/4] MAINTAINERS: add myself as ARM/LG1K maintainer

2016-03-06 Thread Chanho Min
Signed-off-by: Chanho Min 
---
 MAINTAINERS |6 ++
 1 file changed, 6 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4f55edf..20ca61a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1245,6 +1245,12 @@ L:   linux-kernel@vger.kernel.org
 S: Maintained
 F: drivers/memory/*emif*
 
+ARM/LG1K ARCHITECTURE
+M: Chanho Min 
+L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: arch/arm64/boot/dts/lg/
+
 ARM/LOGICPD PXA270 MACHINE SUPPORT
 M: Lennert Buytenhek 
 L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
-- 
1.7.9.5



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