[PATCH v2 1/4] dt-bindings: k3dma: add optional property hisilicon,dma-min-chan
From: Li Yu Add optional property hisilicon,dma-min-chan for k3dma. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/k3dma.txt b/Documentation/devicetree/bindings/dma/k3dma.txt index 4945aeac4dc4..f34202a80f3c 100644 --- a/Documentation/devicetree/bindings/dma/k3dma.txt +++ b/Documentation/devicetree/bindings/dma/k3dma.txt @@ -12,6 +12,11 @@ Required properties: have specific request line - clocks: clock required +Optional properties: +- hisilicon,dma-min-chan: the minimum DMA channel number which is usable + Default value is 0, but in some platform it is + configured 1, like in hi3660 platform + Example: Controller: @@ -21,6 +26,7 @@ Controller: #dma-cells = <1>; dma-channels = <16>; dma-requests = <27>; + hisilicon,dma-min-chan = <1>; interrupts = <0 12 4>; clocks = <&pclk>; }; -- 2.17.1
[PATCH v2 0/4] k3dma: add support to reserved channels
This patchset fixes bug people found on hikey960 when allocating DMA channels to peripherals such as SPI. It fails because the channel is reserved and not accessible by kernel. Patch 1, 2 and 3 add support to reserved channels for K3 DMA. Patch 4 includes a removal of axi_config who controls DMA secure/non-secure access permission but is actually set in early stage by bootloader. Guodong Xu (1): arm64: dts: hi3660: update property name hisilicon,dma-min-chan Li Yu (3): dt-bindings: k3dma: add optional property hisilicon,dma-min-chan k3dma: add support to reserved minimum channels k3dma: delete axi_config Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 +- drivers/dma/k3dma.c | 16 3 files changed, 15 insertions(+), 9 deletions(-) -- 2.17.1
[PATCH v2 2/4] k3dma: add support to reserved minimum channels
From: Li Yu
On k3 series of SoC, DMA controller reserves some channels for
other on-chip coprocessors. By reading property "hisilicon,dma-min-chan"
from dts node, kernel will not use these reserved channels.
As an example, on Hi3660, channel 0 is reserved for lpm3.
Refer to Documentation/devicetree/bindings/dma/k3dma.txt for more
information.
Signed-off-by: Li Yu
Signed-off-by: Guodong Xu
---
drivers/dma/k3dma.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index fa31cccbe04f..33efb541acb2 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c
@@ -113,6 +113,7 @@ struct k3_dma_dev {
struct dma_pool *pool;
u32 dma_channels;
u32 dma_requests;
+ u32 dma_min_chan;
unsigned intirq;
};
@@ -309,7 +310,7 @@ static void k3_dma_tasklet(unsigned long arg)
/* check new channel request in d->chan_pending */
spin_lock_irq(&d->lock);
- for (pch = 0; pch < d->dma_channels; pch++) {
+ for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) {
p = &d->phy[pch];
if (p->vchan == NULL && !list_empty(&d->chan_pending)) {
@@ -326,7 +327,7 @@ static void k3_dma_tasklet(unsigned long arg)
}
spin_unlock_irq(&d->lock);
- for (pch = 0; pch < d->dma_channels; pch++) {
+ for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) {
if (pch_alloc & (1 << pch)) {
p = &d->phy[pch];
c = p->vchan;
@@ -825,6 +826,8 @@ static int k3_dma_probe(struct platform_device *op)
"dma-channels", &d->dma_channels);
of_property_read_u32((&op->dev)->of_node,
"dma-requests", &d->dma_requests);
+ of_property_read_u32((&op->dev)->of_node,
+ "hisilicon,dma-min-chan", &d->dma_min_chan);
}
d->clk = devm_clk_get(&op->dev, NULL);
@@ -848,12 +851,12 @@ static int k3_dma_probe(struct platform_device *op)
return -ENOMEM;
/* init phy channel */
- d->phy = devm_kcalloc(&op->dev,
- d->dma_channels, sizeof(struct k3_dma_phy), GFP_KERNEL);
+ d->phy = devm_kcalloc(&op->dev, (d->dma_channels - d->dma_min_chan),
+ sizeof(struct k3_dma_phy), GFP_KERNEL);
if (d->phy == NULL)
return -ENOMEM;
- for (i = 0; i < d->dma_channels; i++) {
+ for (i = d->dma_min_chan; i < d->dma_channels; i++) {
struct k3_dma_phy *p = &d->phy[i];
p->idx = i;
--
2.17.1
[PATCH v2 3/4] arm64: dts: hi3660: update property name hisilicon,dma-min-chan
Update property name dma-min-chan to "hisilicon,dma-min-chan" Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 8d477dcbfa58..0cec26976eb6 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -537,7 +537,7 @@ #dma-cells = <1>; dma-channels = <16>; dma-requests = <32>; - dma-min-chan = <1>; + hisilicon,dma-min-chan = <1>; interrupts = ; clocks = <&crg_ctrl HI3660_CLK_GATE_DMAC>; dma-no-cci; -- 2.17.1
[PATCH v2 4/4] k3dma: delete axi_config
From: Li Yu Axi_config controls whether DMA resources can be accessed in non-secure mode, such as linux kernel. The setting is actually done in bootloader stage. This patch removes axi_config from k3dma driver. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- drivers/dma/k3dma.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c index 33efb541acb2..4542e703ec85 100644 --- a/drivers/dma/k3dma.c +++ b/drivers/dma/k3dma.c @@ -52,8 +52,6 @@ #define CX_SRC 0x814 #define CX_DST 0x818 #define CX_CFG 0x81c -#define AXI_CFG0x820 -#define AXI_CFG_DEFAULT0x201201 #define CX_LLI_CHAIN_EN0x2 #define CX_CFG_EN 0x1 @@ -158,7 +156,6 @@ static void k3_dma_set_desc(struct k3_dma_phy *phy, struct k3_desc_hw *hw) writel_relaxed(hw->count, phy->base + CX_CNT0); writel_relaxed(hw->saddr, phy->base + CX_SRC); writel_relaxed(hw->daddr, phy->base + CX_DST); - writel_relaxed(AXI_CFG_DEFAULT, phy->base + AXI_CFG); writel_relaxed(hw->config, phy->base + CX_CFG); } -- 2.17.1
Re: [PATCH 1/3] dt-bindings: k3dma: add optional property dma_min_chan
On Wed, Jul 4, 2018 at 9:14 AM Guodong Xu wrote: > > On Wed, Jul 4, 2018 at 2:54 AM Rob Herring wrote: > > > > On Fri, Jun 22, 2018 at 11:24:14AM +0800, Guodong Xu wrote: > > > From: Li Yu > > > > > > Add optional property dma_min_chan for k3dma. > > > > > > Signed-off-by: Li Yu > > > --- > > > Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ > > > 1 file changed, 6 insertions(+) > > > > > > diff --git a/t b/Documentation/devicetree/bindings/dma/k3dma.txt > > > index 4945aeac4dc4..2fa1370c3173 100644 > > > --- a/Documentation/devicetree/bindings/dma/k3dma.txt > > > +++ b/Documentation/devicetree/bindings/dma/k3dma.txt > > > @@ -12,6 +12,11 @@ Required properties: > > > have specific request line > > > - clocks: clock required > > > > > > +Optional properties: > > > +- dma_min_chan: the minimum number of DMA channel which begin to use > > > + the default value is 0, but in some platform is > > > + configured 1, like hi3660 platform > > > > Can't this be implied by the compatible? > > > > No. "hisilicon,k3-dma-1.0" can work with series of hisilicon kirin > SoC. And each has different reservation of channels for on-chip > coprocessors. > > > If not, needs vendor prefix and don't use '_' in property names. > > > > Sure, thanks. Will change that when design new property. As Vinod > suggested, it makes sense to change this to a mask. > After checking with Kirin SoC design team, I prefer to stay with minimum channel number instead of mask. So, I will change this property to: hisilicon,dma-min-chan -Guodong > > -Guodong > > > Rob
Re: [PATCH 2/3] k3dma: add support to reserved minimum channels
On Thu, Jun 28, 2018 at 2:02 PM Vinod wrote:
>
> On 22-06-18, 11:24, Guodong Xu wrote:
> > From: Li Yu
> >
> > On k3 series of SoC, DMA controller reserves some channels for
> > other on-chip coprocessors. By adding support to dma_min_chan, kernel
> > will not be able to use these reserved channels.
> >
> > One example is on Hi3660 platform, channel 0 is reserved to lpm3.
> >
> > Please also refer to Documentation/devicetree/bindings/dma/k3dma.txt
>
> and if some other platform has channel X marked for co-processor, maybe
> a last channel or something in middle, how will this work then?
>
Hi， Vinod
Sorry for delayed response. We checked with Kirin hardware design
team, so far their design strategy is all Kirin SoC series reserve
only from minimum side, saying channel 0, then 1, then 2. That impacts
the current SoC in upstreaming, Kirin960 (Hi3660), and next versions
in Kirin SoC, Kirin970 and 980, which may hit upstream later.
> I am thinking this should be a mask, rather than min.
>
So, since this driver k3dma.c is only used by Kirin SoC DMA
controllers, I would prefer to keep the current design dma_min_chan
unchanged.
What do you think?
-Guodong
> >
> > Signed-off-by: Li Yu
> > Signed-off-by: Guodong Xu
> > ---
> > drivers/dma/k3dma.c | 13 -
> > 1 file changed, 8 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
> > index fa31cccbe04f..13cec12742e3 100644
> > --- a/drivers/dma/k3dma.c
> > +++ b/drivers/dma/k3dma.c
> > @@ -113,6 +113,7 @@ struct k3_dma_dev {
> > struct dma_pool *pool;
> > u32 dma_channels;
> > u32 dma_requests;
> > + u32 dma_min_chan;
> > unsigned intirq;
> > };
> >
> > @@ -309,7 +310,7 @@ static void k3_dma_tasklet(unsigned long arg)
> >
> > /* check new channel request in d->chan_pending */
> > spin_lock_irq(&d->lock);
> > - for (pch = 0; pch < d->dma_channels; pch++) {
> > + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) {
> > p = &d->phy[pch];
> >
> > if (p->vchan == NULL && !list_empty(&d->chan_pending)) {
> > @@ -326,7 +327,7 @@ static void k3_dma_tasklet(unsigned long arg)
> > }
> > spin_unlock_irq(&d->lock);
> >
> > - for (pch = 0; pch < d->dma_channels; pch++) {
> > + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) {
> > if (pch_alloc & (1 << pch)) {
> > p = &d->phy[pch];
> > c = p->vchan;
> > @@ -825,6 +826,8 @@ static int k3_dma_probe(struct platform_device *op)
> > "dma-channels", &d->dma_channels);
> > of_property_read_u32((&op->dev)->of_node,
> > "dma-requests", &d->dma_requests);
> > + of_property_read_u32((&op->dev)->of_node,
> > + "dma-min-chan", &d->dma_min_chan);
> > }
> >
> > d->clk = devm_clk_get(&op->dev, NULL);
> > @@ -848,12 +851,12 @@ static int k3_dma_probe(struct platform_device *op)
> > return -ENOMEM;
> >
> > /* init phy channel */
> > - d->phy = devm_kcalloc(&op->dev,
> > - d->dma_channels, sizeof(struct k3_dma_phy), GFP_KERNEL);
> > + d->phy = devm_kcalloc(&op->dev, (d->dma_channels - d->dma_min_chan),
> > + sizeof(struct k3_dma_phy), GFP_KERNEL);
> > if (d->phy == NULL)
> > return -ENOMEM;
> >
> > - for (i = 0; i < d->dma_channels; i++) {
> > + for (i = d->dma_min_chan; i < d->dma_channels; i++) {
> > struct k3_dma_phy *p = &d->phy[i];
> >
> > p->idx = i;
> > --
> > 2.17.1
>
> --
> ~Vinod
Re: [PATCH 1/3] dt-bindings: k3dma: add optional property dma_min_chan
On Wed, Jul 4, 2018 at 2:54 AM Rob Herring wrote: > > On Fri, Jun 22, 2018 at 11:24:14AM +0800, Guodong Xu wrote: > > From: Li Yu > > > > Add optional property dma_min_chan for k3dma. > > > > Signed-off-by: Li Yu > > --- > > Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/t b/Documentation/devicetree/bindings/dma/k3dma.txt > > index 4945aeac4dc4..2fa1370c3173 100644 > > --- a/Documentation/devicetree/bindings/dma/k3dma.txt > > +++ b/Documentation/devicetree/bindings/dma/k3dma.txt > > @@ -12,6 +12,11 @@ Required properties: > > have specific request line > > - clocks: clock required > > > > +Optional properties: > > +- dma_min_chan: the minimum number of DMA channel which begin to use > > + the default value is 0, but in some platform is > > + configured 1, like hi3660 platform > > Can't this be implied by the compatible? > No. "hisilicon,k3-dma-1.0" can work with series of hisilicon kirin SoC. And each has different reservation of channels for on-chip coprocessors. > If not, needs vendor prefix and don't use '_' in property names. > Sure, thanks. Will change that when design new property. As Vinod suggested, it makes sense to change this to a mask. -Guodong > Rob
[PATCH 0/3] k3dma: add support to reserved channels
This patchset fixes bug people found on hikey960 when allocating DMA channels to peripherals such as SPI. It fails because the channel is reserved, and is not accessible by kernel. Patch 1 and 2 add support to reserved channels for K3 DMA. Patch 3 includes a removal of axi_config who controls DMA secure/non-secure access permission but is actually set in early stage by bootloader. Li Yu (3): dt-bindings: k3dma: add optional property dma_min_chan k3dma: add support to reserved minimum channels k3dma: delete axi_config Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ drivers/dma/k3dma.c | 16 2 files changed, 14 insertions(+), 8 deletions(-) -- 2.17.1
[PATCH 3/3] k3dma: delete axi_config
From: Li Yu Axi_config controls whether DMA resources can be accessed in non-secure mode, such as linux kernel. The setting is actually done in bootloader stage. This patch removes axi_config from k3dma driver. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- drivers/dma/k3dma.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c index 13cec12742e3..ddd7d1e054c0 100644 --- a/drivers/dma/k3dma.c +++ b/drivers/dma/k3dma.c @@ -52,8 +52,6 @@ #define CX_SRC 0x814 #define CX_DST 0x818 #define CX_CFG 0x81c -#define AXI_CFG0x820 -#define AXI_CFG_DEFAULT0x201201 #define CX_LLI_CHAIN_EN0x2 #define CX_CFG_EN 0x1 @@ -158,7 +156,6 @@ static void k3_dma_set_desc(struct k3_dma_phy *phy, struct k3_desc_hw *hw) writel_relaxed(hw->count, phy->base + CX_CNT0); writel_relaxed(hw->saddr, phy->base + CX_SRC); writel_relaxed(hw->daddr, phy->base + CX_DST); - writel_relaxed(AXI_CFG_DEFAULT, phy->base + AXI_CFG); writel_relaxed(hw->config, phy->base + CX_CFG); } -- 2.17.1
[PATCH 2/3] k3dma: add support to reserved minimum channels
From: Li Yu
On k3 series of SoC, DMA controller reserves some channels for
other on-chip coprocessors. By adding support to dma_min_chan, kernel
will not be able to use these reserved channels.
One example is on Hi3660 platform, channel 0 is reserved to lpm3.
Please also refer to Documentation/devicetree/bindings/dma/k3dma.txt
Signed-off-by: Li Yu
Signed-off-by: Guodong Xu
---
drivers/dma/k3dma.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index fa31cccbe04f..13cec12742e3 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c
@@ -113,6 +113,7 @@ struct k3_dma_dev {
struct dma_pool *pool;
u32 dma_channels;
u32 dma_requests;
+ u32 dma_min_chan;
unsigned intirq;
};
@@ -309,7 +310,7 @@ static void k3_dma_tasklet(unsigned long arg)
/* check new channel request in d->chan_pending */
spin_lock_irq(&d->lock);
- for (pch = 0; pch < d->dma_channels; pch++) {
+ for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) {
p = &d->phy[pch];
if (p->vchan == NULL && !list_empty(&d->chan_pending)) {
@@ -326,7 +327,7 @@ static void k3_dma_tasklet(unsigned long arg)
}
spin_unlock_irq(&d->lock);
- for (pch = 0; pch < d->dma_channels; pch++) {
+ for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) {
if (pch_alloc & (1 << pch)) {
p = &d->phy[pch];
c = p->vchan;
@@ -825,6 +826,8 @@ static int k3_dma_probe(struct platform_device *op)
"dma-channels", &d->dma_channels);
of_property_read_u32((&op->dev)->of_node,
"dma-requests", &d->dma_requests);
+ of_property_read_u32((&op->dev)->of_node,
+ "dma-min-chan", &d->dma_min_chan);
}
d->clk = devm_clk_get(&op->dev, NULL);
@@ -848,12 +851,12 @@ static int k3_dma_probe(struct platform_device *op)
return -ENOMEM;
/* init phy channel */
- d->phy = devm_kcalloc(&op->dev,
- d->dma_channels, sizeof(struct k3_dma_phy), GFP_KERNEL);
+ d->phy = devm_kcalloc(&op->dev, (d->dma_channels - d->dma_min_chan),
+ sizeof(struct k3_dma_phy), GFP_KERNEL);
if (d->phy == NULL)
return -ENOMEM;
- for (i = 0; i < d->dma_channels; i++) {
+ for (i = d->dma_min_chan; i < d->dma_channels; i++) {
struct k3_dma_phy *p = &d->phy[i];
p->idx = i;
--
2.17.1
[PATCH 1/3] dt-bindings: k3dma: add optional property dma_min_chan
From: Li Yu Add optional property dma_min_chan for k3dma. Signed-off-by: Li Yu --- Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/k3dma.txt b/Documentation/devicetree/bindings/dma/k3dma.txt index 4945aeac4dc4..2fa1370c3173 100644 --- a/Documentation/devicetree/bindings/dma/k3dma.txt +++ b/Documentation/devicetree/bindings/dma/k3dma.txt @@ -12,6 +12,11 @@ Required properties: have specific request line - clocks: clock required +Optional properties: +- dma_min_chan: the minimum number of DMA channel which begin to use + the default value is 0, but in some platform is + configured 1, like hi3660 platform + Example: Controller: @@ -21,6 +26,7 @@ Controller: #dma-cells = <1>; dma-channels = <16>; dma-requests = <27>; + dma_min_chan = <1>; interrupts = <0 12 4>; clocks = <&pclk>; }; -- 2.17.1
Re: [PATCH 4/4] arm64: dts: hisilicon: hi3660-hikey960: Allow USR4 LED to notify kernel panic
On Mon, Oct 23, 2017 at 12:43 PM, Amit Kucheria wrote: > On Thu, Oct 19, 2017 at 5:30 PM, Guodong Xu wrote: >> >> >> On Thu, Oct 19, 2017 at 4:57 AM, Amit Kucheria >> wrote: >>> >>> Blink the LED on a kernel panic. >>> >>> Signed-off-by: Amit Kucheria >>> --- >>> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> index fd4705c..febbcb5 100644 >>> --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> @@ -108,6 +108,7 @@ >>> label = "user_led4"; >>> /* gpio_190_user_led4 */ >>> gpios = <&gpio23 6 0>; >>> + panic-indicator; >> >> >> Looks good to me. > > Can I take that as an Ack? How about the Hikey960 patch? > Acked-by: Guodong Xu -Guodong >> >> >>> >>> linux,default-trigger = "cpu0"; >>> }; >>> >>> -- >>> 2.7.4 >>> >>
[PATCH v3 10/10] arm64: dts: hi3660: enable watchdog
From: Leo Yan
This patch is to add watchdog binding for Hi3660 on Hikey960 board.
Cc: Guodong Xu
Cc: Zhong Kaihua
Signed-off-by: Leo Yan
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 545d435..b7a90d6 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -962,5 +962,21 @@
&sdio_cfg_func>;
status = "disabled";
};
+
+ watchdog0: watchdog@e8a06000 {
+ compatible = "arm,sp805-wdt", "arm,primecell";
+ reg = <0x0 0xe8a06000 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_OSC32K>;
+ clock-names = "apb_pclk";
+ };
+
+ watchdog1: watchdog@e8a07000 {
+ compatible = "arm,sp805-wdt", "arm,primecell";
+ reg = <0x0 0xe8a07000 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_OSC32K>;
+ clock-names = "apb_pclk";
+ };
};
};
--
2.10.2
[PATCH v3 08/10] arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps
Update bluetooth UART max-speed to 3Mbps
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 7770ec7..fd4705c 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -230,7 +230,7 @@
bluetooth {
compatible = "ti,wl1837-st";
enable-gpios = <&gpio15 6 GPIO_ACTIVE_HIGH>;
- max-speed = <921600>;
+ max-speed = <300>;
};
};
--
2.10.2
[PATCH v3 09/10] arm64: dts: hi3660: add bindings for DMA
From: Wang Ruyi
Add bindings for DMA.
Signed-off-by: Wang Ruyi
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 41841f7..545d435 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -436,6 +436,19 @@
status = "disabled";
};
+ dma0: dma@fdf3 {
+ compatible = "hisilicon,k3-dma-1.0";
+ reg = <0x0 0xfdf3 0x0 0x1000>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ dma-requests = <32>;
+ dma-min-chan = <1>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_DMAC>;
+ dma-no-cci;
+ dma-type = "hi3660_dma";
+ };
+
rtc0: rtc@fff04000 {
compatible = "arm,pl031", "arm,primecell";
reg = <0x0 0Xfff04000 0x0 0x1000>;
--
2.10.2
[PATCH v3 04/10] arm64: dts: hikey960: Add optee node
From: Victor Chong
This patch adds op-tee node for hikey960
Signed-off-by: Victor Chong
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 6609b0f..b96d865 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -159,6 +159,13 @@
startup-delay-us = <7>;
enable-active-high;
};
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
};
&i2c0 {
--
2.10.2
[PATCH v3 05/10] arm64: dts: hikey960: Add support for syscon-reboot-mode
Add support to hikey960 dts for the syscon-reboot-mode driver.
Cc: John Stultz
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index b96d865..ce5e874 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -39,6 +39,20 @@
reg = <0x0 0x0 0x0 0x0>;
};
+ reboot-mode-syscon@3210 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x0 0x3210 0x0 0x1000>;
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x0>;
+
+ mode-normal = <0x77665501>;
+ mode-bootloader = <0x77665500>;
+ mode-recovery = <0x77665502>;
+ };
+ };
+
keys {
compatible = "gpio-keys";
pinctrl-names = "default";
--
2.10.2
[PATCH v3 07/10] arm64: dts: hi3660: Reset the mmc hosts
Add reset-names = "reset" into mmc nodes. Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 5fd5686..41841f7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -909,6 +909,7 @@ clock-names = "ciu", "biu"; clock-frequency = <320>; resets = <&crg_rst 0x94 18>; + reset-names = "reset"; cd-gpios = <&gpio25 3 0>; hisilicon,peripheral-syscon = <&sctrl>; pinctrl-names = "default"; @@ -938,6 +939,7 @@ <&crg_ctrl HI3660_HCLK_GATE_SDIO0>; clock-names = "ciu", "biu"; resets = <&crg_rst 0x94 20>; + reset-names = "reset"; card-detect-delay = <200>; supports-highspeed; keep-power-in-suspend; -- 2.10.2
[PATCH v3 06/10] arm64: dts: hikey960: Add pstore support
This patch reserves some memory in the DTS and sets up a
pstore device tree node to enable pstore support on HiKey960.
Cc: John Stultz
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index ce5e874..7770ec7 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -39,6 +39,20 @@
reg = <0x0 0x0 0x0 0x0>;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ramoops@3200 {
+ compatible = "ramoops";
+ reg = <0x0 0x3200 0x0 0x0010>;
+ record-size = <0x0002>;
+ console-size= <0x0002>;
+ ftrace-size = <0x0002>;
+ };
+ };
+
reboot-mode-syscon@3210 {
compatible = "syscon", "simple-mfd";
reg = <0x0 0x3210 0x0 0x1000>;
--
2.10.2
[PATCH v3 01/10] arm64: dts: hi3660: enable idle states
From: Leo Yan
There are two clusters on the Hi3660, the first one is Cortex-A53 based
and the other one is Cortex-A73 based. These two clusters have different
idle states.
Thanks to Daniel Lezcano's recent changes, the generic ARM cpuidle
driver can now support several clusters with different idle states, thus
supporting the big.Little architecture.
In addition to the WFI idle state which is the default shallowest state
for all ARM cpus, the Hi3660 supports the following states:
- CA53 CPUs:
- CPU_SLEEP: CPU power off state
- CLUSTER_SLEEP_0: Cluster power off state
- CA73 CPUs:
- CPU_NAP: CPU retention state
- CPU_SLEEP: CPU power off state
- CLUSTER_SLEEP_1: Cluster power off state
This patch adds the idle states description for the Hi3660 to the device
tree.
Cc: Kevin Wang
Signed-off-by: Leo Yan
Acked-by: Daniel Lezcano
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 63 +++
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index c6a1961..8921310 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -58,6 +58,7 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu1: cpu@1 {
@@ -65,6 +66,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu2: cpu@2 {
@@ -72,6 +74,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu3: cpu@3 {
@@ -79,6 +82,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu4: cpu@100 {
@@ -86,6 +90,11 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu5: cpu@101 {
@@ -93,6 +102,11 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu6: cpu@102 {
@@ -100,6 +114,11 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu7: cpu@103 {
@@ -107,6 +126,50 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ CPU_NAP: cpu-nap {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x001>;
+ entry-latency-us = <7>;
+ exit-latency-us = <2>;
+ min-residency-us = <15>;
+ };
+
+ CPU_SLEEP: cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x001>;
+ entry-latency-us = <40>;
+ exit-latency-us = <70>;
+ min-residency-us = <3000>;
+ };
+
+ CLUSTER_SLEEP_0:
[PATCH v3 02/10] arm64: dts: hi3660: add L2 cache topology
From: Leo Yan
This patch adds the L2 cache topology on 96boards Hikey960.
Signed-off-by: Leo Yan
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8921310..1cdd03b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -58,6 +58,7 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -66,6 +67,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -74,6 +76,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -82,6 +85,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -90,6 +94,7 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -102,6 +107,7 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -114,6 +120,7 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -126,6 +133,7 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -171,6 +179,14 @@
min-residency-us = <2>;
};
};
+
+ A53_L2: l2-cache0 {
+ compatible = "cache";
+ };
+
+ A73_L2: l2-cache1 {
+ compatible = "cache";
+ };
};
gic: interrupt-controller@e82b {
--
2.10.2
[PATCH v3 03/10] arm64: dts: hi3660: add pmu dt node for hi3660
From: YiPing Xu
Add pmu dt node for hi3660
Signed-off-by: YiPing Xu
Signed-off-by: Zhong Kaihua
Signed-off-by: Leo Yan
Tested-by: Jumana Mundichipparakkal
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 1cdd03b..5fd5686 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -202,6 +202,26 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+;
+ interrupt-affinity = <&cpu0>,
+<&cpu1>,
+<&cpu2>,
+<&cpu3>,
+<&cpu4>,
+<&cpu5>,
+<&cpu6>,
+<&cpu7>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
--
2.10.2
[PATCH v3 00/10] arm64: dts: hi3660: add more device nodes
This patchset adds more device nodes for hi3660 and hikey960, including: - cpu idle states - L2 cache - PMU - OP-TEE - reboot - pstore - DMA - watchdog Patch 7 fixes an issue in mmc nodes, by adding 'reset' Patch 8 change bluetooth uart max-speed to 3Mbps HiKey960 is one of 96boards. For details information about it, please refer to [1]. === Major changes in v3: - update commit message of patch 1, as suggested by Daniel Lezcano - add patch 10 for watchdog bindings Major changes in v2: - add patch 8 to change bluetooth uart max-speed to 3Mbps - add patch 9 for DMA node. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 Guodong Xu (4): arm64: dts: hikey960: Add support for syscon-reboot-mode arm64: dts: hikey960: Add pstore support arm64: dts: hi3660: Reset the mmc hosts arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps Leo Yan (3): arm64: dts: hi3660: enable idle states arm64: dts: hi3660: add L2 cache topology arm64: dts: hi3660: enable watchdog Victor Chong (1): arm64: dts: hikey960: Add optee node Wang Ruyi (1): arm64: dts: hi3660: add bindings for DMA YiPing Xu (1): arm64: dts: hi3660: add pmu dt node for hi3660 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 37 +- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 130 ++ 2 files changed, 166 insertions(+), 1 deletion(-) -- 2.10.2
[PATCH v2 2/6] arm64: defconfig: enable support hi6421v530 PMIC
Enable configs for hi6421v530 mfd and regulator driver + CONFIG_MFD_HI6421_PMIC=y + CONFIG_REGULATOR_HI6421V530=y Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 4e14c6d..d752beb 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -317,6 +317,7 @@ CONFIG_MFD_CROS_EC=y CONFIG_MFD_CROS_EC_I2C=y CONFIG_MFD_CROS_EC_SPI=y CONFIG_MFD_EXYNOS_LPASS=m +CONFIG_MFD_HI6421_PMIC=y CONFIG_MFD_HI655X_PMIC=y CONFIG_MFD_MAX77620=y CONFIG_MFD_SPMI_PMIC=y @@ -325,6 +326,7 @@ CONFIG_MFD_SEC_CORE=y CONFIG_REGULATOR_FAN53555=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_HI6421V530=y CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_PWM=y -- 2.10.2
[PATCH v2 4/6] arm64: defconfig: enable support for serial port connected device
This patch enables these configs: +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y As example, a bluetooth device connected to UART port can be supported by this. Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index f7081056..99f7e06 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -251,6 +251,8 @@ CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y CONFIG_SERIAL_MVEBU_UART=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y CONFIG_VIRTIO_CONSOLE=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y -- 2.10.2
[PATCH v2 1/6] arm64: defconfig: enable Kirin PCIe
From: Xiaowei Song Enable HiSilicon Kirin series SoCs PCIe controllers Signed-off-by: Guodong Xu Signed-off-by: Xiaowei Song --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b4ca115..4e14c6d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -68,6 +68,7 @@ CONFIG_HOTPLUG_PCI_ACPI=y CONFIG_PCI_LAYERSCAPE=y CONFIG_PCI_HISI=y CONFIG_PCIE_QCOM=y +CONFIG_PCIE_KIRIN=y CONFIG_PCIE_ARMADA_8K=y CONFIG_PCI_AARDVARK=y CONFIG_PCIE_RCAR=y -- 2.10.2
[PATCH v2 6/6] arm64: defconfig: enable DMA driver for hi3660
From: Wang Ruyi enable DMA driver for hi3660. Signed-off-by: Wang Ruyi --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 81008e1..ab085d0 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -457,6 +457,7 @@ CONFIG_RTC_DRV_TEGRA=y CONFIG_RTC_DRV_XGENE=y CONFIG_DMADEVICES=y CONFIG_DMA_BCM2835=m +CONFIG_K3_DMA=y CONFIG_MV_XOR_V2=y CONFIG_PL330_DMA=y CONFIG_TEGRA20_APB_DMA=y -- 2.10.2
[PATCH v2 5/6] arm64: defconfig: enable OP-TEE
From: Victor Chong This patch enables configs for Trusted Execution Environment (TEE) and OP-TEE. +CONFIG_TEE=y +CONFIG_OPTEE=y Signed-off-by: Victor Chong Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 99f7e06..81008e1 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -521,6 +521,8 @@ CONFIG_PHY_XGENE=y CONFIG_PHY_TEGRA_XUSB=y CONFIG_QCOM_L2_PMU=y CONFIG_QCOM_L3_PMU=y +CONFIG_TEE=y +CONFIG_OPTEE=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_EFI_CAPSULE_LOADER=y -- 2.10.2
[PATCH v2 3/6] arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE
Enable CONFIG_SYSCON_REBOOT_MODE Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d752beb..f7081056 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -298,6 +298,7 @@ CONFIG_GPIO_MAX77620=y CONFIG_POWER_RESET_MSM=y CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_SYSCON=y +CONFIG_SYSCON_REBOOT_MODE=y CONFIG_BATTERY_BQ27XXX=y CONFIG_SENSORS_ARM_SCPI=y CONFIG_SENSORS_LM90=m -- 2.10.2
[PATCH v2 0/6] arm64: defconfig: enable configs for HiKey960
This patchset enables config items in arm64/defconfig for HiKey960. All of them correspond to real functions on HiKey960. Including: - Kirin PCIe - PMIC support, hi6421v530 - syscon reboot mode - serdev bus - OP-TEE - K3 DMA HiKey960 is one of 96boards. For details information about it, please refer to [1]. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 === Major changes in v2: - Add patch 6 to enable K3 DMA Guodong Xu (3): arm64: defconfig: enable support hi6421v530 PMIC arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE arm64: defconfig: enable support for serial port connected device Victor Chong (1): arm64: defconfig: enable OP-TEE Wang Ruyi (1): arm64: defconfig: enable DMA driver for hi3660 Xiaowei Song (1): arm64: defconfig: enable Kirin PCIe arch/arm64/configs/defconfig | 9 + 1 file changed, 9 insertions(+) -- 2.10.2
[PATCH v2 3/9] arm64: dts: hi3660: add pmu dt node for hi3660
From: YiPing Xu
Add pmu dt node for hi3660
Signed-off-by: YiPing Xu
Signed-off-by: Zhong Kaihua
Signed-off-by: Leo Yan
Tested-by: Jumana Mundichipparakkal
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 1cdd03b..5fd5686 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -202,6 +202,26 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+;
+ interrupt-affinity = <&cpu0>,
+<&cpu1>,
+<&cpu2>,
+<&cpu3>,
+<&cpu4>,
+<&cpu5>,
+<&cpu6>,
+<&cpu7>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
--
2.10.2
[PATCH v2 4/9] arm64: dts: hikey960: Add optee node
From: Victor Chong
This patch adds op-tee node for hikey960
Signed-off-by: Victor Chong
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 6609b0f..b96d865 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -159,6 +159,13 @@
startup-delay-us = <7>;
enable-active-high;
};
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
};
&i2c0 {
--
2.10.2
[PATCH v2 9/9] arm64: dts: hi3660: add bindings for DMA
From: Wang Ruyi
Add bindings for DMA.
Signed-off-by: Wang Ruyi
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 41841f7..545d435 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -436,6 +436,19 @@
status = "disabled";
};
+ dma0: dma@fdf3 {
+ compatible = "hisilicon,k3-dma-1.0";
+ reg = <0x0 0xfdf3 0x0 0x1000>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ dma-requests = <32>;
+ dma-min-chan = <1>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_DMAC>;
+ dma-no-cci;
+ dma-type = "hi3660_dma";
+ };
+
rtc0: rtc@fff04000 {
compatible = "arm,pl031", "arm,primecell";
reg = <0x0 0Xfff04000 0x0 0x1000>;
--
2.10.2
[PATCH v2 5/9] arm64: dts: hikey960: Add support for syscon-reboot-mode
Add support to hikey960 dts for the syscon-reboot-mode driver.
Cc: John Stultz
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index b96d865..ce5e874 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -39,6 +39,20 @@
reg = <0x0 0x0 0x0 0x0>;
};
+ reboot-mode-syscon@3210 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x0 0x3210 0x0 0x1000>;
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x0>;
+
+ mode-normal = <0x77665501>;
+ mode-bootloader = <0x77665500>;
+ mode-recovery = <0x77665502>;
+ };
+ };
+
keys {
compatible = "gpio-keys";
pinctrl-names = "default";
--
2.10.2
[PATCH v2 8/9] arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps
Update bluetooth UART max-speed to 3Mbps
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 7770ec7..fd4705c 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -230,7 +230,7 @@
bluetooth {
compatible = "ti,wl1837-st";
enable-gpios = <&gpio15 6 GPIO_ACTIVE_HIGH>;
- max-speed = <921600>;
+ max-speed = <300>;
};
};
--
2.10.2
[PATCH v2 6/9] arm64: dts: hikey960: Add pstore support
This patch reserves some memory in the DTS and sets up a
pstore device tree node to enable pstore support on HiKey960.
Cc: John Stultz
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index ce5e874..7770ec7 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -39,6 +39,20 @@
reg = <0x0 0x0 0x0 0x0>;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ramoops@3200 {
+ compatible = "ramoops";
+ reg = <0x0 0x3200 0x0 0x0010>;
+ record-size = <0x0002>;
+ console-size= <0x0002>;
+ ftrace-size = <0x0002>;
+ };
+ };
+
reboot-mode-syscon@3210 {
compatible = "syscon", "simple-mfd";
reg = <0x0 0x3210 0x0 0x1000>;
--
2.10.2
[PATCH v2 7/9] arm64: dts: hi3660: Reset the mmc hosts
Add reset-names = "reset" into mmc nodes. Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 5fd5686..41841f7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -909,6 +909,7 @@ clock-names = "ciu", "biu"; clock-frequency = <320>; resets = <&crg_rst 0x94 18>; + reset-names = "reset"; cd-gpios = <&gpio25 3 0>; hisilicon,peripheral-syscon = <&sctrl>; pinctrl-names = "default"; @@ -938,6 +939,7 @@ <&crg_ctrl HI3660_HCLK_GATE_SDIO0>; clock-names = "ciu", "biu"; resets = <&crg_rst 0x94 20>; + reset-names = "reset"; card-detect-delay = <200>; supports-highspeed; keep-power-in-suspend; -- 2.10.2
[PATCH v2 2/9] arm64: dts: hi3660: add L2 cache topology
From: Leo Yan
This patch adds the L2 cache topology on 96boards Hikey960.
Signed-off-by: Leo Yan
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8921310..1cdd03b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -58,6 +58,7 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -66,6 +67,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -74,6 +76,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -82,6 +85,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -90,6 +94,7 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -102,6 +107,7 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -114,6 +120,7 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -126,6 +133,7 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -171,6 +179,14 @@
min-residency-us = <2>;
};
};
+
+ A53_L2: l2-cache0 {
+ compatible = "cache";
+ };
+
+ A73_L2: l2-cache1 {
+ compatible = "cache";
+ };
};
gic: interrupt-controller@e82b {
--
2.10.2
[PATCH v2 1/9] arm64: dts: hi3660: enable idle states
From: Leo Yan
On Hi3660 there have two clusters, one is CA53 cluster and another is
CA73 cluster. This two clusters have different idle states separately.
With Daniel Lezcano's patch (ARM: cpuidle: Support asymmetric idle
definition), now ARM idle driver can support different clusters with
different idle states.
Base on this, this patch is to bind two clusters idle states on Hi3660.
Except the "WFI" states are enabled by default for all CPUs, this patch
also binds below extra idle states:
- CA53 CPUs have two more states:
CPU_SLEEP: CPU power off state
CLUSTER_SLEEP_0: Cluster power off state
- CA73 CPUs have three more states:
CPU_NAP: CPU retention state
CPU_SLEEP: CPU power off state
CLUSTER_SLEEP_1: Cluster power off state
Cc: Daniel Lezcano
Cc: Kevin Wang
Signed-off-by: Leo Yan
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 63 +++
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index c6a1961..8921310 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -58,6 +58,7 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu1: cpu@1 {
@@ -65,6 +66,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu2: cpu@2 {
@@ -72,6 +74,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu3: cpu@3 {
@@ -79,6 +82,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu4: cpu@100 {
@@ -86,6 +90,11 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu5: cpu@101 {
@@ -93,6 +102,11 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu6: cpu@102 {
@@ -100,6 +114,11 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu7: cpu@103 {
@@ -107,6 +126,50 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ CPU_NAP: cpu-nap {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x001>;
+ entry-latency-us = <7>;
+ exit-latency-us = <2>;
+ min-residency-us = <15>;
+ };
+
+ CPU_SLEEP: cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x001>;
+ entry-latency-us = <40>;
+ exit-latency-us = <70>;
+ min-residency-us = <3000>;
+ };
+
+ CLUSTER_SLEEP_0: cluster-sleep-0 {
+ compatible = "arm,idle-s
[PATCH v2 0/9] arm64: dts: hi3660: add more device nodes
This patchset adds more device nodes for hi3660 and hikey960, including: - cpu idle states - L2 cache - PMU - OP-TEE - reboot - pstore - DMA Patch 7 fixes an issue in mmc nodes, by adding 'reset' Patch 8 change bluetooth uart max-speed to 3Mbps HiKey960 is one of 96boards. For details information about it, please refer to [1]. === Major changes in v2: - add patch 8 to change bluetooth uart max-speed to 3Mbps - add patch 9 for DMA node. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 Guodong Xu (4): arm64: dts: hikey960: Add support for syscon-reboot-mode arm64: dts: hikey960: Add pstore support arm64: dts: hi3660: Reset the mmc hosts arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps Leo Yan (2): arm64: dts: hi3660: enable idle states arm64: dts: hi3660: add L2 cache topology Victor Chong (1): arm64: dts: hikey960: Add optee node Wang Ruyi (1): arm64: dts: hi3660: add bindings for DMA YiPing Xu (1): arm64: dts: hi3660: add pmu dt node for hi3660 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 37 ++- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 114 ++ 2 files changed, 150 insertions(+), 1 deletion(-) -- 2.10.2
[PATCH] clk: hi3660: fix incorrect uart3 clock freqency
From: Zhong Kaihua
UART3 clock rate is doubled in previous commit.
This error is not detected until recently a mezzanine board which makes
real use of uart3 port (through LS connector of 96boards) was setup
and tested on hi3660-hikey960 board.
This patch changes clock source rate of clk_factor_uart3 to 1.
Signed-off-by: Zhong Kaihua
Signed-off-by: Guodong Xu
---
drivers/clk/hisilicon/clk-hi3660.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/hisilicon/clk-hi3660.c
b/drivers/clk/hisilicon/clk-hi3660.c
index a18258e..f404199 100644
--- a/drivers/clk/hisilicon/clk-hi3660.c
+++ b/drivers/clk/hisilicon/clk-hi3660.c
@@ -34,7 +34,7 @@ static const struct hisi_fixed_rate_clock
hi3660_fixed_rate_clks[] = {
/* crgctrl */
static const struct hisi_fixed_factor_clock hi3660_crg_fixed_factor_clks[] = {
- { HI3660_FACTOR_UART3, "clk_factor_uart3", "iomcu_peri0", 1, 8, 0, },
+ { HI3660_FACTOR_UART3, "clk_factor_uart3", "iomcu_peri0", 1, 16, 0, },
{ HI3660_CLK_FACTOR_MMC, "clk_factor_mmc", "clkin_sys", 1, 6, 0, },
{ HI3660_CLK_GATE_I2C0, "clk_gate_i2c0", "clk_i2c0_iomcu", 1, 4, 0, },
{ HI3660_CLK_GATE_I2C1, "clk_gate_i2c1", "clk_i2c1_iomcu", 1, 4, 0, },
--
2.10.2
[PATCH 5/5] arm64: defconfig: enable OP-TEE
From: Victor Chong This patch enables configs for Trusted Execution Environment (TEE) and OP-TEE. +CONFIG_TEE=y +CONFIG_OPTEE=y Signed-off-by: Victor Chong Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 99f7e06..81008e1 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -521,6 +521,8 @@ CONFIG_PHY_XGENE=y CONFIG_PHY_TEGRA_XUSB=y CONFIG_QCOM_L2_PMU=y CONFIG_QCOM_L3_PMU=y +CONFIG_TEE=y +CONFIG_OPTEE=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_EFI_CAPSULE_LOADER=y -- 2.10.2
[PATCH 3/5] arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE
Enable CONFIG_SYSCON_REBOOT_MODE Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d752beb..f7081056 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -298,6 +298,7 @@ CONFIG_GPIO_MAX77620=y CONFIG_POWER_RESET_MSM=y CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_SYSCON=y +CONFIG_SYSCON_REBOOT_MODE=y CONFIG_BATTERY_BQ27XXX=y CONFIG_SENSORS_ARM_SCPI=y CONFIG_SENSORS_LM90=m -- 2.10.2
[PATCH 4/5] arm64: defconfig: enable support for serial port connected device
This patch enables these configs: +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y As example, a bluetooth device connected to UART port can be supported by this. Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index f7081056..99f7e06 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -251,6 +251,8 @@ CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y CONFIG_SERIAL_MVEBU_UART=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y CONFIG_VIRTIO_CONSOLE=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y -- 2.10.2
[PATCH 2/5] arm64: defconfig: enable support hi6421v530 PMIC
Enable configs for hi6421v530 mfd and regulator driver + CONFIG_MFD_HI6421_PMIC=y + CONFIG_REGULATOR_HI6421V530=y Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 4e14c6d..d752beb 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -317,6 +317,7 @@ CONFIG_MFD_CROS_EC=y CONFIG_MFD_CROS_EC_I2C=y CONFIG_MFD_CROS_EC_SPI=y CONFIG_MFD_EXYNOS_LPASS=m +CONFIG_MFD_HI6421_PMIC=y CONFIG_MFD_HI655X_PMIC=y CONFIG_MFD_MAX77620=y CONFIG_MFD_SPMI_PMIC=y @@ -325,6 +326,7 @@ CONFIG_MFD_SEC_CORE=y CONFIG_REGULATOR_FAN53555=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_HI6421V530=y CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_PWM=y -- 2.10.2
[PATCH 1/5] arm64: defconfig: enable Kirin PCIe
From: Xiaowei Song Enable HiSilicon Kirin series SoCs PCIe controllers Signed-off-by: Guodong Xu Signed-off-by: Xiaowei Song --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b4ca115..4e14c6d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -68,6 +68,7 @@ CONFIG_HOTPLUG_PCI_ACPI=y CONFIG_PCI_LAYERSCAPE=y CONFIG_PCI_HISI=y CONFIG_PCIE_QCOM=y +CONFIG_PCIE_KIRIN=y CONFIG_PCIE_ARMADA_8K=y CONFIG_PCI_AARDVARK=y CONFIG_PCIE_RCAR=y -- 2.10.2
[PATCH 0/5] arm64: defconfig: enable configs for HiKey960
This patchset enables config items in arm64/defconfig for HiKey960. All of them correspond to real functions on HiKey960. Including: - Kirin PCIe - PMIC support, hi6421v530 - syscon reboot mode - serdev bus - OP-TEE HiKey960 is one of 96boards. For details information about it, please refer to [1]. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 Guodong Xu (3): arm64: defconfig: enable support hi6421v530 PMIC arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE arm64: defconfig: enable support for serial port connected device Victor Chong (1): arm64: defconfig: enable OP-TEE Xiaowei Song (1): arm64: defconfig: enable Kirin PCIe arch/arm64/configs/defconfig | 8 1 file changed, 8 insertions(+) -- 2.10.2
[PATCH 2/7] arm64: dts: hi3660: add L2 cache topology
From: Leo Yan
This patch adds the L2 cache topology on 96boards Hikey960.
Signed-off-by: Leo Yan
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8921310..1cdd03b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -58,6 +58,7 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -66,6 +67,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -74,6 +76,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -82,6 +85,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -90,6 +94,7 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -102,6 +107,7 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -114,6 +120,7 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -126,6 +133,7 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -171,6 +179,14 @@
min-residency-us = <2>;
};
};
+
+ A53_L2: l2-cache0 {
+ compatible = "cache";
+ };
+
+ A73_L2: l2-cache1 {
+ compatible = "cache";
+ };
};
gic: interrupt-controller@e82b {
--
2.10.2
[PATCH 6/7] arm64: dts: hikey960: Add pstore support
This patch reserves some memory in the DTS and sets up a
pstore device tree node to enable pstore support on HiKey960.
Cc: John Stultz
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index ce5e874..7770ec7 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -39,6 +39,20 @@
reg = <0x0 0x0 0x0 0x0>;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ramoops@3200 {
+ compatible = "ramoops";
+ reg = <0x0 0x3200 0x0 0x0010>;
+ record-size = <0x0002>;
+ console-size= <0x0002>;
+ ftrace-size = <0x0002>;
+ };
+ };
+
reboot-mode-syscon@3210 {
compatible = "syscon", "simple-mfd";
reg = <0x0 0x3210 0x0 0x1000>;
--
2.10.2
[PATCH 5/7] arm64: dts: hikey960: Add support for syscon-reboot-mode
Add support to hikey960 dts for the syscon-reboot-mode driver.
Cc: John Stultz
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index b96d865..ce5e874 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -39,6 +39,20 @@
reg = <0x0 0x0 0x0 0x0>;
};
+ reboot-mode-syscon@3210 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x0 0x3210 0x0 0x1000>;
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x0>;
+
+ mode-normal = <0x77665501>;
+ mode-bootloader = <0x77665500>;
+ mode-recovery = <0x77665502>;
+ };
+ };
+
keys {
compatible = "gpio-keys";
pinctrl-names = "default";
--
2.10.2
[PATCH 3/7] arm64: dts: hi3660: add pmu dt node for hi3660
From: YiPing Xu
Add pmu dt node for hi3660
Signed-off-by: YiPing Xu
Signed-off-by: Zhong Kaihua
Signed-off-by: Leo Yan
Tested-by: Jumana Mundichipparakkal
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 1cdd03b..5fd5686 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -202,6 +202,26 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+;
+ interrupt-affinity = <&cpu0>,
+<&cpu1>,
+<&cpu2>,
+<&cpu3>,
+<&cpu4>,
+<&cpu5>,
+<&cpu6>,
+<&cpu7>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
--
2.10.2
[PATCH 1/7] arm64: dts: hi3660: enable idle states
From: Leo Yan
On Hi3660 there have two clusters, one is CA53 cluster and another is
CA73 cluster. This two clusters have different idle states separately.
With Daniel Lezcano's patch (ARM: cpuidle: Support asymmetric idle
definition), now ARM idle driver can support different clusters with
different idle states.
Base on this, this patch is to bind two clusters idle states on Hi3660.
Except the "WFI" states are enabled by default for all CPUs, this patch
also binds below extra idle states:
- CA53 CPUs have two more states:
CPU_SLEEP: CPU power off state
CLUSTER_SLEEP_0: Cluster power off state
- CA73 CPUs have three more states:
CPU_NAP: CPU retention state
CPU_SLEEP: CPU power off state
CLUSTER_SLEEP_1: Cluster power off state
Cc: Daniel Lezcano
Cc: Kevin Wang
Signed-off-by: Leo Yan
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 63 +++
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index c6a1961..8921310 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -58,6 +58,7 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu1: cpu@1 {
@@ -65,6 +66,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu2: cpu@2 {
@@ -72,6 +74,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu3: cpu@3 {
@@ -79,6 +82,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu4: cpu@100 {
@@ -86,6 +90,11 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu5: cpu@101 {
@@ -93,6 +102,11 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu6: cpu@102 {
@@ -100,6 +114,11 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu7: cpu@103 {
@@ -107,6 +126,50 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ CPU_NAP: cpu-nap {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x001>;
+ entry-latency-us = <7>;
+ exit-latency-us = <2>;
+ min-residency-us = <15>;
+ };
+
+ CPU_SLEEP: cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x001>;
+ entry-latency-us = <40>;
+ exit-latency-us = <70>;
+ min-residency-us = <3000>;
+ };
+
+ CLUSTER_SLEEP_0: cluster-sleep-0 {
+ compatible = "arm,idle-s
[PATCH 7/7] arm64: dts: hi3660: Reset the mmc hosts
Add reset-names = "reset" into mmc nodes. Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 5fd5686..41841f7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -909,6 +909,7 @@ clock-names = "ciu", "biu"; clock-frequency = <320>; resets = <&crg_rst 0x94 18>; + reset-names = "reset"; cd-gpios = <&gpio25 3 0>; hisilicon,peripheral-syscon = <&sctrl>; pinctrl-names = "default"; @@ -938,6 +939,7 @@ <&crg_ctrl HI3660_HCLK_GATE_SDIO0>; clock-names = "ciu", "biu"; resets = <&crg_rst 0x94 20>; + reset-names = "reset"; card-detect-delay = <200>; supports-highspeed; keep-power-in-suspend; -- 2.10.2
[PATCH 4/7] arm64: dts: hikey960: Add optee node
From: Victor Chong
This patch adds op-tee node for hikey960
Signed-off-by: Victor Chong
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 6609b0f..b96d865 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -159,6 +159,13 @@
startup-delay-us = <7>;
enable-active-high;
};
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
};
&i2c0 {
--
2.10.2
[PATCH 0/7] arm64: dts: hi3660: add more device nodes
This patchset adds more device nodes for hi3660 and hikey960, including: - cpu idle states - L2 cache - PMU - OP-TEE - reboot - pstore Patch 7 fixes an issue in mmc nodes, by adding 'reset' HiKey960 is one of 96boards. For details information about it, please refer to [1]. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 Guodong Xu (3): arm64: dts: hikey960: Add support for syscon-reboot-mode arm64: dts: hikey960: Add pstore support arm64: dts: hi3660: Reset the mmc hosts Leo Yan (2): arm64: dts: hi3660: enable idle states arm64: dts: hi3660: add L2 cache topology Victor Chong (1): arm64: dts: hikey960: Add optee node YiPing Xu (1): arm64: dts: hi3660: add pmu dt node for hi3660 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 35 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 101 ++ 2 files changed, 136 insertions(+) -- 2.10.2
[PATCH v7 0/3] MFD: add driver for HiSilicon Hi6421v530 PMIC
This patchset adds driver for HiSilicon Hi6421v530 PMIC. Mainline kernel already has driver support to a similar chip, Hi6421. Hi6421 and Hi6421v530 are both from the same vendor, HiSilicon, but they are at different revisions. They both use the same Memory-mapped I/O method to communicate with Main SoC. However, they differ quite a lot in their regulator designs. Eg. they have completely different LDO voltage points. Patch 1 and 2 are hi6421-pmic cleaning up. Patch 3 extends hi6421-pmic-core.c to support Hi6421v530 revision. Major changes in v7: - rebase to v4.13-rc1 and resend MFD driver patches. - As of v6, DTS and regulator parts have been merged into v4.13-rc1. So they are not included in v7. Major changes in v6: - Patch 5, solve review comments from Mark Brown, add hi6421v530 regulator driver to module device table. - Add Acked-by from Arnd Bergmann Major changes in v5: - Patch 3, solve review comments from Lee Johes Major changes in v4: - put hi6421-pmic cleanup in separate patches. - solve review comments from Lee Johes. - regulator-name should not have '/' character. Otherwise it "Failed to create debugfs directory" Major changes in v3: - in hi6421-pmic-core.c * use shorter license script. * arrange #include in alphabetical order. * using recommended error log messages from Lee Jones. - in hi6421v530-regulator.c * remove unused #include files * arrange remaining ones in alphabetical order. Major changes in v2: - instead of writing a new driver, extend hi6421-pmic-core.c to support its v530 revision - update hi6421v530-regulator.c to use modern regulator driver design logics. *** BLURB HERE *** Guodong Xu (3): mfd: hi6421-pmic: cleanup: change license text to shorter form mfd: hi6421-pmic: cleanup: update dev_err messages mfd: hi6421-pmic: add support for HiSilicon Hi6421v530 drivers/mfd/hi6421-pmic-core.c | 89 ++--- include/linux/mfd/hi6421-pmic.h | 5 +++ 2 files changed, 62 insertions(+), 32 deletions(-) -- 2.10.2
[PATCH v7 1/3] mfd: hi6421-pmic: cleanup: change license text to shorter form
Change license text to a shorter form of GPLv2. Signed-off-by: Guodong Xu Acked-by: Arnd Bergmann --- drivers/mfd/hi6421-pmic-core.c | 13 ++--- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/mfd/hi6421-pmic-core.c b/drivers/mfd/hi6421-pmic-core.c index 3fd703f..ad9e3d8 100644 --- a/drivers/mfd/hi6421-pmic-core.c +++ b/drivers/mfd/hi6421-pmic-core.c @@ -9,17 +9,8 @@ * Author: Guodong Xu * * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. */ #include -- 2.10.2
[PATCH v7 2/3] mfd: hi6421-pmic: cleanup: update dev_err messages
Update dev_err messages to make them more readable.
Signed-off-by: Guodong Xu
Acked-by: Arnd Bergmann
---
drivers/mfd/hi6421-pmic-core.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mfd/hi6421-pmic-core.c b/drivers/mfd/hi6421-pmic-core.c
index ad9e3d8..b1139d4 100644
--- a/drivers/mfd/hi6421-pmic-core.c
+++ b/drivers/mfd/hi6421-pmic-core.c
@@ -52,8 +52,8 @@ static int hi6421_pmic_probe(struct platform_device *pdev)
pmic->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
&hi6421_regmap_config);
if (IS_ERR(pmic->regmap)) {
- dev_err(&pdev->dev,
- "regmap init failed: %ld\n", PTR_ERR(pmic->regmap));
+ dev_err(&pdev->dev, "Failed to initialise Regmap: %ld\n",
+ PTR_ERR(pmic->regmap));
return PTR_ERR(pmic->regmap);
}
@@ -70,7 +70,7 @@ static int hi6421_pmic_probe(struct platform_device *pdev)
ret = devm_mfd_add_devices(&pdev->dev, 0, hi6421_devs,
ARRAY_SIZE(hi6421_devs), NULL, 0, NULL);
if (ret) {
- dev_err(&pdev->dev, "add mfd devices failed: %d\n", ret);
+ dev_err(&pdev->dev, "Failed to add child devices: %d\n", ret);
return ret;
}
--
2.10.2
[PATCH v7 3/3] mfd: hi6421-pmic: add support for HiSilicon Hi6421v530
Add support for HiSilicon Hi6421v530 PMIC. Hi6421v530 communicates with
main SoC via memory-mapped I/O.
Hi6421v530 and Hi6421 are PMIC chips from the same vendor, HiSilicon,
but at different revisions. They share the same memory-mapped I/O
design. They differ in integrated devices, such as regulator details,
LDO voltage points.
Signed-off-by: Wang Xiaoyin
Signed-off-by: Guodong Xu
Acked-by: Arnd Bergmann
---
drivers/mfd/hi6421-pmic-core.c | 70 ++---
include/linux/mfd/hi6421-pmic.h | 5 +++
2 files changed, 57 insertions(+), 18 deletions(-)
diff --git a/drivers/mfd/hi6421-pmic-core.c b/drivers/mfd/hi6421-pmic-core.c
index b1139d4..6fb7ba2 100644
--- a/drivers/mfd/hi6421-pmic-core.c
+++ b/drivers/mfd/hi6421-pmic-core.c
@@ -1,9 +1,9 @@
/*
- * Device driver for Hi6421 IC
+ * Device driver for Hi6421 PMIC
*
* Copyright (c) <2011-2014> HiSilicon Technologies Co., Ltd.
* http://www.hisilicon.com
- * Copyright (c) <2013-2014> Linaro Ltd.
+ * Copyright (c) <2013-2017> Linaro Ltd.
* http://www.linaro.org
*
* Author: Guodong Xu
@@ -16,16 +16,20 @@
#include
#include
#include
+#include
#include
-#include
+#include
#include
#include
-#include
static const struct mfd_cell hi6421_devs[] = {
{ .name = "hi6421-regulator", },
};
+static const struct mfd_cell hi6421v530_devs[] = {
+ { .name = "hi6421v530-regulator", },
+};
+
static const struct regmap_config hi6421_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
@@ -33,12 +37,33 @@ static const struct regmap_config hi6421_regmap_config = {
.max_register = HI6421_REG_TO_BUS_ADDR(HI6421_REG_MAX),
};
+static const struct of_device_id of_hi6421_pmic_match[] = {
+ {
+ .compatible = "hisilicon,hi6421-pmic",
+ .data = (void *)HI6421
+ },
+ {
+ .compatible = "hisilicon,hi6421v530-pmic",
+ .data = (void *)HI6421_V530
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, of_hi6421_pmic_match);
+
static int hi6421_pmic_probe(struct platform_device *pdev)
{
struct hi6421_pmic *pmic;
struct resource *res;
+ const struct of_device_id *id;
+ const struct mfd_cell *subdevs;
+ enum hi6421_type type;
void __iomem *base;
- int ret;
+ int n_subdevs, ret;
+
+ id = of_match_device(of_hi6421_pmic_match, &pdev->dev);
+ if (!id)
+ return -EINVAL;
+ type = (enum hi6421_type)id->data;
pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
if (!pmic)
@@ -57,18 +82,33 @@ static int hi6421_pmic_probe(struct platform_device *pdev)
return PTR_ERR(pmic->regmap);
}
- /* set over-current protection debounce 8ms */
- regmap_update_bits(pmic->regmap, HI6421_OCP_DEB_CTRL_REG,
+ platform_set_drvdata(pdev, pmic);
+
+ switch (type) {
+ case HI6421:
+ /* set over-current protection debounce 8ms */
+ regmap_update_bits(pmic->regmap, HI6421_OCP_DEB_CTRL_REG,
(HI6421_OCP_DEB_SEL_MASK
| HI6421_OCP_EN_DEBOUNCE_MASK
| HI6421_OCP_AUTO_STOP_MASK),
(HI6421_OCP_DEB_SEL_8MS
| HI6421_OCP_EN_DEBOUNCE_ENABLE));
- platform_set_drvdata(pdev, pmic);
+ subdevs = hi6421_devs;
+ n_subdevs = ARRAY_SIZE(hi6421_devs);
+ break;
+ case HI6421_V530:
+ subdevs = hi6421v530_devs;
+ n_subdevs = ARRAY_SIZE(hi6421v530_devs);
+ break;
+ default:
+ dev_err(&pdev->dev, "Unknown device type %d\n",
+ (unsigned int)type);
+ return -EINVAL;
+ }
- ret = devm_mfd_add_devices(&pdev->dev, 0, hi6421_devs,
- ARRAY_SIZE(hi6421_devs), NULL, 0, NULL);
+ ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE,
+ subdevs, n_subdevs, NULL, 0, NULL);
if (ret) {
dev_err(&pdev->dev, "Failed to add child devices: %d\n", ret);
return ret;
@@ -77,16 +117,10 @@ static int hi6421_pmic_probe(struct platform_device *pdev)
return 0;
}
-static const struct of_device_id of_hi6421_pmic_match_tbl[] = {
- { .compatible = "hisilicon,hi6421-pmic", },
- { },
-};
-MODULE_DEVICE_TABLE(of, of_hi6421_pmic_match_tbl);
-
static struct platform_driver hi6421_pmic_driver = {
.driver = {
- .name = "hi6421_pmic",
- .of_match_table = of_hi6421_pmic_match_tbl,
+ .name = "hi6421_pmic",
Re: [PATCH v5] mmc: dw_mmc-k3: add sd support for hi3660
On Thu, Jul 6, 2017 at 1:13 PM, Jaehoon Chung wrote:
> Hi,
>
> To Guodong, if you can forward this to Li Wei, plz do it. Sorry.
>
Sure. Put Li Wei in cc.
And add my response.
> On 07/03/2017 10:06 AM, liwei wrote:
>>
>> Add sd card support for hi3660 soc
>
> Need the patch for adding "hi3660-dw-mshc" compatible
> Documentation/devicetree/bindings/k3-dw-mshc.txt
>
> And added the minor comments.
>
Hi, Jaehoo,
This "hi3660-dw-mshc" compatible string has been integrated into
platform maintainer's tree together with dts changes. It's now in
linux-next [1], and in Linus' master branch [2], will be in mainline
v4.13-rc's.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/log/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt?h=next-20170706
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
-Guodong
>>
>> Major changes in v3:
>> - solve review comments from Heiner Kallweit.
>>*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
>>*use usleep_range() replace udelay() and mdelay().
>>
>> Major changes in v4:
>> - solve review comments from Jaehoon Chung.
>>*move common register for dwmmc controller to dwmmc header file.
>>*modify definitions type of some register variables.
>>*get rid of the magic numbers.
>>
>> Major changes in v5:
>> - further improve coding style.
>> ---
>> drivers/mmc/host/dw_mmc-k3.c | 315
>> +++
>> drivers/mmc/host/dw_mmc.h| 2 +
>> 2 files changed, 317 insertions(+)
>>
>> diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
>> index e38fb0020bb1..a28eb8c7da82 100644
>> --- a/drivers/mmc/host/dw_mmc-k3.c
>> +++ b/drivers/mmc/host/dw_mmc-k3.c
>> @@ -8,6 +8,8 @@
>> * (at your option) any later version.
>> */
>>
>> +#include
>> +#include
>> #include
>> #include
>> #include
>> @@ -28,7 +30,38 @@
>> #define AO_SCTRL_SEL18 BIT(10)
>> #define AO_SCTRL_CTRL3 0x40C
>>
>> +#define DWMMC_SDIO_ID 2
>> +
>> +#define SOC_SCTRL_SCPERCTRL5(0x314)
>> +#define SDCARD_IO_SEL18 BIT(2)
>> +
>> +#define SDCARD_RD_THRESHOLD (512)
>> +
>> +#define GENCLK_DIV (7)
>> +
>> +#define GPIO_CLK_ENABLE BIT(16)
>> +#define GPIO_CLK_DIV_MASK GENMASK(11, 8)
>> +#define GPIO_USE_SAMPLE_DLY_MASK GENMASK(13, 13)
>> +#define UHS_REG_EXT_SAMPLE_PHASE_MASK GENMASK(20, 16)
>> +#define UHS_REG_EXT_SAMPLE_DRVPHASE_MASK GENMASK(25, 21)
>> +#define UHS_REG_EXT_SAMPLE_DLY_MASK GENMASK(30, 26)
>> +
>> +#define TIMING_MODE 3
>> +#define TIMING_CFG_NUM 10
>> +
>> +#define PULL_DOWN BIT(1)
>> +#define PULL_UP BIT(0)
>> +
>> +#define NUM_PHASES (40)
>> +
>> +#define ENABLE_SHIFT_MIN_SMPL (4)
>> +#define ENABLE_SHIFT_MAX_SMPL (12)
>> +#define USE_DLY_MIN_SMPL (11)
>> +#define USE_DLY_MAX_SMPL (14)
>> +
>> struct k3_priv {
>> + int ctrl_id;
>> + u32 cur_speed;
>> struct regmap *reg;
>> };
>>
>> @@ -38,6 +71,41 @@ static unsigned long dw_mci_hi6220_caps[] = {
>> 0
>> };
>>
>> +struct hs_timing {
>> + u32 drv_phase;
>> + u32 smpl_dly;
>> + u32 smpl_phase_max;
>> + u32 smpl_phase_min;
>> +};
>> +
>> +struct hs_timing hs_timing_cfg[TIMING_MODE][TIMING_CFG_NUM] = {
>> + { /* reserved */ },
>> + { /* SD */
>> + {7, 0, 15, 15,}, /* 0: LEGACY 400k */
>> + {6, 0, 4, 4,}, /* 1: MMC_HS */
>> + {6, 0, 3, 3,}, /* 2: SD_HS */
>> + {6, 0, 15, 15,}, /* 3: SDR12 */
>> + {6, 0, 2, 2,}, /* 4: SDR25 */
>> + {4, 0, 11, 0,}, /* 5: SDR50 */
>> + {6, 4, 15, 0,}, /* 6: SDR104 */
>> + {0}, /* 7: DDR50 */
>> + {0}, /* 8: DDR52 */
>> + {0}, /* 9: HS200 */
>> + },
>> + { /* SDIO */
>> + {7, 0, 15, 15,}, /* 0: LEGACY 400k */
>> + {0}, /* 1: MMC_HS */
>> + {6, 0, 15, 15,}, /* 2: SD_HS */
>> + {6, 0, 15, 15,}, /* 3: SDR12 */
>> + {6, 0, 0, 0,}, /* 4: SDR25 */
>> + {4, 0, 12, 0,}, /* 5: SDR50 */
>> + {5, 4, 15, 0,}, /* 6: SDR104 */
>> + {0}, /* 7: DDR50 */
>> + {0}, /* 8: DDR52 */
>> + {0}, /* 9: HS200 */
>> + }
>> +};
>> +
>> static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios)
>> {
>> int ret;
>> @@ -66,6 +134,10 @@ static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
>> if (IS_ERR(priv->reg))
>> priv->reg = NULL;
>>
>> + priv->ctrl_id = of_alias_get_id(host->dev->of_node, "mshc");
>> + if (priv->ctrl_id < 0)
>> + priv->ctrl_id = 0;
>> +
>> host->priv = priv;
>> return 0;
>> }
>> @@ -144,7 +216,245 @@ static const struct dw_mci_drv_data hi6220_data = {
Re: [PATCH v11 0/3]add PCIe driver for Kirin PCIe
On Mon, Jul 3, 2017 at 9:32 PM, Wei Xu wrote: > Hi Guodong, > > On 2017/7/3 14:04, Guodong Xu wrote: >> Hi, Xu Wei >> >> >> >> On Mon, Jul 3, 2017 at 6:47 PM, Will Deacon wrote: >>> On Sun, Jul 02, 2017 at 06:36:57PM -0500, Bjorn Helgaas wrote: >>>> [+cc Catalin, Will, linux-arm-kernel] >>>> >>>> Applied patches 2 & 3 to pci/host-kirin for v4.13. >>>> >>>> I would like a MAINTAINERS update, too. If you send me that, I'll >>>> squash it into the driver patch. >>>> >>>> Catalin, Will, how do you want to handle the >>>> arch/arm64/configs/defconfig change (patch 3)? It's currently on my >>>> branch, but I'm happy to drop it if another route is better. >>> >>> defconfig updates usually go through arm-soc, via the relevant platform >>> maintainer, so it would be best to follow that route here too otherwise >>> you'll probably see conflicts in -next. >>> >> >> Is it ok for you to pick up the arch/arm64/configs/defconfig change (patch >> 3)? > > Since it is already 4.12-rc7, I will pick up it and queue for the v4.14. > Are you fine about that? > Thanks! Sure. > > Best Regards, > Wei > >> >> -Guodong >> >>> Will >> >> . >> >
Re: [PATCH v11 0/3]add PCIe driver for Kirin PCIe
Hi, Xu Wei On Mon, Jul 3, 2017 at 6:47 PM, Will Deacon wrote: > On Sun, Jul 02, 2017 at 06:36:57PM -0500, Bjorn Helgaas wrote: >> [+cc Catalin, Will, linux-arm-kernel] >> >> Applied patches 2 & 3 to pci/host-kirin for v4.13. >> >> I would like a MAINTAINERS update, too. If you send me that, I'll >> squash it into the driver patch. >> >> Catalin, Will, how do you want to handle the >> arch/arm64/configs/defconfig change (patch 3)? It's currently on my >> branch, but I'm happy to drop it if another route is better. > > defconfig updates usually go through arm-soc, via the relevant platform > maintainer, so it would be best to follow that route here too otherwise > you'll probably see conflicts in -next. > Is it ok for you to pick up the arch/arm64/configs/defconfig change (patch 3)? -Guodong > Will
Re: [PATCH v4] mmc: dw_mmc-k3: add sd support for hi3660
Hi, Li Wei
I have some minor comments to your patch.
> On Tue, Jun 13, 2017 at 3:25 PM, liwei wrote:
First of all, please modify author part. It is recommended to use "Li
Wei", instead of what you are using now "liwei". If you are using git
format-patch, send-email, please modify your
~/.gitconfig
Add a proper [user] section.
For an existing commit, you can modify the author information by running
git commit --amend --author="xxx"
> Add sd card support for hi3660 soc
>
> Signed-off-by: Li Wei
> Signed-off-by: Chen Jun
>
> Major changes in v3:
> - solve review comments from Heiner Kallweit.
>*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
>*use usleep_range() replace udelay() and mdelay().
>
> Major changes in v4:
> - solve review comments from Jaehoon Chung.
>*move common register for dwmmc controller to dwmmc header file.
>*modify definitions type of some register variables.
>*get rid of the magic numbers.
> ---
> drivers/mmc/host/dw_mmc-k3.c | 313
> +++
> drivers/mmc/host/dw_mmc.h| 2 +
> 2 files changed, 315 insertions(+)
>
> diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
> index e38fb0020bb1..c63e91ab775e 100644
> --- a/drivers/mmc/host/dw_mmc-k3.c
> +++ b/drivers/mmc/host/dw_mmc-k3.c
> @@ -8,6 +8,8 @@
> * (at your option) any later version.
> */
>
> +#include
> +#include
> #include
> #include
> #include
> @@ -28,7 +30,38 @@
> #define AO_SCTRL_SEL18 BIT(10)
> #define AO_SCTRL_CTRL3 0x40C
>
> +#define DWMMC_SDIO_ID 2
> +
> +#define SOC_SCTRL_SCPERCTRL5(0x314)
> +#define SDCARD_IO_SEL18 BIT(2)
> +
> +#define SDCARD_RD_THRESHOLD (512)
> +
> +#define GENCLK_DIV (7)
> +
> +#define GPIO_CLK_ENABLE BIT(16)
> +#define GPIO_CLK_DIV_MASK GENMASK(11, 8)
> +#define GPIO_USE_SAMPLE_DLY_MASK GENMASK(13, 13)
> +#define UHS_REG_EXT_SAMPLE_PHASE_MASK GENMASK(20, 16)
> +#define UHS_REG_EXT_SAMPLE_DRVPHASE_MASK GENMASK(25, 21)
> +#define UHS_REG_EXT_SAMPLE_DLY_MASK GENMASK(30, 26)
> +
> +#define TIMING_MODE 3
> +#define TIMING_CFG_NUM 10
> +
> +#define PULL_DOWN BIT(1)
> +#define PULL_UP BIT(0)
> +
> +#define NUM_PHASES (40)
> +
> +#define ENABLE_SHIFT_MIN_SMPL (4)
> +#define ENABLE_SHIFT_MAX_SMPL (12)
> +#define USE_DLY_MIN_SMPL (11)
> +#define USE_DLY_MAX_SMPL (14)
> +
> struct k3_priv {
> + int ctrl_id;
> + u32 cur_speed;
> struct regmap *reg;
> };
>
> @@ -38,6 +71,41 @@ static unsigned long dw_mci_hi6220_caps[] = {
> 0
> };
>
> +struct hs_timing {
> + u32 drv_phase;
> + u32 smpl_dly;
> + u32 smpl_phase_max;
> + u32 smpl_phase_min;
> +};
> +
> +struct hs_timing hs_timing_cfg[TIMING_MODE][TIMING_CFG_NUM] = {
> + { /* reserved */ },
> + { /* SD */
> + {7, 0, 15, 15,}, /* 0: LEGACY 400k */
> + {6, 0, 4, 4,}, /* 1: MMC_HS */
> + {6, 0, 3, 3,}, /* 2: SD_HS */
> + {6, 0, 15, 15,}, /* 3: SDR12 */
> + {6, 0, 2, 2,}, /* 4: SDR25 */
> + {4, 0, 11, 0,}, /* 5: SDR50 */
> + {6, 4, 15, 0,}, /* 6: SDR104 */
> + {0}, /* 7: DDR50 */
> + {0}, /* 8: DDR52 */
> + {0}, /* 9: HS200 */
> + },
> + { /* SDIO */
> + {7, 0, 15, 15,}, /* 0: LEGACY 400k */
> + {0}, /* 1: MMC_HS */
> + {6, 0, 15, 15,}, /* 2: SD_HS */
> + {6, 0, 15, 15,}, /* 3: SDR12 */
> + {6, 0, 0, 0,}, /* 4: SDR25 */
> + {4, 0, 12, 0,}, /* 5: SDR50 */
> + {5, 4, 15, 0,}, /* 6: SDR104 */
> + {0}, /* 7: DDR50 */
> + {0}, /* 8: DDR52 */
> + {0}, /* 9: HS200 */
> + }
> +};
> +
> static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios)
> {
> int ret;
> @@ -66,6 +134,10 @@ static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
> if (IS_ERR(priv->reg))
> priv->reg = NULL;
>
> + priv->ctrl_id = of_alias_get_id(host->dev->of_node, "mshc");
> + if (priv->ctrl_id < 0)
> + priv->ctrl_id = 0;
> +
> host->priv = priv;
> return 0;
> }
> @@ -144,7 +216,243 @@ static const struct dw_mci_drv_data hi6220_data = {
> .execute_tuning = dw_mci_hi6220_execute_tuning,
> };
>
> +static void dw_mci_hs_set_timing(struct dw_mci *host, int timing, int
> smpl_phase)
> +{
> + u32 drv_phase;
> + u32 smpl_dly;
> + u32 use_smpl_dly = 0;
> + u32 enable_shift = 0;
> + u32 reg_value;
> + int ctrl_id;
> + struct k3_priv *priv;
> +
> + priv = host->priv;
> + ctrl_id = priv->ctrl_id;
> +
> + drv_phase = hs_timing_cfg[ctrl_id][timing].drv_phase;
> +
Re: [PATCH v11 2/3] PCI: dwc: kirin: add PCIe Driver for HiSilicon Kirin SoC
Hi, Bjorn May I know what other comments you may have about this patchset? Do you need us to do any further clean up? If not, would you please pick patch 2 and 3 of v11 into your git tree for -next? Thank you for your time. Patch 1 of v11 has been picked up by platform maintainer, Wei Xu. I can see it in linux-next 0626. Best regards, Guodong Xu On Mon, Jun 19, 2017 at 6:23 PM, Xiaowei Song wrote: > Hisilicon PCIe Driver shares the common functions for PCIe dw-host > > The poweron functions is developed on hi3660 SoC, > while Others Functions are common for Kirin series SoCs. > > Low power mode (L1 sub-state and Suspend/Resume), hotplug > and MSI feature are not supported currently. > > Cc: Guodong Xu > Signed-off-by: Xiaowei Song > Reviewed-by: Jingoo Han > --- > drivers/pci/dwc/Kconfig | 10 + > drivers/pci/dwc/Makefile | 1 + > drivers/pci/dwc/pcie-kirin.c | 518 > +++ > 3 files changed, 529 insertions(+) > create mode 100644 drivers/pci/dwc/pcie-kirin.c > > diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig > index d2d2ba5b8a68..afecfb2b6ff4 100644 > --- a/drivers/pci/dwc/Kconfig > +++ b/drivers/pci/dwc/Kconfig > @@ -130,4 +130,14 @@ config PCIE_ARTPEC6 > Say Y here to enable PCIe controller support on Axis ARTPEC-6 > SoCs. This PCIe controller uses the DesignWare core. > > +config PCIE_KIRIN > + depends on OF && ARM64 > + bool "HiSilicon Kirin series SoCs PCIe controllers" > + depends on PCI > + select PCIEPORTBUS > + select PCIE_DW_HOST > + help > + Say Y here if you want PCIe controller support > + on HiSilicon Kirin series SoCs. > + > endmenu > diff --git a/drivers/pci/dwc/Makefile b/drivers/pci/dwc/Makefile > index a2df13c28798..4bd69bacd4ab 100644 > --- a/drivers/pci/dwc/Makefile > +++ b/drivers/pci/dwc/Makefile > @@ -10,6 +10,7 @@ obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o > obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o > obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o > obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o > +obj-$(CONFIG_PCIE_KIRIN) += pcie-kirin.o > > # The following drivers are for devices that use the generic ACPI > # pci_root.c driver but don't support standard ECAM config access. > diff --git a/drivers/pci/dwc/pcie-kirin.c b/drivers/pci/dwc/pcie-kirin.c > new file mode 100644 > index ..c5f35df8cced > --- /dev/null > +++ b/drivers/pci/dwc/pcie-kirin.c > @@ -0,0 +1,518 @@ > +/* > + * PCIe host controller driver for Kirin Phone SoCs > + * > + * Copyright (C) 2017 Hilisicon Electronics Co., Ltd. > + * http://www.huawei.com > + * > + * Author: Xiaowei Song > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include "pcie-designware.h" > + > +#define to_kirin_pcie(x) dev_get_drvdata((x)->dev) > + > +#define REF_CLK_FREQ 1 > + > +/* PCIe ELBI registers */ > +#define SOC_PCIECTRL_CTRL0_ADDR0x000 > +#define SOC_PCIECTRL_CTRL1_ADDR0x004 > +#define SOC_PCIEPHY_CTRL2_ADDR 0x008 > +#define SOC_PCIEPHY_CTRL3_ADDR 0x00c > +#define PCIE_ELBI_SLV_DBI_ENABLE (0x1 << 21) > + > +/* info located in APB */ > +#define PCIE_APP_LTSSM_ENABLE 0x01c > +#define PCIE_APB_PHY_CTRL0 0x0 > +#define PCIE_APB_PHY_CTRL1 0x4 > +#define PCIE_APB_PHY_STATUS0 0x400 > +#define PCIE_LINKUP_ENABLE (0x8020) > +#define PCIE_LTSSM_ENABLE_BIT (0x1 << 11) > +#define PIPE_CLK_STABLE(0x1 << 19) > +#define PHY_REF_PAD_BIT(0x1 << 8) > +#define PHY_PWR_DOWN_BIT (0x1 << 22) > +#define PHY_RST_ACK_BIT(0x1 << 16) > + > +/* info located in sysctrl */ > +#define SCTRL_PCIE_CMOS_OFFSET 0x60 > +#define SCTRL_PCIE_CMOS_BIT0x10 > +#define SCTRL_PCIE_ISO_OFFSET 0x44 > +#define SCTRL_PCIE_ISO_BIT 0x30 > +#define SCTRL_PCIE_HPCLK_OFFSET0x190 > +#define SCTRL_PCIE_HPCLK_BIT 0x184000 > +#define SCTRL_PCIE_OE_OFFSET 0x14a > +#define PCIE_DEBOUNCE_PARAM0xF0F400 > +#define PCIE_OE_BYPASS (0x3 << 28) > + > +/* peri_crg ctrl */ > +#define CRGCTRL_PCIE_ASSERT_OFFSET
Re: [PATCH v6 4/8] mfd: hi6421-pmic: add support for HiSilicon Hi6421v530
Hi, Lee
Sorry to disturb. May I get some of your bandwidth on this patch? Does
it looks good or needs more tweak?
Other patches in this patchset, dts, regulator, have been integrated
into linux-next. So, only this one and the patch 8/8 of defconfig [1]
need your special attention.
[1] defconfig: https://lkml.org/lkml/2017/6/8/1077
Thank you.
Best regards,
Guodong
On Fri, Jun 9, 2017 at 6:08 AM, Guodong Xu wrote:
> Add support for HiSilicon Hi6421v530 PMIC. Hi6421v530 communicates with
> main SoC via memory-mapped I/O.
>
> Hi6421v530 and Hi6421 are PMIC chips from the same vendor, HiSilicon,
> but at different revisions. They share the same memory-mapped I/O
> design. They differ in integrated devices, such as regulator details,
> LDO voltage points.
>
> Signed-off-by: Wang Xiaoyin
> Signed-off-by: Guodong Xu
> Acked-by: Arnd Bergmann
> ---
> drivers/mfd/hi6421-pmic-core.c | 70
> ++---
> include/linux/mfd/hi6421-pmic.h | 5 +++
> 2 files changed, 57 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/mfd/hi6421-pmic-core.c b/drivers/mfd/hi6421-pmic-core.c
> index b1139d4..6fb7ba2 100644
> --- a/drivers/mfd/hi6421-pmic-core.c
> +++ b/drivers/mfd/hi6421-pmic-core.c
> @@ -1,9 +1,9 @@
> /*
> - * Device driver for Hi6421 IC
> + * Device driver for Hi6421 PMIC
> *
> * Copyright (c) <2011-2014> HiSilicon Technologies Co., Ltd.
> * http://www.hisilicon.com
> - * Copyright (c) <2013-2014> Linaro Ltd.
> + * Copyright (c) <2013-2017> Linaro Ltd.
> * http://www.linaro.org
> *
> * Author: Guodong Xu
> @@ -16,16 +16,20 @@
> #include
> #include
> #include
> +#include
> #include
> -#include
> +#include
> #include
> #include
> -#include
>
> static const struct mfd_cell hi6421_devs[] = {
> { .name = "hi6421-regulator", },
> };
>
> +static const struct mfd_cell hi6421v530_devs[] = {
> + { .name = "hi6421v530-regulator", },
> +};
> +
> static const struct regmap_config hi6421_regmap_config = {
> .reg_bits = 32,
> .reg_stride = 4,
> @@ -33,12 +37,33 @@ static const struct regmap_config hi6421_regmap_config = {
> .max_register = HI6421_REG_TO_BUS_ADDR(HI6421_REG_MAX),
> };
>
> +static const struct of_device_id of_hi6421_pmic_match[] = {
> + {
> + .compatible = "hisilicon,hi6421-pmic",
> + .data = (void *)HI6421
> + },
> + {
> + .compatible = "hisilicon,hi6421v530-pmic",
> + .data = (void *)HI6421_V530
> + },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, of_hi6421_pmic_match);
> +
> static int hi6421_pmic_probe(struct platform_device *pdev)
> {
> struct hi6421_pmic *pmic;
> struct resource *res;
> + const struct of_device_id *id;
> + const struct mfd_cell *subdevs;
> + enum hi6421_type type;
> void __iomem *base;
> - int ret;
> + int n_subdevs, ret;
> +
> + id = of_match_device(of_hi6421_pmic_match, &pdev->dev);
> + if (!id)
> + return -EINVAL;
> + type = (enum hi6421_type)id->data;
>
> pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
> if (!pmic)
> @@ -57,18 +82,33 @@ static int hi6421_pmic_probe(struct platform_device *pdev)
> return PTR_ERR(pmic->regmap);
> }
>
> - /* set over-current protection debounce 8ms */
> - regmap_update_bits(pmic->regmap, HI6421_OCP_DEB_CTRL_REG,
> + platform_set_drvdata(pdev, pmic);
> +
> + switch (type) {
> + case HI6421:
> + /* set over-current protection debounce 8ms */
> + regmap_update_bits(pmic->regmap, HI6421_OCP_DEB_CTRL_REG,
> (HI6421_OCP_DEB_SEL_MASK
> | HI6421_OCP_EN_DEBOUNCE_MASK
> | HI6421_OCP_AUTO_STOP_MASK),
> (HI6421_OCP_DEB_SEL_8MS
> | HI6421_OCP_EN_DEBOUNCE_ENABLE));
>
> - platform_set_drvdata(pdev, pmic);
> + subdevs = hi6421_devs;
> + n_subdevs = ARRAY_SIZE(hi6421_devs);
> + break;
> + case HI6421_V530:
> + subdevs = hi6421v530_devs;
> + n_subdevs = ARRAY_SIZE(hi6421v530_devs);
> + break;
> + default:
> + dev_err(&pdev->dev, "Unknown device type %d\n",
> + (unsigned int)type);
>
Re: [PATCH v4] mmc: dw_mmc-k3: add sd support for hi3660
Hi, Ulf, Jaehoon
Sorry to disturb. Would it be possible to get some of your bandwidth
on this patch? Would you please give us your opinion?
Thank you.
-Guodong
On Tue, Jun 13, 2017 at 3:25 PM, liwei wrote:
> Add sd card support for hi3660 soc
>
> Signed-off-by: Li Wei
> Signed-off-by: Chen Jun
>
> Major changes in v3:
> - solve review comments from Heiner Kallweit.
>*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
>*use usleep_range() replace udelay() and mdelay().
>
> Major changes in v4:
> - solve review comments from Jaehoon Chung.
>*move common register for dwmmc controller to dwmmc header file.
>*modify definitions type of some register variables.
>*get rid of the magic numbers.
> ---
> drivers/mmc/host/dw_mmc-k3.c | 313
> +++
> drivers/mmc/host/dw_mmc.h| 2 +
> 2 files changed, 315 insertions(+)
>
> diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
> index e38fb0020bb1..c63e91ab775e 100644
> --- a/drivers/mmc/host/dw_mmc-k3.c
> +++ b/drivers/mmc/host/dw_mmc-k3.c
> @@ -8,6 +8,8 @@
> * (at your option) any later version.
> */
>
> +#include
> +#include
> #include
> #include
> #include
> @@ -28,7 +30,38 @@
> #define AO_SCTRL_SEL18 BIT(10)
> #define AO_SCTRL_CTRL3 0x40C
>
> +#define DWMMC_SDIO_ID 2
> +
> +#define SOC_SCTRL_SCPERCTRL5(0x314)
> +#define SDCARD_IO_SEL18 BIT(2)
> +
> +#define SDCARD_RD_THRESHOLD (512)
> +
> +#define GENCLK_DIV (7)
> +
> +#define GPIO_CLK_ENABLE BIT(16)
> +#define GPIO_CLK_DIV_MASK GENMASK(11, 8)
> +#define GPIO_USE_SAMPLE_DLY_MASK GENMASK(13, 13)
> +#define UHS_REG_EXT_SAMPLE_PHASE_MASK GENMASK(20, 16)
> +#define UHS_REG_EXT_SAMPLE_DRVPHASE_MASK GENMASK(25, 21)
> +#define UHS_REG_EXT_SAMPLE_DLY_MASK GENMASK(30, 26)
> +
> +#define TIMING_MODE 3
> +#define TIMING_CFG_NUM 10
> +
> +#define PULL_DOWN BIT(1)
> +#define PULL_UP BIT(0)
> +
> +#define NUM_PHASES (40)
> +
> +#define ENABLE_SHIFT_MIN_SMPL (4)
> +#define ENABLE_SHIFT_MAX_SMPL (12)
> +#define USE_DLY_MIN_SMPL (11)
> +#define USE_DLY_MAX_SMPL (14)
> +
> struct k3_priv {
> + int ctrl_id;
> + u32 cur_speed;
> struct regmap *reg;
> };
>
> @@ -38,6 +71,41 @@ static unsigned long dw_mci_hi6220_caps[] = {
> 0
> };
>
> +struct hs_timing {
> + u32 drv_phase;
> + u32 smpl_dly;
> + u32 smpl_phase_max;
> + u32 smpl_phase_min;
> +};
> +
> +struct hs_timing hs_timing_cfg[TIMING_MODE][TIMING_CFG_NUM] = {
> + { /* reserved */ },
> + { /* SD */
> + {7, 0, 15, 15,}, /* 0: LEGACY 400k */
> + {6, 0, 4, 4,}, /* 1: MMC_HS */
> + {6, 0, 3, 3,}, /* 2: SD_HS */
> + {6, 0, 15, 15,}, /* 3: SDR12 */
> + {6, 0, 2, 2,}, /* 4: SDR25 */
> + {4, 0, 11, 0,}, /* 5: SDR50 */
> + {6, 4, 15, 0,}, /* 6: SDR104 */
> + {0}, /* 7: DDR50 */
> + {0}, /* 8: DDR52 */
> + {0}, /* 9: HS200 */
> + },
> + { /* SDIO */
> + {7, 0, 15, 15,}, /* 0: LEGACY 400k */
> + {0}, /* 1: MMC_HS */
> + {6, 0, 15, 15,}, /* 2: SD_HS */
> + {6, 0, 15, 15,}, /* 3: SDR12 */
> + {6, 0, 0, 0,}, /* 4: SDR25 */
> + {4, 0, 12, 0,}, /* 5: SDR50 */
> + {5, 4, 15, 0,}, /* 6: SDR104 */
> + {0}, /* 7: DDR50 */
> + {0}, /* 8: DDR52 */
> + {0}, /* 9: HS200 */
> + }
> +};
> +
> static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios)
> {
> int ret;
> @@ -66,6 +134,10 @@ static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
> if (IS_ERR(priv->reg))
> priv->reg = NULL;
>
> + priv->ctrl_id = of_alias_get_id(host->dev->of_node, "mshc");
> + if (priv->ctrl_id < 0)
> + priv->ctrl_id = 0;
> +
> host->priv = priv;
> return 0;
> }
> @@ -144,7 +216,243 @@ static const struct dw_mci_drv_data hi6220_data = {
> .execute_tuning = dw_mci_hi6220_execute_tuning,
> };
>
> +static void dw_mci_hs_set_timing(struct dw_mci *host, int timing, int
> smpl_phase)
> +{
> + u32 drv_phase;
> + u32 smpl_dly;
> + u32 use_smpl_dly = 0;
> + u32 enable_shift = 0;
> + u32 reg_value;
> + int ctrl_id;
> + struct k3_priv *priv;
> +
> + priv = host->priv;
> + ctrl_id = priv->ctrl_id;
> +
> + drv_phase = hs_timing_cfg[ctrl_id][timing].drv_phase;
> + smpl_dly = hs_timing_cfg[ctrl_id][timing].smpl_dly;
> + if (smpl_phase == -1)
> + smpl_phase = (hs_timing_cfg[ctrl_id][timing].smpl_phase_max +
> +hs_timing_cfg[ctrl_id][timin
Re: [PATCH v10 2/3] PCI: dwc: kirin: add PCIe Driver for HiSilicon Kirin SoC
On Mon, Jun 19, 2017 at 10:02 PM, kbuild test robot wrote:
> Hi Xiaowei,
>
> [auto build test ERROR on pci/next]
> [also build test ERROR on v4.12-rc5 next-20170619]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Xiaowei-Song/PCI-hisi-Add-DT-binding-for-PCIe-of-Kirin-SoC-series/20170619-194535
> base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
> config: arm64-defconfig (attached as .config)
> compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
> reproduce:
> wget
> https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O
> ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # save the attached .config to linux build tree
> make.cross ARCH=arm64
>
> All errors (new ones prefixed by >>):
Thanks for the finding. Sorry about this.
v10 patchset should be ignored. Xiaowei sent v11 yesterday.
-Guodong
>
>drivers/pci/dwc/pcie-kirin.c: In function 'kirin_pcie_establish_link':
>>> drivers/pci/dwc/pcie-kirin.c:424:12: error: 'dev' undeclared (first use in
>>> this function)
>dev_err(dev, "Link Fail\n");
>^~~
>drivers/pci/dwc/pcie-kirin.c:424:12: note: each undeclared identifier is
> reported only once for each function it appears in
>
> vim +/dev +424 drivers/pci/dwc/pcie-kirin.c
>
>418
>419 /* check if the link is up or not */
>420 while (!kirin_pcie_link_up(pci)) {
>421 usleep_range(LINK_WAIT_MIN, LINK_WAIT_MAX);
>422 count++;
>423 if (count == 1000) {
> > 424 dev_err(dev, "Link Fail\n");
>425 return -EINVAL;
>426 }
>427 }
>
> ---
> 0-DAY kernel test infrastructureOpen Source Technology Center
> https://lists.01.org/pipermail/kbuild-all Intel Corporation
Re: [PATCH 3/3] arm64: dts: register Hi3660's thermal sensor
On Tue, Jun 20, 2017 at 4:32 PM, Wangtao (Kevin, Kirin)
wrote:
>
>
> 在 2017/6/20 15:38, Guodong Xu 写道:
>>
>>
>>
>> 2017年6月20日 上午11:49，"Tao Wang" > <mailto:kevin.wang...@hisilicon.com>>写道：
>>
>> Bind thermal sensor driver for Hi3660.
>>
>> Signed-off-by: Tao Wang > <mailto:kevin.wang...@hisilicon.com>>
>> Signed-off-by: Leo Yan > <mailto:leo@linaro.org>>
>> ---
>> arch/arm64/boot/dts/hisilicon/hi3660.dtsi |7 +++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> index 3983086..cc67958 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> @@ -156,5 +156,12 @@
>>
>>
>> i am wondering which tree this patch should be applied to. Actually Olof
>> Johansson o...@lixom.net <mailto:o...@lixom.net> just merged hi3660 dts into
>> his tree. You should better rebase you dts patch onto that.
>
> Can you share me the git path?
As of this morning, it has shown up in linux next tag: next-20170620
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm64/boot/dts/hisilicon?h=next-20170620
-Guodong
>>
>>
>>
>> clock-names = "uartclk", "apb_pclk";
>> status = "disabled";
>> };
>> +
>> + tsensor: tsensor {
>> + compatible = "hisilicon,thermal-hi3660";
>> + reg = <0x0 0xfff3 0x0 0x1000>;
>> + #thermal-sensor-cells = <1>;
>> + status = "ok";
>>
>>
>> please remove status ok. that's default. redundant.
>
> ok
>>
>>
>> + };
>> };
>> };
>> --
>> 1.7.9.5
>>
>>
>> ___
>> linux-arm-kernel mailing list
>> linux-arm-ker...@lists.infradead.org
>> <mailto:linux-arm-ker...@lists.infradead.org>
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>> <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>
>>
>>
>
Re: [PATCH v2 3/5] arm64: dts: Add ufs dts node
On Sun, Jun 18, 2017 at 8:31 AM, kbuild test robot wrote: > Hi Bu, > > [auto build test ERROR on mkp-scsi/for-next] > [also build test ERROR on v4.12-rc5 next-20170616] > [cannot apply to robh/for-next] > [if your patch is applied to the wrong git tree, please drop us a note to > help improve the system] > It applies to: git://github.com/hisilicon/linux-hisi.git tags/hisi-arm64-dt-for-4.13-v2 > url: > https://github.com/0day-ci/linux/commits/Bu-Tao/scsi-ufs-add-ufs-driver-code-for-Hi3660-SoC/20170618-045141 > base: https://git.kernel.org/pub/scm/linux/kernel/git/mkp/scsi.git for-next > config: arm64-defconfig (attached as .config) > compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705 > reproduce: > wget > https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O > ~/bin/make.cross > chmod +x ~/bin/make.cross > # save the attached .config to linux build tree > make.cross ARCH=arm64 > > All errors (new ones prefixed by >>): > >>> Error: arch/arm64/boot/dts/hisilicon/hi3660.dtsi:152.24-25 syntax error >FATAL ERROR: Unable to parse input tree UFS node has a dependency on clock node <&crg_ctrl ...>, which is submitted in another patchset [1]. [1] has been Ack'ed by platform maintainer Wei Xu, and is available in the git repository at: git://github.com/hisilicon/linux-hisi.git tags/hisi-arm64-dt-for-4.13-v2 [1] hi3660-hikey960 dts base: https://www.spinics.net/lists/kernel/msg2533737.html -Guodong > > --- > 0-DAY kernel test infrastructureOpen Source Technology Center > https://lists.01.org/pipermail/kbuild-all Intel Corporation
Re: [PATCH v9 2/4] arm64: dts: hisi: add kirin pcie node
Hi, Bjorn
On Sat, Jun 17, 2017 at 5:11 AM, Bjorn Helgaas wrote:
> On Tue, Jun 06, 2017 at 07:19:53PM +0800, Guodong Xu wrote:
>> Hi, Arnd
>>
>> On Tue, Jun 6, 2017 at 5:23 PM, Arnd Bergmann wrote:
>> > On Sun, Jun 4, 2017 at 2:03 AM, kbuild test robot wrote:
>> >> Hi Xiaowei,
>> >>
>> >> [auto build test ERROR on pci/next]
>> >> [also build test ERROR on v4.12-rc3 next-20170602]
>> >> [if your patch is applied to the wrong git tree, please drop us a note to
>> >> help improve the system]
>> >>
>> >> url:
>> >> https://github.com/0day-ci/linux/commits/Xiaowei-Song/add-PCIe-driver-for-Kirin-PCIe/20170531-182118
>> >> base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
>> >> next
>> >> config: arm64-allnoconfig (attached as .config)
>> >> compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
>> >> reproduce:
>> >> wget
>> >> https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross
>> >> -O ~/bin/make.cross
>> >> chmod +x ~/bin/make.cross
>> >> # save the attached .config to linux build tree
>> >> make.cross ARCH=arm64
>> >>
>> >> All errors (new ones prefixed by >>):
>> >>
>> >>>> Error: arch/arm64/boot/dts/hisilicon/hi3660.dtsi:180.24-25 syntax error
>> >>>> FATAL ERROR: Unable to parse input tree
>> >
>> > We keep getting the build errors for patch submissions. Obviously the
>> > patch is
>> > still broken and can't be merged as-is. What is the plan for merging the
>> > series?
>> >
>>
>> This dts patch can be applied to dts series [1]. For upstream review
>> purpose, hi3660-hikey960 dts patches, which don't have a related
>> driver changes, are sent in [1]. Other patches, which need driver
>> changes, like this one, are sent together with driver.
>>
>> Patchset [1] is now at its v2 review. Rob Herring already gave his ACK
>> for some of them in v1. Hopefully I can get more ACK for remaining
>> ones, and make them ready for v4.13 merging window.
>>
>> [1], http://www.spinics.net/lists/devicetree/msg178303.html
>
> I don't know how you want to deal with the DTS build failure.
DTS part of this is also included in a broader Hi3660 dts patchset [1], and
was ACK'ed [2] today by HiSilicon SoC maintainer Xu Wei. Hopefully
they can land in next merge window.
[1] https://www.spinics.net/lists/arm-kernel/msg588232.html
[2] https://www.spinics.net/lists/arm-kernel/msg588686.html
-Guodong
> From a
> PCI perspective, I think I could apply patches 1 and 3 pretty easily
> by themselves.
>
> If/when you post these again, please incorporate the following
> incremental diff to clean up various whitespace and capitalization
> nits (these are spread across several of your patches).
>
>
> diff --git a/Documentation/devicetree/bindings/pci/kirin-pcie.txt
> b/Documentation/devicetree/bindings/pci/kirin-pcie.txt
> index 68ffa0fbcd73..20357d840af1 100644
> --- a/Documentation/devicetree/bindings/pci/kirin-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/kirin-pcie.txt
> @@ -24,8 +24,8 @@ Example based on kirin960:
>
> pcie@f400 {
> compatible = "hisilicon,kirin-pcie";
> - reg = <0x0 0xf400 0x0 0x1000>, <0x0 0xff3fe000 0x0
> 0x1000>,
> - <0x0 0xf3f2 0x0 0x4>, <0x0 0xF400 0 0x2000>;
> + reg = <0x0 0xf400 0x0 0x1000>, <0x0 0xff3fe000 0x0
> 0x1000>,
> + <0x0 0xf3f2 0x0 0x4>, <0x0 0xf400 0x0
> 0x2000>;
> reg-names = "dbi","apb","phy", "config";
> bus-range = <0x0 0x1>;
> #address-cells = <3>;
> @@ -46,5 +46,5 @@ Example based on kirin960:
> <&crg_ctrl HI3660_ACLK_GATE_PCIE>;
> clock-names = "pcie_phy_ref", "pcie_aux",
> "pcie_apb_phy", "pcie_apb_sys", "pcie_aclk";
> - reset-gpios = <&gpio11 1 0 >;
> + reset-gpios = <&gpio11 1 0>;
> };
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index e8feb2fb4d53..7bc89baa40ba 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm
[PATCH v5 15/20] arm64: dts: hisi: add kirin pcie node
From: Xiaowei Song
Add PCIe node for hi3660
Cc: Guodong Xu
Signed-off-by: Xiaowei Song
Acked-by: Arnd Bergmann
Changes in v5:
* fix interrupt-map, to conform to gic's #address-cells = <0>
* remove redundant status = "ok"
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 36 +++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index e138973..8183d71 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -754,5 +754,41 @@
cs-gpios = <&gpio18 5 0>;
status = "disabled";
};
+
+ pcie@f400 {
+ compatible = "hisilicon,kirin960-pcie";
+ reg = <0x0 0xf400 0x0 0x1000>,
+ <0x0 0xff3fe000 0x0 0x1000>,
+ <0x0 0xf3f2 0x0 0x4>,
+ <0x0 0xf500 0x0 0x2000>;
+ reg-names = "dbi", "apb", "phy", "config";
+ bus-range = <0x0 0x1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x0200 0x0 0x
+ 0x0 0xf600
+ 0x0 0x0200>;
+ num-lanes = <1>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0x0 0 0 1
+&gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
+ <0x0 0 0 2
+&gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
+ <0x0 0 0 3
+&gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
+ <0x0 0 0 4
+&gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
+<&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
+<&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
+<&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
+<&crg_ctrl HI3660_ACLK_GATE_PCIE>;
+ clock-names = "pcie_phy_ref", "pcie_aux",
+ "pcie_apb_phy", "pcie_apb_sys",
+ "pcie_aclk";
+ reset-gpios = <&gpio11 1 0 >;
+ };
};
};
--
2.10.2
Re: [PATCH v6 7/8] arm64: dts: hikey960: add device node for pmic and regulators
Thanks, Wei.
On Fri, Jun 16, 2017 at 3:55 AM, Wei Xu wrote:
> Hi Guodong,
>
> On 2017/6/8 23:08, Guodong Xu wrote:
>> From: Wang Xiaoyin
>>
>> add device node for hi6421 pmic core and hi6421v530
>> voltage regulator,include LDO(1,3,9,11,15,16)
>>
>> Signed-off-by: Wang Xiaoyin
>> Signed-off-by: Guodong Xu
>> Acked-by: Arnd Bergmann
>> ---
>> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 46
>> +++
>> 1 file changed, 46 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> index ca448f0..e579333 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> @@ -97,6 +97,52 @@
>> default-state = "off";
>> };
>> };
>> +
>> + pmic: pmic@fff34000 {
>> + compatible = "hisilicon,hi6421v530-pmic";
>> + reg = <0x0 0xfff34000 0x0 0x1000>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> +
>> + regulators {
>> + ldo3: LDO3 { /* HDMI */
>> + regulator-name = "VOUT3_1V85";
>> + regulator-min-microvolt = <180>;
>> + regulator-max-microvolt = <220>;
>> + regulator-enable-ramp-delay = <120>;
>> + };
>> +
>> + ldo9: LDO9 { /* SDCARD I/O */
>> + regulator-name = "VOUT9_1V8_2V95";
>> + regulator-min-microvolt = <175>;
>> + regulator-max-microvolt = <330>;
>> + regulator-enable-ramp-delay = <240>;
>> + };
>> +
>> + ldo11: LDO11 { /* Low Speed Connector */
>> + regulator-name = "VOUT11_1V8_2V95";
>> + regulator-min-microvolt = <175>;
>> + regulator-max-microvolt = <330>;
>> + regulator-enable-ramp-delay = <240>;
>> + };
>> +
>> + ldo15: LDO15 { /* UFS VCC */
>> + regulator-name = "VOUT15_3V0";
>> + regulator-min-microvolt = <175>;
>> + regulator-max-microvolt = <300>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + regulator-enable-ramp-delay = <120>;
>> + };
>> +
>> + ldo16: LDO16 { /* SD VDD */
>> + regulator-name = "VOUT16_2V95";
>> + regulator-min-microvolt = <175>;
>> + regulator-max-microvolt = <300>;
>> + regulator-enable-ramp-delay = <360>;
>> + };
>> + };
>> + };
>> };
>>
>> &i2c0 {
>>
>
> Since you put the dts part into another patch set[1] and the driver part has
> been applied.
> I will pick up [1].
> Thanks!
>
> [1]: https://lkml.org/lkml/2017/6/14/1052
>
> BR,
> Wei
>
[PATCH v4 09/20] arm64: dts: hi3660: Add pl031 rtc node
From: Chen Feng
Add dts node to enable pl031 rtc.
Signed-off-by: Chen Feng
Acked-by: Rob Herring
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 7a90c92..3b2a3a7 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -326,6 +326,14 @@
status = "disabled";
};
+ rtc0: rtc@fff04000 {
+ compatible = "arm,pl031", "arm,primecell";
+ reg = <0x0 0Xfff04000 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_PCLK>;
+ clock-names = "apb_pclk";
+ };
+
gpio0: gpio@e8a0b000 {
compatible = "arm,pl061", "arm,primecell";
reg = <0 0xe8a0b000 0 0x1000>;
--
2.10.2
[PATCH v4 12/20] arm64: dts: hi3660: add spi device nodes
From: Wang Xiaoyin
Add spi2 and spi3 device nodes for hi3660, and enable them for hikey960.
On HiKey960:
- SPI2 is wired out through low speed expansion connector.
- SPI3 is wired out through high speed expansion connector.
Signed-off-by: Wang Xiaoyin
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 12 +
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 30 +++
2 files changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 9ecf6c6..ca448f0 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -142,3 +142,15 @@
label = "LS-UART1";
status = "okay";
};
+
+&spi2 {
+ /* On Low speed expansion */
+ label = "LS-SPI0";
+ status = "okay";
+};
+
+&spi3 {
+ /* On High speed expansion */
+ label = "HS-SPI1";
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 3b2a3a7..a6b91f1 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -713,5 +713,35 @@
clocks = <&sctrl HI3660_PCLK_AO_GPIO6>;
clock-names = "apb_pclk";
};
+
+ spi2: spi@ffd68000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x0 0xffd68000 0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>;
+ clock-names = "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pmx_func>;
+ num-cs = <1>;
+ cs-gpios = <&gpio27 2 0>;
+ status = "disabled";
+ };
+
+ spi3: spi@ff3b3000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x0 0xff3b3000 0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>;
+ clock-names = "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi3_pmx_func>;
+ num-cs = <1>;
+ cs-gpios = <&gpio18 5 0>;
+ status = "disabled";
+ };
};
};
--
2.10.2
[PATCH v4 19/20] arm64: dts: hi3660: add sd/sdio device nodes
From: Li Wei
Add sd/sdio device nodes for hi3660 soc
Signed-off-by: Li Wei
Signed-off-by: Chen Jun
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 8
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 58 +++
2 files changed, 66 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index e579333..cec0b60 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -18,6 +18,8 @@
compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
aliases {
+ mshc1 = &dwmmc1;
+ mshc2 = &dwmmc2;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -200,3 +202,9 @@
label = "HS-SPI1";
status = "okay";
};
+
+&dwmmc1 {
+ vmmc-supply = <&ldo16>;
+ vqmmc-supply = <&ldo9>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 529cf08..f7ff593 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -786,5 +786,63 @@
reset-gpios = <&gpio11 1 0 >;
status = "ok";
};
+
+ /* SD */
+ dwmmc1: dwmmc1@ff37f000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cd-inverted;
+ compatible = "hisilicon,hi3660-dw-mshc";
+ num-slots = <1>;
+ bus-width = <0x4>;
+ disable-wp;
+ cap-sd-highspeed;
+ supports-highspeed;
+ card-detect-delay = <200>;
+ reg = <0x0 0xff37f000 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_SD>,
+ <&crg_ctrl HI3660_HCLK_GATE_SD>;
+ clock-names = "ciu", "biu";
+ clock-frequency = <320>;
+ resets = <&crg_rst 0x94 18>;
+ cd-gpios = <&gpio25 3 0>;
+ hisilicon,peripheral-syscon = <&sctrl>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd_pmx_func
+&sd_clk_cfg_func
+&sd_cfg_func>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ status = "disabled";
+
+ slot@0 {
+ reg = <0x0>;
+ bus-width = <4>;
+ disable-wp;
+ };
+ };
+
+ /* SDIO */
+ dwmmc2: dwmmc2@ff3ff000 {
+ compatible = "hisilicon,hi3660-dw-mshc";
+ reg = <0x0 0xff3ff000 0x0 0x1000>;
+ interrupts = ;
+ num-slots = <1>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_SDIO0>,
+<&crg_ctrl HI3660_HCLK_GATE_SDIO0>;
+ clock-names = "ciu", "biu";
+ resets = <&crg_rst 0x94 20>;
+ card-detect-delay = <200>;
+ supports-highspeed;
+ keep-power-in-suspend;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio_pmx_func
+&sdio_clk_cfg_func
+&sdio_cfg_func>;
+ status = "disabled";
+ };
};
};
--
2.10.2
[PATCH v4 20/20] arm64: dts: hi3660-hikey960: add nodes for WiFi
Add nodes for WiFi. HiKey960 is using TI WL1837MOD module.
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 33 +++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index cec0b60..6609b0f 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -145,6 +145,20 @@
};
};
};
+
+ wlan_en: wlan-en-1-8v {
+ compatible = "regulator-fixed";
+ regulator-name = "wlan-en-regulator";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+
+ /* GPIO_051_WIFI_EN */
+ gpio = <&gpio6 3 0>;
+
+ /* WLAN card specific delay */
+ startup-delay-us = <7>;
+ enable-active-high;
+ };
};
&i2c0 {
@@ -208,3 +222,22 @@
vqmmc-supply = <&ldo9>;
status = "okay";
};
+
+&dwmmc2 { /* WIFI */
+ broken-cd;
+ /* WL_EN */
+ vmmc-supply = <&wlan_en>;
+ ti,non-removable;
+ non-removable;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ status = "ok";
+
+ wlcore: wlcore@2 {
+ compatible = "ti,wl1837";
+ reg = <2>; /* sdio func num */
+ /* WL_IRQ, GPIO_179_WL_WAKEUP_AP */
+ interrupt-parent = <&gpio22>;
+ interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+ };
+};
--
2.10.2
[PATCH v4 17/20] arm64: dts: hikey960: add device node for pmic and regulators
From: Wang Xiaoyin
add device node for hi6421 pmic core and hi6421v530
voltage regulator,include LDO(1,3,9,11,15,16)
Signed-off-by: Wang Xiaoyin
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 46 +++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index ca448f0..e579333 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -97,6 +97,52 @@
default-state = "off";
};
};
+
+ pmic: pmic@fff34000 {
+ compatible = "hisilicon,hi6421v530-pmic";
+ reg = <0x0 0xfff34000 0x0 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ regulators {
+ ldo3: LDO3 { /* HDMI */
+ regulator-name = "VOUT3_1V85";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <220>;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo9: LDO9 { /* SDCARD I/O */
+ regulator-name = "VOUT9_1V8_2V95";
+ regulator-min-microvolt = <175>;
+ regulator-max-microvolt = <330>;
+ regulator-enable-ramp-delay = <240>;
+ };
+
+ ldo11: LDO11 { /* Low Speed Connector */
+ regulator-name = "VOUT11_1V8_2V95";
+ regulator-min-microvolt = <175>;
+ regulator-max-microvolt = <330>;
+ regulator-enable-ramp-delay = <240>;
+ };
+
+ ldo15: LDO15 { /* UFS VCC */
+ regulator-name = "VOUT15_3V0";
+ regulator-min-microvolt = <175>;
+ regulator-max-microvolt = <300>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo16: LDO16 { /* SD VDD */
+ regulator-name = "VOUT16_2V95";
+ regulator-min-microvolt = <175>;
+ regulator-max-microvolt = <300>;
+ regulator-enable-ramp-delay = <360>;
+ };
+ };
+ };
};
&i2c0 {
--
2.10.2
[PATCH v4 18/20] dt-bindings: mmc: dw_mmc-k3: add document of hi3660 mmc
Add bindings for hi3660 mmc support Signed-off-by: Li Wei Signed-off-by: Guodong Xu --- Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt index df37058..8af1afc 100644 --- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt @@ -12,6 +12,7 @@ extensions to the Synopsys Designware Mobile Storage Host Controller. Required Properties: * compatible: should be one of the following. + - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions. - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. -- 2.10.2
[PATCH v4 15/20] arm64: dts: hisi: add kirin pcie node
From: Xiaowei Song
Add PCIe node for hi3660, and add binding documentation.
Cc: Guodong Xu
Signed-off-by: Xiaowei Song
Acked-by: Arnd Bergmann
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 32 +++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index e138973..529cf08 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -754,5 +754,37 @@
cs-gpios = <&gpio18 5 0>;
status = "disabled";
};
+
+ pcie@f400 {
+ compatible = "hisilicon,kirin960-pcie";
+ reg = <0x0 0xf400 0x0 0x1000>,
+ <0x0 0xff3fe000 0x0 0x1000>,
+ <0x0 0xf3f2 0x0 0x4>,
+ <0x0 0xf500 0x0 0x2000>;
+ reg-names = "dbi", "apb", "phy", "config";
+ bus-range = <0x0 0x1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x0200 0x0 0x 0x0
+ 0xf600 0x0 0x200>;
+ num-lanes = <1>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0x0 0 0 1 &gic 0 0 0 282 4>,
+ <0x0 0 0 2 &gic 0 0 0 283 4>,
+ <0x0 0 0 3 &gic 0 0 0 284 4>,
+ <0x0 0 0 4 &gic 0 0 0 285 4>;
+ clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
+<&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
+<&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
+<&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
+<&crg_ctrl HI3660_ACLK_GATE_PCIE>;
+ clock-names = "pcie_phy_ref", "pcie_aux",
+ "pcie_apb_phy", "pcie_apb_sys",
+ "pcie_aclk";
+ reset-gpios = <&gpio11 1 0 >;
+ status = "ok";
+ };
};
};
--
2.10.2
[PATCH v4 16/20] dt-bindings: mfd: hi6421: Add hi6421v530 compatible string
Add compatible string for HiSilicon Hi6421v530 PMIC. Signed-off-by: Guodong Xu Acked-for-mfd-by: Lee Jones Acked-by: Arnd Bergmann --- Documentation/devicetree/bindings/mfd/hi6421.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/hi6421.txt b/Documentation/devicetree/bindings/mfd/hi6421.txt index 0d5a446..22da96d 100644 --- a/Documentation/devicetree/bindings/mfd/hi6421.txt +++ b/Documentation/devicetree/bindings/mfd/hi6421.txt @@ -1,7 +1,9 @@ * HI6421 Multi-Functional Device (MFD), by HiSilicon Ltd. Required parent device properties: -- compatible : contains "hisilicon,hi6421-pmic"; +- compatible: One of the following chip-specific strings: + "hisilicon,hi6421-pmic"; + "hisilicon,hi6421v530-pmic"; - reg : register range space of hi6421; Supported Hi6421 sub-devices include: -- 2.10.2
[PATCH v4 13/20] arm64: dts: hi3660: add sp804 timer node
From: Leo Yan
The Hi3660 SoC comes with the sp804 timer in addition to the
architecture timers. These ones are shutdown when reaching a deep idle
states and a backup timer is needed. The sp804 belongs to another power
domain and can fulfill the purpose of replacing temporarily an
architecture timer when the CPU is idle.
Describe it in the device tree, so it can be enabled at boot time.
Suggested-by: Daniel Lezcano
Acked-by: Daniel Lezcano
Signed-off-by: Leo Yan
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index a6b91f1..e138973 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -186,6 +186,17 @@
#reset-cells = <2>;
};
+ dual_timer0: timer@fff14000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x0 0xfff14000 0x0 0x1000>;
+ interrupts = ,
+;
+ clocks = <&crg_ctrl HI3660_OSC32K>,
+<&crg_ctrl HI3660_OSC32K>,
+<&crg_ctrl HI3660_OSC32K>;
+ clock-names = "timer1", "timer2", "apb_pclk";
+ };
+
i2c0: i2c@ffd71000 {
compatible = "snps,designware-i2c";
reg = <0x0 0xffd71000 0x0 0x1000>;
--
2.10.2
[PATCH v4 14/20] dt-bindings: PCI: hisi: Add document for PCIe of Kirin SoCs
From: Xiaowei Song
This patch adds document for PCIe of Kirin SoC series.
Signed-off-by: Xiaowei Song
Acked-by: Rob Herring
---
.../devicetree/bindings/pci/kirin-pcie.txt | 50 ++
1 file changed, 50 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/kirin-pcie.txt
diff --git a/Documentation/devicetree/bindings/pci/kirin-pcie.txt
b/Documentation/devicetree/bindings/pci/kirin-pcie.txt
new file mode 100644
index 000..68ffa0f
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/kirin-pcie.txt
@@ -0,0 +1,50 @@
+HiSilicon Kirin SoCs PCIe host DT description
+
+Kirin PCIe host controller is based on Designware PCI core.
+It shares common functions with PCIe Designware core driver
+and inherits common properties defined in
+Documentation/devicetree/bindings/pci/designware-pci.txt.
+
+Additional properties are described here:
+
+Required properties
+- compatible:
+ "hisilicon,kirin960-pcie" for PCIe of Kirin960 SoC
+- reg: Should contain rc_dbi, apb, phy, config registers location and length.
+- reg-names: Must include the following entries:
+ "dbi": controller configuration registers;
+ "apb": apb Ctrl register defined by Kirin;
+ "phy": apb PHY register defined by Kirin;
+ "config": PCIe configuration space registers.
+- reset-gpios: The gpio to generate PCIe perst assert and deassert signal.
+
+Optional properties:
+
+Example based on kirin960:
+
+ pcie@f400 {
+ compatible = "hisilicon,kirin-pcie";
+ reg = <0x0 0xf400 0x0 0x1000>, <0x0 0xff3fe000 0x0 0x1000>,
+ <0x0 0xf3f2 0x0 0x4>, <0x0 0xF400 0 0x2000>;
+ reg-names = "dbi","apb","phy", "config";
+ bus-range = <0x0 0x1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x0200 0x0 0x 0x0 0xf500 0x0
0x200>;
+ num-lanes = <1>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0x0 0 0 1 &gic 0 0 0 282 4>,
+ <0x0 0 0 2 &gic 0 0 0 283 4>,
+ <0x0 0 0 3 &gic 0 0 0 284 4>,
+ <0x0 0 0 4 &gic 0 0 0 285 4>;
+ clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
+<&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
+<&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
+<&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
+<&crg_ctrl HI3660_ACLK_GATE_PCIE>;
+ clock-names = "pcie_phy_ref", "pcie_aux",
+ "pcie_apb_phy", "pcie_apb_sys", "pcie_aclk";
+ reset-gpios = <&gpio11 1 0 >;
+ };
--
2.10.2
[PATCH v4 11/20] arm64: dts: hikey960: add LED nodes
HiKey960 has four user LEDs, and two special purpose LEDs: WiFi and BT
respectively.
All of them are implemented as GPIO.
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 48 +++
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 7aac35b..9ecf6c6 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -49,6 +49,54 @@
linux,code = ;
};
};
+
+ leds {
+ compatible = "gpio-leds";
+
+ user_led1 {
+ label = "user_led1";
+ /* gpio_150_user_led1 */
+ gpios = <&gpio18 6 0>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ user_led2 {
+ label = "user_led2";
+ /* gpio_151_user_led2 */
+ gpios = <&gpio18 7 0>;
+ linux,default-trigger = "mmc0";
+ };
+
+ user_led3 {
+ label = "user_led3";
+ /* gpio_189_user_led3 */
+ gpios = <&gpio23 5 0>;
+ default-state = "off";
+ };
+
+ user_led4 {
+ label = "user_led4";
+ /* gpio_190_user_led4 */
+ gpios = <&gpio23 6 0>;
+ linux,default-trigger = "cpu0";
+ };
+
+ wlan_active_led {
+ label = "wifi_active";
+ /* gpio_205_wifi_active */
+ gpios = <&gpio25 5 0>;
+ linux,default-trigger = "phy0tx";
+ default-state = "off";
+ };
+
+ bt_active_led {
+ label = "bt_active";
+ gpios = <&gpio25 7 0>;
+ /* gpio_207_user_led1 */
+ linux,default-trigger = "hci0-power";
+ default-state = "off";
+ };
+ };
};
&i2c0 {
--
2.10.2
[PATCH v4 06/20] arm64: dts: hi3660: add gpio dtsi file for Hisilicon Hi3660 SOC
From: Wang Xiaoyin
This patch adds pl061 device nodes for Hi3660 SoC.
Signed-off-by: Wang Xiaoyin
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 380 ++
1 file changed, 380 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 9abe84e..b03be4d 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -251,5 +251,385 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ gpio0: gpio@e8a0b000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0 0xe8a0b000 0 0x1000>;
+ interrupts = ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pmx0 1 0 7>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&crg_ctrl HI3660_PCLK_GPIO0>;
+ clock-names = "apb_pclk";
+ };
+
+ gpio1: gpio@e8a0c000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0 0xe8a0c000 0 0x1000>;
+ interrupts = ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pmx0 1 7 7>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&crg_ctrl HI3660_PCLK_GPIO1>;
+ clock-names = "apb_pclk";
+ };
+
+ gpio2: gpio@e8a0d000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0 0xe8a0d000 0 0x1000>;
+ interrupts = ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 14 8>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&crg_ctrl HI3660_PCLK_GPIO2>;
+ clock-names = "apb_pclk";
+ };
+
+ gpio3: gpio@e8a0e000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0 0xe8a0e000 0 0x1000>;
+ interrupts = ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 22 8>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&crg_ctrl HI3660_PCLK_GPIO3>;
+ clock-names = "apb_pclk";
+ };
+
+ gpio4: gpio@e8a0f000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0 0xe8a0f000 0 0x1000>;
+ interrupts = ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 30 8>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&crg_ctrl HI3660_PCLK_GPIO4>;
+ clock-names = "apb_pclk";
+ };
+
+ gpio5: gpio@e8a1 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0 0xe8a1 0 0x1000>;
+ interrupts = ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 38 8>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&crg_ctrl HI3660_PCLK_GPIO5>;
+ clock-names = "apb_pclk";
+ };
+
+ gpio6: gpio@e8a11000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0 0xe8a11000 0 0x1000>;
+ interrupts = ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 46 8>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&crg_ctrl HI3660_PCLK_GPIO6>;
+ clock-names = "apb_pclk";
+ };
+
+ gpio7: gpio@e8a12000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0 0xe8a12000 0 0x1000>;
+ interrupts = ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 54 8>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
[PATCH v4 08/20] arm64: dts: hikey960: add WL1837 Bluetooth device node
This adds the serial slave device for the WL1837 Bluetooth interface.
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 0a3f2e0..c25fff9 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -9,6 +9,7 @@
#include "hi3660.dtsi"
#include "hikey960-pinctrl.dtsi"
+#include
/ {
model = "HiKey960";
@@ -63,6 +64,16 @@
status = "okay";
};
+&uart4 {
+ status = "okay";
+
+ bluetooth {
+ compatible = "ti,wl1837-st";
+ enable-gpios = <&gpio15 6 GPIO_ACTIVE_HIGH>;
+ max-speed = <921600>;
+ };
+};
+
&uart6 {
/* On Low speed expansion */
label = "LS-UART1";
--
2.10.2
[PATCH v4 07/20] arm64: dts: hi3660: Add uarts nodes
From: Chen Feng
Add nodes uart0 to uart4 and uart6 for hi3660 SoC.
Enable uart3 and uart6, disable uart5, in hikey960 board dts.
On HiKey960:
- UART6 is used as default console, and is wired out through low speed
expansion connector.
- UART3 has RTS/CTS hardware handshake, and is wired out through low
speed expansion connector.
- UART5 is not used in commercial launched boards. So disable it.
- UART4 is connected to Bluetooth, WL1837.
Signed-off-by: Chen Feng
Signed-off-by: Wang Xiaoyin
Signed-off-by: Guodong Xu
Reviewed-by: Zhangfei Gao
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 20 +-
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 74 +++
2 files changed, 91 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 1a4d6c5..0a3f2e0 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -15,11 +15,17 @@
compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
aliases {
- serial5 = &uart5; /* console UART */
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ serial5 = &uart5;
+ serial6 = &uart6;
};
chosen {
- stdout-path = "serial5:115200n8";
+ stdout-path = "serial6:115200n8";
};
memory@0 {
@@ -51,6 +57,14 @@
status = "okay";
};
-&uart5 {
+&uart3 {
+ /* On Low speed expansion */
+ label = "LS-UART0";
+ status = "okay";
+};
+
+&uart6 {
+ /* On Low speed expansion */
+ label = "LS-UART1";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index b03be4d..7a90c92 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -242,6 +242,66 @@
status = "disabled";
};
+ uart0: serial@fdf02000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0xfdf02000 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
+<&crg_ctrl HI3660_PCLK>;
+ clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
+ status = "disabled";
+ };
+
+ uart1: serial@fdf0 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0xfdf0 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_UART1>,
+<&crg_ctrl HI3660_CLK_GATE_UART1>;
+ clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
+ status = "disabled";
+ };
+
+ uart2: serial@fdf03000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0xfdf03000 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_UART2>,
+<&crg_ctrl HI3660_PCLK>;
+ clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
+ status = "disabled";
+ };
+
+ uart3: serial@ffd74000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0xffd74000 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_FACTOR_UART3>,
+<&crg_ctrl HI3660_PCLK>;
+ clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pmx_func &uar
[PATCH v4 10/20] arm64: dts: hi3660: add power key dts node
From: Chen Jun
We use gpio_034 as power key on hikey960, and set gpio with pull-up
state, when key press the voltage on the gpio will come to lower, and
power key event will be reported.
Signed-off-by: Chen Jun
Signed-off-by: John Stultz
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index c25fff9..7aac35b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -10,6 +10,8 @@
#include "hi3660.dtsi"
#include "hikey960-pinctrl.dtsi"
#include
+#include
+#include
/ {
model = "HiKey960";
@@ -34,6 +36,19 @@
/* rewrite this at bootloader */
reg = <0x0 0x0 0x0 0x0>;
};
+
+ keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_key_pmx_func &pwr_key_cfg_func>;
+
+ power {
+ wakeup-source;
+ gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
+ label = "GPIO Power";
+ linux,code = ;
+ };
+ };
};
&i2c0 {
--
2.10.2
[PATCH v4 05/20] arm64: dts: Add I2C nodes for Hi3660
From: Zhangfei Gao
Add I2C nodes for Hi3660-hikey960.
On HiKey960,
I2C0, I2C7 are connected to Low Speed Expansion Connector.
I2C1 is connected to ADV7535.
I2C3 is connected to USB5734.
Cc: Jarkko Nikula
Signed-off-by: Zhangfei Gao
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 22 +
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 56 +++
2 files changed, 78 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 64875a5..1a4d6c5 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -29,6 +29,28 @@
};
};
+&i2c0 {
+ /* On Low speed expansion */
+ label = "LS-I2C0";
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+
+ adv7533: adv7533@39 {
+ status = "ok";
+ compatible = "adi,adv7533";
+ reg = <0x39>;
+ };
+};
+
+&i2c7 {
+ /* On Low speed expansion */
+ label = "LS-I2C1";
+ status = "okay";
+};
+
&uart5 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index f55710a..9abe84e 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -186,6 +186,62 @@
#reset-cells = <2>;
};
+ i2c0: i2c@ffd71000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xffd71000 0x0 0x1000>;
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_I2C0>;
+ resets = <&iomcu_rst 0x20 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@ffd72000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xffd72000 0x0 0x1000>;
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_I2C1>;
+ resets = <&iomcu_rst 0x20 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@fdf0c000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xfdf0c000 0x0 0x1000>;
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_I2C3>;
+ resets = <&crg_rst 0x78 7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pmx_func &i2c3_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c7: i2c@fdf0b000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xfdf0b000 0x0 0x1000>;
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_I2C7>;
+ resets = <&crg_rst 0x60 14>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c7_pmx_func &i2c7_cfg_func>;
+ status = "disabled";
+ };
+
uart5: serial@fdf05000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xfdf05000 0x0 0x1000>;
--
2.10.2
[PATCH v4 03/20] arm64: dts: hikey960: pinctrl: add more pinmux and pinconfig
From: Wang Xiaoyin
This commit adds more pinmux and pinctrl information for devices
on HiKey960, including i2c, spi, cam, uart, ufs, pcie, csi, pwr_key,
isp, sd/sdio, i2s, and usb.
Signed-off-by: Wang Xiaoyin
Signed-off-by: Chen Jun
Signed-off-by: Guodong Xu
Acked-by: Rob Herring
---
.../arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi | 778 +++--
1 file changed, 715 insertions(+), 63 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
b/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
index 719c4bc..7e542d2 100644
--- a/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
@@ -24,6 +24,27 @@
&range 0 7 0
&range 8 116 0>;
+ pmu_pmx_func: pmu_pmx_func {
+ pinctrl-single,pins = <
+ 0x008 MUX_M1 /* PMU1_SSI */
+ 0x00c MUX_M1 /* PMU2_SSI */
+ 0x010 MUX_M1 /* PMU_CLKOUT */
+ 0x100 MUX_M1 /* PMU_HKADC_SSI */
+ >;
+ };
+
+ csi0_pwd_n_pmx_func: csi0_pwd_n_pmx_func {
+ pinctrl-single,pins = <
+ 0x044 MUX_M0 /* CSI0_PWD_N */
+ >;
+ };
+
+ csi1_pwd_n_pmx_func: csi1_pwd_n_pmx_func {
+ pinctrl-single,pins = <
+ 0x04c MUX_M0 /* CSI1_PWD_N */
+ >;
+ };
+
isp0_pmx_func: isp0_pmx_func {
pinctrl-single,pins = <
0x058 MUX_M1 /* ISP_CLK0 */
@@ -40,6 +61,12 @@
>;
};
+ pwr_key_pmx_func: pwr_key_pmx_func {
+ pinctrl-single,pins = <
+ 0x080 MUX_M0 /* GPIO_034 */
+ >;
+ };
+
i2c3_pmx_func: i2c3_pmx_func {
pinctrl-single,pins = <
0x02c MUX_M1 /* I2C3_SCL */
@@ -67,21 +94,10 @@
>;
};
- spi1_pmx_func: spi1_pmx_func {
- pinctrl-single,pins = <
- 0x034 MUX_M1 /* SPI1_CLK */
- 0x038 MUX_M1 /* SPI1_DI */
- 0x03c MUX_M1 /* SPI1_DO */
- 0x040 MUX_M1 /* SPI1_CS_N */
- >;
- };
-
uart0_pmx_func: uart0_pmx_func {
pinctrl-single,pins = <
0x0cc MUX_M2 /* UART0_RXD */
0x0d0 MUX_M2 /* UART0_TXD */
- 0x0d4 MUX_M2 /* UART0_RXD_M */
- 0x0d8 MUX_M2 /* UART0_TXD_M */
>;
};
@@ -138,6 +154,18 @@
0x0d8 MUX_M1 /* UART6_TXD */
>;
};
+
+ cam0_rst_pmx_func: cam0_rst_pmx_func {
+ pinctrl-single,pins = <
+ 0x0c8 MUX_M0 /* CAM0_RST */
+ >;
+ };
+
+ cam1_rst_pmx_func: cam1_rst_pmx_func {
+ pinctrl-single,pins = <
+ 0x124 MUX_M0 /* CAM1_RST */
+ >;
+ };
};
/* [IOMG_MMC0_000, IOMG_MMC0_005] */
@@ -174,6 +202,13 @@
/* pin base, nr pins & gpio function */
pinctrl-single,gpio-range = <&range 0 12 0>;
+ ufs_pmx_func: ufs_pmx_func {
+ pinctrl-single,pins = <
+ 0x000 MUX_M1 /* UFS_REF_CLK */
+ 0x004 MUX_M1 /* UFS_RST_N */
+ >;
+ };
+
spi3_pmx_func: spi3_pmx_func {
pinctrl-single,pins = <
0x008 MUX_M1 /* SPI3_CLK */
@@ -248,17 +283,17 @@
[PATCH v4 02/20] arm64: dts: hisilicon: update compatible string for hikey960
Update compatible string for hikey960. HiKey960 is a develpment board built
with SoC Hi3660.
Signed-off-by: Guodong Xu
Signed-off-by: Chen Feng
Acked-by: Rob Herring
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 186251f..64875a5 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -12,7 +12,7 @@
/ {
model = "HiKey960";
- compatible = "hisilicon,hi3660";
+ compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
aliases {
serial5 = &uart5; /* console UART */
--
2.10.2
[PATCH v4 04/20] arm64: dts: hi3660: add resources for clock and reset
From: Zhangfei Gao
Add some resource nodes for clock and reset
Signed-off-by: Zhangfei Gao
Acked-by: Rob Herring
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 53 +++
1 file changed, 46 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 3983086..f55710a 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -5,6 +5,7 @@
*/
#include
+#include
/ {
compatible = "hisilicon,hi3660";
@@ -141,18 +142,56 @@
#size-cells = <2>;
ranges;
- fixed_uart5: fixed_19_2M {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1920>;
- clock-output-names = "fixed:uart5";
+ crg_ctrl: crg_ctrl@fff35000 {
+ compatible = "hisilicon,hi3660-crgctrl", "syscon";
+ reg = <0x0 0xfff35000 0x0 0x1000>;
+ #clock-cells = <1>;
};
- uart5: uart@fdf05000 {
+ crg_rst: crg_rst_controller {
+ compatible = "hisilicon,hi3660-reset";
+ #reset-cells = <2>;
+ hisi,rst-syscon = <&crg_ctrl>;
+ };
+
+
+ pctrl: pctrl@e8a09000 {
+ compatible = "hisilicon,hi3660-pctrl", "syscon";
+ reg = <0x0 0xe8a09000 0x0 0x2000>;
+ #clock-cells = <1>;
+ };
+
+ pmuctrl: crg_ctrl@fff34000 {
+ compatible = "hisilicon,hi3660-pmuctrl", "syscon";
+ reg = <0x0 0xfff34000 0x0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ sctrl: sctrl@fff0a000 {
+ compatible = "hisilicon,hi3660-sctrl", "syscon";
+ reg = <0x0 0xfff0a000 0x0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ iomcu: iomcu@ffd7e000 {
+ compatible = "hisilicon,hi3660-iomcu", "syscon";
+ reg = <0x0 0xffd7e000 0x0 0x1000>;
+ #clock-cells = <1>;
+
+ };
+
+ iomcu_rst: reset {
+ compatible = "hisilicon,hi3660-reset";
+ hisi,rst-syscon = <&iomcu>;
+ #reset-cells = <2>;
+ };
+
+ uart5: serial@fdf05000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xfdf05000 0x0 0x1000>;
interrupts = ;
- clocks = <&fixed_uart5 &fixed_uart5>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>,
+<&crg_ctrl HI3660_CLK_GATE_UART5>;
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
--
2.10.2
[PATCH v4 01/20] dt-bindings: arm: hisilicon: add bindings for HiKey960 board
Add bindings for HiKey960 Board. Signed-off-by: Guodong Xu Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt index 2e73215..7111fbc8 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt @@ -4,6 +4,10 @@ Hi3660 SoC Required root node properties: - compatible = "hisilicon,hi3660"; +HiKey960 Board +Required root node properties: + - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; + Hi3798cv200 SoC Required root node properties: - compatible = "hisilicon,hi3798cv200"; -- 2.10.2
[PATCH v4 00/20] arm64: dts: hi3660: add device nodes
This patchset adds various devices nodes for hi3660 and hikey960. HiKey960 is one of 96boards. For details information about it, please refer to [1]. In v4, I removed cpuidle patch * (v3-0014-arm64-dts-hi3660-enable-idle-states.patch) , since we are not sure yet whether the corresponding driver can get into mainline. Sorry about the noise. * Other patches are not changed. In v3, * nothing is changed for patches already exists in v2. * added 9 more dts patches. Most of them already were reviewed with their corresponding driver patchset. For purpose of easy integration for platform maintainer, I copied them here, including threads [2], [3], and [4]. * four patches, this is the first time they are sent out for review. v3-0014-arm64-dts-hi3660-enable-idle-states.patch v3-0019-dt-bindings-mmc-dw_mmc-k3-add-document-of-hi3660-.patch v3-0020-arm64-dts-hi3660-add-sd-sdio-device-nodes.patch v3-0021-arm64-dts-hi3660-hikey960-add-nodes-for-WiFi.patch mmc driver is under review in [5]. In v2, incorporated review comments from Rob Herring * uart4: max-speed should be in slave device bluetooth node * LEDs: - bt_active triggered by 'hci0-power' - move out of SoC level * pinctrl: update dts to use #pinctrl-cells * uart: add pinctrl information into uart nodes; add label strings. * chosen: update stdout-path. serial6 is used. * i2c: add label strings. change reg address to lower case. * remove unnecessary status="ok" * gpio-keys: move out of SoC level. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 [2] sp804 timer: https://www.spinics.net/lists/kernel/msg2513025.html [3] PCIe: https://www.spinics.net/lists/kernel/msg2520677.html [4] mfd and regulator: https://www.spinics.net/lists/arm-kernel/msg586147.html [5] mmc: https://patchwork.kernel.org/patch/9783273/ Chen Feng (2): arm64: dts: hi3660: Add uarts nodes arm64: dts: hi3660: Add pl031 rtc node Chen Jun (1): arm64: dts: hi3660: add power key dts node Guodong Xu (7): dt-bindings: arm: hisilicon: add bindings for HiKey960 board arm64: dts: hisilicon: update compatible string for hikey960 arm64: dts: hikey960: add WL1837 Bluetooth device node arm64: dts: hikey960: add LED nodes dt-bindings: mfd: hi6421: Add hi6421v530 compatible string dt-bindings: mmc: dw_mmc-k3: add document of hi3660 mmc arm64: dts: hi3660-hikey960: add nodes for WiFi Leo Yan (1): arm64: dts: hi3660: add sp804 timer node Li Wei (1): arm64: dts: hi3660: add sd/sdio device nodes Wang Xiaoyin (4): arm64: dts: hikey960: pinctrl: add more pinmux and pinconfig arm64: dts: hi3660: add gpio dtsi file for Hisilicon Hi3660 SOC arm64: dts: hi3660: add spi device nodes arm64: dts: hikey960: add device node for pmic and regulators Xiaowei Song (2): dt-bindings: PCI: hisi: Add document for PCIe of Kirin SoCs arm64: dts: hisi: add kirin pcie node Zhangfei Gao (2): arm64: dts: hi3660: add resources for clock and reset arm64: dts: Add I2C nodes for Hi3660 .../bindings/arm/hisilicon/hisilicon.txt | 4 + Documentation/devicetree/bindings/mfd/hi6421.txt | 4 +- .../devicetree/bindings/mmc/k3-dw-mshc.txt | 1 + .../devicetree/bindings/pci/kirin-pcie.txt | 50 ++ arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 217 +- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 702 ++- .../arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi | 778 +++-- 7 files changed, 1681 insertions(+), 75 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/kirin-pcie.txt -- 2.10.2
Re: [PATCH v3 14/21] arm64: dts: hi3660: enable idle states
On Thu, Jun 15, 2017 at 8:23 AM, Leo Yan wrote: > On Wed, Jun 14, 2017 at 04:23:31PM +0800, Guodong Xu wrote: >> From: Leo Yan >> >> On Hi3660 there have two clusters, one is CA53 cluster and another is >> CA73 cluster. This two clusters have different idle states separately. >> With Daniel Lezcano's patch (ARM: cpuidle: Support asymmetric idle >> definition), now ARM idle driver can support different clusters with >> different idle states. >> >> Base on this, this patch is to bind two clusters idle states on Hi3660. >> Except the "WFI" states are enabled by default for all CPUs, this patch >> also binds below extra idle states: >> >> - CA53 CPUs have two more states: >> CPU_SLEEP: CPU power off state >> CLUSTER_SLEEP_0: Cluster power off state >> >> - CA73 CPUs have three more states: >> CPU_NAP: CPU retention state >> CPU_SLEEP: CPU power off state >> CLUSTER_SLEEP_1: Cluster power off state > > Hi Guodong, Wei and all, > > As Daniel reminded, this patch is dependent on patch (ARM: cpuidle: > Support asymmetric idle definition) [1] but his patch has not been > finally merged yet. So let us hold on this patch for Daniel's patch > is picked up firstly. > > At the meantime welcome the review and comment for this patch ahead. > Ok, so, I will drop this patch, and resend my patchset as v4. -Guodong > [1] https://patchwork.kernel.org/patch/9781869/ > > [...] > > Thanks, > Leo Yan
[PATCH] regulator: hi6421v530: Describe consumed platform device
The hi6421v530-regulator driver consumes a similarly named platform device.
Adding that to the module device table, allows modprobe to locate this
driver once the device is created.
Signed-off-by: Guodong Xu
---
drivers/regulator/hi6421v530-regulator.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/regulator/hi6421v530-regulator.c
b/drivers/regulator/hi6421v530-regulator.c
index 46bbba9..c09bc71 100644
--- a/drivers/regulator/hi6421v530-regulator.c
+++ b/drivers/regulator/hi6421v530-regulator.c
@@ -194,7 +194,14 @@ static int hi6421v530_regulator_probe(struct
platform_device *pdev)
return 0;
}
+static const struct platform_device_id hi6421v530_regulator_table[] = {
+ { .name = "hi6421v530-regulator" },
+ {},
+};
+MODULE_DEVICE_TABLE(platform, hi6421v530_regulator_table);
+
static struct platform_driver hi6421v530_regulator_driver = {
+ .id_table = hi6421v530_regulator_table,
.driver = {
.name = "hi6421v530-regulator",
},
--
2.10.2
[PATCH v3 03/21] arm64: dts: hikey960: pinctrl: add more pinmux and pinconfig
From: Wang Xiaoyin
This commit adds more pinmux and pinctrl information for devices
on HiKey960, including i2c, spi, cam, uart, ufs, pcie, csi, pwr_key,
isp, sd/sdio, i2s, and usb.
Signed-off-by: Wang Xiaoyin
Signed-off-by: Chen Jun
Signed-off-by: Guodong Xu
Acked-by: Rob Herring
---
.../arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi | 778 +++--
1 file changed, 715 insertions(+), 63 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
b/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
index 719c4bc..7e542d2 100644
--- a/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
@@ -24,6 +24,27 @@
&range 0 7 0
&range 8 116 0>;
+ pmu_pmx_func: pmu_pmx_func {
+ pinctrl-single,pins = <
+ 0x008 MUX_M1 /* PMU1_SSI */
+ 0x00c MUX_M1 /* PMU2_SSI */
+ 0x010 MUX_M1 /* PMU_CLKOUT */
+ 0x100 MUX_M1 /* PMU_HKADC_SSI */
+ >;
+ };
+
+ csi0_pwd_n_pmx_func: csi0_pwd_n_pmx_func {
+ pinctrl-single,pins = <
+ 0x044 MUX_M0 /* CSI0_PWD_N */
+ >;
+ };
+
+ csi1_pwd_n_pmx_func: csi1_pwd_n_pmx_func {
+ pinctrl-single,pins = <
+ 0x04c MUX_M0 /* CSI1_PWD_N */
+ >;
+ };
+
isp0_pmx_func: isp0_pmx_func {
pinctrl-single,pins = <
0x058 MUX_M1 /* ISP_CLK0 */
@@ -40,6 +61,12 @@
>;
};
+ pwr_key_pmx_func: pwr_key_pmx_func {
+ pinctrl-single,pins = <
+ 0x080 MUX_M0 /* GPIO_034 */
+ >;
+ };
+
i2c3_pmx_func: i2c3_pmx_func {
pinctrl-single,pins = <
0x02c MUX_M1 /* I2C3_SCL */
@@ -67,21 +94,10 @@
>;
};
- spi1_pmx_func: spi1_pmx_func {
- pinctrl-single,pins = <
- 0x034 MUX_M1 /* SPI1_CLK */
- 0x038 MUX_M1 /* SPI1_DI */
- 0x03c MUX_M1 /* SPI1_DO */
- 0x040 MUX_M1 /* SPI1_CS_N */
- >;
- };
-
uart0_pmx_func: uart0_pmx_func {
pinctrl-single,pins = <
0x0cc MUX_M2 /* UART0_RXD */
0x0d0 MUX_M2 /* UART0_TXD */
- 0x0d4 MUX_M2 /* UART0_RXD_M */
- 0x0d8 MUX_M2 /* UART0_TXD_M */
>;
};
@@ -138,6 +154,18 @@
0x0d8 MUX_M1 /* UART6_TXD */
>;
};
+
+ cam0_rst_pmx_func: cam0_rst_pmx_func {
+ pinctrl-single,pins = <
+ 0x0c8 MUX_M0 /* CAM0_RST */
+ >;
+ };
+
+ cam1_rst_pmx_func: cam1_rst_pmx_func {
+ pinctrl-single,pins = <
+ 0x124 MUX_M0 /* CAM1_RST */
+ >;
+ };
};
/* [IOMG_MMC0_000, IOMG_MMC0_005] */
@@ -174,6 +202,13 @@
/* pin base, nr pins & gpio function */
pinctrl-single,gpio-range = <&range 0 12 0>;
+ ufs_pmx_func: ufs_pmx_func {
+ pinctrl-single,pins = <
+ 0x000 MUX_M1 /* UFS_REF_CLK */
+ 0x004 MUX_M1 /* UFS_RST_N */
+ >;
+ };
+
spi3_pmx_func: spi3_pmx_func {
pinctrl-single,pins = <
0x008 MUX_M1 /* SPI3_CLK */
@@ -248,17 +283,17 @@
[PATCH v3 07/21] arm64: dts: hi3660: Add uarts nodes
From: Chen Feng
Add nodes uart0 to uart4 and uart6 for hi3660 SoC.
Enable uart3 and uart6, disable uart5, in hikey960 board dts.
On HiKey960:
- UART6 is used as default console, and is wired out through low speed
expansion connector.
- UART3 has RTS/CTS hardware handshake, and is wired out through low
speed expansion connector.
- UART5 is not used in commercial launched boards. So disable it.
- UART4 is connected to Bluetooth, WL1837.
Signed-off-by: Chen Feng
Signed-off-by: Wang Xiaoyin
Signed-off-by: Guodong Xu
Reviewed-by: Zhangfei Gao
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 20 +-
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 74 +++
2 files changed, 91 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 1a4d6c5..0a3f2e0 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -15,11 +15,17 @@
compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
aliases {
- serial5 = &uart5; /* console UART */
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ serial5 = &uart5;
+ serial6 = &uart6;
};
chosen {
- stdout-path = "serial5:115200n8";
+ stdout-path = "serial6:115200n8";
};
memory@0 {
@@ -51,6 +57,14 @@
status = "okay";
};
-&uart5 {
+&uart3 {
+ /* On Low speed expansion */
+ label = "LS-UART0";
+ status = "okay";
+};
+
+&uart6 {
+ /* On Low speed expansion */
+ label = "LS-UART1";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index b03be4d..7a90c92 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -242,6 +242,66 @@
status = "disabled";
};
+ uart0: serial@fdf02000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0xfdf02000 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
+<&crg_ctrl HI3660_PCLK>;
+ clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
+ status = "disabled";
+ };
+
+ uart1: serial@fdf0 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0xfdf0 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_UART1>,
+<&crg_ctrl HI3660_CLK_GATE_UART1>;
+ clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
+ status = "disabled";
+ };
+
+ uart2: serial@fdf03000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0xfdf03000 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_UART2>,
+<&crg_ctrl HI3660_PCLK>;
+ clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
+ status = "disabled";
+ };
+
+ uart3: serial@ffd74000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0xffd74000 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&crg_ctrl HI3660_FACTOR_UART3>,
+<&crg_ctrl HI3660_PCLK>;
+ clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pmx_func &uar
[PATCH v3 05/21] arm64: dts: Add I2C nodes for Hi3660
From: Zhangfei Gao
Add I2C nodes for Hi3660-hikey960.
On HiKey960,
I2C0, I2C7 are connected to Low Speed Expansion Connector.
I2C1 is connected to ADV7535.
I2C3 is connected to USB5734.
Cc: Jarkko Nikula
Signed-off-by: Zhangfei Gao
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 22 +
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 56 +++
2 files changed, 78 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 64875a5..1a4d6c5 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -29,6 +29,28 @@
};
};
+&i2c0 {
+ /* On Low speed expansion */
+ label = "LS-I2C0";
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+
+ adv7533: adv7533@39 {
+ status = "ok";
+ compatible = "adi,adv7533";
+ reg = <0x39>;
+ };
+};
+
+&i2c7 {
+ /* On Low speed expansion */
+ label = "LS-I2C1";
+ status = "okay";
+};
+
&uart5 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index f55710a..9abe84e 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -186,6 +186,62 @@
#reset-cells = <2>;
};
+ i2c0: i2c@ffd71000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xffd71000 0x0 0x1000>;
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_I2C0>;
+ resets = <&iomcu_rst 0x20 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@ffd72000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xffd72000 0x0 0x1000>;
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_I2C1>;
+ resets = <&iomcu_rst 0x20 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@fdf0c000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xfdf0c000 0x0 0x1000>;
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_I2C3>;
+ resets = <&crg_rst 0x78 7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pmx_func &i2c3_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c7: i2c@fdf0b000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xfdf0b000 0x0 0x1000>;
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_I2C7>;
+ resets = <&crg_rst 0x60 14>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c7_pmx_func &i2c7_cfg_func>;
+ status = "disabled";
+ };
+
uart5: serial@fdf05000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xfdf05000 0x0 0x1000>;
--
2.10.2
[PATCH v3 08/21] arm64: dts: hikey960: add WL1837 Bluetooth device node
This adds the serial slave device for the WL1837 Bluetooth interface.
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 0a3f2e0..c25fff9 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -9,6 +9,7 @@
#include "hi3660.dtsi"
#include "hikey960-pinctrl.dtsi"
+#include
/ {
model = "HiKey960";
@@ -63,6 +64,16 @@
status = "okay";
};
+&uart4 {
+ status = "okay";
+
+ bluetooth {
+ compatible = "ti,wl1837-st";
+ enable-gpios = <&gpio15 6 GPIO_ACTIVE_HIGH>;
+ max-speed = <921600>;
+ };
+};
+
&uart6 {
/* On Low speed expansion */
label = "LS-UART1";
--
2.10.2
