Re: [PATCH v19 4/6] misc: eeprom: at24: check suspend status before disable regulator
On Fri, Apr 16, 2021 at 10:09 PM Bartosz Golaszewski
wrote:
>
> On Wed, Apr 14, 2021 at 7:29 PM Hsin-Yi Wang wrote:
> >
> > cd5676db0574 ("misc: eeprom: at24: support pm_runtime control") disables
> > regulator in runtime suspend. If runtime suspend is called before
> > regulator disable, it will results in regulator unbalanced disabling.
> >
> > Signed-off-by: Hsin-Yi Wang
>
> Please add the Fixes tag.
>
Hi,
I resend the patch with the fix tag separately since other patches in
this series are not changed.
https://patchwork.ozlabs.org/project/linux-i2c/patch/20210420133050.377209-1-hsi...@chromium.org/
Thanks
> > ---
> > drivers/misc/eeprom/at24.c | 6 --
> > 1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
> > index 926408b41270..7a6f01ace78a 100644
> > --- a/drivers/misc/eeprom/at24.c
> > +++ b/drivers/misc/eeprom/at24.c
> > @@ -763,7 +763,8 @@ static int at24_probe(struct i2c_client *client)
> > at24->nvmem = devm_nvmem_register(dev, _config);
> > if (IS_ERR(at24->nvmem)) {
> > pm_runtime_disable(dev);
> > - regulator_disable(at24->vcc_reg);
> > + if (!pm_runtime_status_suspended(dev))
> > + regulator_disable(at24->vcc_reg);
> > return PTR_ERR(at24->nvmem);
> > }
> >
> > @@ -774,7 +775,8 @@ static int at24_probe(struct i2c_client *client)
> > err = at24_read(at24, 0, _byte, 1);
> > if (err) {
> > pm_runtime_disable(dev);
> > - regulator_disable(at24->vcc_reg);
> > + if (!pm_runtime_status_suspended(dev))
> > + regulator_disable(at24->vcc_reg);
> > return -ENODEV;
> > }
> >
> > --
> > 2.31.1.295.g9ea45b61b8-goog
> >
>
> Acked-by: Bartosz Golaszewski
[PATCH] misc: eeprom: at24: check suspend status before disable regulator
cd5676db0574 ("misc: eeprom: at24: support pm_runtime control") disables
regulator in runtime suspend. If runtime suspend is called before
regulator disable, it will results in regulator unbalanced disabling.
Fixes: cd5676db0574 ("misc: eeprom: at24: support pm_runtime control")
Signed-off-by: Hsin-Yi Wang
Acked-by: Bartosz Golaszewski
---
This patch is originally in
https://patchwork.kernel.org/project/linux-mediatek/patch/20210414172916.2689361-5-hsi...@chromium.org/
---
drivers/misc/eeprom/at24.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 926408b41270..7a6f01ace78a 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -763,7 +763,8 @@ static int at24_probe(struct i2c_client *client)
at24->nvmem = devm_nvmem_register(dev, _config);
if (IS_ERR(at24->nvmem)) {
pm_runtime_disable(dev);
- regulator_disable(at24->vcc_reg);
+ if (!pm_runtime_status_suspended(dev))
+ regulator_disable(at24->vcc_reg);
return PTR_ERR(at24->nvmem);
}
@@ -774,7 +775,8 @@ static int at24_probe(struct i2c_client *client)
err = at24_read(at24, 0, _byte, 1);
if (err) {
pm_runtime_disable(dev);
- regulator_disable(at24->vcc_reg);
+ if (!pm_runtime_status_suspended(dev))
+ regulator_disable(at24->vcc_reg);
return -ENODEV;
}
--
2.31.1.368.gbe11c130af-goog
Re: [PATCH 1/2] drm/mediatek: set panel orientation before drm_dev_register().
On Fri, Apr 9, 2021 at 12:53 PM Hsin-Yi Wang wrote:
>
> drm_dev_register() sets connector->registration_state to
> DRM_CONNECTOR_REGISTERED and dev->registered to true. If
> drm_connector_set_panel_orientation() is first called after
> drm_dev_register(), it will fail several checks and results in following
> warning. So set panel orientation in dsi before drm_dev_register() is
> called.
>
> [4.480976] [ cut here ]
> [4.485603] WARNING: CPU: 5 PID: 369 at
> drivers/gpu/drm/drm_mode_object.c:45 __drm_mode_object_add+0xb4/0xbc
>
> [4.609772] Call trace:
> [4.612208] __drm_mode_object_add+0xb4/0xbc
> [4.616466] drm_mode_object_add+0x20/0x2c
> [4.620552] drm_property_create+0xdc/0x174
> [4.624723] drm_property_create_enum+0x34/0x98
> [4.629241] drm_connector_set_panel_orientation+0x64/0xa0
> [4.634716] boe_panel_get_modes+0x88/0xd8
> [4.638802] drm_panel_get_modes+0x2c/0x48
> [4.642887] panel_bridge_get_modes+0x1c/0x28
> [4.647233] drm_bridge_connector_get_modes+0xa0/0xd4
> [4.652273] drm_helper_probe_single_connector_modes+0x218/0x700
> [4.658266] drm_mode_getconnector+0x1b4/0x45c
> [4.662699] drm_ioctl_kernel+0xac/0x128
> [4.11] drm_ioctl+0x268/0x410
> [4.670002] drm_compat_ioctl+0xdc/0xf0
> [4.673829] __arm64_compat_sys_ioctl+0xc8/0x100
> [4.678436] el0_svc_common+0xf4/0x1c0
> [4.682174] do_el0_svc_compat+0x28/0x3c
> [4.686088] el0_svc_compat+0x10/0x1c
> [4.689738] el0_sync_compat_handler+0xa8/0xcc
> [4.694171] el0_sync_compat+0x178/0x180
> [4.698082] ---[ end trace b4f2db9d9c88610b ]---
> [4.702721] [ cut here ]
> [4.707329] WARNING: CPU: 5 PID: 369 at
> drivers/gpu/drm/drm_mode_object.c:243 drm_object_attach_property+0x48/0xb8
>
> [4.833830] Call trace:
> [4.836266] drm_object_attach_property+0x48/0xb8
> [4.840958] drm_connector_set_panel_orientation+0x84/0xa0
> [4.846432] boe_panel_get_modes+0x88/0xd8
> [4.850516] drm_panel_get_modes+0x2c/0x48
> [4.854600] panel_bridge_get_modes+0x1c/0x28
> [4.858946] drm_bridge_connector_get_modes+0xa0/0xd4
> [4.863984] drm_helper_probe_single_connector_modes+0x218/0x700
> [4.869978] drm_mode_getconnector+0x1b4/0x45c
> [4.874410] drm_ioctl_kernel+0xac/0x128
> [4.878320] drm_ioctl+0x268/0x410
> [4.881711] drm_compat_ioctl+0xdc/0xf0
> [4.885536] __arm64_compat_sys_ioctl+0xc8/0x100
> [4.890142] el0_svc_common+0xf4/0x1c0
> [4.893879] do_el0_svc_compat+0x28/0x3c
> [4.897791] el0_svc_compat+0x10/0x1c
> [ 4.901441] el0_sync_compat_handler+0xa8/0xcc
> [4.905873] el0_sync_compat+0x178/0x180
> [4.909783] ---[ end trace b4f2db9d9c88610c ]---
>
> Signed-off-by: Hsin-Yi Wang
ping on the thread, thanks.
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index ae403c67cbd9..45a702ee09f3 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -205,6 +205,7 @@ struct mtk_dsi {
> u32 irq_data;
> wait_queue_head_t irq_wait_queue;
> const struct mtk_dsi_driver_data *driver_data;
> + enum drm_panel_orientation orientation;
> };
>
> static inline struct mtk_dsi *bridge_to_dsi(struct drm_bridge *b)
> @@ -966,6 +967,8 @@ static int mtk_dsi_encoder_init(struct drm_device *drm,
> struct mtk_dsi *dsi)
> }
> drm_connector_attach_encoder(dsi->connector, >encoder);
>
> + drm_connector_set_panel_orientation(dsi->connector, dsi->orientation);
> +
> return 0;
>
> err_cleanup_encoder:
> @@ -1029,6 +1032,12 @@ static int mtk_dsi_probe(struct platform_device *pdev)
> ret = PTR_ERR(dsi->next_bridge);
> goto err_unregister_host;
> }
> +
> + ret = of_drm_get_panel_orientation(panel->dev->of_node,
> >orientation);
> + if (ret) {
> + dev_err(dev, "failed to get panel orientation %d\n",
> ret);
> + return ret;
> + }
> }
>
> dsi->driver_data = of_device_get_match_data(dev);
> --
> 2.31.1.295.g9ea45b61b8-goog
>
Re: [PATCH 4/8] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-kenzo
On Fri, Apr 16, 2021 at 10:42 PM Matthias Brugger wrote: > > > > On 15/04/2021 11:35, Hsin-Yi Wang wrote: > > Kenzo is known as Acer Chromebook 311. > > > > Signed-off-by: Hsin-Yi Wang > > --- > > Documentation/devicetree/bindings/arm/mediatek.yaml | 6 -- > > 1 file changed, 4 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml > > b/Documentation/devicetree/bindings/arm/mediatek.yaml > > index 0870490aa350..39e4a99ebb37 100644 > > --- a/Documentation/devicetree/bindings/arm/mediatek.yaml > > +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml > > @@ -137,9 +137,11 @@ properties: > > items: > >- const: google,damu > >- const: mediatek,mt8183 > > - - description: Google Juniper (Acer Chromebook Spin 311) > > + - description: Google Juniper (Acer Chromebook Spin 311) / Kenzo > > (Acer Crhomebook 311) > > Crhomebook -> Chromebook :) Thanks. Fixed in v2. > > > items: > > - - const: google,juniper-sku16 > > + - enum: > > + - google,juniper-sku16 > > + - google,juniper-sku17 > >- const: google,juniper > >- const: mediatek,mt8183 > >- description: Google Kakadu (ASUS Chromebook Detachable CM3) > >
[PATCH v2 6/8] arm64: dts: mt8183: Add kukui-jacuzzi-willow board
Willow is known as Acer Chromebook 311 (C722/C722T)
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Enric Balletbo i Serra
---
arch/arm64/boot/dts/mediatek/Makefile | 2 ++
.../mt8183-kukui-jacuzzi-willow-sku0.dts | 13 +
.../mt8183-kukui-jacuzzi-willow-sku1.dts | 12
.../mediatek/mt8183-kukui-jacuzzi-willow.dtsi | 28 +++
4 files changed, 55 insertions(+)
create mode 100644
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku0.dts
create mode 100644
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku1.dts
create mode 100644
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index df70674949ce..5f43bbc2ea72 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -16,6 +16,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku0.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku0.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku0.dts
new file mode 100644
index ..281265f082db
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku0.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi-willow.dtsi"
+
+/ {
+ model = "Google willow board sku0";
+ compatible = "google,willow-sku0", "google,willow", "mediatek,mt8183";
+};
+
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku1.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku1.dts
new file mode 100644
index ..22e56bdc1ee3
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku1.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi-willow.dtsi"
+
+/ {
+ model = "Google willow board sku1";
+ compatible = "google,willow-sku1", "google,willow", "mediatek,mt8183";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi
new file mode 100644
index ..3204c1abc4ee
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi.dtsi"
+
+ {
+ clock-stretch-ns = <9500>;
+
+ trackpad@2c {
+ compatible = "hid-over-i2c";
+ reg = <0x2c>;
+ hid-descr-addr = <0x20>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+
+ interrupts-extended = < 7 IRQ_TYPE_LEVEL_LOW>;
+
+ wakeup-source;
+ };
+};
+
+_wifi {
+ qcom,ath10k-calibration-variant = "GO_JUNIPER";
+};
--
2.31.1.368.gbe11c130af-goog
[PATCH v2 8/8] arm64: dts: mt8183: Add kukui-jacuzzi-kenzo board
Kenzo is known as Acer Chromebook 311.
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Enric Balletbo i Serra
---
arch/arm64/boot/dts/mediatek/Makefile| 1 +
.../boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts | 12
2 files changed, 13 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index b33d0bc58021..25770d83059d 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -17,6 +17,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-burnet.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kenzo.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts
new file mode 100644
index ..6f1aa692753a
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi-juniper.dtsi"
+
+/ {
+ model = "Google kenzo sku17 board";
+ compatible = "google,juniper-sku17", "google,juniper",
"mediatek,mt8183";
+};
--
2.31.1.368.gbe11c130af-goog
[PATCH v2 7/8] arm64: dts: mt8183: Add kukui-jacuzzi-burnet board
Burnet is known as HP Chromebook x360 11MK G3 EE
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Enric Balletbo i Serra
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
.../mediatek/mt8183-kukui-jacuzzi-burnet.dts | 33 +++
2 files changed, 34 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index 5f43bbc2ea72..b33d0bc58021 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-burnet.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts
new file mode 100644
index ..b97ca331970e
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi.dtsi"
+
+/ {
+ model = "Google burnet board";
+ compatible = "google,burnet", "mediatek,mt8183";
+};
+
+ {
+ mediatek,dmic-mode = <1>; /* one-wire */
+};
+
+ {
+ touchscreen@2c {
+ compatible = "hid-over-i2c";
+ reg = <0x2c>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ interrupts-extended = < 155 IRQ_TYPE_LEVEL_LOW>;
+
+ post-power-on-delay-ms = <200>;
+ hid-descr-addr = <0x0020>;
+ };
+};
+
+ {
+ clock-stretch-ns = <4100>;
+};
--
2.31.1.368.gbe11c130af-goog
[PATCH v2 5/8] arm64: dts: mt8183: Add kukui-jacuzzi-kappa board
Kappa is known as HP Chromebook 11a
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Enric Balletbo i Serra
---
arch/arm64/boot/dts/mediatek/Makefile| 1 +
.../dts/mediatek/mt8183-kukui-jacuzzi-kappa.dts | 16
2 files changed, 17 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kappa.dts
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index a1c50adc98fa..df70674949ce 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -15,6 +15,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kappa.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kappa.dts
new file mode 100644
index ..b3f46c16e5d7
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kappa.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi.dtsi"
+
+/ {
+ model = "Google kappa board";
+ compatible = "google,kappa", "mediatek,mt8183";
+};
+
+ {
+ mediatek,dmic-mode = <1>; /* one-wire */
+};
--
2.31.1.368.gbe11c130af-goog
[PATCH v2 4/8] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-kenzo
Kenzo is known as Acer Chromebook 311. Signed-off-by: Hsin-Yi Wang Reviewed-by: Enric Balletbo i Serra --- Documentation/devicetree/bindings/arm/mediatek.yaml | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 0870490aa350..7afd01aad964 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -137,9 +137,11 @@ properties: items: - const: google,damu - const: mediatek,mt8183 - - description: Google Juniper (Acer Chromebook Spin 311) + - description: Google Juniper (Acer Chromebook Spin 311) / Kenzo (Acer Chromebook 311) items: - - const: google,juniper-sku16 + - enum: + - google,juniper-sku16 + - google,juniper-sku17 - const: google,juniper - const: mediatek,mt8183 - description: Google Kakadu (ASUS Chromebook Detachable CM3) -- 2.31.1.368.gbe11c130af-goog
[PATCH v2 3/8] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-burnet
Burnet is known as HP Chromebook x360 11MK G3 EE. Signed-off-by: Hsin-Yi Wang Reviewed-by: Enric Balletbo i Serra --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 96c401597bd8..0870490aa350 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -122,6 +122,10 @@ properties: - enum: - mediatek,mt8195-evb - const: mediatek,mt8195 + - description: Google Burnet (HP Chromebook x360 11MK G3 EE) +items: + - const: google,burnet + - const: mediatek,mt8183 - description: Google Krane (Lenovo IdeaPad Duet, 10e,...) items: - enum: -- 2.31.1.368.gbe11c130af-goog
[PATCH v2 2/8] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-willow
Willow is known as Acer Chromebook 311 (C722/C722T). Signed-off-by: Hsin-Yi Wang Reviewed-by: Enric Balletbo i Serra --- Documentation/devicetree/bindings/arm/mediatek.yaml | 7 +++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 81b86b189a8d..96c401597bd8 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -157,6 +157,13 @@ properties: - google,kodama-sku32 - const: google,kodama - const: mediatek,mt8183 + - description: Google Willow (Acer Chromebook 311 C722/C722T) +items: + - enum: + - google,willow-sku0 + - google,willow-sku1 + - const: google,willow + - const: mediatek,mt8183 - items: - enum: - mediatek,mt8183-pumpkin -- 2.31.1.368.gbe11c130af-goog
[PATCH v2 1/8] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-kappa
Kappa is known as HP Chromebook 11a. Signed-off-by: Hsin-Yi Wang Reviewed-by: Enric Balletbo i Serra --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index aff57a8c8c30..81b86b189a8d 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -144,6 +144,10 @@ properties: - const: google,kakadu-rev2 - const: google,kakadu - const: mediatek,mt8183 + - description: Google Kappa (HP Chromebook 11a) +items: + - const: google,kappa + - const: mediatek,mt8183 - description: Google Kodama (Lenovo 10e Chromebook Tablet) items: - enum: -- 2.31.1.368.gbe11c130af-goog
Re: [PATCH v19 6/6] drm/i915/selftests: Rename functions names
On Fri, Apr 16, 2021 at 10:23 PM Jani Nikula
wrote:
>
> On Thu, 15 Apr 2021, Hsin-Yi Wang wrote:
> > pm_resume and pm_suspend might be conflict with the ones defined in
> > include/linux/suspend.h. Rename pm_resume{suspend} to
> > i915_pm_resume{suspend} since they are only used here.
>
> I agree with the rationale here.
>
> Do you need this to be part of your series, or shall we just pick this
> up for i915? (We might consider renaming to something else or prefix the
> functions with _ though, as we also have existing i915_pm_suspend and
> i915_pm_resume elsewhere.)
>
This patch can be separated from the series, thanks.
> BR,
> Jani.
>
> >
> > Signed-off-by: Hsin-Yi Wang
> > Reported-by: kernel test robot
> > ---
> > drivers/gpu/drm/i915/selftests/i915_gem.c | 10 +-
> > 1 file changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c
> > b/drivers/gpu/drm/i915/selftests/i915_gem.c
> > index dc394fb7ccfa..525afda9d31f 100644
> > --- a/drivers/gpu/drm/i915/selftests/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
> > @@ -94,7 +94,7 @@ static int pm_prepare(struct drm_i915_private *i915)
> > return 0;
> > }
> >
> > -static void pm_suspend(struct drm_i915_private *i915)
> > +static void i915_pm_suspend(struct drm_i915_private *i915)
> > {
> > intel_wakeref_t wakeref;
> >
> > @@ -116,7 +116,7 @@ static void pm_hibernate(struct drm_i915_private *i915)
> > }
> > }
> >
> > -static void pm_resume(struct drm_i915_private *i915)
> > +static void i915_pm_resume(struct drm_i915_private *i915)
> > {
> > intel_wakeref_t wakeref;
> >
> > @@ -152,12 +152,12 @@ static int igt_gem_suspend(void *arg)
> > if (err)
> > goto out;
> >
> > - pm_suspend(i915);
> > + i915_pm_suspend(i915);
> >
> > /* Here be dragons! Note that with S3RST any S3 may become S4! */
> > simulate_hibernate(i915);
> >
> > - pm_resume(i915);
> > + i915_pm_resume(i915);
> >
> > err = switch_to_context(ctx);
> > out:
> > @@ -192,7 +192,7 @@ static int igt_gem_hibernate(void *arg)
> > /* Here be dragons! */
> > simulate_hibernate(i915);
> >
> > - pm_resume(i915);
> > + i915_pm_resume(i915);
> >
> > err = switch_to_context(ctx);
> > out:
>
> --
> Jani Nikula, Intel Open Source Graphics Center
Re: [PATCH] [v4, 1/1] clocksource/drivers/timer-mediatek: optimize systimer irq clear flow on shutdown
On Fri, Apr 9, 2021 at 5:22 PM Fengquan Chen wrote:
>
> mtk_syst_clkevt_shutdown is called after irq disabled in suspend flow,
> clear any pending systimer irq when shutdown to avoid suspend aborted
> due to timer irq pending
>
> Also as for systimer in mediatek socs, there must be firstly enable
> timer before clear systimer irq
>
> Fixes: e3af677607d9("clocksource/drivers/timer-mediatek: Add support for
> system timer")
> Signed-off-by: Fengquan Chen
>
Tested-by: Hsin-Yi Wang
Tested on a mt8183 device. This patch solves an issue that device
would hang on resume during genpd_resume_noirq:
[ 724.342834] mtk-smi-larb 1701.larb: genpd_resume_noirq+0x0/0xd0
returned 0 after 976593 usecs
[ 724.351721] mtk-smi-larb 1a001000.larb: calling
genpd_resume_noirq+0x0/0xd0 @ 6629, parent: soc
[ 736.845047] Kernel panic - not syncing: Watchdog detected hard
LOCKUP on cpu 3
[ 736.852268] CPU: 2 PID: 0 Comm: swapper/2 Tainted: GW
5.10.26 #17
[ 736.859743] Hardware name: MediaTek krane sku176 board (DT)
[ 736.865309] Call trace:
[ 736.867756] dump_backtrace+0x0/0x1bc
[ 736.871415] show_stack+0x20/0x2c
[ 736.874728] dump_stack+0xc0/0x11c
[ 736.878124] panic+0x174/0x378
[ 736.881178] watchdog_check_hardlockup+0x11c/0x124
[ 736.885963] watchdog_timer_fn+0x70/0x274
> ---
> drivers/clocksource/timer-mediatek.c | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clocksource/timer-mediatek.c
> b/drivers/clocksource/timer-mediatek.c
> index 9318edc..6461fd3 100644
> --- a/drivers/clocksource/timer-mediatek.c
> +++ b/drivers/clocksource/timer-mediatek.c
> @@ -60,9 +60,9 @@
> * SYST_CON_EN: Clock enable. Shall be set to
> * - Start timer countdown.
> * - Allow timeout ticks being updated.
> - * - Allow changing interrupt functions.
> + * - Allow changing interrupt status,like clear irq pending.
> *
> - * SYST_CON_IRQ_EN: Set to allow interrupt.
> + * SYST_CON_IRQ_EN: Set to enable interrupt.
> *
> * SYST_CON_IRQ_CLR: Set to clear interrupt.
> */
> @@ -75,6 +75,7 @@
> static void mtk_syst_ack_irq(struct timer_of *to)
> {
> /* Clear and disable interrupt */
> + writel(SYST_CON_EN, SYST_CON_REG(to));
> writel(SYST_CON_IRQ_CLR | SYST_CON_EN, SYST_CON_REG(to));
> }
>
> @@ -111,6 +112,9 @@ static int mtk_syst_clkevt_next_event(unsigned long ticks,
>
> static int mtk_syst_clkevt_shutdown(struct clock_event_device *clkevt)
> {
> + /* Clear any irq */
> + mtk_syst_ack_irq(to_timer_of(clkevt));
> +
> /* Disable timer */
> writel(0, SYST_CON_REG(to_timer_of(clkevt)));
>
> --
> 1.8.1.1.dirty
>
[PATCH 8/8] arm64: dts: mt8183: Add kukui-jacuzzi-kenzo board
Kenzo is known as Acer Chromebook 311.
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/Makefile| 1 +
.../boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts | 12
2 files changed, 13 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index b33d0bc58021..25770d83059d 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -17,6 +17,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-burnet.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kenzo.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts
new file mode 100644
index ..6f1aa692753a
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi-juniper.dtsi"
+
+/ {
+ model = "Google kenzo sku17 board";
+ compatible = "google,juniper-sku17", "google,juniper",
"mediatek,mt8183";
+};
--
2.31.1.295.g9ea45b61b8-goog
[PATCH 7/8] arm64: dts: mt8183: Add kukui-jacuzzi-burnet board
Burnet is known as HP Chromebook x360 11MK G3 EE
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
.../mediatek/mt8183-kukui-jacuzzi-burnet.dts | 33 +++
2 files changed, 34 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index 5f43bbc2ea72..b33d0bc58021 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-burnet.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts
new file mode 100644
index ..b97ca331970e
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi.dtsi"
+
+/ {
+ model = "Google burnet board";
+ compatible = "google,burnet", "mediatek,mt8183";
+};
+
+ {
+ mediatek,dmic-mode = <1>; /* one-wire */
+};
+
+ {
+ touchscreen@2c {
+ compatible = "hid-over-i2c";
+ reg = <0x2c>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ interrupts-extended = < 155 IRQ_TYPE_LEVEL_LOW>;
+
+ post-power-on-delay-ms = <200>;
+ hid-descr-addr = <0x0020>;
+ };
+};
+
+ {
+ clock-stretch-ns = <4100>;
+};
--
2.31.1.295.g9ea45b61b8-goog
[PATCH 6/8] arm64: dts: mt8183: Add kukui-jacuzzi-willow board
Willow is known as Acer Chromebook 311 (C722/C722T)
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/Makefile | 2 ++
.../mt8183-kukui-jacuzzi-willow-sku0.dts | 13 +
.../mt8183-kukui-jacuzzi-willow-sku1.dts | 12
.../mediatek/mt8183-kukui-jacuzzi-willow.dtsi | 28 +++
4 files changed, 55 insertions(+)
create mode 100644
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku0.dts
create mode 100644
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku1.dts
create mode 100644
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index df70674949ce..5f43bbc2ea72 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -16,6 +16,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku0.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku0.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku0.dts
new file mode 100644
index ..281265f082db
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku0.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi-willow.dtsi"
+
+/ {
+ model = "Google willow board sku0";
+ compatible = "google,willow-sku0", "google,willow", "mediatek,mt8183";
+};
+
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku1.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku1.dts
new file mode 100644
index ..22e56bdc1ee3
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow-sku1.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi-willow.dtsi"
+
+/ {
+ model = "Google willow board sku1";
+ compatible = "google,willow-sku1", "google,willow", "mediatek,mt8183";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi
new file mode 100644
index ..3204c1abc4ee
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi.dtsi"
+
+ {
+ clock-stretch-ns = <9500>;
+
+ trackpad@2c {
+ compatible = "hid-over-i2c";
+ reg = <0x2c>;
+ hid-descr-addr = <0x20>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+
+ interrupts-extended = < 7 IRQ_TYPE_LEVEL_LOW>;
+
+ wakeup-source;
+ };
+};
+
+_wifi {
+ qcom,ath10k-calibration-variant = "GO_JUNIPER";
+};
--
2.31.1.295.g9ea45b61b8-goog
[PATCH 5/8] arm64: dts: mt8183: Add kukui-jacuzzi-kappa board
Kappa is known as HP Chromebook 11a
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/Makefile| 1 +
.../dts/mediatek/mt8183-kukui-jacuzzi-kappa.dts | 16
2 files changed, 17 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kappa.dts
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index a1c50adc98fa..df70674949ce 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -15,6 +15,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kappa.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kappa.dts
new file mode 100644
index ..b3f46c16e5d7
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kappa.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi.dtsi"
+
+/ {
+ model = "Google kappa board";
+ compatible = "google,kappa", "mediatek,mt8183";
+};
+
+ {
+ mediatek,dmic-mode = <1>; /* one-wire */
+};
--
2.31.1.295.g9ea45b61b8-goog
[PATCH 4/8] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-kenzo
Kenzo is known as Acer Chromebook 311. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/arm/mediatek.yaml | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 0870490aa350..39e4a99ebb37 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -137,9 +137,11 @@ properties: items: - const: google,damu - const: mediatek,mt8183 - - description: Google Juniper (Acer Chromebook Spin 311) + - description: Google Juniper (Acer Chromebook Spin 311) / Kenzo (Acer Crhomebook 311) items: - - const: google,juniper-sku16 + - enum: + - google,juniper-sku16 + - google,juniper-sku17 - const: google,juniper - const: mediatek,mt8183 - description: Google Kakadu (ASUS Chromebook Detachable CM3) -- 2.31.1.295.g9ea45b61b8-goog
[PATCH 3/8] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-burnet
Burnet is known as HP Chromebook x360 11MK G3 EE. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 96c401597bd8..0870490aa350 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -122,6 +122,10 @@ properties: - enum: - mediatek,mt8195-evb - const: mediatek,mt8195 + - description: Google Burnet (HP Chromebook x360 11MK G3 EE) +items: + - const: google,burnet + - const: mediatek,mt8183 - description: Google Krane (Lenovo IdeaPad Duet, 10e,...) items: - enum: -- 2.31.1.295.g9ea45b61b8-goog
[PATCH 2/8] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-willow
Willow is known as Acer Chromebook 311 (C722/C722T). Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/arm/mediatek.yaml | 7 +++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 81b86b189a8d..96c401597bd8 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -157,6 +157,13 @@ properties: - google,kodama-sku32 - const: google,kodama - const: mediatek,mt8183 + - description: Google Willow (Acer Chromebook 311 C722/C722T) +items: + - enum: + - google,willow-sku0 + - google,willow-sku1 + - const: google,willow + - const: mediatek,mt8183 - items: - enum: - mediatek,mt8183-pumpkin -- 2.31.1.295.g9ea45b61b8-goog
[PATCH 1/8] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-kappa
Kappa is known as HP Chromebook 11a. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index aff57a8c8c30..81b86b189a8d 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -144,6 +144,10 @@ properties: - const: google,kakadu-rev2 - const: google,kakadu - const: mediatek,mt8183 + - description: Google Kappa (HP Chromebook 11a) +items: + - const: google,kappa + - const: mediatek,mt8183 - description: Google Kodama (Lenovo 10e Chromebook Tablet) items: - enum: -- 2.31.1.295.g9ea45b61b8-goog
[PATCH v19 4/6] misc: eeprom: at24: check suspend status before disable regulator
cd5676db0574 ("misc: eeprom: at24: support pm_runtime control") disables
regulator in runtime suspend. If runtime suspend is called before
regulator disable, it will results in regulator unbalanced disabling.
Signed-off-by: Hsin-Yi Wang
---
drivers/misc/eeprom/at24.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 926408b41270..7a6f01ace78a 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -763,7 +763,8 @@ static int at24_probe(struct i2c_client *client)
at24->nvmem = devm_nvmem_register(dev, _config);
if (IS_ERR(at24->nvmem)) {
pm_runtime_disable(dev);
- regulator_disable(at24->vcc_reg);
+ if (!pm_runtime_status_suspended(dev))
+ regulator_disable(at24->vcc_reg);
return PTR_ERR(at24->nvmem);
}
@@ -774,7 +775,8 @@ static int at24_probe(struct i2c_client *client)
err = at24_read(at24, 0, _byte, 1);
if (err) {
pm_runtime_disable(dev);
- regulator_disable(at24->vcc_reg);
+ if (!pm_runtime_status_suspended(dev))
+ regulator_disable(at24->vcc_reg);
return -ENODEV;
}
--
2.31.1.295.g9ea45b61b8-goog
[PATCH v19 6/6] drm/i915/selftests: Rename functions names
pm_resume and pm_suspend might be conflict with the ones defined in
include/linux/suspend.h. Rename pm_resume{suspend} to
i915_pm_resume{suspend} since they are only used here.
Signed-off-by: Hsin-Yi Wang
Reported-by: kernel test robot
---
drivers/gpu/drm/i915/selftests/i915_gem.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c
b/drivers/gpu/drm/i915/selftests/i915_gem.c
index dc394fb7ccfa..525afda9d31f 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
@@ -94,7 +94,7 @@ static int pm_prepare(struct drm_i915_private *i915)
return 0;
}
-static void pm_suspend(struct drm_i915_private *i915)
+static void i915_pm_suspend(struct drm_i915_private *i915)
{
intel_wakeref_t wakeref;
@@ -116,7 +116,7 @@ static void pm_hibernate(struct drm_i915_private *i915)
}
}
-static void pm_resume(struct drm_i915_private *i915)
+static void i915_pm_resume(struct drm_i915_private *i915)
{
intel_wakeref_t wakeref;
@@ -152,12 +152,12 @@ static int igt_gem_suspend(void *arg)
if (err)
goto out;
- pm_suspend(i915);
+ i915_pm_suspend(i915);
/* Here be dragons! Note that with S3RST any S3 may become S4! */
simulate_hibernate(i915);
- pm_resume(i915);
+ i915_pm_resume(i915);
err = switch_to_context(ctx);
out:
@@ -192,7 +192,7 @@ static int igt_gem_hibernate(void *arg)
/* Here be dragons! */
simulate_hibernate(i915);
- pm_resume(i915);
+ i915_pm_resume(i915);
err = switch_to_context(ctx);
out:
--
2.31.1.295.g9ea45b61b8-goog
[PATCH v19 5/6] arm64: dts: mt8183: add supply name for eeprom
Add supplies for eeprom for mt8183 boards.
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi | 4
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi | 4
arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi | 4
3 files changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
index b442e38a3156..28966a65391b 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
@@ -88,11 +88,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcamio_reg>;
eeprom@58 {
compatible = "atmel,24c32";
reg = <0x58>;
pagesize = <32>;
+ vcc-supply = <_vcama2_reg>;
};
};
@@ -101,11 +103,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcn18_reg>;
eeprom@54 {
compatible = "atmel,24c32";
reg = <0x54>;
pagesize = <32>;
+ vcc-supply = <_vcn18_reg>;
};
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
index 2f5234a16ead..3aa79403c0c2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
@@ -62,11 +62,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcamio_reg>;
eeprom@58 {
compatible = "atmel,24c64";
reg = <0x58>;
pagesize = <32>;
+ vcc-supply = <_vcamio_reg>;
};
};
@@ -75,11 +77,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcn18_reg>;
eeprom@54 {
compatible = "atmel,24c64";
reg = <0x54>;
pagesize = <32>;
+ vcc-supply = <_vcn18_reg>;
};
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
index fbc471ccf805..30c183c96a54 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
@@ -71,11 +71,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcamio_reg>;
eeprom@58 {
compatible = "atmel,24c32";
reg = <0x58>;
pagesize = <32>;
+ vcc-supply = <_vcama2_reg>;
};
};
@@ -84,11 +86,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcn18_reg>;
eeprom@54 {
compatible = "atmel,24c32";
reg = <0x54>;
pagesize = <32>;
+ vcc-supply = <_vcn18_reg>;
};
};
--
2.31.1.295.g9ea45b61b8-goog
[PATCH v19 1/6] i2c: core: support bus regulator controlling in adapter
From: Bibby Hsieh
Although in the most platforms, the bus power of i2c
are alway on, some platforms disable the i2c bus power
in order to meet low power request.
We can control bulk regulator if it is provided in i2c
adapter device.
Signed-off-by: Bibby Hsieh
Signed-off-by: Marek Szyprowski
Signed-off-by: Hsin-Yi Wang
---
drivers/i2c/i2c-core-base.c | 88 +
include/linux/i2c.h | 2 +
2 files changed, 90 insertions(+)
diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
index 24c8f11bac73..c34920f30c5a 100644
--- a/drivers/i2c/i2c-core-base.c
+++ b/drivers/i2c/i2c-core-base.c
@@ -461,12 +461,14 @@ static int i2c_smbus_host_notify_to_irq(const struct
i2c_client *client)
static int i2c_device_probe(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
int status;
if (!client)
return 0;
+ adap = client->adapter;
client->irq = client->init_irq;
if (!client->irq) {
@@ -532,6 +534,14 @@ static int i2c_device_probe(struct device *dev)
dev_dbg(dev, "probe\n");
+ if (adap->bus_regulator) {
+ status = regulator_enable(adap->bus_regulator);
+ if (status < 0) {
+ dev_err(>dev, "Failed to enable bus regulator\n");
+ goto err_clear_wakeup_irq;
+ }
+ }
+
status = of_clk_set_defaults(dev->of_node, false);
if (status < 0)
goto err_clear_wakeup_irq;
@@ -589,8 +599,10 @@ static int i2c_device_probe(struct device *dev)
static int i2c_device_remove(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
+ adap = client->adapter;
driver = to_i2c_driver(dev->driver);
if (driver->remove) {
int status;
@@ -605,6 +617,8 @@ static int i2c_device_remove(struct device *dev)
devres_release_group(>dev, client->devres_group_id);
dev_pm_domain_detach(>dev, true);
+ if (!pm_runtime_status_suspended(>dev) && adap->bus_regulator)
+ regulator_disable(adap->bus_regulator);
dev_pm_clear_wake_irq(>dev);
device_init_wakeup(>dev, false);
@@ -617,6 +631,79 @@ static int i2c_device_remove(struct device *dev)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int i2c_resume_early(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ if (!pm_runtime_status_suspended(>dev)) {
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+ }
+
+ return pm_generic_resume_early(>dev);
+}
+
+static int i2c_suspend_late(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = pm_generic_suspend_late(>dev);
+ if (err)
+ return err;
+
+ if (!pm_runtime_status_suspended(>dev))
+ return regulator_disable(client->adapter->bus_regulator);
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_PM
+static int i2c_runtime_resume(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+ return pm_generic_runtime_resume(>dev);
+}
+
+static int i2c_runtime_suspend(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = pm_generic_runtime_suspend(>dev);
+ if (err)
+ return err;
+
+ return regulator_disable(client->adapter->bus_regulator);
+}
+#endif
+
+static const struct dev_pm_ops i2c_device_pm = {
+ SET_LATE_SYSTEM_SLEEP_PM_OPS(i2c_suspend_late, i2c_resume_early)
+ SET_RUNTIME_PM_OPS(i2c_runtime_suspend, i2c_runtime_resume, NULL)
+};
+
static void i2c_device_shutdown(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
@@ -674,6 +761,7 @@ struct bus_type i2c_bus_type = {
.probe = i2c_device_probe,
.remove = i2c_device_remove,
.shutdown = i2c_device_shutdown,
+ .pm = _device_pm,
};
EXPORT_SYMBOL_GPL(i2c_bus_type);
[PATCH v19 2/6] dt-binding: i2c: mt65xx: add vbus-supply property
Add vbus-supply property for mt65xx. The regulator can be passed into core and turned off during suspend/sleep to reduce power consumption. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt index 7f0194fdd0cc..2c45647e9f0b 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt @@ -32,6 +32,7 @@ Optional properties: - mediatek,have-pmic: platform can control i2c form special pmic side. Only mt6589 and mt8135 support this feature. - mediatek,use-push-pull: IO config use push-pull mode. + - vbus-supply: phandle to the regulator that provides power to SCL/SDA. Example: -- 2.31.1.295.g9ea45b61b8-goog
[PATCH v19 3/6] i2c: mediatek: mt65xx: add optional vbus-supply
Add vbus-supply which provides power to SCL/SDA. Pass this regulator
into core so it can be turned on/off for low power mode support.
Signed-off-by: Hsin-Yi Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 2ffd2f354d0a..82f2b6716005 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -1215,6 +1215,13 @@ static int mtk_i2c_probe(struct platform_device *pdev)
i2c->adap.quirks = i2c->dev_comp->quirks;
i2c->adap.timeout = 2 * HZ;
i2c->adap.retries = 1;
+ i2c->adap.bus_regulator = devm_regulator_get_optional(>dev,
"vbus");
+ if (IS_ERR(i2c->adap.bus_regulator)) {
+ if (PTR_ERR(i2c->adap.bus_regulator) == -ENODEV)
+ i2c->adap.bus_regulator = NULL;
+ else
+ return PTR_ERR(i2c->adap.bus_regulator);
+ }
ret = mtk_i2c_parse_dt(pdev->dev.of_node, i2c);
if (ret)
--
2.31.1.295.g9ea45b61b8-goog
[PATCH v19 0/6] add power control in i2c
Although in the most platforms, the power of eeprom and i2c are alway on, some platforms disable the eeprom and i2c power in order to meet low power request. This patch add the pm_runtime ops to control power to support all platforms. Changes since v18: - Fix a function name conflict with drivers/gpu/drm/i915/selftests/i915_gem.c Changes since v17: - Add a patch to fix unbalanced regulator disabling. - Add dts patch. Changes since v16: - request regulator in device instead of in the core. - control regulator only if it's provided. Changes since v15: - Squash the fix[1] for v15. [1] https://patchwork.ozlabs.org/project/linux-i2c/patch/20200522101327.13456-1-m.szyprow...@samsung.com/ Changes since v14: - change the return value in normal condition - access the variable after NULL pointer checking - add ack tag Changes since v13: - fixup some logic error Changes since v12: - rebase onto v5.7-rc1 - change the property description in binding Changes since v11: - use suspend_late/resume_early instead of suspend/resume - rebase onto v5.6-rc1 Changes since v10: - fixup some worng codes Changes since v9: - fixup build error - remove redundant code Changes since v8: - fixup some wrong code - remove redundant message [... snip ...] Bibby Hsieh (1): i2c: core: support bus regulator controlling in adapter Hsin-Yi Wang (5): dt-binding: i2c: mt65xx: add vbus-supply property i2c: mediatek: mt65xx: add optional vbus-supply misc: eeprom: at24: check suspend status before disable regulator arm64: dts: mt8183: add supply name for eeprom drm/i915/selftests: Rename functions names .../devicetree/bindings/i2c/i2c-mt65xx.txt| 1 + .../dts/mediatek/mt8183-kukui-kakadu.dtsi | 4 + .../dts/mediatek/mt8183-kukui-kodama.dtsi | 4 + .../boot/dts/mediatek/mt8183-kukui-krane.dtsi | 4 + drivers/gpu/drm/i915/selftests/i915_gem.c | 10 +-- drivers/i2c/busses/i2c-mt65xx.c | 7 ++ drivers/i2c/i2c-core-base.c | 88 +++ drivers/misc/eeprom/at24.c| 6 +- include/linux/i2c.h | 2 + 9 files changed, 119 insertions(+), 7 deletions(-) -- 2.31.1.295.g9ea45b61b8-goog
[PATCH v18 0/5] add power control in i2c
Although in the most platforms, the power of eeprom and i2c are alway on, some platforms disable the eeprom and i2c power in order to meet low power request. This patch add the pm_runtime ops to control power to support all platforms. Changes since v17: - Add a patch to fix unbalanced regulator disabling. - Add dts patch. Changes since v16: - request regulator in device instead of in the core. - control regulator only if it's provided. Changes since v15: - Squash the fix[1] for v15. [1] https://patchwork.ozlabs.org/project/linux-i2c/patch/20200522101327.13456-1-m.szyprow...@samsung.com/ Changes since v14: - change the return value in normal condition - access the variable after NULL pointer checking - add ack tag Changes since v13: - fixup some logic error Changes since v12: - rebase onto v5.7-rc1 - change the property description in binding Changes since v11: - use suspend_late/resume_early instead of suspend/resume - rebase onto v5.6-rc1 Changes since v10: - fixup some worng codes Changes since v9: - fixup build error - remove redundant code Changes since v8: - fixup some wrong code - remove redundant message [... snip ...] Bibby Hsieh (1): i2c: core: support bus regulator controlling in adapter Hsin-Yi Wang (4): dt-binding: i2c: mt65xx: add vbus-supply property i2c: mediatek: mt65xx: add optional vbus-supply misc: eeprom: at24: check suspend status before disable regulator arm64: dts: mt8183: add supply name for eeprom .../devicetree/bindings/i2c/i2c-mt65xx.txt| 1 + .../dts/mediatek/mt8183-kukui-kakadu.dtsi | 4 + .../dts/mediatek/mt8183-kukui-kodama.dtsi | 4 + .../boot/dts/mediatek/mt8183-kukui-krane.dtsi | 4 + drivers/i2c/busses/i2c-mt65xx.c | 7 ++ drivers/i2c/i2c-core-base.c | 88 +++ drivers/misc/eeprom/at24.c| 6 +- include/linux/i2c.h | 2 + 8 files changed, 114 insertions(+), 2 deletions(-) -- 2.31.1.295.g9ea45b61b8-goog
[PATCH v18 4/5] misc: eeprom: at24: check suspend status before disable regulator
cd5676db0574 ("misc: eeprom: at24: support pm_runtime control") disables
regulator in runtime suspend. If runtime suspend is called before
regulator disable, it will results in regulator unbalanced disabling.
Signed-off-by: Hsin-Yi Wang
---
drivers/misc/eeprom/at24.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 926408b41270..7a6f01ace78a 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -763,7 +763,8 @@ static int at24_probe(struct i2c_client *client)
at24->nvmem = devm_nvmem_register(dev, _config);
if (IS_ERR(at24->nvmem)) {
pm_runtime_disable(dev);
- regulator_disable(at24->vcc_reg);
+ if (!pm_runtime_status_suspended(dev))
+ regulator_disable(at24->vcc_reg);
return PTR_ERR(at24->nvmem);
}
@@ -774,7 +775,8 @@ static int at24_probe(struct i2c_client *client)
err = at24_read(at24, 0, _byte, 1);
if (err) {
pm_runtime_disable(dev);
- regulator_disable(at24->vcc_reg);
+ if (!pm_runtime_status_suspended(dev))
+ regulator_disable(at24->vcc_reg);
return -ENODEV;
}
--
2.31.1.295.g9ea45b61b8-goog
[PATCH v18 5/5] arm64: dts: mt8183: add supply name for eeprom
Add supplies for eeprom for mt8183 boards.
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi | 4
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi | 4
arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi | 4
3 files changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
index b442e38a3156..28966a65391b 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
@@ -88,11 +88,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcamio_reg>;
eeprom@58 {
compatible = "atmel,24c32";
reg = <0x58>;
pagesize = <32>;
+ vcc-supply = <_vcama2_reg>;
};
};
@@ -101,11 +103,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcn18_reg>;
eeprom@54 {
compatible = "atmel,24c32";
reg = <0x54>;
pagesize = <32>;
+ vcc-supply = <_vcn18_reg>;
};
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
index 2f5234a16ead..3aa79403c0c2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
@@ -62,11 +62,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcamio_reg>;
eeprom@58 {
compatible = "atmel,24c64";
reg = <0x58>;
pagesize = <32>;
+ vcc-supply = <_vcamio_reg>;
};
};
@@ -75,11 +77,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcn18_reg>;
eeprom@54 {
compatible = "atmel,24c64";
reg = <0x54>;
pagesize = <32>;
+ vcc-supply = <_vcn18_reg>;
};
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
index fbc471ccf805..30c183c96a54 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
@@ -71,11 +71,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcamio_reg>;
eeprom@58 {
compatible = "atmel,24c32";
reg = <0x58>;
pagesize = <32>;
+ vcc-supply = <_vcama2_reg>;
};
};
@@ -84,11 +86,13 @@ {
pinctrl-0 = <_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <_vcn18_reg>;
eeprom@54 {
compatible = "atmel,24c32";
reg = <0x54>;
pagesize = <32>;
+ vcc-supply = <_vcn18_reg>;
};
};
--
2.31.1.295.g9ea45b61b8-goog
[PATCH v18 2/5] dt-binding: i2c: mt65xx: add vbus-supply property
Add vbus-supply property for mt65xx. The regulator can be passed into core and turned off during suspend/sleep to reduce power consumption. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt index 7f0194fdd0cc..2c45647e9f0b 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt @@ -32,6 +32,7 @@ Optional properties: - mediatek,have-pmic: platform can control i2c form special pmic side. Only mt6589 and mt8135 support this feature. - mediatek,use-push-pull: IO config use push-pull mode. + - vbus-supply: phandle to the regulator that provides power to SCL/SDA. Example: -- 2.31.1.295.g9ea45b61b8-goog
[PATCH v18 3/5] i2c: mediatek: mt65xx: add optional vbus-supply
Add vbus-supply which provides power to SCL/SDA. Pass this regulator
into core so it can be turned on/off for low power mode support.
Signed-off-by: Hsin-Yi Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 2ffd2f354d0a..82f2b6716005 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -1215,6 +1215,13 @@ static int mtk_i2c_probe(struct platform_device *pdev)
i2c->adap.quirks = i2c->dev_comp->quirks;
i2c->adap.timeout = 2 * HZ;
i2c->adap.retries = 1;
+ i2c->adap.bus_regulator = devm_regulator_get_optional(>dev,
"vbus");
+ if (IS_ERR(i2c->adap.bus_regulator)) {
+ if (PTR_ERR(i2c->adap.bus_regulator) == -ENODEV)
+ i2c->adap.bus_regulator = NULL;
+ else
+ return PTR_ERR(i2c->adap.bus_regulator);
+ }
ret = mtk_i2c_parse_dt(pdev->dev.of_node, i2c);
if (ret)
--
2.31.1.295.g9ea45b61b8-goog
[PATCH v18 1/5] i2c: core: support bus regulator controlling in adapter
From: Bibby Hsieh
Although in the most platforms, the bus power of i2c
are alway on, some platforms disable the i2c bus power
in order to meet low power request.
We can control bulk regulator if it is provided in i2c
adapter device.
Signed-off-by: Bibby Hsieh
Signed-off-by: Marek Szyprowski
Signed-off-by: Hsin-Yi Wang
---
drivers/i2c/i2c-core-base.c | 88 +
include/linux/i2c.h | 2 +
2 files changed, 90 insertions(+)
diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
index 24c8f11bac73..c34920f30c5a 100644
--- a/drivers/i2c/i2c-core-base.c
+++ b/drivers/i2c/i2c-core-base.c
@@ -461,12 +461,14 @@ static int i2c_smbus_host_notify_to_irq(const struct
i2c_client *client)
static int i2c_device_probe(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
int status;
if (!client)
return 0;
+ adap = client->adapter;
client->irq = client->init_irq;
if (!client->irq) {
@@ -532,6 +534,14 @@ static int i2c_device_probe(struct device *dev)
dev_dbg(dev, "probe\n");
+ if (adap->bus_regulator) {
+ status = regulator_enable(adap->bus_regulator);
+ if (status < 0) {
+ dev_err(>dev, "Failed to enable bus regulator\n");
+ goto err_clear_wakeup_irq;
+ }
+ }
+
status = of_clk_set_defaults(dev->of_node, false);
if (status < 0)
goto err_clear_wakeup_irq;
@@ -589,8 +599,10 @@ static int i2c_device_probe(struct device *dev)
static int i2c_device_remove(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
+ adap = client->adapter;
driver = to_i2c_driver(dev->driver);
if (driver->remove) {
int status;
@@ -605,6 +617,8 @@ static int i2c_device_remove(struct device *dev)
devres_release_group(>dev, client->devres_group_id);
dev_pm_domain_detach(>dev, true);
+ if (!pm_runtime_status_suspended(>dev) && adap->bus_regulator)
+ regulator_disable(adap->bus_regulator);
dev_pm_clear_wake_irq(>dev);
device_init_wakeup(>dev, false);
@@ -617,6 +631,79 @@ static int i2c_device_remove(struct device *dev)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int i2c_resume_early(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ if (!pm_runtime_status_suspended(>dev)) {
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+ }
+
+ return pm_generic_resume_early(>dev);
+}
+
+static int i2c_suspend_late(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = pm_generic_suspend_late(>dev);
+ if (err)
+ return err;
+
+ if (!pm_runtime_status_suspended(>dev))
+ return regulator_disable(client->adapter->bus_regulator);
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_PM
+static int i2c_runtime_resume(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+ return pm_generic_runtime_resume(>dev);
+}
+
+static int i2c_runtime_suspend(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = pm_generic_runtime_suspend(>dev);
+ if (err)
+ return err;
+
+ return regulator_disable(client->adapter->bus_regulator);
+}
+#endif
+
+static const struct dev_pm_ops i2c_device_pm = {
+ SET_LATE_SYSTEM_SLEEP_PM_OPS(i2c_suspend_late, i2c_resume_early)
+ SET_RUNTIME_PM_OPS(i2c_runtime_suspend, i2c_runtime_resume, NULL)
+};
+
static void i2c_device_shutdown(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
@@ -674,6 +761,7 @@ struct bus_type i2c_bus_type = {
.probe = i2c_device_probe,
.remove = i2c_device_remove,
.shutdown = i2c_device_shutdown,
+ .pm = _device_pm,
};
EXPORT_SYMBOL_GPL(i2c_bus_type);
Re: [PATCH 1/1] arm64: dts: mt8183-kukui: Enable thermal Tboard
On Fri, Apr 9, 2021 at 3:12 PM Michael Kao wrote:
>
> Add Tboard thermal sensor settings.
>
> pull-up voltage: 1800 mv
> pull-up resistor: 75K
>
> Vsense = pull-up voltage * Rntc / ( pull-up resistor + Rntc )
> AuxIn = Vsense * 4096 / 1500
>
> TEST=boot kukui
> check /sys/class/thermal/thermal_zone*/type
> check /sys/class/thermal/thermal_zone*/temp
the TEST lines can be removed.
>
> Signed-off-by: Michael Kao
> Signed-off-by: Nicolas Boichat
> ---
Tested-by: Hsin-Yi Wang
This removes following error:
[ 10.882325] generic-adc-thermal thermal-sensor1: Thermal zone
sensor register failed: -19
[ 10.911912] generic-adc-thermal thermal-sensor2: Thermal zone
sensor register failed: -19
> arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 14 ++
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +-
> 2 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
> index bf2ad1294dd3..202acb542b12 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
> @@ -801,6 +801,20 @@
> status = "okay";
> };
>
> +_zones {
> + Tboard1 {
> + polling-delay = <1000>; /* milliseconds */
> + polling-delay-passive = <0>; /* milliseconds */
> + thermal-sensors = <_thermistor1>;
> + };
> +
> + Tboard2 {
> + polling-delay = <1000>; /* milliseconds */
> + polling-delay-passive = <0>; /* milliseconds */
> + thermal-sensors = <_thermistor2>;
> + };
> +};
> +
> {
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 1ad0a1d55d53..f0719dbef249 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -673,7 +673,7 @@
> nvmem-cell-names = "calibration-data";
> };
>
> - thermal-zones {
> + thermal_zones: thermal-zones {
> cpu_thermal: cpu_thermal {
> polling-delay-passive = <100>;
> polling-delay = <500>;
> --
> 2.18.0
>
[PATCH 2/2] arm64: dts: mt8183: Add panel rotation
krane, kakadu, and kodama boards have a default panel rotation.
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
index ff56bcfa3370..793cc9501337 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
@@ -263,6 +263,7 @@ panel: panel@0 {
avee-supply = <_lcd>;
pp1800-supply = <_lcd>;
backlight = <_lcd0>;
+ rotation = <270>;
port {
panel_in: endpoint {
remote-endpoint = <_out>;
--
2.31.1.295.g9ea45b61b8-goog
[PATCH 1/2] drm/mediatek: set panel orientation before drm_dev_register().
drm_dev_register() sets connector->registration_state to
DRM_CONNECTOR_REGISTERED and dev->registered to true. If
drm_connector_set_panel_orientation() is first called after
drm_dev_register(), it will fail several checks and results in following
warning. So set panel orientation in dsi before drm_dev_register() is
called.
[4.480976] [ cut here ]
[4.485603] WARNING: CPU: 5 PID: 369 at drivers/gpu/drm/drm_mode_object.c:45
__drm_mode_object_add+0xb4/0xbc
[4.609772] Call trace:
[4.612208] __drm_mode_object_add+0xb4/0xbc
[4.616466] drm_mode_object_add+0x20/0x2c
[4.620552] drm_property_create+0xdc/0x174
[4.624723] drm_property_create_enum+0x34/0x98
[4.629241] drm_connector_set_panel_orientation+0x64/0xa0
[4.634716] boe_panel_get_modes+0x88/0xd8
[4.638802] drm_panel_get_modes+0x2c/0x48
[4.642887] panel_bridge_get_modes+0x1c/0x28
[4.647233] drm_bridge_connector_get_modes+0xa0/0xd4
[4.652273] drm_helper_probe_single_connector_modes+0x218/0x700
[4.658266] drm_mode_getconnector+0x1b4/0x45c
[4.662699] drm_ioctl_kernel+0xac/0x128
[4.11] drm_ioctl+0x268/0x410
[4.670002] drm_compat_ioctl+0xdc/0xf0
[4.673829] __arm64_compat_sys_ioctl+0xc8/0x100
[4.678436] el0_svc_common+0xf4/0x1c0
[4.682174] do_el0_svc_compat+0x28/0x3c
[4.686088] el0_svc_compat+0x10/0x1c
[4.689738] el0_sync_compat_handler+0xa8/0xcc
[4.694171] el0_sync_compat+0x178/0x180
[4.698082] ---[ end trace b4f2db9d9c88610b ]---
[4.702721] [ cut here ]
[4.707329] WARNING: CPU: 5 PID: 369 at
drivers/gpu/drm/drm_mode_object.c:243 drm_object_attach_property+0x48/0xb8
[4.833830] Call trace:
[4.836266] drm_object_attach_property+0x48/0xb8
[4.840958] drm_connector_set_panel_orientation+0x84/0xa0
[4.846432] boe_panel_get_modes+0x88/0xd8
[4.850516] drm_panel_get_modes+0x2c/0x48
[4.854600] panel_bridge_get_modes+0x1c/0x28
[4.858946] drm_bridge_connector_get_modes+0xa0/0xd4
[4.863984] drm_helper_probe_single_connector_modes+0x218/0x700
[4.869978] drm_mode_getconnector+0x1b4/0x45c
[4.874410] drm_ioctl_kernel+0xac/0x128
[4.878320] drm_ioctl+0x268/0x410
[4.881711] drm_compat_ioctl+0xdc/0xf0
[4.885536] __arm64_compat_sys_ioctl+0xc8/0x100
[4.890142] el0_svc_common+0xf4/0x1c0
[4.893879] do_el0_svc_compat+0x28/0x3c
[4.897791] el0_svc_compat+0x10/0x1c
[4.901441] el0_sync_compat_handler+0xa8/0xcc
[4.905873] el0_sync_compat+0x178/0x180
[4.909783] ---[ end trace b4f2db9d9c88610c ]---
Signed-off-by: Hsin-Yi Wang
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/mediatek/mtk_dsi.c
index ae403c67cbd9..45a702ee09f3 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -205,6 +205,7 @@ struct mtk_dsi {
u32 irq_data;
wait_queue_head_t irq_wait_queue;
const struct mtk_dsi_driver_data *driver_data;
+ enum drm_panel_orientation orientation;
};
static inline struct mtk_dsi *bridge_to_dsi(struct drm_bridge *b)
@@ -966,6 +967,8 @@ static int mtk_dsi_encoder_init(struct drm_device *drm,
struct mtk_dsi *dsi)
}
drm_connector_attach_encoder(dsi->connector, >encoder);
+ drm_connector_set_panel_orientation(dsi->connector, dsi->orientation);
+
return 0;
err_cleanup_encoder:
@@ -1029,6 +1032,12 @@ static int mtk_dsi_probe(struct platform_device *pdev)
ret = PTR_ERR(dsi->next_bridge);
goto err_unregister_host;
}
+
+ ret = of_drm_get_panel_orientation(panel->dev->of_node,
>orientation);
+ if (ret) {
+ dev_err(dev, "failed to get panel orientation %d\n",
ret);
+ return ret;
+ }
}
dsi->driver_data = of_device_get_match_data(dev);
--
2.31.1.295.g9ea45b61b8-goog
Re: [PATCH v16 2/2] i2c: core: support bus regulator controlling in adapter
On Tue, Mar 9, 2021 at 9:34 PM Hsin-Yi Wang wrote:
>
> On Tue, Mar 9, 2021 at 1:17 AM Mark Brown wrote:
> >
> > On Mon, Mar 08, 2021 at 12:36:07PM +0800, Hsin-Yi Wang wrote:
> >
> > > + adap->bus_regulator = devm_regulator_get(>dev, "bus");
> > > + if (IS_ERR(adap->bus_regulator)) {
> > > + res = PTR_ERR(adap->bus_regulator);
> > > + goto out_reg;
> > > + }
> >
> > Idiomatically supplies should be named as they are by the chip datasheet
> > rather than just a generic name like this, and I'm guessing that systems
> > that have supplies like this will often already have something
> > requesting the supply (eg, it's quite common for consumer drivers to do
> > this) under that name. I can see this being a useful thing to factor
> > out into the core but it seems like it'd be better to have it enabled by
> > having the controllers (or devices) pass a supply name (or possibly
> > requested regulator) to the core rather than by just hard coding a name
> > in the core so bindings look as expected.
> >
>
> I'll move the regulator request into device instead of core in the
> next version. Thanks.
>
Hi Mark,
v17 is sent here:
https://patchwork.kernel.org/project/linux-mediatek/cover/20210309133131.1585838-1-hsi...@chromium.org/
Thanks.
> > I do also wonder if it's better to put the feature on the clients rather
> > than the controller, I don't think it makes much difference though.
[RESEND PATCH v4 1/2] dt-bindings: drm/bridge: anx7625: Add power supplies
anx7625 requires 3 power supply regulators.
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Rob Herring
Reviewed-by: Robert Foss
---
v3->v4: rebase to drm-misc/for-linux-next
---
.../bindings/display/bridge/analogix,anx7625.yaml | 15 +++
1 file changed, 15 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
index c789784efe306..ab48ab2f4240d 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
@@ -34,6 +34,15 @@ properties:
description: used for reset chip control, RESET_N pin B7.
maxItems: 1
+ vdd10-supply:
+description: Regulator that provides the supply 1.0V power.
+
+ vdd18-supply:
+description: Regulator that provides the supply 1.8V power.
+
+ vdd33-supply:
+description: Regulator that provides the supply 3.3V power.
+
ports:
$ref: /schemas/graph.yaml#/properties/ports
@@ -55,6 +64,9 @@ properties:
required:
- compatible
- reg
+ - vdd10-supply
+ - vdd18-supply
+ - vdd33-supply
- ports
additionalProperties: false
@@ -72,6 +84,9 @@ examples:
reg = <0x58>;
enable-gpios = < 45 GPIO_ACTIVE_HIGH>;
reset-gpios = < 73 GPIO_ACTIVE_HIGH>;
+vdd10-supply = <_mipibrdg>;
+vdd18-supply = <_mipibrdg>;
+vdd33-supply = <_mipibrdg>;
ports {
#address-cells = <1>;
--
2.31.0.291.g576ba9dcdaf-goog
[RESEND PATCH v4 2/2] drm/bridge: anx7625: disable regulators when power off
When suspending the driver, anx7625_power_standby() will be called to
turn off reset-gpios and enable-gpios. However, power supplies are not
disabled. To save power, the driver can get the power supply regulators
and turn off them in anx7625_power_standby().
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Robert Foss
Reviewed-by: Xin Ji
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 34 +++
drivers/gpu/drm/bridge/analogix/anx7625.h | 1 +
2 files changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
b/drivers/gpu/drm/bridge/analogix/anx7625.c
index 65cc05982f826..23283ba0c4f93 100644
--- a/drivers/gpu/drm/bridge/analogix/anx7625.c
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -875,12 +876,25 @@ static int sp_tx_edid_read(struct anx7625_data *ctx,
static void anx7625_power_on(struct anx7625_data *ctx)
{
struct device *dev = >client->dev;
+ int ret, i;
if (!ctx->pdata.low_power_mode) {
DRM_DEV_DEBUG_DRIVER(dev, "not low power mode!\n");
return;
}
+ for (i = 0; i < ARRAY_SIZE(ctx->pdata.supplies); i++) {
+ ret = regulator_enable(ctx->pdata.supplies[i].consumer);
+ if (ret < 0) {
+ DRM_DEV_DEBUG_DRIVER(dev, "cannot enable supply %d:
%d\n",
+i, ret);
+ goto reg_err;
+ }
+ usleep_range(2000, 2100);
+ }
+
+ usleep_range(4000, 4100);
+
/* Power on pin enable */
gpiod_set_value(ctx->pdata.gpio_p_on, 1);
usleep_range(1, 11000);
@@ -889,11 +903,16 @@ static void anx7625_power_on(struct anx7625_data *ctx)
usleep_range(1, 11000);
DRM_DEV_DEBUG_DRIVER(dev, "power on !\n");
+ return;
+reg_err:
+ for (--i; i >= 0; i--)
+ regulator_disable(ctx->pdata.supplies[i].consumer);
}
static void anx7625_power_standby(struct anx7625_data *ctx)
{
struct device *dev = >client->dev;
+ int ret;
if (!ctx->pdata.low_power_mode) {
DRM_DEV_DEBUG_DRIVER(dev, "not low power mode!\n");
@@ -904,6 +923,12 @@ static void anx7625_power_standby(struct anx7625_data *ctx)
usleep_range(1000, 1100);
gpiod_set_value(ctx->pdata.gpio_p_on, 0);
usleep_range(1000, 1100);
+
+ ret = regulator_bulk_disable(ARRAY_SIZE(ctx->pdata.supplies),
+ctx->pdata.supplies);
+ if (ret < 0)
+ DRM_DEV_DEBUG_DRIVER(dev, "cannot disable supplies %d\n", ret);
+
DRM_DEV_DEBUG_DRIVER(dev, "power down\n");
}
@@ -1742,6 +1767,15 @@ static int anx7625_i2c_probe(struct i2c_client *client,
platform->client = client;
i2c_set_clientdata(client, platform);
+ pdata->supplies[0].supply = "vdd10";
+ pdata->supplies[1].supply = "vdd18";
+ pdata->supplies[2].supply = "vdd33";
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(pdata->supplies),
+ pdata->supplies);
+ if (ret) {
+ DRM_DEV_ERROR(dev, "fail to get power supplies: %d\n", ret);
+ return ret;
+ }
anx7625_init_gpio(platform);
atomic_set(>power_status, 0);
diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h
b/drivers/gpu/drm/bridge/analogix/anx7625.h
index 193ad86c54503..e4a086b3a3d7b 100644
--- a/drivers/gpu/drm/bridge/analogix/anx7625.h
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.h
@@ -350,6 +350,7 @@ struct s_edid_data {
struct anx7625_platform_data {
struct gpio_desc *gpio_p_on;
struct gpio_desc *gpio_reset;
+ struct regulator_bulk_data supplies[3];
struct drm_bridge *panel_bridge;
int intp_irq;
u32 low_power_mode;
--
2.31.0.291.g576ba9dcdaf-goog
Re: [PATCH V8 1/8] PM / devfreq: Add cpu based scaling support to passive_governor
On Thu, Mar 25, 2021 at 3:58 PM Chanwoo Choi wrote:
>
> Hi,
>
> You are missing to add these patches to linux-pm mailing list.
> Need to send them to linu-pm ML.
>
> Also, before received this series, I tried to clean-up these patches
> on testing branch[1]. So that I add my comment with my clean-up case.
> [1]
> https://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux.git/log/?h=devfreq-testing-passive-gov
>
> And 'Saravana Kannan ' is wrong email address.
> Please update the email or drop this email.
>
>
> On 3/23/21 8:33 PM, Andrew-sh.Cheng wrote:
> > From: Saravana Kannan
> >
> > Many CPU architectures have caches that can scale independent of the
> > CPUs. Frequency scaling of the caches is necessary to make sure that the
> > cache is not a performance bottleneck that leads to poor performance and
> > power. The same idea applies for RAM/DDR.
> >
> > To achieve this, this patch adds support for cpu based scaling to the
> > passive governor. This is accomplished by taking the current frequency
> > of each CPU frequency domain and then adjust the frequency of the cache
> > (or any devfreq device) based on the frequency of the CPUs. It listens
> > to CPU frequency transition notifiers to keep itself up to date on the
> > current CPU frequency.
> >
> > To decide the frequency of the device, the governor does one of the
> > following:
> > * Derives the optimal devfreq device opp from required-opps property of
> > the parent cpu opp_table.
> >
> > * Scales the device frequency in proportion to the CPU frequency. So, if
> > the CPUs are running at their max frequency, the device runs at its
> > max frequency. If the CPUs are running at their min frequency, the
> > device runs at its min frequency. It is interpolated for frequencies
> > in between.
> >
> > Andrew-sh.Cheng change
> > dev_pm_opp_xlate_opp to dev_pm_opp_xlate_required_opp devfreq->max_freq
> > to devfreq->user_min_freq_req.data.freq.qos->min_freq.target_value
> > after kernel-5.7
> > Don't return -EINVAL in devfreq_passive_event_handler()
> > since it doesn't handle DEVFREQ_GOV_SUSPEND DEVFREQ_GOV_RESUME cases.
> >
> > Signed-off-by: Saravana Kannan
> > [Sibi: Integrated cpu-freqmap governor into passive_governor]
> > Signed-off-by: Sibi Sankar
> > Signed-off-by: Andrew-sh.Cheng
> > ---
> > drivers/devfreq/Kconfig| 2 +
> > drivers/devfreq/governor_passive.c | 329
> > +++--
> > include/linux/devfreq.h| 29 +++-
> > 3 files changed, 342 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
> > index 00704efe6398..f56132b0ae64 100644
> > --- a/drivers/devfreq/Kconfig
> > +++ b/drivers/devfreq/Kconfig
> > @@ -73,6 +73,8 @@ config DEVFREQ_GOV_PASSIVE
> > device. This governor does not change the frequency by itself
> > through sysfs entries. The passive governor recommends that
> > devfreq device uses the OPP table to get the frequency/voltage.
> > + Alternatively the governor can also be chosen to scale based on
> > + the online CPUs current frequency.
> >
> > comment "DEVFREQ Drivers"
> >
> > diff --git a/drivers/devfreq/governor_passive.c
> > b/drivers/devfreq/governor_passive.c
> > index b094132bd20b..9cc57b083839 100644
> > --- a/drivers/devfreq/governor_passive.c
> > +++ b/drivers/devfreq/governor_passive.c
> > @@ -8,11 +8,103 @@
> > */
> >
> > #include
> > +#include
> > +#include
> > +#include
> > #include
> > #include
> > +#include
> > #include "governor.h"
> >
> > -static int devfreq_passive_get_target_freq(struct devfreq *devfreq,
> > +struct devfreq_cpu_state {
> > + unsigned int curr_freq;
> > + unsigned int min_freq;
> > + unsigned int max_freq;
> > + unsigned int first_cpu;
> > + struct device *cpu_dev;
> > + struct opp_table *opp_table;
> > +};
>
> As I knew, the previous version has the description of structure
> as following: I wan to add the description like below.
>
> And if you have no any objection, I'd like you to order
> the variables as following and use 'dev' instead of 'cpu_dev'
> because this patch use the 'cpu_state->cpu_dev' at the multiple points.
> I think that 'cpu_state->dev' is better than 'cpu_state->cpu_dev'.
> Also, I prefer to use 'cur_freq' instead of 'curr_freq'
> because devfreq subsystem uses 'cur_freq' for expressing the 'current
> frequency'.
>
> /**
> * struct devfreq_cpu_state - Hold the per-cpu data
> * @dev:reference to cpu device.
> * @first_cpu: the cpumask of the first cpu of a policy.
> * @opp_table: reference to cpu opp table.
> * @cur_freq: the current frequency of the cpu.
> * @min_freq: the min frequency of the cpu.
> * @max_freq: the max frequency of the cpu.
> *
> * This structure stores the required cpu_data of a cpu.
> * This is auto-populated by the governor.
> */
> struct devfreq_cpu_state {
> struct device *dev;
> unsigned int first_cpu;
Re: [RESEND PATCH 2/2] arm64: defconfig: Enable options to support panel display for Mediatek Chromebooks
On Wed, Mar 31, 2021 at 5:07 PM Enric Balletbo i Serra wrote: > > There are some Mediatek based Chromebooks supported in the kernel. Enable the > required config options to have the panel display working on both devices. > This was tested on the ACER Chromebook R13 (MT8173) and the Lenovo > Ideapad Duet (MT8183), but should also enable display support for similar > devices. > > Signed-off-by: Enric Balletbo i Serra > --- Reviewed-by: Hsin-Yi Wang > This is only a resend rebased on top of mainline to fix some trivial > conflicts. > > arch/arm64/configs/defconfig | 8 > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig > index 7b4be3807b6d..f2dc42c9b932 100644 > --- a/arch/arm64/configs/defconfig > +++ b/arch/arm64/configs/defconfig > @@ -686,6 +686,7 @@ CONFIG_DRM_MSM=m > CONFIG_DRM_TEGRA=m > CONFIG_DRM_PANEL_LVDS=m > CONFIG_DRM_PANEL_SIMPLE=m > +CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m > CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m > CONFIG_DRM_PANEL_RAYDIUM_RM67191=m > CONFIG_DRM_PANEL_SITRONIX_ST7703=m > @@ -693,6 +694,7 @@ CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m > CONFIG_DRM_DISPLAY_CONNECTOR=m > CONFIG_DRM_NWL_MIPI_DSI=m > CONFIG_DRM_LONTIUM_LT9611=m > +CONFIG_DRM_PARADE_PS8640=m > CONFIG_DRM_SII902X=m > CONFIG_DRM_SIMPLE_BRIDGE=m > CONFIG_DRM_THINE_THC63LVD1024=m > @@ -707,6 +709,8 @@ CONFIG_DRM_VC4=m > CONFIG_DRM_ETNAVIV=m > CONFIG_DRM_HISI_HIBMC=m > CONFIG_DRM_HISI_KIRIN=m > +CONFIG_DRM_MEDIATEK=m > +CONFIG_DRM_MEDIATEK_HDMI=m > CONFIG_DRM_MXSFB=m > CONFIG_DRM_MESON=m > CONFIG_DRM_PL111=m > @@ -979,6 +983,7 @@ CONFIG_ROCKCHIP_IOMMU=y > CONFIG_TEGRA_IOMMU_SMMU=y > CONFIG_ARM_SMMU=y > CONFIG_ARM_SMMU_V3=y > +CONFIG_MTK_IOMMU=y > CONFIG_QCOM_IOMMU=y > CONFIG_REMOTEPROC=y > CONFIG_QCOM_Q6V5_MSS=m > @@ -1051,6 +1056,8 @@ CONFIG_PWM_BCM2835=m > CONFIG_PWM_CROS_EC=m > CONFIG_PWM_IMX27=m > CONFIG_PWM_MESON=m > +CONFIG_PWM_MTK_DISP=m > +CONFIG_PWM_MEDIATEK=m > CONFIG_PWM_RCAR=m > CONFIG_PWM_ROCKCHIP=y > CONFIG_PWM_SAMSUNG=y > @@ -1095,6 +1102,7 @@ CONFIG_QCOM_L3_PMU=y > CONFIG_NVMEM_IMX_OCOTP=y > CONFIG_NVMEM_IMX_OCOTP_SCU=y > CONFIG_QCOM_QFPROM=y > +CONFIG_MTK_EFUSE=y > CONFIG_ROCKCHIP_EFUSE=y > CONFIG_NVMEM_SUNXI_SID=y > CONFIG_UNIPHIER_EFUSE=y > -- > 2.30.2 >
Re: [RESEND PATCH 1/2] arm64: defconfig: Allow mt8173-based boards to boot from usb
On Wed, Mar 31, 2021 at 5:07 PM Enric Balletbo i Serra wrote: > > Enable the option necessary to boot mt8173-based boards to boot from > usb devices, like its phy and the regulators needed to have proper > support. > > Signed-off-by: Enric Balletbo i Serra > --- Reviewed-by: Hsin-Yi Wang > This is only a resend rebased on top of mainline to fix some trivial > conflicts. > > arch/arm64/configs/defconfig | 7 +++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig > index d612f633b771..7b4be3807b6d 100644 > --- a/arch/arm64/configs/defconfig > +++ b/arch/arm64/configs/defconfig > @@ -448,6 +448,7 @@ CONFIG_I2C_GPIO=m > CONFIG_I2C_IMX=y > CONFIG_I2C_IMX_LPI2C=y > CONFIG_I2C_MESON=y > +CONFIG_I2C_MT65XX=y > CONFIG_I2C_MV64XXX=y > CONFIG_I2C_OMAP=y > CONFIG_I2C_OWL=y > @@ -594,6 +595,7 @@ CONFIG_MFD_EXYNOS_LPASS=m > CONFIG_MFD_HI6421_PMIC=y > CONFIG_MFD_HI655X_PMIC=y > CONFIG_MFD_MAX77620=y > +CONFIG_MFD_MT6397=y > CONFIG_MFD_SPMI_PMIC=y > CONFIG_MFD_RK808=y > CONFIG_MFD_SEC_CORE=y > @@ -611,6 +613,8 @@ CONFIG_REGULATOR_HI655X=y > CONFIG_REGULATOR_MAX77620=y > CONFIG_REGULATOR_MAX8973=y > CONFIG_REGULATOR_MP8859=y > +CONFIG_REGULATOR_MT6358=y > +CONFIG_REGULATOR_MT6397=y > CONFIG_REGULATOR_PCA9450=y > CONFIG_REGULATOR_PF8X00=y > CONFIG_REGULATOR_PFUZE100=y > @@ -787,6 +791,7 @@ CONFIG_USB_RENESAS_USBHS_HCD=m > CONFIG_USB_RENESAS_USBHS=m > CONFIG_USB_ACM=m > CONFIG_USB_STORAGE=y > +CONFIG_USB_MTU3=y > CONFIG_USB_MUSB_HDRC=y > CONFIG_USB_MUSB_SUNXI=y > CONFIG_USB_DWC3=y > @@ -988,6 +993,7 @@ CONFIG_OWL_PM_DOMAINS=y > CONFIG_RASPBERRYPI_POWER=y > CONFIG_FSL_DPAA=y > CONFIG_FSL_MC_DPIO=y > +CONFIG_MTK_PMIC_WRAP=y > CONFIG_QCOM_AOSS_QMP=y > CONFIG_QCOM_COMMAND_DB=y > CONFIG_QCOM_GENI_SE=y > @@ -1064,6 +1070,7 @@ CONFIG_PHY_HI6220_USB=y > CONFIG_PHY_HISTB_COMBPHY=y > CONFIG_PHY_HISI_INNO_USB2=y > CONFIG_PHY_MVEBU_CP110_COMPHY=y > +CONFIG_PHY_MTK_TPHY=y > CONFIG_PHY_QCOM_QMP=m > CONFIG_PHY_QCOM_QUSB2=m > CONFIG_PHY_QCOM_USB_HS=y > -- > 2.30.2 >
[PATCH 3/4] arm64: dts: mt8183: Add kukui kakadu board
From: Nicolas Boichat
Kakadu is also known as ASUS Chromebook Detachable CM3.
Signed-off-by: Nicolas Boichat
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
.../boot/dts/mediatek/mt8183-kukui-kakadu.dts | 13 +
.../dts/mediatek/mt8183-kukui-kakadu.dtsi | 378 ++
3 files changed, 392 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index db4753d82a4b..fb891492ad66 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -15,6 +15,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dts
new file mode 100644
index ..20eb0dc68f09
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2020 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-kakadu.dtsi"
+
+/ {
+ model = "MediaTek kakadu board";
+ compatible = "google,kakadu-rev3", "google,kakadu-rev2",
+ "google,kakadu", "mediatek,mt8183";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
new file mode 100644
index ..b442e38a3156
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
@@ -0,0 +1,378 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2020 Google LLC
+ */
+
+#include "mt8183-kukui.dtsi"
+#include
+
+/ {
+ ppvarn_lcd: ppvarn-lcd {
+ compatible = "regulator-fixed";
+ regulator-name = "ppvarn_lcd";
+ pinctrl-names = "default";
+ pinctrl-0 = <_lcd_en>;
+
+ enable-active-high;
+
+ gpio = < 66 GPIO_ACTIVE_HIGH>;
+ };
+
+ ppvarp_lcd: ppvarp-lcd {
+ compatible = "regulator-fixed";
+ regulator-name = "ppvarp_lcd";
+ pinctrl-names = "default";
+ pinctrl-0 = <_lcd_en>;
+
+ enable-active-high;
+
+ gpio = < 166 GPIO_ACTIVE_HIGH>;
+ };
+
+ pp1800_lcd: pp1800-lcd {
+ compatible = "regulator-fixed";
+ regulator-name = "pp1800_lcd";
+ pinctrl-names = "default";
+ pinctrl-0 = <_lcd_en>;
+
+ enable-active-high;
+
+ gpio = < 36 GPIO_ACTIVE_HIGH>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <_eject>;
+
+ pen-insert {
+ label = "Pen Insert";
+ /* Insert = low, eject = high */
+ gpios = < 6 GPIO_ACTIVE_LOW>;
+ linux,code = ;
+ linux,input-type = ;
+ wakeup-event-action = ;
+ wakeup-source;
+ };
+ };
+};
+
+ {
+ firmware-name = "nvm_00440302_i2s_eu.bin";
+};
+
+ {
+ status = "okay";
+
+ touchscreen: touchscreen@10 {
+ compatible = "hid-over-i2c";
+ reg = <0x10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_touch>;
+
+ interrupt-parent = <>;
+ interrupts = <155 IRQ_TYPE_EDGE_FALLING>;
+
+ post-power-on-delay-ms = <10>;
+ hid-descr-addr = <0x0001>;
+ };
+};
+
+_vcama2_reg {
+ regulator-min-microvolt = <280>;
+ regulator-max-microvolt = <280>;
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ status = "okay";
+ clock-frequency = <40>;
+
+ eeprom@58 {
+ compatible = "atmel,24c32";
+ reg = <0x58>;
+ pagesize = <32>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = &
[PATCH 4/4] arm64: dts: mt8183: Add kukui kodama board
kodama is also known as Lenovo 10e Chromebook Tablet.
Signed-off-by: Hsin-Yi Wang
---
There are 4 skus in kodama:
- OV5695 camera + AUO panel
- GC5035 camera + AUO panel
- OV5695 camera + BOE panel
- GC5035 camera + BOE panel
The camera node are not yet ready to sent, so there's only panel in this
patch.
---
arch/arm64/boot/dts/mediatek/Makefile | 4 +
.../mediatek/mt8183-kukui-kodama-sku16.dts| 21 ++
.../mediatek/mt8183-kukui-kodama-sku272.dts | 21 ++
.../mediatek/mt8183-kukui-kodama-sku288.dts | 21 ++
.../mediatek/mt8183-kukui-kodama-sku32.dts| 21 ++
.../dts/mediatek/mt8183-kukui-kodama.dtsi | 343 ++
6 files changed, 431 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku16.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku272.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku288.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku32.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index fb891492ad66..291087dccaa8 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -16,6 +16,10 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku288.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku32.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku16.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku16.dts
new file mode 100644
index ..e3dd75bdaea4
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku16.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ *
+ * SKU: 0x10 => 16
+ * - bit 8: Camera: 0 (OV5695)
+ * - bits 7..4: Panel ID: 0x1 (AUO)
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-kodama.dtsi"
+
+/ {
+ model = "MediaTek kodama sku16 board";
+ compatible = "google,kodama-sku16", "google,kodama", "mediatek,mt8183";
+};
+
+ {
+ status = "okay";
+ compatible = "auo,b101uan08.3";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku272.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku272.dts
new file mode 100644
index ..d81935ae07bc
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku272.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2020 Google LLC
+ *
+ * SKU: 0x110 => 272
+ * - bit 8: Camera: 1 (GC5035)
+ * - bits 7..4: Panel ID: 0x1 (AUO)
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-kodama.dtsi"
+
+/ {
+ model = "MediaTek kodama sku272 board";
+ compatible = "google,kodama-sku272", "google,kodama", "mediatek,mt8183";
+};
+
+ {
+ status = "okay";
+ compatible = "auo,b101uan08.3";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku288.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku288.dts
new file mode 100644
index ..f4082fbe0517
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku288.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2020 Google LLC
+ *
+ * SKU: 0x120 => 288
+ * - bit 8: Camera: 1 (GC5035)
+ * - bits 7..4: Panel ID: 0x2 (BOE)
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-kodama.dtsi"
+
+/ {
+ model = "MediaTek kodama sku288 board";
+ compatible = "google,kodama-sku288", "google,kodama", "mediatek,mt8183";
+};
+
+ {
+ status = "okay";
+ compatible = "boe,tv101wum-n53";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku32.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku32.dts
new file mode 100644
index ..7739358008ee
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku32.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ *
+ * SKU: 0x20 => 32
+ * - bit 8: Camera: 0 (OV5695)
+ * - bits 7..4: Panel ID: 0x2 (BOE)
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-kodama.dtsi"
+
+/ {
+ model = "MediaTek kodama sku32 board";
+
[PATCH 2/4] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-kodama
Kodama is also known as Lenovo 10e Chromebook Tablet. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/arm/mediatek.yaml | 9 + 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 9774f44b51d9..c6ecb510d372 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -144,6 +144,15 @@ properties: - const: google,kakadu-rev2 - const: google,kakadu - const: mediatek,mt8183 + - description: Google Kodama (Lenovo 10e Chromebook Tablet) +items: + - enum: + - google,kodama-sku16 + - google,kodama-sku272 + - google,kodama-sku288 + - google,kodama-sku32 + - const: google,kodama + - const: mediatek,mt8183 additionalProperties: true -- 2.31.0.291.g576ba9dcdaf-goog
[PATCH 1/4] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-kakadu
Kakadu is also known as ASUS Chromebook Detachable CM3. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/arm/mediatek.yaml | 7 +++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index cf24401edb85..9774f44b51d9 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -138,6 +138,13 @@ properties: - const: google,juniper-sku16 - const: google,juniper - const: mediatek,mt8183 + - description: Google Kakadu (ASUS Chromebook Detachable CM3) +items: + - const: google,kakadu-rev3 + - const: google,kakadu-rev2 + - const: google,kakadu + - const: mediatek,mt8183 + additionalProperties: true -- 2.31.0.291.g576ba9dcdaf-goog
[PATCH v3] soc: mediatek: mmsys: Add mt8183 mmsys routing table
mt8183 has different routing registers than mt8173.
Signed-off-by: Hsin-Yi Wang
Tested-by: Enric Balletbo i Serra
---
v2->v3:
Fix comments.
v1->v2:
Move mt8183 routing table to mt8183-mmsys.h
This patch is based on
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git
v5.12-next/soc
---
drivers/soc/mediatek/mt8183-mmsys.h | 54 +
drivers/soc/mediatek/mtk-mmsys.c| 3 ++
2 files changed, 57 insertions(+)
create mode 100644 drivers/soc/mediatek/mt8183-mmsys.h
diff --git a/drivers/soc/mediatek/mt8183-mmsys.h
b/drivers/soc/mediatek/mt8183-mmsys.h
new file mode 100644
index ..579dfc8dc8fc
--- /dev/null
+++ b/drivers/soc/mediatek/mt8183-mmsys.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SOC_MEDIATEK_MT8183_MMSYS_H
+#define __SOC_MEDIATEK_MT8183_MMSYS_H
+
+#define MT8183_DISP_OVL0_MOUT_EN 0xf00
+#define MT8183_DISP_OVL0_2L_MOUT_EN0xf04
+#define MT8183_DISP_OVL1_2L_MOUT_EN0xf08
+#define MT8183_DISP_DITHER0_MOUT_EN0xf0c
+#define MT8183_DISP_PATH0_SEL_IN 0xf24
+#define MT8183_DISP_DSI0_SEL_IN0xf2c
+#define MT8183_DISP_DPI0_SEL_IN0xf30
+#define MT8183_DISP_RDMA0_SOUT_SEL_IN 0xf50
+#define MT8183_DISP_RDMA1_SOUT_SEL_IN 0xf54
+
+#define MT8183_OVL0_MOUT_EN_OVL0_2LBIT(4)
+#define MT8183_OVL0_2L_MOUT_EN_DISP_PATH0 BIT(0)
+#define MT8183_OVL1_2L_MOUT_EN_RDMA1 BIT(4)
+#define MT8183_DITHER0_MOUT_IN_DSI0BIT(0)
+#define MT8183_DISP_PATH0_SEL_IN_OVL0_2L 0x1
+#define MT8183_DSI0_SEL_IN_RDMA0 0x1
+#define MT8183_DSI0_SEL_IN_RDMA1 0x3
+#define MT8183_DPI0_SEL_IN_RDMA0 0x1
+#define MT8183_DPI0_SEL_IN_RDMA1 0x2
+#define MT8183_RDMA0_SOUT_COLOR0 0x1
+#define MT8183_RDMA1_SOUT_DSI0 0x1
+
+static const struct mtk_mmsys_routes mmsys_mt8183_routing_table[] = {
+ {
+ DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL_2L0,
+ MT8183_DISP_OVL0_MOUT_EN, MT8183_OVL0_MOUT_EN_OVL0_2L
+ }, {
+ DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0,
+ MT8183_DISP_OVL0_2L_MOUT_EN, MT8183_OVL0_2L_MOUT_EN_DISP_PATH0
+ }, {
+ DDP_COMPONENT_OVL_2L1, DDP_COMPONENT_RDMA1,
+ MT8183_DISP_OVL1_2L_MOUT_EN, MT8183_OVL1_2L_MOUT_EN_RDMA1
+ }, {
+ DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+ MT8183_DISP_DITHER0_MOUT_EN, MT8183_DITHER0_MOUT_IN_DSI0
+ }, {
+ DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0,
+ MT8183_DISP_PATH0_SEL_IN, MT8183_DISP_PATH0_SEL_IN_OVL0_2L
+ }, {
+ DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0,
+ MT8183_DISP_DPI0_SEL_IN, MT8183_DPI0_SEL_IN_RDMA1
+ }, {
+ DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0,
+ MT8183_DISP_RDMA0_SOUT_SEL_IN, MT8183_RDMA0_SOUT_COLOR0
+ }
+};
+
+#endif /* __SOC_MEDIATEK_MT8183_MMSYS_H */
+
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index c46d8ab8b0c2..79e55150210e 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -11,6 +11,7 @@
#include
#include "mtk-mmsys.h"
+#include "mt8183-mmsys.h"
static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
.clk_driver = "clk-mt2701-mm",
@@ -40,6 +41,8 @@ static const struct mtk_mmsys_driver_data
mt8173_mmsys_driver_data = {
static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
.clk_driver = "clk-mt8183-mm",
+ .routes = mmsys_mt8183_routing_table,
+ .num_routes = ARRAY_SIZE(mmsys_mt8183_routing_table),
};
struct mtk_mmsys {
--
2.31.0.291.g576ba9dcdaf-goog
Re: [PATCH] drm/mediatek: Add missing MODULE_DEVICE_TABLE()
On Tue, Mar 30, 2021 at 5:43 PM Enric Balletbo i Serra
wrote:
>
> Hi,
>
> On 3/2/21 12:07, Enric Balletbo i Serra wrote:
> > From: Boris Brezillon
> >
> > This patch adds the missing MODULE_DEVICE_TABLE definitions on different
> > Mediatek drivers which generates correct modalias for automatic loading
> > when these drivers are compiled as an external module.
> >
> > Signed-off-by: Boris Brezillon
> > Signed-off-by: Enric Balletbo i Serra
Reviewed-by: Hsin-Yi Wang
>
> A gentle ping for someone to review this patchset :-)
>
> Thanks,
> Enric
>
> > ---
> >
> > drivers/gpu/drm/mediatek/mtk_cec.c | 2 ++
> > drivers/gpu/drm/mediatek/mtk_dpi.c | 1 +
> > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 +
> > drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
> > drivers/gpu/drm/mediatek/mtk_hdmi.c | 1 +
> > drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c | 1 +
> > 6 files changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_cec.c
> > b/drivers/gpu/drm/mediatek/mtk_cec.c
> > index cb29b649fcdb..3b86e626e459 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_cec.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_cec.c
> > @@ -7,6 +7,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> >
> > @@ -247,6 +248,7 @@ static const struct of_device_id mtk_cec_of_ids[] = {
> > { .compatible = "mediatek,mt8173-cec", },
> > {}
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_cec_of_ids);
> >
> > struct platform_driver mtk_cec_driver = {
> > .probe = mtk_cec_probe,
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index 52f11a63a330..2680370652fd 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -822,6 +822,7 @@ static const struct of_device_id mtk_dpi_of_ids[] = {
> > },
> > { },
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_dpi_of_ids);
> >
> > struct platform_driver mtk_dpi_driver = {
> > .probe = mtk_dpi_probe,
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > index 5f49a809689b..e4645c8ae1c0 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > @@ -470,6 +470,7 @@ static const struct of_device_id mtk_drm_of_ids[] = {
> > .data = _mmsys_driver_data},
> > { }
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_drm_of_ids);
> >
> > static int mtk_drm_probe(struct platform_device *pdev)
> > {
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> > b/drivers/gpu/drm/mediatek/mtk_dsi.c
> > index 0527480c07be..c71ce62d1bec 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> > @@ -1193,6 +1193,7 @@ static const struct of_device_id mtk_dsi_of_match[] =
> > {
> > .data = _dsi_driver_data },
> > { },
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_dsi_of_match);
> >
> > struct platform_driver mtk_dsi_driver = {
> > .probe = mtk_dsi_probe,
> > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c
> > b/drivers/gpu/drm/mediatek/mtk_hdmi.c
> > index 8ee55f9e2954..b4696a9d73f7 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
> > @@ -1818,6 +1818,7 @@ static const struct of_device_id
> > mtk_drm_hdmi_of_ids[] = {
> > },
> > {}
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_drm_hdmi_of_ids);
> >
> > static struct platform_driver mtk_hdmi_driver = {
> > .probe = mtk_drm_hdmi_probe,
> > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
> > b/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
> > index 62dbad5675bb..6207eac88550 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
> > @@ -335,6 +335,7 @@ static const struct of_device_id mtk_hdmi_ddc_match[] =
> > {
> > { .compatible = "mediatek,mt8173-hdmi-ddc", },
> > {},
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_hdmi_ddc_match);
> >
> > struct platform_driver mtk_hdmi_ddc_driver = {
> > .probe = mtk_hdmi_ddc_probe,
> >
[PATCH v2] soc: mediatek: mmsys: Add mt8183 mmsys routing table
mt8183 has different routing registers than mt8173.
Signed-off-by: Hsin-Yi Wang
Tested-by: Enric Balletbo i Serra
---
v1->v2:
Move mt8183 routing table to mt8183-mmsys.h
This patch is based on
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git
v5.12-next/soc
---
drivers/soc/mediatek/mt8183-mmsys.h | 56 +
drivers/soc/mediatek/mtk-mmsys.c| 3 ++
2 files changed, 59 insertions(+)
create mode 100644 drivers/soc/mediatek/mt8183-mmsys.h
diff --git a/drivers/soc/mediatek/mt8183-mmsys.h
b/drivers/soc/mediatek/mt8183-mmsys.h
new file mode 100644
index ..38e9f683e5bd
--- /dev/null
+++ b/drivers/soc/mediatek/mt8183-mmsys.h
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SOC_MEDIATEK_MT8183_MMSYS_H
+#define __SOC_MEDIATEK_MT8183_MMSYS_H
+
+#include "mtk-mmsys.h"
+
+#define MT8183_DISP_OVL0_MOUT_EN 0xf00
+#define MT8183_DISP_OVL0_2L_MOUT_EN0xf04
+#define MT8183_DISP_OVL1_2L_MOUT_EN0xf08
+#define MT8183_DISP_DITHER0_MOUT_EN0xf0c
+#define MT8183_DISP_PATH0_SEL_IN 0xf24
+#define MT8183_DISP_DSI0_SEL_IN0xf2c
+#define MT8183_DISP_DPI0_SEL_IN0xf30
+#define MT8183_DISP_RDMA0_SOUT_SEL_IN 0xf50
+#define MT8183_DISP_RDMA1_SOUT_SEL_IN 0xf54
+
+#define MT8183_OVL0_MOUT_EN_OVL0_2LBIT(4)
+#define MT8183_OVL0_2L_MOUT_EN_DISP_PATH0 BIT(0)
+#define MT8183_OVL1_2L_MOUT_EN_RDMA1 BIT(4)
+#define MT8183_DITHER0_MOUT_IN_DSI0BIT(0)
+#define MT8183_DISP_PATH0_SEL_IN_OVL0_2L 0x1
+#define MT8183_DSI0_SEL_IN_RDMA0 0x1
+#define MT8183_DSI0_SEL_IN_RDMA1 0x3
+#define MT8183_DPI0_SEL_IN_RDMA0 0x1
+#define MT8183_DPI0_SEL_IN_RDMA1 0x2
+#define MT8183_RDMA0_SOUT_COLOR0 0x1
+#define MT8183_RDMA1_SOUT_DSI0 0x1
+
+static const struct mtk_mmsys_routes mmsys_mt8183_routing_table[] = {
+ {
+ DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL_2L0,
+ MT8183_DISP_OVL0_MOUT_EN, MT8183_OVL0_MOUT_EN_OVL0_2L
+ }, {
+ DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0,
+ MT8183_DISP_OVL0_2L_MOUT_EN, MT8183_OVL0_2L_MOUT_EN_DISP_PATH0
+ }, {
+ DDP_COMPONENT_OVL_2L1, DDP_COMPONENT_RDMA1,
+ MT8183_DISP_OVL1_2L_MOUT_EN, MT8183_OVL1_2L_MOUT_EN_RDMA1
+ }, {
+ DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+ MT8183_DISP_DITHER0_MOUT_EN, MT8183_DITHER0_MOUT_IN_DSI0
+ }, {
+ DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0,
+ MT8183_DISP_PATH0_SEL_IN, MT8183_DISP_PATH0_SEL_IN_OVL0_2L
+ }, {
+ DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0,
+ MT8183_DISP_DPI0_SEL_IN, MT8183_DPI0_SEL_IN_RDMA1
+ }, {
+ DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0,
+ MT8183_DISP_RDMA0_SOUT_SEL_IN, MT8183_RDMA0_SOUT_COLOR0
+ }
+};
+
+#endif /* __SOC_MEDIATEK_MT8183_MMSYS_H */
+
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index c46d8ab8b0c2..ac68a989854e 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -10,6 +10,7 @@
#include
#include
+#include "mt8183-mmsys.h"
#include "mtk-mmsys.h"
static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
@@ -40,6 +41,8 @@ static const struct mtk_mmsys_driver_data
mt8173_mmsys_driver_data = {
static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
.clk_driver = "clk-mt8183-mm",
+ .routes = mmsys_mt8183_routing_table,
+ .num_routes = ARRAY_SIZE(mmsys_mt8183_routing_table),
};
struct mtk_mmsys {
--
2.31.0.291.g576ba9dcdaf-goog
[PATCH v2] arm64: dts: mt8183: Add gce client reg for display subcomponents
Add mediatek,gce-client-reg for mmsys, ccorr, aal, gamma, dither.
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183")
Signed-off-by: Hsin-Yi Wang
Tested-by: Enric Balletbo i Serra
---
v1->v2:
Add for mmsys.
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 80519a145f13..16f4b1fc0fb9 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -983,6 +983,9 @@ mmsys: syscon@1400 {
compatible = "mediatek,mt8183-mmsys", "syscon";
reg = <0 0x1400 0 0x1000>;
#clock-cells = <1>;
+ mboxes = < 0 CMDQ_THR_PRIO_HIGHEST>,
+< 1 CMDQ_THR_PRIO_HIGHEST>;
+ mediatek,gce-client-reg = < SUBSYS_1400 0
0x1000>;
};
ovl0: ovl@14008000 {
@@ -1058,6 +1061,7 @@ ccorr0: ccorr@1400f000 {
interrupts = ;
power-domains = < MT8183_POWER_DOMAIN_DISP>;
clocks = < CLK_MM_DISP_CCORR0>;
+ mediatek,gce-client-reg = < SUBSYS_1400 0xf000
0x1000>;
};
aal0: aal@1401 {
@@ -1067,6 +1071,7 @@ aal0: aal@1401 {
interrupts = ;
power-domains = < MT8183_POWER_DOMAIN_DISP>;
clocks = < CLK_MM_DISP_AAL0>;
+ mediatek,gce-client-reg = < SUBSYS_1401 0
0x1000>;
};
gamma0: gamma@14011000 {
@@ -1075,6 +1080,7 @@ gamma0: gamma@14011000 {
interrupts = ;
power-domains = < MT8183_POWER_DOMAIN_DISP>;
clocks = < CLK_MM_DISP_GAMMA0>;
+ mediatek,gce-client-reg = < SUBSYS_1401 0x1000
0x1000>;
};
dither0: dither@14012000 {
@@ -1083,6 +1089,7 @@ dither0: dither@14012000 {
interrupts = ;
power-domains = < MT8183_POWER_DOMAIN_DISP>;
clocks = < CLK_MM_DISP_DITHER0>;
+ mediatek,gce-client-reg = < SUBSYS_1401 0x2000
0x1000>;
};
dsi0: dsi@14014000 {
--
2.31.0.291.g576ba9dcdaf-goog
[PATCH] soc: mediatek: mmsys: Add mt8183 mmsys routing table
mt8183 has different routing registers than mt8173.
Signed-off-by: Hsin-Yi Wang
---
This patch is based on series ("soc: mediatek: Prepare MMSYS for DDP routing
using tables")[1]
and tested with mt8183 krand and mt8183 juniper device.
The register value is referenced from [2].
[1]
https://patchwork.kernel.org/project/linux-mediatek/cover/20210317181711.795245-1-enric.balle...@collabora.com/
[2]
https://patchwork.kernel.org/project/linux-mediatek/patch/1609815993-22744-6-git-send-email-yongqiang@mediatek.com/
---
drivers/soc/mediatek/mtk-mmsys.c | 2 ++
drivers/soc/mediatek/mtk-mmsys.h | 47
2 files changed, 49 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index c46d8ab8b0c2..16bb55b0463a 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -40,6 +40,8 @@ static const struct mtk_mmsys_driver_data
mt8173_mmsys_driver_data = {
static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
.clk_driver = "clk-mt8183-mm",
+ .routes = mmsys_mt8183_routing_table,
+ .num_routes = ARRAY_SIZE(mmsys_mt8183_routing_table),
};
struct mtk_mmsys {
diff --git a/drivers/soc/mediatek/mtk-mmsys.h b/drivers/soc/mediatek/mtk-mmsys.h
index a760a34e6eca..c55baf5932b8 100644
--- a/drivers/soc/mediatek/mtk-mmsys.h
+++ b/drivers/soc/mediatek/mtk-mmsys.h
@@ -66,6 +66,28 @@
#define DPI_SEL_IN_BLS 0x0
#define DSI_SEL_IN_RDMA0x1
+#define MT8183_DISP_OVL0_MOUT_EN 0xf00
+#define MT8183_DISP_OVL0_2L_MOUT_EN0xf04
+#define MT8183_DISP_OVL1_2L_MOUT_EN0xf08
+#define MT8183_DISP_DITHER0_MOUT_EN0xf0c
+#define MT8183_DISP_PATH0_SEL_IN 0xf24
+#define MT8183_DISP_DSI0_SEL_IN0xf2c
+#define MT8183_DISP_DPI0_SEL_IN0xf30
+#define MT8183_DISP_RDMA0_SOUT_SEL_IN 0xf50
+#define MT8183_DISP_RDMA1_SOUT_SEL_IN 0xf54
+
+#define MT8183_OVL0_MOUT_EN_OVL0_2LBIT(4)
+#define MT8183_OVL0_2L_MOUT_EN_DISP_PATH0 BIT(0)
+#define MT8183_OVL1_2L_MOUT_EN_RDMA1 BIT(4)
+#define MT8183_DITHER0_MOUT_IN_DSI0BIT(0)
+#define MT8183_DISP_PATH0_SEL_IN_OVL0_2L 0x1
+#define MT8183_DSI0_SEL_IN_RDMA0 0x1
+#define MT8183_DSI0_SEL_IN_RDMA1 0x3
+#define MT8183_DPI0_SEL_IN_RDMA0 0x1
+#define MT8183_DPI0_SEL_IN_RDMA1 0x2
+#define MT8183_RDMA0_SOUT_COLOR0 0x1
+#define MT8183_RDMA1_SOUT_DSI0 0x1
+
struct mtk_mmsys_routes {
u32 from_comp;
u32 to_comp;
@@ -212,4 +234,29 @@ static const struct mtk_mmsys_routes
mmsys_default_routing_table[] = {
}
};
+static const struct mtk_mmsys_routes mmsys_mt8183_routing_table[] = {
+ {
+ DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL_2L0,
+ MT8183_DISP_OVL0_MOUT_EN, MT8183_OVL0_MOUT_EN_OVL0_2L
+ }, {
+ DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0,
+ MT8183_DISP_OVL0_2L_MOUT_EN, MT8183_OVL0_2L_MOUT_EN_DISP_PATH0
+ }, {
+ DDP_COMPONENT_OVL_2L1, DDP_COMPONENT_RDMA1,
+ MT8183_DISP_OVL1_2L_MOUT_EN, MT8183_OVL1_2L_MOUT_EN_RDMA1
+ }, {
+ DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+ MT8183_DISP_DITHER0_MOUT_EN, MT8183_DITHER0_MOUT_IN_DSI0
+ }, {
+ DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0,
+ MT8183_DISP_PATH0_SEL_IN, MT8183_DISP_PATH0_SEL_IN_OVL0_2L
+ }, {
+ DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0,
+ MT8183_DISP_DPI0_SEL_IN, MT8183_DPI0_SEL_IN_RDMA1
+ }, {
+ DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0,
+ MT8183_DISP_RDMA0_SOUT_SEL_IN, MT8183_RDMA0_SOUT_COLOR0
+ }
+};
+
#endif /* __SOC_MEDIATEK_MTK_MMSYS_H */
--
2.31.0.rc2.261.g7f71774620-goog
Re: [v7,1/3] arm64: dts: mt8183: add thermal zone node
On Tue, Mar 16, 2021 at 3:02 PM Michael Kao wrote:
>
> From: "michael.kao"
>
> Add thermal zone node to Mediatek MT8183 dts file.
>
> Evaluate the thermal zone every 500ms while not cooling
> and every 100ms when passive cooling is performed.
>
> Signed-off-by: Matthias Kaehlcke
> Signed-off-by: Michael Kao
Tested-by: Hsin-Yi Wang
Tested this patch on mt8183 devices.
> ---
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85
> 1 file changed, 85 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 5b782a4769e7..d3550af06408 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -657,6 +657,87 @@
> status = "disabled";
> };
>
> + thermal: thermal@1100b000 {
> + #thermal-sensor-cells = <1>;
> + compatible = "mediatek,mt8183-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + clocks = < CLK_INFRA_THERM>,
> +< CLK_INFRA_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = < MT8183_INFRACFG_AO_THERM_SW_RST>;
> + interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
> + mediatek,auxadc = <>;
> + mediatek,apmixedsys = <>;
> + nvmem-cells = <_calibration>;
> + nvmem-cell-names = "calibration-data";
> + };
> +
> + thermal-zones {
> + cpu_thermal: cpu_thermal {
> + polling-delay-passive = <100>;
> + polling-delay = <500>;
> + thermal-sensors = < 0>;
> + sustainable-power = <5000>;
> + };
> +
> + /* The tzts1 ~ tzts6 don't need to polling */
> + /* The tzts1 ~ tzts6 don't need to thermal throttle */
> +
> + tzts1: tzts1 {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 1>;
> + sustainable-power = <5000>;
> + trips {};
> + cooling-maps {};
> + };
> +
> + tzts2: tzts2 {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 2>;
> + sustainable-power = <5000>;
> + trips {};
> + cooling-maps {};
> + };
> +
> + tzts3: tzts3 {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 3>;
> + sustainable-power = <5000>;
> + trips {};
> + cooling-maps {};
> + };
> +
> + tzts4: tzts4 {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 4>;
> + sustainable-power = <5000>;
> + trips {};
> + cooling-maps {};
> + };
> +
> + tzts5: tzts5 {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 5>;
> + sustainable-power = <5000>;
> + trips {};
> + cooling-maps {};
> + };
> +
> + tztsABB: tztsABB {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 6>;
> +
[PATCH v4 4/4] arm64: dts: mt8183: Add kukui-jacuzzi-juniper board
Juniper is known as Acer Chromebook Spin 311 (CP311-3H).
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
.../mt8183-kukui-jacuzzi-juniper-sku16.dts| 13 +
.../mt8183-kukui-jacuzzi-juniper.dtsi | 27 +++
3 files changed, 41 insertions(+)
create mode 100644
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dts
create mode 100644
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index 554105d2c389..db4753d82a4b 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -14,6 +14,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
diff --git
a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dts
new file mode 100644
index ..36d2c3b3cadf
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi-juniper.dtsi"
+
+/ {
+ model = "Google juniper sku16 board";
+ compatible = "google,juniper-sku16", "google,juniper",
"mediatek,mt8183";
+};
+
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper.dtsi
new file mode 100644
index ..078bc765646f
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi.dtsi"
+
+ {
+ trackpad@2c {
+ compatible = "hid-over-i2c";
+ reg = <0x2c>;
+ hid-descr-addr = <0x20>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+
+ interrupts-extended = < 7 IRQ_TYPE_LEVEL_LOW>;
+
+ wakeup-source;
+ };
+};
+
+_wifi {
+ qcom,ath10k-calibration-variant = "GO_JUNIPER";
+};
+
--
2.31.0.rc2.261.g7f71774620-goog
[PATCH v4 3/4] arm64: dts: mt8183: Add kukui-jacuzzi-damu board
Damu is known as ASUS Chromebook Flip CM3.
Signed-off-by: Hsin-Yi Wang
---
v3->v4: none
v2->v3: remove unused nodes
v1->v2: fix pp3300_panel regulator property
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
.../mediatek/mt8183-kukui-jacuzzi-damu.dts| 31 ++
.../dts/mediatek/mt8183-kukui-jacuzzi.dtsi| 474 ++
3 files changed, 506 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index deba27ab7657..554105d2c389 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
new file mode 100644
index ..42ba9c00866c
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi.dtsi"
+
+/ {
+ model = "Google damu board";
+ compatible = "google,damu", "mediatek,mt8183";
+};
+
+ {
+ status = "okay";
+
+ compatible = "hid-over-i2c";
+ reg = <0x10>;
+ interrupt-parent = <>;
+ interrupts = <155 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+
+ post-power-on-delay-ms = <10>;
+ hid-descr-addr = <0x0001>;
+};
+
+_wifi {
+ qcom,ath10k-calibration-variant = "GO_DAMU";
+};
+
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
new file mode 100644
index ..4049dff8464b
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
@@ -0,0 +1,474 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+#include "mt8183-kukui.dtsi"
+
+/ {
+ panel: panel {
+ compatible = "auo,b116xw03";
+ power-supply = <_panel>;
+ ddc-i2c-bus = <>;
+ backlight = <_lcd0>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <_out>;
+ };
+ };
+ };
+
+ pp1200_mipibrdg: pp1200-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "pp1200_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_mipibrdg_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 54 GPIO_ACTIVE_HIGH>;
+ };
+
+ pp1800_mipibrdg: pp1800-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "pp1800_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_lcd_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 36 GPIO_ACTIVE_HIGH>;
+ };
+
+ pp3300_panel: pp3300-panel {
+ compatible = "regulator-fixed";
+ regulator-name = "pp3300_panel";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_panel_pins>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 35 GPIO_ACTIVE_HIGH>;
+ };
+
+ vddio_mipibrdg: vddio-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "vddio_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_mipibrdg_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 37 GPIO_ACTIVE_HIGH>;
+ };
+
+ volume_buttons: volume-buttons {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <_button_pins>;
+
+
[PATCH v4 2/4] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-juniper
mt8183-kukui-jacuzzi-juniper board also known as Acer Chromebook Spin 311, using mediatek mt8183 SoC. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/arm/mediatek.yaml | 5 + 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index a86716cdd408..edee2c3f8620 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -129,6 +129,11 @@ properties: items: - const: google,damu - const: mediatek,mt8183 + - description: Google Juniper (Acer Chromebook Spin 311) +items: + - const: google,juniper-sku16 + - const: google,juniper + - const: mediatek,mt8183 additionalProperties: true -- 2.31.0.rc2.261.g7f71774620-goog
[PATCH v4 1/4] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-damu
mt8183-kukui-jacuzzi-damu board also known as ASUS Chromebook Flip CM3, using mediatek mt8183 SoC. Signed-off-by: Hsin-Yi Wang Reviewed-by: Enric Balletbo i Serra --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 93b3bdf6eaeb..a86716cdd408 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -125,6 +125,10 @@ properties: - google,krane-sku176 - const: google,krane - const: mediatek,mt8183 + - description: Google Damu (ASUS Chromebook Flip CM3) +items: + - const: google,damu + - const: mediatek,mt8183 additionalProperties: true -- 2.31.0.rc2.261.g7f71774620-goog
[PATCH v3 2/2] arm64: dts: mt8183: Add kukui-jacuzzi-damu board
Damu is known as ASUS Chromebook Flip CM3.
Signed-off-by: Hsin-Yi Wang
---
v2->v3: remove unused nodes
v1->v2: fix pp3300_panel regulator property
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
.../mediatek/mt8183-kukui-jacuzzi-damu.dts| 31 ++
.../dts/mediatek/mt8183-kukui-jacuzzi.dtsi| 474 ++
3 files changed, 506 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index deba27ab7657..554105d2c389 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
new file mode 100644
index ..42ba9c00866c
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi.dtsi"
+
+/ {
+ model = "Google damu board";
+ compatible = "google,damu", "mediatek,mt8183";
+};
+
+ {
+ status = "okay";
+
+ compatible = "hid-over-i2c";
+ reg = <0x10>;
+ interrupt-parent = <>;
+ interrupts = <155 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+
+ post-power-on-delay-ms = <10>;
+ hid-descr-addr = <0x0001>;
+};
+
+_wifi {
+ qcom,ath10k-calibration-variant = "GO_DAMU";
+};
+
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
new file mode 100644
index ..4049dff8464b
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
@@ -0,0 +1,474 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+#include "mt8183-kukui.dtsi"
+
+/ {
+ panel: panel {
+ compatible = "auo,b116xw03";
+ power-supply = <_panel>;
+ ddc-i2c-bus = <>;
+ backlight = <_lcd0>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <_out>;
+ };
+ };
+ };
+
+ pp1200_mipibrdg: pp1200-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "pp1200_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_mipibrdg_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 54 GPIO_ACTIVE_HIGH>;
+ };
+
+ pp1800_mipibrdg: pp1800-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "pp1800_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_lcd_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 36 GPIO_ACTIVE_HIGH>;
+ };
+
+ pp3300_panel: pp3300-panel {
+ compatible = "regulator-fixed";
+ regulator-name = "pp3300_panel";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_panel_pins>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 35 GPIO_ACTIVE_HIGH>;
+ };
+
+ vddio_mipibrdg: vddio-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "vddio_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_mipibrdg_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 37 GPIO_ACTIVE_HIGH>;
+ };
+
+ volume_buttons: volume-buttons {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <_button_pins>;
+
+ volume_down {
+
[PATCH v3 1/2] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-damu
mt8183-kukui-jacuzzi-damu board also known as ASUS Chromebook Flip CM3, using mediatek mt8183 SoC. Signed-off-by: Hsin-Yi Wang Reviewed-by: Enric Balletbo i Serra --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 93b3bdf6eaeb..a86716cdd408 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -125,6 +125,10 @@ properties: - google,krane-sku176 - const: google,krane - const: mediatek,mt8183 + - description: Google Damu (ASUS Chromebook Flip CM3) +items: + - const: google,damu + - const: mediatek,mt8183 additionalProperties: true -- 2.31.0.rc2.261.g7f71774620-goog
Re: [PATCH v4 2/2] drm/bridge: anx7625: disable regulators when power off
On Wed, Feb 24, 2021 at 2:14 PM Hsin-Yi Wang wrote:
>
> When suspending the driver, anx7625_power_standby() will be called to
> turn off reset-gpios and enable-gpios. However, power supplies are not
> disabled. To save power, the driver can get the power supply regulators
> and turn off them in anx7625_power_standby().
>
> Signed-off-by: Hsin-Yi Wang
> Reviewed-by: Robert Foss
> ---
Ping on the thread, thanks.
> drivers/gpu/drm/bridge/analogix/anx7625.c | 34 +++
> drivers/gpu/drm/bridge/analogix/anx7625.h | 1 +
> 2 files changed, 35 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> b/drivers/gpu/drm/bridge/analogix/anx7625.c
> index 65cc05982f826..23283ba0c4f93 100644
> --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> @@ -11,6 +11,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -875,12 +876,25 @@ static int sp_tx_edid_read(struct anx7625_data *ctx,
> static void anx7625_power_on(struct anx7625_data *ctx)
> {
> struct device *dev = >client->dev;
> + int ret, i;
>
> if (!ctx->pdata.low_power_mode) {
> DRM_DEV_DEBUG_DRIVER(dev, "not low power mode!\n");
> return;
> }
>
> + for (i = 0; i < ARRAY_SIZE(ctx->pdata.supplies); i++) {
> + ret = regulator_enable(ctx->pdata.supplies[i].consumer);
> + if (ret < 0) {
> + DRM_DEV_DEBUG_DRIVER(dev, "cannot enable supply %d:
> %d\n",
> +i, ret);
> + goto reg_err;
> + }
> + usleep_range(2000, 2100);
> + }
> +
> + usleep_range(4000, 4100);
> +
> /* Power on pin enable */
> gpiod_set_value(ctx->pdata.gpio_p_on, 1);
> usleep_range(1, 11000);
> @@ -889,11 +903,16 @@ static void anx7625_power_on(struct anx7625_data *ctx)
> usleep_range(1, 11000);
>
> DRM_DEV_DEBUG_DRIVER(dev, "power on !\n");
> + return;
> +reg_err:
> + for (--i; i >= 0; i--)
> + regulator_disable(ctx->pdata.supplies[i].consumer);
> }
>
> static void anx7625_power_standby(struct anx7625_data *ctx)
> {
> struct device *dev = >client->dev;
> + int ret;
>
> if (!ctx->pdata.low_power_mode) {
> DRM_DEV_DEBUG_DRIVER(dev, "not low power mode!\n");
> @@ -904,6 +923,12 @@ static void anx7625_power_standby(struct anx7625_data
> *ctx)
> usleep_range(1000, 1100);
> gpiod_set_value(ctx->pdata.gpio_p_on, 0);
> usleep_range(1000, 1100);
> +
> + ret = regulator_bulk_disable(ARRAY_SIZE(ctx->pdata.supplies),
> +ctx->pdata.supplies);
> + if (ret < 0)
> + DRM_DEV_DEBUG_DRIVER(dev, "cannot disable supplies %d\n",
> ret);
> +
> DRM_DEV_DEBUG_DRIVER(dev, "power down\n");
> }
>
> @@ -1742,6 +1767,15 @@ static int anx7625_i2c_probe(struct i2c_client *client,
> platform->client = client;
> i2c_set_clientdata(client, platform);
>
> + pdata->supplies[0].supply = "vdd10";
> + pdata->supplies[1].supply = "vdd18";
> + pdata->supplies[2].supply = "vdd33";
> + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(pdata->supplies),
> + pdata->supplies);
> + if (ret) {
> + DRM_DEV_ERROR(dev, "fail to get power supplies: %d\n", ret);
> + return ret;
> + }
> anx7625_init_gpio(platform);
>
> atomic_set(>power_status, 0);
> diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h
> b/drivers/gpu/drm/bridge/analogix/anx7625.h
> index 193ad86c54503..e4a086b3a3d7b 100644
> --- a/drivers/gpu/drm/bridge/analogix/anx7625.h
> +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h
> @@ -350,6 +350,7 @@ struct s_edid_data {
> struct anx7625_platform_data {
> struct gpio_desc *gpio_p_on;
> struct gpio_desc *gpio_reset;
> + struct regulator_bulk_data supplies[3];
> struct drm_bridge *panel_bridge;
> int intp_irq;
> u32 low_power_mode;
> --
> 2.30.1.766.gb4fecdf3b7-goog
>
[PATCH v2 1/2] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-damu
mt8183-kukui-jacuzzi-damu board also known as ASUS Chromebook Flip CM3, using mediatek mt8183 SoC. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 93b3bdf6eaeb..a86716cdd408 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -125,6 +125,10 @@ properties: - google,krane-sku176 - const: google,krane - const: mediatek,mt8183 + - description: Google Damu (ASUS Chromebook Flip CM3) +items: + - const: google,damu + - const: mediatek,mt8183 additionalProperties: true -- 2.31.0.rc2.261.g7f71774620-goog
[PATCH v2 2/2] arm64: dts: mt8183: Add kukui-jacuzzi-damu board
Damu is known as ASUS Chromebook Flip CM3.
Signed-off-by: Hsin-Yi Wang
---
v1->v2: fix pp3300_panel regulator property
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
.../mediatek/mt8183-kukui-jacuzzi-damu.dts| 35 ++
.../dts/mediatek/mt8183-kukui-jacuzzi.dtsi| 482 ++
3 files changed, 518 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index deba27ab7657..554105d2c389 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
new file mode 100644
index ..d697336440d1
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi.dtsi"
+
+/ {
+ model = "Google damu board";
+ compatible = "google,damu", "mediatek,mt8183";
+};
+
+_thermal {
+ sustainable-power = <4500>; /* milliwatts */
+};
+
+ {
+ status = "okay";
+
+ compatible = "hid-over-i2c";
+ reg = <0x10>;
+ interrupt-parent = <>;
+ interrupts = <155 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+
+ post-power-on-delay-ms = <10>;
+ hid-descr-addr = <0x0001>;
+};
+
+_wifi {
+ qcom,ath10k-calibration-variant = "GO_DAMU";
+};
+
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
new file mode 100644
index ..d8826c82bcda
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
@@ -0,0 +1,482 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+#include "mt8183-kukui.dtsi"
+
+/ {
+ panel: panel {
+ compatible = "auo,b116xw03";
+ power-supply = <_panel>;
+ ddc-i2c-bus = <>;
+ backlight = <_lcd0>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <_out>;
+ };
+ };
+ };
+
+ pp1200_mipibrdg: pp1200-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "pp1200_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_mipibrdg_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 54 GPIO_ACTIVE_HIGH>;
+ };
+
+ pp1800_mipibrdg: pp1800-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "pp1800_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_lcd_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 36 GPIO_ACTIVE_HIGH>;
+ };
+
+ pp3300_panel: pp3300-panel {
+ compatible = "regulator-fixed";
+ regulator-name = "pp3300_panel";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_panel_pins>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 35 GPIO_ACTIVE_HIGH>;
+ };
+
+ vddio_mipibrdg: vddio-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "vddio_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_mipibrdg_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 37 GPIO_ACTIVE_HIGH>;
+ };
+
+ volume_buttons: volume-buttons {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 =
[PATCH 2/2] arm64: dts: mt8183: Add kukui-jacuzzi-damu board
Damu is known as ASUS Chromebook Flip CM3.
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
.../mediatek/mt8183-kukui-jacuzzi-damu.dts| 35 ++
.../dts/mediatek/mt8183-kukui-jacuzzi.dtsi| 481 ++
3 files changed, 517 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index deba27ab7657..554105d2c389 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
new file mode 100644
index ..d697336440d1
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi.dtsi"
+
+/ {
+ model = "Google damu board";
+ compatible = "google,damu", "mediatek,mt8183";
+};
+
+_thermal {
+ sustainable-power = <4500>; /* milliwatts */
+};
+
+ {
+ status = "okay";
+
+ compatible = "hid-over-i2c";
+ reg = <0x10>;
+ interrupt-parent = <>;
+ interrupts = <155 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+
+ post-power-on-delay-ms = <10>;
+ hid-descr-addr = <0x0001>;
+};
+
+_wifi {
+ qcom,ath10k-calibration-variant = "GO_DAMU";
+};
+
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
new file mode 100644
index ..673f3b9a49ea
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
@@ -0,0 +1,481 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+#include "mt8183-kukui.dtsi"
+
+/ {
+ panel: panel {
+ compatible = "auo,b116xw03";
+ power-supply = <_panel>;
+ ddc-i2c-bus = <>;
+ backlight = <_lcd0>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <_out>;
+ };
+ };
+ };
+
+ pp1200_mipibrdg: pp1200-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "pp1200_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_mipibrdg_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 54 GPIO_ACTIVE_HIGH>;
+ };
+
+ pp1800_mipibrdg: pp1800-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "pp1800_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_lcd_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 36 GPIO_ACTIVE_HIGH>;
+ };
+
+ pp3300_panel: pp3300-panel {
+ compatible = "regulator-fixed";
+ regulator-name = "pp3300_panel";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_panel_pins>;
+
+ enable-active-high;
+
+ gpio = < 35 GPIO_ACTIVE_HIGH>;
+ };
+
+ vddio_mipibrdg: vddio-mipibrdg {
+ compatible = "regulator-fixed";
+ regulator-name = "vddio_mipibrdg";
+ pinctrl-names = "default";
+ pinctrl-0 = <_mipibrdg_en>;
+
+ enable-active-high;
+ regulator-boot-on;
+
+ gpio = < 37 GPIO_ACTIVE_HIGH>;
+ };
+
+ volume_buttons: volume-buttons {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <_button_pins>;
+
+ volume_down {
+ label = "Volu
[PATCH 1/2] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-damu
mt8183-kukui-jacuzzi-damu board also known as ASUS Chromebook Flip CM3, using mediatek mt8183 SoC. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 93b3bdf6eaeb..a86716cdd408 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -125,6 +125,10 @@ properties: - google,krane-sku176 - const: google,krane - const: mediatek,mt8183 + - description: Google Damu (ASUS Chromebook Flip CM3) +items: + - const: google,damu + - const: mediatek,mt8183 additionalProperties: true -- 2.31.0.rc2.261.g7f71774620-goog
Re: [PATCH v16 2/2] i2c: core: support bus regulator controlling in adapter
On Tue, Mar 9, 2021 at 1:17 AM Mark Brown wrote:
>
> On Mon, Mar 08, 2021 at 12:36:07PM +0800, Hsin-Yi Wang wrote:
>
> > + adap->bus_regulator = devm_regulator_get(>dev, "bus");
> > + if (IS_ERR(adap->bus_regulator)) {
> > + res = PTR_ERR(adap->bus_regulator);
> > + goto out_reg;
> > + }
>
> Idiomatically supplies should be named as they are by the chip datasheet
> rather than just a generic name like this, and I'm guessing that systems
> that have supplies like this will often already have something
> requesting the supply (eg, it's quite common for consumer drivers to do
> this) under that name. I can see this being a useful thing to factor
> out into the core but it seems like it'd be better to have it enabled by
> having the controllers (or devices) pass a supply name (or possibly
> requested regulator) to the core rather than by just hard coding a name
> in the core so bindings look as expected.
>
I'll move the regulator request into device instead of core in the
next version. Thanks.
> I do also wonder if it's better to put the feature on the clients rather
> than the controller, I don't think it makes much difference though.
[PATCH v17 3/3] i2c: mediatek: mt65xx: add optional vbus-supply
Add vbus-supply which provides power to SCL/SDA. Pass this regulator
into core so it can be turned on/off for low power mode support.
Signed-off-by: Hsin-Yi Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 2ffd2f354d0a..82f2b6716005 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -1215,6 +1215,13 @@ static int mtk_i2c_probe(struct platform_device *pdev)
i2c->adap.quirks = i2c->dev_comp->quirks;
i2c->adap.timeout = 2 * HZ;
i2c->adap.retries = 1;
+ i2c->adap.bus_regulator = devm_regulator_get_optional(>dev,
"vbus");
+ if (IS_ERR(i2c->adap.bus_regulator)) {
+ if (PTR_ERR(i2c->adap.bus_regulator) == -ENODEV)
+ i2c->adap.bus_regulator = NULL;
+ else
+ return PTR_ERR(i2c->adap.bus_regulator);
+ }
ret = mtk_i2c_parse_dt(pdev->dev.of_node, i2c);
if (ret)
--
2.30.1.766.gb4fecdf3b7-goog
[PATCH v17 1/3] i2c: core: support bus regulator controlling in adapter
From: Bibby Hsieh
Although in the most platforms, the bus power of i2c
are alway on, some platforms disable the i2c bus power
in order to meet low power request.
We can control bulk regulator if it is provided in i2c
adapter device.
Signed-off-by: Bibby Hsieh
Signed-off-by: Marek Szyprowski
Signed-off-by: Hsin-Yi Wang
---
drivers/i2c/i2c-core-base.c | 88 +
include/linux/i2c.h | 2 +
2 files changed, 90 insertions(+)
diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
index 63ebf722a424..436e498528a8 100644
--- a/drivers/i2c/i2c-core-base.c
+++ b/drivers/i2c/i2c-core-base.c
@@ -439,12 +439,14 @@ static int i2c_smbus_host_notify_to_irq(const struct
i2c_client *client)
static int i2c_device_probe(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
int status;
if (!client)
return 0;
+ adap = client->adapter;
client->irq = client->init_irq;
if (!client->irq) {
@@ -510,6 +512,14 @@ static int i2c_device_probe(struct device *dev)
dev_dbg(dev, "probe\n");
+ if (adap->bus_regulator) {
+ status = regulator_enable(adap->bus_regulator);
+ if (status < 0) {
+ dev_err(>dev, "Failed to enable bus regulator\n");
+ goto err_clear_wakeup_irq;
+ }
+ }
+
status = of_clk_set_defaults(dev->of_node, false);
if (status < 0)
goto err_clear_wakeup_irq;
@@ -550,8 +560,10 @@ static int i2c_device_probe(struct device *dev)
static int i2c_device_remove(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
+ adap = client->adapter;
driver = to_i2c_driver(dev->driver);
if (driver->remove) {
int status;
@@ -564,6 +576,8 @@ static int i2c_device_remove(struct device *dev)
}
dev_pm_domain_detach(>dev, true);
+ if (!pm_runtime_status_suspended(>dev) && adap->bus_regulator)
+ regulator_disable(adap->bus_regulator);
dev_pm_clear_wake_irq(>dev);
device_init_wakeup(>dev, false);
@@ -576,6 +590,79 @@ static int i2c_device_remove(struct device *dev)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int i2c_resume_early(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ if (!pm_runtime_status_suspended(>dev)) {
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+ }
+
+ return pm_generic_resume_early(>dev);
+}
+
+static int i2c_suspend_late(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = pm_generic_suspend_late(>dev);
+ if (err)
+ return err;
+
+ if (!pm_runtime_status_suspended(>dev))
+ return regulator_disable(client->adapter->bus_regulator);
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_PM
+static int i2c_runtime_resume(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+ return pm_generic_runtime_resume(>dev);
+}
+
+static int i2c_runtime_suspend(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = pm_generic_runtime_suspend(>dev);
+ if (err)
+ return err;
+
+ return regulator_disable(client->adapter->bus_regulator);
+}
+#endif
+
+static const struct dev_pm_ops i2c_device_pm = {
+ SET_LATE_SYSTEM_SLEEP_PM_OPS(i2c_suspend_late, i2c_resume_early)
+ SET_RUNTIME_PM_OPS(i2c_runtime_suspend, i2c_runtime_resume, NULL)
+};
+
static void i2c_device_shutdown(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
@@ -633,6 +720,7 @@ struct bus_type i2c_bus_type = {
.probe = i2c_device_probe,
.remove = i2c_device_remove,
.shutdown = i2c_device_shutdown,
+ .pm = _device_pm,
};
EXPORT_SYMBOL_GPL(i2c_bus_type);
diff --git a/include/linux/i2c.h b/include/linux/i
[PATCH v17 2/3] dt-binding: i2c: mt65xx: add vbus-supply property
Add vbus-supply property for mt65xx. The regulator can be passed into core and turned off during suspend/sleep to reduce power consumption. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt index 7f0194fdd0cc..2c45647e9f0b 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt @@ -32,6 +32,7 @@ Optional properties: - mediatek,have-pmic: platform can control i2c form special pmic side. Only mt6589 and mt8135 support this feature. - mediatek,use-push-pull: IO config use push-pull mode. + - vbus-supply: phandle to the regulator that provides power to SCL/SDA. Example: -- 2.30.1.766.gb4fecdf3b7-goog
[PATCH v17 0/3] add power control in i2c
Although in the most platforms, the power of eeprom and i2c are alway on, some platforms disable the eeprom and i2c power in order to meet low power request. This patch add the pm_runtime ops to control power to support all platforms. Changes since v16: - request regulator in device instead of in the core. - control regulator only if it's provided. Changes since v15: - Squash the fix[1] for v15. [1] https://patchwork.ozlabs.org/project/linux-i2c/patch/20200522101327.13456-1-m.szyprow...@samsung.com/ Changes since v14: - change the return value in normal condition - access the variable after NULL pointer checking - add ack tag Changes since v13: - fixup some logic error Changes since v12: - rebase onto v5.7-rc1 - change the property description in binding Changes since v11: - use suspend_late/resume_early instead of suspend/resume - rebase onto v5.6-rc1 Changes since v10: - fixup some worng codes Changes since v9: - fixup build error - remove redundant code Changes since v8: - fixup some wrong code - remove redundant message [... snip ...] Bibby Hsieh (1): i2c: core: support bus regulator controlling in adapter Hsin-Yi Wang (2): dt-binding: i2c: mt65xx: add vbus-supply property i2c: mediatek: mt65xx: add optional vbus-supply .../devicetree/bindings/i2c/i2c-mt65xx.txt| 1 + drivers/i2c/busses/i2c-mt65xx.c | 7 ++ drivers/i2c/i2c-core-base.c | 88 +++ include/linux/i2c.h | 2 + 4 files changed, 98 insertions(+) -- 2.30.1.766.gb4fecdf3b7-goog
Re: [PATCH] i2c: core: support bus regulator controlling in adapter
On Fri, Mar 5, 2021 at 6:20 PM Hsin-Yi Wang wrote:
>
> From: Bibby Hsieh
>
> Although in the most platforms, the bus power of i2c
> are alway on, some platforms disable the i2c bus power
> in order to meet low power request.
>
> We get and enable bulk regulator in i2c adapter device.
>
> Signed-off-by: Bibby Hsieh
> Signed-off-by: Marek Szyprowski
> Signed-off-by: Hsin-Yi Wang
> ---
> This patch is squashed from following patch and tested on mt8183 device
> which has eeprom at24 client under i2c, so the fix in [2] is also
> verified.
> [1]
> https://patchwork.ozlabs.org/project/linux-i2c/cover/20200519072729.7268-1-bibby.hs...@mediatek.com/
> [2]
> https://patchwork.ozlabs.org/project/linux-i2c/patch/20200522101327.13456-1-m.szyprow...@samsung.com/
> ---
Sent again with document rebased in v16 here:
https://patchwork.ozlabs.org/project/linux-i2c/cover/20210308043607.957156-1-hsi...@chromium.org/
> drivers/i2c/i2c-core-base.c | 93 +
> include/linux/i2c.h | 2 +
> 2 files changed, 95 insertions(+)
>
> diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
> index 63ebf722a424..667f4a4de7cc 100644
> --- a/drivers/i2c/i2c-core-base.c
> +++ b/drivers/i2c/i2c-core-base.c
> @@ -439,12 +439,14 @@ static int i2c_smbus_host_notify_to_irq(const struct
> i2c_client *client)
> static int i2c_device_probe(struct device *dev)
> {
> struct i2c_client *client = i2c_verify_client(dev);
> + struct i2c_adapter *adap;
> struct i2c_driver *driver;
> int status;
>
> if (!client)
> return 0;
>
> + adap = client->adapter;
> client->irq = client->init_irq;
>
> if (!client->irq) {
> @@ -510,6 +512,12 @@ static int i2c_device_probe(struct device *dev)
>
> dev_dbg(dev, "probe\n");
>
> + status = regulator_enable(adap->bus_regulator);
> + if (status < 0) {
> + dev_err(>dev, "Failed to enable power regulator\n");
> + goto err_clear_wakeup_irq;
> + }
> +
> status = of_clk_set_defaults(dev->of_node, false);
> if (status < 0)
> goto err_clear_wakeup_irq;
> @@ -550,8 +558,10 @@ static int i2c_device_probe(struct device *dev)
> static int i2c_device_remove(struct device *dev)
> {
> struct i2c_client *client = to_i2c_client(dev);
> + struct i2c_adapter *adap;
> struct i2c_driver *driver;
>
> + adap = client->adapter;
> driver = to_i2c_driver(dev->driver);
> if (driver->remove) {
> int status;
> @@ -564,6 +574,8 @@ static int i2c_device_remove(struct device *dev)
> }
>
> dev_pm_domain_detach(>dev, true);
> + if (!pm_runtime_status_suspended(>dev))
> + regulator_disable(adap->bus_regulator);
>
> dev_pm_clear_wake_irq(>dev);
> device_init_wakeup(>dev, false);
> @@ -576,6 +588,80 @@ static int i2c_device_remove(struct device *dev)
> return 0;
> }
>
> +#ifdef CONFIG_PM_SLEEP
> +static int i2c_resume_early(struct device *dev)
> +{
> + struct i2c_client *client = i2c_verify_client(dev);
> + int err;
> +
> + if (!client)
> + return 0;
> +
> + if (!pm_runtime_status_suspended(>dev)) {
> + err = regulator_enable(client->adapter->bus_regulator);
> + if (err)
> + return err;
> + }
> +
> + return pm_generic_resume_early(>dev);
> +}
> +
> +static int i2c_suspend_late(struct device *dev)
> +{
> + struct i2c_client *client = i2c_verify_client(dev);
> + int err;
> +
> + if (!client)
> + return 0;
> +
> + err = pm_generic_suspend_late(>dev);
> + if (err)
> + return err;
> +
> + if (!pm_runtime_status_suspended(>dev))
> + return regulator_disable(client->adapter->bus_regulator);
> +
> + return 0;
> +}
> +#endif
> +
> +#ifdef CONFIG_PM
> +static int i2c_runtime_resume(struct device *dev)
> +{
> + struct i2c_client *client = i2c_verify_client(dev);
> + int err;
> +
> + if (!client)
> + return 0;
> +
> + err = regulator_enable(client->adapter->bus_regulator);
> + if (err)
> + return err;
> +
> + return pm_generic_runtime_resume(>dev);
> +}
> +
> +static int i2c_runtime_suspend(struct device *dev)
> +{
> + str
[PATCH v16 2/2] i2c: core: support bus regulator controlling in adapter
From: Bibby Hsieh
Although in the most platforms, the bus power of i2c
are alway on, some platforms disable the i2c bus power
in order to meet low power request.
We get and enable bulk regulator in i2c adapter device.
Signed-off-by: Bibby Hsieh
Signed-off-by: Marek Szyprowski
Signed-off-by: Hsin-Yi Wang
---
drivers/i2c/i2c-core-base.c | 93 +
include/linux/i2c.h | 2 +
2 files changed, 95 insertions(+)
diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
index 63ebf722a424..667f4a4de7cc 100644
--- a/drivers/i2c/i2c-core-base.c
+++ b/drivers/i2c/i2c-core-base.c
@@ -439,12 +439,14 @@ static int i2c_smbus_host_notify_to_irq(const struct
i2c_client *client)
static int i2c_device_probe(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
int status;
if (!client)
return 0;
+ adap = client->adapter;
client->irq = client->init_irq;
if (!client->irq) {
@@ -510,6 +512,12 @@ static int i2c_device_probe(struct device *dev)
dev_dbg(dev, "probe\n");
+ status = regulator_enable(adap->bus_regulator);
+ if (status < 0) {
+ dev_err(>dev, "Failed to enable power regulator\n");
+ goto err_clear_wakeup_irq;
+ }
+
status = of_clk_set_defaults(dev->of_node, false);
if (status < 0)
goto err_clear_wakeup_irq;
@@ -550,8 +558,10 @@ static int i2c_device_probe(struct device *dev)
static int i2c_device_remove(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
+ adap = client->adapter;
driver = to_i2c_driver(dev->driver);
if (driver->remove) {
int status;
@@ -564,6 +574,8 @@ static int i2c_device_remove(struct device *dev)
}
dev_pm_domain_detach(>dev, true);
+ if (!pm_runtime_status_suspended(>dev))
+ regulator_disable(adap->bus_regulator);
dev_pm_clear_wake_irq(>dev);
device_init_wakeup(>dev, false);
@@ -576,6 +588,80 @@ static int i2c_device_remove(struct device *dev)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int i2c_resume_early(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client)
+ return 0;
+
+ if (!pm_runtime_status_suspended(>dev)) {
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+ }
+
+ return pm_generic_resume_early(>dev);
+}
+
+static int i2c_suspend_late(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client)
+ return 0;
+
+ err = pm_generic_suspend_late(>dev);
+ if (err)
+ return err;
+
+ if (!pm_runtime_status_suspended(>dev))
+ return regulator_disable(client->adapter->bus_regulator);
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_PM
+static int i2c_runtime_resume(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client)
+ return 0;
+
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+
+ return pm_generic_runtime_resume(>dev);
+}
+
+static int i2c_runtime_suspend(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client)
+ return 0;
+
+ err = pm_generic_runtime_suspend(>dev);
+ if (err)
+ return err;
+
+ return regulator_disable(client->adapter->bus_regulator);
+}
+#endif
+
+static const struct dev_pm_ops i2c_device_pm = {
+ SET_LATE_SYSTEM_SLEEP_PM_OPS(i2c_suspend_late, i2c_resume_early)
+ SET_RUNTIME_PM_OPS(i2c_runtime_suspend, i2c_runtime_resume, NULL)
+};
+
static void i2c_device_shutdown(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
@@ -633,6 +719,7 @@ struct bus_type i2c_bus_type = {
.probe = i2c_device_probe,
.remove = i2c_device_remove,
.shutdown = i2c_device_shutdown,
+ .pm = _device_pm,
};
EXPORT_SYMBOL_GPL(i2c_bus_type);
@@ -1446,6 +1533,12 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
if (res)
goto out_reg;
+ adap->bus_regulator = devm_regulator_get(>dev, "bus");
+ if (IS_ERR(adap->bus_regulator)) {
+ res = PTR_ERR(adap->bus_regulator);
+ goto out_reg;
+
[PATCH v16 1/2] dt-binding: i2c: add bus-supply property
From: Bibby Hsieh In some platforms, they disable the power-supply of i2c due to power consumption reduction. This patch add bus-supply property. Signed-off-by: Bibby Hsieh Acked-by: Rob Herring Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/i2c/i2c.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c.txt b/Documentation/devicetree/bindings/i2c/i2c.txt index df41f72afc87..88972bd62ce1 100644 --- a/Documentation/devicetree/bindings/i2c/i2c.txt +++ b/Documentation/devicetree/bindings/i2c/i2c.txt @@ -130,6 +130,9 @@ wants to support one of the below features, it should adapt these bindings. - wakeup-source device can be used as a wakeup source. +- bus-supply + phandle to the regulator that provides power to SCL/SDA. + Binding may contain optional "interrupts" property, describing interrupts used by the device. I2C core will assign "irq" interrupt (or the very first interrupt if not using interrupt names) as primary interrupt for the slave. -- 2.30.1.766.gb4fecdf3b7-goog
[PATCH v16 0/2] add power control in i2c
Although in the most platforms, the power of eeprom and i2c are alway on, some platforms disable the eeprom and i2c power in order to meet low power request. This patch add the pm_runtime ops to control power to support all platforms. Changes since v15: - Squash the fix[1] for v15. [1] https://patchwork.ozlabs.org/project/linux-i2c/patch/20200522101327.13456-1-m.szyprow...@samsung.com/ Changes since v14: - change the return value in normal condition - access the variable after NULL pointer checking - add ack tag Changes since v13: - fixup some logic error Changes since v12: - rebase onto v5.7-rc1 - change the property description in binding Changes since v11: - use suspend_late/resume_early instead of suspend/resume - rebase onto v5.6-rc1 Changes since v10: - fixup some worng codes Changes since v9: - fixup build error - remove redundant code Changes since v8: - fixup some wrong code - remove redundant message [... snip ...] Bibby Hsieh (2): dt-binding: i2c: add bus-supply property i2c: core: support bus regulator controlling in adapter Documentation/devicetree/bindings/i2c/i2c.txt | 3 + drivers/i2c/i2c-core-base.c | 93 +++ include/linux/i2c.h | 2 + 3 files changed, 98 insertions(+) -- 2.30.1.766.gb4fecdf3b7-goog
[PATCH] i2c: core: support bus regulator controlling in adapter
From: Bibby Hsieh
Although in the most platforms, the bus power of i2c
are alway on, some platforms disable the i2c bus power
in order to meet low power request.
We get and enable bulk regulator in i2c adapter device.
Signed-off-by: Bibby Hsieh
Signed-off-by: Marek Szyprowski
Signed-off-by: Hsin-Yi Wang
---
This patch is squashed from following patch and tested on mt8183 device
which has eeprom at24 client under i2c, so the fix in [2] is also
verified.
[1]
https://patchwork.ozlabs.org/project/linux-i2c/cover/20200519072729.7268-1-bibby.hs...@mediatek.com/
[2]
https://patchwork.ozlabs.org/project/linux-i2c/patch/20200522101327.13456-1-m.szyprow...@samsung.com/
---
drivers/i2c/i2c-core-base.c | 93 +
include/linux/i2c.h | 2 +
2 files changed, 95 insertions(+)
diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
index 63ebf722a424..667f4a4de7cc 100644
--- a/drivers/i2c/i2c-core-base.c
+++ b/drivers/i2c/i2c-core-base.c
@@ -439,12 +439,14 @@ static int i2c_smbus_host_notify_to_irq(const struct
i2c_client *client)
static int i2c_device_probe(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
int status;
if (!client)
return 0;
+ adap = client->adapter;
client->irq = client->init_irq;
if (!client->irq) {
@@ -510,6 +512,12 @@ static int i2c_device_probe(struct device *dev)
dev_dbg(dev, "probe\n");
+ status = regulator_enable(adap->bus_regulator);
+ if (status < 0) {
+ dev_err(>dev, "Failed to enable power regulator\n");
+ goto err_clear_wakeup_irq;
+ }
+
status = of_clk_set_defaults(dev->of_node, false);
if (status < 0)
goto err_clear_wakeup_irq;
@@ -550,8 +558,10 @@ static int i2c_device_probe(struct device *dev)
static int i2c_device_remove(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
+ adap = client->adapter;
driver = to_i2c_driver(dev->driver);
if (driver->remove) {
int status;
@@ -564,6 +574,8 @@ static int i2c_device_remove(struct device *dev)
}
dev_pm_domain_detach(>dev, true);
+ if (!pm_runtime_status_suspended(>dev))
+ regulator_disable(adap->bus_regulator);
dev_pm_clear_wake_irq(>dev);
device_init_wakeup(>dev, false);
@@ -576,6 +588,80 @@ static int i2c_device_remove(struct device *dev)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int i2c_resume_early(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client)
+ return 0;
+
+ if (!pm_runtime_status_suspended(>dev)) {
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+ }
+
+ return pm_generic_resume_early(>dev);
+}
+
+static int i2c_suspend_late(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client)
+ return 0;
+
+ err = pm_generic_suspend_late(>dev);
+ if (err)
+ return err;
+
+ if (!pm_runtime_status_suspended(>dev))
+ return regulator_disable(client->adapter->bus_regulator);
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_PM
+static int i2c_runtime_resume(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client)
+ return 0;
+
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+
+ return pm_generic_runtime_resume(>dev);
+}
+
+static int i2c_runtime_suspend(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client)
+ return 0;
+
+ err = pm_generic_runtime_suspend(>dev);
+ if (err)
+ return err;
+
+ return regulator_disable(client->adapter->bus_regulator);
+}
+#endif
+
+static const struct dev_pm_ops i2c_device_pm = {
+ SET_LATE_SYSTEM_SLEEP_PM_OPS(i2c_suspend_late, i2c_resume_early)
+ SET_RUNTIME_PM_OPS(i2c_runtime_suspend, i2c_runtime_resume, NULL)
+};
+
static void i2c_device_shutdown(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
@@ -633,6 +719,7 @@ struct bus_type i2c_bus_type = {
.probe = i2c_device_probe,
.remove = i2c_device_remove,
.shutdown = i2c_device_shutdown,
+ .pm = _device_pm,
};
EXPORT_SYMBOL_GPL(
Re: [PATCH 3/4] soc: mediatek: pm-domains: Add a power domain names for mt8192
On Fri, Feb 26, 2021 at 1:50 AM Enric Balletbo i Serra
wrote:
>
> Add the power domains names for the mt8192 SoC.
>
> Fixes: a49d5e7a89d6 ("soc: mediatek: pm-domains: Add support for mt8192")
> Signed-off-by: Enric Balletbo i Serra
Reviewed-by: Hsin-Yi Wang
> ---
>
> drivers/soc/mediatek/mt8192-pm-domains.h | 21 +
> 1 file changed, 21 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mt8192-pm-domains.h
> b/drivers/soc/mediatek/mt8192-pm-domains.h
> index 0fdf6dc6231f..543dda70de01 100644
> --- a/drivers/soc/mediatek/mt8192-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8192-pm-domains.h
> @@ -12,6 +12,7 @@
>
> static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> [MT8192_POWER_DOMAIN_AUDIO] = {
> + .name = "audio",
> .sta_mask = BIT(21),
> .ctl_offs = 0x0354,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -24,6 +25,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_CONN] = {
> + .name = "conn",
> .sta_mask = PWR_STATUS_CONN,
> .ctl_offs = 0x0304,
> .sram_pdn_bits = 0,
> @@ -45,12 +47,14 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8192[] = {
> .caps = MTK_SCPD_KEEP_DEFAULT_OFF,
> },
> [MT8192_POWER_DOMAIN_MFG0] = {
> + .name = "mfg0",
> .sta_mask = BIT(2),
> .ctl_offs = 0x0308,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_MFG1] = {
> + .name = "mfg1",
> .sta_mask = BIT(3),
> .ctl_offs = 0x030c,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -75,36 +79,42 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_MFG2] = {
> + .name = "mfg2",
> .sta_mask = BIT(4),
> .ctl_offs = 0x0310,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_MFG3] = {
> + .name = "mfg3",
> .sta_mask = BIT(5),
> .ctl_offs = 0x0314,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_MFG4] = {
> + .name = "mfg4",
> .sta_mask = BIT(6),
> .ctl_offs = 0x0318,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_MFG5] = {
> + .name = "mfg5",
> .sta_mask = BIT(7),
> .ctl_offs = 0x031c,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_MFG6] = {
> + .name = "mfg6",
> .sta_mask = BIT(8),
> .ctl_offs = 0x0320,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_DISP] = {
> + .name = "disp",
> .sta_mask = BIT(20),
> .ctl_offs = 0x0350,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -133,6 +143,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_IPE] = {
> + .name = "ipe",
> .sta_mask = BIT(14),
> .ctl_offs = 0x0338,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -149,6 +160,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_ISP] = {
> + .name = "isp",
> .sta_mask = BIT(12),
> .ctl_offs = 0x0330,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -165,6 +177,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_ISP2] = {
> + .name = "isp2",
> .sta_mask = BIT(13),
>
Re: [PATCH 4/4] soc: mediatek: pm-domains: Add a power domain names for mt8167
On Fri, Feb 26, 2021 at 1:50 AM Enric Balletbo i Serra
wrote:
>
> Add the power domains names for the mt8167 SoC.
>
> Fixes: 207f13b419a6 ("soc: mediatek: pm-domains: Add support for mt8167")
> Signed-off-by: Enric Balletbo i Serra
Reviewed-by: Hsin-Yi Wang
> ---
>
> drivers/soc/mediatek/mt8167-pm-domains.h | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mt8167-pm-domains.h
> b/drivers/soc/mediatek/mt8167-pm-domains.h
> index ad0b8dfa0527..15559ddf26e4 100644
> --- a/drivers/soc/mediatek/mt8167-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8167-pm-domains.h
> @@ -15,6 +15,7 @@
>
> static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
> [MT8167_POWER_DOMAIN_MM] = {
> + .name = "mm",
> .sta_mask = PWR_STATUS_DISP,
> .ctl_offs = SPM_DIS_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -26,6 +27,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8167[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8167_POWER_DOMAIN_VDEC] = {
> + .name = "vdec",
> .sta_mask = PWR_STATUS_VDEC,
> .ctl_offs = SPM_VDE_PWR_CON,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -33,6 +35,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8167[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8167_POWER_DOMAIN_ISP] = {
> + .name = "isp",
> .sta_mask = PWR_STATUS_ISP,
> .ctl_offs = SPM_ISP_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -40,6 +43,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8167[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8167_POWER_DOMAIN_MFG_ASYNC] = {
> + .name = "mfg_async",
> .sta_mask = MT8167_PWR_STATUS_MFG_ASYNC,
> .ctl_offs = SPM_MFG_ASYNC_PWR_CON,
> .sram_pdn_bits = 0,
> @@ -50,18 +54,21 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8167[] = {
> },
> },
> [MT8167_POWER_DOMAIN_MFG_2D] = {
> + .name = "mfg_2d",
> .sta_mask = MT8167_PWR_STATUS_MFG_2D,
> .ctl_offs = SPM_MFG_2D_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8167_POWER_DOMAIN_MFG] = {
> + .name = "mfg",
> .sta_mask = PWR_STATUS_MFG,
> .ctl_offs = SPM_MFG_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8167_POWER_DOMAIN_CONN] = {
> + .name = "conn",
> .sta_mask = PWR_STATUS_CONN,
> .ctl_offs = SPM_CONN_PWR_CON,
> .sram_pdn_bits = GENMASK(8, 8),
> --
> 2.30.0
>
Re: [PATCH 2/4] soc: mediatek: pm-domains: Add a power domain names for mt8183
On Fri, Feb 26, 2021 at 1:50 AM Enric Balletbo i Serra
wrote:
>
> Add the power domains names for the mt8183 SoC. This removes the debugfs
> errors like the following:
>
> debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
>
> Fixes: eb9fa767fbe1 ("soc: mediatek: pm-domains: Add support for mt8183")
> Signed-off-by: Enric Balletbo i Serra
Reviewed-by: Hsin-Yi Wang
> ---
>
> drivers/soc/mediatek/mt8183-pm-domains.h | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mt8183-pm-domains.h
> b/drivers/soc/mediatek/mt8183-pm-domains.h
> index aa5230e6c12f..98a9940d05fb 100644
> --- a/drivers/soc/mediatek/mt8183-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8183-pm-domains.h
> @@ -12,12 +12,14 @@
>
> static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> [MT8183_POWER_DOMAIN_AUDIO] = {
> + .name = "audio",
> .sta_mask = PWR_STATUS_AUDIO,
> .ctl_offs = 0x0314,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8183_POWER_DOMAIN_CONN] = {
> + .name = "conn",
> .sta_mask = PWR_STATUS_CONN,
> .ctl_offs = 0x032c,
> .sram_pdn_bits = 0,
> @@ -28,12 +30,14 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_MFG_ASYNC] = {
> + .name = "mfg_async",
> .sta_mask = PWR_STATUS_MFG_ASYNC,
> .ctl_offs = 0x0334,
> .sram_pdn_bits = 0,
> .sram_pdn_ack_bits = 0,
> },
> [MT8183_POWER_DOMAIN_MFG] = {
> + .name = "mfg",
> .sta_mask = PWR_STATUS_MFG,
> .ctl_offs = 0x0338,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -41,18 +45,21 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8183[] = {
> .caps = MTK_SCPD_DOMAIN_SUPPLY,
> },
> [MT8183_POWER_DOMAIN_MFG_CORE0] = {
> + .name = "mfg_core0",
> .sta_mask = BIT(7),
> .ctl_offs = 0x034c,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8183_POWER_DOMAIN_MFG_CORE1] = {
> + .name = "mfg_core1",
> .sta_mask = BIT(20),
> .ctl_offs = 0x0310,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8183_POWER_DOMAIN_MFG_2D] = {
> + .name = "mfg_2d",
> .sta_mask = PWR_STATUS_MFG_2D,
> .ctl_offs = 0x0348,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -65,6 +72,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_DISP] = {
> + .name = "disp",
> .sta_mask = PWR_STATUS_DISP,
> .ctl_offs = 0x030c,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -83,6 +91,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_CAM] = {
> + .name = "cam",
> .sta_mask = BIT(25),
> .ctl_offs = 0x0344,
> .sram_pdn_bits = GENMASK(9, 8),
> @@ -105,6 +114,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_ISP] = {
> + .name = "isp",
> .sta_mask = PWR_STATUS_ISP,
> .ctl_offs = 0x0308,
> .sram_pdn_bits = GENMASK(9, 8),
> @@ -127,6 +137,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_VDEC] = {
> + .name = "vdec",
> .sta_mask = BIT(31),
> .ctl_offs = 0x0300,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -139,6 +150,7 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_VENC] = {
> + .name = "venc",
> .sta_mask = PWR_STATUS_VENC,
> .ctl_offs = 0x0304,
Re: [PATCH 1/4] soc: mediatek: pm-domains: Add a meaningful power domain name
On Fri, Feb 26, 2021 at 1:50 AM Enric Balletbo i Serra
wrote:
>
> Add the power domains names to the power domain struct so we
> have meaningful name for every power domain. This also removes the
> following debugfs error message.
>
> [2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd'
> already present!
> [2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd'
> already present!
> [2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd'
> already present!
> ...
>
> Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
> Signed-off-by: Enric Balletbo i Serra
Reviewed-by: Hsin-Yi Wang
> ---
>
> drivers/soc/mediatek/mt8173-pm-domains.h | 10 ++
> drivers/soc/mediatek/mtk-pm-domains.c| 6 +-
> drivers/soc/mediatek/mtk-pm-domains.h| 2 ++
> 3 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mt8173-pm-domains.h
> b/drivers/soc/mediatek/mt8173-pm-domains.h
> index 3e8ee5dabb43..654c717e5467 100644
> --- a/drivers/soc/mediatek/mt8173-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8173-pm-domains.h
> @@ -12,24 +12,28 @@
>
> static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
> [MT8173_POWER_DOMAIN_VDEC] = {
> + .name = "vdec",
> .sta_mask = PWR_STATUS_VDEC,
> .ctl_offs = SPM_VDE_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8173_POWER_DOMAIN_VENC] = {
> + .name = "venc",
> .sta_mask = PWR_STATUS_VENC,
> .ctl_offs = SPM_VEN_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8173_POWER_DOMAIN_ISP] = {
> + .name = "isp",
> .sta_mask = PWR_STATUS_ISP,
> .ctl_offs = SPM_ISP_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(13, 12),
> },
> [MT8173_POWER_DOMAIN_MM] = {
> + .name = "mm",
> .sta_mask = PWR_STATUS_DISP,
> .ctl_offs = SPM_DIS_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -40,18 +44,21 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8173[] = {
> },
> },
> [MT8173_POWER_DOMAIN_VENC_LT] = {
> + .name = "venc_lt",
> .sta_mask = PWR_STATUS_VENC_LT,
> .ctl_offs = SPM_VEN2_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8173_POWER_DOMAIN_AUDIO] = {
> + .name = "audio",
> .sta_mask = PWR_STATUS_AUDIO,
> .ctl_offs = SPM_AUDIO_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8173_POWER_DOMAIN_USB] = {
> + .name = "usb",
> .sta_mask = PWR_STATUS_USB,
> .ctl_offs = SPM_USB_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -59,18 +66,21 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8173[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8173_POWER_DOMAIN_MFG_ASYNC] = {
> + .name = "mfg_async",
> .sta_mask = PWR_STATUS_MFG_ASYNC,
> .ctl_offs = SPM_MFG_ASYNC_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = 0,
> },
> [MT8173_POWER_DOMAIN_MFG_2D] = {
> + .name = "mfg_2d",
> .sta_mask = PWR_STATUS_MFG_2D,
> .ctl_offs = SPM_MFG_2D_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(13, 12),
> },
> [MT8173_POWER_DOMAIN_MFG] = {
> + .name = "mfg",
> .sta_mask = PWR_STATUS_MFG,
> .ctl_offs = SPM_MFG_PWR_CON,
> .sram_pdn_bits = GENMASK(13, 8),
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c
> b/drivers/soc/mediatek/mtk-pm-domains.c
> index b7f697666bdd..694d6ea6de1d 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -438,7 +438,11 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys
> *scpsys, st
Re: [PATCH v4 3/3] drm/bridge: anx7625: add MIPI DPI input feature support
On Wed, Feb 24, 2021 at 5:55 PM Hsin-Yi Wang wrote:
>
> On Thu, Jan 28, 2021 at 11:10 AM Xin Ji wrote:
> >
> > Add MIPI rx DPI input support
> >
> > Reported-by: kernel test robot
> > Signed-off-by: Xin Ji
> > ---
> > drivers/gpu/drm/bridge/analogix/anx7625.c | 326
> > --
> > drivers/gpu/drm/bridge/analogix/anx7625.h | 20 +-
> > 2 files changed, 285 insertions(+), 61 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > index 04536cc..628ae43 100644
> > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > @@ -150,18 +150,18 @@ static int anx7625_write_and(struct anx7625_data *ctx,
> > return anx7625_reg_write(ctx, client, offset, (val & (mask)));
> > }
> >
> > -static int anx7625_write_and_or(struct anx7625_data *ctx,
> > - struct i2c_client *client,
> > - u8 offset, u8 and_mask, u8 or_mask)
> > +static int anx7625_config_bit_matrix(struct anx7625_data *ctx)
> > {
> > - int val;
> > + int i, ret;
> >
> > - val = anx7625_reg_read(ctx, client, offset);
> > - if (val < 0)
> > - return val;
> > + ret = anx7625_write_or(ctx, ctx->i2c.tx_p2_client,
> > + AUDIO_CONTROL_REGISTER, 0x80);
> > + for (i = 0; i < 13; i++)
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> > +VIDEO_BIT_MATRIX_12 + i,
> > +0x18 + i);
> >
> > - return anx7625_reg_write(ctx, client,
> > -offset, (val & and_mask) | (or_mask));
> > + return ret;
> > }
> >
> > static int anx7625_read_ctrl_status_p0(struct anx7625_data *ctx)
> > @@ -195,6 +195,60 @@ static int wait_aux_op_finish(struct anx7625_data *ctx)
> > return 0;
> > }
> >
> > +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
> > +u8 addrh, u8 addrm, u8 addrl,
> > +u8 len, u8 *buf)
> > +{
> > + struct device *dev = >client->dev;
> > + int ret;
> > + u8 cmd;
> > +
> > + if (len > MAX_DPCD_BUFFER_SIZE) {
> > + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n");
> > + return -EINVAL;
> > + }
> > +
> > + cmd = ((len - 1) << 4) | 0x09;
> > +
> > + /* Set command and length */
> > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > + AP_AUX_COMMAND, cmd);
> > +
> > + /* Set aux access address */
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_7_0, addrl);
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_15_8, addrm);
> > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_19_16, addrh);
> > +
> > + /* Enable aux access */
> > + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
> > + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
> > +
> > + if (ret < 0) {
> > + DRM_DEV_ERROR(dev, "cannot access aux related register.\n");
> > + return -EIO;
> > + }
> > +
> > + usleep_range(2000, 2100);
> > +
> > + ret = wait_aux_op_finish(ctx);
> > + if (ret) {
> > + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n");
> > + return ret;
> > + }
> > +
> > + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_BUFF_START, len, buf);
> > + if (ret < 0) {
> > + DRM_DEV_ERROR(dev, "read dpcd register failed\n");
> > + return -EIO;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > static int anx7625_video_mute_control(struct anx7625_data *ctx,
> > u8 status)
> > {
> > @@ -219,38 +273,6 @@ static int anx7625_video_mute_control(struct
> > anx7625
Re: [PATCH v4 3/3] drm/bridge: anx7625: add MIPI DPI input feature support
On Thu, Jan 28, 2021 at 11:10 AM Xin Ji wrote:
>
> Add MIPI rx DPI input support
>
> Reported-by: kernel test robot
> Signed-off-by: Xin Ji
> ---
> drivers/gpu/drm/bridge/analogix/anx7625.c | 326
> --
> drivers/gpu/drm/bridge/analogix/anx7625.h | 20 +-
> 2 files changed, 285 insertions(+), 61 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> b/drivers/gpu/drm/bridge/analogix/anx7625.c
> index 04536cc..628ae43 100644
> --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> @@ -150,18 +150,18 @@ static int anx7625_write_and(struct anx7625_data *ctx,
> return anx7625_reg_write(ctx, client, offset, (val & (mask)));
> }
>
> -static int anx7625_write_and_or(struct anx7625_data *ctx,
> - struct i2c_client *client,
> - u8 offset, u8 and_mask, u8 or_mask)
> +static int anx7625_config_bit_matrix(struct anx7625_data *ctx)
> {
> - int val;
> + int i, ret;
>
> - val = anx7625_reg_read(ctx, client, offset);
> - if (val < 0)
> - return val;
> + ret = anx7625_write_or(ctx, ctx->i2c.tx_p2_client,
> + AUDIO_CONTROL_REGISTER, 0x80);
> + for (i = 0; i < 13; i++)
> + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> +VIDEO_BIT_MATRIX_12 + i,
> +0x18 + i);
>
> - return anx7625_reg_write(ctx, client,
> -offset, (val & and_mask) | (or_mask));
> + return ret;
> }
>
> static int anx7625_read_ctrl_status_p0(struct anx7625_data *ctx)
> @@ -195,6 +195,60 @@ static int wait_aux_op_finish(struct anx7625_data *ctx)
> return 0;
> }
>
> +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
> +u8 addrh, u8 addrm, u8 addrl,
> +u8 len, u8 *buf)
> +{
> + struct device *dev = >client->dev;
> + int ret;
> + u8 cmd;
> +
> + if (len > MAX_DPCD_BUFFER_SIZE) {
> + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n");
> + return -EINVAL;
> + }
> +
> + cmd = ((len - 1) << 4) | 0x09;
> +
> + /* Set command and length */
> + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> + AP_AUX_COMMAND, cmd);
> +
> + /* Set aux access address */
> + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_ADDR_7_0, addrl);
> + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_ADDR_15_8, addrm);
> + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_ADDR_19_16, addrh);
> +
> + /* Enable aux access */
> + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
> + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
> +
> + if (ret < 0) {
> + DRM_DEV_ERROR(dev, "cannot access aux related register.\n");
> + return -EIO;
> + }
> +
> + usleep_range(2000, 2100);
> +
> + ret = wait_aux_op_finish(ctx);
> + if (ret) {
> + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n");
> + return ret;
> + }
> +
> + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_BUFF_START, len, buf);
> + if (ret < 0) {
> + DRM_DEV_ERROR(dev, "read dpcd register failed\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> static int anx7625_video_mute_control(struct anx7625_data *ctx,
> u8 status)
> {
> @@ -219,38 +273,6 @@ static int anx7625_video_mute_control(struct
> anx7625_data *ctx,
> return ret;
> }
>
> -static int anx7625_config_audio_input(struct anx7625_data *ctx)
> -{
> - struct device *dev = >client->dev;
> - int ret;
> -
> - /* Channel num */
> - ret = anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_6, I2S_CH_2 << 5);
> -
> - /* FS */
> - ret |= anx7625_write_and_or(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_4,
> - 0xf0, AUDIO_FS_48K);
> - /* Word length */
> - ret |= anx7625_write_and_or(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_5,
> - 0xf0, AUDIO_W_LEN_24_24MAX);
> - /* I2S */
> - ret |= anx7625_write_or(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_6, I2S_SLAVE_MODE);
> - ret |= anx7625_write_and(ctx, ctx->i2c.tx_p2_client,
> -AUDIO_CONTROL_REGISTER,
[PATCH v4 2/2] drm/bridge: anx7625: disable regulators when power off
When suspending the driver, anx7625_power_standby() will be called to
turn off reset-gpios and enable-gpios. However, power supplies are not
disabled. To save power, the driver can get the power supply regulators
and turn off them in anx7625_power_standby().
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Robert Foss
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 34 +++
drivers/gpu/drm/bridge/analogix/anx7625.h | 1 +
2 files changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
b/drivers/gpu/drm/bridge/analogix/anx7625.c
index 65cc05982f826..23283ba0c4f93 100644
--- a/drivers/gpu/drm/bridge/analogix/anx7625.c
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -875,12 +876,25 @@ static int sp_tx_edid_read(struct anx7625_data *ctx,
static void anx7625_power_on(struct anx7625_data *ctx)
{
struct device *dev = >client->dev;
+ int ret, i;
if (!ctx->pdata.low_power_mode) {
DRM_DEV_DEBUG_DRIVER(dev, "not low power mode!\n");
return;
}
+ for (i = 0; i < ARRAY_SIZE(ctx->pdata.supplies); i++) {
+ ret = regulator_enable(ctx->pdata.supplies[i].consumer);
+ if (ret < 0) {
+ DRM_DEV_DEBUG_DRIVER(dev, "cannot enable supply %d:
%d\n",
+i, ret);
+ goto reg_err;
+ }
+ usleep_range(2000, 2100);
+ }
+
+ usleep_range(4000, 4100);
+
/* Power on pin enable */
gpiod_set_value(ctx->pdata.gpio_p_on, 1);
usleep_range(1, 11000);
@@ -889,11 +903,16 @@ static void anx7625_power_on(struct anx7625_data *ctx)
usleep_range(1, 11000);
DRM_DEV_DEBUG_DRIVER(dev, "power on !\n");
+ return;
+reg_err:
+ for (--i; i >= 0; i--)
+ regulator_disable(ctx->pdata.supplies[i].consumer);
}
static void anx7625_power_standby(struct anx7625_data *ctx)
{
struct device *dev = >client->dev;
+ int ret;
if (!ctx->pdata.low_power_mode) {
DRM_DEV_DEBUG_DRIVER(dev, "not low power mode!\n");
@@ -904,6 +923,12 @@ static void anx7625_power_standby(struct anx7625_data *ctx)
usleep_range(1000, 1100);
gpiod_set_value(ctx->pdata.gpio_p_on, 0);
usleep_range(1000, 1100);
+
+ ret = regulator_bulk_disable(ARRAY_SIZE(ctx->pdata.supplies),
+ctx->pdata.supplies);
+ if (ret < 0)
+ DRM_DEV_DEBUG_DRIVER(dev, "cannot disable supplies %d\n", ret);
+
DRM_DEV_DEBUG_DRIVER(dev, "power down\n");
}
@@ -1742,6 +1767,15 @@ static int anx7625_i2c_probe(struct i2c_client *client,
platform->client = client;
i2c_set_clientdata(client, platform);
+ pdata->supplies[0].supply = "vdd10";
+ pdata->supplies[1].supply = "vdd18";
+ pdata->supplies[2].supply = "vdd33";
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(pdata->supplies),
+ pdata->supplies);
+ if (ret) {
+ DRM_DEV_ERROR(dev, "fail to get power supplies: %d\n", ret);
+ return ret;
+ }
anx7625_init_gpio(platform);
atomic_set(>power_status, 0);
diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h
b/drivers/gpu/drm/bridge/analogix/anx7625.h
index 193ad86c54503..e4a086b3a3d7b 100644
--- a/drivers/gpu/drm/bridge/analogix/anx7625.h
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.h
@@ -350,6 +350,7 @@ struct s_edid_data {
struct anx7625_platform_data {
struct gpio_desc *gpio_p_on;
struct gpio_desc *gpio_reset;
+ struct regulator_bulk_data supplies[3];
struct drm_bridge *panel_bridge;
int intp_irq;
u32 low_power_mode;
--
2.30.1.766.gb4fecdf3b7-goog
[PATCH v4 1/2] dt-bindings: drm/bridge: anx7625: Add power supplies
anx7625 requires 3 power supply regulators.
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Rob Herring
Reviewed-by: Robert Foss
---
v3->v4: rebase to drm-misc/for-linux-next
---
.../bindings/display/bridge/analogix,anx7625.yaml | 15 +++
1 file changed, 15 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
index c789784efe306..ab48ab2f4240d 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
@@ -34,6 +34,15 @@ properties:
description: used for reset chip control, RESET_N pin B7.
maxItems: 1
+ vdd10-supply:
+description: Regulator that provides the supply 1.0V power.
+
+ vdd18-supply:
+description: Regulator that provides the supply 1.8V power.
+
+ vdd33-supply:
+description: Regulator that provides the supply 3.3V power.
+
ports:
$ref: /schemas/graph.yaml#/properties/ports
@@ -55,6 +64,9 @@ properties:
required:
- compatible
- reg
+ - vdd10-supply
+ - vdd18-supply
+ - vdd33-supply
- ports
additionalProperties: false
@@ -72,6 +84,9 @@ examples:
reg = <0x58>;
enable-gpios = < 45 GPIO_ACTIVE_HIGH>;
reset-gpios = < 73 GPIO_ACTIVE_HIGH>;
+vdd10-supply = <_mipibrdg>;
+vdd18-supply = <_mipibrdg>;
+vdd33-supply = <_mipibrdg>;
ports {
#address-cells = <1>;
--
2.30.1.766.gb4fecdf3b7-goog
[RESEND v3 2/2] drm/bridge: anx7625: disable regulators when power off
When suspending the driver, anx7625_power_standby() will be called to
turn off reset-gpios and enable-gpios. However, power supplies are not
disabled. To save power, the driver can get the power supply regulators
and turn off them in anx7625_power_standby().
Signed-off-by: Hsin-Yi Wang
---
Change:
v3: add delays between regulators power on
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 34 +++
drivers/gpu/drm/bridge/analogix/anx7625.h | 1 +
2 files changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
b/drivers/gpu/drm/bridge/analogix/anx7625.c
index 65cc05982f826..23283ba0c4f93 100644
--- a/drivers/gpu/drm/bridge/analogix/anx7625.c
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -875,12 +876,25 @@ static int sp_tx_edid_read(struct anx7625_data *ctx,
static void anx7625_power_on(struct anx7625_data *ctx)
{
struct device *dev = >client->dev;
+ int ret, i;
if (!ctx->pdata.low_power_mode) {
DRM_DEV_DEBUG_DRIVER(dev, "not low power mode!\n");
return;
}
+ for (i = 0; i < ARRAY_SIZE(ctx->pdata.supplies); i++) {
+ ret = regulator_enable(ctx->pdata.supplies[i].consumer);
+ if (ret < 0) {
+ DRM_DEV_DEBUG_DRIVER(dev, "cannot enable supply %d:
%d\n",
+i, ret);
+ goto reg_err;
+ }
+ usleep_range(2000, 2100);
+ }
+
+ usleep_range(4000, 4100);
+
/* Power on pin enable */
gpiod_set_value(ctx->pdata.gpio_p_on, 1);
usleep_range(1, 11000);
@@ -889,11 +903,16 @@ static void anx7625_power_on(struct anx7625_data *ctx)
usleep_range(1, 11000);
DRM_DEV_DEBUG_DRIVER(dev, "power on !\n");
+ return;
+reg_err:
+ for (--i; i >= 0; i--)
+ regulator_disable(ctx->pdata.supplies[i].consumer);
}
static void anx7625_power_standby(struct anx7625_data *ctx)
{
struct device *dev = >client->dev;
+ int ret;
if (!ctx->pdata.low_power_mode) {
DRM_DEV_DEBUG_DRIVER(dev, "not low power mode!\n");
@@ -904,6 +923,12 @@ static void anx7625_power_standby(struct anx7625_data *ctx)
usleep_range(1000, 1100);
gpiod_set_value(ctx->pdata.gpio_p_on, 0);
usleep_range(1000, 1100);
+
+ ret = regulator_bulk_disable(ARRAY_SIZE(ctx->pdata.supplies),
+ctx->pdata.supplies);
+ if (ret < 0)
+ DRM_DEV_DEBUG_DRIVER(dev, "cannot disable supplies %d\n", ret);
+
DRM_DEV_DEBUG_DRIVER(dev, "power down\n");
}
@@ -1742,6 +1767,15 @@ static int anx7625_i2c_probe(struct i2c_client *client,
platform->client = client;
i2c_set_clientdata(client, platform);
+ pdata->supplies[0].supply = "vdd10";
+ pdata->supplies[1].supply = "vdd18";
+ pdata->supplies[2].supply = "vdd33";
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(pdata->supplies),
+ pdata->supplies);
+ if (ret) {
+ DRM_DEV_ERROR(dev, "fail to get power supplies: %d\n", ret);
+ return ret;
+ }
anx7625_init_gpio(platform);
atomic_set(>power_status, 0);
diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h
b/drivers/gpu/drm/bridge/analogix/anx7625.h
index 193ad86c54503..e4a086b3a3d7b 100644
--- a/drivers/gpu/drm/bridge/analogix/anx7625.h
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.h
@@ -350,6 +350,7 @@ struct s_edid_data {
struct anx7625_platform_data {
struct gpio_desc *gpio_p_on;
struct gpio_desc *gpio_reset;
+ struct regulator_bulk_data supplies[3];
struct drm_bridge *panel_bridge;
int intp_irq;
u32 low_power_mode;
--
2.30.0.617.g56c4b15f3c-goog
[RESEND v3 1/2] dt-bindings: drm/bridge: anx7625: Add power supplies
anx7625 requires 3 power supply regulators.
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Rob Herring
---
.../bindings/display/bridge/analogix,anx7625.yaml | 15 +++
1 file changed, 15 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
index 60585a4fc22bc..3ae97d9523e56 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
@@ -34,6 +34,15 @@ properties:
description: used for reset chip control, RESET_N pin B7.
maxItems: 1
+ vdd10-supply:
+description: Regulator that provides the supply 1.0V power.
+
+ vdd18-supply:
+description: Regulator that provides the supply 1.8V power.
+
+ vdd33-supply:
+description: Regulator that provides the supply 3.3V power.
+
ports:
type: object
@@ -55,6 +64,9 @@ properties:
required:
- compatible
- reg
+ - vdd10-supply
+ - vdd18-supply
+ - vdd33-supply
- ports
additionalProperties: false
@@ -72,6 +84,9 @@ examples:
reg = <0x58>;
enable-gpios = < 45 GPIO_ACTIVE_HIGH>;
reset-gpios = < 73 GPIO_ACTIVE_HIGH>;
+vdd10-supply = <_mipibrdg>;
+vdd18-supply = <_mipibrdg>;
+vdd33-supply = <_mipibrdg>;
ports {
#address-cells = <1>;
--
2.30.0.617.g56c4b15f3c-goog
[PATCH v3 3/3] mailbox: cmdq: add mt8192 support
From: Yongqiang Niu
add mt8192 support
Signed-off-by: Yongqiang Niu
Signed-off-by: Hsin-Yi Wang
---
drivers/mailbox/mtk-cmdq-mailbox.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
b/drivers/mailbox/mtk-cmdq-mailbox.c
index 5665b6ea8119f..de4793ef6798a 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -36,6 +36,8 @@
#define CMDQ_THR_WAIT_TOKEN0x30
#define CMDQ_THR_PRIORITY 0x40
+#define GCE_GCTL_VALUE 0x48
+
#define CMDQ_THR_ACTIVE_SLOT_CYCLES0x3200
#define CMDQ_THR_ENABLED 0x1
#define CMDQ_THR_DISABLED 0x0
@@ -76,11 +78,13 @@ struct cmdq {
struct clk *clock;
boolsuspended;
u8 shift_pa;
+ boolcontrol_by_sw;
};
struct gce_plat {
u32 thread_nr;
u8 shift;
+ bool control_by_sw;
};
u8 cmdq_get_shift_pa(struct mbox_chan *chan)
@@ -121,6 +125,8 @@ static void cmdq_init(struct cmdq *cmdq)
int i;
WARN_ON(clk_enable(cmdq->clock) < 0);
+ if (cmdq->control_by_sw)
+ writel(0x7, cmdq->base + GCE_GCTL_VALUE);
writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES);
for (i = 0; i <= CMDQ_MAX_EVENT; i++)
writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE);
@@ -536,6 +542,7 @@ static int cmdq_probe(struct platform_device *pdev)
cmdq->thread_nr = plat_data->thread_nr;
cmdq->shift_pa = plat_data->shift;
+ cmdq->control_by_sw = plat_data->control_by_sw;
cmdq->irq_mask = GENMASK(cmdq->thread_nr - 1, 0);
err = devm_request_irq(dev, cmdq->irq, cmdq_irq_handler, IRQF_SHARED,
"mtk_cmdq", cmdq);
@@ -601,11 +608,14 @@ static const struct dev_pm_ops cmdq_pm_ops = {
static const struct gce_plat gce_plat_v2 = {.thread_nr = 16};
static const struct gce_plat gce_plat_v3 = {.thread_nr = 24};
static const struct gce_plat gce_plat_v4 = {.thread_nr = 24, .shift = 3};
+static const struct gce_plat gce_plat_v5 = {.thread_nr = 24, .shift = 3,
+ .control_by_sw = true};
static const struct of_device_id cmdq_of_ids[] = {
{.compatible = "mediatek,mt8173-gce", .data = (void *)_plat_v2},
{.compatible = "mediatek,mt8183-gce", .data = (void *)_plat_v3},
{.compatible = "mediatek,mt6779-gce", .data = (void *)_plat_v4},
+ {.compatible = "mediatek,mt8192-gce", .data = (void *)_plat_v5},
{}
};
--
2.30.0.365.g02bc693789-goog
[PATCH v3 2/3] arm64: dts: mt8192: add gce node
From: Yongqiang Niu
add gce node for mt8192
Signed-off-by: Yongqiang Niu
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 9757138a8bbd8..1afa6ad06b2b8 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -5,6 +5,7 @@
*/
/dts-v1/;
+#include
#include
#include
#include
@@ -291,6 +292,15 @@ systimer: timer@10017000 {
clock-names = "clk13m";
};
+ gce: mailbox@10228000 {
+ compatible = "mediatek,mt8192-gce";
+ reg = <0 0x10228000 0 0x4000>;
+ interrupts = ;
+ #mbox-cells = <3>;
+ clocks = < CLK_INFRA_GCE>;
+ clock-names = "gce";
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt8192-uart",
"mediatek,mt6577-uart";
--
2.30.0.365.g02bc693789-goog
[PATCH v3 1/3] dt-binding: gce: add gce header file for mt8192
From: Yongqiang Niu Add documentation for the mt8192 gce. Add gce header file defined the gce hardware event, subsys number and constant for mt8192. Signed-off-by: Yongqiang Niu Reviewed-by: Rob Herring Signed-off-by: Hsin-Yi Wang --- .../devicetree/bindings/mailbox/mtk-gce.txt | 7 +- include/dt-bindings/gce/mt8192-gce.h | 419 ++ 2 files changed, 423 insertions(+), 3 deletions(-) create mode 100644 include/dt-bindings/gce/mt8192-gce.h diff --git a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt index 7771ecaac5868..ac4245050d17d 100644 --- a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt +++ b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt @@ -9,8 +9,8 @@ CMDQ driver uses mailbox framework for communication. Please refer to mailbox.txt for generic information about mailbox device-tree bindings. Required properties: -- compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce" or - "mediatek,mt6779-gce". +- compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce", + "mediatek,mt8192-gce" or "mediatek,mt6779-gce". - reg: Address range of the GCE unit - interrupts: The interrupt signal from the GCE block - clock: Clocks according to the common clock binding @@ -36,7 +36,8 @@ Optional properties for a client device: size: the total size of register address that GCE can access. Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h', -'dt-binding/gce/mt8183-gce.h' or 'dt-bindings/gce/mt6779-gce.h'. Such as +'dt-binding/gce/mt8183-gce.h', 'dt-binding/gce/mt8192-gce.h' or +'dt-bindings/gce/mt6779-gce.h'. Such as sub-system ids, thread priority, event ids. Example: diff --git a/include/dt-bindings/gce/mt8192-gce.h b/include/dt-bindings/gce/mt8192-gce.h new file mode 100644 index 0..062754416bfda --- /dev/null +++ b/include/dt-bindings/gce/mt8192-gce.h @@ -0,0 +1,419 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2020 MediaTek Inc. + * Author: Yongqiang Niu + */ + +#ifndef _DT_BINDINGS_GCE_MT8192_H +#define _DT_BINDINGS_GCE_MT8192_H + +/* assign timeout 0 also means default */ +#define CMDQ_NO_TIMEOUT0x +#define CMDQ_TIMEOUT_DEFAULT 1000 + +/* GCE thread priority */ +#define CMDQ_THR_PRIO_LOWEST 0 +#define CMDQ_THR_PRIO_11 +#define CMDQ_THR_PRIO_22 +#define CMDQ_THR_PRIO_33 +#define CMDQ_THR_PRIO_44 +#define CMDQ_THR_PRIO_55 +#define CMDQ_THR_PRIO_66 +#define CMDQ_THR_PRIO_HIGHEST 7 + +/* CPR count in 32bit register */ +#define GCE_CPR_COUNT 1312 + +/* GCE subsys table */ +#define SUBSYS_13000 +#define SUBSYS_14001 +#define SUBSYS_14012 +#define SUBSYS_14023 +#define SUBSYS_15024 +#define SUBSYS_18805 +#define SUBSYS_18816 +#define SUBSYS_18827 +#define SUBSYS_18838 +#define SUBSYS_18849 +#define SUBSYS_100010 +#define SUBSYS_100111 +#define SUBSYS_100212 +#define SUBSYS_100313 +#define SUBSYS_100414 +#define SUBSYS_100515 +#define SUBSYS_102016 +#define SUBSYS_102817 +#define SUBSYS_170018 +#define SUBSYS_170119 +#define SUBSYS_170220 +#define SUBSYS_170321 +#define SUBSYS_180022 +#define SUBSYS_180123 +#define SUBSYS_180224 +#define SUBSYS_180425 +#define SUBSYS_180526 +#define SUBSYS_180827 +#define SUBSYS_180a28 +#define SUBSYS_180b29 +#define SUBSYS_NO_SUPPORT 99 + +/* GCE General Purpose Register (GPR) support + * Leave note for scenario usage here + */ +/* GCE: write mask */ +#define GCE_GPR_R000x00 +#define GCE_GPR_R010x01 +/* MDP: P1: JPEG dest */ +#define GCE_GPR_R020x02 +#define GCE_GPR_R030x03 +/* MDP: PQ color */ +#define GCE_GPR_R040x04 +/* MDP: 2D sharpness */ +#define GCE_GPR_R050x05 +/* DISP: poll esd */ +#define GCE_GPR_R060x06 +#define GCE_GPR_R070x07 +/* MDP: P4: 2D sharpness dst */ +#define GCE_GPR_R080x08 +#define GCE_GPR_R090x09 +/* VCU: poll with timeout for GPR timer */ +#define GCE_GPR_R100x0A +#define GCE_GPR_R110x0B +/* CMDQ: debug */ +#define GCE_GPR_R120x0C +#define GCE_GPR_R130x0D +/* CMDQ: P7: debug */ +#define GCE_G
[PATCH v3 0/3] support gce on mt8192 platform
Change since v2: - add controy_by_sw for mt8192 Change since v1: - move out shift jump patch - remove useless patch Yongqiang Niu (3): dt-binding: gce: add gce header file for mt8192 arm64: dts: mt8192: add gce node mailbox: cmdq: add mt8192 support .../devicetree/bindings/mailbox/mtk-gce.txt | 7 +- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 + drivers/mailbox/mtk-cmdq-mailbox.c| 10 + include/dt-bindings/gce/mt8192-gce.h | 419 ++ 4 files changed, 443 insertions(+), 3 deletions(-) create mode 100644 include/dt-bindings/gce/mt8192-gce.h -- 2.30.0.365.g02bc693789-goog
[PATCH v6 3/3] PM / devfreq: Add required OPPs support to passive governor
From: Saravana Kannan
Look at the required OPPs of the "parent" device to determine the OPP that
is required from the slave device managed by the passive governor. This
allows having mappings between a parent device and a slave device even when
they don't have the same number of OPPs.
Signed-off-by: Saravana Kannan
Acked-by: MyungJoo Ham
Acked-by: Chanwoo Choi
Signed-off-by: Hsin-Yi Wang
---
drivers/devfreq/governor_passive.c | 25 ++---
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/drivers/devfreq/governor_passive.c
b/drivers/devfreq/governor_passive.c
index 63332e4a65ae8..8fd51cc9b991a 100644
--- a/drivers/devfreq/governor_passive.c
+++ b/drivers/devfreq/governor_passive.c
@@ -19,7 +19,7 @@ static int devfreq_passive_get_target_freq(struct devfreq
*devfreq,
= (struct devfreq_passive_data *)devfreq->data;
struct devfreq *parent_devfreq = (struct devfreq *)p_data->parent;
unsigned long child_freq = ULONG_MAX;
- struct dev_pm_opp *opp;
+ struct dev_pm_opp *opp, *p_opp = ERR_PTR(-ENODEV);
int i, count, ret = 0;
/*
@@ -29,7 +29,7 @@ static int devfreq_passive_get_target_freq(struct devfreq
*devfreq,
*/
if (p_data->get_target_freq) {
ret = p_data->get_target_freq(devfreq, freq);
- goto out;
+ return ret;
}
/*
@@ -56,13 +56,22 @@ static int devfreq_passive_get_target_freq(struct devfreq
*devfreq,
* list of parent device. Because in this case, *freq is temporary
* value which is decided by ondemand governor.
*/
- opp = devfreq_recommended_opp(parent_devfreq->dev.parent, freq, 0);
- if (IS_ERR(opp)) {
- ret = PTR_ERR(opp);
- goto out;
+ p_opp = devfreq_recommended_opp(parent_devfreq->dev.parent, freq, 0);
+ if (IS_ERR(p_opp)) {
+ ret = PTR_ERR(p_opp);
+ return ret;
}
- dev_pm_opp_put(opp);
+ if (devfreq->opp_table && parent_devfreq->opp_table) {
+ opp = dev_pm_opp_xlate_required_opp(parent_devfreq->opp_table,
+ devfreq->opp_table, p_opp);
+ if (!IS_ERR(opp)) {
+ *freq = dev_pm_opp_get_freq(opp);
+ dev_pm_opp_put(opp);
+ } else
+ ret = PTR_ERR(opp);
+ goto out;
+ }
/*
* Get the OPP table's index of decided freqeuncy by governor
@@ -89,6 +98,8 @@ static int devfreq_passive_get_target_freq(struct devfreq
*devfreq,
*freq = child_freq;
out:
+ dev_pm_opp_put(p_opp);
+
return ret;
}
--
2.30.0.365.g02bc693789-goog
[PATCH v6 1/3] OPP: Add function to look up required OPP's for a given OPP
From: Saravana Kannan
Add a function that allows looking up required OPPs given a source OPP
table, destination OPP table and the source OPP.
Signed-off-by: Saravana Kannan
Signed-off-by: Hsin-Yi Wang
---
drivers/opp/core.c | 59 ++
include/linux/pm_opp.h | 7 +
2 files changed, 66 insertions(+)
diff --git a/drivers/opp/core.c b/drivers/opp/core.c
index dc95d29e94c1b..fba67ae40aefc 100644
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
@@ -2398,6 +2398,65 @@ devm_pm_opp_attach_genpd(struct device *dev, const char
**names,
}
EXPORT_SYMBOL_GPL(devm_pm_opp_attach_genpd);
+/**
+ * dev_pm_opp_xlate_required_opp() - Find required OPP for @src_table OPP.
+ * @src_table: OPP table which has @dst_table as one of its required OPP table.
+ * @dst_table: Required OPP table of the @src_table.
+ *
+ * This function returns the OPP (present in @dst_table) pointed out by the
+ * "required-opps" property of the OPP (present in @src_table).
+ *
+ * The callers are required to call dev_pm_opp_put() for the returned OPP after
+ * use.
+ *
+ * Return: destination table OPP on success, otherwise -EINVAL or -ENODEV based
+ * on errors.
+ */
+struct dev_pm_opp *dev_pm_opp_xlate_required_opp(struct opp_table *src_table,
+struct opp_table *dst_table,
+struct dev_pm_opp *src_opp)
+{
+ struct dev_pm_opp *opp, *dest_opp = ERR_PTR(-EINVAL);
+ int i;
+
+ if (!src_table || !dst_table || !src_opp ||
+ !src_table->required_opp_tables)
+ return ERR_PTR(-EINVAL);
+
+ /* required-opps not fully initialized yet */
+ if (lazy_linking_pending(src_table))
+ return ERR_PTR(-EINVAL);
+
+ for (i = 0; i < src_table->required_opp_count; i++) {
+ if (src_table->required_opp_tables[i] == dst_table)
+ break;
+ }
+
+ if (unlikely(i == src_table->required_opp_count)) {
+ pr_err("%s: Couldn't find matching OPP table (%p: %p)\n",
+ __func__, src_table, dst_table);
+ return ERR_PTR(-ENODEV);
+ }
+
+ mutex_lock(_table->lock);
+
+ list_for_each_entry(opp, _table->opp_list, node) {
+ if (opp == src_opp) {
+ dest_opp = opp->required_opps[i];
+ dev_pm_opp_get(dest_opp);
+ goto unlock;
+ }
+ }
+
+ pr_err("%s: Couldn't find matching OPP (%p: %p)\n", __func__, src_table,
+ dst_table);
+
+unlock:
+ mutex_unlock(_table->lock);
+
+ return dest_opp;
+}
+
/**
* dev_pm_opp_xlate_performance_state() - Find required OPP's pstate for
src_table.
* @src_table: OPP table which has dst_table as one of its required OPP table.
diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h
index ab1d15ce559db..c0371efa4a0f2 100644
--- a/include/linux/pm_opp.h
+++ b/include/linux/pm_opp.h
@@ -156,6 +156,7 @@ struct opp_table
*devm_pm_opp_register_set_opp_helper(struct device *dev, int (*
struct opp_table *dev_pm_opp_attach_genpd(struct device *dev, const char
**names, struct device ***virt_devs);
void dev_pm_opp_detach_genpd(struct opp_table *opp_table);
struct opp_table *devm_pm_opp_attach_genpd(struct device *dev, const char
**names, struct device ***virt_devs);
+struct dev_pm_opp *dev_pm_opp_xlate_required_opp(struct opp_table *src_table,
struct opp_table *dst_table, struct dev_pm_opp *src_opp);
int dev_pm_opp_xlate_performance_state(struct opp_table *src_table, struct
opp_table *dst_table, unsigned int pstate);
int dev_pm_opp_set_rate(struct device *dev, unsigned long target_freq);
int dev_pm_opp_set_opp(struct device *dev, struct dev_pm_opp *opp);
@@ -367,6 +368,12 @@ static inline struct opp_table
*devm_pm_opp_attach_genpd(struct device *dev,
return ERR_PTR(-EOPNOTSUPP);
}
+static inline struct dev_pm_opp *dev_pm_opp_xlate_required_opp(struct
opp_table *src_table,
+ struct opp_table *dst_table, struct dev_pm_opp
*src_opp)
+{
+ return ERR_PTR(-EOPNOTSUPP);
+}
+
static inline int dev_pm_opp_xlate_performance_state(struct opp_table
*src_table, struct opp_table *dst_table, unsigned int pstate)
{
return -EOPNOTSUPP;
--
2.30.0.365.g02bc693789-goog
[PATCH v6 2/3] PM / devfreq: Cache OPP table reference in devfreq
From: Saravana Kannan
The OPP table can be used often in devfreq. Trying to get it each time can
be expensive, so cache it in the devfreq struct.
Signed-off-by: Saravana Kannan
Reviewed-by: Chanwoo Choi
Acked-by: MyungJoo Ham
Signed-off-by: Hsin-Yi Wang
---
drivers/devfreq/devfreq.c | 6 ++
include/linux/devfreq.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index 6aa10de792b33..a5899c9ae16fc 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -757,6 +757,8 @@ static void devfreq_dev_release(struct device *dev)
if (devfreq->profile->exit)
devfreq->profile->exit(devfreq->dev.parent);
+ if (devfreq->opp_table)
+ dev_pm_opp_put_opp_table(devfreq->opp_table);
mutex_destroy(>lock);
kfree(devfreq);
}
@@ -844,6 +846,10 @@ struct devfreq *devfreq_add_device(struct device *dev,
}
devfreq->suspend_freq = dev_pm_opp_get_suspend_opp_freq(dev);
+ devfreq->opp_table = dev_pm_opp_get_opp_table(dev);
+ if (IS_ERR(devfreq->opp_table))
+ devfreq->opp_table = NULL;
+
atomic_set(>suspend_count, 0);
dev_set_name(>dev, "%s", dev_name(dev));
diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h
index b6d3bae1c74d8..26ea0850be9bb 100644
--- a/include/linux/devfreq.h
+++ b/include/linux/devfreq.h
@@ -137,6 +137,7 @@ struct devfreq_stats {
* using devfreq.
* @profile: device-specific devfreq profile
* @governor: method how to choose frequency based on the usage.
+ * @opp_table: Reference to OPP table of dev.parent, if one exists.
* @nb:notifier block used to notify devfreq object that it
should
* reevaluate operable frequencies. Devfreq users may use
* devfreq.nb to the corresponding register notifier call chain.
@@ -173,6 +174,7 @@ struct devfreq {
struct device dev;
struct devfreq_dev_profile *profile;
const struct devfreq_governor *governor;
+ struct opp_table *opp_table;
struct notifier_block nb;
struct delayed_work work;
--
2.30.0.365.g02bc693789-goog
[PATCH v6 0/3] Add required-opps support to devfreq passive gov
The devfreq passive governor scales the frequency of a "child" device based
on the current frequency of a "parent" device (not parent/child in the
sense of device hierarchy). As of today, the passive governor requires one
of the following to work correctly:
1. The parent and child device have the same number of frequencies
2. The child device driver passes a mapping function to translate from
parent frequency to child frequency.
When (1) is not true, (2) is the only option right now. But often times,
all that is required is a simple mapping from parent's frequency to child's
frequency.
Since OPPs already support pointing to other "required-opps", add support
for using that to map from parent device frequency to child device
frequency. That way, every child device driver doesn't have to implement a
separate mapping function anytime (1) isn't true.
Some common (but not comprehensive) reason for needing a devfreq passive
governor to adjust the frequency of one device based on another are:
1. These were the combination of frequencies that were validated/screened
during the manufacturing process.
2. These are the sensible performance combinations between two devices
interacting with each other. So that when one runs fast the other
doesn't become the bottleneck.
3. Hardware bugs requiring some kind of frequency ratio between devices.
For example, the following mapping can't be captured in DT as it stands
today because the parent and child device have different number of OPPs.
But with this patch series, this mapping can be captured cleanly.
In arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi you have something
like this with the following changes:
bus_g2d_400: bus0 {
compatible = "samsung,exynos-bus";
clocks = <_top CLK_ACLK_G2D_400>;
clock-names = "bus";
operating-points-v2 = <_g2d_400_opp_table>;
status = "disabled";
};
bus_noc2: bus9 {
compatible = "samsung,exynos-bus";
clocks = <_mif CLK_ACLK_BUS2_400>;
clock-names = "bus";
operating-points-v2 = <_noc2_opp_table>;
status = "disabled";
};
bus_g2d_400_opp_table: opp_table2 {
compatible = "operating-points-v2";
opp-shared;
opp-4 {
opp-hz = /bits/ 64 <4>;
opp-microvolt = <1075000>;
required-opps = <_400>;
};
opp-26700 {
opp-hz = /bits/ 64 <26700>;
opp-microvolt = <100>;
required-opps = <_200>;
};
opp-2 {
opp-hz = /bits/ 64 <2>;
opp-microvolt = <975000>;
required-opps = <_200>;
};
opp-16000 {
opp-hz = /bits/ 64 <16000>;
opp-microvolt = <962500>;
required-opps = <_134>;
};
opp-13400 {
opp-hz = /bits/ 64 <13400>;
opp-microvolt = <95>;
required-opps = <_134>;
};
opp-1 {
opp-hz = /bits/ 64 <1>;
opp-microvolt = <937500>;
required-opps = <_100>;
};
};
bus_noc2_opp_table: opp_table6 {
compatible = "operating-points-v2";
noc2_400: opp-4 {
opp-hz = /bits/ 64 <4>;
};
noc2_200: opp-2 {
opp-hz = /bits/ 64 <2>;
};
noc2_134: opp-13400 {
opp-hz = /bits/ 64 <13400>;
};
noc2_100: opp-1 {
opp-hz = /bits/ 64 <1>;
};
};
-Saravana
v5 -> v6:
- fix review comments
v4 -> v5:
- drop patch "OPP: Improve required-opps linking" and rebase to
https://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm.git/log/?h=opp/linux-next
- Compare pointers in dev_pm_opp_xlate_required_opp().
v3 -> v4:
- Fixed documentation comments
- Fixed order of functions in .h file
- Renamed the new xlate API
- Caused _set_required_opps() to fail if all required opps tables aren't
linked.
v2 -> v3:
- Rebased onto linux-next.
- Added documentation comment for new fields.
- Added support for lazy required-opps linking.
- Updated Ack/Reviewed-bys.
v1 -> v2:
- Cached OPP table reference in devfreq to avoid looking up every time.
- Renamed variable in passive governor to be more intuitive.
- Updated cover letter with examples.
Saravana Kannan (3):
OPP:
Re: [PATCH v5 0/3] Add required-opps support to devfreq passive gov
On Thu, Feb 4, 2021 at 1:41 PM Viresh Kumar wrote: > > On 03-02-21, 17:23, Hsin-Yi Wang wrote: > > The devfreq passive governor scales the frequency of a "child" device based > > on the current frequency of a "parent" device (not parent/child in the > > sense of device hierarchy). As of today, the passive governor requires one > > of the following to work correctly: > > 1. The parent and child device have the same number of frequencies > > 2. The child device driver passes a mapping function to translate from > >parent frequency to child frequency. > > > > When (1) is not true, (2) is the only option right now. But often times, > > all that is required is a simple mapping from parent's frequency to child's > > frequency. > > > > Since OPPs already support pointing to other "required-opps", add support > > for using that to map from parent device frequency to child device > > frequency. That way, every child device driver doesn't have to implement a > > separate mapping function anytime (1) isn't true. > > So you guys aren't interested in dev_pm_opp_set_opp() but just the > translation of the required-OPPs ? > I think this series focuses on required-opps. > I am fine with most of the stuff and I would like to take it via OPP > tree, hope that would be fine ? > Sounds good to me, thanks. > -- > viresh
Re: [PATCH v5 3/3] PM / devfreq: Add required OPPs support to passive governor
On Thu, Feb 4, 2021 at 10:49 AM Viresh Kumar wrote:
>
> On 03-02-21, 17:24, Hsin-Yi Wang wrote:
> > From: Saravana Kannan
> >
> > Look at the required OPPs of the "parent" device to determine the OPP that
> > is required from the slave device managed by the passive governor. This
> > allows having mappings between a parent device and a slave device even when
> > they don't have the same number of OPPs.
> >
> > Signed-off-by: Saravana Kannan
> > Acked-by: MyungJoo Ham
> > Acked-by: Chanwoo Choi
> > Signed-off-by: Hsin-Yi Wang
> > ---
> > drivers/devfreq/governor_passive.c | 20 +++-
> > 1 file changed, 15 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/devfreq/governor_passive.c
> > b/drivers/devfreq/governor_passive.c
> > index 63332e4a65ae8..8d92b1964f9c3 100644
> > --- a/drivers/devfreq/governor_passive.c
> > +++ b/drivers/devfreq/governor_passive.c
> > @@ -19,7 +19,7 @@ static int devfreq_passive_get_target_freq(struct devfreq
> > *devfreq,
> > = (struct devfreq_passive_data *)devfreq->data;
> > struct devfreq *parent_devfreq = (struct devfreq *)p_data->parent;
> > unsigned long child_freq = ULONG_MAX;
> > - struct dev_pm_opp *opp;
> > + struct dev_pm_opp *opp = NULL, *p_opp = NULL;
>
> I would initialize p_opp to ERR_PTR(-ENODEV) to avoid using
> IS_ERR_OR_NULL. There is no need to initialize opp as well.
>
> > int i, count, ret = 0;
> >
> > /*
> > @@ -56,13 +56,20 @@ static int devfreq_passive_get_target_freq(struct
> > devfreq *devfreq,
> >* list of parent device. Because in this case, *freq is temporary
> >* value which is decided by ondemand governor.
> >*/
> > - opp = devfreq_recommended_opp(parent_devfreq->dev.parent, freq, 0);
> > - if (IS_ERR(opp)) {
> > - ret = PTR_ERR(opp);
> > + p_opp = devfreq_recommended_opp(parent_devfreq->dev.parent, freq, 0);
> > + if (IS_ERR(p_opp)) {
> > + ret = PTR_ERR(p_opp);
> > goto out;
>
> Perhaps just return from here, the goto is useless here.
>
> > }
> >
> > - dev_pm_opp_put(opp);
> > + if (devfreq->opp_table && parent_devfreq->opp_table)
> > + opp = dev_pm_opp_xlate_required_opp(parent_devfreq->opp_table,
> > + devfreq->opp_table,
> > p_opp);
> > + if (opp) {
>
> This needs to be part of the above if block itself, else the opp will
> always be NULL, isn't it ?
>
> > + *freq = dev_pm_opp_get_freq(opp);
> > + dev_pm_opp_put(opp);
> > + goto out;
> > + }
> >
> > /*
> >* Get the OPP table's index of decided freqeuncy by governor
> > @@ -89,6 +96,9 @@ static int devfreq_passive_get_target_freq(struct devfreq
> > *devfreq,
> > *freq = child_freq;
> >
> > out:
> > + if (!IS_ERR_OR_NULL(opp))
>
> you should be checking for p_opp here, isn't it ? And perhaps we don't
> need this check as well as p_opp can't be invalid here.
>
> > + dev_pm_opp_put(p_opp);
> > +
> > return ret;
> > }
> >
> > --
> > 2.30.0.365.g02bc693789-goog
>
Thanks for the review. I'll fix them and send next version
> --
> viresh
[PATCH v5 3/3] PM / devfreq: Add required OPPs support to passive governor
From: Saravana Kannan
Look at the required OPPs of the "parent" device to determine the OPP that
is required from the slave device managed by the passive governor. This
allows having mappings between a parent device and a slave device even when
they don't have the same number of OPPs.
Signed-off-by: Saravana Kannan
Acked-by: MyungJoo Ham
Acked-by: Chanwoo Choi
Signed-off-by: Hsin-Yi Wang
---
drivers/devfreq/governor_passive.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/devfreq/governor_passive.c
b/drivers/devfreq/governor_passive.c
index 63332e4a65ae8..8d92b1964f9c3 100644
--- a/drivers/devfreq/governor_passive.c
+++ b/drivers/devfreq/governor_passive.c
@@ -19,7 +19,7 @@ static int devfreq_passive_get_target_freq(struct devfreq
*devfreq,
= (struct devfreq_passive_data *)devfreq->data;
struct devfreq *parent_devfreq = (struct devfreq *)p_data->parent;
unsigned long child_freq = ULONG_MAX;
- struct dev_pm_opp *opp;
+ struct dev_pm_opp *opp = NULL, *p_opp = NULL;
int i, count, ret = 0;
/*
@@ -56,13 +56,20 @@ static int devfreq_passive_get_target_freq(struct devfreq
*devfreq,
* list of parent device. Because in this case, *freq is temporary
* value which is decided by ondemand governor.
*/
- opp = devfreq_recommended_opp(parent_devfreq->dev.parent, freq, 0);
- if (IS_ERR(opp)) {
- ret = PTR_ERR(opp);
+ p_opp = devfreq_recommended_opp(parent_devfreq->dev.parent, freq, 0);
+ if (IS_ERR(p_opp)) {
+ ret = PTR_ERR(p_opp);
goto out;
}
- dev_pm_opp_put(opp);
+ if (devfreq->opp_table && parent_devfreq->opp_table)
+ opp = dev_pm_opp_xlate_required_opp(parent_devfreq->opp_table,
+ devfreq->opp_table, p_opp);
+ if (opp) {
+ *freq = dev_pm_opp_get_freq(opp);
+ dev_pm_opp_put(opp);
+ goto out;
+ }
/*
* Get the OPP table's index of decided freqeuncy by governor
@@ -89,6 +96,9 @@ static int devfreq_passive_get_target_freq(struct devfreq
*devfreq,
*freq = child_freq;
out:
+ if (!IS_ERR_OR_NULL(opp))
+ dev_pm_opp_put(p_opp);
+
return ret;
}
--
2.30.0.365.g02bc693789-goog
[PATCH v5 2/3] PM / devfreq: Cache OPP table reference in devfreq
From: Saravana Kannan
The OPP table can be used often in devfreq. Trying to get it each time can
be expensive, so cache it in the devfreq struct.
Signed-off-by: Saravana Kannan
Reviewed-by: Chanwoo Choi
Acked-by: MyungJoo Ham
Signed-off-by: Hsin-Yi Wang
---
drivers/devfreq/devfreq.c | 6 ++
include/linux/devfreq.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index 6aa10de792b33..a5899c9ae16fc 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -757,6 +757,8 @@ static void devfreq_dev_release(struct device *dev)
if (devfreq->profile->exit)
devfreq->profile->exit(devfreq->dev.parent);
+ if (devfreq->opp_table)
+ dev_pm_opp_put_opp_table(devfreq->opp_table);
mutex_destroy(>lock);
kfree(devfreq);
}
@@ -844,6 +846,10 @@ struct devfreq *devfreq_add_device(struct device *dev,
}
devfreq->suspend_freq = dev_pm_opp_get_suspend_opp_freq(dev);
+ devfreq->opp_table = dev_pm_opp_get_opp_table(dev);
+ if (IS_ERR(devfreq->opp_table))
+ devfreq->opp_table = NULL;
+
atomic_set(>suspend_count, 0);
dev_set_name(>dev, "%s", dev_name(dev));
diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h
index b6d3bae1c74d8..26ea0850be9bb 100644
--- a/include/linux/devfreq.h
+++ b/include/linux/devfreq.h
@@ -137,6 +137,7 @@ struct devfreq_stats {
* using devfreq.
* @profile: device-specific devfreq profile
* @governor: method how to choose frequency based on the usage.
+ * @opp_table: Reference to OPP table of dev.parent, if one exists.
* @nb:notifier block used to notify devfreq object that it
should
* reevaluate operable frequencies. Devfreq users may use
* devfreq.nb to the corresponding register notifier call chain.
@@ -173,6 +174,7 @@ struct devfreq {
struct device dev;
struct devfreq_dev_profile *profile;
const struct devfreq_governor *governor;
+ struct opp_table *opp_table;
struct notifier_block nb;
struct delayed_work work;
--
2.30.0.365.g02bc693789-goog
[PATCH v5 1/3] OPP: Add function to look up required OPP's for a given OPP
From: Saravana Kannan
Add a function that allows looking up required OPPs given a source OPP
table, destination OPP table and the source OPP.
Signed-off-by: Saravana Kannan
Signed-off-by: Hsin-Yi Wang
---
drivers/opp/core.c | 58 ++
include/linux/pm_opp.h | 11
2 files changed, 69 insertions(+)
diff --git a/drivers/opp/core.c b/drivers/opp/core.c
index dc95d29e94c1b..878f066b972cc 100644
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
@@ -2398,6 +2398,64 @@ devm_pm_opp_attach_genpd(struct device *dev, const char
**names,
}
EXPORT_SYMBOL_GPL(devm_pm_opp_attach_genpd);
+/**
+ * dev_pm_opp_xlate_required_opp() - Find required OPP for @src_table OPP.
+ * @src_table: OPP table which has @dst_table as one of its required OPP table.
+ * @dst_table: Required OPP table of the @src_table.
+ *
+ * This function returns the OPP (present in @dst_table) pointed out by the
+ * "required-opps" property of the OPP (present in @src_table).
+ *
+ * The callers are required to call dev_pm_opp_put() for the returned OPP after
+ * use.
+ *
+ * Return: destination table OPP on success, otherwise NULL on errors.
+ */
+struct dev_pm_opp *dev_pm_opp_xlate_required_opp(struct opp_table *src_table,
+struct opp_table *dst_table,
+struct dev_pm_opp *src_opp)
+{
+ struct dev_pm_opp *opp, *dest_opp = NULL;
+ int i;
+
+ if (!src_table || !dst_table || !src_opp ||
+ !src_table->required_opp_tables)
+ return NULL;
+
+ /* required-opps not fully initialized yet */
+ if (lazy_linking_pending(src_table))
+ return NULL;
+
+ for (i = 0; i < src_table->required_opp_count; i++) {
+ if (src_table->required_opp_tables[i] == dst_table)
+ break;
+ }
+
+ if (unlikely(i == src_table->required_opp_count)) {
+ pr_err("%s: Couldn't find matching OPP table (%p: %p)\n",
+ __func__, src_table, dst_table);
+ return NULL;
+ }
+
+ mutex_lock(_table->lock);
+
+ list_for_each_entry(opp, _table->opp_list, node) {
+ if (opp == src_opp) {
+ dest_opp = opp->required_opps[i];
+ dev_pm_opp_get(dest_opp);
+ goto unlock;
+ }
+ }
+
+ pr_err("%s: Couldn't find matching OPP (%p: %p)\n", __func__, src_table,
+ dst_table);
+
+unlock:
+ mutex_unlock(_table->lock);
+
+ return dest_opp;
+}
+
/**
* dev_pm_opp_xlate_performance_state() - Find required OPP's pstate for
src_table.
* @src_table: OPP table which has dst_table as one of its required OPP table.
diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h
index ab1d15ce559db..6f5f72a7f601c 100644
--- a/include/linux/pm_opp.h
+++ b/include/linux/pm_opp.h
@@ -156,6 +156,9 @@ struct opp_table
*devm_pm_opp_register_set_opp_helper(struct device *dev, int (*
struct opp_table *dev_pm_opp_attach_genpd(struct device *dev, const char
**names, struct device ***virt_devs);
void dev_pm_opp_detach_genpd(struct opp_table *opp_table);
struct opp_table *devm_pm_opp_attach_genpd(struct device *dev, const char
**names, struct device ***virt_devs);
+struct dev_pm_opp *dev_pm_opp_xlate_required_opp(struct opp_table *src_table,
+struct opp_table *dst_table,
+struct dev_pm_opp *src_opp);
int dev_pm_opp_xlate_performance_state(struct opp_table *src_table, struct
opp_table *dst_table, unsigned int pstate);
int dev_pm_opp_set_rate(struct device *dev, unsigned long target_freq);
int dev_pm_opp_set_opp(struct device *dev, struct dev_pm_opp *opp);
@@ -367,6 +370,14 @@ static inline struct opp_table
*devm_pm_opp_attach_genpd(struct device *dev,
return ERR_PTR(-EOPNOTSUPP);
}
+static inline struct dev_pm_opp *dev_pm_opp_xlate_required_opp(
+ struct opp_table *src_table,
+ struct opp_table *dst_table,
+ struct dev_pm_opp *src_opp)
+{
+ return NULL;
+}
+
static inline int dev_pm_opp_xlate_performance_state(struct opp_table
*src_table, struct opp_table *dst_table, unsigned int pstate)
{
return -EOPNOTSUPP;
--
2.30.0.365.g02bc693789-goog
[PATCH v5 0/3] Add required-opps support to devfreq passive gov
The devfreq passive governor scales the frequency of a "child" device based
on the current frequency of a "parent" device (not parent/child in the
sense of device hierarchy). As of today, the passive governor requires one
of the following to work correctly:
1. The parent and child device have the same number of frequencies
2. The child device driver passes a mapping function to translate from
parent frequency to child frequency.
When (1) is not true, (2) is the only option right now. But often times,
all that is required is a simple mapping from parent's frequency to child's
frequency.
Since OPPs already support pointing to other "required-opps", add support
for using that to map from parent device frequency to child device
frequency. That way, every child device driver doesn't have to implement a
separate mapping function anytime (1) isn't true.
Some common (but not comprehensive) reason for needing a devfreq passive
governor to adjust the frequency of one device based on another are:
1. These were the combination of frequencies that were validated/screened
during the manufacturing process.
2. These are the sensible performance combinations between two devices
interacting with each other. So that when one runs fast the other
doesn't become the bottleneck.
3. Hardware bugs requiring some kind of frequency ratio between devices.
For example, the following mapping can't be captured in DT as it stands
today because the parent and child device have different number of OPPs.
But with this patch series, this mapping can be captured cleanly.
In arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi you have something
like this with the following changes:
bus_g2d_400: bus0 {
compatible = "samsung,exynos-bus";
clocks = <_top CLK_ACLK_G2D_400>;
clock-names = "bus";
operating-points-v2 = <_g2d_400_opp_table>;
status = "disabled";
};
bus_noc2: bus9 {
compatible = "samsung,exynos-bus";
clocks = <_mif CLK_ACLK_BUS2_400>;
clock-names = "bus";
operating-points-v2 = <_noc2_opp_table>;
status = "disabled";
};
bus_g2d_400_opp_table: opp_table2 {
compatible = "operating-points-v2";
opp-shared;
opp-4 {
opp-hz = /bits/ 64 <4>;
opp-microvolt = <1075000>;
required-opps = <_400>;
};
opp-26700 {
opp-hz = /bits/ 64 <26700>;
opp-microvolt = <100>;
required-opps = <_200>;
};
opp-2 {
opp-hz = /bits/ 64 <2>;
opp-microvolt = <975000>;
required-opps = <_200>;
};
opp-16000 {
opp-hz = /bits/ 64 <16000>;
opp-microvolt = <962500>;
required-opps = <_134>;
};
opp-13400 {
opp-hz = /bits/ 64 <13400>;
opp-microvolt = <95>;
required-opps = <_134>;
};
opp-1 {
opp-hz = /bits/ 64 <1>;
opp-microvolt = <937500>;
required-opps = <_100>;
};
};
bus_noc2_opp_table: opp_table6 {
compatible = "operating-points-v2";
noc2_400: opp-4 {
opp-hz = /bits/ 64 <4>;
};
noc2_200: opp-2 {
opp-hz = /bits/ 64 <2>;
};
noc2_134: opp-13400 {
opp-hz = /bits/ 64 <13400>;
};
noc2_100: opp-1 {
opp-hz = /bits/ 64 <1>;
};
};
-Saravana
v4 -> v5:
- drop patch "OPP: Improve required-opps linking" and rebase to
https://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm.git/log/?h=opp/linux-next
- Compare pointers in dev_pm_opp_xlate_required_opp().
v3 -> v4:
- Fixed documentation comments
- Fixed order of functions in .h file
- Renamed the new xlate API
- Caused _set_required_opps() to fail if all required opps tables aren't
linked.
v2 -> v3:
- Rebased onto linux-next.
- Added documentation comment for new fields.
- Added support for lazy required-opps linking.
- Updated Ack/Reviewed-bys.
v1 -> v2:
- Cached OPP table reference in devfreq to avoid looking up every time.
- Renamed variable in passive governor to be more intuitive.
- Updated cover letter with examples.
Saravana Kannan (3):
OPP: Add function to look up required
Re: [v6,1/3] arm64: dts: mt8183: add thermal zone node
On Fri, Jan 29, 2021 at 6:10 PM Michael Kao wrote:
>
> From: "michael.kao"
>
> Add thermal zone node to Mediatek MT8183 dts file.
>
> Evaluate the thermal zone every 500ms while not cooling
> and every 100ms when passive cooling is performed.
>
> Signed-off-by: Matthias Kaehlcke
> Signed-off-by: Michael Kao
> ---
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 84
> 1 file changed, 84 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 5b782a4769e7..0aa31d338fb0 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -657,6 +657,87 @@
> status = "disabled";
> };
>
> + thermal: thermal@1100b000 {
> + #thermal-sensor-cells = <1>;
> + compatible = "mediatek,mt8183-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + clocks = < CLK_INFRA_THERM>,
> +< CLK_INFRA_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = < MT8183_INFRACFG_AO_THERM_SW_RST>;
> + interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
> + mediatek,auxadc = <>;
> + mediatek,apmixedsys = <>;
> + nvmem-cells = <_calibration>;
> + nvmem-cell-names = "calibration-data";
> + };
> +
> + thermal-zones {
> + cpu_thermal: cpu_thermal {
> + polling-delay-passive = <100>;
> + polling-delay = <500>;
> + thermal-sensors = < 0>;
> + sustainable-power = <5000>;
> + };
> +
> + /* The tzts1 ~ tzts6 don't need to polling */
> + /* The tzts1 ~ tzts6 don't need to thermal throttle */
> +
> + tzts1: tzts1 {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 1>;
> + sustainable-power = <5000>;
> + trips {};
> + cooling-maps {};
> + };
> +
> + tzts2: tzts2 {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 2>;
> + sustainable-power = <5000>;
> + trips {};
> + cooling-maps {};
> + };
> +
> + tzts3: tzts3 {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 3>;
> + sustainable-power = <5000>;
> + trips {};
> + cooling-maps {};
> + };
> +
> + tzts4: tzts4 {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 4>;
> + sustainable-power = <5000>;
> + trips {};
> + cooling-maps {};
> + };
> +
> + tzts5: tzts5 {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 5>;
> + sustainable-power = <5000>;
> + trips {};
> + cooling-maps {};
> + };
> +
> + tztsABB: tztsABB {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 6>;
> + sustainable-power = <5000>;
> + trips {};
> + cooling-maps {};
> + };
> + };
> +
> pwm0: pwm@1100e000 {
> compatible = "mediatek,mt8183-disp-pwm";
> reg = <0 0x1100e000 0 0x1000>;
> @@ -926,6 +1007,9 @@
> reg = <0 0x11f1 0 0x1000>;
> #address-cells = <1>;
> #size-cells = <1>;
> + thermal_calibration: calib@180 {
> + reg = <0x180 0xc>;
> +
missing };
>
