[PATCH] gpio: mpc8xxx: change the gpio interrupt flags.
From: Song Hui
Delete the interrupt IRQF_NO_THREAD flags in order to gpio interrupts
can be threaded to allow high-priority processes to preempt.
Signed-off-by: Song Hui
---
drivers/gpio/gpio-mpc8xxx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 604dfec..1e86652 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -417,7 +417,7 @@ static int mpc8xxx_probe(struct platform_device *pdev)
ret = devm_request_irq(>dev, mpc8xxx_gc->irqn,
mpc8xxx_gpio_irq_cascade,
- IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade",
+ IRQF_SHARED, "gpio-cascade",
mpc8xxx_gc);
if (ret) {
dev_err(>dev, "%s: failed to devm_request_irq(%d), ret =
%d\n",
--
2.9.5
[PATCH] gpio: mpc8xxx: change the gpio interrupt flags.
From: Song Hui
delete the interrupt IRQF_NO_THREAD flags.
Signed-off-by: Song Hui
---
drivers/gpio/gpio-mpc8xxx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 604dfec..1e86652 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -417,7 +417,7 @@ static int mpc8xxx_probe(struct platform_device *pdev)
ret = devm_request_irq(>dev, mpc8xxx_gc->irqn,
mpc8xxx_gpio_irq_cascade,
- IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade",
+ IRQF_SHARED, "gpio-cascade",
mpc8xxx_gc);
if (ret) {
dev_err(>dev, "%s: failed to devm_request_irq(%d), ret =
%d\n",
--
2.9.5
[PATCH v1 2/3] armv8: gpio: add gpio feature
From: "hui.song"
add one struct mpc8xxx_gpio_plat to enable gpio feature.
Signed-off-by: hui.song
---
.../include/asm/arch-fsl-layerscape/gpio.h| 22 +++
1 file changed, 22 insertions(+)
create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/gpio.h
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/gpio.h
b/arch/arm/include/asm/arch-fsl-layerscape/gpio.h
new file mode 100644
index 00..d8dd750a72
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/gpio.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ */
+
+/*
+ * Dummy header file to enable CONFIG_OF_CONTROL.
+ * If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled.
+ * It includes via , so those SoCs that enable
+ * OF_CONTROL must have arch/gpio.h.
+ */
+
+#ifndef __ASM_ARCH_MX85XX_GPIO_H
+#define __ASM_ARCH_MX85XX_GPIO_H
+
+struct mpc8xxx_gpio_plat {
+ ulong addr;
+ unsigned long size;
+ uint ngpios;
+};
+
+#endif
--
2.17.1
[PATCH v1 1/3] gpio: mpc8xxx: support fsl-layerscape platform.
From: "hui.song"
Make the MPC8XXX gpio driver to support the fsl-layerscape.
Signed-off-by: hui.song
---
drivers/gpio/mpc8xxx_gpio.c | 59 +
1 file changed, 59 insertions(+)
diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c
index 1dfd22522c..466f5f50cf 100644
--- a/drivers/gpio/mpc8xxx_gpio.c
+++ b/drivers/gpio/mpc8xxx_gpio.c
@@ -12,6 +12,8 @@
#include
#include
#include
+#include
+#include
struct ccsr_gpio {
u32 gpdir;
@@ -20,6 +22,7 @@ struct ccsr_gpio {
u32 gpier;
u32 gpimr;
u32 gpicr;
+ u32 gpibe;
};
struct mpc8xxx_gpio_data {
@@ -49,31 +52,51 @@ inline u32 gpio_mask(uint gpio)
static inline u32 mpc8xxx_gpio_get_val(struct ccsr_gpio *base, u32 mask)
{
+#if CONFIG_ARM
+ return in_le32(>gpdat) & mask;
+#else
return in_be32(>gpdat) & mask;
+#endif
}
static inline u32 mpc8xxx_gpio_get_dir(struct ccsr_gpio *base, u32 mask)
{
+#if CONFIG_ARM
+ return in_le32(>gpdir) & mask;
+#else
return in_be32(>gpdir) & mask;
+#endif
}
static inline int mpc8xxx_gpio_open_drain_val(struct ccsr_gpio *base, u32 mask)
{
+#if CONFIG_ARM
+ return in_le32(>gpodr) & mask;
+#else
return in_be32(>gpodr) & mask;
+#endif
}
static inline void mpc8xxx_gpio_open_drain_on(struct ccsr_gpio *base, u32
gpios)
{
+#if CONFIG_ARM
+ setbits_le32(>gpodr, gpios);
+#else
/* GPODR register 1 -> open drain on */
setbits_be32(>gpodr, gpios);
+#endif
}
static inline void mpc8xxx_gpio_open_drain_off(struct ccsr_gpio *base,
u32 gpios)
{
+#if CONFIG_ARM
+ clrbits_le32(>gpodr, gpios);
+#else
/* GPODR register 0 -> open drain off (actively driven) */
clrbits_be32(>gpodr, gpios);
+#endif
}
static int mpc8xxx_gpio_direction_input(struct udevice *dev, uint gpio)
@@ -81,9 +104,13 @@ static int mpc8xxx_gpio_direction_input(struct udevice
*dev, uint gpio)
struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
u32 mask = gpio_mask(gpio);
+#if CONFIG_ARM
+ clrbits_le32(>base->gpdir, mask);
+#else
/* GPDIR register 0 -> input */
clrbits_be32(>base->gpdir, mask);
+#endif
return 0;
}
@@ -100,10 +127,19 @@ static int mpc8xxx_gpio_set_value(struct udevice *dev,
uint gpio, int value)
data->dat_shadow &= ~mask;
}
+#if CONFIG_ARM
+ gpdir = in_le32(>gpdir);
+#else
gpdir = in_be32(>gpdir);
+#endif
gpdir |= gpio_mask(gpio);
+#if CONFIG_ARM
+ out_le32(>gpdat, gpdir & data->dat_shadow);
+ out_le32(>gpdir, gpdir);
+#else
out_be32(>gpdat, gpdir & data->dat_shadow);
out_be32(>gpdir, gpdir);
+#endif
return 0;
}
@@ -147,13 +183,29 @@ static int mpc8xxx_gpio_ofdata_to_platdata(struct udevice
*dev)
{
struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
fdt_addr_t addr;
+ u32 i;
+#if CONFIG_ARM
+ u32 reg[4];
+
+ dev_read_u32_array(dev, "reg", reg, 4);
+#else
u32 reg[2];
dev_read_u32_array(dev, "reg", reg, 2);
+#endif
+
+#if CONFIG_ARM
+ for (i = 0; i < 2; i++)
+ reg[i] = be32_to_cpu(reg[i]);
+#endif
addr = dev_translate_address(dev, reg);
plat->addr = addr;
+#if CONFIG_ARM
+ plat->size = reg[3];
+#else
plat->size = reg[1];
+#endif
plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);
return 0;
@@ -187,6 +239,7 @@ static int mpc8xxx_gpio_platdata_to_priv(struct udevice
*dev)
static int mpc8xxx_gpio_probe(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct device_node const *np = dev->node.np;
struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
char name[32], *str;
@@ -198,6 +251,12 @@ static int mpc8xxx_gpio_probe(struct udevice *dev)
if (!str)
return -ENOMEM;
+ if (of_device_is_compatible(np, "fsl,qoriq-gpio", NULL, NULL)) {
+ unsigned long gpibe = data->addr + sizeof(struct ccsr_gpio);
+
+ out_be32(gpibe, 0x);
+ }
+
uc_priv->bank_name = str;
uc_priv->gpio_count = data->gpio_count;
--
2.17.1
[PATCH v1 3/3] dm: armv8: gpio: include for fsl-layerscape
From: "hui.song" Enable the gpio feature on fsl-layerscape platform. Signed-off-by: hui.song --- arch/arm/include/asm/gpio.h | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index 333e407b66..7715a01706 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -1,12 +1,8 @@ #if !defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARCH_STI) && \ !defined(CONFIG_ARCH_K3) && !defined(CONFIG_ARCH_BCM68360) && \ !defined(CONFIG_ARCH_BCM6858) && !defined(CONFIG_ARCH_BCM63158) && \ - !defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_LX2160A) && \ - !defined(CONFIG_ARCH_LS1028A) && !defined(CONFIG_ARCH_LS2080A) && \ - !defined(CONFIG_ARCH_LS1088A) && !defined(CONFIG_ARCH_ASPEED) && \ - !defined(CONFIG_ARCH_LS1012A) && !defined(CONFIG_ARCH_LS1043A) && \ - !defined(CONFIG_ARCH_LS1046A) && !defined(CONFIG_ARCH_U8500) && \ - !defined(CONFIG_CORTINA_PLATFORM) + !defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_ASPEED) && \ + !defined(CONFIG_ARCH_U8500) && !defined(CONFIG_CORTINA_PLATFORM) #include #endif #include -- 2.17.1
[PATCH v1 1/3] gpio: mpc8xxx: support fsl-layerscape platform.
From: "hui.song"
Make the MPC8XXX gpio driver to support the fsl-layerscape.
Signed-off-by: hui.song
---
drivers/gpio/mpc8xxx_gpio.c | 59 +
1 file changed, 59 insertions(+)
diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c
index 1dfd22522c..466f5f50cf 100644
--- a/drivers/gpio/mpc8xxx_gpio.c
+++ b/drivers/gpio/mpc8xxx_gpio.c
@@ -12,6 +12,8 @@
#include
#include
#include
+#include
+#include
struct ccsr_gpio {
u32 gpdir;
@@ -20,6 +22,7 @@ struct ccsr_gpio {
u32 gpier;
u32 gpimr;
u32 gpicr;
+ u32 gpibe;
};
struct mpc8xxx_gpio_data {
@@ -49,31 +52,51 @@ inline u32 gpio_mask(uint gpio)
static inline u32 mpc8xxx_gpio_get_val(struct ccsr_gpio *base, u32 mask)
{
+#if CONFIG_ARM
+ return in_le32(>gpdat) & mask;
+#else
return in_be32(>gpdat) & mask;
+#endif
}
static inline u32 mpc8xxx_gpio_get_dir(struct ccsr_gpio *base, u32 mask)
{
+#if CONFIG_ARM
+ return in_le32(>gpdir) & mask;
+#else
return in_be32(>gpdir) & mask;
+#endif
}
static inline int mpc8xxx_gpio_open_drain_val(struct ccsr_gpio *base, u32 mask)
{
+#if CONFIG_ARM
+ return in_le32(>gpodr) & mask;
+#else
return in_be32(>gpodr) & mask;
+#endif
}
static inline void mpc8xxx_gpio_open_drain_on(struct ccsr_gpio *base, u32
gpios)
{
+#if CONFIG_ARM
+ setbits_le32(>gpodr, gpios);
+#else
/* GPODR register 1 -> open drain on */
setbits_be32(>gpodr, gpios);
+#endif
}
static inline void mpc8xxx_gpio_open_drain_off(struct ccsr_gpio *base,
u32 gpios)
{
+#if CONFIG_ARM
+ clrbits_le32(>gpodr, gpios);
+#else
/* GPODR register 0 -> open drain off (actively driven) */
clrbits_be32(>gpodr, gpios);
+#endif
}
static int mpc8xxx_gpio_direction_input(struct udevice *dev, uint gpio)
@@ -81,9 +104,13 @@ static int mpc8xxx_gpio_direction_input(struct udevice
*dev, uint gpio)
struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
u32 mask = gpio_mask(gpio);
+#if CONFIG_ARM
+ clrbits_le32(>base->gpdir, mask);
+#else
/* GPDIR register 0 -> input */
clrbits_be32(>base->gpdir, mask);
+#endif
return 0;
}
@@ -100,10 +127,19 @@ static int mpc8xxx_gpio_set_value(struct udevice *dev,
uint gpio, int value)
data->dat_shadow &= ~mask;
}
+#if CONFIG_ARM
+ gpdir = in_le32(>gpdir);
+#else
gpdir = in_be32(>gpdir);
+#endif
gpdir |= gpio_mask(gpio);
+#if CONFIG_ARM
+ out_le32(>gpdat, gpdir & data->dat_shadow);
+ out_le32(>gpdir, gpdir);
+#else
out_be32(>gpdat, gpdir & data->dat_shadow);
out_be32(>gpdir, gpdir);
+#endif
return 0;
}
@@ -147,13 +183,29 @@ static int mpc8xxx_gpio_ofdata_to_platdata(struct udevice
*dev)
{
struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
fdt_addr_t addr;
+ u32 i;
+#if CONFIG_ARM
+ u32 reg[4];
+
+ dev_read_u32_array(dev, "reg", reg, 4);
+#else
u32 reg[2];
dev_read_u32_array(dev, "reg", reg, 2);
+#endif
+
+#if CONFIG_ARM
+ for (i = 0; i < 2; i++)
+ reg[i] = be32_to_cpu(reg[i]);
+#endif
addr = dev_translate_address(dev, reg);
plat->addr = addr;
+#if CONFIG_ARM
+ plat->size = reg[3];
+#else
plat->size = reg[1];
+#endif
plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);
return 0;
@@ -187,6 +239,7 @@ static int mpc8xxx_gpio_platdata_to_priv(struct udevice
*dev)
static int mpc8xxx_gpio_probe(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct device_node const *np = dev->node.np;
struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
char name[32], *str;
@@ -198,6 +251,12 @@ static int mpc8xxx_gpio_probe(struct udevice *dev)
if (!str)
return -ENOMEM;
+ if (of_device_is_compatible(np, "fsl,qoriq-gpio", NULL, NULL)) {
+ unsigned long gpibe = data->addr + sizeof(struct ccsr_gpio);
+
+ out_be32(gpibe, 0x);
+ }
+
uc_priv->bank_name = str;
uc_priv->gpio_count = data->gpio_count;
--
2.17.1
[PATCH v1 2/3] armv8: gpio: add gpio feature
From: "hui.song"
add one struct mpc8xxx_gpio_plat to enable gpio feature.
Signed-off-by: hui.song
---
.../include/asm/arch-fsl-layerscape/gpio.h| 22 +++
1 file changed, 22 insertions(+)
create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/gpio.h
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/gpio.h
b/arch/arm/include/asm/arch-fsl-layerscape/gpio.h
new file mode 100644
index 00..d8dd750a72
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/gpio.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ */
+
+/*
+ * Dummy header file to enable CONFIG_OF_CONTROL.
+ * If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled.
+ * It includes via , so those SoCs that enable
+ * OF_CONTROL must have arch/gpio.h.
+ */
+
+#ifndef __ASM_ARCH_MX85XX_GPIO_H
+#define __ASM_ARCH_MX85XX_GPIO_H
+
+struct mpc8xxx_gpio_plat {
+ ulong addr;
+ unsigned long size;
+ uint ngpios;
+};
+
+#endif
--
2.17.1
[PATCH v1 3/3] dm: armv8: gpio: include for fsl-layerscape
From: "hui.song" Enable the gpio feature on fsl-layerscape platform. Signed-off-by: hui.song --- arch/arm/include/asm/gpio.h | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index 333e407b66..7715a01706 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -1,12 +1,8 @@ #if !defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARCH_STI) && \ !defined(CONFIG_ARCH_K3) && !defined(CONFIG_ARCH_BCM68360) && \ !defined(CONFIG_ARCH_BCM6858) && !defined(CONFIG_ARCH_BCM63158) && \ - !defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_LX2160A) && \ - !defined(CONFIG_ARCH_LS1028A) && !defined(CONFIG_ARCH_LS2080A) && \ - !defined(CONFIG_ARCH_LS1088A) && !defined(CONFIG_ARCH_ASPEED) && \ - !defined(CONFIG_ARCH_LS1012A) && !defined(CONFIG_ARCH_LS1043A) && \ - !defined(CONFIG_ARCH_LS1046A) && !defined(CONFIG_ARCH_U8500) && \ - !defined(CONFIG_CORTINA_PLATFORM) + !defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_ASPEED) && \ + !defined(CONFIG_ARCH_U8500) && !defined(CONFIG_CORTINA_PLATFORM) #include #endif #include -- 2.17.1
[PATCH v8] gpio/mpc8xxx: change irq handler from chained to normal
From: Song Hui
More than one gpio controllers can share one interrupt, change the
driver to request shared irq.
While this will work, it will mess up userspace accounting of the number
of interrupts per second in tools such as vmstat. The reason is that
for every GPIO interrupt, /proc/interrupts records the count against GIC
interrupt 68 or 69, as well as the GPIO itself. So, for every GPIO
interrupt, the total number of interrupts that the system has seen
increments by two.
Signed-off-by: Laurentiu Tudor
Signed-off-by: Alex Marginean
Signed-off-by: Song Hui
---
Changes in v8:
- merge two lines as one line to fit 80 characters.
Changes in v7:
- make unsigned int convert to unsigned long.
Changes in v6:
- change request_irq to devm_request_irq and add commit message.
Changes in v5:
- add traverse every bit function.
Changes in v4:
- convert 'pr_err' to 'dev_err'.
Changes in v3:
- update the patch description.
Changes in v2:
- delete the compatible of ls1088a.
drivers/gpio/gpio-mpc8xxx.c | 30 +++---
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 16a47de..58ff372 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#define MPC8XXX_GPIO_PINS 32
@@ -127,20 +128,19 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc,
unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = data;
struct gpio_chip *gc = _gc->gc;
- unsigned int mask;
+ unsigned long mask;
+ int i;
mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
& gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
- if (mask)
- generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
-32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(>irq_data);
+ for_each_set_bit(i, , 32)
+ generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq, 31 - i));
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -409,8 +409,16 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
-mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = devm_request_irq(>dev, mpc8xxx_gc->irqn,
+ mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade",
+ mpc8xxx_gc);
+ if (ret) {
+ dev_err(>dev, "%s: failed to devm_request_irq(%d), ret =
%d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
[PATCH v7] gpio/mpc8xxx: change irq handler from chained to normal
From: Song Hui
More than one gpio controllers can share one interrupt, change the
driver to request shared irq.
While this will work, it will mess up userspace accounting of the number
of interrupts per second in tools such as vmstat. The reason is that
for every GPIO interrupt, /proc/interrupts records the count against GIC
interrupt 68 or 69, as well as the GPIO itself. So, for every GPIO
interrupt, the total number of interrupts that the system has seen
increments by two.
Signed-off-by: Laurentiu Tudor
Signed-off-by: Alex Marginean
Signed-off-by: Song Hui
---
Changes in v7:
- make unsigned int convert to unsigned long.
Changes in v6:
- change request_irq to devm_request_irq and add commit message.
Changes in v5:
- add traverse every bit function.
Changes in v4:
- convert 'pr_err' to 'dev_err'.
Changes in v3:
- update the patch description.
Changes in v2:
- delete the compatible of ls1088a.
drivers/gpio/gpio-mpc8xxx.c | 29 +++--
1 file changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 16a47de..5a0f030 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#define MPC8XXX_GPIO_PINS 32
@@ -127,20 +128,20 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc,
unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = data;
struct gpio_chip *gc = _gc->gc;
- unsigned int mask;
+ unsigned long mask;
+ int i;
mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
& gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
- if (mask)
+ for_each_set_bit(i, , 32)
generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
-32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(>irq_data);
+31 - i));
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -409,8 +410,16 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
-mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = devm_request_irq(>dev, mpc8xxx_gc->irqn,
+ mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade",
+ mpc8xxx_gc);
+ if (ret) {
+ dev_err(>dev, "%s: failed to devm_request_irq(%d), ret =
%d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
[PATCH v6] gpio/mpc8xxx: change irq handler from chained to normal
From: Song Hui
More than one gpio controllers can share one interrupt, change the
driver to request shared irq.
While this will work, it will mess up userspace accounting of the number
of interrupts per second in tools such as vmstat. The reason is that
for every GPIO interrupt, /proc/interrupts records the count against GIC
interrupt 68 or 69, as well as the GPIO itself. So, for every GPIO
interrupt, the total number of interrupts that the system has seen
increments by two
Signed-off-by: Laurentiu Tudor
Signed-off-by: Alex Marginean
Signed-off-by: Song Hui
---
Changes in v6:
- change request_irq to devm_request_irq and add commit message.
Changes in v5:
- add traverse every bit function.
Changes in v4:
- convert 'pr_err' to 'dev_err'.
Changes in v3:
- update the patch description.
Changes in v2:
- delete the compatible of ls1088a.
drivers/gpio/gpio-mpc8xxx.c | 31 ---
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 16a47de..f0be284 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#define MPC8XXX_GPIO_PINS 32
@@ -127,20 +128,20 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc,
unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = data;
struct gpio_chip *gc = _gc->gc;
unsigned int mask;
+ int i;
mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
& gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
- if (mask)
+ for_each_set_bit(i, , 32)
generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
-32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(>irq_data);
+31 - i));
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -388,8 +389,8 @@ static int mpc8xxx_probe(struct platform_device *pdev)
ret = gpiochip_add_data(gc, mpc8xxx_gc);
if (ret) {
- pr_err("%pOF: GPIO chip registration failed with status %d\n",
- np, ret);
+ dev_err(>dev, "%pOF: GPIO chip registration failed with
status %d\n",
+ np, ret);
goto err;
}
@@ -409,8 +410,16 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
-mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = devm_request_irq(>dev, mpc8xxx_gc->irqn,
+ mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade",
+ mpc8xxx_gc);
+ if (ret) {
+ dev_err(>dev, "%s: failed to devm_request_irq(%d), ret =
%d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
[PATCH v6] gpio/mpc8xxx: change irq handler from chained to normal
From: Song Hui
More than one gpio controllers can share one interrupt, change the
driver to request shared irq.
While this will work, it will mess up userspace accounting of the number
of interrupts per second in tools such as vmstat. The reason is that
for every GPIO interrupt, /proc/interrupts records the count against GIC
interrupt 68 or 69, as well as the GPIO itself. So, for every GPIO
interrupt, the total number of interrupts that the system has seen
increments by two
Signed-off-by: Laurentiu Tudor
Signed-off-by: Alex Marginean
Signed-off-by: Song Hui
---
Changes in v6:
- change request_irq to devm_request_irq and add commit message
Changes in v5:
- add traverse every bit function.
Changes in v4:
- convert 'pr_err' to 'dev_err'.
Changes in v3:
- update the patch description.
Changes in v2:
- delete the compatible of ls1088a.
drivers/gpio/gpio-mpc8xxx.c | 31 ---
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 16a47de..f0be284 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#define MPC8XXX_GPIO_PINS 32
@@ -127,20 +128,20 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc,
unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = data;
struct gpio_chip *gc = _gc->gc;
unsigned int mask;
+ int i;
mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
& gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
- if (mask)
+ for_each_set_bit(i, , 32)
generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
-32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(>irq_data);
+31 - i));
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -388,8 +389,8 @@ static int mpc8xxx_probe(struct platform_device *pdev)
ret = gpiochip_add_data(gc, mpc8xxx_gc);
if (ret) {
- pr_err("%pOF: GPIO chip registration failed with status %d\n",
- np, ret);
+ dev_err(>dev, "%pOF: GPIO chip registration failed with
status %d\n",
+ np, ret);
goto err;
}
@@ -409,8 +410,16 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
-mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = devm_request_irq(>dev, mpc8xxx_gc->irqn,
+ mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade",
+ mpc8xxx_gc);
+ if (ret) {
+ dev_err(>dev, "%s: failed to devm_request_irq(%d), ret =
%d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
[PATCH v5] gpio/mpc8xxx: change irq handler from chained to normal
From: Song Hui
More than one gpio controllers can share one interrupt, change the
driver to request shared irq.
Signed-off-by: Laurentiu Tudor
Signed-off-by: Alex Marginean
Signed-off-by: Song Hui
---
Changes in v5:
- add traverse every bit function.
Changes in v4:
- convert 'pr_err' to 'dev_err'.
Changes in v3:
- update the patch description.
Changes in v2:
- delete the compatible of ls1088a.
drivers/gpio/gpio-mpc8xxx.c | 30 +++---
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 16a47de..3a06ca9 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#define MPC8XXX_GPIO_PINS 32
@@ -127,20 +128,20 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc,
unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = (struct mpc8xxx_gpio_chip *)data;
struct gpio_chip *gc = _gc->gc;
unsigned int mask;
+ int i;
mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
& gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
- if (mask)
+ for_each_set_bit(i, , 32)
generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
-32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(>irq_data);
+31 - i));
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -388,8 +389,8 @@ static int mpc8xxx_probe(struct platform_device *pdev)
ret = gpiochip_add_data(gc, mpc8xxx_gc);
if (ret) {
- pr_err("%pOF: GPIO chip registration failed with status %d\n",
- np, ret);
+ dev_err(>dev, "%pOF: GPIO chip registration failed with
status %d\n",
+ np, ret);
goto err;
}
@@ -409,8 +410,15 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
-mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = request_irq(mpc8xxx_gc->irqn, mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade",
+ mpc8xxx_gc);
+ if (ret) {
+ dev_err(>dev, "%s: failed to request_irq(%d), ret = %d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
[PATCH] gpio/mpc8xxx: change irq handler from chained to normal
From: Song Hui
More than one gpio controllers can share one interrupt, change the
driver to request shared irq.
Signed-off-by: Laurentiu Tudor
Signed-off-by: Alex Marginean
Signed-off-by: Song Hui
---
Changes in v4:
- convert 'pr_err' to 'dev_err'.
Changes in v3:
- update the patch description.
Changes in v2:
- delete the compatible of ls1088a.
drivers/gpio/gpio-mpc8xxx.c | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 16a47de..e16591b 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#define MPC8XXX_GPIO_PINS 32
@@ -127,10 +128,9 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc,
unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = (struct mpc8xxx_gpio_chip *)data;
struct gpio_chip *gc = _gc->gc;
unsigned int mask;
@@ -139,8 +139,8 @@ static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
if (mask)
generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(>irq_data);
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -388,7 +388,7 @@ static int mpc8xxx_probe(struct platform_device *pdev)
ret = gpiochip_add_data(gc, mpc8xxx_gc);
if (ret) {
- pr_err("%pOF: GPIO chip registration failed with status %d\n",
+ dev_err("%pOF: GPIO chip registration failed with status %d\n",
np, ret);
goto err;
}
@@ -409,8 +409,14 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
-mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = request_irq(mpc8xxx_gc->irqn, mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade", mpc8xxx_gc);
+ if (ret) {
+ dev_err("%s: failed to request_irq(%d), ret = %d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
[PATCH] gpio/mpc8xxx: change irq handler from chained to normal
From: Song Hui
More than one gpio controllers can share one interrupt, change the
driver to request shared irq.
Signed-off-by: Laurentiu Tudor
Signed-off-by: Alex Marginean
Signed-off-by: Song Hui
---
Changes in v4:
- convert 'pr_err' to 'dev_err'.
Changes in v3:
- update the patch description.
Changes in v2:
- delete the compatible of ls1088a.
drivers/gpio/gpio-mpc8xxx.c | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 16a47de..e16591b 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#define MPC8XXX_GPIO_PINS 32
@@ -127,10 +128,9 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc,
unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = (struct mpc8xxx_gpio_chip *)data;
struct gpio_chip *gc = _gc->gc;
unsigned int mask;
@@ -139,8 +139,8 @@ static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
if (mask)
generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(>irq_data);
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -388,7 +388,7 @@ static int mpc8xxx_probe(struct platform_device *pdev)
ret = gpiochip_add_data(gc, mpc8xxx_gc);
if (ret) {
- pr_err("%pOF: GPIO chip registration failed with status %d\n",
+ dev_err("%pOF: GPIO chip registration failed with status %d\n",
np, ret);
goto err;
}
@@ -409,8 +409,14 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
-mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = request_irq(mpc8xxx_gc->irqn, mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade", mpc8xxx_gc);
+ if (ret) {
+ dev_err("%s: failed to request_irq(%d), ret = %d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
[PATCH v3] gpio/mpc8xxx: change irq handler from chained to normal
From: Song Hui
More than one gpio controllers can share one interrupt, change the
driver to request shared irq.
Signed-off-by: Laurentiu Tudor
Signed-off-by: Alex Marginean
Signed-off-by: Song Hui
---
Changes in v3:
- update the patch description.
Changes in v2:
- delete the compatible of ls1088a.
drivers/gpio/gpio-mpc8xxx.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 16a47de..4006250 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#define MPC8XXX_GPIO_PINS 32
@@ -127,10 +128,9 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc,
unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = (struct mpc8xxx_gpio_chip *)data;
struct gpio_chip *gc = _gc->gc;
unsigned int mask;
@@ -139,8 +139,8 @@ static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
if (mask)
generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(>irq_data);
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -409,8 +409,14 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
-mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = request_irq(mpc8xxx_gc->irqn, mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade", mpc8xxx_gc);
+ if (ret) {
+ pr_err("%s: failed to request_irq(%d), ret = %d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
[PATCH] gpio/mpc8xxx: change irq handler from chained to normal
From: Song Hui
more one gpio controller use share one interrupt,
make request interrupt to be shared.
Signed-off-by: Laurentiu Tudor
Signed-off-by: Alex Marginean
Signed-off-by: Song Hui
---
drivers/gpio/gpio-mpc8xxx.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 16a47de..4006250 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#define MPC8XXX_GPIO_PINS 32
@@ -127,10 +128,9 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc,
unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = (struct mpc8xxx_gpio_chip *)data;
struct gpio_chip *gc = _gc->gc;
unsigned int mask;
@@ -139,8 +139,8 @@ static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
if (mask)
generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(>irq_data);
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -409,8 +409,14 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
-mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = request_irq(mpc8xxx_gc->irqn, mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade", mpc8xxx_gc);
+ if (ret) {
+ pr_err("%s: failed to request_irq(%d), ret = %d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
[PATCH] gpio/mpc8xxx: change irq handler from chained to normal
From: Song Hui
more one gpio controller use share one interrupt,
make request interrupt to be shared.
Signed-off-by: Laurentiu Tudor
Signed-off-by: Alex Marginean
Signed-off-by: Song Hui
---
drivers/gpio/gpio-mpc8xxx.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 1a680aa..4006250 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#define MPC8XXX_GPIO_PINS 32
@@ -127,10 +128,9 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc,
unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = (struct mpc8xxx_gpio_chip *)data;
struct gpio_chip *gc = _gc->gc;
unsigned int mask;
@@ -139,8 +139,8 @@ static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
if (mask)
generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(>irq_data);
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -319,6 +319,7 @@ static const struct of_device_id mpc8xxx_gpio_ids[] = {
{ .compatible = "fsl,mpc5125-gpio", .data = _gpio_devtype, },
{ .compatible = "fsl,pq3-gpio", },
{ .compatible = "fsl,ls1028a-gpio", .data = _gpio_devtype, },
+ { .compatible = "fsl,ls1088a-gpio", .data = _gpio_devtype, },
{ .compatible = "fsl,qoriq-gpio", },
{}
};
@@ -408,8 +409,14 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
-mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = request_irq(mpc8xxx_gc->irqn, mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade", mpc8xxx_gc);
+ if (ret) {
+ pr_err("%s: failed to request_irq(%d), ret = %d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
[PATCH v4] arm64: dts: ls1088a: fix gpio node
From: Song Hui
add ls1088a gpio specify compatible.
Signed-off-by: Song Hui
---
Changes in v4:
- update the patch description.
Changes in v3:
- delete the attribute of little-endian.
Changes in v2:
- update the subject.
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index dfbead4..ff669c8 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -269,7 +269,7 @@
};
gpio0: gpio@230 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x230 0x0 0x1>;
interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
little-endian;
@@ -280,7 +280,7 @@
};
gpio1: gpio@231 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x231 0x0 0x1>;
interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
little-endian;
@@ -291,7 +291,7 @@
};
gpio2: gpio@232 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x232 0x0 0x1>;
interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
little-endian;
@@ -302,7 +302,7 @@
};
gpio3: gpio@233 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x233 0x0 0x1>;
interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
little-endian;
--
2.9.5
[PATCH v3] arm64: dts: ls1088a: fix gpio node
From: Song Hui
Update the nodes to include little-endian
property to be consistent with the hardware
and add ls1088a gpio specify compatible.
Signed-off-by: Song Hui
---
Changes in v3:
- delete the attribute of little-endian.
Changes in v2:
- update the subject.
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index dfbead4..ff669c8 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -269,7 +269,7 @@
};
gpio0: gpio@230 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x230 0x0 0x1>;
interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
little-endian;
@@ -280,7 +280,7 @@
};
gpio1: gpio@231 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x231 0x0 0x1>;
interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
little-endian;
@@ -291,7 +291,7 @@
};
gpio2: gpio@232 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x232 0x0 0x1>;
interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
little-endian;
@@ -302,7 +302,7 @@
};
gpio3: gpio@233 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x233 0x0 0x1>;
interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
little-endian;
--
2.9.5
[PATCH v2] arm64: dts: ls1088a: fix gpio node
From: Song Hui
Update the nodes to include little-endian
property to be consistent with the hardware
and add ls1088a gpio specify compatible.
Signed-off-by: Song Hui
---
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 20f5ebd..d58d203 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -269,43 +269,47 @@
};
gpio0: gpio@230 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x230 0x0 0x1>;
interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio1: gpio@231 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x231 0x0 0x1>;
interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio2: gpio@232 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x232 0x0 0x1>;
interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio3: gpio@233 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x233 0x0 0x1>;
interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
ifc: ifc@224 {
--
2.9.5
[PATCH v1 2/3] arm64: dts: fix gpio node
From: Song Hui
Update the nodes to include little-endian
property to be consistent with the hardware
and add ls1088a gpio specify compatible.
Signed-off-by: Song Hui
---
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 20f5ebd..d58d203 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -269,43 +269,47 @@
};
gpio0: gpio@230 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x230 0x0 0x1>;
interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio1: gpio@231 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x231 0x0 0x1>;
interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio2: gpio@232 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x232 0x0 0x1>;
interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio3: gpio@233 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x233 0x0 0x1>;
interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
ifc: ifc@224 {
--
2.9.5
[PATCH v1 3/3] gpio: mpc8xxx: add ls1088a platform special function
From: Song Hui
ls1028a and ls1088a platform share common special function.
The gpio hardware what they use is the same version.
Signed-off-by: Song Hui
---
drivers/gpio/gpio-mpc8xxx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 1a680aa..16a47de 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -319,6 +319,7 @@ static const struct of_device_id mpc8xxx_gpio_ids[] = {
{ .compatible = "fsl,mpc5125-gpio", .data = _gpio_devtype, },
{ .compatible = "fsl,pq3-gpio", },
{ .compatible = "fsl,ls1028a-gpio", .data = _gpio_devtype, },
+ { .compatible = "fsl,ls1088a-gpio", .data = _gpio_devtype, },
{ .compatible = "fsl,qoriq-gpio", },
{}
};
--
2.9.5
[PATCH v1 1/3] gpio: mpc8xxx: add ls1088a platform gpio node DT binding description
From: Song Hui
ls1088a and ls1028a platform share common gpio node.
Signed-off-by: Song Hui
---
Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
index baf95d9..cd28e93 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
@@ -4,7 +4,7 @@ Required properties:
- compatible : Should be "fsl,-gpio"
The following s are known to be supported:
mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,
- ls1021a, ls1043a, ls2080a, ls1028a.
+ ls1021a, ls1043a, ls2080a, ls1028a, ls1088a.
- reg : Address and length of the register set for the device
- interrupts : Should be the port interrupt shared by all 32 pins.
- #gpio-cells : Should be two. The first cell is the pin number and
@@ -39,10 +39,10 @@ gpio0: gpio@230 {
};
-Example of gpio-controller node for a ls1028a SoC:
+Example of gpio-controller node for a ls1028a/ls1088a SoC:
gpio1: gpio@230 {
- compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio", "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x230 0x0 0x1>;
interrupts = ;
gpio-controller;
--
2.9.5
[PATCH v3] gpio: mpc8xxx: Add new platforms GPIO DT node description
From: Song Hui
Update the NXP GPIO node dt-binding file for QorIQ and
Layerscape platforms, and add one more example with
ls1028a GPIO node.
Signed-off-by: Song Hui
---
Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
index 69d4616..baf95d9 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
@@ -4,7 +4,7 @@ Required properties:
- compatible : Should be "fsl,-gpio"
The following s are known to be supported:
mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,
- ls1021a, ls1043a, ls2080a.
+ ls1021a, ls1043a, ls2080a, ls1028a.
- reg : Address and length of the register set for the device
- interrupts : Should be the port interrupt shared by all 32 pins.
- #gpio-cells : Should be two. The first cell is the pin number and
@@ -37,3 +37,17 @@ gpio0: gpio@230 {
interrupt-controller;
#interrupt-cells = <2>;
};
+
+
+Example of gpio-controller node for a ls1028a SoC:
+
+gpio1: gpio@230 {
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+ reg = <0x0 0x230 0x0 0x1>;
+ interrupts = ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ little-endian;
+};
--
2.9.5
[PATCH v2] gpio: mpc8xxx: Add new platforms GPIO DT node description
From: Song Hui
Update the NXP GPIO node dt-binding file for QorIQ and
Layerscape platforms, and add one more example with
ls1028a GPIO node.
Signed-off-by: Song Hui
---
Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt | 14 ++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
index 69d4616..2df5fc0 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
@@ -37,3 +37,17 @@ gpio0: gpio@230 {
interrupt-controller;
#interrupt-cells = <2>;
};
+
+
+Example of gpio-controller node for a ls1028a SoC:
+
+gpio1: gpio@230 {
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+ reg = <0x0 0x230 0x0 0x1>;
+ interrupts = ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ little-endian;
+};
--
2.9.5
[PATCH v1] gpio: mpc8xxx: Add new platforms GPIO DT node description
From: Song Hui
Update the NXP GPIO node dt-binding file for QorIQ and
Layerscape platforms, and add one more example with
ls1028a GPIO node.
Signed-off-by: Song Hui
---
Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
index 69d4616..fbe6d75 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
@@ -28,7 +28,7 @@ gpio0: gpio@1100 {
Example of gpio-controller node for a ls2080a SoC:
gpio0: gpio@230 {
- compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,ls2080a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x230 0x0 0x1>;
interrupts = <0 36 0x4>; /* Level high type */
gpio-controller;
--
2.9.5
[PATCH v2] arm64: dts: ls1028a: fix gpio nodes
From: Song Hui
Update the nodes to include little-endian
property to be consistent with the hardware.
Signed-off-by: Song Hui
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index aef5b06..7ccbbfc 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -277,33 +277,36 @@
};
gpio1: gpio@230 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x230 0x0 0x1>;
interrupts = ;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio2: gpio@231 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x231 0x0 0x1>;
interrupts = ;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio3: gpio@232 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x232 0x0 0x1>;
interrupts = ;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
usb0: usb@310 {
--
2.9.5
[PATCH v1] gpio: mpc8xxx: Add new platforms GPIO DT node description
From: Song Hui
Update the NXP GPIO node dt-binding file for QorIQ and
Layerscape platforms, and add one more example with
ls1028a GPIO node.
Signed-off-by: Song Hui
---
Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
index 69d4616..fbe6d75 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
@@ -28,7 +28,7 @@ gpio0: gpio@1100 {
Example of gpio-controller node for a ls2080a SoC:
gpio0: gpio@230 {
- compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,ls2080a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x230 0x0 0x1>;
interrupts = <0 36 0x4>; /* Level high type */
gpio-controller;
--
2.9.5
[PATCH] arm64: dts: ls1028a: fix gpio nodes
From: Song Hui
Update the nodes to include little-endian
property to be consistent with the hardware.
Signed-off-by: Song Hui
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index aef5b06..7ccbbfc 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -277,33 +277,36 @@
};
gpio1: gpio@230 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x230 0x0 0x1>;
interrupts = ;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio2: gpio@231 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x231 0x0 0x1>;
interrupts = ;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio3: gpio@232 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x232 0x0 0x1>;
interrupts = ;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
usb0: usb@310 {
--
2.9.5
[PATCH 2/2] gpio: mpc8xxx: Add ls1028a device specify function.
From: Song Hui
There is a device specify register(named GPIO_IBE)
on ls1028a need to enable in initial stage.
Signed-off-by: Song Hui
---
drivers/gpio/gpio-mpc8xxx.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index c8673a5..1a680aa 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -32,6 +32,7 @@
#define GPIO_IMR 0x10
#define GPIO_ICR 0x14
#define GPIO_ICR2 0x18
+#define GPIO_IBE 0x18
struct mpc8xxx_gpio_chip {
struct gpio_chipgc;
@@ -45,6 +46,27 @@ struct mpc8xxx_gpio_chip {
unsigned int irqn;
};
+/* The GPIO Input Buffer Enable register(GPIO_IBE) is used to
+ * control the input enable of each individual GPIO port.
+ * When an individual GPIO port’s direction is set to
+ * input (GPIO_GPDIR[DRn=0]), the associated input enable must be
+ * set (GPIOxGPIE[IEn]=1) to propagate the port value to the GPIO
+ * Data Register.
+ */
+static int ls1028a_gpio_dir_in_init(struct gpio_chip *gc)
+{
+ unsigned long flags;
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
+
+ spin_lock_irqsave(>bgpio_lock, flags);
+
+ gc->write_reg(mpc8xxx_gc->regs + GPIO_IBE, 0x);
+
+ spin_unlock_irqrestore(>bgpio_lock, flags);
+
+ return 0;
+}
+
/*
* This hardware has a big endian bit assignment such that GPIO line 0 is
* connected to bit 31, line 1 to bit 30 ... line 31 to bit 0.
@@ -261,6 +283,7 @@ static const struct irq_domain_ops mpc8xxx_gpio_irq_ops = {
};
struct mpc8xxx_gpio_devtype {
+ int (*gpio_dir_in_init)(struct gpio_chip *chip);
int (*gpio_dir_out)(struct gpio_chip *, unsigned int, int);
int (*gpio_get)(struct gpio_chip *, unsigned int);
int (*irq_set_type)(struct irq_data *, unsigned int);
@@ -271,6 +294,10 @@ static const struct mpc8xxx_gpio_devtype
mpc512x_gpio_devtype = {
.irq_set_type = mpc512x_irq_set_type,
};
+static const struct mpc8xxx_gpio_devtype ls1028a_gpio_devtype = {
+ .gpio_dir_in_init = ls1028a_gpio_dir_in_init,
+};
+
static const struct mpc8xxx_gpio_devtype mpc5125_gpio_devtype = {
.gpio_dir_out = mpc5125_gpio_dir_out,
.irq_set_type = mpc512x_irq_set_type,
@@ -291,6 +318,7 @@ static const struct of_device_id mpc8xxx_gpio_ids[] = {
{ .compatible = "fsl,mpc5121-gpio", .data = _gpio_devtype, },
{ .compatible = "fsl,mpc5125-gpio", .data = _gpio_devtype, },
{ .compatible = "fsl,pq3-gpio", },
+ { .compatible = "fsl,ls1028a-gpio", .data = _gpio_devtype, },
{ .compatible = "fsl,qoriq-gpio", },
{}
};
@@ -376,6 +404,9 @@ static int mpc8xxx_probe(struct platform_device *pdev)
/* ack and mask all irqs */
gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0x);
gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0);
+ /* enable input buffer */
+ if (devtype->gpio_dir_in_init)
+ devtype->gpio_dir_in_init(gc);
irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
--
2.9.5
[PATCH 1/2] arm64: dts: ls1028a: Fix GPIO work fail.
From: Song Hui
Add ls1028a device specify compatible.
Make gpio as little-endian deal.
Signed-off-by: Song Hui
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 7975519..488602b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -277,33 +277,36 @@
};
gpio1: gpio@230 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x230 0x0 0x1>;
interrupts = ;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio2: gpio@231 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x231 0x0 0x1>;
interrupts = ;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio3: gpio@232 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x232 0x0 0x1>;
interrupts = ;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
usb0: usb@310 {
--
2.9.5
