Re: [PATCH] phy: samsung: Fix build break in USB2 PHY driver for Exynos5420 SoCs

[Jaehoon Chung]

On 12/2/20 2:09 AM, Marek Szyprowski wrote:
> Exynos5420 variant of USB2 PHY is handled by the same code as the
> Exynos5250 one. Introducing a separate Kconfig symbol for it was an
> over-engineering, which turned out to cause build break for certain
> configurations:
> 
> ERROR: modpost: "exynos5420_usb2_phy_config" 
> [drivers/phy/samsung/phy-exynos-usb2.ko] undefined!
> 
> Fix this by removing PHY_EXYNOS5420_USB2 symbol and using
> PHY_EXYNOS5250_USB2 also for Exynos5420 SoCs.
> 
> Reported-by: Markus Reichl 
> Fixes: 81b534f7e9b2 ("phy: samsung: Add support for the Exynos5420 variant of 
> the USB2 PHY")
> Signed-off-by: Marek Szyprowski 

Reviewed-by: Jaehoon Chung 

Best Regards,
Jaehoon Chung

> ---
> Vinod: this a fix to the patch merged yesterday. If you want me to resend
> a fixed initial patch, let me know.
> ---
>  drivers/phy/samsung/Kconfig| 7 +--
>  drivers/phy/samsung/phy-samsung-usb2.c | 2 --
>  2 files changed, 1 insertion(+), 8 deletions(-)
> 
> diff --git a/drivers/phy/samsung/Kconfig b/drivers/phy/samsung/Kconfig
> index 0f51d3bf38cc..e20d2fcc9fe7 100644
> --- a/drivers/phy/samsung/Kconfig
> +++ b/drivers/phy/samsung/Kconfig
> @@ -64,12 +64,7 @@ config PHY_EXYNOS4X12_USB2
>  config PHY_EXYNOS5250_USB2
>   bool
>   depends on PHY_SAMSUNG_USB2
> - default SOC_EXYNOS5250
> -
> -config PHY_EXYNOS5420_USB2
> - bool
> - depends on PHY_SAMSUNG_USB2
> - default SOC_EXYNOS5420
> + default SOC_EXYNOS5250 || SOC_EXYNOS5420
>  
>  config PHY_S5PV210_USB2
>   bool "Support for S5PV210"
> diff --git a/drivers/phy/samsung/phy-samsung-usb2.c 
> b/drivers/phy/samsung/phy-samsung-usb2.c
> index 3908153f2ce5..ec2befabeea6 100644
> --- a/drivers/phy/samsung/phy-samsung-usb2.c
> +++ b/drivers/phy/samsung/phy-samsung-usb2.c
> @@ -127,8 +127,6 @@ static const struct of_device_id 
> samsung_usb2_phy_of_match[] = {
>   .compatible = "samsung,exynos5250-usb2-phy",
>   .data = _usb2_phy_config,
>   },
> -#endif
> -#ifdef CONFIG_PHY_EXYNOS5420_USB2
>   {
>   .compatible = "samsung,exynos5420-usb2-phy",
>   .data = _usb2_phy_config,
> 

Re: [PATCH] arm64: dts: exynos: Use fixed index for the MMC devices

[Jaehoon Chung]

On 11/5/20 8:48 PM, Marek Szyprowski wrote:
> Recently introduced asynchronous probe on the MMC devices can shuffle
> block IDs in the system. Pin them to values equal to the physical MMC bus
> number to ease booting in environments where UUIDs are not practical.
> 
> Use newly introduced aliases for mmcblk devices from commit fa2d0aa96941
> ("mmc: core: Allow setting slot index via device tree alias").
> 
> Suggested-by: Markus Reichl 
> Signed-off-by: Marek Szyprowski 


Reviewed-by: Jaehoon Chung 

Best Regards,
Jaehoon Chung

> ---
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 6 ++
>  arch/arm64/boot/dts/exynos/exynos7.dtsi| 3 +++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
> b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index 0a886bb6c806..3a37ad97fcdb 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -23,6 +23,12 @@
>  
>   interrupt-parent = <>;
>  
> + aliases {
> + mmc0 = _0;
> + mmc1 = _1;
> + mmc2 = _2;
> + };
> +
>   arm_a53_pmu {
>   compatible = "arm,cortex-a53-pmu";
>   interrupts = ,
> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi 
> b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> index 48cd3a04fd07..3e319ec64997 100644
> --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> @@ -16,6 +16,9 @@
>   #size-cells = <2>;
>  
>   aliases {
> + mmc0 = _0;
> + mmc1 = _1;
> + mmc2 = _2;
>   pinctrl0 = _alive;
>   pinctrl1 = _bus0;
>   pinctrl2 = _nfc;
> 

Re: [PATCH] ARM: dts: exynos: Use fixed index for the MMC devices

[Jaehoon Chung]

On 11/5/20 8:48 PM, Marek Szyprowski wrote:
> Recently introduced asynchronous probe on the MMC devices can shuffle
> block IDs in the system. Pin them to values equal to the physical MMC bus
> number to ease booting in environments where UUIDs are not practical.
> 
> Use newly introduced aliases for mmcblk devices from commit fa2d0aa96941
> ("mmc: core: Allow setting slot index via device tree alias").
> 
> Suggested-by: Markus Reichl 
> Signed-off-by: Marek Szyprowski 

Reviewed-by: Jaehoon Chung 

Best Regards,
Jaehoon Chung

> ---
>  arch/arm/boot/dts/exynos3250.dtsi | 3 +++
>  arch/arm/boot/dts/exynos4.dtsi| 2 ++
>  arch/arm/boot/dts/exynos4210.dtsi | 1 +
>  arch/arm/boot/dts/exynos4412.dtsi | 1 +
>  arch/arm/boot/dts/exynos5250.dtsi | 4 
>  arch/arm/boot/dts/exynos5260.dtsi | 3 +++
>  arch/arm/boot/dts/exynos5410.dtsi | 3 +++
>  arch/arm/boot/dts/exynos5420.dtsi | 3 +++
>  8 files changed, 20 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi 
> b/arch/arm/boot/dts/exynos3250.dtsi
> index 75ed82600ec8..510080bb4102 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -28,6 +28,9 @@
>   aliases {
>   pinctrl0 = _0;
>   pinctrl1 = _1;
> + mmc0 = _0;
> + mmc1 = _1;
> + mmc2 = _2;
>   mshc0 = _0;
>   mshc1 = _1;
>   mshc2 = _2;
> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
> index a1e54449f33f..e266f890eea4 100644
> --- a/arch/arm/boot/dts/exynos4.dtsi
> +++ b/arch/arm/boot/dts/exynos4.dtsi
> @@ -45,6 +45,8 @@
>   fimc1 = _1;
>   fimc2 = _2;
>   fimc3 = _3;
> + mmc1 = _1;
> + mmc2 = _2;
>   serial0 = _0;
>   serial1 = _1;
>   serial2 = _2;
> diff --git a/arch/arm/boot/dts/exynos4210.dtsi 
> b/arch/arm/boot/dts/exynos4210.dtsi
> index fddc661ded28..f1d0d5959b7f 100644
> --- a/arch/arm/boot/dts/exynos4210.dtsi
> +++ b/arch/arm/boot/dts/exynos4210.dtsi
> @@ -23,6 +23,7 @@
>   compatible = "samsung,exynos4210", "samsung,exynos4";
>  
>   aliases {
> + mmc0 = _0;
>   pinctrl0 = _0;
>   pinctrl1 = _1;
>   pinctrl2 = _2;
> diff --git a/arch/arm/boot/dts/exynos4412.dtsi 
> b/arch/arm/boot/dts/exynos4412.dtsi
> index fa8e8d6bc4d5..9fcf7383eb9d 100644
> --- a/arch/arm/boot/dts/exynos4412.dtsi
> +++ b/arch/arm/boot/dts/exynos4412.dtsi
> @@ -28,6 +28,7 @@
>   pinctrl3 = _3;
>   fimc-lite0 = _lite_0;
>   fimc-lite1 = _lite_1;
> + mmc0 = _0;
>   mshc0 = _0;
>   };
>  
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
> b/arch/arm/boot/dts/exynos5250.dtsi
> index 84677332a5a2..0a0436f92fac 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -30,6 +30,10 @@
>   gsc1 = _1;
>   gsc2 = _2;
>   gsc3 = _3;
> + mmc0 = _0;
> + mmc1 = _1;
> + mmc2 = _2;
> + mmc3 = _3;
>   mshc0 = _0;
>   mshc1 = _1;
>   mshc2 = _2;
> diff --git a/arch/arm/boot/dts/exynos5260.dtsi 
> b/arch/arm/boot/dts/exynos5260.dtsi
> index 973448c4ad93..64bf1d8dc33b 100644
> --- a/arch/arm/boot/dts/exynos5260.dtsi
> +++ b/arch/arm/boot/dts/exynos5260.dtsi
> @@ -21,6 +21,9 @@
>   i2c1 = _1;
>   i2c2 = _2;
>   i2c3 = _3;
> + mmc0 = _0;
> + mmc1 = _1;
> + mmc2 = _2;
>   pinctrl0 = _0;
>   pinctrl1 = _1;
>   pinctrl2 = _2;
> diff --git a/arch/arm/boot/dts/exynos5410.dtsi 
> b/arch/arm/boot/dts/exynos5410.dtsi
> index 584ce62361b1..503859153769 100644
> --- a/arch/arm/boot/dts/exynos5410.dtsi
> +++ b/arch/arm/boot/dts/exynos5410.dtsi
> @@ -24,6 +24,9 @@
>   pinctrl1 = _1;
>   pinctrl2 = _2;
>   pinctrl3 = _3;
> + mmc0 = _0;
> + mmc1 = _1;
> + mmc2 = _2;
>   };
>  
>   cpus {
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
> b/arch/arm/boot/dts/exynos5420.dtsi
> index 23a8fd5c8a6e..3a3eadd890fb 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -19,6 +19,9 @@
>   compatible = "samsung,exynos5420", "samsung,exynos5";
>  
>   aliases {
> + mmc0 = _0;
> + mmc1 = _1;
> + mmc2 = _2;
>   mshc0 = _0;
>   mshc1 = _1;
>   mshc2 = _2;
> 

Re: [PATCH] mmc: dw_mmc: replace spin_lock_irqsave by spin_lock in hard IRQ

[Jaehoon Chung]

Dear Tian,

On 11/6/20 10:56 AM, Tian Tao wrote:
> The code has been in a irq-disabled context since it is hard IRQ. There
> is no necessity to do it 
Even though I don't remember, there is a reason to use spin_lock_irqsave()..
I will check it. If there is no reason, i will reply.

Best Regards,
Jaehoon Chung

> 
> Signed-off-by: Tian Tao 
> ---
>  drivers/mmc/host/dw_mmc.c | 17 -
>  1 file changed, 8 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 43c5795..a524443 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -2617,7 +2617,6 @@ static irqreturn_t dw_mci_interrupt(int irq, void 
> *dev_id)
>   struct dw_mci *host = dev_id;
>   u32 pending;
>   struct dw_mci_slot *slot = host->slot;
> - unsigned long irqflags;
>  
>   pending = mci_readl(host, MINTSTS); /* read-only mask reg */
>  
> @@ -2632,15 +2631,15 @@ static irqreturn_t dw_mci_interrupt(int irq, void 
> *dev_id)
>* Hold the lock; we know cmd11_timer can't be kicked
>* off after the lock is released, so safe to delete.
>*/
> - spin_lock_irqsave(>irq_lock, irqflags);
> + spin_lock(>irq_lock);
>   dw_mci_cmd_interrupt(host, pending);
> - spin_unlock_irqrestore(>irq_lock, irqflags);
> + spin_unlock(>irq_lock);
>  
>   del_timer(>cmd11_timer);
>   }
>  
>   if (pending & DW_MCI_CMD_ERROR_FLAGS) {
> - spin_lock_irqsave(>irq_lock, irqflags);
> + spin_lock(>irq_lock);
>  
>   del_timer(>cto_timer);
>   mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS);
> @@ -2648,7 +2647,7 @@ static irqreturn_t dw_mci_interrupt(int irq, void 
> *dev_id)
>   smp_wmb(); /* drain writebuffer */
>   set_bit(EVENT_CMD_COMPLETE, >pending_events);
>  
> - spin_unlock_irqrestore(>irq_lock, irqflags);
> + spin_unlock(>irq_lock);
>   }
>  
>   if (pending & DW_MCI_DATA_ERROR_FLAGS) {
> @@ -2661,7 +2660,7 @@ static irqreturn_t dw_mci_interrupt(int irq, void 
> *dev_id)
>   }
>  
>   if (pending & SDMMC_INT_DATA_OVER) {
> - spin_lock_irqsave(>irq_lock, irqflags);
> + spin_lock(>irq_lock);
>  
>   del_timer(>dto_timer);
>  
> @@ -2676,7 +2675,7 @@ static irqreturn_t dw_mci_interrupt(int irq, void 
> *dev_id)
>   set_bit(EVENT_DATA_COMPLETE, >pending_events);
>   tasklet_schedule(>tasklet);
>  
> - spin_unlock_irqrestore(>irq_lock, irqflags);
> + spin_unlock(>irq_lock);
>   }
>  
>   if (pending & SDMMC_INT_RXDR) {
> @@ -2692,12 +2691,12 @@ static irqreturn_t dw_mci_interrupt(int irq, void 
> *dev_id)
>   }
>  
>   if (pending & SDMMC_INT_CMD_DONE) {
> - spin_lock_irqsave(>irq_lock, irqflags);
> + spin_lock(>irq_lock);
>  
>   mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE);
>   dw_mci_cmd_interrupt(host, pending);
>  
> - spin_unlock_irqrestore(>irq_lock, irqflags);
> + spin_unlock(>irq_lock);
>   }
>  
>   if (pending & SDMMC_INT_CD) {
> 

Re: [PATCH v2 5/6] pci: dwc: pci-exynos: rework the driver to support Exynos5433 variant

[Jaehoon Chung]

Dear Jingoo,

On 10/24/20 12:12 PM, Jingoo Han wrote:
> On 10/23/20, 3:58 AM, Marek Szyprowski wrote:
>>
>> From: Jaehoon Chung 
>>
>> Exynos5440 SoC support has been dropped since commit 8c83315da1cf ("ARM:
>> dts: exynos: Remove Exynos5440"). Rework this driver to support DWC PCIe
>> variant found in the Exynos5433 SoCs.
>>
>> The main difference in Exynos5433 variant is lack of the MSI support
>> (the MSI interrupt is not even routed to the CPU).
>>
>> Signed-off-by: Jaehoon Chung 
>> [mszyprow: reworked the driver to support only Exynos5433 variant,
>> simplified code, rebased onto current kernel code, added
>> regulator support, converted to the regular platform driver,
>> removed MSI related code, rewrote commit message]
>> Signed-off-by: Marek Szyprowski 
>> Acked-by: Krzysztof Kozlowski 
>> ---
>>  drivers/pci/controller/dwc/Kconfig  |   3 +-
>>  drivers/pci/controller/dwc/pci-exynos.c | 358 ++--
>>  drivers/pci/quirks.c|   1 +
>>  3 files changed, 145 insertions(+), 217 deletions(-)
> 
> []
> 
>> diff --git a/drivers/pci/controller/dwc/pci-exynos.c 
>> b/drivers/pci/controller/dwc/pci-exynos.c
>> index 242683cde04a..58056fbdc2fa 100644
>> --- a/drivers/pci/controller/dwc/pci-exynos.c
>> +++ b/drivers/pci/controller/dwc/pci-exynos.c
>> @@ -2,26 +2,23 @@
>>  /*
>>   * PCIe host controller driver for Samsung Exynos SoCs
>>   *
>> - * Copyright (C) 2013 Samsung Electronics Co., Ltd.
>> + * Copyright (C) 2013-2020 Samsung Electronics Co., Ltd.
>>   *  https://www.samsung.com
>>   *
>>   * Author: Jingoo Han 
>> + * Jaehoon Chung 
> 
> Would you explain the reason why you add him as an author?
> If reasonable, I will accept it. Also, I want gentle discussion, not 
> aggressive one.
> Thank you.

It's not important to add me as author. :)
If you don't want to accept it, i think it can be removed it.
I think that pci-exynos was supported on only exynos5440.
As you know, exynos5440 was not common as compared with other exynos SoC.
After this patch, pci-exynos is re-newed.

Best Regards,
Jaehoon Chung

> 
> Best regards,
> Jingoo Han
> 
>>   */
> 
> []
> 

Re: [PATCH 04/15] mmc: host: sdhci-s3c: Provide documentation for missing struct properties

[Jaehoon Chung]

On 7/1/20 9:46 PM, Lee Jones wrote:
> Describe properties; ext_cd_irq, clk_rates and no_divider (x2).
> 
> Squashes the following W=1 kernel build warnings:
> 
>  drivers/mmc/host/sdhci-s3c.c:126: warning: Function parameter or member 
> 'ext_cd_irq' not described in 'sdhci_s3c'
>  drivers/mmc/host/sdhci-s3c.c:126: warning: Function parameter or member 
> 'clk_rates' not described in 'sdhci_s3c'
>  drivers/mmc/host/sdhci-s3c.c:126: warning: Function parameter or member 
> 'no_divider' not described in 'sdhci_s3c'
>  drivers/mmc/host/sdhci-s3c.c:139: warning: Function parameter or member 
> 'no_divider' not described in 'sdhci_s3c_drv_data'
> 
> Cc: Adrian Hunter 
> Cc: Ben Dooks 
> Cc: Jaehoon Chung 
> Signed-off-by: Lee Jones 

Reviewed-by: Jaehoon Chung 

> ---
>  drivers/mmc/host/sdhci-s3c.c | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
> index 64200c78e90dc..9194bb73e601b 100644
> --- a/drivers/mmc/host/sdhci-s3c.c
> +++ b/drivers/mmc/host/sdhci-s3c.c
> @@ -107,8 +107,11 @@
>   * @ioarea: The resource created when we claimed the IO area.
>   * @pdata: The platform data for this controller.
>   * @cur_clk: The index of the current bus clock.
> + * @ext_cd_irq: External card detect interrupt.
>   * @clk_io: The clock for the internal bus interface.
> + * @clk_rates: Clock frequencies.
>   * @clk_bus: The clocks that are available for the SD/MMC bus clock.
> + * @no_divider: No or non-standard internal clock divider.
>   */
>  struct sdhci_s3c {
>   struct sdhci_host   *host;
> @@ -128,6 +131,7 @@ struct sdhci_s3c {
>  /**
>   * struct sdhci_s3c_driver_data - S3C SDHCI platform specific driver data
>   * @sdhci_quirks: sdhci host specific quirks.
> + * @no_divider: no or non-standard internal clock divider.
>   *
>   * Specifies platform specific configuration of sdhci controller.
>   * Note: A structure for driver specific platform data is used for future
> 

Re: [PATCH 08/15] mmc: host: dw_mmc-exynos: Add kerneldoc descriptions of for 'dev' args

[Jaehoon Chung]

On 7/1/20 9:46 PM, Lee Jones wrote:
> Provide missing documentation for dw_mci_exynos_suspend_noirq() and
> dw_mci_exynos_resume_noirq() function headers.
> 
> Fixes the following W=1 kernel build warnings:
> 
>  drivers/mmc/host/dw_mmc-exynos.c:184: warning: Function parameter or member 
> 'dev' not described in 'dw_mci_exynos_suspend_noirq'
>  drivers/mmc/host/dw_mmc-exynos.c:200: warning: Function parameter or member 
> 'dev' not described in 'dw_mci_exynos_resume_noirq'
> 
> Cc: Jaehoon Chung 
> Cc: Kukjin Kim 
> Cc: Krzysztof Kozlowski 
> Cc: Thomas Abraham 
> Cc: linux-samsung-...@vger.kernel.org
> Signed-off-by: Lee Jones 

Reviewed-by: Jaehoon Chung 

> ---
>  drivers/mmc/host/dw_mmc-exynos.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mmc/host/dw_mmc-exynos.c 
> b/drivers/mmc/host/dw_mmc-exynos.c
> index 5e3d95b636769..bd59186f59b39 100644
> --- a/drivers/mmc/host/dw_mmc-exynos.c
> +++ b/drivers/mmc/host/dw_mmc-exynos.c
> @@ -176,6 +176,7 @@ static int dw_mci_exynos_runtime_resume(struct device 
> *dev)
>  #ifdef CONFIG_PM_SLEEP
>  /**
>   * dw_mci_exynos_suspend_noirq - Exynos-specific suspend code
> + * @dev: Device to suspend (this device)
>   *
>   * This ensures that device will be in runtime active state in
>   * dw_mci_exynos_resume_noirq after calling pm_runtime_force_resume()
> @@ -188,6 +189,7 @@ static int dw_mci_exynos_suspend_noirq(struct device *dev)
>  
>  /**
>   * dw_mci_exynos_resume_noirq - Exynos-specific resume code
> + * @dev: Device to resume (this device)
>   *
>   * On exynos5420 there is a silicon errata that will sometimes leave the
>   * WAKEUP_INT bit in the CLKSEL register asserted.  This bit is 1 to indicate
> 

Re: [PATCH] usb: dwc2: hcd: call dwc2_is_controller_alive under spinlock

[Jaehoon Chung]

Hi Minas,

On 2/14/19 8:43 PM, Minas Harutyunyan wrote:
> Hi Jaehoon Chung,
> 
> On 2/14/2019 2:04 PM, Jaehoon Chung wrote:
>> This patch is referred to Robert's patch
>> commit cf54772b913b ("usb: dwc2: call dwc2_is_controller_alive() under 
>> spinlock")
>>
>> During running sdb with otg mode, the usb is hung sometime.
>>
>> The one of SDB hang issues should be fixed with this patch.
>> After hang, it doesn't never trigger the usb interrupt.
>>
>> Signed-off-by: Jaehoon Chung 
>> ---
>>   drivers/usb/dwc2/hcd_intr.c | 7 ---
>>   1 file changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
>> index 88b5dcf..8d3b155 100644
>> --- a/drivers/usb/dwc2/hcd_intr.c
>> +++ b/drivers/usb/dwc2/hcd_intr.c
>> @@ -,13 +,13 @@ irqreturn_t dwc2_handle_hcd_intr(struct dwc2_hsotg 
>> *hsotg)
>>  u32 gintsts, dbg_gintsts;
>>  irqreturn_t retval = IRQ_NONE;
>>   
>> +spin_lock(>lock);
>> +
>>  if (!dwc2_is_controller_alive(hsotg)) {
>>  dev_warn(hsotg->dev, "Controller is dead\n");
>> -return retval;
>> +goto out;
>>  }
>>   
>> -spin_lock(>lock);
>> -
>>  /* Check if HOST Mode */
>>  if (dwc2_is_host_mode(hsotg)) {
>>  gintsts = dwc2_read_core_intr(hsotg);
>> @@ -2276,6 +2276,7 @@ irqreturn_t dwc2_handle_hcd_intr(struct dwc2_hsotg 
>> *hsotg)
>>  }
>>  }
>>   
>> +out:
>>  spin_unlock(>lock);
>>   
>>  return retval;
>>
> 
> 1. Checking core alive or not was introduced in our internal reference 
> driver for our setups, because sometime AHB-PCI bridge can hung, not 
> core itself. If it happen then only way to overcome it - reboot core 
> setup and PC.
> 2. Actually this issue was fixed on our setups and currently no need to 
> check access via bridge to core.
> 3. Any case if it still happen on some platforms then first need to 
> check and fix HW

I didn't check with latest kernel. we're using v4.4.172.
This issue is occurred on only ARTIK boards.
- During running test about 10~15 hours, suddenly hang.
- It's impossible to fix HW side.

After applied this patch, passed the test case as 100%. (Before applied, it 
didn't pass the test.)

> 
> On asserted any interrupt for dwc2, handlers call sequence is follow: 
> common->gadget->host handlers. If core alive checked in common handler 
> then checking same stuff in host handler again not needed at all.

Right, it's the duplicated checking according to sequence.

> 
> So, core alive checking in host handler create issue for your test, I 
> suggest to not fix alive checking in host interrupt handler as you 
> suggested and done in common handler, but just remove it.

Will remove it.

Best Regards,
Jaehoon Chung

> 
> Thanks,
> Minas
> 
> 
> 
> 
> 

[PATCH] usb: dwc2: hcd: call dwc2_is_controller_alive under spinlock

[Jaehoon Chung]

This patch is referred to Robert's patch
commit cf54772b913b ("usb: dwc2: call dwc2_is_controller_alive() under 
spinlock")

During running sdb with otg mode, the usb is hung sometime.

The one of SDB hang issues should be fixed with this patch.
After hang, it doesn't never trigger the usb interrupt.

Signed-off-by: Jaehoon Chung 
---
 drivers/usb/dwc2/hcd_intr.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
index 88b5dcf..8d3b155 100644
--- a/drivers/usb/dwc2/hcd_intr.c
+++ b/drivers/usb/dwc2/hcd_intr.c
@@ -,13 +,13 @@ irqreturn_t dwc2_handle_hcd_intr(struct dwc2_hsotg 
*hsotg)
u32 gintsts, dbg_gintsts;
irqreturn_t retval = IRQ_NONE;
 
+   spin_lock(>lock);
+
if (!dwc2_is_controller_alive(hsotg)) {
dev_warn(hsotg->dev, "Controller is dead\n");
-   return retval;
+   goto out;
}
 
-   spin_lock(>lock);
-
/* Check if HOST Mode */
if (dwc2_is_host_mode(hsotg)) {
gintsts = dwc2_read_core_intr(hsotg);
@@ -2276,6 +2276,7 @@ irqreturn_t dwc2_handle_hcd_intr(struct dwc2_hsotg *hsotg)
}
}
 
+out:
spin_unlock(>lock);
 
return retval;
-- 
2.7.4

Re: [PATCH v5 1/3] mmc: dw_mmc-bluefield: Add driver extension

[Jaehoon Chung]

Hi,

On 05/02/2018 03:19 AM, Liming Sun wrote:
> This commit adds extension to the dw_mmc driver for Mellanox BlueField
> SoC. It updates the UHS_REG_EXT register to bring up the eMMC card on
> this SoC.

Could you heck Shawn's comments? And add the minor comment.

> 
> Cc: sta...@kernel.org
> Signed-off-by: Liming Sun 
> Reviewed-by: David Woods 
> ---
>  drivers/mmc/host/Kconfig|  9 +
>  drivers/mmc/host/Makefile   |  1 +
>  drivers/mmc/host/dw_mmc-bluefield.c | 72 
> +
>  3 files changed, 82 insertions(+)
>  create mode 100644 drivers/mmc/host/dw_mmc-bluefield.c
> 
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index 9589f9c..26ac6b5 100644
> --- a/drivers/mmc/host/Kconfig
> +++ b/drivers/mmc/host/Kconfig
> @@ -717,6 +717,15 @@ config MMC_DW_K3
> Synopsys DesignWare Memory Card Interface driver. Select this option
> for platforms based on Hisilicon K3 SoC's.
>  
> +config MMC_DW_BLUEFIELD
> + tristate "BlueField specific extensions for Synopsys DW Memory Card 
> Interface"
> + depends on MMC_DW
> + select MMC_DW_PLTFM
> + help
> +   This selects support for Mellanox BlueField SoC specific extensions to
> +   the Synopsys DesignWare Memory Card Interface driver. Select this
> +   option for platforms based on Mellanox BlueField SoC's.
> +
>  config MMC_DW_PCI
>   tristate "Synopsys Designware MCI support on PCI bus"
>   depends on MMC_DW && PCI
> diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
> index 6aead24..267b3f1 100644
> --- a/drivers/mmc/host/Makefile
> +++ b/drivers/mmc/host/Makefile
> @@ -55,6 +55,7 @@ obj-$(CONFIG_MMC_DW_K3) += dw_mmc-k3.o
>  obj-$(CONFIG_MMC_DW_PCI) += dw_mmc-pci.o
>  obj-$(CONFIG_MMC_DW_ROCKCHIP)+= dw_mmc-rockchip.o
>  obj-$(CONFIG_MMC_DW_ZX)  += dw_mmc-zx.o
> +obj-$(CONFIG_MMC_DW_BLUEFIELD)   += dw_mmc-bluefield.o
>  obj-$(CONFIG_MMC_SH_MMCIF)   += sh_mmcif.o
>  obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o
>  obj-$(CONFIG_MMC_VUB300) += vub300.o
> diff --git a/drivers/mmc/host/dw_mmc-bluefield.c 
> b/drivers/mmc/host/dw_mmc-bluefield.c
> new file mode 100644
> index 000..12067b1
> --- /dev/null
> +++ b/drivers/mmc/host/dw_mmc-bluefield.c
> @@ -0,0 +1,72 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2018 Mellanox Technologies.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "dw_mmc.h"
> +#include "dw_mmc-pltfm.h"
> +
> +static void dw_mci_bluefield_set_ios(struct dw_mci *host, struct mmc_ios 
> *ios)
> +{
> + u32 regs;
> +
> + /* Set drive=4 (bit 29:23) and sample=2 (bit 22:16) in UHS_REG_EXT. */
> + regs = mci_readl(host, UHS_REG_EXT);
> + regs = (regs & ~0x3F10 & ~0x7F) | (4 << 23) | (2 << 16);

I want to use the macro. Not (4 << 23)..

> + mci_writel(host, UHS_REG_EXT, regs);
> +}
> +
> +static const struct dw_mci_drv_data bluefield_drv_data = {
> + .set_ios= dw_mci_bluefield_set_ios
> +};
> +
> +static const struct of_device_id dw_mci_bluefield_match[] = {
> + { .compatible = "mellanox,bluefield-dw-mshc",
> + .data = _drv_data },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, dw_mci_bluefield_match);
> +
> +static int dw_mci_bluefield_probe(struct platform_device *pdev)
> +{
> + const struct dw_mci_drv_data *drv_data = NULL;
> + const struct of_device_id *match;
> +
> + if (pdev->dev.of_node) {
> + match = of_match_node(dw_mci_bluefield_match,
> +   pdev->dev.of_node);
> + drv_data = match->data;
> + }
> +
> + return dw_mci_pltfm_register(pdev, drv_data);
> +}
> +
> +static struct platform_driver dw_mci_bluefield_pltfm_driver = {
> + .probe  = dw_mci_bluefield_probe,
> + .remove = dw_mci_pltfm_remove,
> + .driver = {
> + .name   = "dwmmc_bluefield",
> + .of_match_table = dw_mci_bluefield_match,
> + .pm = _mci_pltfm_pmops,
> + },
> +};
> +
> +module_platform_driver(dw_mci_bluefield_pltfm_driver);
> +
> +MODULE_DESCRIPTION("BlueField DW Multimedia Card driver");
> +MODULE_AUTHOR("Mellanox Technologies");
> +MODULE_LICENSE("GPL v2");
> 

Re: [PATCH v5 1/3] mmc: dw_mmc-bluefield: Add driver extension

[Jaehoon Chung]

Hi,

On 05/02/2018 03:19 AM, Liming Sun wrote:
> This commit adds extension to the dw_mmc driver for Mellanox BlueField
> SoC. It updates the UHS_REG_EXT register to bring up the eMMC card on
> this SoC.

Could you heck Shawn's comments? And add the minor comment.

> 
> Cc: sta...@kernel.org
> Signed-off-by: Liming Sun 
> Reviewed-by: David Woods 
> ---
>  drivers/mmc/host/Kconfig|  9 +
>  drivers/mmc/host/Makefile   |  1 +
>  drivers/mmc/host/dw_mmc-bluefield.c | 72 
> +
>  3 files changed, 82 insertions(+)
>  create mode 100644 drivers/mmc/host/dw_mmc-bluefield.c
> 
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index 9589f9c..26ac6b5 100644
> --- a/drivers/mmc/host/Kconfig
> +++ b/drivers/mmc/host/Kconfig
> @@ -717,6 +717,15 @@ config MMC_DW_K3
> Synopsys DesignWare Memory Card Interface driver. Select this option
> for platforms based on Hisilicon K3 SoC's.
>  
> +config MMC_DW_BLUEFIELD
> + tristate "BlueField specific extensions for Synopsys DW Memory Card 
> Interface"
> + depends on MMC_DW
> + select MMC_DW_PLTFM
> + help
> +   This selects support for Mellanox BlueField SoC specific extensions to
> +   the Synopsys DesignWare Memory Card Interface driver. Select this
> +   option for platforms based on Mellanox BlueField SoC's.
> +
>  config MMC_DW_PCI
>   tristate "Synopsys Designware MCI support on PCI bus"
>   depends on MMC_DW && PCI
> diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
> index 6aead24..267b3f1 100644
> --- a/drivers/mmc/host/Makefile
> +++ b/drivers/mmc/host/Makefile
> @@ -55,6 +55,7 @@ obj-$(CONFIG_MMC_DW_K3) += dw_mmc-k3.o
>  obj-$(CONFIG_MMC_DW_PCI) += dw_mmc-pci.o
>  obj-$(CONFIG_MMC_DW_ROCKCHIP)+= dw_mmc-rockchip.o
>  obj-$(CONFIG_MMC_DW_ZX)  += dw_mmc-zx.o
> +obj-$(CONFIG_MMC_DW_BLUEFIELD)   += dw_mmc-bluefield.o
>  obj-$(CONFIG_MMC_SH_MMCIF)   += sh_mmcif.o
>  obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o
>  obj-$(CONFIG_MMC_VUB300) += vub300.o
> diff --git a/drivers/mmc/host/dw_mmc-bluefield.c 
> b/drivers/mmc/host/dw_mmc-bluefield.c
> new file mode 100644
> index 000..12067b1
> --- /dev/null
> +++ b/drivers/mmc/host/dw_mmc-bluefield.c
> @@ -0,0 +1,72 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2018 Mellanox Technologies.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "dw_mmc.h"
> +#include "dw_mmc-pltfm.h"
> +
> +static void dw_mci_bluefield_set_ios(struct dw_mci *host, struct mmc_ios 
> *ios)
> +{
> + u32 regs;
> +
> + /* Set drive=4 (bit 29:23) and sample=2 (bit 22:16) in UHS_REG_EXT. */
> + regs = mci_readl(host, UHS_REG_EXT);
> + regs = (regs & ~0x3F10 & ~0x7F) | (4 << 23) | (2 << 16);

I want to use the macro. Not (4 << 23)..

> + mci_writel(host, UHS_REG_EXT, regs);
> +}
> +
> +static const struct dw_mci_drv_data bluefield_drv_data = {
> + .set_ios= dw_mci_bluefield_set_ios
> +};
> +
> +static const struct of_device_id dw_mci_bluefield_match[] = {
> + { .compatible = "mellanox,bluefield-dw-mshc",
> + .data = _drv_data },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, dw_mci_bluefield_match);
> +
> +static int dw_mci_bluefield_probe(struct platform_device *pdev)
> +{
> + const struct dw_mci_drv_data *drv_data = NULL;
> + const struct of_device_id *match;
> +
> + if (pdev->dev.of_node) {
> + match = of_match_node(dw_mci_bluefield_match,
> +   pdev->dev.of_node);
> + drv_data = match->data;
> + }
> +
> + return dw_mci_pltfm_register(pdev, drv_data);
> +}
> +
> +static struct platform_driver dw_mci_bluefield_pltfm_driver = {
> + .probe  = dw_mci_bluefield_probe,
> + .remove = dw_mci_pltfm_remove,
> + .driver = {
> + .name   = "dwmmc_bluefield",
> + .of_match_table = dw_mci_bluefield_match,
> + .pm = _mci_pltfm_pmops,
> + },
> +};
> +
> +module_platform_driver(dw_mci_bluefield_pltfm_driver);
> +
> +MODULE_DESCRIPTION("BlueField DW Multimedia Card driver");
> +MODULE_AUTHOR("Mellanox Technologies");
> +MODULE_LICENSE("GPL v2");
> 

Re: [RFC 0/2] dw_mmc: add multislot support

[Jaehoon Chung]

Hi,

On 04/17/2018 09:11 PM, Eugeniy Paltsev wrote:
> This series consists of two patches:
> 1. revert removal of previously existed "pseudo-multislot" support.
>  * Revert "mmc: dw_mmc: remove the deprecated "num-slots""
>  * Revert "mmc: dw_mmc: fix the wrong condition check of getting num-slots 
> from DT"
>  * Revert "mmc: dw_mmc: remove the unnecessary slot variable"
>  * Revert "mmc: dw_mmc: update kernel-doc comments for dw_mci"
>  * Revert "mmc: dw_mmc: use the 'slot' instead of 'cur_slot'"
>  * Revert "mmc: dw_mmc: remove the 'id' arguments about functions relevant to 
> slot"
>  * Revert "mmc: dw_mmc: change the array of slots"
>  * Revert "mmc: dw_mmc: remove the loop about finding slots"
>  * Revert "mmc: dw_mmc: deprecated the "num-slots" property"
> 
> 2. Add missing stuff to support multislot mode in DesignWare MMC driver.
>  * Add missing slot switch to __dw_mci_start_request() function.
>  * Refactor set_ios function:
>a) Calculate common clock which is
>   suitable for all slots instead of directly use clock value
>   provided by mmc core. We calculate common clock as the minimum
>   among each used slot clocks. This clock is calculated in
>   dw_mci_calc_common_clock() function which is called
>   from set_ios()
>b) Disable clock only if no other slots are ON.
>c) Setup clock directly in set_ios() only if no other slots
>   are ON. Otherwise adjust clock in __dw_mci_start_request()
>   function before slot switch.
>d) Move timings and bus_width setup to separate funcions.
>  * Use timing field in each slot structure instead of common field in
>host structure.
>  * Add locks to serialize access to registers.

Sorry for late. :(
Well, I will read the other comments..and reply soon. 

Best Regards,
Jaehoon Chung

> 
> NOTE: this patch is based off of v4.17-rc1
> 
> NOTE: as of today I tested this changes (in singleslot and multislot
>modes) only on Synopsys HSDK board. But I will get ODROID-XU4 board
>(with Exynos5422 which has DW MMC controller) the next week
>so I will test it on this board too to catch any regressions.
> 
> Eugeniy Paltsev (2):
>   dw_mmc: revert removal multislot support
>   dw_mmc: add multislot support
> 
>  .../devicetree/bindings/mmc/synopsys-dw-mshc.txt   |   5 +
>  drivers/mmc/host/dw_mmc-exynos.c   |   4 +-
>  drivers/mmc/host/dw_mmc-pci.c  |   1 +
>  drivers/mmc/host/dw_mmc.c  | 486 
> +++--
>  drivers/mmc/host/dw_mmc.h  |  35 +-
>  5 files changed, 387 insertions(+), 144 deletions(-)
> 

Re: [RFC 0/2] dw_mmc: add multislot support

[Jaehoon Chung]

Hi,

On 04/17/2018 09:11 PM, Eugeniy Paltsev wrote:
> This series consists of two patches:
> 1. revert removal of previously existed "pseudo-multislot" support.
>  * Revert "mmc: dw_mmc: remove the deprecated "num-slots""
>  * Revert "mmc: dw_mmc: fix the wrong condition check of getting num-slots 
> from DT"
>  * Revert "mmc: dw_mmc: remove the unnecessary slot variable"
>  * Revert "mmc: dw_mmc: update kernel-doc comments for dw_mci"
>  * Revert "mmc: dw_mmc: use the 'slot' instead of 'cur_slot'"
>  * Revert "mmc: dw_mmc: remove the 'id' arguments about functions relevant to 
> slot"
>  * Revert "mmc: dw_mmc: change the array of slots"
>  * Revert "mmc: dw_mmc: remove the loop about finding slots"
>  * Revert "mmc: dw_mmc: deprecated the "num-slots" property"
> 
> 2. Add missing stuff to support multislot mode in DesignWare MMC driver.
>  * Add missing slot switch to __dw_mci_start_request() function.
>  * Refactor set_ios function:
>a) Calculate common clock which is
>   suitable for all slots instead of directly use clock value
>   provided by mmc core. We calculate common clock as the minimum
>   among each used slot clocks. This clock is calculated in
>   dw_mci_calc_common_clock() function which is called
>   from set_ios()
>b) Disable clock only if no other slots are ON.
>c) Setup clock directly in set_ios() only if no other slots
>   are ON. Otherwise adjust clock in __dw_mci_start_request()
>   function before slot switch.
>d) Move timings and bus_width setup to separate funcions.
>  * Use timing field in each slot structure instead of common field in
>host structure.
>  * Add locks to serialize access to registers.

Sorry for late. :(
Well, I will read the other comments..and reply soon. 

Best Regards,
Jaehoon Chung

> 
> NOTE: this patch is based off of v4.17-rc1
> 
> NOTE: as of today I tested this changes (in singleslot and multislot
>modes) only on Synopsys HSDK board. But I will get ODROID-XU4 board
>(with Exynos5422 which has DW MMC controller) the next week
>so I will test it on this board too to catch any regressions.
> 
> Eugeniy Paltsev (2):
>   dw_mmc: revert removal multislot support
>   dw_mmc: add multislot support
> 
>  .../devicetree/bindings/mmc/synopsys-dw-mshc.txt   |   5 +
>  drivers/mmc/host/dw_mmc-exynos.c   |   4 +-
>  drivers/mmc/host/dw_mmc-pci.c  |   1 +
>  drivers/mmc/host/dw_mmc.c  | 486 
> +++--
>  drivers/mmc/host/dw_mmc.h  |  35 +-
>  5 files changed, 387 insertions(+), 144 deletions(-)
> 

Re: [PATCH 1/6] mmc: dw_mmc: remove the deprecated "clock-freq-min-max" property

[Jaehoon Chung]

On 03/15/2018 07:22 PM, Ulf Hansson wrote:
> On 23 February 2018 at 07:41, Jaehoon Chung <jh80.ch...@samsung.com> wrote:
>> 'clock-freq-min-max' property had already deprecated.
>> Remove the 'clock-freq-min-max' property that is kept to maintain
>> the compatibility.
>>
>> Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
> 
> Thanks, applied for next!

Sorry. Thanks for applying this. :)

Best Regards,
Jaehoon Chung

> 
> Kind regards
> Uffe
> 
>> ---
>>  .../devicetree/bindings/mmc/synopsys-dw-mshc.txt  |  4 
>>  drivers/mmc/host/dw_mmc.c | 15 
>> ---
>>  2 files changed, 4 insertions(+), 15 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt 
>> b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
>> index ef3e5f14067a..75c9fdca4aaf 100644
>> --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
>> +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
>> @@ -59,10 +59,6 @@ Optional properties:
>>is specified and the ciu clock is specified then we'll try to set the ciu
>>clock to this at probe time.
>>
>> -* clock-freq-min-max (DEPRECATED): Minimum and Maximum clock frequency for 
>> card output
>> -  clock(cclk_out). If it's not specified, max is 200MHZ and min is 400KHz 
>> by default.
>> - (Use the "max-frequency" instead of "clock-freq-min-max".)
>> -
>>  * num-slots (DEPRECATED): specifies the number of slots supported by the 
>> controller.
>>The number of physical slots actually used could be equal or less than the
>>value specified by num-slots. If this property is not specified, the value
>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>> index 0aa39975f33b..38e0e7c4ffd9 100644
>> --- a/drivers/mmc/host/dw_mmc.c
>> +++ b/drivers/mmc/host/dw_mmc.c
>> @@ -2784,7 +2784,6 @@ static int dw_mci_init_slot(struct dw_mci *host)
>> struct dw_mci_slot *slot;
>> const struct dw_mci_drv_data *drv_data = host->drv_data;
>> int ctrl_id, ret;
>> -   u32 freq[2];
>>
>> mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev);
>> if (!mmc)
>> @@ -2798,16 +2797,6 @@ static int dw_mci_init_slot(struct dw_mci *host)
>> host->slot = slot;
>>
>> mmc->ops = _mci_ops;
>> -   if (device_property_read_u32_array(host->dev, "clock-freq-min-max",
>> -  freq, 2)) {
>> -   mmc->f_min = DW_MCI_FREQ_MIN;
>> -   mmc->f_max = DW_MCI_FREQ_MAX;
>> -   } else {
>> -   dev_info(host->dev,
>> -   "'clock-freq-min-max' property was deprecated.\n");
>> -   mmc->f_min = freq[0];
>> -   mmc->f_max = freq[1];
>> -   }
>>
>> /*if there are external regulators, get them*/
>> ret = mmc_regulator_get_supply(mmc);
>> @@ -2846,6 +2835,10 @@ static int dw_mci_init_slot(struct dw_mci *host)
>> if (ret)
>> goto err_host_allocated;
>>
>> +   mmc->f_min = DW_MCI_FREQ_MIN;
>> +   if (!mmc->f_max)
>> +   mmc->f_max = DW_MCI_FREQ_MAX;
>> +
>> /* Process SDIO IRQs through the sdio_irq_work. */
>> if (mmc->caps & MMC_CAP_SDIO_IRQ)
>> mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
>> --
>> 2.15.1
>>
> 
> 
> 

Re: [PATCH 1/6] mmc: dw_mmc: remove the deprecated "clock-freq-min-max" property

[Jaehoon Chung]

On 03/15/2018 07:22 PM, Ulf Hansson wrote:
> On 23 February 2018 at 07:41, Jaehoon Chung  wrote:
>> 'clock-freq-min-max' property had already deprecated.
>> Remove the 'clock-freq-min-max' property that is kept to maintain
>> the compatibility.
>>
>> Signed-off-by: Jaehoon Chung 
> 
> Thanks, applied for next!

Sorry. Thanks for applying this. :)

Best Regards,
Jaehoon Chung

> 
> Kind regards
> Uffe
> 
>> ---
>>  .../devicetree/bindings/mmc/synopsys-dw-mshc.txt  |  4 
>>  drivers/mmc/host/dw_mmc.c | 15 
>> ---
>>  2 files changed, 4 insertions(+), 15 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt 
>> b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
>> index ef3e5f14067a..75c9fdca4aaf 100644
>> --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
>> +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
>> @@ -59,10 +59,6 @@ Optional properties:
>>is specified and the ciu clock is specified then we'll try to set the ciu
>>clock to this at probe time.
>>
>> -* clock-freq-min-max (DEPRECATED): Minimum and Maximum clock frequency for 
>> card output
>> -  clock(cclk_out). If it's not specified, max is 200MHZ and min is 400KHz 
>> by default.
>> - (Use the "max-frequency" instead of "clock-freq-min-max".)
>> -
>>  * num-slots (DEPRECATED): specifies the number of slots supported by the 
>> controller.
>>The number of physical slots actually used could be equal or less than the
>>value specified by num-slots. If this property is not specified, the value
>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>> index 0aa39975f33b..38e0e7c4ffd9 100644
>> --- a/drivers/mmc/host/dw_mmc.c
>> +++ b/drivers/mmc/host/dw_mmc.c
>> @@ -2784,7 +2784,6 @@ static int dw_mci_init_slot(struct dw_mci *host)
>> struct dw_mci_slot *slot;
>> const struct dw_mci_drv_data *drv_data = host->drv_data;
>> int ctrl_id, ret;
>> -   u32 freq[2];
>>
>> mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev);
>> if (!mmc)
>> @@ -2798,16 +2797,6 @@ static int dw_mci_init_slot(struct dw_mci *host)
>> host->slot = slot;
>>
>> mmc->ops = _mci_ops;
>> -   if (device_property_read_u32_array(host->dev, "clock-freq-min-max",
>> -  freq, 2)) {
>> -   mmc->f_min = DW_MCI_FREQ_MIN;
>> -   mmc->f_max = DW_MCI_FREQ_MAX;
>> -   } else {
>> -   dev_info(host->dev,
>> -   "'clock-freq-min-max' property was deprecated.\n");
>> -   mmc->f_min = freq[0];
>> -   mmc->f_max = freq[1];
>> -   }
>>
>> /*if there are external regulators, get them*/
>> ret = mmc_regulator_get_supply(mmc);
>> @@ -2846,6 +2835,10 @@ static int dw_mci_init_slot(struct dw_mci *host)
>> if (ret)
>> goto err_host_allocated;
>>
>> +   mmc->f_min = DW_MCI_FREQ_MIN;
>> +   if (!mmc->f_max)
>> +   mmc->f_max = DW_MCI_FREQ_MAX;
>> +
>> /* Process SDIO IRQs through the sdio_irq_work. */
>> if (mmc->caps & MMC_CAP_SDIO_IRQ)
>> mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
>> --
>> 2.15.1
>>
> 
> 
> 

Re: [RFC 1/2] pci: dwc: pci-exynos: modify the Kconfig dependency

[Jaehoon Chung]

Dear Lorenzo,

On 03/13/2018 08:12 PM, Lorenzo Pieralisi wrote:
> Hi Jaehoon,
> 
> On Thu, Dec 21, 2017 at 09:14:06PM +0900, Jaehoon Chung wrote:
>> PCI_EXYNOS has the dependency with SOC_EXYNOS5440.
>> It's modified to ARCH_EXYNOS from SOC_EXYNOS5440, because other
>> SoCs needs to use this driver.
>>
>> Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
>> ---
>>  drivers/pci/dwc/Kconfig | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig
>> index 113e09440f85..0ff9795df8e8 100644
>> --- a/drivers/pci/dwc/Kconfig
>> +++ b/drivers/pci/dwc/Kconfig
>> @@ -65,7 +65,7 @@ config PCIE_DW_PLAT
>>  config PCI_EXYNOS
>>  bool "Samsung Exynos PCIe controller"
>>  depends on PCI
>> -depends on SOC_EXYNOS5440
>> +depends on ARCH_EXYNOS
>>  depends on PCI_MSI_IRQ_DOMAIN
>>  select PCIEPORTBUS
>>  select PCIE_DW_HOST
> 
> This patch fell through the cracks, is it still needed ? Please let
> me know and I will apply it if it is, thank you very much.

I will resend the patches for supporting exynos5433(TM2 board) without RFC.
I have already prepared the patches. now i'm doing some more test and cleaning 
code.

Best Regards,
Jaehoon Chung

> 
> Lorenzo
> 
> 
> 

Re: [RFC 1/2] pci: dwc: pci-exynos: modify the Kconfig dependency

[Jaehoon Chung]

Dear Lorenzo,

On 03/13/2018 08:12 PM, Lorenzo Pieralisi wrote:
> Hi Jaehoon,
> 
> On Thu, Dec 21, 2017 at 09:14:06PM +0900, Jaehoon Chung wrote:
>> PCI_EXYNOS has the dependency with SOC_EXYNOS5440.
>> It's modified to ARCH_EXYNOS from SOC_EXYNOS5440, because other
>> SoCs needs to use this driver.
>>
>> Signed-off-by: Jaehoon Chung 
>> ---
>>  drivers/pci/dwc/Kconfig | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig
>> index 113e09440f85..0ff9795df8e8 100644
>> --- a/drivers/pci/dwc/Kconfig
>> +++ b/drivers/pci/dwc/Kconfig
>> @@ -65,7 +65,7 @@ config PCIE_DW_PLAT
>>  config PCI_EXYNOS
>>  bool "Samsung Exynos PCIe controller"
>>  depends on PCI
>> -depends on SOC_EXYNOS5440
>> +depends on ARCH_EXYNOS
>>  depends on PCI_MSI_IRQ_DOMAIN
>>  select PCIEPORTBUS
>>  select PCIE_DW_HOST
> 
> This patch fell through the cracks, is it still needed ? Please let
> me know and I will apply it if it is, thank you very much.

I will resend the patches for supporting exynos5433(TM2 board) without RFC.
I have already prepared the patches. now i'm doing some more test and cleaning 
code.

Best Regards,
Jaehoon Chung

> 
> Lorenzo
> 
> 
> 

Re: [PATCH] arm: ubsan: select ARCH_HAS_UBSAN_SANITIZE_ALL

[Jaehoon Chung]

On 03/13/2018 01:53 PM, Jinbum Park wrote:
> To enable UBSAN on arm, ARCH_HAS_UBSAN_SANITIZE_ALL is needed to be selected.
> 
> Basic test has passed on Raspberry Pi2, Raspbian jessi lite with
> CONFIG_UBSAN_SANITIZE_ALL, CONFIG_UBSAN_NULL.

This patch had been already sent from Seungwoo.

https://patchwork.kernel.org/patch/9344477/

Best Regards,
Jaehoon Chung

> 
> Signed-off-by: Jinbum Park <jinb.p...@samsung.com>
> ---
>  arch/arm/Kconfig  | 1 +
>  arch/arm/boot/compressed/Makefile | 1 +
>  arch/arm/vdso/Makefile| 1 +
>  3 files changed, 3 insertions(+)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 1878083..bdd1561 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -7,6 +7,7 @@ config ARM
>   select ARCH_HAS_DEBUG_VIRTUAL if MMU
>   select ARCH_HAS_DEVMEM_IS_ALLOWED
>   select ARCH_HAS_ELF_RANDOMIZE
> + select ARCH_HAS_UBSAN_SANITIZE_ALL
>   select ARCH_HAS_SET_MEMORY
>   select ARCH_HAS_PHYS_TO_DMA
>   select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
> diff --git a/arch/arm/boot/compressed/Makefile 
> b/arch/arm/boot/compressed/Makefile
> index 45a6b9b..1b374ba 100644
> --- a/arch/arm/boot/compressed/Makefile
> +++ b/arch/arm/boot/compressed/Makefile
> @@ -24,6 +24,7 @@ OBJS+= hyp-stub.o
>  endif
>  
>  GCOV_PROFILE := n
> +UBSAN_SANITIZE   := n
>  
>  #
>  # Architecture dependencies
> diff --git a/arch/arm/vdso/Makefile b/arch/arm/vdso/Makefile
> index bb411821..05597f7 100644
> --- a/arch/arm/vdso/Makefile
> +++ b/arch/arm/vdso/Makefile
> @@ -29,6 +29,7 @@ CFLAGS_vgettimeofday.o = -O2
>  
>  # Disable gcov profiling for VDSO code
>  GCOV_PROFILE := n
> +UBSAN_SANITIZE := n
>  
>  # Force dependency
>  $(obj)/vdso.o : $(obj)/vdso.so
> 

Re: [PATCH] arm: ubsan: select ARCH_HAS_UBSAN_SANITIZE_ALL

[Jaehoon Chung]

On 03/13/2018 01:53 PM, Jinbum Park wrote:
> To enable UBSAN on arm, ARCH_HAS_UBSAN_SANITIZE_ALL is needed to be selected.
> 
> Basic test has passed on Raspberry Pi2, Raspbian jessi lite with
> CONFIG_UBSAN_SANITIZE_ALL, CONFIG_UBSAN_NULL.

This patch had been already sent from Seungwoo.

https://patchwork.kernel.org/patch/9344477/

Best Regards,
Jaehoon Chung

> 
> Signed-off-by: Jinbum Park 
> ---
>  arch/arm/Kconfig  | 1 +
>  arch/arm/boot/compressed/Makefile | 1 +
>  arch/arm/vdso/Makefile| 1 +
>  3 files changed, 3 insertions(+)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 1878083..bdd1561 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -7,6 +7,7 @@ config ARM
>   select ARCH_HAS_DEBUG_VIRTUAL if MMU
>   select ARCH_HAS_DEVMEM_IS_ALLOWED
>   select ARCH_HAS_ELF_RANDOMIZE
> + select ARCH_HAS_UBSAN_SANITIZE_ALL
>   select ARCH_HAS_SET_MEMORY
>   select ARCH_HAS_PHYS_TO_DMA
>   select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
> diff --git a/arch/arm/boot/compressed/Makefile 
> b/arch/arm/boot/compressed/Makefile
> index 45a6b9b..1b374ba 100644
> --- a/arch/arm/boot/compressed/Makefile
> +++ b/arch/arm/boot/compressed/Makefile
> @@ -24,6 +24,7 @@ OBJS+= hyp-stub.o
>  endif
>  
>  GCOV_PROFILE := n
> +UBSAN_SANITIZE   := n
>  
>  #
>  # Architecture dependencies
> diff --git a/arch/arm/vdso/Makefile b/arch/arm/vdso/Makefile
> index bb411821..05597f7 100644
> --- a/arch/arm/vdso/Makefile
> +++ b/arch/arm/vdso/Makefile
> @@ -29,6 +29,7 @@ CFLAGS_vgettimeofday.o = -O2
>  
>  # Disable gcov profiling for VDSO code
>  GCOV_PROFILE := n
> +UBSAN_SANITIZE := n
>  
>  # Force dependency
>  $(obj)/vdso.o : $(obj)/vdso.so
> 

Re: [PATCH] arm: ubsan: select ARCH_HAS_UBSAN_SANITIZE_ALL

[Jaehoon Chung]

On 03/13/2018 01:53 PM, Jinbum Park wrote:
> To enable UBSAN on arm, ARCH_HAS_UBSAN_SANITIZE_ALL is needed to be selected.
> 
> Basic test has passed on Raspberry Pi2, Raspbian jessi lite with
> CONFIG_UBSAN_SANITIZE_ALL, CONFIG_UBSAN_NULL.
> 
> Signed-off-by: Jinbum Park 
> ---
>  arch/arm/Kconfig  | 1 +
>  arch/arm/boot/compressed/Makefile | 1 +
>  arch/arm/vdso/Makefile| 1 +
>  3 files changed, 3 insertions(+)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 1878083..bdd1561 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -7,6 +7,7 @@ config ARM
>   select ARCH_HAS_DEBUG_VIRTUAL if MMU
>   select ARCH_HAS_DEVMEM_IS_ALLOWED
>   select ARCH_HAS_ELF_RANDOMIZE
> + select ARCH_HAS_UBSAN_SANITIZE_ALL
>   select ARCH_HAS_SET_MEMORY
>   select ARCH_HAS_PHYS_TO_DMA
>   select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
> diff --git a/arch/arm/boot/compressed/Makefile 
> b/arch/arm/boot/compressed/Makefile
> index 45a6b9b..1b374ba 100644
> --- a/arch/arm/boot/compressed/Makefile
> +++ b/arch/arm/boot/compressed/Makefile
> @@ -24,6 +24,7 @@ OBJS+= hyp-stub.o
>  endif
>  
>  GCOV_PROFILE := n
> +UBSAN_SANITIZE   := n
>  
>  #
>  # Architecture dependencies
> diff --git a/arch/arm/vdso/Makefile b/arch/arm/vdso/Makefile
> index bb411821..05597f7 100644
> --- a/arch/arm/vdso/Makefile
> +++ b/arch/arm/vdso/Makefile
> @@ -29,6 +29,7 @@ CFLAGS_vgettimeofday.o = -O2
>  
>  # Disable gcov profiling for VDSO code
>  GCOV_PROFILE := n
> +UBSAN_SANITIZE := n
>  
>  # Force dependency
>  $(obj)/vdso.o : $(obj)/vdso.so
> 

Re: [PATCH] arm: ubsan: select ARCH_HAS_UBSAN_SANITIZE_ALL

[Jaehoon Chung]

On 03/13/2018 01:53 PM, Jinbum Park wrote:
> To enable UBSAN on arm, ARCH_HAS_UBSAN_SANITIZE_ALL is needed to be selected.
> 
> Basic test has passed on Raspberry Pi2, Raspbian jessi lite with
> CONFIG_UBSAN_SANITIZE_ALL, CONFIG_UBSAN_NULL.
> 
> Signed-off-by: Jinbum Park 
> ---
>  arch/arm/Kconfig  | 1 +
>  arch/arm/boot/compressed/Makefile | 1 +
>  arch/arm/vdso/Makefile| 1 +
>  3 files changed, 3 insertions(+)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 1878083..bdd1561 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -7,6 +7,7 @@ config ARM
>   select ARCH_HAS_DEBUG_VIRTUAL if MMU
>   select ARCH_HAS_DEVMEM_IS_ALLOWED
>   select ARCH_HAS_ELF_RANDOMIZE
> + select ARCH_HAS_UBSAN_SANITIZE_ALL
>   select ARCH_HAS_SET_MEMORY
>   select ARCH_HAS_PHYS_TO_DMA
>   select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
> diff --git a/arch/arm/boot/compressed/Makefile 
> b/arch/arm/boot/compressed/Makefile
> index 45a6b9b..1b374ba 100644
> --- a/arch/arm/boot/compressed/Makefile
> +++ b/arch/arm/boot/compressed/Makefile
> @@ -24,6 +24,7 @@ OBJS+= hyp-stub.o
>  endif
>  
>  GCOV_PROFILE := n
> +UBSAN_SANITIZE   := n
>  
>  #
>  # Architecture dependencies
> diff --git a/arch/arm/vdso/Makefile b/arch/arm/vdso/Makefile
> index bb411821..05597f7 100644
> --- a/arch/arm/vdso/Makefile
> +++ b/arch/arm/vdso/Makefile
> @@ -29,6 +29,7 @@ CFLAGS_vgettimeofday.o = -O2
>  
>  # Disable gcov profiling for VDSO code
>  GCOV_PROFILE := n
> +UBSAN_SANITIZE := n
>  
>  # Force dependency
>  $(obj)/vdso.o : $(obj)/vdso.so
> 

Re: [PATCH v4] mmc: dw_mmc: Fix the DTO/CTO timeout overflow calculation for 32-bit systems

[Jaehoon Chung]

On 03/01/2018 02:57 PM, Jisheng Zhang wrote:
> On Wed, 28 Feb 2018 14:53:18 +0300 Evgeniy Didin wrote:
> 
>> In commit 9d9491a7da2a ("mmc: dw_mmc: Fix the DTO timeout calculation") and
>> commit 4c2357f57dd5 ("mmc: dw_mmc: Fix the CTO timeout calculation") 
>> have been made changes which cause multiply overflow for 32-bit systems.
>> The broken timeout calculations leads to unexpected ETIMEDOUT errors and 
>> causes stacktrace splat (such as below) during normal data exchange 
>> with SD-card.
>>
>> | Running :  4M-check-reassembly-tcp-cmykw2-rotatew2.out -v0 -w1
>> | -  Info: Finished target initialization.
>> | mmcblk0: error -110 transferring data, sector 320544, nr 2048, cmd response
>> |  0x900, card status 0x0
>>
>> DIV_ROUND_UP_ULL helps to escape usage of __udivdi3() from libgcc and so
>> code gets compiled on all 32-bit platforms as opposed to usage
>> of DIV_ROUND_UP when we may only compile stuff on a very few arches.
>>
>> Lets cast this multiply to u64 type which prevents overflow.
> 
> Reviewed-by: Jisheng Zhang <jisheng.zh...@synaptics.com>

Acked-by: Jaehoon Chung <jh80.ch...@samsung.com>

Best Regards,
Jaehoon Chung

> 
>>
>> Tested-by: Vineet Gupta <vineet.gup...@synopsys.com>
>> Reported-by: Vineet Gupta <vineet.gup...@synopsys.com> # ARC STAR 9001306872 
>> HSDK, sdio: board crashes when copying big files
>> Fixes: 9d9491a7da2a ("mmc: dw_mmc: Fix the DTO timeout calculation")
>> Fixes: 4c2357f57dd5 ("mmc: dw_mmc: Fix the CTO timeout calculation")
>>
>> Signed-off-by: Evgeniy Didin <evgeniy.di...@synopsys.com>
>>
>> CC: Alexey Brodkin <abrod...@synopsys.com>
>> CC: Eugeniy Paltsev <palt...@synopsys.com>
>> CC: Douglas Anderson <diand...@chromium.org>
>> CC: Ulf Hansson <ulf.hans...@linaro.org>
>> CC: Andy Shevchenko <andy.shevche...@gmail.com>
>> CC: Jisheng Zhang <jisheng.zh...@synaptics.com>
>> CC: Shawn Lin <shawn@rock-chips.com>
>> CC: Vineet Gupta <vineet.gup...@synopsys.com>
>> CC: linux-kernel@vger.kernel.org
>> CC: linux-snps-...@lists.infradead.org
>> Cc: <sta...@vger.kernel.org> 
>> ---
>> Changes since v3:
>> -Switch DIV_ROUND_UP macro to DIV_ROUND_UP_ULL
>> -Make one patch from two patches
>> -Modify commit message
>>
>> Changes sinve v2:
>> -add fix for cto_ms
>>
>> Changes since v1:
>> -uint64_t switched to u64
>>
>>  drivers/mmc/host/dw_mmc.c | 9 ++---
>>  1 file changed, 6 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>> index 0aa39975f33b..cba534d4c81b 100644
>> --- a/drivers/mmc/host/dw_mmc.c
>> +++ b/drivers/mmc/host/dw_mmc.c
>> @@ -409,7 +409,9 @@ static inline void dw_mci_set_cto(struct dw_mci *host)
>>  cto_div = (mci_readl(host, CLKDIV) & 0xff) * 2;
>>  if (cto_div == 0)
>>  cto_div = 1;
>> -cto_ms = DIV_ROUND_UP(MSEC_PER_SEC * cto_clks * cto_div, host->bus_hz);
>> +
>> +cto_ms = DIV_ROUND_UP_ULL((u64)MSEC_PER_SEC * cto_clks * cto_div,
>> +  host->bus_hz);
>>  
>>  /* add a bit spare time */
>>  cto_ms += 10;
>> @@ -1944,8 +1946,9 @@ static void dw_mci_set_drto(struct dw_mci *host)
>>  drto_div = (mci_readl(host, CLKDIV) & 0xff) * 2;
>>  if (drto_div == 0)
>>  drto_div = 1;
>> -drto_ms = DIV_ROUND_UP(MSEC_PER_SEC * drto_clks * drto_div,
>> -   host->bus_hz);
>> +
>> +drto_ms = DIV_ROUND_UP_ULL((u64)MSEC_PER_SEC * drto_clks * drto_div,
>> +   host->bus_hz);
>>  
>>  /* add a bit spare time */
>>  drto_ms += 10;
> 
> 
> 
> 

Re: [PATCH v4] mmc: dw_mmc: Fix the DTO/CTO timeout overflow calculation for 32-bit systems

[Jaehoon Chung]

On 03/01/2018 02:57 PM, Jisheng Zhang wrote:
> On Wed, 28 Feb 2018 14:53:18 +0300 Evgeniy Didin wrote:
> 
>> In commit 9d9491a7da2a ("mmc: dw_mmc: Fix the DTO timeout calculation") and
>> commit 4c2357f57dd5 ("mmc: dw_mmc: Fix the CTO timeout calculation") 
>> have been made changes which cause multiply overflow for 32-bit systems.
>> The broken timeout calculations leads to unexpected ETIMEDOUT errors and 
>> causes stacktrace splat (such as below) during normal data exchange 
>> with SD-card.
>>
>> | Running :  4M-check-reassembly-tcp-cmykw2-rotatew2.out -v0 -w1
>> | -  Info: Finished target initialization.
>> | mmcblk0: error -110 transferring data, sector 320544, nr 2048, cmd response
>> |  0x900, card status 0x0
>>
>> DIV_ROUND_UP_ULL helps to escape usage of __udivdi3() from libgcc and so
>> code gets compiled on all 32-bit platforms as opposed to usage
>> of DIV_ROUND_UP when we may only compile stuff on a very few arches.
>>
>> Lets cast this multiply to u64 type which prevents overflow.
> 
> Reviewed-by: Jisheng Zhang 

Acked-by: Jaehoon Chung 

Best Regards,
Jaehoon Chung

> 
>>
>> Tested-by: Vineet Gupta 
>> Reported-by: Vineet Gupta  # ARC STAR 9001306872 
>> HSDK, sdio: board crashes when copying big files
>> Fixes: 9d9491a7da2a ("mmc: dw_mmc: Fix the DTO timeout calculation")
>> Fixes: 4c2357f57dd5 ("mmc: dw_mmc: Fix the CTO timeout calculation")
>>
>> Signed-off-by: Evgeniy Didin 
>>
>> CC: Alexey Brodkin 
>> CC: Eugeniy Paltsev 
>> CC: Douglas Anderson 
>> CC: Ulf Hansson 
>> CC: Andy Shevchenko 
>> CC: Jisheng Zhang 
>> CC: Shawn Lin 
>> CC: Vineet Gupta 
>> CC: linux-kernel@vger.kernel.org
>> CC: linux-snps-...@lists.infradead.org
>> Cc:  
>> ---
>> Changes since v3:
>> -Switch DIV_ROUND_UP macro to DIV_ROUND_UP_ULL
>> -Make one patch from two patches
>> -Modify commit message
>>
>> Changes sinve v2:
>> -add fix for cto_ms
>>
>> Changes since v1:
>> -uint64_t switched to u64
>>
>>  drivers/mmc/host/dw_mmc.c | 9 ++---
>>  1 file changed, 6 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>> index 0aa39975f33b..cba534d4c81b 100644
>> --- a/drivers/mmc/host/dw_mmc.c
>> +++ b/drivers/mmc/host/dw_mmc.c
>> @@ -409,7 +409,9 @@ static inline void dw_mci_set_cto(struct dw_mci *host)
>>  cto_div = (mci_readl(host, CLKDIV) & 0xff) * 2;
>>  if (cto_div == 0)
>>  cto_div = 1;
>> -cto_ms = DIV_ROUND_UP(MSEC_PER_SEC * cto_clks * cto_div, host->bus_hz);
>> +
>> +cto_ms = DIV_ROUND_UP_ULL((u64)MSEC_PER_SEC * cto_clks * cto_div,
>> +  host->bus_hz);
>>  
>>  /* add a bit spare time */
>>  cto_ms += 10;
>> @@ -1944,8 +1946,9 @@ static void dw_mci_set_drto(struct dw_mci *host)
>>  drto_div = (mci_readl(host, CLKDIV) & 0xff) * 2;
>>  if (drto_div == 0)
>>  drto_div = 1;
>> -drto_ms = DIV_ROUND_UP(MSEC_PER_SEC * drto_clks * drto_div,
>> -   host->bus_hz);
>> +
>> +drto_ms = DIV_ROUND_UP_ULL((u64)MSEC_PER_SEC * drto_clks * drto_div,
>> +   host->bus_hz);
>>  
>>  /* add a bit spare time */
>>  drto_ms += 10;
> 
> 
> 
> 

Re: [PATCH] mmc: dw_mmc: update kernel-doc comments for dw_mci

[Jaehoon Chung]

On 02/27/2018 08:36 PM, Jaehoon Chung wrote:
> On 02/27/2018 08:28 PM, Ulf Hansson wrote:
>> On 23 February 2018 at 07:30, Jaehoon Chung <jh80.ch...@samsung.com> wrote:
>>> On 02/23/2018 10:40 AM, Shawn Lin wrote:
>>>> Hi Alexey,
>>>>
>>>> On 2018/2/23 3:45, Alexey Roslyakov wrote:
>>>>> cur_slot and num_slots has been removed from struct dw_mci in 
>>>>> 42f989c002f2.
>>>>> Unfortunately, inline documentation was not updated so far.
>>>>>
>>>>> Fix @lock field documentation in Locking section.
>>>>> Move @mrq field of struct dw_mci_slot mention closer to it
>>>>> description, so no one could miss this slightest detail.
>>>>>
>>>>> Couple of code style fixes as a bonus.
>>>>>
>>>>
>>>> Thanks for updating these.
>>>>
>>>> Reviewed-by: Shawn Lin <shawn@rock-chips.com>
>>>
>>> Thanks! Will apply this with Shawn's Reveiwed-by tag.
>>
>> Dear Jaehoon, I picked this up for next and by adding your ack. Tell
>> me if you have objections!
> 
> Sure! No problem!
> 
> Acekd-by: Jaehoon Chung <jh80.ch...@samsung.com>

Typo..

Acked-by: Jaehoon Chung <jh80.ch...@samsung.com>

> 
> Best Regards,
> Jaehoon Chung
> 
>>
>> [...]
>>
>> Thanks and kind regards
>> Uffe
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
>> the body of a message to majord...@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>>
>>
>>
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 
> 

Re: [PATCH] mmc: dw_mmc: update kernel-doc comments for dw_mci

[Jaehoon Chung]

On 02/27/2018 08:36 PM, Jaehoon Chung wrote:
> On 02/27/2018 08:28 PM, Ulf Hansson wrote:
>> On 23 February 2018 at 07:30, Jaehoon Chung  wrote:
>>> On 02/23/2018 10:40 AM, Shawn Lin wrote:
>>>> Hi Alexey,
>>>>
>>>> On 2018/2/23 3:45, Alexey Roslyakov wrote:
>>>>> cur_slot and num_slots has been removed from struct dw_mci in 
>>>>> 42f989c002f2.
>>>>> Unfortunately, inline documentation was not updated so far.
>>>>>
>>>>> Fix @lock field documentation in Locking section.
>>>>> Move @mrq field of struct dw_mci_slot mention closer to it
>>>>> description, so no one could miss this slightest detail.
>>>>>
>>>>> Couple of code style fixes as a bonus.
>>>>>
>>>>
>>>> Thanks for updating these.
>>>>
>>>> Reviewed-by: Shawn Lin 
>>>
>>> Thanks! Will apply this with Shawn's Reveiwed-by tag.
>>
>> Dear Jaehoon, I picked this up for next and by adding your ack. Tell
>> me if you have objections!
> 
> Sure! No problem!
> 
> Acekd-by: Jaehoon Chung 

Typo..

Acked-by: Jaehoon Chung 

> 
> Best Regards,
> Jaehoon Chung
> 
>>
>> [...]
>>
>> Thanks and kind regards
>> Uffe
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
>> the body of a message to majord...@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>>
>>
>>
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 
> 

Re: [PATCH] mmc: dw_mmc: update kernel-doc comments for dw_mci

[Jaehoon Chung]

On 02/27/2018 08:28 PM, Ulf Hansson wrote:
> On 23 February 2018 at 07:30, Jaehoon Chung <jh80.ch...@samsung.com> wrote:
>> On 02/23/2018 10:40 AM, Shawn Lin wrote:
>>> Hi Alexey,
>>>
>>> On 2018/2/23 3:45, Alexey Roslyakov wrote:
>>>> cur_slot and num_slots has been removed from struct dw_mci in 42f989c002f2.
>>>> Unfortunately, inline documentation was not updated so far.
>>>>
>>>> Fix @lock field documentation in Locking section.
>>>> Move @mrq field of struct dw_mci_slot mention closer to it
>>>> description, so no one could miss this slightest detail.
>>>>
>>>> Couple of code style fixes as a bonus.
>>>>
>>>
>>> Thanks for updating these.
>>>
>>> Reviewed-by: Shawn Lin <shawn@rock-chips.com>
>>
>> Thanks! Will apply this with Shawn's Reveiwed-by tag.
> 
> Dear Jaehoon, I picked this up for next and by adding your ack. Tell
> me if you have objections!

Sure! No problem!

Acekd-by: Jaehoon Chung <jh80.ch...@samsung.com>

Best Regards,
Jaehoon Chung

> 
> [...]
> 
> Thanks and kind regards
> Uffe
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 
> 

Re: [PATCH] mmc: dw_mmc: update kernel-doc comments for dw_mci

[Jaehoon Chung]

On 02/27/2018 08:28 PM, Ulf Hansson wrote:
> On 23 February 2018 at 07:30, Jaehoon Chung  wrote:
>> On 02/23/2018 10:40 AM, Shawn Lin wrote:
>>> Hi Alexey,
>>>
>>> On 2018/2/23 3:45, Alexey Roslyakov wrote:
>>>> cur_slot and num_slots has been removed from struct dw_mci in 42f989c002f2.
>>>> Unfortunately, inline documentation was not updated so far.
>>>>
>>>> Fix @lock field documentation in Locking section.
>>>> Move @mrq field of struct dw_mci_slot mention closer to it
>>>> description, so no one could miss this slightest detail.
>>>>
>>>> Couple of code style fixes as a bonus.
>>>>
>>>
>>> Thanks for updating these.
>>>
>>> Reviewed-by: Shawn Lin 
>>
>> Thanks! Will apply this with Shawn's Reveiwed-by tag.
> 
> Dear Jaehoon, I picked this up for next and by adding your ack. Tell
> me if you have objections!

Sure! No problem!

Acekd-by: Jaehoon Chung 

Best Regards,
Jaehoon Chung

> 
> [...]
> 
> Thanks and kind regards
> Uffe
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 
> 

Re: [PATCH 1/6] mmc: dw_mmc: remove the deprecated "clock-freq-min-max" property

[Jaehoon Chung]

On 02/24/2018 01:16 AM, Andy Shevchenko wrote:
> On Fri, Feb 23, 2018 at 4:19 PM, Shawn Lin <shawn@rock-chips.com> wrote:
>> On 2018/2/23 21:27, Andy Shevchenko wrote:
>>> On Fri, Feb 23, 2018 at 8:41 AM, Jaehoon Chung <jh80.ch...@samsung.com>
>>> wrote:
>>>>
>>>> 'clock-freq-min-max' property had already deprecated.
>>>> Remove the 'clock-freq-min-max' property that is kept to maintain
>>>> the compatibility.
>>>
>>>
>>> Removing a property without telling the user what to expect is a bad
>>> idea and ABI breakage.
>>>
>>
>> What's the general process to remove a property?
>>
>> I guess we should do:
>> 1) deprecate it in the first place and remove it from all upstream DT
>> 2) wait some long enough days for expecting the stale of all old DTB
>> containing that property
>> 3) remove the functionality of the deprecated property from the driver
>> but still leave some warning there
>> 4) remove the left warning finally
> 
> I don't know. Perhaps Rob can shed a light here.
> But I would really OK with removal of some of such properties from
> some drivers where it's more burden to keep them.

This property had deprecated about 8months ago.
I think that it was enough to keep this property for maintaining the 
compatibility.

I didn't remove this property without any alternative.

Best Regards,
Jaehoon Chung

> 
>> And for the ABI breakage, we should add something in Documentation/ABI
>> /obsolete  or Documentation/ABI/removed ?
> 

Re: [PATCH 1/6] mmc: dw_mmc: remove the deprecated "clock-freq-min-max" property

[Jaehoon Chung]

On 02/24/2018 01:16 AM, Andy Shevchenko wrote:
> On Fri, Feb 23, 2018 at 4:19 PM, Shawn Lin  wrote:
>> On 2018/2/23 21:27, Andy Shevchenko wrote:
>>> On Fri, Feb 23, 2018 at 8:41 AM, Jaehoon Chung 
>>> wrote:
>>>>
>>>> 'clock-freq-min-max' property had already deprecated.
>>>> Remove the 'clock-freq-min-max' property that is kept to maintain
>>>> the compatibility.
>>>
>>>
>>> Removing a property without telling the user what to expect is a bad
>>> idea and ABI breakage.
>>>
>>
>> What's the general process to remove a property?
>>
>> I guess we should do:
>> 1) deprecate it in the first place and remove it from all upstream DT
>> 2) wait some long enough days for expecting the stale of all old DTB
>> containing that property
>> 3) remove the functionality of the deprecated property from the driver
>> but still leave some warning there
>> 4) remove the left warning finally
> 
> I don't know. Perhaps Rob can shed a light here.
> But I would really OK with removal of some of such properties from
> some drivers where it's more burden to keep them.

This property had deprecated about 8months ago.
I think that it was enough to keep this property for maintaining the 
compatibility.

I didn't remove this property without any alternative.

Best Regards,
Jaehoon Chung

> 
>> And for the ABI breakage, we should add something in Documentation/ABI
>> /obsolete  or Documentation/ABI/removed ?
> 

[PATCH 4/6] arm64: dts: stratix10: remove 'num-slots' property for dwmmc

[Jaehoon Chung]

Since 'num-slots' had already deprecated, remove the property in
device-tree file.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts 
b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index a37c46112876..4e146b4e6487 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -88,7 +88,6 @@
 
  {
status = "okay";
-   num-slots = <1>;
cap-sd-highspeed;
broken-cd;
bus-width = <4>;
-- 
2.15.1

[PATCH 4/6] arm64: dts: stratix10: remove 'num-slots' property for dwmmc

[Jaehoon Chung]

Since 'num-slots' had already deprecated, remove the property in
device-tree file.

Signed-off-by: Jaehoon Chung 
---
 arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts 
b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index a37c46112876..4e146b4e6487 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -88,7 +88,6 @@
 
  {
status = "okay";
-   num-slots = <1>;
cap-sd-highspeed;
broken-cd;
bus-width = <4>;
-- 
2.15.1

[PATCH 3/6] ARM: dts: socfpga: remove 'num-slots' property for dwmmc

[Jaehoon Chung]

Since 'num-slots' had already deprecated, remove the property in
device-tree file.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts | 1 -
 arch/arm/boot/dts/socfpga_arria5.dtsi | 1 -
 arch/arm/boot/dts/socfpga_cyclone5.dtsi   | 1 -
 arch/arm/boot/dts/socfpga_vt.dts  | 1 -
 4 files changed, 4 deletions(-)

diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts 
b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
index 040a164ba148..5822fd2085db 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
@@ -20,7 +20,6 @@
 
  {
status = "okay";
-   num-slots = <1>;
cap-sd-highspeed;
broken-cd;
bus-width = <4>;
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi 
b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 8c037297296c..e59461f5416e 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -30,7 +30,6 @@
};
 
mmc0: dwmmc0@ff704000 {
-   num-slots = <1>;
broken-cd;
bus-width = <4>;
cap-mmc-highspeed;
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi 
b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index a05e3df23103..68ced67f8bfb 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -31,7 +31,6 @@
};
 
mmc0: dwmmc0@ff704000 {
-   num-slots = <1>;
broken-cd;
bus-width = <4>;
cap-mmc-highspeed;
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index dfe2193cd4d5..547c38632c68 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -42,7 +42,6 @@
};
 
dwmmc0@ff704000 {
-   num-slots = <1>;
broken-cd;
bus-width = <4>;
cap-mmc-highspeed;
-- 
2.15.1

[PATCH 6/6] arm64: dts: hi3660: remove 'num-slots' property for dwmmc

[Jaehoon Chung]

Since 'num-slots' had already deprecated, remove the property in
device-tree file.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index ab0b95ba5ae5..d6638b1f09ca 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -910,7 +910,6 @@
#size-cells = <0>;
cd-inverted;
compatible = "hisilicon,hi3660-dw-mshc";
-   num-slots = <1>;
bus-width = <0x4>;
disable-wp;
cap-sd-highspeed;
@@ -948,7 +947,6 @@
compatible = "hisilicon,hi3660-dw-mshc";
reg = <0x0 0xff3ff000 0x0 0x1000>;
interrupts = ;
-   num-slots = <1>;
clocks = <_ctrl HI3660_CLK_GATE_SDIO0>,
 <_ctrl HI3660_HCLK_GATE_SDIO0>;
clock-names = "ciu", "biu";
-- 
2.15.1

[PATCH 5/6] ARM: dts: lpc18xx: remove 'num-slots' property for dwmmc

[Jaehoon Chung]

Since 'num-slots' had already deprecated, remove the property in
device-tree file.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 arch/arm/boot/dts/lpc18xx.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi
index 7cae9c5e27db..10b8249b8ab6 100644
--- a/arch/arm/boot/dts/lpc18xx.dtsi
+++ b/arch/arm/boot/dts/lpc18xx.dtsi
@@ -115,7 +115,6 @@
compatible = "snps,dw-mshc";
reg = <0x40004000 0x1000>;
interrupts = <6>;
-   num-slots = <1>;
clocks = < CLK_SDIO>, < CLK_CPU_SDIO>;
clock-names = "ciu", "biu";
resets = < 20>;
-- 
2.15.1

[PATCH 6/6] arm64: dts: hi3660: remove 'num-slots' property for dwmmc

[Jaehoon Chung]

Since 'num-slots' had already deprecated, remove the property in
device-tree file.

Signed-off-by: Jaehoon Chung 
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index ab0b95ba5ae5..d6638b1f09ca 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -910,7 +910,6 @@
#size-cells = <0>;
cd-inverted;
compatible = "hisilicon,hi3660-dw-mshc";
-   num-slots = <1>;
bus-width = <0x4>;
disable-wp;
cap-sd-highspeed;
@@ -948,7 +947,6 @@
compatible = "hisilicon,hi3660-dw-mshc";
reg = <0x0 0xff3ff000 0x0 0x1000>;
interrupts = ;
-   num-slots = <1>;
clocks = <_ctrl HI3660_CLK_GATE_SDIO0>,
 <_ctrl HI3660_HCLK_GATE_SDIO0>;
clock-names = "ciu", "biu";
-- 
2.15.1

[PATCH 5/6] ARM: dts: lpc18xx: remove 'num-slots' property for dwmmc

[Jaehoon Chung]

Since 'num-slots' had already deprecated, remove the property in
device-tree file.

Signed-off-by: Jaehoon Chung 
---
 arch/arm/boot/dts/lpc18xx.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi
index 7cae9c5e27db..10b8249b8ab6 100644
--- a/arch/arm/boot/dts/lpc18xx.dtsi
+++ b/arch/arm/boot/dts/lpc18xx.dtsi
@@ -115,7 +115,6 @@
compatible = "snps,dw-mshc";
reg = <0x40004000 0x1000>;
interrupts = <6>;
-   num-slots = <1>;
clocks = < CLK_SDIO>, < CLK_CPU_SDIO>;
clock-names = "ciu", "biu";
resets = < 20>;
-- 
2.15.1

[PATCH 3/6] ARM: dts: socfpga: remove 'num-slots' property for dwmmc

[Jaehoon Chung]

Since 'num-slots' had already deprecated, remove the property in
device-tree file.

Signed-off-by: Jaehoon Chung 
---
 arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts | 1 -
 arch/arm/boot/dts/socfpga_arria5.dtsi | 1 -
 arch/arm/boot/dts/socfpga_cyclone5.dtsi   | 1 -
 arch/arm/boot/dts/socfpga_vt.dts  | 1 -
 4 files changed, 4 deletions(-)

diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts 
b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
index 040a164ba148..5822fd2085db 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
@@ -20,7 +20,6 @@
 
  {
status = "okay";
-   num-slots = <1>;
cap-sd-highspeed;
broken-cd;
bus-width = <4>;
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi 
b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 8c037297296c..e59461f5416e 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -30,7 +30,6 @@
};
 
mmc0: dwmmc0@ff704000 {
-   num-slots = <1>;
broken-cd;
bus-width = <4>;
cap-mmc-highspeed;
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi 
b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index a05e3df23103..68ced67f8bfb 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -31,7 +31,6 @@
};
 
mmc0: dwmmc0@ff704000 {
-   num-slots = <1>;
broken-cd;
bus-width = <4>;
cap-mmc-highspeed;
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index dfe2193cd4d5..547c38632c68 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -42,7 +42,6 @@
};
 
dwmmc0@ff704000 {
-   num-slots = <1>;
broken-cd;
bus-width = <4>;
cap-mmc-highspeed;
-- 
2.15.1

[PATCH 1/6] mmc: dw_mmc: remove the deprecated "clock-freq-min-max" property

[Jaehoon Chung]

'clock-freq-min-max' property had already deprecated.
Remove the 'clock-freq-min-max' property that is kept to maintain
the compatibility.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 .../devicetree/bindings/mmc/synopsys-dw-mshc.txt  |  4 
 drivers/mmc/host/dw_mmc.c | 15 ---
 2 files changed, 4 insertions(+), 15 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index ef3e5f14067a..75c9fdca4aaf 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -59,10 +59,6 @@ Optional properties:
   is specified and the ciu clock is specified then we'll try to set the ciu
   clock to this at probe time.
 
-* clock-freq-min-max (DEPRECATED): Minimum and Maximum clock frequency for 
card output
-  clock(cclk_out). If it's not specified, max is 200MHZ and min is 400KHz by 
default.
- (Use the "max-frequency" instead of "clock-freq-min-max".)
-
 * num-slots (DEPRECATED): specifies the number of slots supported by the 
controller.
   The number of physical slots actually used could be equal or less than the
   value specified by num-slots. If this property is not specified, the value
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 0aa39975f33b..38e0e7c4ffd9 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -2784,7 +2784,6 @@ static int dw_mci_init_slot(struct dw_mci *host)
struct dw_mci_slot *slot;
const struct dw_mci_drv_data *drv_data = host->drv_data;
int ctrl_id, ret;
-   u32 freq[2];
 
mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev);
if (!mmc)
@@ -2798,16 +2797,6 @@ static int dw_mci_init_slot(struct dw_mci *host)
host->slot = slot;
 
mmc->ops = _mci_ops;
-   if (device_property_read_u32_array(host->dev, "clock-freq-min-max",
-  freq, 2)) {
-   mmc->f_min = DW_MCI_FREQ_MIN;
-   mmc->f_max = DW_MCI_FREQ_MAX;
-   } else {
-   dev_info(host->dev,
-   "'clock-freq-min-max' property was deprecated.\n");
-   mmc->f_min = freq[0];
-   mmc->f_max = freq[1];
-   }
 
/*if there are external regulators, get them*/
ret = mmc_regulator_get_supply(mmc);
@@ -2846,6 +2835,10 @@ static int dw_mci_init_slot(struct dw_mci *host)
if (ret)
goto err_host_allocated;
 
+   mmc->f_min = DW_MCI_FREQ_MIN;
+   if (!mmc->f_max)
+   mmc->f_max = DW_MCI_FREQ_MAX;
+
/* Process SDIO IRQs through the sdio_irq_work. */
if (mmc->caps & MMC_CAP_SDIO_IRQ)
mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
-- 
2.15.1

[PATCH 1/6] mmc: dw_mmc: remove the deprecated "clock-freq-min-max" property

[Jaehoon Chung]

'clock-freq-min-max' property had already deprecated.
Remove the 'clock-freq-min-max' property that is kept to maintain
the compatibility.

Signed-off-by: Jaehoon Chung 
---
 .../devicetree/bindings/mmc/synopsys-dw-mshc.txt  |  4 
 drivers/mmc/host/dw_mmc.c | 15 ---
 2 files changed, 4 insertions(+), 15 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index ef3e5f14067a..75c9fdca4aaf 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -59,10 +59,6 @@ Optional properties:
   is specified and the ciu clock is specified then we'll try to set the ciu
   clock to this at probe time.
 
-* clock-freq-min-max (DEPRECATED): Minimum and Maximum clock frequency for 
card output
-  clock(cclk_out). If it's not specified, max is 200MHZ and min is 400KHz by 
default.
- (Use the "max-frequency" instead of "clock-freq-min-max".)
-
 * num-slots (DEPRECATED): specifies the number of slots supported by the 
controller.
   The number of physical slots actually used could be equal or less than the
   value specified by num-slots. If this property is not specified, the value
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 0aa39975f33b..38e0e7c4ffd9 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -2784,7 +2784,6 @@ static int dw_mci_init_slot(struct dw_mci *host)
struct dw_mci_slot *slot;
const struct dw_mci_drv_data *drv_data = host->drv_data;
int ctrl_id, ret;
-   u32 freq[2];
 
mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev);
if (!mmc)
@@ -2798,16 +2797,6 @@ static int dw_mci_init_slot(struct dw_mci *host)
host->slot = slot;
 
mmc->ops = _mci_ops;
-   if (device_property_read_u32_array(host->dev, "clock-freq-min-max",
-  freq, 2)) {
-   mmc->f_min = DW_MCI_FREQ_MIN;
-   mmc->f_max = DW_MCI_FREQ_MAX;
-   } else {
-   dev_info(host->dev,
-   "'clock-freq-min-max' property was deprecated.\n");
-   mmc->f_min = freq[0];
-   mmc->f_max = freq[1];
-   }
 
/*if there are external regulators, get them*/
ret = mmc_regulator_get_supply(mmc);
@@ -2846,6 +2835,10 @@ static int dw_mci_init_slot(struct dw_mci *host)
if (ret)
goto err_host_allocated;
 
+   mmc->f_min = DW_MCI_FREQ_MIN;
+   if (!mmc->f_max)
+   mmc->f_max = DW_MCI_FREQ_MAX;
+
/* Process SDIO IRQs through the sdio_irq_work. */
if (mmc->caps & MMC_CAP_SDIO_IRQ)
mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
-- 
2.15.1

[PATCH 2/6] mmc: dw_mmc: remove the deprecated "num-slots"

[Jaehoon Chung]

'num-slots' property had already deprecated.
Remove the 'nom-slots' property that is kept to maintain the compatibility.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 5 -
 drivers/mmc/host/dw_mmc-pci.c  | 1 -
 drivers/mmc/host/dw_mmc.c  | 4 
 drivers/mmc/host/dw_mmc.h  | 3 ---
 4 files changed, 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 75c9fdca4aaf..7e5e427a22ce 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -59,11 +59,6 @@ Optional properties:
   is specified and the ciu clock is specified then we'll try to set the ciu
   clock to this at probe time.
 
-* num-slots (DEPRECATED): specifies the number of slots supported by the 
controller.
-  The number of physical slots actually used could be equal or less than the
-  value specified by num-slots. If this property is not specified, the value
-  of num-slot property is assumed to be 1.
-
 * fifo-depth: The maximum size of the tx/rx fifo's. If this property is not
   specified, the default value of the fifo size is determined from the
   controller registers.
diff --git a/drivers/mmc/host/dw_mmc-pci.c b/drivers/mmc/host/dw_mmc-pci.c
index ab8713297edb..3ad07d7b2c97 100644
--- a/drivers/mmc/host/dw_mmc-pci.c
+++ b/drivers/mmc/host/dw_mmc-pci.c
@@ -29,7 +29,6 @@
MMC_CAP_SDIO_IRQ)
 
 static struct dw_mci_board pci_board_data = {
-   .num_slots  = 1,
.caps   = DW_MCI_CAPABILITIES,
.bus_hz = 33 * 1000 * 1000,
.detect_delay_ms= 200,
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 38e0e7c4ffd9..a63ca7bc1099 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -3124,10 +3124,6 @@ static struct dw_mci_board *dw_mci_parse_dt(struct 
dw_mci *host)
return ERR_PTR(-EPROBE_DEFER);
}
 
-   /* find out number of slots supported */
-   if (!device_property_read_u32(dev, "num-slots", >num_slots))
-   dev_info(dev, "'num-slots' was deprecated.\n");
-
if (device_property_read_u32(dev, "fifo-depth", >fifo_depth))
dev_info(dev,
 "fifo-depth property not found, using value of FIFOTH 
register as default\n");
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
index e3124f06a47e..80ff9a6c6fdd 100644
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -102,7 +102,6 @@ struct dw_mci_dma_slave {
  * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
  * rate and timeout calculations.
  * @current_speed: Configured rate of the controller.
- * @num_slots: Number of slots available.
  * @fifoth_val: The value of FIFOTH register.
  * @verid: Denote Version ID.
  * @dev: Device associated with the MMC controller.
@@ -253,8 +252,6 @@ struct dma_pdata;
 
 /* Board platform data */
 struct dw_mci_board {
-   u32 num_slots;
-
unsigned int bus_hz; /* Clock speed at the cclk_in pad */
 
u32 caps;   /* Capabilities */
-- 
2.15.1

[PATCH 2/6] mmc: dw_mmc: remove the deprecated "num-slots"

[Jaehoon Chung]

'num-slots' property had already deprecated.
Remove the 'nom-slots' property that is kept to maintain the compatibility.

Signed-off-by: Jaehoon Chung 
---
 Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 5 -
 drivers/mmc/host/dw_mmc-pci.c  | 1 -
 drivers/mmc/host/dw_mmc.c  | 4 
 drivers/mmc/host/dw_mmc.h  | 3 ---
 4 files changed, 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 75c9fdca4aaf..7e5e427a22ce 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -59,11 +59,6 @@ Optional properties:
   is specified and the ciu clock is specified then we'll try to set the ciu
   clock to this at probe time.
 
-* num-slots (DEPRECATED): specifies the number of slots supported by the 
controller.
-  The number of physical slots actually used could be equal or less than the
-  value specified by num-slots. If this property is not specified, the value
-  of num-slot property is assumed to be 1.
-
 * fifo-depth: The maximum size of the tx/rx fifo's. If this property is not
   specified, the default value of the fifo size is determined from the
   controller registers.
diff --git a/drivers/mmc/host/dw_mmc-pci.c b/drivers/mmc/host/dw_mmc-pci.c
index ab8713297edb..3ad07d7b2c97 100644
--- a/drivers/mmc/host/dw_mmc-pci.c
+++ b/drivers/mmc/host/dw_mmc-pci.c
@@ -29,7 +29,6 @@
MMC_CAP_SDIO_IRQ)
 
 static struct dw_mci_board pci_board_data = {
-   .num_slots  = 1,
.caps   = DW_MCI_CAPABILITIES,
.bus_hz = 33 * 1000 * 1000,
.detect_delay_ms= 200,
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 38e0e7c4ffd9..a63ca7bc1099 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -3124,10 +3124,6 @@ static struct dw_mci_board *dw_mci_parse_dt(struct 
dw_mci *host)
return ERR_PTR(-EPROBE_DEFER);
}
 
-   /* find out number of slots supported */
-   if (!device_property_read_u32(dev, "num-slots", >num_slots))
-   dev_info(dev, "'num-slots' was deprecated.\n");
-
if (device_property_read_u32(dev, "fifo-depth", >fifo_depth))
dev_info(dev,
 "fifo-depth property not found, using value of FIFOTH 
register as default\n");
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
index e3124f06a47e..80ff9a6c6fdd 100644
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -102,7 +102,6 @@ struct dw_mci_dma_slave {
  * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
  * rate and timeout calculations.
  * @current_speed: Configured rate of the controller.
- * @num_slots: Number of slots available.
  * @fifoth_val: The value of FIFOTH register.
  * @verid: Denote Version ID.
  * @dev: Device associated with the MMC controller.
@@ -253,8 +252,6 @@ struct dma_pdata;
 
 /* Board platform data */
 struct dw_mci_board {
-   u32 num_slots;
-
unsigned int bus_hz; /* Clock speed at the cclk_in pad */
 
u32 caps;   /* Capabilities */
-- 
2.15.1

Re: [PATCH] mmc: dw_mmc-k3: Fix out-of-bounds access through DT alias

[Jaehoon Chung]

Hi Geert,

On 02/20/2018 07:50 PM, Geert Uytterhoeven wrote:
> On Tue, Feb 20, 2018 at 10:03 AM, Geert Uytterhoeven
> <geert+rene...@glider.be> wrote:
>> The hs_timing_cfg[] array is indexed using a value derived from the
>> "mshcN" alias in DT, which may lead to an out-of-bounds access.
>>
>> Fix this by adding a range check.
>>
>> Fixes: 7d92895208a008a2 ("mmc: dw_mmc-k3: Fix out-of-bounds access through 
>> DT alias")
> 
> Oops
> 
> Fixes: 361c7fe9b02eee7e ("mmc: dw_mmc-k3: add sd support for hi3660")

Could you resend the patch with changing commit-msg?
Then i will pick yours.

Best Regards,
Jaehoon Chung

> 
> Gr{oetje,eeting}s,
> 
> Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- 
> ge...@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like 
> that.
> -- Linus Torvalds
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 
> 

Re: [PATCH] mmc: dw_mmc-k3: Fix out-of-bounds access through DT alias

[Jaehoon Chung]

Hi Geert,

On 02/20/2018 07:50 PM, Geert Uytterhoeven wrote:
> On Tue, Feb 20, 2018 at 10:03 AM, Geert Uytterhoeven
>  wrote:
>> The hs_timing_cfg[] array is indexed using a value derived from the
>> "mshcN" alias in DT, which may lead to an out-of-bounds access.
>>
>> Fix this by adding a range check.
>>
>> Fixes: 7d92895208a008a2 ("mmc: dw_mmc-k3: Fix out-of-bounds access through 
>> DT alias")
> 
> Oops
> 
> Fixes: 361c7fe9b02eee7e ("mmc: dw_mmc-k3: add sd support for hi3660")

Could you resend the patch with changing commit-msg?
Then i will pick yours.

Best Regards,
Jaehoon Chung

> 
> Gr{oetje,eeting}s,
> 
> Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- 
> ge...@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like 
> that.
> -- Linus Torvalds
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 
> 

Re: [PATCH] PCI: exynos: remove the deprecated phy codes

[Jaehoon Chung]

On 01/03/2018 01:34 AM, Lorenzo Pieralisi wrote:
> On Wed, Dec 27, 2017 at 06:43:27PM +0900, Jaehoon Chung wrote:
>> pci-exynos had updated to use the PHY framework.
>> (drivers/phy/samsung/phy-exynos-pcie.c)
>> Removed the depreccated codes relevant to phy in pci-exynos.c.
>> Instead, use the phy-exynos-pcie.c file.
>>
>> Modified the binding documentation.
>>
>> Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
>> ---
>>  .../bindings/pci/samsung,exynos5440-pcie.txt   |  58 ++
>>  drivers/pci/dwc/pci-exynos.c   | 219 
>> ++---
>>  2 files changed, 22 insertions(+), 255 deletions(-)
> 
> I have updated the commit log to the patch below, please
> check before I push it out.

Looks good to me. At next time, i will write the commit-msg more carefully.

> 
> Lorenzo
> 
> -- >8 --
> Subject: [PATCH] PCI: exynos: Remove deprecated PHY initialization code
> 
> Exynos platforms have a PCI PHY driver in the PHY framework that can be
> used by the PCI host bridge drivers to initialize and manage the PHY.
> 
> Remove the deprecated PHY initialization code in the Exynos PCI host
> bridge driver by updating the driver to use the PHY framework API;
> modify the DT binding documentation accordingly.
> 
> Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
> [lorenzo.pieral...@arm.com: updated commit log]
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieral...@arm.com>
> Acked-by: Jingoo Han <jingooh...@gmail.com>
> Reviewed-by: Rob Herring <r...@kernel.org>
> ---
>  .../bindings/pci/samsung,exynos5440-pcie.txt   |  58 ++
>  drivers/pci/dwc/pci-exynos.c   | 219 
> ++---
>  2 files changed, 22 insertions(+), 255 deletions(-)
> 
> diff --git 
> a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt 
> b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
> index 34a11bfbfb60..651d957d1051 100644
> --- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
> @@ -6,9 +6,6 @@ and thus inherits all the common properties defined in 
> designware-pcie.txt.
>  Required properties:
>  - compatible: "samsung,exynos5440-pcie"
>  - reg: base addresses and lengths of the PCIe controller,
> - the PHY controller, additional register for the PHY controller.
> - (Registers for the PHY controller are DEPRECATED.
> -  Use the PHY framework.)
>  - reg-names : First name should be set to "elbi".
>   And use the "config" instead of getting the configuration address space
>   from "ranges".
> @@ -23,49 +20,8 @@ For other common properties, refer to
>  
>  Example:
>  
> -SoC-specific DT Entry:
> +SoC-specific DT Entry (with using PHY framework):
>  
> - pcie@29 {
> - compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
> - reg = <0x29 0x1000
> - 0x27 0x1000
> - 0x271000 0x40>;
> - interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
> - clocks = < 28>, < 27>;
> - clock-names = "pcie", "pcie_bus";
> - #address-cells = <3>;
> - #size-cells = <2>;
> - device_type = "pci";
> - ranges = <0x0800 0 0x4000 0x4000 0 0x1000   /* 
> configuration space */
> -   0x8100 0 0  0x40001000 0 0x0001   /* 
> downstream I/O */
> -   0x8200 0 0x40011000 0x40011000 0 0x1ffef000>; /* 
> non-prefetchable memory */
> - #interrupt-cells = <1>;
> - interrupt-map-mask = <0 0 0 0>;
> - interrupt-map = <0 0 0 0  GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> - num-lanes = <4>;
> - };
> -
> - pcie@2a {
> - compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
> - reg = <0x2a 0x1000
> - 0x272000 0x1000
> - 0x271040 0x40>;
> - interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
> - clocks = < 29>, < 27>;
> - clock-names = "pcie", "pcie_bus";
> - #address-cells = <3>;
> - #size-cells = <2>;
> - device_type = "pci";
> - ranges = <0x0800 0 0x6000 0x6000 0 0x1000   /* 
> configuration spac

Re: [PATCH] PCI: exynos: remove the deprecated phy codes

[Jaehoon Chung]

On 01/03/2018 01:34 AM, Lorenzo Pieralisi wrote:
> On Wed, Dec 27, 2017 at 06:43:27PM +0900, Jaehoon Chung wrote:
>> pci-exynos had updated to use the PHY framework.
>> (drivers/phy/samsung/phy-exynos-pcie.c)
>> Removed the depreccated codes relevant to phy in pci-exynos.c.
>> Instead, use the phy-exynos-pcie.c file.
>>
>> Modified the binding documentation.
>>
>> Signed-off-by: Jaehoon Chung 
>> ---
>>  .../bindings/pci/samsung,exynos5440-pcie.txt   |  58 ++
>>  drivers/pci/dwc/pci-exynos.c   | 219 
>> ++---
>>  2 files changed, 22 insertions(+), 255 deletions(-)
> 
> I have updated the commit log to the patch below, please
> check before I push it out.

Looks good to me. At next time, i will write the commit-msg more carefully.

> 
> Lorenzo
> 
> -- >8 --
> Subject: [PATCH] PCI: exynos: Remove deprecated PHY initialization code
> 
> Exynos platforms have a PCI PHY driver in the PHY framework that can be
> used by the PCI host bridge drivers to initialize and manage the PHY.
> 
> Remove the deprecated PHY initialization code in the Exynos PCI host
> bridge driver by updating the driver to use the PHY framework API;
> modify the DT binding documentation accordingly.
> 
> Signed-off-by: Jaehoon Chung 
> [lorenzo.pieral...@arm.com: updated commit log]
> Signed-off-by: Lorenzo Pieralisi 
> Acked-by: Jingoo Han 
> Reviewed-by: Rob Herring 
> ---
>  .../bindings/pci/samsung,exynos5440-pcie.txt   |  58 ++
>  drivers/pci/dwc/pci-exynos.c   | 219 
> ++---
>  2 files changed, 22 insertions(+), 255 deletions(-)
> 
> diff --git 
> a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt 
> b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
> index 34a11bfbfb60..651d957d1051 100644
> --- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
> @@ -6,9 +6,6 @@ and thus inherits all the common properties defined in 
> designware-pcie.txt.
>  Required properties:
>  - compatible: "samsung,exynos5440-pcie"
>  - reg: base addresses and lengths of the PCIe controller,
> - the PHY controller, additional register for the PHY controller.
> - (Registers for the PHY controller are DEPRECATED.
> -  Use the PHY framework.)
>  - reg-names : First name should be set to "elbi".
>   And use the "config" instead of getting the configuration address space
>   from "ranges".
> @@ -23,49 +20,8 @@ For other common properties, refer to
>  
>  Example:
>  
> -SoC-specific DT Entry:
> +SoC-specific DT Entry (with using PHY framework):
>  
> - pcie@29 {
> - compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
> - reg = <0x29 0x1000
> - 0x27 0x1000
> - 0x271000 0x40>;
> - interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
> - clocks = < 28>, < 27>;
> - clock-names = "pcie", "pcie_bus";
> - #address-cells = <3>;
> - #size-cells = <2>;
> - device_type = "pci";
> - ranges = <0x0800 0 0x4000 0x4000 0 0x1000   /* 
> configuration space */
> -   0x8100 0 0  0x40001000 0 0x0001   /* 
> downstream I/O */
> -   0x8200 0 0x40011000 0x40011000 0 0x1ffef000>; /* 
> non-prefetchable memory */
> - #interrupt-cells = <1>;
> - interrupt-map-mask = <0 0 0 0>;
> - interrupt-map = <0 0 0 0  GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> - num-lanes = <4>;
> - };
> -
> - pcie@2a {
> - compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
> - reg = <0x2a 0x1000
> - 0x272000 0x1000
> - 0x271040 0x40>;
> - interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
> - clocks = < 29>, < 27>;
> - clock-names = "pcie", "pcie_bus";
> - #address-cells = <3>;
> - #size-cells = <2>;
> - device_type = "pci";
> - ranges = <0x0800 0 0x6000 0x6000 0 0x1000   /* 
> configuration space */
> -   0x8100 0 0  0x60001000 0 0x0001   /* 
> downstream I/O */
> -

[PATCH] PCI: exynos: remove the deprecated phy codes

[Jaehoon Chung]

pci-exynos had updated to use the PHY framework.
(drivers/phy/samsung/phy-exynos-pcie.c)
Removed the depreccated codes relevant to phy in pci-exynos.c.
Instead, use the phy-exynos-pcie.c file.

Modified the binding documentation.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 .../bindings/pci/samsung,exynos5440-pcie.txt   |  58 ++
 drivers/pci/dwc/pci-exynos.c   | 219 ++---
 2 files changed, 22 insertions(+), 255 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt 
b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
index 34a11bfbfb60..651d957d1051 100644
--- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
@@ -6,9 +6,6 @@ and thus inherits all the common properties defined in 
designware-pcie.txt.
 Required properties:
 - compatible: "samsung,exynos5440-pcie"
 - reg: base addresses and lengths of the PCIe controller,
-   the PHY controller, additional register for the PHY controller.
-   (Registers for the PHY controller are DEPRECATED.
-Use the PHY framework.)
 - reg-names : First name should be set to "elbi".
And use the "config" instead of getting the configuration address space
from "ranges".
@@ -23,49 +20,8 @@ For other common properties, refer to
 
 Example:
 
-SoC-specific DT Entry:
+SoC-specific DT Entry (with using PHY framework):
 
-   pcie@29 {
-   compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
-   reg = <0x29 0x1000
-   0x27 0x1000
-   0x271000 0x40>;
-   interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
-   clocks = < 28>, < 27>;
-   clock-names = "pcie", "pcie_bus";
-   #address-cells = <3>;
-   #size-cells = <2>;
-   device_type = "pci";
-   ranges = <0x0800 0 0x4000 0x4000 0 0x1000   /* 
configuration space */
- 0x8100 0 0  0x40001000 0 0x0001   /* 
downstream I/O */
- 0x8200 0 0x40011000 0x40011000 0 0x1ffef000>; /* 
non-prefetchable memory */
-   #interrupt-cells = <1>;
-   interrupt-map-mask = <0 0 0 0>;
-   interrupt-map = <0 0 0 0  GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-   num-lanes = <4>;
-   };
-
-   pcie@2a {
-   compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
-   reg = <0x2a 0x1000
-   0x272000 0x1000
-   0x271040 0x40>;
-   interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
-   clocks = < 29>, < 27>;
-   clock-names = "pcie", "pcie_bus";
-   #address-cells = <3>;
-   #size-cells = <2>;
-   device_type = "pci";
-   ranges = <0x0800 0 0x6000 0x6000 0 0x1000   /* 
configuration space */
- 0x8100 0 0  0x60001000 0 0x0001   /* 
downstream I/O */
- 0x8200 0 0x60011000 0x60011000 0 0x1ffef000>; /* 
non-prefetchable memory */
-   #interrupt-cells = <1>;
-   interrupt-map-mask = <0 0 0 0>;
-   interrupt-map = <0 0 0 0  GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
-   num-lanes = <4>;
-   };
-
-With using PHY framework:
pcie_phy0: pcie-phy@27 {
...
reg = <0x27 0x1000>, <0x271000 0x40>;
@@ -74,13 +30,21 @@ With using PHY framework:
};
 
pcie@29 {
-   ...
+   compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
reg = <0x29 0x1000>, <0x4000 0x1000>;
reg-names = "elbi", "config";
+   clocks = < 28>, < 27>;
+   clock-names = "pcie", "pcie_bus";
+   #address-cells = <3>;
+   #size-cells = <2>;
+   device_type = "pci";
phys = <_phy0>;
ranges = <0x8100 0 0  0x60001000 0 0x0001
  0x8200 0 0x60011000 0x60011000 0 0x1ffef000>;
-   ...
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0 0 0 0>;
+   interrupt-map = <0 0 0 0  GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+   num-lanes = <4>;
};
 
 Board-specifi

[PATCH] PCI: exynos: remove the deprecated phy codes

[Jaehoon Chung]

pci-exynos had updated to use the PHY framework.
(drivers/phy/samsung/phy-exynos-pcie.c)
Removed the depreccated codes relevant to phy in pci-exynos.c.
Instead, use the phy-exynos-pcie.c file.

Modified the binding documentation.

Signed-off-by: Jaehoon Chung 
---
 .../bindings/pci/samsung,exynos5440-pcie.txt   |  58 ++
 drivers/pci/dwc/pci-exynos.c   | 219 ++---
 2 files changed, 22 insertions(+), 255 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt 
b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
index 34a11bfbfb60..651d957d1051 100644
--- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
@@ -6,9 +6,6 @@ and thus inherits all the common properties defined in 
designware-pcie.txt.
 Required properties:
 - compatible: "samsung,exynos5440-pcie"
 - reg: base addresses and lengths of the PCIe controller,
-   the PHY controller, additional register for the PHY controller.
-   (Registers for the PHY controller are DEPRECATED.
-Use the PHY framework.)
 - reg-names : First name should be set to "elbi".
And use the "config" instead of getting the configuration address space
from "ranges".
@@ -23,49 +20,8 @@ For other common properties, refer to
 
 Example:
 
-SoC-specific DT Entry:
+SoC-specific DT Entry (with using PHY framework):
 
-   pcie@29 {
-   compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
-   reg = <0x29 0x1000
-   0x27 0x1000
-   0x271000 0x40>;
-   interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
-   clocks = < 28>, < 27>;
-   clock-names = "pcie", "pcie_bus";
-   #address-cells = <3>;
-   #size-cells = <2>;
-   device_type = "pci";
-   ranges = <0x0800 0 0x4000 0x4000 0 0x1000   /* 
configuration space */
- 0x8100 0 0  0x40001000 0 0x0001   /* 
downstream I/O */
- 0x8200 0 0x40011000 0x40011000 0 0x1ffef000>; /* 
non-prefetchable memory */
-   #interrupt-cells = <1>;
-   interrupt-map-mask = <0 0 0 0>;
-   interrupt-map = <0 0 0 0  GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-   num-lanes = <4>;
-   };
-
-   pcie@2a {
-   compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
-   reg = <0x2a 0x1000
-   0x272000 0x1000
-   0x271040 0x40>;
-   interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
-   clocks = < 29>, < 27>;
-   clock-names = "pcie", "pcie_bus";
-   #address-cells = <3>;
-   #size-cells = <2>;
-   device_type = "pci";
-   ranges = <0x0800 0 0x6000 0x6000 0 0x1000   /* 
configuration space */
- 0x8100 0 0  0x60001000 0 0x0001   /* 
downstream I/O */
- 0x8200 0 0x60011000 0x60011000 0 0x1ffef000>; /* 
non-prefetchable memory */
-   #interrupt-cells = <1>;
-   interrupt-map-mask = <0 0 0 0>;
-   interrupt-map = <0 0 0 0  GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
-   num-lanes = <4>;
-   };
-
-With using PHY framework:
pcie_phy0: pcie-phy@27 {
...
reg = <0x27 0x1000>, <0x271000 0x40>;
@@ -74,13 +30,21 @@ With using PHY framework:
};
 
pcie@29 {
-   ...
+   compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
reg = <0x29 0x1000>, <0x4000 0x1000>;
reg-names = "elbi", "config";
+   clocks = < 28>, < 27>;
+   clock-names = "pcie", "pcie_bus";
+   #address-cells = <3>;
+   #size-cells = <2>;
+   device_type = "pci";
phys = <_phy0>;
ranges = <0x8100 0 0  0x60001000 0 0x0001
  0x8200 0 0x60011000 0x60011000 0 0x1ffef000>;
-   ...
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0 0 0 0>;
+   interrupt-map = <0 0 0 0  GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+   num-lanes = <4>;
};
 
 Board-specific DT Entry:
diff --git a/drivers/pc

Re: [RFC 2/2] pci: dwc: pci-exynos: add the codes to support the exynos5433

[Jaehoon Chung]

On 12/27/2017 06:11 AM, Rob Herring wrote:
> On Thu, Dec 21, 2017 at 09:14:07PM +0900, Jaehoon Chung wrote:
>> Exynos5433 has the PCIe for WiFi.
>> Added the codes relevant to PCIe for supporting the exynos5433.
>> Also changed the binding documentation name to
>> 'samsung,exynos-pcie.txt'.
>> (It's not only exynos5440 anymore.)
>>
>> Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
>> ---
>>  ...exynos5440-pcie.txt => samsung,exynos-pcie.txt} |   2 +-
>>  drivers/pci/dwc/pci-exynos.c   | 183 
>> -
>>  2 files changed, 144 insertions(+), 41 deletions(-)
>>  rename Documentation/devicetree/bindings/pci/{samsung,exynos5440-pcie.txt 
>> => samsung,exynos-pcie.txt} (97%)
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt 
>> b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> similarity index 97%
>> rename from Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
>> rename to Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> index 34a11bfbfb60..958dcc150505 100644
>> --- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
>> +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> @@ -4,7 +4,7 @@ This PCIe host controller is based on the Synopsys 
>> DesignWare PCIe IP
>>  and thus inherits all the common properties defined in designware-pcie.txt.
>>  
>>  Required properties:
>> -- compatible: "samsung,exynos5440-pcie"
>> +- compatible: "samsung,exynos5440-pcie" or "samsung,exynos5433-pcie"
> 
> Quite a lot of driver changes for just a new compatible.

It needs to distinguish between exynos5440 and other exynos variants.
So needs to add the new common compatible likes "samsung,exynos5-pcie" or 
"samsung,exynos-pcie".

Actually, i hope that exynos5440 can be removed from mainline kernel.

> 
>>  - reg: base addresses and lengths of the PCIe controller,
> 
> For example, you're adding the DBI registers which is not documented 
> here. 
> 
> Perhaps it is time to remove the old phy support before adding a new 
> platform.

Ok, I will send the patches to remove the old phy.

> 
>>  the PHY controller, additional register for the PHY controller.
>>  (Registers for the PHY controller are DEPRECATED.
>> diff --git a/drivers/pci/dwc/pci-exynos.c b/drivers/pci/dwc/pci-exynos.c
>> index 5596fdedbb94..8dee2e90347e 100644
>> --- a/drivers/pci/dwc/pci-exynos.c
>> +++ b/drivers/pci/dwc/pci-exynos.c
>> @@ -40,6 +40,8 @@
>>  #define PCIE_IRQ_SPECIAL0x008
>>  #define PCIE_IRQ_EN_PULSE   0x00c
>>  #define PCIE_IRQ_EN_LEVEL   0x010
>> +#define PCIE_SW_WAKE0x018
>> +#define PCIE_BUS_EN BIT(1)
>>  #define IRQ_MSI_ENABLE  BIT(2)
>>  #define PCIE_IRQ_EN_SPECIAL 0x014
>>  #define PCIE_PWR_RESET  0x018
>> @@ -49,7 +51,8 @@
>>  #define PCIE_NONSTICKY_RESET0x024
>>  #define PCIE_APP_INIT_RESET 0x028
>>  #define PCIE_APP_LTSSM_ENABLE   0x02c
>> -#define PCIE_ELBI_RDLH_LINKUP   0x064
>> +#define PCIE_ELBI_RDLH_LINKUP   0x074
>> +#define PCIE_ELBI_XMLH_LINKUP   BIT(4)
>>  #define PCIE_ELBI_LTSSM_ENABLE  0x1
>>  #define PCIE_ELBI_SLV_AWMISC0x11c
>>  #define PCIE_ELBI_SLV_ARMISC0x120
>> @@ -94,6 +97,10 @@
>>  #define PCIE_PHY_TRSV3_PD_TSV   BIT(7)
>>  #define PCIE_PHY_TRSV3_LVCC 0x31c
>>  
>> +/* DBI register */
>> +#define PCIE_MISC_CONTROL_1_OFF 0x8BC
>> +#define DBI_RO_WR_ENBIT(0)
>> +
>>  struct exynos_pcie_mem_res {
>>  void __iomem *elbi_base;   /* DT 0th resource: PCIe CTRL */
>>  void __iomem *phy_base;/* DT 1st resource: PHY CTRL */
>> @@ -221,6 +228,96 @@ static const struct exynos_pcie_ops exynos5440_pcie_ops 
>> = {
>>  .deinit_clk_resources   = exynos5440_pcie_deinit_clk_resources,
>>  };
>>  
>> +static int exynos5433_pcie_get_mem_resources(struct platform_device *pdev,
>> + struct exynos_pcie *ep)
>> +{
>> +struct dw_pcie *pci = ep->pci;
>> +struct device *dev = pci->dev;
>> +struct resource *res;
>> +
>> +ep->mem_res = devm_kzalloc(dev, sizeof(*ep->mem_res), GFP_KERNEL);
>> +if (!ep->mem_res)
>> +

Re: [RFC 2/2] pci: dwc: pci-exynos: add the codes to support the exynos5433

[Jaehoon Chung]

On 12/27/2017 06:11 AM, Rob Herring wrote:
> On Thu, Dec 21, 2017 at 09:14:07PM +0900, Jaehoon Chung wrote:
>> Exynos5433 has the PCIe for WiFi.
>> Added the codes relevant to PCIe for supporting the exynos5433.
>> Also changed the binding documentation name to
>> 'samsung,exynos-pcie.txt'.
>> (It's not only exynos5440 anymore.)
>>
>> Signed-off-by: Jaehoon Chung 
>> ---
>>  ...exynos5440-pcie.txt => samsung,exynos-pcie.txt} |   2 +-
>>  drivers/pci/dwc/pci-exynos.c   | 183 
>> -
>>  2 files changed, 144 insertions(+), 41 deletions(-)
>>  rename Documentation/devicetree/bindings/pci/{samsung,exynos5440-pcie.txt 
>> => samsung,exynos-pcie.txt} (97%)
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt 
>> b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> similarity index 97%
>> rename from Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
>> rename to Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> index 34a11bfbfb60..958dcc150505 100644
>> --- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
>> +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> @@ -4,7 +4,7 @@ This PCIe host controller is based on the Synopsys 
>> DesignWare PCIe IP
>>  and thus inherits all the common properties defined in designware-pcie.txt.
>>  
>>  Required properties:
>> -- compatible: "samsung,exynos5440-pcie"
>> +- compatible: "samsung,exynos5440-pcie" or "samsung,exynos5433-pcie"
> 
> Quite a lot of driver changes for just a new compatible.

It needs to distinguish between exynos5440 and other exynos variants.
So needs to add the new common compatible likes "samsung,exynos5-pcie" or 
"samsung,exynos-pcie".

Actually, i hope that exynos5440 can be removed from mainline kernel.

> 
>>  - reg: base addresses and lengths of the PCIe controller,
> 
> For example, you're adding the DBI registers which is not documented 
> here. 
> 
> Perhaps it is time to remove the old phy support before adding a new 
> platform.

Ok, I will send the patches to remove the old phy.

> 
>>  the PHY controller, additional register for the PHY controller.
>>  (Registers for the PHY controller are DEPRECATED.
>> diff --git a/drivers/pci/dwc/pci-exynos.c b/drivers/pci/dwc/pci-exynos.c
>> index 5596fdedbb94..8dee2e90347e 100644
>> --- a/drivers/pci/dwc/pci-exynos.c
>> +++ b/drivers/pci/dwc/pci-exynos.c
>> @@ -40,6 +40,8 @@
>>  #define PCIE_IRQ_SPECIAL0x008
>>  #define PCIE_IRQ_EN_PULSE   0x00c
>>  #define PCIE_IRQ_EN_LEVEL   0x010
>> +#define PCIE_SW_WAKE0x018
>> +#define PCIE_BUS_EN BIT(1)
>>  #define IRQ_MSI_ENABLE  BIT(2)
>>  #define PCIE_IRQ_EN_SPECIAL 0x014
>>  #define PCIE_PWR_RESET  0x018
>> @@ -49,7 +51,8 @@
>>  #define PCIE_NONSTICKY_RESET0x024
>>  #define PCIE_APP_INIT_RESET 0x028
>>  #define PCIE_APP_LTSSM_ENABLE   0x02c
>> -#define PCIE_ELBI_RDLH_LINKUP   0x064
>> +#define PCIE_ELBI_RDLH_LINKUP   0x074
>> +#define PCIE_ELBI_XMLH_LINKUP   BIT(4)
>>  #define PCIE_ELBI_LTSSM_ENABLE  0x1
>>  #define PCIE_ELBI_SLV_AWMISC0x11c
>>  #define PCIE_ELBI_SLV_ARMISC0x120
>> @@ -94,6 +97,10 @@
>>  #define PCIE_PHY_TRSV3_PD_TSV   BIT(7)
>>  #define PCIE_PHY_TRSV3_LVCC 0x31c
>>  
>> +/* DBI register */
>> +#define PCIE_MISC_CONTROL_1_OFF 0x8BC
>> +#define DBI_RO_WR_ENBIT(0)
>> +
>>  struct exynos_pcie_mem_res {
>>  void __iomem *elbi_base;   /* DT 0th resource: PCIe CTRL */
>>  void __iomem *phy_base;/* DT 1st resource: PHY CTRL */
>> @@ -221,6 +228,96 @@ static const struct exynos_pcie_ops exynos5440_pcie_ops 
>> = {
>>  .deinit_clk_resources   = exynos5440_pcie_deinit_clk_resources,
>>  };
>>  
>> +static int exynos5433_pcie_get_mem_resources(struct platform_device *pdev,
>> + struct exynos_pcie *ep)
>> +{
>> +struct dw_pcie *pci = ep->pci;
>> +struct device *dev = pci->dev;
>> +struct resource *res;
>> +
>> +ep->mem_res = devm_kzalloc(dev, sizeof(*ep->mem_res), GFP_KERNEL);
>> +if (!ep->mem_res)
>> +return -ENOMEM;
>>

Re: [RFC 2/2] pci: dwc: pci-exynos: add the codes to support the exynos5433

[Jaehoon Chung]

Hi Jingoo,

On 12/22/2017 01:12 AM, Jingoo Han wrote:
> On Thursday, December 21, 2017 7:14 AM, Jaehoon Chung wrote:
>>
>> Exynos5433 has the PCIe for WiFi.
>> Added the codes relevant to PCIe for supporting the exynos5433.
>> Also changed the binding documentation name to
>> 'samsung,exynos-pcie.txt'.
>> (It's not only exynos5440 anymore.)
>>
> 
> I have no objection.
> However, I added some comments about Exynos5440.
> 
>> Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
>> ---
>>  ...exynos5440-pcie.txt => samsung,exynos-pcie.txt} |   2 +-
>>  drivers/pci/dwc/pci-exynos.c   | 183
> -
>>  2 files changed, 144 insertions(+), 41 deletions(-)
>>  rename Documentation/devicetree/bindings/pci/{samsung,exynos5440-pcie.txt
>> => samsung,exynos-pcie.txt} (97%)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos5440-
>> pcie.txt b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> similarity index 97%
>> rename from Documentation/devicetree/bindings/pci/samsung,exynos5440-
>> pcie.txt
>> rename to Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> index 34a11bfbfb60..958dcc150505 100644
>> --- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
>> +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> @@ -4,7 +4,7 @@ This PCIe host controller is based on the Synopsys
>> DesignWare PCIe IP
>>  and thus inherits all the common properties defined in designware-
>> pcie.txt.
>>
>>  Required properties:
>> -- compatible: "samsung,exynos5440-pcie"
>> +- compatible: "samsung,exynos5440-pcie" or "samsung,exynos5433-pcie"
>>  - reg: base addresses and lengths of the PCIe controller,
>>  the PHY controller, additional register for the PHY controller.
>>  (Registers for the PHY controller are DEPRECATED.
>> diff --git a/drivers/pci/dwc/pci-exynos.c b/drivers/pci/dwc/pci-exynos.c
>> index 5596fdedbb94..8dee2e90347e 100644
>> --- a/drivers/pci/dwc/pci-exynos.c
>> +++ b/drivers/pci/dwc/pci-exynos.c
>> @@ -40,6 +40,8 @@
>>  #define PCIE_IRQ_SPECIAL0x008
>>  #define PCIE_IRQ_EN_PULSE   0x00c
>>  #define PCIE_IRQ_EN_LEVEL   0x010
>> +#define PCIE_SW_WAKE0x018
>> +#define PCIE_BUS_EN BIT(1)
>>  #define IRQ_MSI_ENABLE  BIT(2)
>>  #define PCIE_IRQ_EN_SPECIAL 0x014
>>  #define PCIE_PWR_RESET  0x018
>> @@ -49,7 +51,8 @@
>>  #define PCIE_NONSTICKY_RESET0x024
>>  #define PCIE_APP_INIT_RESET 0x028
>>  #define PCIE_APP_LTSSM_ENABLE   0x02c
>> -#define PCIE_ELBI_RDLH_LINKUP   0x064
>> +#define PCIE_ELBI_RDLH_LINKUP   0x074
> 
> The address of this register should be 0x064 for exynos5440.
> Howe about the following?
> 
> +#define EXYNOS5440_PCIE_ELBI_RDLH_LINKUP 0x064
> +#define PCIE_ELBI_RDLH_LINKUP0x074
> 
> Or you can add the following.
> 
> /* Exynos5440 PCIe ELBI registers */
> #define EXYNOS5440_PCIE_ELBI_RDLH_LINKUP  0x064

Maybe, you're right. Because i didn't have Exynos5440 TRM, it's problem to me 
about updating other SoCs.
I have checked almost all variants Exynos. They are using the LINKUP register 
as 0x74.

If i can get the exynos5440 TRM, it's much helpful to me. Is it possible?

> 
>> +#define PCIE_ELBI_XMLH_LINKUP   BIT(4)
>>  #define PCIE_ELBI_LTSSM_ENABLE  0x1
>>  #define PCIE_ELBI_SLV_AWMISC0x11c
>>  #define PCIE_ELBI_SLV_ARMISC0x120
>> @@ -94,6 +97,10 @@
>>  #define PCIE_PHY_TRSV3_PD_TSV   BIT(7)
>>  #define PCIE_PHY_TRSV3_LVCC 0x31c
>>
>> +/* DBI register */
>> +#define PCIE_MISC_CONTROL_1_OFF 0x8BC
>> +#define DBI_RO_WR_ENBIT(0)
>> +
>>  struct exynos_pcie_mem_res {
>>  void __iomem *elbi_base;   /* DT 0th resource: PCIe CTRL */
>>  void __iomem *phy_base;/* DT 1st resource: PHY CTRL */
>> @@ -221,6 +228,96 @@ static const struct exynos_pcie_ops
>> exynos5440_pcie_ops = {
>>  .deinit_clk_resources   = exynos5440_pcie_deinit_clk_resources,
>>  };
>>
>> +static int exynos5433_pcie_get_mem_resources(struct platform_device
> *pdev,
>> + struct exynos_pcie *ep)
>> +{
>> +struct dw_pcie *pci = ep->pci;
>> +struct device *dev = pci->dev;
>> +

Re: [RFC 2/2] pci: dwc: pci-exynos: add the codes to support the exynos5433

[Jaehoon Chung]

Hi Jingoo,

On 12/22/2017 01:12 AM, Jingoo Han wrote:
> On Thursday, December 21, 2017 7:14 AM, Jaehoon Chung wrote:
>>
>> Exynos5433 has the PCIe for WiFi.
>> Added the codes relevant to PCIe for supporting the exynos5433.
>> Also changed the binding documentation name to
>> 'samsung,exynos-pcie.txt'.
>> (It's not only exynos5440 anymore.)
>>
> 
> I have no objection.
> However, I added some comments about Exynos5440.
> 
>> Signed-off-by: Jaehoon Chung 
>> ---
>>  ...exynos5440-pcie.txt => samsung,exynos-pcie.txt} |   2 +-
>>  drivers/pci/dwc/pci-exynos.c   | 183
> -
>>  2 files changed, 144 insertions(+), 41 deletions(-)
>>  rename Documentation/devicetree/bindings/pci/{samsung,exynos5440-pcie.txt
>> => samsung,exynos-pcie.txt} (97%)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos5440-
>> pcie.txt b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> similarity index 97%
>> rename from Documentation/devicetree/bindings/pci/samsung,exynos5440-
>> pcie.txt
>> rename to Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> index 34a11bfbfb60..958dcc150505 100644
>> --- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
>> +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
>> @@ -4,7 +4,7 @@ This PCIe host controller is based on the Synopsys
>> DesignWare PCIe IP
>>  and thus inherits all the common properties defined in designware-
>> pcie.txt.
>>
>>  Required properties:
>> -- compatible: "samsung,exynos5440-pcie"
>> +- compatible: "samsung,exynos5440-pcie" or "samsung,exynos5433-pcie"
>>  - reg: base addresses and lengths of the PCIe controller,
>>  the PHY controller, additional register for the PHY controller.
>>  (Registers for the PHY controller are DEPRECATED.
>> diff --git a/drivers/pci/dwc/pci-exynos.c b/drivers/pci/dwc/pci-exynos.c
>> index 5596fdedbb94..8dee2e90347e 100644
>> --- a/drivers/pci/dwc/pci-exynos.c
>> +++ b/drivers/pci/dwc/pci-exynos.c
>> @@ -40,6 +40,8 @@
>>  #define PCIE_IRQ_SPECIAL0x008
>>  #define PCIE_IRQ_EN_PULSE   0x00c
>>  #define PCIE_IRQ_EN_LEVEL   0x010
>> +#define PCIE_SW_WAKE0x018
>> +#define PCIE_BUS_EN BIT(1)
>>  #define IRQ_MSI_ENABLE  BIT(2)
>>  #define PCIE_IRQ_EN_SPECIAL 0x014
>>  #define PCIE_PWR_RESET  0x018
>> @@ -49,7 +51,8 @@
>>  #define PCIE_NONSTICKY_RESET0x024
>>  #define PCIE_APP_INIT_RESET 0x028
>>  #define PCIE_APP_LTSSM_ENABLE   0x02c
>> -#define PCIE_ELBI_RDLH_LINKUP   0x064
>> +#define PCIE_ELBI_RDLH_LINKUP   0x074
> 
> The address of this register should be 0x064 for exynos5440.
> Howe about the following?
> 
> +#define EXYNOS5440_PCIE_ELBI_RDLH_LINKUP 0x064
> +#define PCIE_ELBI_RDLH_LINKUP0x074
> 
> Or you can add the following.
> 
> /* Exynos5440 PCIe ELBI registers */
> #define EXYNOS5440_PCIE_ELBI_RDLH_LINKUP  0x064

Maybe, you're right. Because i didn't have Exynos5440 TRM, it's problem to me 
about updating other SoCs.
I have checked almost all variants Exynos. They are using the LINKUP register 
as 0x74.

If i can get the exynos5440 TRM, it's much helpful to me. Is it possible?

> 
>> +#define PCIE_ELBI_XMLH_LINKUP   BIT(4)
>>  #define PCIE_ELBI_LTSSM_ENABLE  0x1
>>  #define PCIE_ELBI_SLV_AWMISC0x11c
>>  #define PCIE_ELBI_SLV_ARMISC0x120
>> @@ -94,6 +97,10 @@
>>  #define PCIE_PHY_TRSV3_PD_TSV   BIT(7)
>>  #define PCIE_PHY_TRSV3_LVCC 0x31c
>>
>> +/* DBI register */
>> +#define PCIE_MISC_CONTROL_1_OFF 0x8BC
>> +#define DBI_RO_WR_ENBIT(0)
>> +
>>  struct exynos_pcie_mem_res {
>>  void __iomem *elbi_base;   /* DT 0th resource: PCIe CTRL */
>>  void __iomem *phy_base;/* DT 1st resource: PHY CTRL */
>> @@ -221,6 +228,96 @@ static const struct exynos_pcie_ops
>> exynos5440_pcie_ops = {
>>  .deinit_clk_resources   = exynos5440_pcie_deinit_clk_resources,
>>  };
>>
>> +static int exynos5433_pcie_get_mem_resources(struct platform_device
> *pdev,
>> + struct exynos_pcie *ep)
>> +{
>> +struct dw_pcie *pci = ep->pci;
>> +struct device *dev = pci->dev;
>> +struct resource *res;
>> 

[RFC 2/2] pci: dwc: pci-exynos: add the coedes to support the exynos5433

[Jaehoon Chung]

Exynos5433 has the PCIe for WiFi.
Add the codes relevant to PCIe for supporting the exynos5433.
Also changed the binding documentation name to
'samsung,exynos-pcie.txt'.
(It's not only exynos5440 anymore.)

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 ...exynos5440-pcie.txt => samsung,exynos-pcie.txt} |   2 +-
 drivers/pci/dwc/pci-exynos.c   | 183 -
 2 files changed, 144 insertions(+), 41 deletions(-)
 rename Documentation/devicetree/bindings/pci/{samsung,exynos5440-pcie.txt => 
samsung,exynos-pcie.txt} (97%)

diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt 
b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
similarity index 97%
rename from Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
rename to Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
index 34a11bfbfb60..958dcc150505 100644
--- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
@@ -4,7 +4,7 @@ This PCIe host controller is based on the Synopsys DesignWare 
PCIe IP
 and thus inherits all the common properties defined in designware-pcie.txt.
 
 Required properties:
-- compatible: "samsung,exynos5440-pcie"
+- compatible: "samsung,exynos5440-pcie" or "samsung,exynos5433-pcie"
 - reg: base addresses and lengths of the PCIe controller,
the PHY controller, additional register for the PHY controller.
(Registers for the PHY controller are DEPRECATED.
diff --git a/drivers/pci/dwc/pci-exynos.c b/drivers/pci/dwc/pci-exynos.c
index 5596fdedbb94..8dee2e90347e 100644
--- a/drivers/pci/dwc/pci-exynos.c
+++ b/drivers/pci/dwc/pci-exynos.c
@@ -40,6 +40,8 @@
 #define PCIE_IRQ_SPECIAL   0x008
 #define PCIE_IRQ_EN_PULSE  0x00c
 #define PCIE_IRQ_EN_LEVEL  0x010
+#define PCIE_SW_WAKE   0x018
+#define PCIE_BUS_ENBIT(1)
 #define IRQ_MSI_ENABLE BIT(2)
 #define PCIE_IRQ_EN_SPECIAL0x014
 #define PCIE_PWR_RESET 0x018
@@ -49,7 +51,8 @@
 #define PCIE_NONSTICKY_RESET   0x024
 #define PCIE_APP_INIT_RESET0x028
 #define PCIE_APP_LTSSM_ENABLE  0x02c
-#define PCIE_ELBI_RDLH_LINKUP  0x064
+#define PCIE_ELBI_RDLH_LINKUP  0x074
+#define PCIE_ELBI_XMLH_LINKUP  BIT(4)
 #define PCIE_ELBI_LTSSM_ENABLE 0x1
 #define PCIE_ELBI_SLV_AWMISC   0x11c
 #define PCIE_ELBI_SLV_ARMISC   0x120
@@ -94,6 +97,10 @@
 #define PCIE_PHY_TRSV3_PD_TSV  BIT(7)
 #define PCIE_PHY_TRSV3_LVCC0x31c
 
+/* DBI register */
+#define PCIE_MISC_CONTROL_1_OFF0x8BC
+#define DBI_RO_WR_EN   BIT(0)
+
 struct exynos_pcie_mem_res {
void __iomem *elbi_base;   /* DT 0th resource: PCIe CTRL */
void __iomem *phy_base;/* DT 1st resource: PHY CTRL */
@@ -221,6 +228,96 @@ static const struct exynos_pcie_ops exynos5440_pcie_ops = {
.deinit_clk_resources   = exynos5440_pcie_deinit_clk_resources,
 };
 
+static int exynos5433_pcie_get_mem_resources(struct platform_device *pdev,
+struct exynos_pcie *ep)
+{
+   struct dw_pcie *pci = ep->pci;
+   struct device *dev = pci->dev;
+   struct resource *res;
+
+   ep->mem_res = devm_kzalloc(dev, sizeof(*ep->mem_res), GFP_KERNEL);
+   if (!ep->mem_res)
+   return -ENOMEM;
+
+   /* External Local Bus interface(ELBI) Register */
+   res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "elbi");
+   ep->mem_res->elbi_base = devm_ioremap_resource(>dev, res);
+   if (IS_ERR(ep->mem_res->elbi_base))
+   return PTR_ERR(ep->mem_res->elbi_base);
+
+   /* Data Bus Interface(DBI) Register */
+   res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
+   pci->dbi_base = devm_ioremap_resource(>dev, res);
+   if (IS_ERR(pci->dbi_base))
+   return PTR_ERR(pci->dbi_base);
+
+   return 0;
+}
+
+static int exynos5433_pcie_get_clk_resources(struct exynos_pcie *ep)
+{
+   struct dw_pcie *pci = ep->pci;
+   struct device *dev = pci->dev;
+
+   ep->clk_res = devm_kzalloc(dev, sizeof(*ep->clk_res), GFP_KERNEL);
+   if (!ep->clk_res)
+   return -ENOMEM;
+
+   ep->clk_res->clk = devm_clk_get(dev, "pcie");
+   if (IS_ERR(ep->clk_res->clk)) {
+   dev_err(dev, "Failed to get pcie rc clock\n");
+   return PTR_ERR(ep->clk_res->clk);
+   }
+
+   ep->clk_res->bus_clk = devm_clk_get(dev, "pcie_bus");
+   if (IS_ERR(ep->clk_res->bus_clk)) {
+   dev_err(dev, "Failed to get pcie bus clock\n");
+   retur

[RFC 2/2] pci: dwc: pci-exynos: add the codes to support the exynos5433

[Jaehoon Chung]

Exynos5433 has the PCIe for WiFi.
Added the codes relevant to PCIe for supporting the exynos5433.
Also changed the binding documentation name to
'samsung,exynos-pcie.txt'.
(It's not only exynos5440 anymore.)

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 ...exynos5440-pcie.txt => samsung,exynos-pcie.txt} |   2 +-
 drivers/pci/dwc/pci-exynos.c   | 183 -
 2 files changed, 144 insertions(+), 41 deletions(-)
 rename Documentation/devicetree/bindings/pci/{samsung,exynos5440-pcie.txt => 
samsung,exynos-pcie.txt} (97%)

diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt 
b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
similarity index 97%
rename from Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
rename to Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
index 34a11bfbfb60..958dcc150505 100644
--- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
@@ -4,7 +4,7 @@ This PCIe host controller is based on the Synopsys DesignWare 
PCIe IP
 and thus inherits all the common properties defined in designware-pcie.txt.
 
 Required properties:
-- compatible: "samsung,exynos5440-pcie"
+- compatible: "samsung,exynos5440-pcie" or "samsung,exynos5433-pcie"
 - reg: base addresses and lengths of the PCIe controller,
the PHY controller, additional register for the PHY controller.
(Registers for the PHY controller are DEPRECATED.
diff --git a/drivers/pci/dwc/pci-exynos.c b/drivers/pci/dwc/pci-exynos.c
index 5596fdedbb94..8dee2e90347e 100644
--- a/drivers/pci/dwc/pci-exynos.c
+++ b/drivers/pci/dwc/pci-exynos.c
@@ -40,6 +40,8 @@
 #define PCIE_IRQ_SPECIAL   0x008
 #define PCIE_IRQ_EN_PULSE  0x00c
 #define PCIE_IRQ_EN_LEVEL  0x010
+#define PCIE_SW_WAKE   0x018
+#define PCIE_BUS_ENBIT(1)
 #define IRQ_MSI_ENABLE BIT(2)
 #define PCIE_IRQ_EN_SPECIAL0x014
 #define PCIE_PWR_RESET 0x018
@@ -49,7 +51,8 @@
 #define PCIE_NONSTICKY_RESET   0x024
 #define PCIE_APP_INIT_RESET0x028
 #define PCIE_APP_LTSSM_ENABLE  0x02c
-#define PCIE_ELBI_RDLH_LINKUP  0x064
+#define PCIE_ELBI_RDLH_LINKUP  0x074
+#define PCIE_ELBI_XMLH_LINKUP  BIT(4)
 #define PCIE_ELBI_LTSSM_ENABLE 0x1
 #define PCIE_ELBI_SLV_AWMISC   0x11c
 #define PCIE_ELBI_SLV_ARMISC   0x120
@@ -94,6 +97,10 @@
 #define PCIE_PHY_TRSV3_PD_TSV  BIT(7)
 #define PCIE_PHY_TRSV3_LVCC0x31c
 
+/* DBI register */
+#define PCIE_MISC_CONTROL_1_OFF0x8BC
+#define DBI_RO_WR_EN   BIT(0)
+
 struct exynos_pcie_mem_res {
void __iomem *elbi_base;   /* DT 0th resource: PCIe CTRL */
void __iomem *phy_base;/* DT 1st resource: PHY CTRL */
@@ -221,6 +228,96 @@ static const struct exynos_pcie_ops exynos5440_pcie_ops = {
.deinit_clk_resources   = exynos5440_pcie_deinit_clk_resources,
 };
 
+static int exynos5433_pcie_get_mem_resources(struct platform_device *pdev,
+struct exynos_pcie *ep)
+{
+   struct dw_pcie *pci = ep->pci;
+   struct device *dev = pci->dev;
+   struct resource *res;
+
+   ep->mem_res = devm_kzalloc(dev, sizeof(*ep->mem_res), GFP_KERNEL);
+   if (!ep->mem_res)
+   return -ENOMEM;
+
+   /* External Local Bus interface(ELBI) Register */
+   res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "elbi");
+   ep->mem_res->elbi_base = devm_ioremap_resource(>dev, res);
+   if (IS_ERR(ep->mem_res->elbi_base))
+   return PTR_ERR(ep->mem_res->elbi_base);
+
+   /* Data Bus Interface(DBI) Register */
+   res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
+   pci->dbi_base = devm_ioremap_resource(>dev, res);
+   if (IS_ERR(pci->dbi_base))
+   return PTR_ERR(pci->dbi_base);
+
+   return 0;
+}
+
+static int exynos5433_pcie_get_clk_resources(struct exynos_pcie *ep)
+{
+   struct dw_pcie *pci = ep->pci;
+   struct device *dev = pci->dev;
+
+   ep->clk_res = devm_kzalloc(dev, sizeof(*ep->clk_res), GFP_KERNEL);
+   if (!ep->clk_res)
+   return -ENOMEM;
+
+   ep->clk_res->clk = devm_clk_get(dev, "pcie");
+   if (IS_ERR(ep->clk_res->clk)) {
+   dev_err(dev, "Failed to get pcie rc clock\n");
+   return PTR_ERR(ep->clk_res->clk);
+   }
+
+   ep->clk_res->bus_clk = devm_clk_get(dev, "pcie_bus");
+   if (IS_ERR(ep->clk_res->bus_clk)) {
+   dev_err(dev, "Failed to get pcie bus clock\n");
+   retur

[RFC 2/2] pci: dwc: pci-exynos: add the coedes to support the exynos5433

[Jaehoon Chung]

Exynos5433 has the PCIe for WiFi.
Add the codes relevant to PCIe for supporting the exynos5433.
Also changed the binding documentation name to
'samsung,exynos-pcie.txt'.
(It's not only exynos5440 anymore.)

Signed-off-by: Jaehoon Chung 
---
 ...exynos5440-pcie.txt => samsung,exynos-pcie.txt} |   2 +-
 drivers/pci/dwc/pci-exynos.c   | 183 -
 2 files changed, 144 insertions(+), 41 deletions(-)
 rename Documentation/devicetree/bindings/pci/{samsung,exynos5440-pcie.txt => 
samsung,exynos-pcie.txt} (97%)

diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt 
b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
similarity index 97%
rename from Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
rename to Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
index 34a11bfbfb60..958dcc150505 100644
--- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
@@ -4,7 +4,7 @@ This PCIe host controller is based on the Synopsys DesignWare 
PCIe IP
 and thus inherits all the common properties defined in designware-pcie.txt.
 
 Required properties:
-- compatible: "samsung,exynos5440-pcie"
+- compatible: "samsung,exynos5440-pcie" or "samsung,exynos5433-pcie"
 - reg: base addresses and lengths of the PCIe controller,
the PHY controller, additional register for the PHY controller.
(Registers for the PHY controller are DEPRECATED.
diff --git a/drivers/pci/dwc/pci-exynos.c b/drivers/pci/dwc/pci-exynos.c
index 5596fdedbb94..8dee2e90347e 100644
--- a/drivers/pci/dwc/pci-exynos.c
+++ b/drivers/pci/dwc/pci-exynos.c
@@ -40,6 +40,8 @@
 #define PCIE_IRQ_SPECIAL   0x008
 #define PCIE_IRQ_EN_PULSE  0x00c
 #define PCIE_IRQ_EN_LEVEL  0x010
+#define PCIE_SW_WAKE   0x018
+#define PCIE_BUS_ENBIT(1)
 #define IRQ_MSI_ENABLE BIT(2)
 #define PCIE_IRQ_EN_SPECIAL0x014
 #define PCIE_PWR_RESET 0x018
@@ -49,7 +51,8 @@
 #define PCIE_NONSTICKY_RESET   0x024
 #define PCIE_APP_INIT_RESET0x028
 #define PCIE_APP_LTSSM_ENABLE  0x02c
-#define PCIE_ELBI_RDLH_LINKUP  0x064
+#define PCIE_ELBI_RDLH_LINKUP  0x074
+#define PCIE_ELBI_XMLH_LINKUP  BIT(4)
 #define PCIE_ELBI_LTSSM_ENABLE 0x1
 #define PCIE_ELBI_SLV_AWMISC   0x11c
 #define PCIE_ELBI_SLV_ARMISC   0x120
@@ -94,6 +97,10 @@
 #define PCIE_PHY_TRSV3_PD_TSV  BIT(7)
 #define PCIE_PHY_TRSV3_LVCC0x31c
 
+/* DBI register */
+#define PCIE_MISC_CONTROL_1_OFF0x8BC
+#define DBI_RO_WR_EN   BIT(0)
+
 struct exynos_pcie_mem_res {
void __iomem *elbi_base;   /* DT 0th resource: PCIe CTRL */
void __iomem *phy_base;/* DT 1st resource: PHY CTRL */
@@ -221,6 +228,96 @@ static const struct exynos_pcie_ops exynos5440_pcie_ops = {
.deinit_clk_resources   = exynos5440_pcie_deinit_clk_resources,
 };
 
+static int exynos5433_pcie_get_mem_resources(struct platform_device *pdev,
+struct exynos_pcie *ep)
+{
+   struct dw_pcie *pci = ep->pci;
+   struct device *dev = pci->dev;
+   struct resource *res;
+
+   ep->mem_res = devm_kzalloc(dev, sizeof(*ep->mem_res), GFP_KERNEL);
+   if (!ep->mem_res)
+   return -ENOMEM;
+
+   /* External Local Bus interface(ELBI) Register */
+   res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "elbi");
+   ep->mem_res->elbi_base = devm_ioremap_resource(>dev, res);
+   if (IS_ERR(ep->mem_res->elbi_base))
+   return PTR_ERR(ep->mem_res->elbi_base);
+
+   /* Data Bus Interface(DBI) Register */
+   res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
+   pci->dbi_base = devm_ioremap_resource(>dev, res);
+   if (IS_ERR(pci->dbi_base))
+   return PTR_ERR(pci->dbi_base);
+
+   return 0;
+}
+
+static int exynos5433_pcie_get_clk_resources(struct exynos_pcie *ep)
+{
+   struct dw_pcie *pci = ep->pci;
+   struct device *dev = pci->dev;
+
+   ep->clk_res = devm_kzalloc(dev, sizeof(*ep->clk_res), GFP_KERNEL);
+   if (!ep->clk_res)
+   return -ENOMEM;
+
+   ep->clk_res->clk = devm_clk_get(dev, "pcie");
+   if (IS_ERR(ep->clk_res->clk)) {
+   dev_err(dev, "Failed to get pcie rc clock\n");
+   return PTR_ERR(ep->clk_res->clk);
+   }
+
+   ep->clk_res->bus_clk = devm_clk_get(dev, "pcie_bus");
+   if (IS_ERR(ep->clk_res->bus_clk)) {
+   dev_err(dev, "Failed to get pcie bus clock\n");
+   return PTR_ERR(ep->clk_res->bus_clk);

[RFC 2/2] pci: dwc: pci-exynos: add the codes to support the exynos5433

[Jaehoon Chung]

Exynos5433 has the PCIe for WiFi.
Added the codes relevant to PCIe for supporting the exynos5433.
Also changed the binding documentation name to
'samsung,exynos-pcie.txt'.
(It's not only exynos5440 anymore.)

Signed-off-by: Jaehoon Chung 
---
 ...exynos5440-pcie.txt => samsung,exynos-pcie.txt} |   2 +-
 drivers/pci/dwc/pci-exynos.c   | 183 -
 2 files changed, 144 insertions(+), 41 deletions(-)
 rename Documentation/devicetree/bindings/pci/{samsung,exynos5440-pcie.txt => 
samsung,exynos-pcie.txt} (97%)

diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt 
b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
similarity index 97%
rename from Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
rename to Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
index 34a11bfbfb60..958dcc150505 100644
--- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.txt
@@ -4,7 +4,7 @@ This PCIe host controller is based on the Synopsys DesignWare 
PCIe IP
 and thus inherits all the common properties defined in designware-pcie.txt.
 
 Required properties:
-- compatible: "samsung,exynos5440-pcie"
+- compatible: "samsung,exynos5440-pcie" or "samsung,exynos5433-pcie"
 - reg: base addresses and lengths of the PCIe controller,
the PHY controller, additional register for the PHY controller.
(Registers for the PHY controller are DEPRECATED.
diff --git a/drivers/pci/dwc/pci-exynos.c b/drivers/pci/dwc/pci-exynos.c
index 5596fdedbb94..8dee2e90347e 100644
--- a/drivers/pci/dwc/pci-exynos.c
+++ b/drivers/pci/dwc/pci-exynos.c
@@ -40,6 +40,8 @@
 #define PCIE_IRQ_SPECIAL   0x008
 #define PCIE_IRQ_EN_PULSE  0x00c
 #define PCIE_IRQ_EN_LEVEL  0x010
+#define PCIE_SW_WAKE   0x018
+#define PCIE_BUS_ENBIT(1)
 #define IRQ_MSI_ENABLE BIT(2)
 #define PCIE_IRQ_EN_SPECIAL0x014
 #define PCIE_PWR_RESET 0x018
@@ -49,7 +51,8 @@
 #define PCIE_NONSTICKY_RESET   0x024
 #define PCIE_APP_INIT_RESET0x028
 #define PCIE_APP_LTSSM_ENABLE  0x02c
-#define PCIE_ELBI_RDLH_LINKUP  0x064
+#define PCIE_ELBI_RDLH_LINKUP  0x074
+#define PCIE_ELBI_XMLH_LINKUP  BIT(4)
 #define PCIE_ELBI_LTSSM_ENABLE 0x1
 #define PCIE_ELBI_SLV_AWMISC   0x11c
 #define PCIE_ELBI_SLV_ARMISC   0x120
@@ -94,6 +97,10 @@
 #define PCIE_PHY_TRSV3_PD_TSV  BIT(7)
 #define PCIE_PHY_TRSV3_LVCC0x31c
 
+/* DBI register */
+#define PCIE_MISC_CONTROL_1_OFF0x8BC
+#define DBI_RO_WR_EN   BIT(0)
+
 struct exynos_pcie_mem_res {
void __iomem *elbi_base;   /* DT 0th resource: PCIe CTRL */
void __iomem *phy_base;/* DT 1st resource: PHY CTRL */
@@ -221,6 +228,96 @@ static const struct exynos_pcie_ops exynos5440_pcie_ops = {
.deinit_clk_resources   = exynos5440_pcie_deinit_clk_resources,
 };
 
+static int exynos5433_pcie_get_mem_resources(struct platform_device *pdev,
+struct exynos_pcie *ep)
+{
+   struct dw_pcie *pci = ep->pci;
+   struct device *dev = pci->dev;
+   struct resource *res;
+
+   ep->mem_res = devm_kzalloc(dev, sizeof(*ep->mem_res), GFP_KERNEL);
+   if (!ep->mem_res)
+   return -ENOMEM;
+
+   /* External Local Bus interface(ELBI) Register */
+   res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "elbi");
+   ep->mem_res->elbi_base = devm_ioremap_resource(>dev, res);
+   if (IS_ERR(ep->mem_res->elbi_base))
+   return PTR_ERR(ep->mem_res->elbi_base);
+
+   /* Data Bus Interface(DBI) Register */
+   res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
+   pci->dbi_base = devm_ioremap_resource(>dev, res);
+   if (IS_ERR(pci->dbi_base))
+   return PTR_ERR(pci->dbi_base);
+
+   return 0;
+}
+
+static int exynos5433_pcie_get_clk_resources(struct exynos_pcie *ep)
+{
+   struct dw_pcie *pci = ep->pci;
+   struct device *dev = pci->dev;
+
+   ep->clk_res = devm_kzalloc(dev, sizeof(*ep->clk_res), GFP_KERNEL);
+   if (!ep->clk_res)
+   return -ENOMEM;
+
+   ep->clk_res->clk = devm_clk_get(dev, "pcie");
+   if (IS_ERR(ep->clk_res->clk)) {
+   dev_err(dev, "Failed to get pcie rc clock\n");
+   return PTR_ERR(ep->clk_res->clk);
+   }
+
+   ep->clk_res->bus_clk = devm_clk_get(dev, "pcie_bus");
+   if (IS_ERR(ep->clk_res->bus_clk)) {
+   dev_err(dev, "Failed to get pcie bus clock\n");
+   return PTR_ERR(ep->clk_res->bus_clk);

[RFC 1/2] pci: dwc: pci-exynos: modify the Kconfig dependency

[Jaehoon Chung]

PCI_EXYNOS has the dependency with SOC_EXYNOS5440.
It's modified to ARCH_EXYNOS from SOC_EXYNOS5440, because other
SoCs needs to use this driver.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 drivers/pci/dwc/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig
index 113e09440f85..0ff9795df8e8 100644
--- a/drivers/pci/dwc/Kconfig
+++ b/drivers/pci/dwc/Kconfig
@@ -65,7 +65,7 @@ config PCIE_DW_PLAT
 config PCI_EXYNOS
bool "Samsung Exynos PCIe controller"
depends on PCI
-   depends on SOC_EXYNOS5440
+   depends on ARCH_EXYNOS
depends on PCI_MSI_IRQ_DOMAIN
select PCIEPORTBUS
select PCIE_DW_HOST
-- 
2.15.1

[RFC 1/2] pci: dwc: pci-exynos: modify the Kconfig dependency

[Jaehoon Chung]

PCI_EXYNOS has the dependency with SOC_EXYNOS5440.
It's modified to ARCH_EXYNOS from SOC_EXYNOS5440, because other
SoCs needs to use this driver.

Signed-off-by: Jaehoon Chung 
---
 drivers/pci/dwc/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig
index 113e09440f85..0ff9795df8e8 100644
--- a/drivers/pci/dwc/Kconfig
+++ b/drivers/pci/dwc/Kconfig
@@ -65,7 +65,7 @@ config PCIE_DW_PLAT
 config PCI_EXYNOS
bool "Samsung Exynos PCIe controller"
depends on PCI
-   depends on SOC_EXYNOS5440
+   depends on ARCH_EXYNOS
depends on PCI_MSI_IRQ_DOMAIN
select PCIEPORTBUS
select PCIE_DW_HOST
-- 
2.15.1

Re: [PATCH v2 3/5] mmc: dw_mmc: Add locking to the CTO timer

[Jaehoon Chung]

On 10/24/2017 02:59 AM, Doug Anderson wrote:
> Hi,
> 
> On Tue, Oct 17, 2017 at 9:40 AM, Doug Anderson <diand...@chromium.org> wrote:
>> ...
>> ...
>>> Yes, it looks hard to get concurrency right. I have a comment for your
>>> DRTO case(patch 5). Let's do some brainstorm there.
>>
>> Since your comments in this patch are positive and you've now added
>> your Reviewed-by to patch #5, I'm going to assume that you'd also like
>> your Reviewed-by on this patch?
>>
>>
>> Jaehoon: I think I have Shawn's review on all this series.  It would
>> be great if you could review them yourself and/or pick them up in your
>> tree.  Since they fix a regression on 4.14 we really don't want to
>> delay too long.  If you're busy, please yell and we can figure out a
>> way to get these in (either through Ulf directly or we should find
>> someone else to make a git tree and send a pull request).
> 
> Ulf: I still haven't heard anything for Jaehoon.  Do you have any
> interest in landing this series directly to your tree?  I think the
> whole series has been reviewed by Shawn.  I'm happy to re-post with
> collected tags or anything else you'd like.  It would be nice to get
> the regression fixed sooner rather than later...

Sorry. I didn't find this email in my mail-box. so i lost this.
Current i'm reading the comment history..Sorry for late. 

Best Regards,
Jaehoon Chung

> 
> Thanks!  :)
> 
> -Doug
> 
> 
> 

Re: [PATCH v2 3/5] mmc: dw_mmc: Add locking to the CTO timer

[Jaehoon Chung]

On 10/24/2017 02:59 AM, Doug Anderson wrote:
> Hi,
> 
> On Tue, Oct 17, 2017 at 9:40 AM, Doug Anderson  wrote:
>> ...
>> ...
>>> Yes, it looks hard to get concurrency right. I have a comment for your
>>> DRTO case(patch 5). Let's do some brainstorm there.
>>
>> Since your comments in this patch are positive and you've now added
>> your Reviewed-by to patch #5, I'm going to assume that you'd also like
>> your Reviewed-by on this patch?
>>
>>
>> Jaehoon: I think I have Shawn's review on all this series.  It would
>> be great if you could review them yourself and/or pick them up in your
>> tree.  Since they fix a regression on 4.14 we really don't want to
>> delay too long.  If you're busy, please yell and we can figure out a
>> way to get these in (either through Ulf directly or we should find
>> someone else to make a git tree and send a pull request).
> 
> Ulf: I still haven't heard anything for Jaehoon.  Do you have any
> interest in landing this series directly to your tree?  I think the
> whole series has been reviewed by Shawn.  I'm happy to re-post with
> collected tags or anything else you'd like.  It would be nice to get
> the regression fixed sooner rather than later...

Sorry. I didn't find this email in my mail-box. so i lost this.
Current i'm reading the comment history..Sorry for late. 

Best Regards,
Jaehoon Chung

> 
> Thanks!  :)
> 
> -Doug
> 
> 
> 

Re: [PATCH 0/9] Enable dw-mmc multi-card support

[Jaehoon Chung]

Sorry for late this..

On 10/18/2017 12:52 AM, Liming Sun wrote:
>>> Hrm it's so unlucky that your patchset comes a little late. As your 
>>> patch 8 and 9 said, you need them to fix problem for multi-card support, so 
>>> definitely there was no such use case, and even the code was buggy to 
>>> support it right? That makes the code hard to read and maintain, so we 
>>> decide to remove it.
> 
> Thanks for the feedback. Yes, earlier the multi-card support was buggy 
> indeed. We spent some time to debug it and got it working.
> 
>>> Havn'e check the databook for details yet, but I think it's ok to 
>>> re-introduce multi-slot support if a real user benefits from it. But you 
>>> need a new patch to silent the log "num-slots property not found, assuming 
>>> 1 slot is available" as we removed all the num-slots from DT at that time.
> 
> The " num-slots property not found..." log message has already been removed 
> by 8a629d26f back in 2016. Looks like we're good on this one. In dw_mci_probe 
> (), it has code to check pdata->num_slots. If 0, the host->num_slots will be 
> set to 1. So the logic of setting default num_slots seems already there. But 
> correct me if I am wrong.
> 
> Thanks,
> Liming
> 
> -Original Message-
> From: Shawn Lin [mailto:shawn@rock-chips.com] 
> Sent: Monday, October 16, 2017 9:36 PM
> To: Liming Sun <l...@mellanox.com>; Jaehoon Chung <jh80.ch...@samsung.com>
> Cc: Ulf Hansson <ulf.hans...@linaro.org>; Rob Herring <robh...@kernel.org>; 
> Mark Rutland <mark.rutl...@arm.com>; Kukjin Kim <kg...@kernel.org>; Krzysztof 
> Kozlowski <k...@kernel.org>; shawn@rock-chips.com; 
> linux-...@vger.kernel.org; devicet...@vger.kernel.org; 
> linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; 
> linux-samsung-...@vger.kernel.org
> Subject: Re: [PATCH 0/9] Enable dw-mmc multi-card support
> 
> 
> On 2017/10/7 3:21, Liming Sun wrote:
>> This series of commits enables the multi-card support for the dw-mmc 
>> controller. It includes two parts as below.
>>
>> The first part (patches 1-7) reverts the series of recent commits that 
>> removed the multi-card support with comments saying there was no such 
>> use case in the real world. Actually this feature is being used in 
>> Mellanox Bluefield SoC and has been requested by customers.
> 
> Hrm it's so unlucky that your patchset comes a little late. As your patch 
> 8 and 9 said, you need them to fix problem for multi-card support, so 
> definitely there was no such use case, and even the code was buggy to support 
> it right? That makes the code hard to read and maintain, so we decide to 
> remove it.

Hmm..
Well, if i missed your reply for my removing patch, it's my fault..but i didn't 
see any reply..
At that time, we didn't see any usage and also now...

Are there any patches for using multi slot? 
e,g) device-tree file or your own driver

If there are big benefits to revert them,  i don't want to back them..during 
almost 6 years, never use it..

> 
>>
>> The second part (patches 8-9) fixes the DesignWare multi-card support 
>> according to the dw-mmc databook (synnopsys: DesignWare Cores Mobile 
>> Storage Host Databook, 2.70a). It has changes to set the card number 
>> into the CMD register to multiplex requests to different cards when 
>> working in SD_MMC_CEATA mode, set the CTYPE / CLKENA / CDTHRCTL 
>> registers properly according to the spec, and parse the per-card 
>> configuration to match the Linux Documentation 
>> (bindings/mmc/synopsys-dw-mshc.txt).

the second part seems that it's only support since v2.70a..?

> 
> Havn'e check the databook for details yet, but I think it's ok to 
> re-introduce multi-slot support if a real user benefits from it. But you need 
> a new patch to silent the log "num-slots property not found, assuming 1 slot 
> is available" as we removed all the num-slots from DT at that time.
> 
> 
>>
>> Liming Sun (9):
>>Revert "Documentation: dw-mshc: deprecate num-slots"
>>Revert "mmc: dw_mmc: remove the unnecessary slot variable"
>>Revert "mmc: dw_mmc: use the 'slot' instead of 'cur_slot'"
>>Revert "mmc: dw_mmc: remove the 'id' arguments about functions
>>  relevant to slot"
>>Revert "mmc: dw_mmc: change the array of slots"
>>Revert "mmc: dw_mmc: remove the loop about finding slots"
>>Revert "mmc: dw_mmc: deprecated the "num-slots" property"
>>mmc: dw_mmc: Support two SD_MMC_CE-ATA cards
>>mmc: dw_mmc: Parse slot-specific configuration
>>
>>   .../devicetree/bindings/mmc/synopsys-dw-mshc.txt   |  16 +-
>>   drivers/mmc/host/dw_mmc-exynos.c   |   4 +-
>>   drivers/mmc/host/dw_mmc.c  | 277 
>> -
>>   drivers/mmc/host/dw_mmc.h  |  17 +-
>>   4 files changed, 236 insertions(+), 78 deletions(-)
>>
> 
> 
> 
> 

Re: [PATCH 0/9] Enable dw-mmc multi-card support

[Jaehoon Chung]

Sorry for late this..

On 10/18/2017 12:52 AM, Liming Sun wrote:
>>> Hrm it's so unlucky that your patchset comes a little late. As your 
>>> patch 8 and 9 said, you need them to fix problem for multi-card support, so 
>>> definitely there was no such use case, and even the code was buggy to 
>>> support it right? That makes the code hard to read and maintain, so we 
>>> decide to remove it.
> 
> Thanks for the feedback. Yes, earlier the multi-card support was buggy 
> indeed. We spent some time to debug it and got it working.
> 
>>> Havn'e check the databook for details yet, but I think it's ok to 
>>> re-introduce multi-slot support if a real user benefits from it. But you 
>>> need a new patch to silent the log "num-slots property not found, assuming 
>>> 1 slot is available" as we removed all the num-slots from DT at that time.
> 
> The " num-slots property not found..." log message has already been removed 
> by 8a629d26f back in 2016. Looks like we're good on this one. In dw_mci_probe 
> (), it has code to check pdata->num_slots. If 0, the host->num_slots will be 
> set to 1. So the logic of setting default num_slots seems already there. But 
> correct me if I am wrong.
> 
> Thanks,
> Liming
> 
> -Original Message-
> From: Shawn Lin [mailto:shawn@rock-chips.com] 
> Sent: Monday, October 16, 2017 9:36 PM
> To: Liming Sun ; Jaehoon Chung 
> Cc: Ulf Hansson ; Rob Herring ; 
> Mark Rutland ; Kukjin Kim ; Krzysztof 
> Kozlowski ; shawn@rock-chips.com; 
> linux-...@vger.kernel.org; devicet...@vger.kernel.org; 
> linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; 
> linux-samsung-...@vger.kernel.org
> Subject: Re: [PATCH 0/9] Enable dw-mmc multi-card support
> 
> 
> On 2017/10/7 3:21, Liming Sun wrote:
>> This series of commits enables the multi-card support for the dw-mmc 
>> controller. It includes two parts as below.
>>
>> The first part (patches 1-7) reverts the series of recent commits that 
>> removed the multi-card support with comments saying there was no such 
>> use case in the real world. Actually this feature is being used in 
>> Mellanox Bluefield SoC and has been requested by customers.
> 
> Hrm it's so unlucky that your patchset comes a little late. As your patch 
> 8 and 9 said, you need them to fix problem for multi-card support, so 
> definitely there was no such use case, and even the code was buggy to support 
> it right? That makes the code hard to read and maintain, so we decide to 
> remove it.

Hmm..
Well, if i missed your reply for my removing patch, it's my fault..but i didn't 
see any reply..
At that time, we didn't see any usage and also now...

Are there any patches for using multi slot? 
e,g) device-tree file or your own driver

If there are big benefits to revert them,  i don't want to back them..during 
almost 6 years, never use it..

> 
>>
>> The second part (patches 8-9) fixes the DesignWare multi-card support 
>> according to the dw-mmc databook (synnopsys: DesignWare Cores Mobile 
>> Storage Host Databook, 2.70a). It has changes to set the card number 
>> into the CMD register to multiplex requests to different cards when 
>> working in SD_MMC_CEATA mode, set the CTYPE / CLKENA / CDTHRCTL 
>> registers properly according to the spec, and parse the per-card 
>> configuration to match the Linux Documentation 
>> (bindings/mmc/synopsys-dw-mshc.txt).

the second part seems that it's only support since v2.70a..?

> 
> Havn'e check the databook for details yet, but I think it's ok to 
> re-introduce multi-slot support if a real user benefits from it. But you need 
> a new patch to silent the log "num-slots property not found, assuming 1 slot 
> is available" as we removed all the num-slots from DT at that time.
> 
> 
>>
>> Liming Sun (9):
>>Revert "Documentation: dw-mshc: deprecate num-slots"
>>Revert "mmc: dw_mmc: remove the unnecessary slot variable"
>>Revert "mmc: dw_mmc: use the 'slot' instead of 'cur_slot'"
>>Revert "mmc: dw_mmc: remove the 'id' arguments about functions
>>  relevant to slot"
>>Revert "mmc: dw_mmc: change the array of slots"
>>Revert "mmc: dw_mmc: remove the loop about finding slots"
>>Revert "mmc: dw_mmc: deprecated the "num-slots" property"
>>mmc: dw_mmc: Support two SD_MMC_CE-ATA cards
>>mmc: dw_mmc: Parse slot-specific configuration
>>
>>   .../devicetree/bindings/mmc/synopsys-dw-mshc.txt   |  16 +-
>>   drivers/mmc/host/dw_mmc-exynos.c   |   4 +-
>>   drivers/mmc/host/dw_mmc.c  | 277 
>> -
>>   drivers/mmc/host/dw_mmc.h  |  17 +-
>>   4 files changed, 236 insertions(+), 78 deletions(-)
>>
> 
> 
> 
> 

Re: [PATCH v5] mmc: dw_mmc-k3: add sd support for hi3660

[Jaehoon Chung]

Hi,

To Guodong, if you can forward this to Li Wei, plz do it. Sorry.

On 07/03/2017 10:06 AM, liwei wrote:
> 
> Add sd card support for hi3660 soc

Need the patch for adding "hi3660-dw-mshc" compatible 
Documentation/devicetree/bindings/k3-dw-mshc.txt

And added the minor comments.

> 
> Major changes in v3:
>  - solve review comments from Heiner Kallweit.
>*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
>*use usleep_range() replace udelay() and mdelay().
> 
> Major changes in v4:
>  - solve review comments from Jaehoon Chung.
>*move common register for dwmmc controller to dwmmc header file.
>*modify definitions type of some register variables.
>*get rid of the magic numbers.
> 
> Major changes in v5:
>  - further improve coding style.
> ---
>  drivers/mmc/host/dw_mmc-k3.c | 315 
> +++
>  drivers/mmc/host/dw_mmc.h|   2 +
>  2 files changed, 317 insertions(+)
> 
> diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
> index e38fb0020bb1..a28eb8c7da82 100644
> --- a/drivers/mmc/host/dw_mmc-k3.c
> +++ b/drivers/mmc/host/dw_mmc-k3.c
> @@ -8,6 +8,8 @@
>   * (at your option) any later version.
>   */
>  
> +#include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -28,7 +30,38 @@
>  #define AO_SCTRL_SEL18   BIT(10)
>  #define AO_SCTRL_CTRL3   0x40C
>  
> +#define DWMMC_SDIO_ID 2
> +
> +#define SOC_SCTRL_SCPERCTRL5(0x314)
> +#define SDCARD_IO_SEL18 BIT(2)
> +
> +#define SDCARD_RD_THRESHOLD  (512)
> +
> +#define GENCLK_DIV (7)
> +
> +#define GPIO_CLK_ENABLE   BIT(16)
> +#define GPIO_CLK_DIV_MASK GENMASK(11, 8)
> +#define GPIO_USE_SAMPLE_DLY_MASK  GENMASK(13, 13)
> +#define UHS_REG_EXT_SAMPLE_PHASE_MASK GENMASK(20, 16)
> +#define UHS_REG_EXT_SAMPLE_DRVPHASE_MASK  GENMASK(25, 21)
> +#define UHS_REG_EXT_SAMPLE_DLY_MASK   GENMASK(30, 26)
> +
> +#define TIMING_MODE 3
> +#define TIMING_CFG_NUM 10
> +
> +#define PULL_DOWN BIT(1)
> +#define PULL_UP   BIT(0)
> +
> +#define NUM_PHASES (40)
> +
> +#define ENABLE_SHIFT_MIN_SMPL (4)
> +#define ENABLE_SHIFT_MAX_SMPL (12)
> +#define USE_DLY_MIN_SMPL (11)
> +#define USE_DLY_MAX_SMPL (14)
> +
>  struct k3_priv {
> + int ctrl_id;
> + u32 cur_speed;
>   struct regmap   *reg;
>  };
>  
> @@ -38,6 +71,41 @@ static unsigned long dw_mci_hi6220_caps[] = {
>   0
>  };
>  
> +struct hs_timing {
> + u32 drv_phase;
> + u32 smpl_dly;
> + u32 smpl_phase_max;
> + u32 smpl_phase_min;
> +};
> +
> +struct hs_timing hs_timing_cfg[TIMING_MODE][TIMING_CFG_NUM] = {
> + { /* reserved */ },
> + { /* SD */
> + {7, 0, 15, 15,},  /* 0: LEGACY 400k */
> + {6, 0,  4,  4,},  /* 1: MMC_HS */
> + {6, 0,  3,  3,},  /* 2: SD_HS */
> + {6, 0, 15, 15,},  /* 3: SDR12 */
> + {6, 0,  2,  2,},  /* 4: SDR25 */
> + {4, 0, 11,  0,},  /* 5: SDR50 */
> + {6, 4, 15,  0,},  /* 6: SDR104 */
> + {0},  /* 7: DDR50 */
> + {0},  /* 8: DDR52 */
> + {0},  /* 9: HS200 */
> + },
> + { /* SDIO */
> + {7, 0, 15, 15,},  /* 0: LEGACY 400k */
> + {0},  /* 1: MMC_HS */
> + {6, 0, 15, 15,},  /* 2: SD_HS */
> + {6, 0, 15, 15,},  /* 3: SDR12 */
> + {6, 0,  0,  0,},  /* 4: SDR25 */
> + {4, 0, 12,  0,},  /* 5: SDR50 */
> + {5, 4, 15,  0,},  /* 6: SDR104 */
> + {0},  /* 7: DDR50 */
> + {0},  /* 8: DDR52 */
> + {0},  /* 9: HS200 */
> + }
> +};
> +
>  static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios)
>  {
>   int ret;
> @@ -66,6 +134,10 @@ static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
>   if (IS_ERR(priv->reg))
>   priv->reg = NULL;
>  
> + priv->ctrl_id = of_alias_get_id(host->dev->of_node, "mshc");
> + if (priv->ctrl_id < 0)
> + priv->ctrl_id = 0;
> +
>   host->priv = priv;
>   return 0;
>  }
> @@ -144,7 +216,245 @@ static const struct dw_mci_drv_data hi6220_data = {
>   .execute_tuning = dw_mci_hi6220_execute_tuning,
>  };
>  
> +static void dw_mci_hs_set_timing(struct dw_mci *host, int timing,
> +  int smpl_phase)
> +{
> + u32 drv_phase;
> + u32 smpl_dly;
> + u32 use_smpl_dly = 0;
>

Re: [PATCH v5] mmc: dw_mmc-k3: add sd support for hi3660

[Jaehoon Chung]

Hi,

To Guodong, if you can forward this to Li Wei, plz do it. Sorry.

On 07/03/2017 10:06 AM, liwei wrote:
> 
> Add sd card support for hi3660 soc

Need the patch for adding "hi3660-dw-mshc" compatible 
Documentation/devicetree/bindings/k3-dw-mshc.txt

And added the minor comments.

> 
> Major changes in v3:
>  - solve review comments from Heiner Kallweit.
>*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
>*use usleep_range() replace udelay() and mdelay().
> 
> Major changes in v4:
>  - solve review comments from Jaehoon Chung.
>*move common register for dwmmc controller to dwmmc header file.
>*modify definitions type of some register variables.
>*get rid of the magic numbers.
> 
> Major changes in v5:
>  - further improve coding style.
> ---
>  drivers/mmc/host/dw_mmc-k3.c | 315 
> +++
>  drivers/mmc/host/dw_mmc.h|   2 +
>  2 files changed, 317 insertions(+)
> 
> diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
> index e38fb0020bb1..a28eb8c7da82 100644
> --- a/drivers/mmc/host/dw_mmc-k3.c
> +++ b/drivers/mmc/host/dw_mmc-k3.c
> @@ -8,6 +8,8 @@
>   * (at your option) any later version.
>   */
>  
> +#include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -28,7 +30,38 @@
>  #define AO_SCTRL_SEL18   BIT(10)
>  #define AO_SCTRL_CTRL3   0x40C
>  
> +#define DWMMC_SDIO_ID 2
> +
> +#define SOC_SCTRL_SCPERCTRL5(0x314)
> +#define SDCARD_IO_SEL18 BIT(2)
> +
> +#define SDCARD_RD_THRESHOLD  (512)
> +
> +#define GENCLK_DIV (7)
> +
> +#define GPIO_CLK_ENABLE   BIT(16)
> +#define GPIO_CLK_DIV_MASK GENMASK(11, 8)
> +#define GPIO_USE_SAMPLE_DLY_MASK  GENMASK(13, 13)
> +#define UHS_REG_EXT_SAMPLE_PHASE_MASK GENMASK(20, 16)
> +#define UHS_REG_EXT_SAMPLE_DRVPHASE_MASK  GENMASK(25, 21)
> +#define UHS_REG_EXT_SAMPLE_DLY_MASK   GENMASK(30, 26)
> +
> +#define TIMING_MODE 3
> +#define TIMING_CFG_NUM 10
> +
> +#define PULL_DOWN BIT(1)
> +#define PULL_UP   BIT(0)
> +
> +#define NUM_PHASES (40)
> +
> +#define ENABLE_SHIFT_MIN_SMPL (4)
> +#define ENABLE_SHIFT_MAX_SMPL (12)
> +#define USE_DLY_MIN_SMPL (11)
> +#define USE_DLY_MAX_SMPL (14)
> +
>  struct k3_priv {
> + int ctrl_id;
> + u32 cur_speed;
>   struct regmap   *reg;
>  };
>  
> @@ -38,6 +71,41 @@ static unsigned long dw_mci_hi6220_caps[] = {
>   0
>  };
>  
> +struct hs_timing {
> + u32 drv_phase;
> + u32 smpl_dly;
> + u32 smpl_phase_max;
> + u32 smpl_phase_min;
> +};
> +
> +struct hs_timing hs_timing_cfg[TIMING_MODE][TIMING_CFG_NUM] = {
> + { /* reserved */ },
> + { /* SD */
> + {7, 0, 15, 15,},  /* 0: LEGACY 400k */
> + {6, 0,  4,  4,},  /* 1: MMC_HS */
> + {6, 0,  3,  3,},  /* 2: SD_HS */
> + {6, 0, 15, 15,},  /* 3: SDR12 */
> + {6, 0,  2,  2,},  /* 4: SDR25 */
> + {4, 0, 11,  0,},  /* 5: SDR50 */
> + {6, 4, 15,  0,},  /* 6: SDR104 */
> + {0},  /* 7: DDR50 */
> + {0},  /* 8: DDR52 */
> + {0},  /* 9: HS200 */
> + },
> + { /* SDIO */
> + {7, 0, 15, 15,},  /* 0: LEGACY 400k */
> + {0},  /* 1: MMC_HS */
> + {6, 0, 15, 15,},  /* 2: SD_HS */
> + {6, 0, 15, 15,},  /* 3: SDR12 */
> + {6, 0,  0,  0,},  /* 4: SDR25 */
> + {4, 0, 12,  0,},  /* 5: SDR50 */
> + {5, 4, 15,  0,},  /* 6: SDR104 */
> + {0},  /* 7: DDR50 */
> + {0},  /* 8: DDR52 */
> + {0},  /* 9: HS200 */
> + }
> +};
> +
>  static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios)
>  {
>   int ret;
> @@ -66,6 +134,10 @@ static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
>   if (IS_ERR(priv->reg))
>   priv->reg = NULL;
>  
> + priv->ctrl_id = of_alias_get_id(host->dev->of_node, "mshc");
> + if (priv->ctrl_id < 0)
> + priv->ctrl_id = 0;
> +
>   host->priv = priv;
>   return 0;
>  }
> @@ -144,7 +216,245 @@ static const struct dw_mci_drv_data hi6220_data = {
>   .execute_tuning = dw_mci_hi6220_execute_tuning,
>  };
>  
> +static void dw_mci_hs_set_timing(struct dw_mci *host, int timing,
> +  int smpl_phase)
> +{
> + u32 drv_phase;
> + u32 smpl_dly;
> + u32 use_smpl_dly = 0;
>

Re: [PATCH v3] mmc: dw_mmc-k3: add sd support for hi3660

[Jaehoon Chung]

Hi,

On 06/12/2017 11:27 PM, Jaehoon Chung wrote:
> Hi Li,
> 
> On 2017년 06월 12일 16:46, liwei wrote:
>> Add sd card support for hi3660 soc
>>
>> Major changes in v3:
>>  - solve review comments from Heiner Kallweit.
>>*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
>>*use usleep_range() replace udelay() and mdelay().
> 
> I had added the some comments about your previous patch.
> Refer to below...
> 
> https://patchwork.kernel.org/patch/9747495/

Before sending patch, run checkpatch...I will not apply this patch.

Best Regards,
Jaehoon Chung

> 
>>
>> Signed-off-by: Li Wei <liwei...@huawei.com>
>> Signed-off-by: Chen Jun <chenju...@huawei.com>
>> ---
> 
> Locate changelog at here.
> 
> Best Regards,
> Jaehoon Chung
> 
>>  drivers/mmc/host/dw_mmc-k3.c | 314 
>> +++
>>  1 file changed, 314 insertions(+)
>>
>> diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
>> index e38fb0020bb1..a6e13bd83b9f 100644
>> --- a/drivers/mmc/host/dw_mmc-k3.c
>> +++ b/drivers/mmc/host/dw_mmc-k3.c
>> @@ -8,6 +8,8 @@
>>   * (at your option) any later version.
>>   */
>>  
>> +#include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>> @@ -28,7 +30,40 @@
>>  #define AO_SCTRL_SEL18  BIT(10)
>>  #define AO_SCTRL_CTRL3  0x40C
>>  
>> +#define DWMMC_SD_ID   1
>> +#define DWMMC_SDIO_ID 2
>> +
>> +#define SOC_SCTRL_SCPERCTRL5(0x314)
>> +#define SDCARD_IO_SEL18 BIT(2)
>> +
>> +#define GENCLK_DIV (7)
>> +
>> +#define GPIO_CLK_ENABLE   BIT(16)
>> +#define GPIO_CLK_DIV_MASK GENMASK(11, 8)
>> +#define GPIO_USE_SAMPLE_DLY_MASK  GENMASK(13, 13)
>> +#define UHS_REG_EXT_SAMPLE_PHASE_MASK GENMASK(20, 16)
>> +#define UHS_REG_EXT_SAMPLE_DRVPHASE_MASK  GENMASK(25, 21)
>> +#define UHS_REG_EXT_SAMPLE_DLY_MASK   GENMASK(30, 26)
>> +
>> +#define SDMMC_UHS_REG_EXT   0x108
>> +#define SDMMC_ENABLE_SHIFT  0x110
>> +
>> +#define TIMING_MODE 3
>> +#define TIMING_CFG_NUM 10
>> +
>> +#define PULL_DOWN BIT(1)
>> +#define PULL_UP   BIT(0)
>> +
>> +#define NUM_PHASES (40)
>> +
>> +#define ENABLE_SHIFT_MIN_SMPL (4)
>> +#define ENABLE_SHIFT_MAX_SMPL (12)
>> +#define USE_DLY_MIN_SMPL (11)
>> +#define USE_DLY_MAX_SMPL (14)
>> +
>>  struct k3_priv {
>> +u8 ctrl_id;
>> +u32 cur_speed;
>>  struct regmap   *reg;
>>  };
>>  
>> @@ -38,6 +73,41 @@ static unsigned long dw_mci_hi6220_caps[] = {
>>  0
>>  };
>>  
>> +struct hs_timing {
>> +int drv_phase;
>> +int sam_dly;
>> +int sam_phase_max;
>> +int sam_phase_min;
>> +};
>> +
>> +struct hs_timing hs_timing_cfg[TIMING_MODE][TIMING_CFG_NUM] = {
>> +{ /* reserved */ },
>> +{ /* SD */
>> +{7, 0, 15, 15,},  /* 0: LEGACY 400k */
>> +{6, 0,  4,  4,},  /* 1: MMC_HS */
>> +{6, 0,  3,  3,},  /* 2: SD_HS */
>> +{6, 0, 15, 15,},  /* 3: SDR12 */
>> +{6, 0,  2,  2,},  /* 4: SDR25 */
>> +{4, 0, 11,  0,},  /* 5: SDR50 */
>> +{6, 4, 15,  0,},  /* 6: SDR104 */
>> +{0},  /* 7: DDR50 */
>> +{0},  /* 8: DDR52 */
>> +{0},  /* 9: HS200 */
>> +},
>> +{ /* SDIO */
>> +{7, 0, 15, 15,},  /* 0: LEGACY 400k */
>> +{0},  /* 1: MMC_HS */
>> +{6, 0, 15, 15,},  /* 2: SD_HS */
>> +{6, 0, 15, 15,},  /* 3: SDR12 */
>> +{6, 0,  0,  0,},  /* 4: SDR25 */
>> +{4, 0, 12,  0,},  /* 5: SDR50 */
>> +{5, 4, 15,  0,},  /* 6: SDR104 */
>> +{0},  /* 7: DDR50 */
>> +{0},  /* 8: DDR52 */
>> +{0},  /* 9: HS200 */
>> +}
>> +};
>> +
>>  static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios)
>>  {
>>  int ret;
>> @@ -66,6 +136,10 @@ static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
>>  if (IS_ERR(priv->reg))
>>  priv->reg = NULL;
>>  
>> +priv->ctrl_id = of_alias_get_id(host->dev->of_node, "mshc");
>> +if (priv->ctrl_id < 0)
>> +priv->ctrl_id = 0;
>> +
>>  host->p

Re: [PATCH v3] mmc: dw_mmc-k3: add sd support for hi3660

[Jaehoon Chung]

Hi,

On 06/12/2017 11:27 PM, Jaehoon Chung wrote:
> Hi Li,
> 
> On 2017년 06월 12일 16:46, liwei wrote:
>> Add sd card support for hi3660 soc
>>
>> Major changes in v3:
>>  - solve review comments from Heiner Kallweit.
>>*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
>>*use usleep_range() replace udelay() and mdelay().
> 
> I had added the some comments about your previous patch.
> Refer to below...
> 
> https://patchwork.kernel.org/patch/9747495/

Before sending patch, run checkpatch...I will not apply this patch.

Best Regards,
Jaehoon Chung

> 
>>
>> Signed-off-by: Li Wei 
>> Signed-off-by: Chen Jun 
>> ---
> 
> Locate changelog at here.
> 
> Best Regards,
> Jaehoon Chung
> 
>>  drivers/mmc/host/dw_mmc-k3.c | 314 
>> +++
>>  1 file changed, 314 insertions(+)
>>
>> diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
>> index e38fb0020bb1..a6e13bd83b9f 100644
>> --- a/drivers/mmc/host/dw_mmc-k3.c
>> +++ b/drivers/mmc/host/dw_mmc-k3.c
>> @@ -8,6 +8,8 @@
>>   * (at your option) any later version.
>>   */
>>  
>> +#include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>> @@ -28,7 +30,40 @@
>>  #define AO_SCTRL_SEL18  BIT(10)
>>  #define AO_SCTRL_CTRL3  0x40C
>>  
>> +#define DWMMC_SD_ID   1
>> +#define DWMMC_SDIO_ID 2
>> +
>> +#define SOC_SCTRL_SCPERCTRL5(0x314)
>> +#define SDCARD_IO_SEL18 BIT(2)
>> +
>> +#define GENCLK_DIV (7)
>> +
>> +#define GPIO_CLK_ENABLE   BIT(16)
>> +#define GPIO_CLK_DIV_MASK GENMASK(11, 8)
>> +#define GPIO_USE_SAMPLE_DLY_MASK  GENMASK(13, 13)
>> +#define UHS_REG_EXT_SAMPLE_PHASE_MASK GENMASK(20, 16)
>> +#define UHS_REG_EXT_SAMPLE_DRVPHASE_MASK  GENMASK(25, 21)
>> +#define UHS_REG_EXT_SAMPLE_DLY_MASK   GENMASK(30, 26)
>> +
>> +#define SDMMC_UHS_REG_EXT   0x108
>> +#define SDMMC_ENABLE_SHIFT  0x110
>> +
>> +#define TIMING_MODE 3
>> +#define TIMING_CFG_NUM 10
>> +
>> +#define PULL_DOWN BIT(1)
>> +#define PULL_UP   BIT(0)
>> +
>> +#define NUM_PHASES (40)
>> +
>> +#define ENABLE_SHIFT_MIN_SMPL (4)
>> +#define ENABLE_SHIFT_MAX_SMPL (12)
>> +#define USE_DLY_MIN_SMPL (11)
>> +#define USE_DLY_MAX_SMPL (14)
>> +
>>  struct k3_priv {
>> +u8 ctrl_id;
>> +u32 cur_speed;
>>  struct regmap   *reg;
>>  };
>>  
>> @@ -38,6 +73,41 @@ static unsigned long dw_mci_hi6220_caps[] = {
>>  0
>>  };
>>  
>> +struct hs_timing {
>> +int drv_phase;
>> +int sam_dly;
>> +int sam_phase_max;
>> +int sam_phase_min;
>> +};
>> +
>> +struct hs_timing hs_timing_cfg[TIMING_MODE][TIMING_CFG_NUM] = {
>> +{ /* reserved */ },
>> +{ /* SD */
>> +{7, 0, 15, 15,},  /* 0: LEGACY 400k */
>> +{6, 0,  4,  4,},  /* 1: MMC_HS */
>> +{6, 0,  3,  3,},  /* 2: SD_HS */
>> +{6, 0, 15, 15,},  /* 3: SDR12 */
>> +{6, 0,  2,  2,},  /* 4: SDR25 */
>> +{4, 0, 11,  0,},  /* 5: SDR50 */
>> +{6, 4, 15,  0,},  /* 6: SDR104 */
>> +{0},  /* 7: DDR50 */
>> +{0},  /* 8: DDR52 */
>> +{0},  /* 9: HS200 */
>> +},
>> +{ /* SDIO */
>> +{7, 0, 15, 15,},  /* 0: LEGACY 400k */
>> +{0},  /* 1: MMC_HS */
>> +{6, 0, 15, 15,},  /* 2: SD_HS */
>> +{6, 0, 15, 15,},  /* 3: SDR12 */
>> +{6, 0,  0,  0,},  /* 4: SDR25 */
>> +{4, 0, 12,  0,},  /* 5: SDR50 */
>> +{5, 4, 15,  0,},  /* 6: SDR104 */
>> +{0},  /* 7: DDR50 */
>> +{0},  /* 8: DDR52 */
>> +{0},  /* 9: HS200 */
>> +}
>> +};
>> +
>>  static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios)
>>  {
>>  int ret;
>> @@ -66,6 +136,10 @@ static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
>>  if (IS_ERR(priv->reg))
>>  priv->reg = NULL;
>>  
>> +priv->ctrl_id = of_alias_get_id(host->dev->of_node, "mshc");
>> +if (priv->ctrl_id < 0)
>> +priv->ctrl_id = 0;
>> +
>>  host->priv = priv;
>>  return 0;
>

[PATCH v2] ARM: dts: rv1108: change to "max-frequency" from "clock-freq-min-max"

[Jaehoon Chung]

"clock-freq-min-max" was deprecated. There is only using in rv1108.dtsi.
Use the "max-frequency" for removiing "clock-freq-min-max" in future.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
Changelog on V2:
- Rebased on Heiko's git repository (v4.13-armsoc/dts32 branch)

 arch/arm/boot/dts/rv1108.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 437098b..6a3da2d 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -174,7 +174,7 @@
 
emmc: dwmmc@3011 {
compatible = "rockchip,rv1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 15000>;
+   max-frequency = <15000>;
clocks = < HCLK_EMMC>, < SCLK_EMMC>,
 < SCLK_EMMC_DRV>, < SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -186,7 +186,7 @@
 
sdio: dwmmc@3012 {
compatible = "rockchip,rv1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 15000>;
+   max-frequency = <15000>;
clocks = < HCLK_SDIO>, < SCLK_SDIO>,
 < SCLK_SDIO_DRV>, < SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -198,7 +198,7 @@
 
sdmmc: dwmmc@3013 {
compatible = "rockchip,rv1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 1>;
+   max-frequency = <1>;
clocks = < HCLK_SDMMC>, < SCLK_SDMMC>,
 < SCLK_SDMMC_DRV>, < SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
-- 
2.10.2

[PATCH v2] ARM: dts: rv1108: change to "max-frequency" from "clock-freq-min-max"

[Jaehoon Chung]

"clock-freq-min-max" was deprecated. There is only using in rv1108.dtsi.
Use the "max-frequency" for removiing "clock-freq-min-max" in future.

Signed-off-by: Jaehoon Chung 
---
Changelog on V2:
- Rebased on Heiko's git repository (v4.13-armsoc/dts32 branch)

 arch/arm/boot/dts/rv1108.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 437098b..6a3da2d 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -174,7 +174,7 @@
 
emmc: dwmmc@3011 {
compatible = "rockchip,rv1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 15000>;
+   max-frequency = <15000>;
clocks = < HCLK_EMMC>, < SCLK_EMMC>,
 < SCLK_EMMC_DRV>, < SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -186,7 +186,7 @@
 
sdio: dwmmc@3012 {
compatible = "rockchip,rv1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 15000>;
+   max-frequency = <15000>;
clocks = < HCLK_SDIO>, < SCLK_SDIO>,
 < SCLK_SDIO_DRV>, < SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -198,7 +198,7 @@
 
sdmmc: dwmmc@3013 {
compatible = "rockchip,rv1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 1>;
+   max-frequency = <1>;
clocks = < HCLK_SDMMC>, < SCLK_SDMMC>,
 < SCLK_SDMMC_DRV>, < SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
-- 
2.10.2

Re: [PATCH] ARM: dts: rk1108: change to "max-frequency" from "clock-freq-min-max"

[Jaehoon Chung]

Hi,

On 06/06/2017 10:15 AM, Andy Yan wrote:
> Hi Jaehoon:
> 
> 
> 2017-06-01 12:43 GMT+08:00 Jaehoon Chung <jh80.ch...@samsung.com>:
> 
>> "clock-freq-min-max" was deprecated. There is only using in rk1108.dtsi.
>> Use the "max-frequency" for removiing "clock-freq-min-max" in future.
>>
>> Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
>> ---
>>  arch/arm/boot/dts/rk1108.dtsi | 6 +++---
>>  1 file changed, 3 insertions(+), 3 deletions(-)
>>
>>
>   This file now renamed to rv1108.dtsi as rockchip official named it as
> RV1108.
>The rename patch now is in Heiko's linux-rockchip tree:v4.13 dts32,
> maybe you should rebase this patch on it.

Thanks for noticing this. After checking it, i will resend the patch.

Best Regards,
Jaehoon Chung

> 
> diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
>> index 1297924..a9b5293 100644
>> --- a/arch/arm/boot/dts/rk1108.dtsi
>> +++ b/arch/arm/boot/dts/rk1108.dtsi
>> @@ -174,7 +174,7 @@
>>
>> emmc: dwmmc@3011 {
>> compatible = "rockchip,rk1108-dw-mshc",
>> "rockchip,rk3288-dw-mshc";
>> -   clock-freq-min-max = <40 15000>;
>> +   max-frequency = <15000>;
>> clocks = < HCLK_EMMC>, < SCLK_EMMC>,
>>  < SCLK_EMMC_DRV>, < SCLK_EMMC_SAMPLE>;
>> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>> @@ -186,7 +186,7 @@
>>
>> sdio: dwmmc@3012 {
>> compatible = "rockchip,rk1108-dw-mshc",
>> "rockchip,rk3288-dw-mshc";
>> -   clock-freq-min-max = <40 15000>;
>> +   max-frequency = <15000>;
>> clocks = < HCLK_SDIO>, < SCLK_SDIO>,
>>  < SCLK_SDIO_DRV>, < SCLK_SDIO_SAMPLE>;
>> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>> @@ -198,7 +198,7 @@
>>
>> sdmmc: dwmmc@3013 {
>> compatible = "rockchip,rk1108-dw-mshc",
>> "rockchip,rk3288-dw-mshc";
>> -   clock-freq-min-max = <40 1>;
>> +   max-frequency = <1>;
>> clocks = < HCLK_SDMMC>, < SCLK_SDMMC>,
>>  < SCLK_SDMMC_DRV>, < SCLK_SDMMC_SAMPLE>;
>> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>> --
>> 2.10.2
>>
>>
> 

Re: [PATCH] ARM: dts: rk1108: change to "max-frequency" from "clock-freq-min-max"

[Jaehoon Chung]

Hi,

On 06/06/2017 10:15 AM, Andy Yan wrote:
> Hi Jaehoon:
> 
> 
> 2017-06-01 12:43 GMT+08:00 Jaehoon Chung :
> 
>> "clock-freq-min-max" was deprecated. There is only using in rk1108.dtsi.
>> Use the "max-frequency" for removiing "clock-freq-min-max" in future.
>>
>> Signed-off-by: Jaehoon Chung 
>> ---
>>  arch/arm/boot/dts/rk1108.dtsi | 6 +++---
>>  1 file changed, 3 insertions(+), 3 deletions(-)
>>
>>
>   This file now renamed to rv1108.dtsi as rockchip official named it as
> RV1108.
>The rename patch now is in Heiko's linux-rockchip tree:v4.13 dts32,
> maybe you should rebase this patch on it.

Thanks for noticing this. After checking it, i will resend the patch.

Best Regards,
Jaehoon Chung

> 
> diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
>> index 1297924..a9b5293 100644
>> --- a/arch/arm/boot/dts/rk1108.dtsi
>> +++ b/arch/arm/boot/dts/rk1108.dtsi
>> @@ -174,7 +174,7 @@
>>
>> emmc: dwmmc@3011 {
>> compatible = "rockchip,rk1108-dw-mshc",
>> "rockchip,rk3288-dw-mshc";
>> -   clock-freq-min-max = <40 15000>;
>> +   max-frequency = <15000>;
>> clocks = < HCLK_EMMC>, < SCLK_EMMC>,
>>  < SCLK_EMMC_DRV>, < SCLK_EMMC_SAMPLE>;
>> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>> @@ -186,7 +186,7 @@
>>
>> sdio: dwmmc@3012 {
>> compatible = "rockchip,rk1108-dw-mshc",
>> "rockchip,rk3288-dw-mshc";
>> -   clock-freq-min-max = <40 15000>;
>> +   max-frequency = <15000>;
>> clocks = < HCLK_SDIO>, < SCLK_SDIO>,
>>  < SCLK_SDIO_DRV>, < SCLK_SDIO_SAMPLE>;
>> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>> @@ -198,7 +198,7 @@
>>
>> sdmmc: dwmmc@3013 {
>> compatible = "rockchip,rk1108-dw-mshc",
>> "rockchip,rk3288-dw-mshc";
>> -   clock-freq-min-max = <40 1>;
>> +   max-frequency = <1>;
>> clocks = < HCLK_SDMMC>, < SCLK_SDMMC>,
>>  < SCLK_SDMMC_DRV>, < SCLK_SDMMC_SAMPLE>;
>> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>> --
>> 2.10.2
>>
>>
> 

[PATCH] ARM: dts: rk1108: change to "max-frequency" from "clock-freq-min-max"

[Jaehoon Chung]

"clock-freq-min-max" was deprecated. There is only using in rk1108.dtsi.
Use the "max-frequency" for removiing "clock-freq-min-max" in future.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 arch/arm/boot/dts/rk1108.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
index 1297924..a9b5293 100644
--- a/arch/arm/boot/dts/rk1108.dtsi
+++ b/arch/arm/boot/dts/rk1108.dtsi
@@ -174,7 +174,7 @@
 
emmc: dwmmc@3011 {
compatible = "rockchip,rk1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 15000>;
+   max-frequency = <15000>;
clocks = < HCLK_EMMC>, < SCLK_EMMC>,
 < SCLK_EMMC_DRV>, < SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -186,7 +186,7 @@
 
sdio: dwmmc@3012 {
compatible = "rockchip,rk1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 15000>;
+   max-frequency = <15000>;
clocks = < HCLK_SDIO>, < SCLK_SDIO>,
 < SCLK_SDIO_DRV>, < SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -198,7 +198,7 @@
 
sdmmc: dwmmc@3013 {
compatible = "rockchip,rk1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 1>;
+   max-frequency = <1>;
clocks = < HCLK_SDMMC>, < SCLK_SDMMC>,
 < SCLK_SDMMC_DRV>, < SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
-- 
2.10.2

[PATCH] ARM: dts: rk1108: change to "max-frequency" from "clock-freq-min-max"

[Jaehoon Chung]

"clock-freq-min-max" was deprecated. There is only using in rk1108.dtsi.
Use the "max-frequency" for removiing "clock-freq-min-max" in future.

Signed-off-by: Jaehoon Chung 
---
 arch/arm/boot/dts/rk1108.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
index 1297924..a9b5293 100644
--- a/arch/arm/boot/dts/rk1108.dtsi
+++ b/arch/arm/boot/dts/rk1108.dtsi
@@ -174,7 +174,7 @@
 
emmc: dwmmc@3011 {
compatible = "rockchip,rk1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 15000>;
+   max-frequency = <15000>;
clocks = < HCLK_EMMC>, < SCLK_EMMC>,
 < SCLK_EMMC_DRV>, < SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -186,7 +186,7 @@
 
sdio: dwmmc@3012 {
compatible = "rockchip,rk1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 15000>;
+   max-frequency = <15000>;
clocks = < HCLK_SDIO>, < SCLK_SDIO>,
 < SCLK_SDIO_DRV>, < SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -198,7 +198,7 @@
 
sdmmc: dwmmc@3013 {
compatible = "rockchip,rk1108-dw-mshc", 
"rockchip,rk3288-dw-mshc";
-   clock-freq-min-max = <40 1>;
+   max-frequency = <1>;
clocks = < HCLK_SDMMC>, < SCLK_SDMMC>,
 < SCLK_SDMMC_DRV>, < SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
-- 
2.10.2

Re: [PATCH v3 1/2] mmc: dw_mmc: Use device_property_read instead of of_property_read

[Jaehoon Chung]

On 05/27/2017 06:53 AM, David Woods wrote:
> Using the device_property interfaces allows the dw_mmc driver to work
> on platforms which run on either device tree or ACPI.
> 
> Signed-off-by: David Woods <dwo...@mellanox.com>
> Reviewed-by: Chris Metcalf <cmetc...@mellanox.com>
> Cc: sta...@vger.linux.org

Acked-by: Jaehoon Chung <jh80.ch...@samsung.com>

Best Regards,
Jaehoon Chung

> ---
>  drivers/mmc/host/dw_mmc.c | 24 
>  1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index e45129f..efde0f2 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -2707,8 +2707,8 @@ static int dw_mci_init_slot(struct dw_mci *host, 
> unsigned int id)
>   host->slot[id] = slot;
>  
>   mmc->ops = _mci_ops;
> - if (of_property_read_u32_array(host->dev->of_node,
> -"clock-freq-min-max", freq, 2)) {
> + if (device_property_read_u32_array(host->dev, "clock-freq-min-max",
> +freq, 2)) {
>   mmc->f_min = DW_MCI_FREQ_MIN;
>   mmc->f_max = DW_MCI_FREQ_MAX;
>   } else {
> @@ -2808,7 +2808,6 @@ static void dw_mci_init_dma(struct dw_mci *host)
>  {
>   int addr_config;
>   struct device *dev = host->dev;
> - struct device_node *np = dev->of_node;
>  
>   /*
>   * Check tansfer mode from HCON[17:16]
> @@ -2869,8 +2868,9 @@ static void dw_mci_init_dma(struct dw_mci *host)
>   dev_info(host->dev, "Using internal DMA controller.\n");
>   } else {
>   /* TRANS_MODE_EDMAC: check dma bindings again */
> - if ((of_property_count_strings(np, "dma-names") < 0) ||
> - (!of_find_property(np, "dmas", NULL))) {
> + if ((device_property_read_string_array(dev, "dma-names",
> +NULL, 0) < 0) ||
> + !device_property_present(dev, "dmas")) {
>   goto no_dma;
>   }
>   host->dma_ops = _mci_edmac_ops;
> @@ -2937,7 +2937,6 @@ static struct dw_mci_board *dw_mci_parse_dt(struct 
> dw_mci *host)
>  {
>   struct dw_mci_board *pdata;
>   struct device *dev = host->dev;
> - struct device_node *np = dev->of_node;
>   const struct dw_mci_drv_data *drv_data = host->drv_data;
>   int ret;
>   u32 clock_frequency;
> @@ -2954,20 +2953,21 @@ static struct dw_mci_board *dw_mci_parse_dt(struct 
> dw_mci *host)
>   }
>  
>   /* find out number of slots supported */
> - of_property_read_u32(np, "num-slots", >num_slots);
> + device_property_read_u32(dev, "num-slots", >num_slots);
>  
> - if (of_property_read_u32(np, "fifo-depth", >fifo_depth))
> + if (device_property_read_u32(dev, "fifo-depth", >fifo_depth))
>   dev_info(dev,
>"fifo-depth property not found, using value of FIFOTH 
> register as default\n");
>  
> - of_property_read_u32(np, "card-detect-delay", >detect_delay_ms);
> + device_property_read_u32(dev, "card-detect-delay",
> +  >detect_delay_ms);
>  
> - of_property_read_u32(np, "data-addr", >data_addr_override);
> + device_property_read_u32(dev, "data-addr", >data_addr_override);
>  
> - if (of_get_property(np, "fifo-watermark-aligned", NULL))
> + if (device_property_present(dev, "fifo-watermark-aligned"))
>   host->wm_aligned = true;
>  
> - if (!of_property_read_u32(np, "clock-frequency", _frequency))
> + if (!device_property_read_u32(dev, "clock-frequency", _frequency))
>   pdata->bus_hz = clock_frequency;
>  
>   if (drv_data && drv_data->parse_dt) {
> 

Re: [PATCH v3 1/2] mmc: dw_mmc: Use device_property_read instead of of_property_read

[Jaehoon Chung]

On 05/27/2017 06:53 AM, David Woods wrote:
> Using the device_property interfaces allows the dw_mmc driver to work
> on platforms which run on either device tree or ACPI.
> 
> Signed-off-by: David Woods 
> Reviewed-by: Chris Metcalf 
> Cc: sta...@vger.linux.org

Acked-by: Jaehoon Chung 

Best Regards,
Jaehoon Chung

> ---
>  drivers/mmc/host/dw_mmc.c | 24 
>  1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index e45129f..efde0f2 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -2707,8 +2707,8 @@ static int dw_mci_init_slot(struct dw_mci *host, 
> unsigned int id)
>   host->slot[id] = slot;
>  
>   mmc->ops = _mci_ops;
> - if (of_property_read_u32_array(host->dev->of_node,
> -"clock-freq-min-max", freq, 2)) {
> + if (device_property_read_u32_array(host->dev, "clock-freq-min-max",
> +freq, 2)) {
>   mmc->f_min = DW_MCI_FREQ_MIN;
>   mmc->f_max = DW_MCI_FREQ_MAX;
>   } else {
> @@ -2808,7 +2808,6 @@ static void dw_mci_init_dma(struct dw_mci *host)
>  {
>   int addr_config;
>   struct device *dev = host->dev;
> - struct device_node *np = dev->of_node;
>  
>   /*
>   * Check tansfer mode from HCON[17:16]
> @@ -2869,8 +2868,9 @@ static void dw_mci_init_dma(struct dw_mci *host)
>   dev_info(host->dev, "Using internal DMA controller.\n");
>   } else {
>   /* TRANS_MODE_EDMAC: check dma bindings again */
> - if ((of_property_count_strings(np, "dma-names") < 0) ||
> - (!of_find_property(np, "dmas", NULL))) {
> + if ((device_property_read_string_array(dev, "dma-names",
> +NULL, 0) < 0) ||
> + !device_property_present(dev, "dmas")) {
>   goto no_dma;
>   }
>   host->dma_ops = _mci_edmac_ops;
> @@ -2937,7 +2937,6 @@ static struct dw_mci_board *dw_mci_parse_dt(struct 
> dw_mci *host)
>  {
>   struct dw_mci_board *pdata;
>   struct device *dev = host->dev;
> - struct device_node *np = dev->of_node;
>   const struct dw_mci_drv_data *drv_data = host->drv_data;
>   int ret;
>   u32 clock_frequency;
> @@ -2954,20 +2953,21 @@ static struct dw_mci_board *dw_mci_parse_dt(struct 
> dw_mci *host)
>   }
>  
>   /* find out number of slots supported */
> - of_property_read_u32(np, "num-slots", >num_slots);
> + device_property_read_u32(dev, "num-slots", >num_slots);
>  
> - if (of_property_read_u32(np, "fifo-depth", >fifo_depth))
> + if (device_property_read_u32(dev, "fifo-depth", >fifo_depth))
>   dev_info(dev,
>"fifo-depth property not found, using value of FIFOTH 
> register as default\n");
>  
> - of_property_read_u32(np, "card-detect-delay", >detect_delay_ms);
> + device_property_read_u32(dev, "card-detect-delay",
> +  >detect_delay_ms);
>  
> - of_property_read_u32(np, "data-addr", >data_addr_override);
> + device_property_read_u32(dev, "data-addr", >data_addr_override);
>  
> - if (of_get_property(np, "fifo-watermark-aligned", NULL))
> + if (device_property_present(dev, "fifo-watermark-aligned"))
>   host->wm_aligned = true;
>  
> - if (!of_property_read_u32(np, "clock-frequency", _frequency))
> + if (!device_property_read_u32(dev, "clock-frequency", _frequency))
>   pdata->bus_hz = clock_frequency;
>  
>   if (drv_data && drv_data->parse_dt) {
> 

Re: [PATCH] mmc: dw_mmc: hide clock message when card is resuming

[Jaehoon Chung]

Hi Alexander,

On 04/19/2017 11:55 PM, Alexander Kochetkov wrote:
> Commit e9748e0364fe ("mmc: dw_mmc: force setup bus if active slots exist")
> made a change resulted in clock message appears every time the card is
> resuming (every 5 second in average). Add condition that previously used to
> print the message.

I think you are not using the latest kernel. which version do you use?

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ce69e2fea093b7fa3991c87849c4955cd47796c9

Could you check this?

Best Regards,
Jaehoon Chung

> 
> Fixes: e9748e0364fe ("mmc: dw_mmc: force setup bus if active slots exist")
> Signed-off-by: Alexander Kochetkov <al.koc...@gmail.com>
> ---
>  drivers/mmc/host/dw_mmc.c |3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 73db085..faaf2c1 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -1178,7 +1178,8 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, 
> bool force_clkinit)
>  
>   if ((clock != slot->__clk_old &&
>   !test_bit(DW_MMC_CARD_NEEDS_POLL, >flags)) ||
> - force_clkinit) {
> + (force_clkinit &&
> + (slot->mmc->pm_flags & MMC_PM_KEEP_POWER))) {
>   dev_info(>mmc->class_dev,
>"Bus speed (slot %d) = %dHz (slot req %dHz, 
> actual %dHZ div = %d)\n",
>slot->id, host->bus_hz, clock,
> 

Re: [PATCH] mmc: dw_mmc: hide clock message when card is resuming

[Jaehoon Chung]

Hi Alexander,

On 04/19/2017 11:55 PM, Alexander Kochetkov wrote:
> Commit e9748e0364fe ("mmc: dw_mmc: force setup bus if active slots exist")
> made a change resulted in clock message appears every time the card is
> resuming (every 5 second in average). Add condition that previously used to
> print the message.

I think you are not using the latest kernel. which version do you use?

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ce69e2fea093b7fa3991c87849c4955cd47796c9

Could you check this?

Best Regards,
Jaehoon Chung

> 
> Fixes: e9748e0364fe ("mmc: dw_mmc: force setup bus if active slots exist")
> Signed-off-by: Alexander Kochetkov 
> ---
>  drivers/mmc/host/dw_mmc.c |3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 73db085..faaf2c1 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -1178,7 +1178,8 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, 
> bool force_clkinit)
>  
>   if ((clock != slot->__clk_old &&
>   !test_bit(DW_MMC_CARD_NEEDS_POLL, >flags)) ||
> - force_clkinit) {
> + (force_clkinit &&
> + (slot->mmc->pm_flags & MMC_PM_KEEP_POWER))) {
>   dev_info(>mmc->class_dev,
>"Bus speed (slot %d) = %dHz (slot req %dHz, 
> actual %dHZ div = %d)\n",
>slot->id, host->bus_hz, clock,
> 

Re: [PATCH] mmc: dw_mmc: Don't allow Runtime PM for SDIO cards

[Jaehoon Chung]

On 04/12/2017 07:55 AM, Douglas Anderson wrote:
> According to the SDIO standard interrupts are normally signalled in a
> very complicated way.  They require the card clock to be running and
> require the controller to be paying close attention to the signals
> coming from the card.  This simply can't happen with the clock stopped
> or with the controller in a low power mode.
> 
> To that end, we'll disable runtime_pm when we detect that an SDIO card
> was inserted.  This is much like with what we do with the special
> "SDMMC_CLKEN_LOW_PWR" bit that dw_mmc supports.
> 
> NOTE: we specifically do this Runtime PM disabling at card init time
> rather than in the enable_sdio_irq() callback.  This is _different_
> than how SDHCI does it.  Why do we do it differently?
> 
> - Unlike SDHCI, dw_mmc uses the standard sdio_irq code in Linux (AKA
>   dw_mmc doesn't set MMC_CAP2_SDIO_IRQ_NOTHREAD).
> - Because we use the standard sdio_irq code:
>   - We see a constant stream of enable_sdio_irq(0) and
> enable_sdio_irq(1) calls.  This is because the standard code
> disables interrupts while processing and re-enables them after.
>   - While interrupts are disabled, there's technically a period where
> we could get runtime disabled while processing interrupts.
>   - If we are runtime disabled while processing interrupts, we'll
> reset the controller at resume time (see dw_mci_runtime_resume),
> which seems like a terrible idea because we could possibly have
> another interrupt pending.
> 
> To fix the above isues we'd want to put something in the standard
> sdio_irq code that makes sure to call pm_runtime get/put when
> interrupts are being actively being processed.  That's possible to do,
> but it seems like a more complicated mechanism when we really just
> want the runtime pm disabled always for SDIO cards given that all the
> other bits needed to get Runtime PM vs. SDIO just aren't there.
> 
> NOTE: at some point in time someone might come up with a fancy way to
> do SDIO interrupts and still allow (some) amount of runtime PM.
> Technically we could turn off the card clock if we used an alternate
> way of signaling SDIO interrupts (and out of band interrupt is one way
> to do this).  We probably wouldn't actually want to fully runtime
> suspend in this case though--at least not with the current
> dw_mci_runtime_resume() which basically fully resets the controller at
> resume time.
> 
> Fixes: e9ed8835e990 ("mmc: dw_mmc: add runtime PM callback")
> Cc: <sta...@vger.kernel.org>
> Reported-by: Brian Norris <briannor...@chromium.org>
> Signed-off-by: Douglas Anderson <diand...@chromium.org>

Acked-by: Jaehoon Chung <jh80.ch...@samsung.com>

Best Regards,
Jaehoon Chung

> ---
>  drivers/mmc/host/dw_mmc.c | 11 +--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 249ded65192e..e45129f48174 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -23,6 +23,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -1620,10 +1621,16 @@ static void dw_mci_init_card(struct mmc_host *mmc, 
> struct mmc_card *card)
>  
>   if (card->type == MMC_TYPE_SDIO ||
>   card->type == MMC_TYPE_SD_COMBO) {
> - set_bit(DW_MMC_CARD_NO_LOW_PWR, >flags);
> + if (!test_bit(DW_MMC_CARD_NO_LOW_PWR, >flags)) {
> + pm_runtime_get_noresume(mmc->parent);
> + set_bit(DW_MMC_CARD_NO_LOW_PWR, >flags);
> + }
>   clk_en_a = clk_en_a_old & ~clken_low_pwr;
>   } else {
> - clear_bit(DW_MMC_CARD_NO_LOW_PWR, >flags);
> + if (test_bit(DW_MMC_CARD_NO_LOW_PWR, >flags)) {
> + pm_runtime_put_noidle(mmc->parent);
> + clear_bit(DW_MMC_CARD_NO_LOW_PWR, >flags);
> + }
>   clk_en_a = clk_en_a_old | clken_low_pwr;
>   }
>  
> 

Re: [PATCH] mmc: dw_mmc: Don't allow Runtime PM for SDIO cards

[Jaehoon Chung]

On 04/12/2017 07:55 AM, Douglas Anderson wrote:
> According to the SDIO standard interrupts are normally signalled in a
> very complicated way.  They require the card clock to be running and
> require the controller to be paying close attention to the signals
> coming from the card.  This simply can't happen with the clock stopped
> or with the controller in a low power mode.
> 
> To that end, we'll disable runtime_pm when we detect that an SDIO card
> was inserted.  This is much like with what we do with the special
> "SDMMC_CLKEN_LOW_PWR" bit that dw_mmc supports.
> 
> NOTE: we specifically do this Runtime PM disabling at card init time
> rather than in the enable_sdio_irq() callback.  This is _different_
> than how SDHCI does it.  Why do we do it differently?
> 
> - Unlike SDHCI, dw_mmc uses the standard sdio_irq code in Linux (AKA
>   dw_mmc doesn't set MMC_CAP2_SDIO_IRQ_NOTHREAD).
> - Because we use the standard sdio_irq code:
>   - We see a constant stream of enable_sdio_irq(0) and
> enable_sdio_irq(1) calls.  This is because the standard code
> disables interrupts while processing and re-enables them after.
>   - While interrupts are disabled, there's technically a period where
> we could get runtime disabled while processing interrupts.
>   - If we are runtime disabled while processing interrupts, we'll
> reset the controller at resume time (see dw_mci_runtime_resume),
> which seems like a terrible idea because we could possibly have
> another interrupt pending.
> 
> To fix the above isues we'd want to put something in the standard
> sdio_irq code that makes sure to call pm_runtime get/put when
> interrupts are being actively being processed.  That's possible to do,
> but it seems like a more complicated mechanism when we really just
> want the runtime pm disabled always for SDIO cards given that all the
> other bits needed to get Runtime PM vs. SDIO just aren't there.
> 
> NOTE: at some point in time someone might come up with a fancy way to
> do SDIO interrupts and still allow (some) amount of runtime PM.
> Technically we could turn off the card clock if we used an alternate
> way of signaling SDIO interrupts (and out of band interrupt is one way
> to do this).  We probably wouldn't actually want to fully runtime
> suspend in this case though--at least not with the current
> dw_mci_runtime_resume() which basically fully resets the controller at
> resume time.
> 
> Fixes: e9ed8835e990 ("mmc: dw_mmc: add runtime PM callback")
> Cc: 
> Reported-by: Brian Norris 
> Signed-off-by: Douglas Anderson 

Acked-by: Jaehoon Chung 

Best Regards,
Jaehoon Chung

> ---
>  drivers/mmc/host/dw_mmc.c | 11 +--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 249ded65192e..e45129f48174 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -23,6 +23,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -1620,10 +1621,16 @@ static void dw_mci_init_card(struct mmc_host *mmc, 
> struct mmc_card *card)
>  
>   if (card->type == MMC_TYPE_SDIO ||
>   card->type == MMC_TYPE_SD_COMBO) {
> - set_bit(DW_MMC_CARD_NO_LOW_PWR, >flags);
> + if (!test_bit(DW_MMC_CARD_NO_LOW_PWR, >flags)) {
> + pm_runtime_get_noresume(mmc->parent);
> + set_bit(DW_MMC_CARD_NO_LOW_PWR, >flags);
> + }
>   clk_en_a = clk_en_a_old & ~clken_low_pwr;
>   } else {
> - clear_bit(DW_MMC_CARD_NO_LOW_PWR, >flags);
> + if (test_bit(DW_MMC_CARD_NO_LOW_PWR, >flags)) {
> + pm_runtime_put_noidle(mmc->parent);
> + clear_bit(DW_MMC_CARD_NO_LOW_PWR, >flags);
> + }
>   clk_en_a = clk_en_a_old | clken_low_pwr;
>   }
>  
> 

Re: [PATCH] mmc: core: add mmc-card hardware reset enable support

[Jaehoon Chung]

Hi,

On 04/04/2017 11:16 PM, Richard Leitner wrote:
> Some eMMCs disable their hardware reset line (RST_N) by default. To enable
> it the host must set the corresponding bit in ECSD. An example for such
> a device is the Micron MTFCxGACAANA-4M.
> 
> This patch adds a new mmc-card devicetree property to let the host enable
> this feature during card initialization.
> 
> Signed-off-by: Richard Leitner <richard.leit...@skidata.com>
> ---
>  Documentation/devicetree/bindings/mmc/mmc-card.txt |  3 +++
>  drivers/mmc/core/mmc.c | 21 +
>  2 files changed, 24 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/mmc-card.txt 
> b/Documentation/devicetree/bindings/mmc/mmc-card.txt
> index a70fcd6..8590a40 100644
> --- a/Documentation/devicetree/bindings/mmc/mmc-card.txt
> +++ b/Documentation/devicetree/bindings/mmc/mmc-card.txt
> @@ -12,6 +12,9 @@ Required properties:
>  Optional properties:
>  -broken-hpi : Use this to indicate that the mmc-card has a broken hpi
>implementation, and that hpi should not be used
> +-enable-hw-reset : some eMMC devices have disabled the hw reset functionality
> +   (RST_N_FUNCTION) by default. By adding this property the
> +   host will enable it during initialization.

As i know, RST_N_FUNCTION is controlled bit[1:0]
0x0 : RST_n disabled (by default)
0x1 : permanently enabled
0x2 : permanently disabled

I think that it needs to add the description about these..
>  
>  Example:
>  
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index b502601..518d0e3 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -1520,9 +1520,16 @@ static int mmc_init_card(struct mmc_host *host, u32 
> ocr,
>   int err;
>   u32 cid[4];
>   u32 rocr;
> + struct device_node *np;
> + bool enable_rst_n = false;
>  
>   WARN_ON(!host->claimed);
>  
> + np = mmc_of_find_child_device(host, 0);
> + if (np && of_device_is_compatible(np, "mmc-card"))
> + enable_rst_n = of_property_read_bool(np, "enable-hw-reset");
> + of_node_put(np);
> +
>   /* Set correct bus mode for MMC before attempting init */
>   if (!mmc_host_is_spi(host))
>   mmc_set_bus_mode(host, MMC_BUSMODE_OPENDRAIN);
> @@ -1810,6 +1817,20 @@ static int mmc_init_card(struct mmc_host *host, u32 
> ocr,
>   }
>   }
>  
> + /*
> +  * try to enable RST_N if requested
> +  * This is needed because some eMMC chips disable this function by
> +  * default.
> +  */
> + if (enable_rst_n) {
> + err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
> +  EXT_CSD_RST_N_FUNCTION, EXT_CSD_RST_N_ENABLED,
> +  card->ext_csd.generic_cmd6_time);
> + if (err && err != -EBADMSG)
> + pr_warn("%s: Enabling RST_N feature failed\n",
> +     mmc_hostname(card->host));
> + }

If enabled hw-reset, it doesn't need to re-enable this bit.
i didn't check the mmc-util..
If mmc-util provides the changing this, the using mmc-util is better than this.

Best Regards,
Jaehoon Chung

> +
>   if (!oldcard)
>   host->card = card;
>  
> 

Re: [PATCH] mmc: core: add mmc-card hardware reset enable support

[Jaehoon Chung]

Hi,

On 04/04/2017 11:16 PM, Richard Leitner wrote:
> Some eMMCs disable their hardware reset line (RST_N) by default. To enable
> it the host must set the corresponding bit in ECSD. An example for such
> a device is the Micron MTFCxGACAANA-4M.
> 
> This patch adds a new mmc-card devicetree property to let the host enable
> this feature during card initialization.
> 
> Signed-off-by: Richard Leitner 
> ---
>  Documentation/devicetree/bindings/mmc/mmc-card.txt |  3 +++
>  drivers/mmc/core/mmc.c | 21 +
>  2 files changed, 24 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/mmc-card.txt 
> b/Documentation/devicetree/bindings/mmc/mmc-card.txt
> index a70fcd6..8590a40 100644
> --- a/Documentation/devicetree/bindings/mmc/mmc-card.txt
> +++ b/Documentation/devicetree/bindings/mmc/mmc-card.txt
> @@ -12,6 +12,9 @@ Required properties:
>  Optional properties:
>  -broken-hpi : Use this to indicate that the mmc-card has a broken hpi
>implementation, and that hpi should not be used
> +-enable-hw-reset : some eMMC devices have disabled the hw reset functionality
> +   (RST_N_FUNCTION) by default. By adding this property the
> +   host will enable it during initialization.

As i know, RST_N_FUNCTION is controlled bit[1:0]
0x0 : RST_n disabled (by default)
0x1 : permanently enabled
0x2 : permanently disabled

I think that it needs to add the description about these..
>  
>  Example:
>  
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index b502601..518d0e3 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -1520,9 +1520,16 @@ static int mmc_init_card(struct mmc_host *host, u32 
> ocr,
>   int err;
>   u32 cid[4];
>   u32 rocr;
> + struct device_node *np;
> + bool enable_rst_n = false;
>  
>   WARN_ON(!host->claimed);
>  
> + np = mmc_of_find_child_device(host, 0);
> + if (np && of_device_is_compatible(np, "mmc-card"))
> + enable_rst_n = of_property_read_bool(np, "enable-hw-reset");
> + of_node_put(np);
> +
>   /* Set correct bus mode for MMC before attempting init */
>   if (!mmc_host_is_spi(host))
>   mmc_set_bus_mode(host, MMC_BUSMODE_OPENDRAIN);
> @@ -1810,6 +1817,20 @@ static int mmc_init_card(struct mmc_host *host, u32 
> ocr,
>   }
>   }
>  
> + /*
> +  * try to enable RST_N if requested
> +  * This is needed because some eMMC chips disable this function by
> +  * default.
> +  */
> + if (enable_rst_n) {
> + err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
> +  EXT_CSD_RST_N_FUNCTION, EXT_CSD_RST_N_ENABLED,
> +  card->ext_csd.generic_cmd6_time);
> + if (err && err != -EBADMSG)
> + pr_warn("%s: Enabling RST_N feature failed\n",
> +     mmc_hostname(card->host));
> + }

If enabled hw-reset, it doesn't need to re-enable this bit.
i didn't check the mmc-util..
If mmc-util provides the changing this, the using mmc-util is better than this.

Best Regards,
Jaehoon Chung

> +
>   if (!oldcard)
>   host->card = card;
>  
> 

Re: [PATCH 1/1] mmc: core: export emmc revision via sysfs

[Jaehoon Chung]

Hi,

On 03/22/2017 07:01 AM, Jin Qian wrote:
> Extend sysfs to access ext_csd revision information.
> 
> Signed-off-by: Jin Qian <jinq...@google.com>
> Signed-off-by: Jin Qian <jinq...@android.com>

I think you can choose one of them for signed-off tag.

> ---
>  drivers/mmc/core/mmc.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index 7fd722868875..08c62c9bec48 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -779,6 +779,7 @@ MMC_DEV_ATTR(manfid, "0x%06x\n", card->cid.manfid);
>  MMC_DEV_ATTR(name, "%s\n", card->cid.prod_name);
>  MMC_DEV_ATTR(oemid, "0x%04x\n", card->cid.oemid);
>  MMC_DEV_ATTR(prv, "0x%x\n", card->cid.prv);
> +MMC_DEV_ATTR(rev, "0x%x\n", card->ext_csd.rev);

I'm not sure but if someone want to know ext_csd revision information, 
attribute name might be more clearly.
e,g) ext_csd_rev?

It's my preference. :)

Best Regards,
Jaehoon Chung

>  MMC_DEV_ATTR(pre_eol_info, "%02x\n", card->ext_csd.pre_eol_info);
>  MMC_DEV_ATTR(life_time, "0x%02x 0x%02x\n",
>   card->ext_csd.device_life_time_est_typ_a,
> @@ -836,6 +837,7 @@ static struct attribute *mmc_std_attrs[] = {
>   _attr_name.attr,
>   _attr_oemid.attr,
>   _attr_prv.attr,
> + _attr_rev.attr,
>   _attr_pre_eol_info.attr,
>   _attr_life_time.attr,
>   _attr_serial.attr,
> 

Re: [PATCH 1/1] mmc: core: export emmc revision via sysfs

[Jaehoon Chung]

Hi,

On 03/22/2017 07:01 AM, Jin Qian wrote:
> Extend sysfs to access ext_csd revision information.
> 
> Signed-off-by: Jin Qian 
> Signed-off-by: Jin Qian 

I think you can choose one of them for signed-off tag.

> ---
>  drivers/mmc/core/mmc.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index 7fd722868875..08c62c9bec48 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -779,6 +779,7 @@ MMC_DEV_ATTR(manfid, "0x%06x\n", card->cid.manfid);
>  MMC_DEV_ATTR(name, "%s\n", card->cid.prod_name);
>  MMC_DEV_ATTR(oemid, "0x%04x\n", card->cid.oemid);
>  MMC_DEV_ATTR(prv, "0x%x\n", card->cid.prv);
> +MMC_DEV_ATTR(rev, "0x%x\n", card->ext_csd.rev);

I'm not sure but if someone want to know ext_csd revision information, 
attribute name might be more clearly.
e,g) ext_csd_rev?

It's my preference. :)

Best Regards,
Jaehoon Chung

>  MMC_DEV_ATTR(pre_eol_info, "%02x\n", card->ext_csd.pre_eol_info);
>  MMC_DEV_ATTR(life_time, "0x%02x 0x%02x\n",
>   card->ext_csd.device_life_time_est_typ_a,
> @@ -836,6 +837,7 @@ static struct attribute *mmc_std_attrs[] = {
>   _attr_name.attr,
>   _attr_oemid.attr,
>   _attr_prv.attr,
> + _attr_rev.attr,
>   _attr_pre_eol_info.attr,
>   _attr_life_time.attr,
>   _attr_serial.attr,
> 

[PATCH] scsi: ufs: remove the duplicated checking for supporting clkscaling

[Jaehoon Chung]

There are same conditions for checking whether supporting clkscaling or
not.
When ufshcd is supporting clkscaling, active_reqs should be decreased by
two.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 drivers/scsi/ufs/ufshcd.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index dc6efbd..f2cbc71 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -4598,8 +4598,6 @@ static void __ufshcd_transfer_req_compl(struct ufs_hba 
*hba,
}
if (ufshcd_is_clkscaling_supported(hba))
hba->clk_scaling.active_reqs--;
-   if (ufshcd_is_clkscaling_supported(hba))
-   hba->clk_scaling.active_reqs--;
}
 
/* clear corresponding bits of completed commands */
-- 
2.10.2

[PATCH] scsi: ufs: remove the duplicated checking for supporting clkscaling

[Jaehoon Chung]

There are same conditions for checking whether supporting clkscaling or
not.
When ufshcd is supporting clkscaling, active_reqs should be decreased by
two.

Signed-off-by: Jaehoon Chung 
---
 drivers/scsi/ufs/ufshcd.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index dc6efbd..f2cbc71 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -4598,8 +4598,6 @@ static void __ufshcd_transfer_req_compl(struct ufs_hba 
*hba,
}
if (ufshcd_is_clkscaling_supported(hba))
hba->clk_scaling.active_reqs--;
-   if (ufshcd_is_clkscaling_supported(hba))
-   hba->clk_scaling.active_reqs--;
}
 
/* clear corresponding bits of completed commands */
-- 
2.10.2

Re: [PATCH v2 06/14] mmc: dw_mmc: simplify optional reset handling

[Jaehoon Chung]

Hi All,

On 03/21/2017 03:10 AM, Ulf Hansson wrote:
> On 20 March 2017 at 12:00, Philipp Zabel <p.za...@pengutronix.de> wrote:
>> On Mon, 2017-03-20 at 11:49 +0100, Andrzej Hajda wrote:
>>> On 20.03.2017 11:27, Philipp Zabel wrote:
>> [...]
>>>> diff --git a/include/linux/reset.h b/include/linux/reset.h
>>>> index 86b4ed75359e8..c905ff1c21ec6 100644
>>>> --- a/include/linux/reset.h
>>>> +++ b/include/linux/reset.h
>>>> @@ -74,14 +74,14 @@ static inline struct reset_control 
>>>> *__of_reset_control_get(
>>>> const char *id, int index, bool shared,
>>>> bool optional)
>>>>  {
>>>> -   return ERR_PTR(-ENOTSUPP);
>>>> +   return optional ? NULL : ERR_PTR(-ENOTSUPP);
>>>>  }
>>>>
>>>>  static inline struct reset_control *__devm_reset_control_get(
>>>> struct device *dev, const char *id,
>>>> int index, bool shared, bool optional)
>>>>  {
>>>> -   return ERR_PTR(-ENOTSUPP);
>>>> +   return optional ? NULL : ERR_PTR(-ENOTSUPP);
>>>>  }
>>>>
>>>>  #endif /* CONFIG_RESET_CONTROLLER */
>>>> -->8--
>>>
>>> In dw_mmc.c file there are also unconditional calls to
>>> reset_control_assert, with disabled RESET_CONTROLLER it will cause
>>> unexpected WARNs.
>>> Anyway if you change reset API as above I think you should remove all
>>> warns from reset stubs, because NULL reset is valid, but these warns are
>>> there for reason - contradiction.
>>
>> You are right, I have to let go of those, too.
> 
> 
> Until fixed, I have dropped the three changes from my next branch
> related to this. Please re-post when fixed.

I missed this patch. If resend the patch, i will check.

Best Regards,
Jaehoon Chung

> 
> Kind regards
> Uffe
> 
>>
>> regards
>> Philipp
>>
> 
> 
> 

Re: [PATCH v2 06/14] mmc: dw_mmc: simplify optional reset handling

[Jaehoon Chung]

Hi All,

On 03/21/2017 03:10 AM, Ulf Hansson wrote:
> On 20 March 2017 at 12:00, Philipp Zabel  wrote:
>> On Mon, 2017-03-20 at 11:49 +0100, Andrzej Hajda wrote:
>>> On 20.03.2017 11:27, Philipp Zabel wrote:
>> [...]
>>>> diff --git a/include/linux/reset.h b/include/linux/reset.h
>>>> index 86b4ed75359e8..c905ff1c21ec6 100644
>>>> --- a/include/linux/reset.h
>>>> +++ b/include/linux/reset.h
>>>> @@ -74,14 +74,14 @@ static inline struct reset_control 
>>>> *__of_reset_control_get(
>>>> const char *id, int index, bool shared,
>>>> bool optional)
>>>>  {
>>>> -   return ERR_PTR(-ENOTSUPP);
>>>> +   return optional ? NULL : ERR_PTR(-ENOTSUPP);
>>>>  }
>>>>
>>>>  static inline struct reset_control *__devm_reset_control_get(
>>>> struct device *dev, const char *id,
>>>> int index, bool shared, bool optional)
>>>>  {
>>>> -   return ERR_PTR(-ENOTSUPP);
>>>> +   return optional ? NULL : ERR_PTR(-ENOTSUPP);
>>>>  }
>>>>
>>>>  #endif /* CONFIG_RESET_CONTROLLER */
>>>> -->8--
>>>
>>> In dw_mmc.c file there are also unconditional calls to
>>> reset_control_assert, with disabled RESET_CONTROLLER it will cause
>>> unexpected WARNs.
>>> Anyway if you change reset API as above I think you should remove all
>>> warns from reset stubs, because NULL reset is valid, but these warns are
>>> there for reason - contradiction.
>>
>> You are right, I have to let go of those, too.
> 
> 
> Until fixed, I have dropped the three changes from my next branch
> related to this. Please re-post when fixed.

I missed this patch. If resend the patch, i will check.

Best Regards,
Jaehoon Chung

> 
> Kind regards
> Uffe
> 
>>
>> regards
>> Philipp
>>
> 
> 
> 

Re: [RESEND PATCH v3 2/2] phy: Group vendor specific phy drivers

[Jaehoon Chung]

On 03/14/2017 03:22 PM, Vivek Gautam wrote:
> Adding vendor specific directories in phy to group
> phy drivers under their respective vendor umbrella.
> 
> Also updated the MAINTAINERS file to reflect the correct
> directory structure for phy drivers.
> 
> Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
> Acked-by: Heiko Stuebner <he...@sntech.de>
> Acked-by: Viresh Kumar <viresh.ku...@linaro.org>
> Cc: Kishon Vijay Abraham I <kis...@ti.com>
> Cc: David S. Miller <da...@davemloft.net>
> Cc: Geert Uytterhoeven <geert+rene...@glider.be>
> Cc: Yoshihiro Shimoda <yoshihiro.shimoda...@renesas.com>
> Cc: Guenter Roeck <li...@roeck-us.net>
> Cc: Heiko Stuebner <he...@sntech.de>
> Cc: Viresh Kumar <viresh.ku...@linaro.org>
> Cc: Maxime Ripard <maxime.rip...@free-electrons.com>
> Cc: Chen-Yu Tsai <w...@csie.org>
> Cc: Sylwester Nawrocki <s.nawro...@samsung.com>
> Cc: Krzysztof Kozlowski <k...@kernel.org>
> Cc: Jaehoon Chung <jh80.ch...@samsung.com>
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linux-arm-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-o...@vger.kernel.org
> Cc: linux-renesas-...@vger.kernel.org
> Cc: linux-rockc...@lists.infradead.org
> Cc: linux-samsung-...@vger.kernel.org
> Cc: linux-...@vger.kernel.org

Reviewed-by: Jaehoon Chung <jh80.ch...@samsung.com>

[..snip..]

> ---

Re: [RESEND PATCH v3 2/2] phy: Group vendor specific phy drivers

[Jaehoon Chung]

On 03/14/2017 03:22 PM, Vivek Gautam wrote:
> Adding vendor specific directories in phy to group
> phy drivers under their respective vendor umbrella.
> 
> Also updated the MAINTAINERS file to reflect the correct
> directory structure for phy drivers.
> 
> Signed-off-by: Vivek Gautam 
> Acked-by: Heiko Stuebner 
> Acked-by: Viresh Kumar 
> Cc: Kishon Vijay Abraham I 
> Cc: David S. Miller 
> Cc: Geert Uytterhoeven 
> Cc: Yoshihiro Shimoda 
> Cc: Guenter Roeck 
> Cc: Heiko Stuebner 
> Cc: Viresh Kumar 
> Cc: Maxime Ripard 
> Cc: Chen-Yu Tsai 
> Cc: Sylwester Nawrocki 
> Cc: Krzysztof Kozlowski 
> Cc: Jaehoon Chung 
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linux-arm-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-o...@vger.kernel.org
> Cc: linux-renesas-...@vger.kernel.org
> Cc: linux-rockc...@lists.infradead.org
> Cc: linux-samsung-...@vger.kernel.org
> Cc: linux-...@vger.kernel.org

Reviewed-by: Jaehoon Chung 

[..snip..]

> ---

Re: [RFC PATCH] phy: samsung: move the Samsung specific phy files to "samsung" directory

[Jaehoon Chung]

Hi Vivek,

On 03/12/2017 06:18 PM, Vivek Gautam wrote:
> Hi Kishon,
> 
> 
> On Thu, Mar 9, 2017 at 5:26 PM, Kishon Vijay Abraham I <kis...@ti.com> wrote:
>> Hi,
>>
>> On Thursday 09 March 2017 05:03 PM, Jaehoon Chung wrote:
>>> Make the "samsung" directory and move the Samsung specific files to
>>> there for maintaining the files relevant to Samsung.
>>
>> The number of phy drivers in drivers/phy is getting unmanageable. I think 
>> this
>> is a good step to make it a little better. Can you also add a MAINTAINER for
>> drivers/phy/samsung?
> 
> I remember making a similar attempt in past [1], but that time we couldn't
> reach an agreement as to whether group the phy drivers based on
> vendors or based on the type of phy.
> 
> If you are fine with grouping the drivers for each vendor, I hope you can
> consider picking that patch (I can respin the patch based on linux-phy/next).
> Other driver maintainers were also cool with that older patch.
> 
> Let me know your comments.
> 
> [1] https://patchwork.kernel.org/patch/8762561/

I didn't know you had already sent the patches.
My RFC patch can be dropped. I think it's good way.

Best Regards,
Jaehoon Chung

> 
> Regards
> Vivek
> 
>>
>> Thanks
>> Kishon
>>>
>>> Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
>>> ---
>>>  drivers/phy/Kconfig   | 96 
>>> +--
>>>  drivers/phy/Makefile  | 14 +---
>>>  drivers/phy/samsung/Kconfig   | 92 
>>> ++
>>>  drivers/phy/samsung/Makefile  | 11 +++
>>>  drivers/phy/{ => samsung}/phy-exynos-dp-video.c   |  0
>>>  drivers/phy/{ => samsung}/phy-exynos-mipi-video.c |  0
>>>  drivers/phy/{ => samsung}/phy-exynos-pcie.c   |  0
>>>  drivers/phy/{ => samsung}/phy-exynos4210-usb2.c   |  0
>>>  drivers/phy/{ => samsung}/phy-exynos4x12-usb2.c   |  0
>>>  drivers/phy/{ => samsung}/phy-exynos5-usbdrd.c|  0
>>>  drivers/phy/{ => samsung}/phy-exynos5250-sata.c   |  0
>>>  drivers/phy/{ => samsung}/phy-exynos5250-usb2.c   |  0
>>>  drivers/phy/{ => samsung}/phy-s5pv210-usb2.c  |  0
>>>  drivers/phy/{ => samsung}/phy-samsung-usb2.c  |  0
>>>  drivers/phy/{ => samsung}/phy-samsung-usb2.h  |  0
>>>  15 files changed, 108 insertions(+), 105 deletions(-)
>>>  create mode 100644 drivers/phy/samsung/Kconfig
>>>  create mode 100644 drivers/phy/samsung/Makefile
>>>  rename drivers/phy/{ => samsung}/phy-exynos-dp-video.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos-mipi-video.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos-pcie.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos4210-usb2.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos4x12-usb2.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos5-usbdrd.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos5250-sata.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos5250-usb2.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-s5pv210-usb2.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-samsung-usb2.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-samsung-usb2.h (100%)
> 
> [snip]
> 
> 
> 

Re: [RFC PATCH] phy: samsung: move the Samsung specific phy files to "samsung" directory

[Jaehoon Chung]

Hi Vivek,

On 03/12/2017 06:18 PM, Vivek Gautam wrote:
> Hi Kishon,
> 
> 
> On Thu, Mar 9, 2017 at 5:26 PM, Kishon Vijay Abraham I  wrote:
>> Hi,
>>
>> On Thursday 09 March 2017 05:03 PM, Jaehoon Chung wrote:
>>> Make the "samsung" directory and move the Samsung specific files to
>>> there for maintaining the files relevant to Samsung.
>>
>> The number of phy drivers in drivers/phy is getting unmanageable. I think 
>> this
>> is a good step to make it a little better. Can you also add a MAINTAINER for
>> drivers/phy/samsung?
> 
> I remember making a similar attempt in past [1], but that time we couldn't
> reach an agreement as to whether group the phy drivers based on
> vendors or based on the type of phy.
> 
> If you are fine with grouping the drivers for each vendor, I hope you can
> consider picking that patch (I can respin the patch based on linux-phy/next).
> Other driver maintainers were also cool with that older patch.
> 
> Let me know your comments.
> 
> [1] https://patchwork.kernel.org/patch/8762561/

I didn't know you had already sent the patches.
My RFC patch can be dropped. I think it's good way.

Best Regards,
Jaehoon Chung

> 
> Regards
> Vivek
> 
>>
>> Thanks
>> Kishon
>>>
>>> Signed-off-by: Jaehoon Chung 
>>> ---
>>>  drivers/phy/Kconfig   | 96 
>>> +--
>>>  drivers/phy/Makefile  | 14 +---
>>>  drivers/phy/samsung/Kconfig   | 92 
>>> ++
>>>  drivers/phy/samsung/Makefile  | 11 +++
>>>  drivers/phy/{ => samsung}/phy-exynos-dp-video.c   |  0
>>>  drivers/phy/{ => samsung}/phy-exynos-mipi-video.c |  0
>>>  drivers/phy/{ => samsung}/phy-exynos-pcie.c   |  0
>>>  drivers/phy/{ => samsung}/phy-exynos4210-usb2.c   |  0
>>>  drivers/phy/{ => samsung}/phy-exynos4x12-usb2.c   |  0
>>>  drivers/phy/{ => samsung}/phy-exynos5-usbdrd.c|  0
>>>  drivers/phy/{ => samsung}/phy-exynos5250-sata.c   |  0
>>>  drivers/phy/{ => samsung}/phy-exynos5250-usb2.c   |  0
>>>  drivers/phy/{ => samsung}/phy-s5pv210-usb2.c  |  0
>>>  drivers/phy/{ => samsung}/phy-samsung-usb2.c  |  0
>>>  drivers/phy/{ => samsung}/phy-samsung-usb2.h  |  0
>>>  15 files changed, 108 insertions(+), 105 deletions(-)
>>>  create mode 100644 drivers/phy/samsung/Kconfig
>>>  create mode 100644 drivers/phy/samsung/Makefile
>>>  rename drivers/phy/{ => samsung}/phy-exynos-dp-video.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos-mipi-video.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos-pcie.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos4210-usb2.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos4x12-usb2.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos5-usbdrd.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos5250-sata.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-exynos5250-usb2.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-s5pv210-usb2.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-samsung-usb2.c (100%)
>>>  rename drivers/phy/{ => samsung}/phy-samsung-usb2.h (100%)
> 
> [snip]
> 
> 
> 

Re: [RFC PATCH] phy: samsung: move the Samsung specific phy files to "samsung" directory

[Jaehoon Chung]

Hi All,

On 03/09/2017 09:10 PM, Krzysztof Kozlowski wrote:
> On Thu, Mar 9, 2017 at 1:56 PM, Kishon Vijay Abraham I <kis...@ti.com> wrote:
>> Hi,
>>
>> On Thursday 09 March 2017 05:03 PM, Jaehoon Chung wrote:
>>> Make the "samsung" directory and move the Samsung specific files to
>>> there for maintaining the files relevant to Samsung.
>>
>> The number of phy drivers in drivers/phy is getting unmanageable. I think 
>> this
>> is a good step to make it a little better. Can you also add a MAINTAINER for
>> drivers/phy/samsung?
> 
> There is such:
> 
> 10903 SAMSUNG USB2 PHY DRIVER
> 10904 M:  Kamil Debski <ka...@wypas.org>
> 10905 M:  Sylwester Nawrocki <s.nawro...@samsung.com>
> 10906 L:  linux-kernel@vger.kernel.org
> 10907 S:  Supported
> 10908 F:  Documentation/devicetree/bindings/phy/samsung-phy.txt
> 10909 F:  Documentation/phy/samsung-usb2.txt
> 10910 F:  drivers/phy/phy-exynos4210-usb2.c
> 10911 F:  drivers/phy/phy-exynos4x12-usb2.c
> 10912 F:  drivers/phy/phy-exynos5250-usb2.c
> 10913 F:  drivers/phy/phy-s5pv210-usb2.c
> 10914 F:  drivers/phy/phy-samsung-usb2.c
> 10915 F:  drivers/phy/phy-samsung-usb2.h
> 
> but this patchset does not update it. Paths *everywhere* have to be updated.

Will update..How about the below updating?
M:  Kamil Debski <ka...@wypas.org>
M:  Sylwester Nawrocki <s.nawro...@samsung.com>
M:  Jaehoon Chung <jh80.ch...@samsung.com>
L:  linux-kernel@vger.kernel.org
S:  Supported
F:  Documentation/devicetree/bindings/phy/samsung-phy.txt
F:  Documentation/phy/samsung-usb2.txt
F:  driver/phy/samsung/

Let me know your opinion.

Best Regards,
Jaehoon Chung

> 
> Best regards,
> Krzysztof
> 
> 
> 

Re: [RFC PATCH] phy: samsung: move the Samsung specific phy files to "samsung" directory

[Jaehoon Chung]

Hi All,

On 03/09/2017 09:10 PM, Krzysztof Kozlowski wrote:
> On Thu, Mar 9, 2017 at 1:56 PM, Kishon Vijay Abraham I  wrote:
>> Hi,
>>
>> On Thursday 09 March 2017 05:03 PM, Jaehoon Chung wrote:
>>> Make the "samsung" directory and move the Samsung specific files to
>>> there for maintaining the files relevant to Samsung.
>>
>> The number of phy drivers in drivers/phy is getting unmanageable. I think 
>> this
>> is a good step to make it a little better. Can you also add a MAINTAINER for
>> drivers/phy/samsung?
> 
> There is such:
> 
> 10903 SAMSUNG USB2 PHY DRIVER
> 10904 M:  Kamil Debski 
> 10905 M:  Sylwester Nawrocki 
> 10906 L:  linux-kernel@vger.kernel.org
> 10907 S:  Supported
> 10908 F:  Documentation/devicetree/bindings/phy/samsung-phy.txt
> 10909 F:  Documentation/phy/samsung-usb2.txt
> 10910 F:  drivers/phy/phy-exynos4210-usb2.c
> 10911 F:  drivers/phy/phy-exynos4x12-usb2.c
> 10912 F:  drivers/phy/phy-exynos5250-usb2.c
> 10913 F:  drivers/phy/phy-s5pv210-usb2.c
> 10914 F:  drivers/phy/phy-samsung-usb2.c
> 10915 F:  drivers/phy/phy-samsung-usb2.h
> 
> but this patchset does not update it. Paths *everywhere* have to be updated.

Will update..How about the below updating?
M:  Kamil Debski 
M:  Sylwester Nawrocki 
M:  Jaehoon Chung 
L:  linux-kernel@vger.kernel.org
S:  Supported
F:  Documentation/devicetree/bindings/phy/samsung-phy.txt
F:  Documentation/phy/samsung-usb2.txt
F:  driver/phy/samsung/

Let me know your opinion.

Best Regards,
Jaehoon Chung

> 
> Best regards,
> Krzysztof
> 
> 
> 

[RFC PATCH] phy: samsung: move the Samsung specific phy files to "samsung" directory

[Jaehoon Chung]

Make the "samsung" directory and move the Samsung specific files to
there for maintaining the files relevant to Samsung.

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 drivers/phy/Kconfig   | 96 +--
 drivers/phy/Makefile  | 14 +---
 drivers/phy/samsung/Kconfig   | 92 ++
 drivers/phy/samsung/Makefile  | 11 +++
 drivers/phy/{ => samsung}/phy-exynos-dp-video.c   |  0
 drivers/phy/{ => samsung}/phy-exynos-mipi-video.c |  0
 drivers/phy/{ => samsung}/phy-exynos-pcie.c   |  0
 drivers/phy/{ => samsung}/phy-exynos4210-usb2.c   |  0
 drivers/phy/{ => samsung}/phy-exynos4x12-usb2.c   |  0
 drivers/phy/{ => samsung}/phy-exynos5-usbdrd.c|  0
 drivers/phy/{ => samsung}/phy-exynos5250-sata.c   |  0
 drivers/phy/{ => samsung}/phy-exynos5250-usb2.c   |  0
 drivers/phy/{ => samsung}/phy-s5pv210-usb2.c  |  0
 drivers/phy/{ => samsung}/phy-samsung-usb2.c  |  0
 drivers/phy/{ => samsung}/phy-samsung-usb2.h  |  0
 15 files changed, 108 insertions(+), 105 deletions(-)
 create mode 100644 drivers/phy/samsung/Kconfig
 create mode 100644 drivers/phy/samsung/Makefile
 rename drivers/phy/{ => samsung}/phy-exynos-dp-video.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos-mipi-video.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos-pcie.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos4210-usb2.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos4x12-usb2.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos5-usbdrd.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos5250-sata.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos5250-usb2.c (100%)
 rename drivers/phy/{ => samsung}/phy-s5pv210-usb2.c (100%)
 rename drivers/phy/{ => samsung}/phy-samsung-usb2.c (100%)
 rename drivers/phy/{ => samsung}/phy-samsung-usb2.h (100%)

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index dc5277a..10de740 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -72,16 +72,6 @@ config PHY_DM816X_USB
help
  Enable this for dm816x USB to work.
 
-config PHY_EXYNOS_MIPI_VIDEO
-   tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
-   depends on HAS_IOMEM
-   depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
-   select GENERIC_PHY
-   default y if ARCH_S5PV210 || ARCH_EXYNOS
-   help
- Support for MIPI CSI-2 and MIPI DSI DPHY found on Samsung S5P
- and EXYNOS SoCs.
-
 config PHY_LPC18XX_USB_OTG
tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver"
depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
@@ -194,15 +184,6 @@ config TWL4030_USB
  This transceiver supports high and full speed devices plus,
  in host mode, low speed.
 
-config PHY_EXYNOS_DP_VIDEO
-   tristate "EXYNOS SoC series Display Port PHY driver"
-   depends on OF
-   depends on ARCH_EXYNOS || COMPILE_TEST
-   default ARCH_EXYNOS
-   select GENERIC_PHY
-   help
- Support for Display Port PHY found on Samsung EXYNOS SoCs.
-
 config BCM_KONA_USB2_PHY
tristate "Broadcom Kona USB2 PHY Driver"
depends on HAS_IOMEM
@@ -210,21 +191,6 @@ config BCM_KONA_USB2_PHY
help
  Enable this to support the Broadcom Kona USB 2.0 PHY.
 
-config PHY_EXYNOS5250_SATA
-   tristate "Exynos5250 Sata SerDes/PHY driver"
-   depends on SOC_EXYNOS5250
-   depends on HAS_IOMEM
-   depends on OF
-   select GENERIC_PHY
-   select I2C
-   select I2C_S3C2410
-   select MFD_SYSCON
-   help
- Enable this to support SATA SerDes/Phy found on Samsung's
- Exynos5250 based SoCs.This SerDes/Phy supports SATA 1.5 Gb/s,
- SATA 3.0 Gb/s, SATA 6.0 Gb/s speeds. It supports one SATA host
- port to accept one SATA device.
-
 config PHY_HIX5HD2_SATA
tristate "HIX5HD2 SATA PHY Driver"
depends on ARCH_HIX5HD2 && OF && HAS_IOMEM
@@ -280,65 +246,6 @@ config PHY_SUN9I_USB
 
  This driver controls each individual USB 2 host PHY.
 
-config PHY_SAMSUNG_USB2
-   tristate "Samsung USB 2.0 PHY driver"
-   depends on HAS_IOMEM
-   depends on USB_EHCI_EXYNOS || USB_OHCI_EXYNOS || USB_DWC2
-   select GENERIC_PHY
-   select MFD_SYSCON
-   default ARCH_EXYNOS
-   help
- Enable this to support the Samsung USB 2.0 PHY driver for Samsung
- SoCs. This driver provides the interface for USB 2.0 PHY. Support
- for particular PHYs will be enabled based on the SoC type in addition
- to this driver.
-
-config PHY_S5PV210_USB2
-   bool "Support for S5PV210"
-   depends on PHY_SAMSUNG_USB2
-   depends on ARCH_S5PV210
-   help
- Enable USB PHY support for S5P

[RFC PATCH] phy: samsung: move the Samsung specific phy files to "samsung" directory

[Jaehoon Chung]

Make the "samsung" directory and move the Samsung specific files to
there for maintaining the files relevant to Samsung.

Signed-off-by: Jaehoon Chung 
---
 drivers/phy/Kconfig   | 96 +--
 drivers/phy/Makefile  | 14 +---
 drivers/phy/samsung/Kconfig   | 92 ++
 drivers/phy/samsung/Makefile  | 11 +++
 drivers/phy/{ => samsung}/phy-exynos-dp-video.c   |  0
 drivers/phy/{ => samsung}/phy-exynos-mipi-video.c |  0
 drivers/phy/{ => samsung}/phy-exynos-pcie.c   |  0
 drivers/phy/{ => samsung}/phy-exynos4210-usb2.c   |  0
 drivers/phy/{ => samsung}/phy-exynos4x12-usb2.c   |  0
 drivers/phy/{ => samsung}/phy-exynos5-usbdrd.c|  0
 drivers/phy/{ => samsung}/phy-exynos5250-sata.c   |  0
 drivers/phy/{ => samsung}/phy-exynos5250-usb2.c   |  0
 drivers/phy/{ => samsung}/phy-s5pv210-usb2.c  |  0
 drivers/phy/{ => samsung}/phy-samsung-usb2.c  |  0
 drivers/phy/{ => samsung}/phy-samsung-usb2.h  |  0
 15 files changed, 108 insertions(+), 105 deletions(-)
 create mode 100644 drivers/phy/samsung/Kconfig
 create mode 100644 drivers/phy/samsung/Makefile
 rename drivers/phy/{ => samsung}/phy-exynos-dp-video.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos-mipi-video.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos-pcie.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos4210-usb2.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos4x12-usb2.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos5-usbdrd.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos5250-sata.c (100%)
 rename drivers/phy/{ => samsung}/phy-exynos5250-usb2.c (100%)
 rename drivers/phy/{ => samsung}/phy-s5pv210-usb2.c (100%)
 rename drivers/phy/{ => samsung}/phy-samsung-usb2.c (100%)
 rename drivers/phy/{ => samsung}/phy-samsung-usb2.h (100%)

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index dc5277a..10de740 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -72,16 +72,6 @@ config PHY_DM816X_USB
help
  Enable this for dm816x USB to work.
 
-config PHY_EXYNOS_MIPI_VIDEO
-   tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
-   depends on HAS_IOMEM
-   depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
-   select GENERIC_PHY
-   default y if ARCH_S5PV210 || ARCH_EXYNOS
-   help
- Support for MIPI CSI-2 and MIPI DSI DPHY found on Samsung S5P
- and EXYNOS SoCs.
-
 config PHY_LPC18XX_USB_OTG
tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver"
depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
@@ -194,15 +184,6 @@ config TWL4030_USB
  This transceiver supports high and full speed devices plus,
  in host mode, low speed.
 
-config PHY_EXYNOS_DP_VIDEO
-   tristate "EXYNOS SoC series Display Port PHY driver"
-   depends on OF
-   depends on ARCH_EXYNOS || COMPILE_TEST
-   default ARCH_EXYNOS
-   select GENERIC_PHY
-   help
- Support for Display Port PHY found on Samsung EXYNOS SoCs.
-
 config BCM_KONA_USB2_PHY
tristate "Broadcom Kona USB2 PHY Driver"
depends on HAS_IOMEM
@@ -210,21 +191,6 @@ config BCM_KONA_USB2_PHY
help
  Enable this to support the Broadcom Kona USB 2.0 PHY.
 
-config PHY_EXYNOS5250_SATA
-   tristate "Exynos5250 Sata SerDes/PHY driver"
-   depends on SOC_EXYNOS5250
-   depends on HAS_IOMEM
-   depends on OF
-   select GENERIC_PHY
-   select I2C
-   select I2C_S3C2410
-   select MFD_SYSCON
-   help
- Enable this to support SATA SerDes/Phy found on Samsung's
- Exynos5250 based SoCs.This SerDes/Phy supports SATA 1.5 Gb/s,
- SATA 3.0 Gb/s, SATA 6.0 Gb/s speeds. It supports one SATA host
- port to accept one SATA device.
-
 config PHY_HIX5HD2_SATA
tristate "HIX5HD2 SATA PHY Driver"
depends on ARCH_HIX5HD2 && OF && HAS_IOMEM
@@ -280,65 +246,6 @@ config PHY_SUN9I_USB
 
  This driver controls each individual USB 2 host PHY.
 
-config PHY_SAMSUNG_USB2
-   tristate "Samsung USB 2.0 PHY driver"
-   depends on HAS_IOMEM
-   depends on USB_EHCI_EXYNOS || USB_OHCI_EXYNOS || USB_DWC2
-   select GENERIC_PHY
-   select MFD_SYSCON
-   default ARCH_EXYNOS
-   help
- Enable this to support the Samsung USB 2.0 PHY driver for Samsung
- SoCs. This driver provides the interface for USB 2.0 PHY. Support
- for particular PHYs will be enabled based on the SoC type in addition
- to this driver.
-
-config PHY_S5PV210_USB2
-   bool "Support for S5PV210"
-   depends on PHY_SAMSUNG_USB2
-   depends on ARCH_S5PV210
-   help
- Enable USB PHY support for S5PV210. This 

[PATCH] phy: phy-exynos-pcie: fix the wrong error return

[Jaehoon Chung]

When it doesn't get the blk_base's resource, it was returned
the error about phy_base, not blk_base.
This patch is for fixing the wrong error return about blk_base.

Fixes: cf0adb8e281b ("phy: phy-exynos-pcie: Add support for Exynos PCIe PHY")

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 drivers/phy/phy-exynos-pcie.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/phy-exynos-pcie.c b/drivers/phy/phy-exynos-pcie.c
index 4f60b83..60baf25 100644
--- a/drivers/phy/phy-exynos-pcie.c
+++ b/drivers/phy/phy-exynos-pcie.c
@@ -254,8 +254,8 @@ static int exynos_pcie_phy_probe(struct platform_device 
*pdev)
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
exynos_phy->blk_base = devm_ioremap_resource(dev, res);
-   if (IS_ERR(exynos_phy->phy_base))
-   return PTR_ERR(exynos_phy->phy_base);
+   if (IS_ERR(exynos_phy->blk_base))
+   return PTR_ERR(exynos_phy->blk_base);
 
exynos_phy->drv_data = drv_data;
 
-- 
2.10.2

[PATCH] phy: phy-exynos-pcie: fix the wrong error return

[Jaehoon Chung]

When it doesn't get the blk_base's resource, it was returned
the error about phy_base, not blk_base.
This patch is for fixing the wrong error return about blk_base.

Fixes: cf0adb8e281b ("phy: phy-exynos-pcie: Add support for Exynos PCIe PHY")

Signed-off-by: Jaehoon Chung 
---
 drivers/phy/phy-exynos-pcie.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/phy-exynos-pcie.c b/drivers/phy/phy-exynos-pcie.c
index 4f60b83..60baf25 100644
--- a/drivers/phy/phy-exynos-pcie.c
+++ b/drivers/phy/phy-exynos-pcie.c
@@ -254,8 +254,8 @@ static int exynos_pcie_phy_probe(struct platform_device 
*pdev)
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
exynos_phy->blk_base = devm_ioremap_resource(dev, res);
-   if (IS_ERR(exynos_phy->phy_base))
-   return PTR_ERR(exynos_phy->phy_base);
+   if (IS_ERR(exynos_phy->blk_base))
+   return PTR_ERR(exynos_phy->blk_base);
 
exynos_phy->drv_data = drv_data;
 
-- 
2.10.2

[PATCH] PCI: exynos: fix the NULL pointer dereference about elbi_base

[Jaehoon Chung]

Even though using phy framework, it has to get the elbi_base.
Before this patch, elbi_base should be NULL pointer.

Fixes: e7cd7ef58e1f ("PCI: exynos: Support the PHY generic framework")

Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
 drivers/pci/dwc/pci-exynos.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/dwc/pci-exynos.c b/drivers/pci/dwc/pci-exynos.c
index 993b650..44f774c 100644
--- a/drivers/pci/dwc/pci-exynos.c
+++ b/drivers/pci/dwc/pci-exynos.c
@@ -132,10 +132,6 @@ static int exynos5440_pcie_get_mem_resources(struct 
platform_device *pdev,
struct device *dev = pci->dev;
struct resource *res;
 
-   /* If using the PHY framework, doesn't need to get other resource */
-   if (ep->using_phy)
-   return 0;
-
ep->mem_res = devm_kzalloc(dev, sizeof(*ep->mem_res), GFP_KERNEL);
if (!ep->mem_res)
return -ENOMEM;
@@ -145,6 +141,10 @@ static int exynos5440_pcie_get_mem_resources(struct 
platform_device *pdev,
if (IS_ERR(ep->mem_res->elbi_base))
return PTR_ERR(ep->mem_res->elbi_base);
 
+   /* If using the PHY framework, doesn't need to get other resource */
+   if (ep->using_phy)
+   return 0;
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
ep->mem_res->phy_base = devm_ioremap_resource(dev, res);
if (IS_ERR(ep->mem_res->phy_base))
-- 
2.10.2

[PATCH] PCI: exynos: fix the NULL pointer dereference about elbi_base

[Jaehoon Chung]

Even though using phy framework, it has to get the elbi_base.
Before this patch, elbi_base should be NULL pointer.

Fixes: e7cd7ef58e1f ("PCI: exynos: Support the PHY generic framework")

Signed-off-by: Jaehoon Chung 
---
 drivers/pci/dwc/pci-exynos.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/dwc/pci-exynos.c b/drivers/pci/dwc/pci-exynos.c
index 993b650..44f774c 100644
--- a/drivers/pci/dwc/pci-exynos.c
+++ b/drivers/pci/dwc/pci-exynos.c
@@ -132,10 +132,6 @@ static int exynos5440_pcie_get_mem_resources(struct 
platform_device *pdev,
struct device *dev = pci->dev;
struct resource *res;
 
-   /* If using the PHY framework, doesn't need to get other resource */
-   if (ep->using_phy)
-   return 0;
-
ep->mem_res = devm_kzalloc(dev, sizeof(*ep->mem_res), GFP_KERNEL);
if (!ep->mem_res)
return -ENOMEM;
@@ -145,6 +141,10 @@ static int exynos5440_pcie_get_mem_resources(struct 
platform_device *pdev,
if (IS_ERR(ep->mem_res->elbi_base))
return PTR_ERR(ep->mem_res->elbi_base);
 
+   /* If using the PHY framework, doesn't need to get other resource */
+   if (ep->using_phy)
+   return 0;
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
ep->mem_res->phy_base = devm_ioremap_resource(dev, res);
if (IS_ERR(ep->mem_res->phy_base))
-- 
2.10.2

Re: [PATCH v4 2/2] mmc: host: s3cmci: allow probing from device tree

[Jaehoon Chung]

On 03/03/2017 08:38 PM, Sergio Prado wrote:
> On Fri, Mar 03, 2017 at 11:14:29AM +0900, Jaehoon Chung wrote:
>> On 03/02/2017 10:18 AM, Sergio Prado wrote:
>>> Allows configuring Samsung S3C24XX MMC/SD/SDIO controller using a device
>>> tree.
>>>
>>> Signed-off-by: Sergio Prado <sergio.pr...@e-labworks.com>
>>> ---
>>>  drivers/mmc/host/s3cmci.c | 298 
>>> --
>>>  drivers/mmc/host/s3cmci.h |   3 +-
>>>  2 files changed, 158 insertions(+), 143 deletions(-)
>>>
>>> diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c
>>> index 7a173f8c455b..d066dbdb957c 100644
>>> --- a/drivers/mmc/host/s3cmci.c
>>> +++ b/drivers/mmc/host/s3cmci.c
>>> @@ -24,6 +24,10 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>>  
>>>  #include 
>>>  #include 
>>> @@ -128,6 +132,22 @@ enum dbg_channels {
>>> dbg_conf  = (1 << 8),
>>>  };
>>>  
>>> +struct s3cmci_variant_data {
>>> +   int s3c2440_compatible;
>>> +};
>>
>> I didn't understand why this structure needs.
>>
>> Before this patch,
>> host->is2440;
>>
>> After this patch,
>> host->variant->s3c2440_compatible;
>>
>> Just add the one pointer for checking s3c2400 compatible..
>> Is it really meaningful?
>> (I didn't read the previous comments fully.)
> 
> Although just a pointer would be enought, having a structure makes it
> more flexible to extend it in the future.

If you will add the other members in this structure, it's ok.
But if it's only for compatible, i don't agree this.

Best Regards,
Jaehoon Chung

> 
> Best regards,
> 
> Sergio Prado
> 
> 
> 

Re: [PATCH v4 2/2] mmc: host: s3cmci: allow probing from device tree

[Jaehoon Chung]

On 03/03/2017 08:38 PM, Sergio Prado wrote:
> On Fri, Mar 03, 2017 at 11:14:29AM +0900, Jaehoon Chung wrote:
>> On 03/02/2017 10:18 AM, Sergio Prado wrote:
>>> Allows configuring Samsung S3C24XX MMC/SD/SDIO controller using a device
>>> tree.
>>>
>>> Signed-off-by: Sergio Prado 
>>> ---
>>>  drivers/mmc/host/s3cmci.c | 298 
>>> --
>>>  drivers/mmc/host/s3cmci.h |   3 +-
>>>  2 files changed, 158 insertions(+), 143 deletions(-)
>>>
>>> diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c
>>> index 7a173f8c455b..d066dbdb957c 100644
>>> --- a/drivers/mmc/host/s3cmci.c
>>> +++ b/drivers/mmc/host/s3cmci.c
>>> @@ -24,6 +24,10 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>>  
>>>  #include 
>>>  #include 
>>> @@ -128,6 +132,22 @@ enum dbg_channels {
>>> dbg_conf  = (1 << 8),
>>>  };
>>>  
>>> +struct s3cmci_variant_data {
>>> +   int s3c2440_compatible;
>>> +};
>>
>> I didn't understand why this structure needs.
>>
>> Before this patch,
>> host->is2440;
>>
>> After this patch,
>> host->variant->s3c2440_compatible;
>>
>> Just add the one pointer for checking s3c2400 compatible..
>> Is it really meaningful?
>> (I didn't read the previous comments fully.)
> 
> Although just a pointer would be enought, having a structure makes it
> more flexible to extend it in the future.

If you will add the other members in this structure, it's ok.
But if it's only for compatible, i don't agree this.

Best Regards,
Jaehoon Chung

> 
> Best regards,
> 
> Sergio Prado
> 
> 
> 

Re: [PATCH v4 1/2] dt-bindings: mmc: add DT binding for S3C24XX MMC/SD/SDIO controller

[Jaehoon Chung]

On 03/02/2017 10:18 AM, Sergio Prado wrote:
> Adds the device tree bindings description for Samsung S3C24XX
> MMC/SD/SDIO controller, used as a connectivity interface with external
> MMC, SD and SDIO storage mediums.
> 
> Signed-off-by: Sergio Prado <sergio.pr...@e-labworks.com>
> ---
>  .../devicetree/bindings/mmc/samsung,s3cmci.txt | 42 
> ++
>  1 file changed, 42 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mmc/samsung,s3cmci.txt
> 
> diff --git a/Documentation/devicetree/bindings/mmc/samsung,s3cmci.txt 
> b/Documentation/devicetree/bindings/mmc/samsung,s3cmci.txt
> new file mode 100644
> index ..5f68feb9f9d6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mmc/samsung,s3cmci.txt
> @@ -0,0 +1,42 @@
> +* Samsung's S3C24XX MMC/SD/SDIO controller device tree bindings
> +
> +Samsung's S3C24XX MMC/SD/SDIO controller is used as a connectivity interface
> +with external MMC, SD and SDIO storage mediums.
> +
> +This file documents differences between the core mmc properties described by
> +mmc.txt and the properties used by the Samsung S3C24XX MMC/SD/SDIO controller
> +implementation.
> +
> +Required SoC Specific Properties:
> +- compatible: should be one of the following
> +  - "samsung,s3c2410-sdi": for controllers compatible with s3c2410
> +  - "samsung,s3c2412-sdi": for controllers compatible with s3c2412
> +  - "samsung,s3c2440-sdi": for controllers compatible with s3c2440
> +- reg: register location and length
> +- interrupts: mmc controller interrupt
> +- clocks: Should reference the controller clock
> +- clock-names: Should contain "sdi"
> +
> +Required Board Specific Properties:
> +- pinctrl-0: Should specify pin control groups used for this controller.
> +- pinctrl-names: Should contain only one value - "default".
> +
> +Optional Properties:
> +- bus-width: number of data lines (see mmc.txt)
> +- cd-gpios: gpio for card detection (see mmc.txt)
> +- wp-gpios: gpio for write protection (see mmc.txt)

I think these properties don't need to describe at here.
It's common properties.

Best Regards,
Jaehoon Chung

> +
> +Example:
> +
> + mmc0: mmc@5a00 {
> + compatible = "samsung,s3c2440-sdi";
> + pinctrl-names = "default";
> + pinctrl-0 = <_pins>;
> + reg = <0x5a00 0x10>;
> + interrupts = <0 0 21 3>;
> + clocks = < PCLK_SDI>;
> + clock-names = "sdi";
> + bus-width = <4>;
> + cd-gpios = < 8 GPIO_ACTIVE_LOW>;
> + wp-gpios = < 8 GPIO_ACTIVE_LOW>;
> + };
>