[PATCH V3 1/1] arm64: dts: ipq6018: Add the QPIC peripheral nodes
Add the QPIC BAM and QPIC NAND controller support and
enable the same in board DTS file.
Co-developed-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 16
arch/arm64/boot/dts/qcom/ipq6018.dtsi| 41
2 files changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
index e8eaa958c199..99cefe88f6f2 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
+++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
@@ -62,3 +62,19 @@ spi_0_pins: spi-0-pins {
bias-pull-down;
};
};
+
+_bam {
+ status = "okay";
+};
+
+_nand {
+ status = "okay";
+
+ nand@0 {
+ reg = <0>;
+
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-bus-width = <8>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index cdc1e3d60c58..5372ec12cdad 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -231,6 +231,17 @@ serial_3_pins: serial3-pinmux {
drive-strength = <8>;
bias-pull-down;
};
+
+ qpic_pins: qpic-pins {
+ pins = "gpio1", "gpio3", "gpio4",
+ "gpio5", "gpio6", "gpio7",
+ "gpio8", "gpio10", "gpio11",
+ "gpio12", "gpio13", "gpio14",
+ "gpio15", "gpio17";
+ function = "qpic_pad";
+ drive-strength = <8>;
+ bias-disable;
+ };
};
gcc: gcc@180 {
@@ -332,6 +343,36 @@ i2c_1: i2c@78b7000 { /* BLSP1 QUP2 */
status = "disabled";
};
+ qpic_bam: dma-controller@7984000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x0 0x07984000 0x0 0x1a000>;
+ interrupts = ;
+ clocks = < GCC_QPIC_CLK>,
+< GCC_QPIC_AHB_CLK>;
+ clock-names = "iface_clk", "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ status = "disabled";
+ };
+
+ qpic_nand: nand@79b {
+ compatible = "qcom,ipq6018-nand";
+ reg = <0x0 0x079b 0x0 0x1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = < GCC_QPIC_CLK>,
+< GCC_QPIC_AHB_CLK>;
+ clock-names = "core", "aon";
+
+ dmas = <_bam 0>,
+ <_bam 1>,
+ <_bam 2>;
+ dma-names = "tx", "rx", "cmd";
+ pinctrl-0 = <_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
intc: interrupt-controller@b00 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH V3 0/1] Add QPIC NAND support for IPQ6018
IPQ6018 has the QPIC NAND controller of version 1.5.0, which uses the BAM DMA. Add support for the QPIC BAM, QPIC NAND and enable the same in the board DTS file. [V3]: - Rebased on v5.10-rc6 - Renamed the qpic bam dma node name from 'dma' to 'dma-controller' - Update the device register space to 64bit format Above mentioned last two points based on the latest changes in the QCOM tree. [V2]: - Rebased on v5.10-rc2 - Replaced "ok" with "okay" for status property - Dropped the MTD and dt-bindings patch as they are already picked in MTD tree Kathiravan T (1): arm64: dts: ipq6018: Add the QPIC peripheral nodes arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 16 arch/arm64/boot/dts/qcom/ipq6018.dtsi| 41 2 files changed, 57 insertions(+) base-commit: b65054597872ce3aefbc6a666385eabdf9e288da -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2 0/1] Add QPIC NAND support for IPQ6018
IPQ6018 has the QPIC NAND controller of version 1.5.0, which uses the BAM DMA. Add support for the QPIC BAM, QPIC NAND and enable the same in the board DTS file. [V2]: - Rebased on v5.10-rc2 - Replaced "ok" with "okay" for status property - Dropped the MTD and dt-bindings patch as they are already picked in MTD tree Kathiravan T (1): arm64: dts: ipq6018: Add the QPIC peripheral nodes arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 16 arch/arm64/boot/dts/qcom/ipq6018.dtsi| 41 2 files changed, 57 insertions(+) base-commit: 3cea11cd5e3b00d91caf0b4730194039b45c5891 -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2 1/1] arm64: dts: ipq6018: Add the QPIC peripheral nodes
Add the QPIC BAM and QPIC NAND controller support and
enable the same in board DTS file.
Co-developed-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 16
arch/arm64/boot/dts/qcom/ipq6018.dtsi| 41
2 files changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
index e8eaa958c199..99cefe88f6f2 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
+++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
@@ -62,3 +62,19 @@ spi_0_pins: spi-0-pins {
bias-pull-down;
};
};
+
+_bam {
+ status = "okay";
+};
+
+_nand {
+ status = "okay";
+
+ nand@0 {
+ reg = <0>;
+
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-bus-width = <8>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 1aa8d8579463..6b13e390ee29 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -173,6 +173,17 @@ serial_3_pins: serial3-pinmux {
drive-strength = <8>;
bias-pull-down;
};
+
+ qpic_pins: qpic-pins {
+ pins = "gpio1", "gpio3", "gpio4",
+ "gpio5", "gpio6", "gpio7",
+ "gpio8", "gpio10", "gpio11",
+ "gpio12", "gpio13", "gpio14",
+ "gpio15", "gpio17";
+ function = "qpic_pad";
+ drive-strength = <8>;
+ bias-disable;
+ };
};
gcc: gcc@180 {
@@ -274,6 +285,36 @@ i2c_1: i2c@78b7000 { /* BLSP1 QUP2 */
status = "disabled";
};
+ qpic_bam: dma@7984000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x07984000 0x1a000>;
+ interrupts = ;
+ clocks = < GCC_QPIC_CLK>,
+< GCC_QPIC_AHB_CLK>;
+ clock-names = "iface_clk", "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ status = "disabled";
+ };
+
+ qpic_nand: nand@79b {
+ compatible = "qcom,ipq6018-nand";
+ reg = <0x079b 0x1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = < GCC_QPIC_CLK>,
+< GCC_QPIC_AHB_CLK>;
+ clock-names = "core", "aon";
+
+ dmas = <_bam 0>,
+ <_bam 1>,
+ <_bam 2>;
+ dma-names = "tx", "rx", "cmd";
+ pinctrl-0 = <_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
intc: interrupt-controller@b00 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH v4] watchdog: qcom_wdt: set WDOG_HW_RUNNING bit when appropriate
On 11/2/2020 10:33 AM, Guenter Roeck wrote: On 11/1/20 7:58 PM, Kathiravan T wrote: On 10/31/2020 7:38 PM, Guenter Roeck wrote: On 10/31/20 5:11 AM, Robert Marko wrote: If the watchdog hardware is enabled/running during boot, e.g. due to a boot loader configuring it, we must tell the watchdog framework about this fact so that it can ping the watchdog until userspace opens the device and takes over control. Do so using the WDOG_HW_RUNNING flag that exists for exactly that use-case. Signed-off-by: Robert Marko Reviewed-by: Guenter Roeck Thanks for addressing the comments and now the patch looks good to me. One more suggestion, can we make the initcall level of the driver to subsys_initcall_sync so that the driver gets registered immediately after the watchdog_core is registered and watchdog_core starts pinging the WDT? That would mean to replace module_platform_driver(), which would be a whole different discussion, is not widely needed, and would potentially interfere with the subsys_initcall_sync() in the watchdog core. This will require specific evidence that a problem is seen in the field, and that it is truly needed. Plus, it would have to be a different patch (which you could submit yourself, with evidence). Let's stick with one logical change per patch, please. Guenter Yeah, of course I don't want to squash the initcall level change with this one. Just made a suggestion to consider it. Anyway I will try to collect some data and post the patch by own on that suggestion. Thanks Guenter. -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH v4] watchdog: qcom_wdt: set WDOG_HW_RUNNING bit when appropriate
On 10/31/2020 7:38 PM, Guenter Roeck wrote:
On 10/31/20 5:11 AM, Robert Marko wrote:
If the watchdog hardware is enabled/running during boot, e.g.
due to a boot loader configuring it, we must tell the
watchdog framework about this fact so that it can ping the
watchdog until userspace opens the device and takes over
control.
Do so using the WDOG_HW_RUNNING flag that exists for exactly
that use-case.
Signed-off-by: Robert Marko
Reviewed-by: Guenter Roeck
Thanks for addressing the comments and now the patch looks good to me.
One more suggestion, can we make the initcall level of the driver to
subsys_initcall_sync so that the driver gets registered immediately
after the watchdog_core is registered and watchdog_core starts pinging
the WDT?
Cc: Luka Perkov
---
Changes in v4:
* Use QCOM_WDT_ENABLE macro
Changes in v3:
* Drop call to stop as start already does it
* Update commit message
Changes in v2:
* Correct authorship
drivers/watchdog/qcom-wdt.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/watchdog/qcom-wdt.c b/drivers/watchdog/qcom-wdt.c
index ab7465d186fd..07d399c4edc4 100644
--- a/drivers/watchdog/qcom-wdt.c
+++ b/drivers/watchdog/qcom-wdt.c
@@ -152,6 +152,13 @@ static int qcom_wdt_restart(struct watchdog_device *wdd,
unsigned long action,
return 0;
}
+static int qcom_wdt_is_running(struct watchdog_device *wdd)
+{
+ struct qcom_wdt *wdt = to_qcom_wdt(wdd);
+
+ return (readl(wdt_addr(wdt, WDT_EN)) & QCOM_WDT_ENABLE);
+}
+
static const struct watchdog_ops qcom_wdt_ops = {
.start = qcom_wdt_start,
.stop = qcom_wdt_stop,
@@ -294,6 +301,17 @@ static int qcom_wdt_probe(struct platform_device *pdev)
wdt->wdd.timeout = min(wdt->wdd.max_timeout, 30U);
watchdog_init_timeout(>wdd, 0, dev);
+ /*
+* If WDT is already running, call WDT start which
+* will stop the WDT, set timeouts as bootloader
+* might use different ones and set running bit
+* to inform the WDT subsystem to ping the WDT
+*/
+ if (qcom_wdt_is_running(>wdd)) {
+ qcom_wdt_start(>wdd);
+ set_bit(WDOG_HW_RUNNING, >wdd.status);
+ }
+
ret = devm_watchdog_register_device(dev, >wdd);
if (ret)
return ret;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH] arm64: defconfig: enable APSS clock driver for IPQ6018
Bjorn, Wondering if this patch was overlooked due to some reason or should I send V2 based on v5.10-rc1? Thanks, Kathiravan T. On 10/8/2020 9:59 PM, Kathiravan T wrote: Bjorn, Any comments on this? I would like to know if there is any chances of taking this patch for v5.10 merge window? Thanks, Kathiravan T. On 9/17/2020 7:26 PM, Kathiravan T wrote: Lets enable the APSS clock driver for the DVFS support. Signed-off-by: Kathiravan T --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 6d04b9577b0b..67244560f869 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -850,6 +850,7 @@ CONFIG_QCOM_A53PLL=y CONFIG_QCOM_CLK_APCS_MSM8916=y CONFIG_QCOM_CLK_SMD_RPM=y CONFIG_QCOM_CLK_RPMH=y +CONFIG_IPQ_APSS_6018=y CONFIG_IPQ_GCC_8074=y CONFIG_IPQ_GCC_6018=y CONFIG_MSM_GCC_8916=y base-commit: 856deb866d16e29bd65952e0289066f6078af773 -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH] arm64: dts: ipq6018: update the reserved-memory node
Memory region reserved for the TZ is changed long back. Let's
update the same to align with the corret region. Its size also
increased to 4MB from 2MB.
Along with that, bump the Q6 region size to 85MB.
Fixes: 1e8277854b49 ("arm64: dts: Add ipq6018 SoC and CP01 board support")
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 1aa8d8579463..ee7acddcbdfa 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -98,8 +98,8 @@ reserved-memory {
#size-cells = <2>;
ranges;
- tz: tz@4850 {
- reg = <0x0 0x4850 0x0 0x0020>;
+ tz: memory@4a60 {
+ reg = <0x0 0x4a60 0x0 0x0040>;
no-map;
};
@@ -109,7 +109,7 @@ smem_region: memory@4aa0 {
};
q6_region: memory@4ab0 {
- reg = <0x0 0x4ab0 0x0 0x0280>;
+ reg = <0x0 0x4ab0 0x0 0x0550>;
no-map;
};
};
base-commit: bbf5c979011a099af5dc76498918ed7df445635b
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH 0/3] Add QPIC NAND support for IPQ6018
IPQ6018 has the QPIC NAND controller of version 1.5.0, which uses the BAM DMA. Add support for the QPIC BAM, QPIC NAND and enable the same in the board DTS file. Kathiravan T (3): dt-bindings: qcom_nandc: IPQ6018 QPIC NAND documentation mtd: rawnand: qcom: Support for IPQ6018 QPIC NAND controller arm64: dts: ipq6018: Add the QPIC peripheral nodes .../devicetree/bindings/mtd/qcom_nandc.txt| 2 + arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 16 arch/arm64/boot/dts/qcom/ipq6018.dtsi | 41 +++ drivers/mtd/nand/raw/qcom_nandc.c | 4 ++ 4 files changed, 63 insertions(+) base-commit: bbf5c979011a099af5dc76498918ed7df445635b -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH 2/3] mtd: rawnand: qcom: Support for IPQ6018 QPIC NAND controller
Add the compatible string for IPQ6018 QPIC NAND controller
version 1.5.0. It's properties are same as IPQ8074, so reuse
the same.
Signed-off-by: Kathiravan T
---
drivers/mtd/nand/raw/qcom_nandc.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/nand/raw/qcom_nandc.c
b/drivers/mtd/nand/raw/qcom_nandc.c
index bd7a7251429b..e7480b53ad40 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
@@ -3071,6 +3071,10 @@ static const struct of_device_id qcom_nandc_of_match[] =
{
.compatible = "qcom,ipq4019-nand",
.data = _nandc_props,
},
+ {
+ .compatible = "qcom,ipq6018-nand",
+ .data = _nandc_props,
+ },
{
.compatible = "qcom,ipq8074-nand",
.data = _nandc_props,
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH 1/3] dt-bindings: qcom_nandc: IPQ6018 QPIC NAND documentation
Add the binding for the QPIC NAND used on IPQ6018 SoC. Signed-off-by: Kathiravan T --- Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt index 5c2fba4b30fe..5bdcd9990a94 100644 --- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt @@ -6,6 +6,8 @@ Required properties: SoC and it uses ADM DMA * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in IPQ4019 SoC and it uses BAM DMA +* "qcom,ipq6018-nand" - for QPIC NAND controller v1.5.0 being used in +IPQ6018 SoC and it uses BAM DMA * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in IPQ8074 SoC and it uses BAM DMA -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH 3/3] arm64: dts: ipq6018: Add the QPIC peripheral nodes
Add the QPIC BAM and QPIC NAND controller support and
enable the same in board DTS file.
Co-developed-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 16
arch/arm64/boot/dts/qcom/ipq6018.dtsi| 41
2 files changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
index b31117a93995..6e68de1a0b0a 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
+++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
@@ -62,3 +62,19 @@ spi_0_pins: spi-0-pins {
bias-pull-down;
};
};
+
+_bam {
+ status = "ok";
+};
+
+_nand {
+ status = "ok";
+
+ nand@0 {
+ reg = <0>;
+
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-bus-width = <8>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 1aa8d8579463..6b13e390ee29 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -173,6 +173,17 @@ serial_3_pins: serial3-pinmux {
drive-strength = <8>;
bias-pull-down;
};
+
+ qpic_pins: qpic-pins {
+ pins = "gpio1", "gpio3", "gpio4",
+ "gpio5", "gpio6", "gpio7",
+ "gpio8", "gpio10", "gpio11",
+ "gpio12", "gpio13", "gpio14",
+ "gpio15", "gpio17";
+ function = "qpic_pad";
+ drive-strength = <8>;
+ bias-disable;
+ };
};
gcc: gcc@180 {
@@ -274,6 +285,36 @@ i2c_1: i2c@78b7000 { /* BLSP1 QUP2 */
status = "disabled";
};
+ qpic_bam: dma@7984000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x07984000 0x1a000>;
+ interrupts = ;
+ clocks = < GCC_QPIC_CLK>,
+< GCC_QPIC_AHB_CLK>;
+ clock-names = "iface_clk", "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ status = "disabled";
+ };
+
+ qpic_nand: nand@79b {
+ compatible = "qcom,ipq6018-nand";
+ reg = <0x079b 0x1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = < GCC_QPIC_CLK>,
+< GCC_QPIC_AHB_CLK>;
+ clock-names = "core", "aon";
+
+ dmas = <_bam 0>,
+ <_bam 1>,
+ <_bam 2>;
+ dma-names = "tx", "rx", "cmd";
+ pinctrl-0 = <_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
intc: interrupt-controller@b00 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH] arm64: defconfig: enable APSS clock driver for IPQ6018
Bjorn, Any comments on this? I would like to know if there is any chances of taking this patch for v5.10 merge window? Thanks, Kathiravan T. On 9/17/2020 7:26 PM, Kathiravan T wrote: Lets enable the APSS clock driver for the DVFS support. Signed-off-by: Kathiravan T --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 6d04b9577b0b..67244560f869 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -850,6 +850,7 @@ CONFIG_QCOM_A53PLL=y CONFIG_QCOM_CLK_APCS_MSM8916=y CONFIG_QCOM_CLK_SMD_RPM=y CONFIG_QCOM_CLK_RPMH=y +CONFIG_IPQ_APSS_6018=y CONFIG_IPQ_GCC_8074=y CONFIG_IPQ_GCC_6018=y CONFIG_MSM_GCC_8916=y base-commit: 856deb866d16e29bd65952e0289066f6078af773 -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH] arm64: defconfig: enable APSS clock driver for IPQ6018
Lets enable the APSS clock driver for the DVFS support. Signed-off-by: Kathiravan T --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 6d04b9577b0b..67244560f869 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -850,6 +850,7 @@ CONFIG_QCOM_A53PLL=y CONFIG_QCOM_CLK_APCS_MSM8916=y CONFIG_QCOM_CLK_SMD_RPM=y CONFIG_QCOM_CLK_RPMH=y +CONFIG_IPQ_APSS_6018=y CONFIG_IPQ_GCC_8074=y CONFIG_IPQ_GCC_6018=y CONFIG_MSM_GCC_8916=y base-commit: 856deb866d16e29bd65952e0289066f6078af773 -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH] arm64: dts: ipq8074: enable watchdog support
Enable watchdog support for the IPQ8074 SoCs.
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 96a5ec89b5f0..74a474300314 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -498,6 +498,14 @@ timer {
;
};
+ watchdog: watchdog@b017000 {
+ compatible = "qcom,kpss-wdt";
+ reg = <0xb017000 0x1000>;
+ interrupts = ;
+ clocks = <_clk>;
+ timeout-sec = <30>;
+ };
+
timer@b12 {
#address-cells = <1>;
#size-cells = <1>;
base-commit: f75aef392f869018f78cfedf3c320a6b3fcfda6b
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH V2 0/2] Enable DVFS support for IPQ6018
Bjorn, Can you help to share your comments on this series? Thanks, Kathiravan T. On 8/17/2020 12:48 PM, Kathiravan T wrote: Add A53 PLL, APCS clock, RPM Glink, RPM message RAM, cpu-opp-table, SMPA2 regulator to enable the cpu frequency on IPQ6018. [v2] - Rebased on v5.9-rc1 - Picked up the Rob's Acked-by tag for mailbox YAML - Regulator binding in V1 was picked by Mark and available in v5.9-rc1 Kathiravan T (2): dt-bindings: mailbox: add compatible for the IPQ6018 SoC arm64: dts: ipq6018: enable DVFS support .../bindings/mailbox/qcom,apcs-kpss-global.yaml| 1 + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 96 +- 2 files changed, 94 insertions(+), 3 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2 0/2] Enable DVFS support for IPQ6018
Add A53 PLL, APCS clock, RPM Glink, RPM message RAM, cpu-opp-table, SMPA2 regulator to enable the cpu frequency on IPQ6018. [v2] - Rebased on v5.9-rc1 - Picked up the Rob's Acked-by tag for mailbox YAML - Regulator binding in V1 was picked by Mark and available in v5.9-rc1 Kathiravan T (2): dt-bindings: mailbox: add compatible for the IPQ6018 SoC arm64: dts: ipq6018: enable DVFS support .../bindings/mailbox/qcom,apcs-kpss-global.yaml| 1 + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 96 +- 2 files changed, 94 insertions(+), 3 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2 1/2] dt-bindings: mailbox: add compatible for the IPQ6018 SoC
Add the mailbox compatible for the IPQ6018 SoC. Acked-by: Rob Herring Signed-off-by: Kathiravan T --- Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index 8f810fc5c183..ffd09b664ff5 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -16,6 +16,7 @@ maintainers: properties: compatible: enum: + - qcom,ipq6018-apcs-apps-global - qcom,ipq8074-apcs-apps-global - qcom,msm8916-apcs-kpss-global - qcom,msm8994-apcs-kpss-global -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2 2/2] arm64: dts: ipq6018: enable DVFS support
Add A53 PLL, APCS clock, RPM Glink, RPM message RAM, cpu-opp-table,
SMPA2 regulator to enable the cpu frequency on IPQ6018.
Co-developed-by: Sivaprakash Murugesan
Signed-off-by: Sivaprakash Murugesan
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 96 +--
1 file changed, 93 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 1aa8d8579463..a94dac76bf3f 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
/ {
#address-cells = <2>;
@@ -38,6 +39,10 @@
reg = <0x0>;
enable-method = "psci";
next-level-cache = <_0>;
+ clocks = <_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <_opp_table>;
+ cpu-supply = <_s2>;
};
CPU1: cpu@1 {
@@ -46,6 +51,10 @@
enable-method = "psci";
reg = <0x1>;
next-level-cache = <_0>;
+ clocks = <_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <_opp_table>;
+ cpu-supply = <_s2>;
};
CPU2: cpu@2 {
@@ -54,6 +63,10 @@
enable-method = "psci";
reg = <0x2>;
next-level-cache = <_0>;
+ clocks = <_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <_opp_table>;
+ cpu-supply = <_s2>;
};
CPU3: cpu@3 {
@@ -62,6 +75,10 @@
enable-method = "psci";
reg = <0x3>;
next-level-cache = <_0>;
+ clocks = <_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <_opp_table>;
+ cpu-supply = <_s2>;
};
L2_0: l2-cache {
@@ -70,6 +87,42 @@
};
};
+ cpu_opp_table: cpu_opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-86400 {
+ opp-hz = /bits/ 64 <86400>;
+ opp-microvolt = <725000>;
+ clock-latency-ns = <20>;
+ };
+ opp-105600 {
+ opp-hz = /bits/ 64 <105600>;
+ opp-microvolt = <787500>;
+ clock-latency-ns = <20>;
+ };
+ opp-132000 {
+ opp-hz = /bits/ 64 <132000>;
+ opp-microvolt = <862500>;
+ clock-latency-ns = <20>;
+ };
+ opp-144000 {
+ opp-hz = /bits/ 64 <144000>;
+ opp-microvolt = <925000>;
+ clock-latency-ns = <20>;
+ };
+ opp-160800 {
+ opp-hz = /bits/ 64 <160800>;
+ opp-microvolt = <987500>;
+ clock-latency-ns = <20>;
+ };
+ opp-18 {
+ opp-hz = /bits/ 64 <18>;
+ opp-microvolt = <1062500>;
+ clock-latency-ns = <20>;
+ };
+ };
+
firmware {
scm {
compatible = "qcom,scm";
@@ -98,6 +151,11 @@
#size-cells = <2>;
ranges;
+ rpm_msg_ram: memory@0x6 {
+ reg = <0x0 0x6 0x0 0x6000>;
+ no-map;
+ };
+
tz: tz@4850 {
reg = <0x0 0x4850 0x0 0x0020>;
no-map;
@@ -294,12 +352,22 @@
};
apcs_glb: mailbox@b111000 {
- compatible = "qcom,ipq8074-apcs-apps-global";
- reg = <0x0b111000 0xc>;
-
+ compatible = "qcom,ipq6018-apcs-apps-global";
+ reg = <0x0b111000 0x1000>;
+
[PATCH] soc: qcom: socinfo: add soc id for IPQ6018
Add the SoC ID for IPQ6018 variant.
Signed-off-by: Kathiravan T
---
[V2]:
- Rebased on v5.9-rc1
drivers/soc/qcom/socinfo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c
index e19102f46302..2b28667e1c66 100644
--- a/drivers/soc/qcom/socinfo.c
+++ b/drivers/soc/qcom/socinfo.c
@@ -223,6 +223,7 @@ static const struct soc_id soc_id[] = {
{ 321, "SDM845" },
{ 341, "SDA845" },
{ 356, "SM8250" },
+ { 402, "IPQ6018" },
};
static const char *socinfo_machine(struct device *dev, unsigned int id)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2] arm64: dts: ipq8074: Use the A53 PMU compatible
IPQ8074 has A53 cores, so lets use the corresponding PMU compatible.
Signed-off-by: Kathiravan T
---
[V2]
- Rebased on v5.9-rc1
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 96a5ec89b5f0..e4859c7f6208 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -67,7 +67,7 @@
};
pmu {
- compatible = "arm,armv8-pmuv3";
+ compatible = "arm,cortex-a53-pmu";
interrupts = ;
};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH] arm64: dts: ipq8074: Use the A53 PMU compatible
IPQ8074 has A53 cores, so lets use the corresponding PMU compatible.
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 96a5ec89b5f0..e4859c7f6208 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -67,7 +67,7 @@
};
pmu {
- compatible = "arm,armv8-pmuv3";
+ compatible = "arm,cortex-a53-pmu";
interrupts = ;
};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH 1/3] dt-bindings: mailbox: add compatible for the IPQ6018 SoC
Add the mailbox compatible for the IPQ6018 SoC. Signed-off-by: Kathiravan T --- Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index 12eff942708d..60e9532fcd29 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -16,6 +16,7 @@ maintainers: properties: compatible: enum: + - qcom,ipq6018-apcs-apps-global - qcom,ipq8074-apcs-apps-global - qcom,msm8916-apcs-kpss-global - qcom,msm8996-apcs-hmss-global -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH 0/3] Enable DVFS support for IPQ6018
Add A53 PLL, APCS clock, RPM Glink, RPM message RAM, cpu-opp-table, SMPA2 regulator to enable the cpu frequency on IPQ6018. Kathiravan T (3): dt-bindings: mailbox: add compatible for the IPQ6018 SoC dt-bindings: regulator: add the sub node names for the MP5496 PMIC arm64: dts: ipq6018: enable DVFS support .../bindings/mailbox/qcom,apcs-kpss-global.yaml| 1 + .../bindings/regulator/qcom,smd-rpm-regulator.yaml | 2 + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 96 +- 3 files changed, 96 insertions(+), 3 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH 3/3] arm64: dts: ipq6018: enable DVFS support
Add A53 PLL, APCS clock, RPM Glink, RPM message RAM, cpu-opp-table,
SMPA2 regulator to enable the cpu frequency on IPQ6018.
Co-developed-by: Sivaprakash Murugesan
Signed-off-by: Sivaprakash Murugesan
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 96 +--
1 file changed, 93 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 1aa8d8579463..a94dac76bf3f 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
/ {
#address-cells = <2>;
@@ -38,6 +39,10 @@
reg = <0x0>;
enable-method = "psci";
next-level-cache = <_0>;
+ clocks = <_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <_opp_table>;
+ cpu-supply = <_s2>;
};
CPU1: cpu@1 {
@@ -46,6 +51,10 @@
enable-method = "psci";
reg = <0x1>;
next-level-cache = <_0>;
+ clocks = <_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <_opp_table>;
+ cpu-supply = <_s2>;
};
CPU2: cpu@2 {
@@ -54,6 +63,10 @@
enable-method = "psci";
reg = <0x2>;
next-level-cache = <_0>;
+ clocks = <_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <_opp_table>;
+ cpu-supply = <_s2>;
};
CPU3: cpu@3 {
@@ -62,6 +75,10 @@
enable-method = "psci";
reg = <0x3>;
next-level-cache = <_0>;
+ clocks = <_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <_opp_table>;
+ cpu-supply = <_s2>;
};
L2_0: l2-cache {
@@ -70,6 +87,42 @@
};
};
+ cpu_opp_table: cpu_opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-86400 {
+ opp-hz = /bits/ 64 <86400>;
+ opp-microvolt = <725000>;
+ clock-latency-ns = <20>;
+ };
+ opp-105600 {
+ opp-hz = /bits/ 64 <105600>;
+ opp-microvolt = <787500>;
+ clock-latency-ns = <20>;
+ };
+ opp-132000 {
+ opp-hz = /bits/ 64 <132000>;
+ opp-microvolt = <862500>;
+ clock-latency-ns = <20>;
+ };
+ opp-144000 {
+ opp-hz = /bits/ 64 <144000>;
+ opp-microvolt = <925000>;
+ clock-latency-ns = <20>;
+ };
+ opp-160800 {
+ opp-hz = /bits/ 64 <160800>;
+ opp-microvolt = <987500>;
+ clock-latency-ns = <20>;
+ };
+ opp-18 {
+ opp-hz = /bits/ 64 <18>;
+ opp-microvolt = <1062500>;
+ clock-latency-ns = <20>;
+ };
+ };
+
firmware {
scm {
compatible = "qcom,scm";
@@ -98,6 +151,11 @@
#size-cells = <2>;
ranges;
+ rpm_msg_ram: memory@0x6 {
+ reg = <0x0 0x6 0x0 0x6000>;
+ no-map;
+ };
+
tz: tz@4850 {
reg = <0x0 0x4850 0x0 0x0020>;
no-map;
@@ -294,12 +352,22 @@
};
apcs_glb: mailbox@b111000 {
- compatible = "qcom,ipq8074-apcs-apps-global";
- reg = <0x0b111000 0xc>;
-
+ compatible = "qcom,ipq6018-apcs-apps-global";
+ reg = <0x0b111000 0x1000>;
+
[PATCH 2/3] dt-bindings: regulator: add the sub node names for the MP5496 PMIC
MP5496 PMIC is found on IPQ6018 SoC. SMPA2 regulator controls the APSS voltage scaling. Document the sub node name for the same. Signed-off-by: Kathiravan T --- Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml index 8d212bdbee02..d2022206081f 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml @@ -22,6 +22,8 @@ description: Each sub-node is identified using the node's name, with valid values listed for each of the pmics below. + For mp5496, s2 + For pm8841, s1, s2, s3, s4, s5, s6, s7, s8 For pm8916, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH] soc: qcom: socinfo: add soc id for IPQ6018
Add the SoC ID for IPQ6018 variant.
Signed-off-by: Kathiravan T
---
drivers/soc/qcom/socinfo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c
index d9c64a78e49c..b7972bdff027 100644
--- a/drivers/soc/qcom/socinfo.c
+++ b/drivers/soc/qcom/socinfo.c
@@ -223,6 +223,7 @@ static const struct soc_id soc_id[] = {
{ 321, "SDM845" },
{ 341, "SDA845" },
{ 356, "SM8250" },
+ { 402, "IPQ6018" },
};
static const char *socinfo_machine(struct device *dev, unsigned int id)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH V3 2/4] soc: qcom: smd-rpm: Add IPQ6018 compatible
This patch adds a compatible for the rpm on the Qualcomm IPQ6018 platform.
Signed-off-by: Kathiravan T
---
drivers/soc/qcom/smd-rpm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
index 877b138..0ebd3ad 100644
--- a/drivers/soc/qcom/smd-rpm.c
+++ b/drivers/soc/qcom/smd-rpm.c
@@ -230,6 +230,7 @@ static void qcom_smd_rpm_remove(struct rpmsg_device *rpdev)
static const struct of_device_id qcom_smd_rpm_of_match[] = {
{ .compatible = "qcom,rpm-apq8084" },
+ { .compatible = "qcom,rpm-ipq6018" },
{ .compatible = "qcom,rpm-msm8916" },
{ .compatible = "qcom,rpm-msm8936" },
{ .compatible = "qcom,rpm-msm8974" },
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH V3 4/4] dt-bindings: regulator: convert QCOM SMD-RPM regulator document to YAML schema
Convert qcom,smd-rpm-regulator.txt document to YAML schema Reviewed-by: Rob Herring Signed-off-by: Kathiravan T --- .../bindings/regulator/qcom,smd-rpm-regulator.txt | 321 - .../bindings/regulator/qcom,smd-rpm-regulator.yaml | 106 +++ 2 files changed, 106 insertions(+), 321 deletions(-) delete mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt create mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt deleted file mode 100644 index 728c001..000 --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt +++ /dev/null @@ -1,321 +0,0 @@ -QCOM SMD RPM REGULATOR - -The Qualcomm RPM over SMD regulator is modelled as a subdevice of the RPM. -Because SMD is used as the communication transport mechanism, the RPM resides as -a subnode of the SMD. As such, the SMD-RPM regulator requires that the SMD and -RPM nodes be present. - -Please refer to Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt for -information pertaining to the SMD node. - -Please refer to Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt for -information regarding the RPM node. - -== Regulator - -Regulator nodes are identified by their compatible: - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,rpm-mp5496-regulators" - "qcom,rpm-pm8841-regulators" - "qcom,rpm-pm8916-regulators" - "qcom,rpm-pm8941-regulators" - "qcom,rpm-pm8950-regulators" - "qcom,rpm-pm8994-regulators" - "qcom,rpm-pm8998-regulators" - "qcom,rpm-pma8084-regulators" - "qcom,rpm-pmi8994-regulators" - "qcom,rpm-pmi8998-regulators" - "qcom,rpm-pms405-regulators" - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_s7-supply: -- vdd_s8-supply: - Usage: optional (pm8841 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_l1_l2_l3-supply: -- vdd_l4_l5_l6-supply: -- vdd_l7-supply: -- vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18-supply: - Usage: optional (pm8916 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_l1_l19-supply: -- vdd_l2_l23-supply: -- vdd_l3-supply: -- vdd_l4_l5_l6_l7_l16-supply: -- vdd_l8_l11_l12_l17_l22-supply: -- vdd_l9_l10_l13_l14_l15_l18-supply: -- vdd_l20-supply: -- vdd_l21-supply: - Usage: optional (pm8950 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_l1_l3-supply: -- vdd_l2_lvs1_2_3-supply: -- vdd_l4_l11-supply: -- vdd_l5_l7-supply: -- vdd_l6_l12_l14_l15-supply: -- vdd_l8_l16_l18_l19-supply: -- vdd_l9_l10_l17_l22-supply: -- vdd_l13_l20_l23_l24-supply: -- vdd_l21-supply: -- vin_5vs-supply: - Usage: optional (pm8941 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_s7-supply: -- vdd_s8-supply: -- vdd_s9-supply: -- vdd_s10-supply: -- vdd_s11-supply: -- vdd_s12-supply: -- vdd_l1-supply: -- vdd_l2_l26_l28-supply: -- vdd_l3_l11-supply: -- vdd_l4_l27_l31-supply: -- vdd_l5_l7-supply: -- vdd_l6_l12_l32-supply: -- vdd_l5_l7-supply: -- vdd_l8_l16_l30-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l3_l11-supply: -- vdd_l6_l12_l32-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l14_l15-supply: -- vdd_l14_l15-supply: -- vdd_l8_l16_l30-supply: -- vdd_l17_l29-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l20_l21-supply: -- vdd_l20_l21-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l25-supply: -- vdd_l2_l26_l28-supply: -- vdd_l4_l27_l31-supply: -- vdd_l2_l26_l28-supply: -- vdd_l17_l29-supply: -- vdd_l8_l16_l30-supply: -- vdd_l4_l27_l31-supply: -- vdd_l6_l12_l32-supply: -- vdd_lvs1_2-supply: - Usage: optional (pm8994 only) - Value type: -
[PATCH V3 3/4] dt-bindings: soc: qcom: convert the SMD-RPM document to YAML schema
Convert the qcom,smd-rpm.txt document to YAML schema
Signed-off-by: Kathiravan T
---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 65
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 87 ++
2 files changed, 87 insertions(+), 65 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
deleted file mode 100644
index 4c9c6fc..000
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
+++ /dev/null
@@ -1,65 +0,0 @@
-Qualcomm Resource Power Manager (RPM) over SMD
-
-This driver is used to interface with the Resource Power Manager (RPM) found in
-various Qualcomm platforms. The RPM allows each component in the system to vote
-for state of the system resources, such as clocks, regulators and bus
-frequencies.
-
-The SMD information for the RPM edge should be filled out. See qcom,smd.txt
for
-the required edge properties. All SMD related properties will reside within
the
-RPM node itself.
-
-= SUBDEVICES
-
-The RPM exposes resources to its subnodes. The rpm_requests node must be
-present and this subnode may contain children that designate regulator
-resources.
-
-- compatible:
- Usage: required
- Value type:
- Definition: must be one of:
- "qcom,rpm-apq8084"
- "qcom,rpm-ipq6018"
- "qcom,rpm-msm8916"
- "qcom,rpm-msm8936"
- "qcom,rpm-msm8974"
- "qcom,rpm-msm8976"
- "qcom,rpm-msm8994"
- "qcom,rpm-msm8998"
- "qcom,rpm-sdm660"
- "qcom,rpm-qcs404"
-
-- qcom,smd-channels:
- Usage: required
- Value type:
- Definition: must be "rpm_requests"
-
-Refer to Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
-for information on the regulator subnodes that can exist under the
rpm_requests.
-
-Example:
-
- soc {
- apcs: syscon@f9011000 {
- compatible = "syscon";
- reg = <0xf9011000 0x1000>;
- };
- };
-
- smd {
- compatible = "qcom,smd";
-
- rpm {
- interrupts = <0 168 1>;
- qcom,ipc = < 8 0>;
- qcom,smd-edge = <15>;
-
- rpm_requests {
- compatible = "qcom,rpm-msm8974";
- qcom,smd-channels = "rpm_requests";
-
- ...
- };
- };
- };
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
new file mode 100644
index 000..468d658
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/qcom/qcom,smd-rpm.yaml#;
+$schema: "http://devicetree.org/meta-schemas/core.yaml#;
+
+title: Qualcomm Resource Power Manager (RPM) over SMD
+
+description: |
+ This driver is used to interface with the Resource Power Manager (RPM) found
+ in various Qualcomm platforms. The RPM allows each component in the system
+ to vote for state of the system resources, such as clocks, regulators and bus
+ frequencies.
+
+ The SMD information for the RPM edge should be filled out. See qcom,smd.txt
+ for the required edge properties. All SMD related properties will reside
+ within the RPM node itself.
+
+ The RPM exposes resources to its subnodes. The rpm_requests node must be
+ present and this subnode may contain children that designate regulator
+ resources.
+
+ Refer to
Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
+ for information on the regulator subnodes that can exist under the
+ rpm_requests.
+
+maintainers:
+ - Kathiravan T
+
+properties:
+ compatible:
+enum:
+ - qcom,rpm-apq8084
+ - qcom,rpm-ipq6018
+ - qcom,rpm-msm8916
+ - qcom,rpm-msm8974
+ - qcom,rpm-msm8976
+ - qcom,rpm-msm8996
+ - qcom,rpm-msm8998
+ - qcom,rpm-sdm660
+ - qcom,rpm-qcs404
+
+ qcom,smd-channels:
+$ref: /schemas/types.yaml#/definitions/string-array
+description: Channel name used for the RPM communication
+items:
+ - const: rpm_requests
+
+if:
+ properties:
+compatible:
+ contains:
+enum:
+ - qcom,rpm-apq8084
+ - qcom,rpm-msm8916
+
[PATCH V3 1/4] dt-bindings: soc: qcom: Add IPQ6018 compatible
This patch adds the dt-binding for the rpm on the Qualcomm IPQ6018 platform. Signed-off-by: Kathiravan T --- Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt index 005940f9..4c9c6fc 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt @@ -20,6 +20,7 @@ resources. Value type: Definition: must be one of: "qcom,rpm-apq8084" + "qcom,rpm-ipq6018" "qcom,rpm-msm8916" "qcom,rpm-msm8936" "qcom,rpm-msm8974" -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH V3 0/4] Add frequency / voltage scaling support for IPQ6018 SoC
IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator of MP5496 controls the APSS and SDCC voltage scaling respectively. Add support for the same. changes since V2: - Rebased on top of linux-next 20200717 tag - Addressed Rob's comment to drop the 'syscon' node in qcom,smd-rpm.yaml - Picked up the Reviewed-by tag for qcom,smd-rpm-regulator.yaml - Regulator patches part of V2 was picked up by Mark and it's available in linux-next tree changes since V1: - Moved YAML conversion to the last as per Mark's comments Kathiravan T (4): dt-bindings: soc: qcom: Add IPQ6018 compatible soc: qcom: smd-rpm: Add IPQ6018 compatible dt-bindings: soc: qcom: convert the SMD-RPM document to YAML schema dt-bindings: regulator: convert QCOM SMD-RPM regulator document to YAML schema .../bindings/regulator/qcom,smd-rpm-regulator.txt | 321 - .../bindings/regulator/qcom,smd-rpm-regulator.yaml | 106 +++ .../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 64 .../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 87 ++ drivers/soc/qcom/smd-rpm.c | 1 + 5 files changed, 194 insertions(+), 385 deletions(-) delete mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt create mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH V2 0/6] Add frequency / voltage scaling support for IPQ6018 SoC
Hi Bjorn, Can you help to review the below patches in this series? dt-bindings: soc: qcom: Add IPQ6018 compatible soc: qcom: smd-rpm: Add IPQ6018 compatible Hi Rob, Can you help to review the YAML schema in this series? Thanks, Kathiravan T. On 6/23/2020 10:47 AM, Kathiravan T wrote: IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator of MP5496 controls the APSS and SDCC voltage scaling respectively. Add support for the same. changes since V1: - Moved YAML conversion to the last as per Mark's comments Kathiravan T (6): dt-bindings: soc: qcom: Add IPQ6018 compatible soc: qcom: smd-rpm: Add IPQ6018 compatible dt-bindings: regulator: add MP5496 regulator compatible regulator: qcom_smd: Add MP5496 regulators dt-bindings: soc: qcom: convert the SMD-RPM document to YAML schema dt-bindings: regulator: convert QCOM SMD-RPM regulator document to YAML schema .../bindings/regulator/qcom,smd-rpm-regulator.txt | 320 - .../bindings/regulator/qcom,smd-rpm-regulator.yaml | 106 +++ .../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 62 .../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 92 ++ drivers/regulator/qcom_smd-regulator.c | 34 +++ drivers/soc/qcom/smd-rpm.c | 1 + 6 files changed, 233 insertions(+), 382 deletions(-) delete mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt create mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH] pinctrl: qcom: ipq8074: route gpio interrupts to APPS
Hi Bjorn, On 7/7/2020 10:44 AM, Bjorn Andersson wrote: On Mon 06 Jul 21:58 PDT 2020, Kathiravan T wrote: set target proc as APPS to route the gpio interrupts to APPS Signed-off-by: Rajkumar Ayyasamy Signed-off-by: Kathiravan T This says "first Rajkumar certified the patch's origin, then you picked it up and certified its origin". As such I would expect that Rajkumar is the author of the patch. If you both came up with the patch add a Co-developed-by: tag. Regards, Bjorn Thanks, fixed in V2. --- drivers/pinctrl/qcom/pinctrl-ipq8074.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/qcom/pinctrl-ipq8074.c b/drivers/pinctrl/qcom/pinctrl-ipq8074.c index 0edd41c..aec68b1 100644 --- a/drivers/pinctrl/qcom/pinctrl-ipq8074.c +++ b/drivers/pinctrl/qcom/pinctrl-ipq8074.c @@ -50,6 +50,7 @@ .intr_enable_bit = 0, \ .intr_status_bit = 0, \ .intr_target_bit = 5, \ + .intr_target_kpss_val = 3, \ .intr_raw_status_bit = 4, \ .intr_polarity_bit = 1, \ .intr_detection_bit = 2,\ -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2] pinctrl: qcom: ipq8074: route gpio interrupts to APPS
set target proc as APPS to route the gpio interrupts to APPS Co-developed-by: Rajkumar Ayyasamy Signed-off-by: Rajkumar Ayyasamy Signed-off-by: Kathiravan T --- drivers/pinctrl/qcom/pinctrl-ipq8074.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/qcom/pinctrl-ipq8074.c b/drivers/pinctrl/qcom/pinctrl-ipq8074.c index 0edd41c..aec68b1 100644 --- a/drivers/pinctrl/qcom/pinctrl-ipq8074.c +++ b/drivers/pinctrl/qcom/pinctrl-ipq8074.c @@ -50,6 +50,7 @@ .intr_enable_bit = 0, \ .intr_status_bit = 0, \ .intr_target_bit = 5, \ + .intr_target_kpss_val = 3, \ .intr_raw_status_bit = 4, \ .intr_polarity_bit = 1, \ .intr_detection_bit = 2,\ -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH] pinctrl: qcom: ipq8074: route gpio interrupts to APPS
set target proc as APPS to route the gpio interrupts to APPS Signed-off-by: Rajkumar Ayyasamy Signed-off-by: Kathiravan T --- drivers/pinctrl/qcom/pinctrl-ipq8074.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/qcom/pinctrl-ipq8074.c b/drivers/pinctrl/qcom/pinctrl-ipq8074.c index 0edd41c..aec68b1 100644 --- a/drivers/pinctrl/qcom/pinctrl-ipq8074.c +++ b/drivers/pinctrl/qcom/pinctrl-ipq8074.c @@ -50,6 +50,7 @@ .intr_enable_bit = 0, \ .intr_status_bit = 0, \ .intr_target_bit = 5, \ + .intr_target_kpss_val = 3, \ .intr_raw_status_bit = 4, \ .intr_polarity_bit = 1, \ .intr_detection_bit = 2,\ -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2 3/6] dt-bindings: regulator: add MP5496 regulator compatible
IPQ6018 uses the PMIC MP5496. Add the binding for the same. Signed-off-by: Kathiravan T --- Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt index dea4384..728c001 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt @@ -19,6 +19,7 @@ Regulator nodes are identified by their compatible: Usage: required Value type: Definition: must be one of: + "qcom,rpm-mp5496-regulators" "qcom,rpm-pm8841-regulators" "qcom,rpm-pm8916-regulators" "qcom,rpm-pm8941-regulators" -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2 6/6] dt-bindings: regulator: convert QCOM SMD-RPM regulator document to YAML schema
Convert qcom,smd-rpm-regulator.txt document to YAML schema Signed-off-by: Kathiravan T --- .../bindings/regulator/qcom,smd-rpm-regulator.txt | 321 - .../bindings/regulator/qcom,smd-rpm-regulator.yaml | 106 +++ 2 files changed, 106 insertions(+), 321 deletions(-) delete mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt create mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt deleted file mode 100644 index 728c001.. --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt +++ /dev/null @@ -1,321 +0,0 @@ -QCOM SMD RPM REGULATOR - -The Qualcomm RPM over SMD regulator is modelled as a subdevice of the RPM. -Because SMD is used as the communication transport mechanism, the RPM resides as -a subnode of the SMD. As such, the SMD-RPM regulator requires that the SMD and -RPM nodes be present. - -Please refer to Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt for -information pertaining to the SMD node. - -Please refer to Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt for -information regarding the RPM node. - -== Regulator - -Regulator nodes are identified by their compatible: - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,rpm-mp5496-regulators" - "qcom,rpm-pm8841-regulators" - "qcom,rpm-pm8916-regulators" - "qcom,rpm-pm8941-regulators" - "qcom,rpm-pm8950-regulators" - "qcom,rpm-pm8994-regulators" - "qcom,rpm-pm8998-regulators" - "qcom,rpm-pma8084-regulators" - "qcom,rpm-pmi8994-regulators" - "qcom,rpm-pmi8998-regulators" - "qcom,rpm-pms405-regulators" - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_s7-supply: -- vdd_s8-supply: - Usage: optional (pm8841 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_l1_l2_l3-supply: -- vdd_l4_l5_l6-supply: -- vdd_l7-supply: -- vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18-supply: - Usage: optional (pm8916 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_l1_l19-supply: -- vdd_l2_l23-supply: -- vdd_l3-supply: -- vdd_l4_l5_l6_l7_l16-supply: -- vdd_l8_l11_l12_l17_l22-supply: -- vdd_l9_l10_l13_l14_l15_l18-supply: -- vdd_l20-supply: -- vdd_l21-supply: - Usage: optional (pm8950 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_l1_l3-supply: -- vdd_l2_lvs1_2_3-supply: -- vdd_l4_l11-supply: -- vdd_l5_l7-supply: -- vdd_l6_l12_l14_l15-supply: -- vdd_l8_l16_l18_l19-supply: -- vdd_l9_l10_l17_l22-supply: -- vdd_l13_l20_l23_l24-supply: -- vdd_l21-supply: -- vin_5vs-supply: - Usage: optional (pm8941 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_s7-supply: -- vdd_s8-supply: -- vdd_s9-supply: -- vdd_s10-supply: -- vdd_s11-supply: -- vdd_s12-supply: -- vdd_l1-supply: -- vdd_l2_l26_l28-supply: -- vdd_l3_l11-supply: -- vdd_l4_l27_l31-supply: -- vdd_l5_l7-supply: -- vdd_l6_l12_l32-supply: -- vdd_l5_l7-supply: -- vdd_l8_l16_l30-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l3_l11-supply: -- vdd_l6_l12_l32-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l14_l15-supply: -- vdd_l14_l15-supply: -- vdd_l8_l16_l30-supply: -- vdd_l17_l29-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l20_l21-supply: -- vdd_l20_l21-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l25-supply: -- vdd_l2_l26_l28-supply: -- vdd_l4_l27_l31-supply: -- vdd_l2_l26_l28-supply: -- vdd_l17_l29-supply: -- vdd_l8_l16_l30-supply: -- vdd_l4_l27_l31-supply: -- vdd_l6_l12_l32-supply: -- vdd_lvs1_2-supply: - Usage: optional (pm8994 only) - Value type: - Definition: reference to regul
[PATCH V2 4/6] regulator: qcom_smd: Add MP5496 regulators
IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator controls the
APSS and SDCC voltage scaling respectively. Add support for the same.
Signed-off-by: Kathiravan T
---
drivers/regulator/qcom_smd-regulator.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers/regulator/qcom_smd-regulator.c
b/drivers/regulator/qcom_smd-regulator.c
index 53a64d8..e6d137a 100644
--- a/drivers/regulator/qcom_smd-regulator.c
+++ b/drivers/regulator/qcom_smd-regulator.c
@@ -198,6 +198,15 @@ static const struct regulator_ops rpm_bob_ops = {
.set_voltage = rpm_reg_set_voltage,
};
+static const struct regulator_ops rpm_mp5496_ops = {
+ .enable = rpm_reg_enable,
+ .disable = rpm_reg_disable,
+ .is_enabled = rpm_reg_is_enabled,
+ .list_voltage = regulator_list_voltage_linear_range,
+
+ .set_voltage = rpm_reg_set_voltage,
+};
+
static const struct regulator_desc pma8084_hfsmps = {
.linear_ranges = (struct linear_range[]) {
REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
@@ -595,6 +604,24 @@ static const struct regulator_desc pms405_pldo600 = {
.ops = _smps_ldo_ops,
};
+static const struct regulator_desc mp5496_smpa2 = {
+ .linear_ranges = (struct linear_range[]) {
+ REGULATOR_LINEAR_RANGE(725000, 0, 27, 12500),
+ },
+ .n_linear_ranges = 1,
+ .n_voltages = 28,
+ .ops = _mp5496_ops,
+};
+
+static const struct regulator_desc mp5496_ldoa2 = {
+ .linear_ranges = (struct linear_range[]) {
+ REGULATOR_LINEAR_RANGE(180, 0, 60, 25000),
+ },
+ .n_linear_ranges = 1,
+ .n_voltages = 61,
+ .ops = _mp5496_ops,
+};
+
struct rpm_regulator_data {
const char *name;
u32 type;
@@ -603,6 +630,12 @@ struct rpm_regulator_data {
const char *supply;
};
+static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
+ { "s2", QCOM_SMD_RPM_SMPA, 2, _smpa2, "s2" },
+ { "l2", QCOM_SMD_RPM_LDOA, 2, _ldoa2, "l2" },
+ {}
+};
+
static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPB, 1, _hfsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPB, 2, _ftsmps, "vdd_s2" },
@@ -901,6 +934,7 @@ static const struct rpm_regulator_data
rpm_pms405_regulators[] = {
};
static const struct of_device_id rpm_of_match[] = {
+ { .compatible = "qcom,rpm-mp5496-regulators", .data =
_mp5496_regulators },
{ .compatible = "qcom,rpm-pm8841-regulators", .data =
_pm8841_regulators },
{ .compatible = "qcom,rpm-pm8916-regulators", .data =
_pm8916_regulators },
{ .compatible = "qcom,rpm-pm8941-regulators", .data =
_pm8941_regulators },
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2 5/6] dt-bindings: soc: qcom: convert the SMD-RPM document to YAML schema
Convert the qcom,smd-rpm.txt document to YAML schema
Signed-off-by: Kathiravan T
---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 63 ---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 92 ++
2 files changed, 92 insertions(+), 63 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
deleted file mode 100644
index a817c61..
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
+++ /dev/null
@@ -1,63 +0,0 @@
-Qualcomm Resource Power Manager (RPM) over SMD
-
-This driver is used to interface with the Resource Power Manager (RPM) found in
-various Qualcomm platforms. The RPM allows each component in the system to vote
-for state of the system resources, such as clocks, regulators and bus
-frequencies.
-
-The SMD information for the RPM edge should be filled out. See qcom,smd.txt
for
-the required edge properties. All SMD related properties will reside within
the
-RPM node itself.
-
-= SUBDEVICES
-
-The RPM exposes resources to its subnodes. The rpm_requests node must be
-present and this subnode may contain children that designate regulator
-resources.
-
-- compatible:
- Usage: required
- Value type:
- Definition: must be one of:
- "qcom,rpm-apq8084"
- "qcom,rpm-ipq6018"
- "qcom,rpm-msm8916"
- "qcom,rpm-msm8974"
- "qcom,rpm-msm8976"
- "qcom,rpm-msm8998"
- "qcom,rpm-sdm660"
- "qcom,rpm-qcs404"
-
-- qcom,smd-channels:
- Usage: required
- Value type:
- Definition: must be "rpm_requests"
-
-Refer to Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
-for information on the regulator subnodes that can exist under the
rpm_requests.
-
-Example:
-
- soc {
- apcs: syscon@f9011000 {
- compatible = "syscon";
- reg = <0xf9011000 0x1000>;
- };
- };
-
- smd {
- compatible = "qcom,smd";
-
- rpm {
- interrupts = <0 168 1>;
- qcom,ipc = < 8 0>;
- qcom,smd-edge = <15>;
-
- rpm_requests {
- compatible = "qcom,rpm-msm8974";
- qcom,smd-channels = "rpm_requests";
-
- ...
- };
- };
- };
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
new file mode 100644
index ..06aa6b1
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
@@ -0,0 +1,92 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/qcom/qcom,smd-rpm.yaml#;
+$schema: "http://devicetree.org/meta-schemas/core.yaml#;
+
+title: Qualcomm Resource Power Manager (RPM) over SMD
+
+description: |
+ This driver is used to interface with the Resource Power Manager (RPM) found
+ in various Qualcomm platforms. The RPM allows each component in the system
+ to vote for state of the system resources, such as clocks, regulators and bus
+ frequencies.
+
+ The SMD information for the RPM edge should be filled out. See qcom,smd.txt
+ for the required edge properties. All SMD related properties will reside
+ within the RPM node itself.
+
+ The RPM exposes resources to its subnodes. The rpm_requests node must be
+ present and this subnode may contain children that designate regulator
+ resources.
+
+ Refer to
Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
+ for information on the regulator subnodes that can exist under the
+ rpm_requests.
+
+maintainers:
+ - Kathiravan T
+
+properties:
+ compatible:
+enum:
+ - qcom,rpm-apq8084
+ - qcom,rpm-ipq6018
+ - qcom,rpm-msm8916
+ - qcom,rpm-msm8974
+ - qcom,rpm-msm8976
+ - qcom,rpm-msm8996
+ - qcom,rpm-msm8998
+ - qcom,rpm-sdm660
+ - qcom,rpm-qcs404
+
+ qcom,smd-channels:
+$ref: /schemas/types.yaml#/definitions/string-array
+description: Channel name used for the RPM communication
+items:
+ - const: rpm_requests
+
+if:
+ properties:
+compatible:
+ contains:
+enum:
+ - qcom,rpm-apq8084
+ - qcom,rpm-msm8916
+ - qcom,rpm-msm8974
+then:
+ required:
+- qcom,smd-channels
+
+required:
+
[PATCH V2 1/6] dt-bindings: soc: qcom: Add IPQ6018 compatible
This patch adds the dt-binding for the rpm on the Qualcomm IPQ6018 platform. Signed-off-by: Kathiravan T --- Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt index 616fddc..a817c61 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt @@ -20,6 +20,7 @@ resources. Value type: Definition: must be one of: "qcom,rpm-apq8084" + "qcom,rpm-ipq6018" "qcom,rpm-msm8916" "qcom,rpm-msm8974" "qcom,rpm-msm8976" -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2 2/6] soc: qcom: smd-rpm: Add IPQ6018 compatible
This patch adds a compatible for the rpm on the Qualcomm IPQ6018 platform.
Signed-off-by: Kathiravan T
---
drivers/soc/qcom/smd-rpm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
index 005dd30..1a5226a 100644
--- a/drivers/soc/qcom/smd-rpm.c
+++ b/drivers/soc/qcom/smd-rpm.c
@@ -230,6 +230,7 @@ static void qcom_smd_rpm_remove(struct rpmsg_device *rpdev)
static const struct of_device_id qcom_smd_rpm_of_match[] = {
{ .compatible = "qcom,rpm-apq8084" },
+ { .compatible = "qcom,rpm-ipq6018" },
{ .compatible = "qcom,rpm-msm8916" },
{ .compatible = "qcom,rpm-msm8974" },
{ .compatible = "qcom,rpm-msm8976" },
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH V2 0/6] Add frequency / voltage scaling support for IPQ6018 SoC
IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator of MP5496 controls the APSS and SDCC voltage scaling respectively. Add support for the same. changes since V1: - Moved YAML conversion to the last as per Mark's comments Kathiravan T (6): dt-bindings: soc: qcom: Add IPQ6018 compatible soc: qcom: smd-rpm: Add IPQ6018 compatible dt-bindings: regulator: add MP5496 regulator compatible regulator: qcom_smd: Add MP5496 regulators dt-bindings: soc: qcom: convert the SMD-RPM document to YAML schema dt-bindings: regulator: convert QCOM SMD-RPM regulator document to YAML schema .../bindings/regulator/qcom,smd-rpm-regulator.txt | 320 - .../bindings/regulator/qcom,smd-rpm-regulator.yaml | 106 +++ .../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 62 .../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 92 ++ drivers/regulator/qcom_smd-regulator.c | 34 +++ drivers/soc/qcom/smd-rpm.c | 1 + 6 files changed, 233 insertions(+), 382 deletions(-) delete mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt create mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH 4/6] dt-bindings: regulator: add YAML schema for QCOM SMD-RPM regulator
Add the YAML schema for the devicetree properties used in the QCOM SMD-RPM driver. Signed-off-by: Kathiravan T --- .../bindings/regulator/qcom,smd-rpm-regulator.txt | 320 - .../bindings/regulator/qcom,smd-rpm-regulator.yaml | 105 +++ 2 files changed, 105 insertions(+), 320 deletions(-) delete mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt create mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt deleted file mode 100644 index dea4384.. --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt +++ /dev/null @@ -1,320 +0,0 @@ -QCOM SMD RPM REGULATOR - -The Qualcomm RPM over SMD regulator is modelled as a subdevice of the RPM. -Because SMD is used as the communication transport mechanism, the RPM resides as -a subnode of the SMD. As such, the SMD-RPM regulator requires that the SMD and -RPM nodes be present. - -Please refer to Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt for -information pertaining to the SMD node. - -Please refer to Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt for -information regarding the RPM node. - -== Regulator - -Regulator nodes are identified by their compatible: - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,rpm-pm8841-regulators" - "qcom,rpm-pm8916-regulators" - "qcom,rpm-pm8941-regulators" - "qcom,rpm-pm8950-regulators" - "qcom,rpm-pm8994-regulators" - "qcom,rpm-pm8998-regulators" - "qcom,rpm-pma8084-regulators" - "qcom,rpm-pmi8994-regulators" - "qcom,rpm-pmi8998-regulators" - "qcom,rpm-pms405-regulators" - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_s7-supply: -- vdd_s8-supply: - Usage: optional (pm8841 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_l1_l2_l3-supply: -- vdd_l4_l5_l6-supply: -- vdd_l7-supply: -- vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18-supply: - Usage: optional (pm8916 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_l1_l19-supply: -- vdd_l2_l23-supply: -- vdd_l3-supply: -- vdd_l4_l5_l6_l7_l16-supply: -- vdd_l8_l11_l12_l17_l22-supply: -- vdd_l9_l10_l13_l14_l15_l18-supply: -- vdd_l20-supply: -- vdd_l21-supply: - Usage: optional (pm8950 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_l1_l3-supply: -- vdd_l2_lvs1_2_3-supply: -- vdd_l4_l11-supply: -- vdd_l5_l7-supply: -- vdd_l6_l12_l14_l15-supply: -- vdd_l8_l16_l18_l19-supply: -- vdd_l9_l10_l17_l22-supply: -- vdd_l13_l20_l23_l24-supply: -- vdd_l21-supply: -- vin_5vs-supply: - Usage: optional (pm8941 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_s7-supply: -- vdd_s8-supply: -- vdd_s9-supply: -- vdd_s10-supply: -- vdd_s11-supply: -- vdd_s12-supply: -- vdd_l1-supply: -- vdd_l2_l26_l28-supply: -- vdd_l3_l11-supply: -- vdd_l4_l27_l31-supply: -- vdd_l5_l7-supply: -- vdd_l6_l12_l32-supply: -- vdd_l5_l7-supply: -- vdd_l8_l16_l30-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l3_l11-supply: -- vdd_l6_l12_l32-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l14_l15-supply: -- vdd_l14_l15-supply: -- vdd_l8_l16_l30-supply: -- vdd_l17_l29-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l20_l21-supply: -- vdd_l20_l21-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l25-supply: -- vdd_l2_l26_l28-supply: -- vdd_l4_l27_l31-supply: -- vdd_l2_l26_l28-supply: -- vdd_l17_l29-supply: -- vdd_l8_l16_l30-supply: -- vdd_l4_l27_l31-supply: -- vdd_l6_l12_l32-supply: -- vdd_lvs1_2-supply: - Usage: optional (pm8994 only) - Value type: - Definition: reference to regulator supplying the input pin, as -
[PATCH 5/6] dt-bindings: add MP5496 regulator compatible
IPQ6018 uses the PMIC MP5496. Add the binding for the same. Signed-off-by: Kathiravan T --- Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml index cb0bd7b..8d212bd 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml @@ -56,6 +56,7 @@ maintainers: properties: compatible: enum: + - qcom,rpm-mp5496-regulators - qcom,rpm-pm8841-regulators - qcom,rpm-pm8916-regulators - qcom,rpm-pm8941-regulators -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH 6/6] regulator: qcom_smd: Add MP5496 regulators
IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator controls the
APSS and SDCC voltage scaling respectively. Add support for the same.
Signed-off-by: Kathiravan T
---
drivers/regulator/qcom_smd-regulator.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers/regulator/qcom_smd-regulator.c
b/drivers/regulator/qcom_smd-regulator.c
index 53a64d8..e6d137a 100644
--- a/drivers/regulator/qcom_smd-regulator.c
+++ b/drivers/regulator/qcom_smd-regulator.c
@@ -198,6 +198,15 @@ static const struct regulator_ops rpm_bob_ops = {
.set_voltage = rpm_reg_set_voltage,
};
+static const struct regulator_ops rpm_mp5496_ops = {
+ .enable = rpm_reg_enable,
+ .disable = rpm_reg_disable,
+ .is_enabled = rpm_reg_is_enabled,
+ .list_voltage = regulator_list_voltage_linear_range,
+
+ .set_voltage = rpm_reg_set_voltage,
+};
+
static const struct regulator_desc pma8084_hfsmps = {
.linear_ranges = (struct linear_range[]) {
REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
@@ -595,6 +604,24 @@ static const struct regulator_desc pms405_pldo600 = {
.ops = _smps_ldo_ops,
};
+static const struct regulator_desc mp5496_smpa2 = {
+ .linear_ranges = (struct linear_range[]) {
+ REGULATOR_LINEAR_RANGE(725000, 0, 27, 12500),
+ },
+ .n_linear_ranges = 1,
+ .n_voltages = 28,
+ .ops = _mp5496_ops,
+};
+
+static const struct regulator_desc mp5496_ldoa2 = {
+ .linear_ranges = (struct linear_range[]) {
+ REGULATOR_LINEAR_RANGE(180, 0, 60, 25000),
+ },
+ .n_linear_ranges = 1,
+ .n_voltages = 61,
+ .ops = _mp5496_ops,
+};
+
struct rpm_regulator_data {
const char *name;
u32 type;
@@ -603,6 +630,12 @@ struct rpm_regulator_data {
const char *supply;
};
+static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
+ { "s2", QCOM_SMD_RPM_SMPA, 2, _smpa2, "s2" },
+ { "l2", QCOM_SMD_RPM_LDOA, 2, _ldoa2, "l2" },
+ {}
+};
+
static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPB, 1, _hfsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPB, 2, _ftsmps, "vdd_s2" },
@@ -901,6 +934,7 @@ static const struct rpm_regulator_data
rpm_pms405_regulators[] = {
};
static const struct of_device_id rpm_of_match[] = {
+ { .compatible = "qcom,rpm-mp5496-regulators", .data =
_mp5496_regulators },
{ .compatible = "qcom,rpm-pm8841-regulators", .data =
_pm8841_regulators },
{ .compatible = "qcom,rpm-pm8916-regulators", .data =
_pm8916_regulators },
{ .compatible = "qcom,rpm-pm8941-regulators", .data =
_pm8941_regulators },
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH 2/6] dt-bindings: soc: qcom: Add IPQ6018 compatible
This patch adds the dt-binding for the rpm on the Qualcomm IPQ6018 platform. Signed-off-by: Kathiravan T --- Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml index 5b33def..06aa6b1 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml @@ -31,6 +31,7 @@ properties: compatible: enum: - qcom,rpm-apq8084 + - qcom,rpm-ipq6018 - qcom,rpm-msm8916 - qcom,rpm-msm8974 - qcom,rpm-msm8976 -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH 0/6] Add frequency and voltage scaling support for IPQ6018 SoC
IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator of MP5496 controls the APSS and SDCC voltage scaling respectively. Add support for the same. Kathiravan T (6): dt-bindings: soc: qcom: add YAML schema for SMD-RPM driver dt-bindings: soc: qcom: Add IPQ6018 compatible soc: qcom: smd-rpm: Add IPQ6018 compatible dt-bindings: regulator: add YAML schema for QCOM SMD-RPM regulator dt-bindings: add MP5496 regulator compatible regulator: qcom_smd: Add MP5496 regulators .../bindings/regulator/qcom,smd-rpm-regulator.txt | 320 - .../bindings/regulator/qcom,smd-rpm-regulator.yaml | 106 +++ .../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 62 .../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 92 ++ drivers/regulator/qcom_smd-regulator.c | 34 +++ drivers/soc/qcom/smd-rpm.c | 1 + 6 files changed, 233 insertions(+), 382 deletions(-) delete mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt create mode 100644 Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH 3/6] soc: qcom: smd-rpm: Add IPQ6018 compatible
This patch adds a compatible for the rpm on the Qualcomm IPQ6018 platform.
Signed-off-by: Kathiravan T
---
drivers/soc/qcom/smd-rpm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
index 005dd30..1a5226a 100644
--- a/drivers/soc/qcom/smd-rpm.c
+++ b/drivers/soc/qcom/smd-rpm.c
@@ -230,6 +230,7 @@ static void qcom_smd_rpm_remove(struct rpmsg_device *rpdev)
static const struct of_device_id qcom_smd_rpm_of_match[] = {
{ .compatible = "qcom,rpm-apq8084" },
+ { .compatible = "qcom,rpm-ipq6018" },
{ .compatible = "qcom,rpm-msm8916" },
{ .compatible = "qcom,rpm-msm8974" },
{ .compatible = "qcom,rpm-msm8976" },
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH 1/6] dt-bindings: soc: qcom: add YAML schema for SMD-RPM driver
Add YAML schema for the devitree properties used in the SMD-RPM driver.
Signed-off-by: Kathiravan T
---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 62 ---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 91 ++
2 files changed, 91 insertions(+), 62 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
deleted file mode 100644
index 616fddc..
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
+++ /dev/null
@@ -1,62 +0,0 @@
-Qualcomm Resource Power Manager (RPM) over SMD
-
-This driver is used to interface with the Resource Power Manager (RPM) found in
-various Qualcomm platforms. The RPM allows each component in the system to vote
-for state of the system resources, such as clocks, regulators and bus
-frequencies.
-
-The SMD information for the RPM edge should be filled out. See qcom,smd.txt
for
-the required edge properties. All SMD related properties will reside within
the
-RPM node itself.
-
-= SUBDEVICES
-
-The RPM exposes resources to its subnodes. The rpm_requests node must be
-present and this subnode may contain children that designate regulator
-resources.
-
-- compatible:
- Usage: required
- Value type:
- Definition: must be one of:
- "qcom,rpm-apq8084"
- "qcom,rpm-msm8916"
- "qcom,rpm-msm8974"
- "qcom,rpm-msm8976"
- "qcom,rpm-msm8998"
- "qcom,rpm-sdm660"
- "qcom,rpm-qcs404"
-
-- qcom,smd-channels:
- Usage: required
- Value type:
- Definition: must be "rpm_requests"
-
-Refer to Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
-for information on the regulator subnodes that can exist under the
rpm_requests.
-
-Example:
-
- soc {
- apcs: syscon@f9011000 {
- compatible = "syscon";
- reg = <0xf9011000 0x1000>;
- };
- };
-
- smd {
- compatible = "qcom,smd";
-
- rpm {
- interrupts = <0 168 1>;
- qcom,ipc = < 8 0>;
- qcom,smd-edge = <15>;
-
- rpm_requests {
- compatible = "qcom,rpm-msm8974";
- qcom,smd-channels = "rpm_requests";
-
- ...
- };
- };
- };
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
new file mode 100644
index ..5b33def
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
@@ -0,0 +1,91 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/qcom/qcom,smd-rpm.yaml#;
+$schema: "http://devicetree.org/meta-schemas/core.yaml#;
+
+title: Qualcomm Resource Power Manager (RPM) over SMD
+
+description: |
+ This driver is used to interface with the Resource Power Manager (RPM) found
+ in various Qualcomm platforms. The RPM allows each component in the system
+ to vote for state of the system resources, such as clocks, regulators and bus
+ frequencies.
+
+ The SMD information for the RPM edge should be filled out. See qcom,smd.txt
+ for the required edge properties. All SMD related properties will reside
+ within the RPM node itself.
+
+ The RPM exposes resources to its subnodes. The rpm_requests node must be
+ present and this subnode may contain children that designate regulator
+ resources.
+
+ Refer to
Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
+ for information on the regulator subnodes that can exist under the
+ rpm_requests.
+
+maintainers:
+ - Kathiravan T
+
+properties:
+ compatible:
+enum:
+ - qcom,rpm-apq8084
+ - qcom,rpm-msm8916
+ - qcom,rpm-msm8974
+ - qcom,rpm-msm8976
+ - qcom,rpm-msm8996
+ - qcom,rpm-msm8998
+ - qcom,rpm-sdm660
+ - qcom,rpm-qcs404
+
+ qcom,smd-channels:
+$ref: /schemas/types.yaml#/definitions/string-array
+description: Channel name used for the RPM communication
+items:
+ - const: rpm_requests
+
+if:
+ properties:
+compatible:
+ contains:
+enum:
+ - qcom,rpm-apq8084
+ - qcom,rpm-msm8916
+ - qcom,rpm-msm8974
+then:
+ required:
+- qcom,smd-channels
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+
[PATCH] coresight: platform: use dev_warn instead of dev_warn_once
When more than one coresight components uses the obsolete DT bindings,
warning is displayed for only one component and not for the others.
Lets warn it for all components by replacing dev_warn_once with dev_warn.
Signed-off-by: Kathiravan T
---
drivers/hwtracing/coresight/coresight-platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwtracing/coresight/coresight-platform.c
b/drivers/hwtracing/coresight/coresight-platform.c
index 43418a2..b7d9a02 100644
--- a/drivers/hwtracing/coresight/coresight-platform.c
+++ b/drivers/hwtracing/coresight/coresight-platform.c
@@ -284,7 +284,7 @@ static int of_get_coresight_platform_data(struct device
*dev,
if (!parent) {
legacy_binding = true;
parent = node;
- dev_warn_once(dev, "Uses obsolete Coresight DT bindings\n");
+ dev_warn(dev, "Uses obsolete Coresight DT bindings\n");
}
conn = pdata->conns;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
