[PATCH v7 7/9] ARM: brcmstb: add misc. DT bindings for brcmstb
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
.../devicetree/bindings/arm/brcm-brcmstb.txt | 95
1 files changed, 95 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
new file mode 100644
index 000..3c436cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -0,0 +1,95 @@
+ARM Broadcom STB platforms Device Tree Bindings
+---
+Boards with Broadcom Brahma15 ARM-based BCM (generally BCM7xxx variants)
+SoC shall have the following DT organization:
+
+Required root node properties:
+- compatible: "brcm,bcm", "brcm,brcmstb"
+
+example:
+/ {
+#address-cells = <2>;
+#size-cells = <2>;
+model = "Broadcom STB (bcm7445)";
+compatible = "brcm,bcm7445", "brcm,brcmstb";
+
+Further, syscon nodes that map platform-specific registers used for general
+system control is required:
+
+- compatible: "brcm,bcm-sun-top-ctrl", "syscon"
+- compatible: "brcm,bcm-hif-cpubiuctrl", "syscon"
+- compatible: "brcm,bcm-hif-continuation", "syscon"
+
+example:
+rdb {
+#address-cells = <1>;
+#size-cells = <1>;
+compatible = "simple-bus";
+ranges = <0 0x00 0xf000 0x100>;
+
+sun_top_ctrl: syscon@404000 {
+compatible = "brcm,bcm7445-sun-top-ctrl", "syscon";
+reg = <0x404000 0x51c>;
+};
+
+hif_cpubiuctrl: syscon@3e2400 {
+compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon";
+reg = <0x3e2400 0x5b4>;
+};
+
+hif_continuation: syscon@452000 {
+compatible = "brcm,bcm7445-hif-continuation", "syscon";
+reg = <0x452000 0x100>;
+};
+};
+
+Lastly, nodes that allow for support of SMP initialization and reboot are
+required:
+
+smpboot
+---
+Required properties:
+
+- compatible
+The string "brcm,brcmstb-smpboot".
+
+- syscon-cpu
+A phandle / integer array property which lets the BSP know the location
+of certain CPU power-on registers.
+
+The layout of the property is as follows:
+o a phandle to the "hif_cpubiuctrl" syscon node
+o offset to the base CPU power zone register
+o offset to the base CPU reset register
+
+- syscon-cont
+A phandle pointing to the syscon node which describes the CPU boot
+continuation registers.
+o a phandle to the "hif_continuation" syscon node
+
+example:
+smpboot {
+compatible = "brcm,brcmstb-smpboot";
+syscon-cpu = <_cpubiuctrl 0x88 0x178>;
+syscon-cont = <_continuation>;
+};
+
+reboot
+---
+Required properties
+
+- compatible
+The string property "brcm,brcmstb-reboot".
+
+- syscon
+A phandle / integer array that points to the syscon node which
describes
+the general system reset registers.
+o a phandle to "sun_top_ctrl"
+o offset to the "reset source enable" register
+o offset to the "software master reset" register
+
+example:
+reboot {
+compatible = "brcm,brcmstb-reboot";
+syscon = <_top_ctrl 0x304 0x308>;
+};
--
1.7.1
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[PATCH v7 2/9] power: reset: Add reboot driver for brcmstb
Add support for reboot functionality on boards with ARM-based
Broadcom STB chipsets.
Signed-off-by: Marc Carino
Cc: Dmitry Eremin-Solenikov
Cc: David Woodhouse
---
arch/arm/mach-bcm/Kconfig|1 +
drivers/power/reset/Kconfig | 10 +++
drivers/power/reset/Makefile |1 +
drivers/power/reset/brcmstb-reboot.c | 120 ++
4 files changed, 132 insertions(+), 0 deletions(-)
create mode 100644 drivers/power/reset/brcmstb-reboot.c
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index f85e7bc..d8f6d7a 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -39,6 +39,7 @@ config ARCH_BRCMSTB
select MIGHT_HAVE_PCI
select HAVE_SMP
select HAVE_ARM_ARCH_TIMER
+ select POWER_RESET_BRCMSTB
help
Say Y if you intend to run the kernel on a Broadcom ARM-based STB
chipset.
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 6d452a7..c886505 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -12,6 +12,16 @@ config POWER_RESET_AS3722
help
This driver supports turning off board via a ams AS3722 power-off.
+config POWER_RESET_BRCMSTB
+ bool "Broadcom STB reset driver"
+ depends on POWER_RESET && ARCH_BRCMSTB
+ help
+ This driver provides restart support for ARM-based Broadcom STB
+ boards.
+
+ Say Y here if you have an ARM-based Broadcom STB board and you wish
+ to have restart support.
+
config POWER_RESET_GPIO
bool "GPIO power-off driver"
depends on OF_GPIO && POWER_RESET
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index a5b4a77..72bb94f 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
obj-$(CONFIG_POWER_RESET_VEXPRESS) += vexpress-poweroff.o
obj-$(CONFIG_POWER_RESET_XGENE) += xgene-reboot.o
+obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
diff --git a/drivers/power/reset/brcmstb-reboot.c
b/drivers/power/reset/brcmstb-reboot.c
new file mode 100644
index 000..3f23692
--- /dev/null
+++ b/drivers/power/reset/brcmstb-reboot.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#define RESET_SOURCE_ENABLE_REG 1
+#define SW_MASTER_RESET_REG 2
+
+static struct regmap *regmap;
+static u32 rst_src_en;
+static u32 sw_mstr_rst;
+
+static void brcmstb_reboot(enum reboot_mode mode, const char *cmd)
+{
+ int rc;
+ u32 tmp;
+
+ rc = regmap_write(regmap, rst_src_en, 1);
+ if (rc) {
+ pr_err("failed to write rst_src_en (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, rst_src_en, );
+ if (rc) {
+ pr_err("failed to read rst_src_en (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_write(regmap, sw_mstr_rst, 1);
+ if (rc) {
+ pr_err("failed to write sw_mstr_rst (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, sw_mstr_rst, );
+ if (rc) {
+ pr_err("failed to read sw_mstr_rst (%d)\n", rc);
+ return;
+ }
+
+ while (1)
+ ;
+}
+
+static int brcmstb_reboot_probe(struct platform_device *pdev)
+{
+ int rc;
+ struct device_node *np = pdev->dev.of_node;
+
+ regmap = syscon_regmap_lookup_by_phandle(np, "syscon");
+ if (IS_ERR(regmap)) {
+ pr_err("failed to get syscon phandle\n");
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, "syscon", RESET_SOURCE_ENABLE_REG,
+ _src_en);
+ if (rc) {
+ pr_err("can't get rst_src_en offset (%d)\n", rc);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, "syscon", SW_MASTER_RESET_REG,
+ _mstr_rst);
+ if (rc) {
+ pr_err("can't get sw_mstr_rst offset (%d)\n", rc);
+ return -EINVAL;
+ }
+
+
[PATCH v7 9/9] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
Cc: Matt Porter
---
arch/arm/boot/dts/bcm7445-bcm97445svmb.dts | 14
arch/arm/boot/dts/bcm7445.dtsi | 107
2 files changed, 121 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
create mode 100644 arch/arm/boot/dts/bcm7445.dtsi
diff --git a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
new file mode 100644
index 000..9eec2ac
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+#include "bcm7445.dtsi"
+
+/ {
+ model = "Broadcom STB (bcm7445), SVMB reference board";
+ compatible = "brcm,bcm7445", "brcm,brcmstb";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00 0x 0x00 0x4000>,
+ <0x00 0x4000 0x00 0x4000>,
+ <0x00 0x8000 0x00 0x4000>;
+ };
+};
diff --git a/arch/arm/boot/dts/bcm7445.dtsi b/arch/arm/boot/dts/bcm7445.dtsi
new file mode 100644
index 000..f9c9633
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445.dtsi
@@ -0,0 +1,107 @@
+#include
+
+#include "skeleton.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "Broadcom STB (bcm7445)";
+ compatible = "brcm,bcm7445", "brcm,brcmstb";
+ interrupt-parent = <>;
+
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <1>;
+ };
+
+ cpu@2 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <2>;
+ };
+
+ cpu@3 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <3>;
+ };
+ };
+
+ gic: interrupt-controller@ffd0 {
+ compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic";
+ reg = <0x00 0xffd01000 0x00 0x1000>,
+ <0x00 0xffd02000 0x00 0x2000>,
+ <0x00 0xffd04000 0x00 0x2000>,
+ <0x00 0xffd06000 0x00 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = ,
+,
+,
+;
+ };
+
+ rdb {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges = <0 0x00 0xf000 0x100>;
+
+ serial@406b00 {
+ compatible = "ns16550a";
+ reg = <0x406b00 0x20>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ interrupts = ;
+ clock-frequency = <0x4d3f640>;
+ };
+
+ sun_top_ctrl: syscon@404000 {
+ compatible = "brcm,bcm7445-sun-top-ctrl",
+"syscon";
+ reg = <0x404000 0x51c>;
+ };
+
+ hif_cpubiuctrl: syscon@3e2400 {
+ compatible = "brcm,bcm7445-hif-cpubiuctrl",
+"syscon";
+ reg = <0x3e2400 0x5b4>;
+ };
+
+ hif_continuation: syscon@452000 {
+ compatible = "brcm,bcm7445-hif-continuation",
+"syscon";
+ reg = <0x452000 0x100>;
+ };
+ };
+
+ smpboot {
+ compatible = "brcm,brcmstb-smpboot";
+ syscon-cpu = <_cpubiuctrl 0x88 0x178>;
+ syscon-cont = <_continuation>;
+ };
+
+ reboot {
+ compatible = "brcm,brcmstb-reboot";
+ syscon = <_top_ctrl 0x304 0x308>;
+ };
+};
--
1.7.1
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[PATCH v7 3/9] ARM: brcmstb: add debug UART for earlyprintk support
Add the UART definitions needed to support earlyprintk on brcmstb machines. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- arch/arm/Kconfig.debug | 15 ++- 1 files changed, 14 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 0531da8..5d7f76b 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -125,6 +125,17 @@ choice Say Y here if you want kernel low-level debugging support on Marvell Berlin SoC based platforms. + config DEBUG_BRCMSTB_UART + bool "Use BRCMSTB UART for low-level debug" + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X @@ -1049,6 +1060,7 @@ config DEBUG_UART_PHYS default 0xd4018000 if DEBUG_MMP_UART3 default 0xe000 if ARCH_SPEAR13XX default 0xfbe0 if ARCH_EBSA110 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \ ARCH_ORION5X @@ -1083,6 +1095,7 @@ config DEBUG_UART_VIRT default 0xf809 if DEBUG_VEXPRESS_UART0_RS1 default 0xfb009000 if DEBUG_REALVIEW_STD_PORT default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xfd00 if ARCH_SPEAR3XX || ARCH_SPEAR6XX default 0xfd00 if ARCH_SPEAR13XX default 0xfd012000 if ARCH_MV78XX0 @@ -1136,7 +1149,7 @@ config DEBUG_UART_8250_WORD ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ - DEBUG_BCM_KONA_UART + DEBUG_BCM_KONA_UART || DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool "Enable flow control for 8250 UART" -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 5/9] ARM: Enable erratum 798181 for Broadcom Brahma-B15
From: Gregory Fong
Broadcom Brahma-B15 (r0p0..r0p2) is also affected by Cortex-A15
erratum 798181, so enable the workaround for Brahma-B15.
Signed-off-by: Gregory Fong
Acked-by: Marc Carino
Cc: Rob Herring
Cc: Will Deacon
---
arch/arm/kernel/smp_tlb.c | 20
1 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
index 95d0636..5518e3f 100644
--- a/arch/arm/kernel/smp_tlb.c
+++ b/arch/arm/kernel/smp_tlb.c
@@ -92,15 +92,19 @@ void erratum_a15_798181_init(void)
unsigned int midr = read_cpuid_id();
unsigned int revidr = read_cpuid(CPUID_REVIDR);
- /* Cortex-A15 r0p0..r3p2 w/o ECO fix affected */
- if ((midr & 0xff00) != 0x410fc0f0 || midr > 0x413fc0f2 ||
- (revidr & 0x210) == 0x210) {
- return;
- }
- if (revidr & 0x10)
- erratum_a15_798181_handler = erratum_a15_798181_partial;
- else
+ /* Brahma-B15 r0p0..(not yet fixed) affected
+* Cortex-A15 r0p0..r3p2 w/o ECO fix affected */
+ if ((midr & 0xff00) == 0x420f00f0)
erratum_a15_798181_handler = erratum_a15_798181_broadcast;
+ else if ((midr & 0xff00) == 0x410fc0f0 && midr <= 0x413fc0f2 &&
+(revidr & 0x210) != 0x210) {
+ if (revidr & 0x10)
+ erratum_a15_798181_handler =
+ erratum_a15_798181_partial;
+ else
+ erratum_a15_798181_handler =
+ erratum_a15_798181_broadcast;
+ }
}
#endif
--
1.7.1
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[PATCH v7 4/9] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino Acked-by: Florian Fainelli Cc: Russell King --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 74f6033..e3da338 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 6/9] ARM: brcmstb: add CPU binding for Broadcom Brahma15
Add the Broadcom Brahma B15 CPU to the DT CPU binding list. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/cpus.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 9130435..0cd1e25 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below. "arm,cortex-r4" "arm,cortex-r5" "arm,cortex-r7" + "brcm,brahma-b15" "faraday,fa526" "intel,sa110" "intel,sa1100" -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 0/9] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. The machine is also built into the multi-platform ARMv7 image. v7: - rebase to v3.14-rc4 - detect and apply ARM erratum 798181 to Brahma15 CPUs - split-up bcm7445.dts into a common dtsi and board-specific dts v6 (https://lkml.org/lkml/2014/2/3/493): - rebased to v3.14-rc1 - utilize common APIs for handling CPU power-down - drop deprecated __cpuinit attributes v5 (https://lkml.org/lkml/2014/1/21/640): - rebased to v3.13 tag - make UART DT node a child of 'rdb' node - fix ordering of debug UART entries v4 (https://lkml.org/lkml/2014/1/17/455): - make a reboot driver and put it in the drivers folder - rework DT bindings to leverage 'syscon' - rework BSP code to use 'syscon' for all register mappings - misc. tweaks per suggestions from v3 v3 (https://lkml.org/lkml/2014/1/14/696): - rebased to v3.13-rc8 - switched to using 'multi_v7_defconfig' - eliminated dependence on compile-time peripheral register access - moved DT node iomap out from 'init_early' - misc. minor cleanups from mailing-list discussion for v2 v2 (https://lkml.org/lkml/2013/11/26/570): - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B16RM v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Gregory Fong (1): ARM: Enable erratum 798181 for Broadcom Brahma-B15 Marc Carino (8): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs power: reset: Add reboot driver for brcmstb ARM: brcmstb: add debug UART for earlyprintk support ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcmstb ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 95 ++ Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 15 +- arch/arm/boot/dts/bcm7445-bcm97445svmb.dts | 14 + arch/arm/boot/dts/bcm7445.dtsi | 107 +++ arch/arm/configs/multi_v7_defconfig|1 + arch/arm/kernel/smp_tlb.c | 20 +- arch/arm/mach-bcm/Kconfig | 15 + arch/arm/mach-bcm/Makefile |4 + arch/arm/mach-bcm/brcmstb.c| 104 +++ arch/arm/mach-bcm/brcmstb.h| 38 +++ arch/arm/mach-bcm/headsmp-brcmstb.S| 33 ++ arch/arm/mach-bcm/hotplug-brcmstb.c| 311 arch/arm/mm/proc-v7.S | 11 + drivers/power/reset/Kconfig| 10 + drivers/power/reset/Makefile |1 + drivers/power/reset/brcmstb-reboot.c | 120 18 files changed, 892 insertions(+), 9 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/bcm7445-bcm97445svmb.dts create mode 100644 arch/arm/boot/dts/bcm7445.dtsi create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c create mode 100644 drivers/power/reset/brcmstb-reboot.c -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 1/9] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
arch/arm/configs/multi_v7_defconfig |1 +
arch/arm/mach-bcm/Kconfig | 14 ++
arch/arm/mach-bcm/Makefile |4 +
arch/arm/mach-bcm/brcmstb.c | 104
arch/arm/mach-bcm/brcmstb.h | 38 +
arch/arm/mach-bcm/headsmp-brcmstb.S | 33
arch/arm/mach-bcm/hotplug-brcmstb.c | 311 +++
7 files changed, 505 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-bcm/brcmstb.c
create mode 100644 arch/arm/mach-bcm/brcmstb.h
create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S
create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index ee69829..650d458 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -12,6 +12,7 @@ CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BRCMSTB=y
CONFIG_ARCH_BERLIN=y
CONFIG_MACH_BERLIN_BG2=y
CONFIG_MACH_BERLIN_BG2CD=y
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index b1aa6a9..f85e7bc 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -32,6 +32,20 @@ config ARCH_BCM_MOBILE
BCM11130, BCM11140, BCM11351, BCM28145 and
BCM28155 variants.
+config ARCH_BRCMSTB
+ bool "Broadcom BCM7XXX based boards" if ARCH_MULTI_V7
+ depends on MMU
+ select ARM_GIC
+ select MIGHT_HAVE_PCI
+ select HAVE_SMP
+ select HAVE_ARM_ARCH_TIMER
+ help
+ Say Y if you intend to run the kernel on a Broadcom ARM-based STB
+ chipset.
+
+ This enables support for Broadcom ARM-based set-top box chipsets,
+ including the 7445 family of chips.
+
endmenu
endif
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index c2ccd5a..b744a12 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -13,3 +13,7 @@
obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o
bcm_kona_smc_asm.o kona.o
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec)
+
+obj-$(CONFIG_ARCH_BRCMSTB) := brcmstb.o
+obj-$(CONFIG_SMP) += headsmp-brcmstb.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug-brcmstb.o
diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
new file mode 100644
index 000..71387a8
--- /dev/null
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "brcmstb.h"
+
+/***
+ * STB CPU (main application processor)
+ ***/
+
+static const char *brcmstb_match[] __initconst = {
+ "brcm,bcm7445",
+ "brcm,brcmstb",
+ NULL
+};
+
+/***
+ * SMP boot
+ ***/
+
+#ifdef CONFIG_SMP
+static DEFINE_SPINLOCK(boot_lock);
+
+static void brcmstb_secondary_init(unsigned int cpu)
+{
+ /*
+* Synchronise with the boot thread.
+*/
+ spin_lock(_lock);
+ spin_unlock(_lock);
+}
+
+static int brcmstb_boot_secondary(unsigned int cpu,
+ struct task_struct *idle)
+{
+ /*
+* set synchronisation state between this boot processor
+* and the secondary one
+*/
+ spin_lock(_lock);
+
+ /* Bring up power to the core if necessary */
+ if (brcmstb_cpu_get_power_state(cpu) == 0)
+ brcmstb_cpu_power_on(cpu);
+
+ brcmstb_cpu_boot(cpu);
+
+ /*
+* now the secondary core is starting up let it run its
+* calibrations, then wait for it to finish
+*/
+ spin_unlock(_lock);
+
+ return 0;
+}
+
+struct smp_operations brcmstb_smp_ops __initdata = {
+ .smp_prepare_cpus = b
[PATCH v7 8/9] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/gic.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index bae0d87..d1f0b98 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -16,6 +16,7 @@ Main node required properties: "arm,cortex-a9-gic" "arm,cortex-a7-gic" "arm,arm11mp-gic" + "brcm,brahma-b15-gic" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a and the value shall be 3. -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 0/9] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. The machine is also built into the multi-platform ARMv7 image. v7: - rebase to v3.14-rc4 - detect and apply ARM erratum 798181 to Brahma15 CPUs - split-up bcm7445.dts into a common dtsi and board-specific dts v6 (https://lkml.org/lkml/2014/2/3/493): - rebased to v3.14-rc1 - utilize common APIs for handling CPU power-down - drop deprecated __cpuinit attributes v5 (https://lkml.org/lkml/2014/1/21/640): - rebased to v3.13 tag - make UART DT node a child of 'rdb' node - fix ordering of debug UART entries v4 (https://lkml.org/lkml/2014/1/17/455): - make a reboot driver and put it in the drivers folder - rework DT bindings to leverage 'syscon' - rework BSP code to use 'syscon' for all register mappings - misc. tweaks per suggestions from v3 v3 (https://lkml.org/lkml/2014/1/14/696): - rebased to v3.13-rc8 - switched to using 'multi_v7_defconfig' - eliminated dependence on compile-time peripheral register access - moved DT node iomap out from 'init_early' - misc. minor cleanups from mailing-list discussion for v2 v2 (https://lkml.org/lkml/2013/11/26/570): - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B16RM v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Gregory Fong (1): ARM: Enable erratum 798181 for Broadcom Brahma-B15 Marc Carino (8): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs power: reset: Add reboot driver for brcmstb ARM: brcmstb: add debug UART for earlyprintk support ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcmstb ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 95 ++ Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 15 +- arch/arm/boot/dts/bcm7445-bcm97445svmb.dts | 14 + arch/arm/boot/dts/bcm7445.dtsi | 107 +++ arch/arm/configs/multi_v7_defconfig|1 + arch/arm/kernel/smp_tlb.c | 20 +- arch/arm/mach-bcm/Kconfig | 15 + arch/arm/mach-bcm/Makefile |4 + arch/arm/mach-bcm/brcmstb.c| 104 +++ arch/arm/mach-bcm/brcmstb.h| 38 +++ arch/arm/mach-bcm/headsmp-brcmstb.S| 33 ++ arch/arm/mach-bcm/hotplug-brcmstb.c| 311 arch/arm/mm/proc-v7.S | 11 + drivers/power/reset/Kconfig| 10 + drivers/power/reset/Makefile |1 + drivers/power/reset/brcmstb-reboot.c | 120 18 files changed, 892 insertions(+), 9 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/bcm7445-bcm97445svmb.dts create mode 100644 arch/arm/boot/dts/bcm7445.dtsi create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c create mode 100644 drivers/power/reset/brcmstb-reboot.c -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 1/9] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
arch/arm/configs/multi_v7_defconfig |1 +
arch/arm/mach-bcm/Kconfig | 14 ++
arch/arm/mach-bcm/Makefile |4 +
arch/arm/mach-bcm/brcmstb.c | 104
arch/arm/mach-bcm/brcmstb.h | 38 +
arch/arm/mach-bcm/headsmp-brcmstb.S | 33
arch/arm/mach-bcm/hotplug-brcmstb.c | 311 +++
7 files changed, 505 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-bcm/brcmstb.c
create mode 100644 arch/arm/mach-bcm/brcmstb.h
create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S
create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index ee69829..650d458 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -12,6 +12,7 @@ CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BRCMSTB=y
CONFIG_ARCH_BERLIN=y
CONFIG_MACH_BERLIN_BG2=y
CONFIG_MACH_BERLIN_BG2CD=y
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index b1aa6a9..f85e7bc 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -32,6 +32,20 @@ config ARCH_BCM_MOBILE
BCM11130, BCM11140, BCM11351, BCM28145 and
BCM28155 variants.
+config ARCH_BRCMSTB
+ bool Broadcom BCM7XXX based boards if ARCH_MULTI_V7
+ depends on MMU
+ select ARM_GIC
+ select MIGHT_HAVE_PCI
+ select HAVE_SMP
+ select HAVE_ARM_ARCH_TIMER
+ help
+ Say Y if you intend to run the kernel on a Broadcom ARM-based STB
+ chipset.
+
+ This enables support for Broadcom ARM-based set-top box chipsets,
+ including the 7445 family of chips.
+
endmenu
endif
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index c2ccd5a..b744a12 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -13,3 +13,7 @@
obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o
bcm_kona_smc_asm.o kona.o
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec)
+
+obj-$(CONFIG_ARCH_BRCMSTB) := brcmstb.o
+obj-$(CONFIG_SMP) += headsmp-brcmstb.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug-brcmstb.o
diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
new file mode 100644
index 000..71387a8
--- /dev/null
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk-provider.h
+#include linux/console.h
+#include linux/clocksource.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/errno.h
+#include linux/init.h
+#include linux/io.h
+#include linux/jiffies.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/printk.h
+#include linux/smp.h
+
+#include asm/cacheflush.h
+#include asm/mach-types.h
+#include asm/mach/arch.h
+#include asm/mach/map.h
+#include asm/mach/time.h
+
+#include brcmstb.h
+
+/***
+ * STB CPU (main application processor)
+ ***/
+
+static const char *brcmstb_match[] __initconst = {
+ brcm,bcm7445,
+ brcm,brcmstb,
+ NULL
+};
+
+/***
+ * SMP boot
+ ***/
+
+#ifdef CONFIG_SMP
+static DEFINE_SPINLOCK(boot_lock);
+
+static void brcmstb_secondary_init(unsigned int cpu)
+{
+ /*
+* Synchronise with the boot thread.
+*/
+ spin_lock(boot_lock);
+ spin_unlock(boot_lock);
+}
+
+static int brcmstb_boot_secondary(unsigned int cpu,
+ struct task_struct *idle)
+{
+ /*
+* set synchronisation state between this boot processor
+* and the secondary one
+*/
+ spin_lock(boot_lock);
+
+ /* Bring up power to the core if necessary */
+ if (brcmstb_cpu_get_power_state(cpu) == 0)
+ brcmstb_cpu_power_on(cpu
[PATCH v7 8/9] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- Documentation/devicetree/bindings/arm/gic.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index bae0d87..d1f0b98 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -16,6 +16,7 @@ Main node required properties: arm,cortex-a9-gic arm,cortex-a7-gic arm,arm11mp-gic + brcm,brahma-b15-gic - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a u32 and the value shall be 3. -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 6/9] ARM: brcmstb: add CPU binding for Broadcom Brahma15
Add the Broadcom Brahma B15 CPU to the DT CPU binding list. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- Documentation/devicetree/bindings/arm/cpus.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 9130435..0cd1e25 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below. arm,cortex-r4 arm,cortex-r5 arm,cortex-r7 + brcm,brahma-b15 faraday,fa526 intel,sa110 intel,sa1100 -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 7/9] ARM: brcmstb: add misc. DT bindings for brcmstb
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
.../devicetree/bindings/arm/brcm-brcmstb.txt | 95
1 files changed, 95 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
new file mode 100644
index 000..3c436cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -0,0 +1,95 @@
+ARM Broadcom STB platforms Device Tree Bindings
+---
+Boards with Broadcom Brahma15 ARM-based BCM (generally BCM7xxx variants)
+SoC shall have the following DT organization:
+
+Required root node properties:
+- compatible: brcm,bcmchip_id, brcm,brcmstb
+
+example:
+/ {
+#address-cells = 2;
+#size-cells = 2;
+model = Broadcom STB (bcm7445);
+compatible = brcm,bcm7445, brcm,brcmstb;
+
+Further, syscon nodes that map platform-specific registers used for general
+system control is required:
+
+- compatible: brcm,bcmchip_id-sun-top-ctrl, syscon
+- compatible: brcm,bcmchip_id-hif-cpubiuctrl, syscon
+- compatible: brcm,bcmchip_id-hif-continuation, syscon
+
+example:
+rdb {
+#address-cells = 1;
+#size-cells = 1;
+compatible = simple-bus;
+ranges = 0 0x00 0xf000 0x100;
+
+sun_top_ctrl: syscon@404000 {
+compatible = brcm,bcm7445-sun-top-ctrl, syscon;
+reg = 0x404000 0x51c;
+};
+
+hif_cpubiuctrl: syscon@3e2400 {
+compatible = brcm,bcm7445-hif-cpubiuctrl, syscon;
+reg = 0x3e2400 0x5b4;
+};
+
+hif_continuation: syscon@452000 {
+compatible = brcm,bcm7445-hif-continuation, syscon;
+reg = 0x452000 0x100;
+};
+};
+
+Lastly, nodes that allow for support of SMP initialization and reboot are
+required:
+
+smpboot
+---
+Required properties:
+
+- compatible
+The string brcm,brcmstb-smpboot.
+
+- syscon-cpu
+A phandle / integer array property which lets the BSP know the location
+of certain CPU power-on registers.
+
+The layout of the property is as follows:
+o a phandle to the hif_cpubiuctrl syscon node
+o offset to the base CPU power zone register
+o offset to the base CPU reset register
+
+- syscon-cont
+A phandle pointing to the syscon node which describes the CPU boot
+continuation registers.
+o a phandle to the hif_continuation syscon node
+
+example:
+smpboot {
+compatible = brcm,brcmstb-smpboot;
+syscon-cpu = hif_cpubiuctrl 0x88 0x178;
+syscon-cont = hif_continuation;
+};
+
+reboot
+---
+Required properties
+
+- compatible
+The string property brcm,brcmstb-reboot.
+
+- syscon
+A phandle / integer array that points to the syscon node which
describes
+the general system reset registers.
+o a phandle to sun_top_ctrl
+o offset to the reset source enable register
+o offset to the software master reset register
+
+example:
+reboot {
+compatible = brcm,brcmstb-reboot;
+syscon = sun_top_ctrl 0x304 0x308;
+};
--
1.7.1
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[PATCH v7 2/9] power: reset: Add reboot driver for brcmstb
Add support for reboot functionality on boards with ARM-based
Broadcom STB chipsets.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Cc: Dmitry Eremin-Solenikov dbarysh...@gmail.com
Cc: David Woodhouse dw...@infradead.org
---
arch/arm/mach-bcm/Kconfig|1 +
drivers/power/reset/Kconfig | 10 +++
drivers/power/reset/Makefile |1 +
drivers/power/reset/brcmstb-reboot.c | 120 ++
4 files changed, 132 insertions(+), 0 deletions(-)
create mode 100644 drivers/power/reset/brcmstb-reboot.c
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index f85e7bc..d8f6d7a 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -39,6 +39,7 @@ config ARCH_BRCMSTB
select MIGHT_HAVE_PCI
select HAVE_SMP
select HAVE_ARM_ARCH_TIMER
+ select POWER_RESET_BRCMSTB
help
Say Y if you intend to run the kernel on a Broadcom ARM-based STB
chipset.
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 6d452a7..c886505 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -12,6 +12,16 @@ config POWER_RESET_AS3722
help
This driver supports turning off board via a ams AS3722 power-off.
+config POWER_RESET_BRCMSTB
+ bool Broadcom STB reset driver
+ depends on POWER_RESET ARCH_BRCMSTB
+ help
+ This driver provides restart support for ARM-based Broadcom STB
+ boards.
+
+ Say Y here if you have an ARM-based Broadcom STB board and you wish
+ to have restart support.
+
config POWER_RESET_GPIO
bool GPIO power-off driver
depends on OF_GPIO POWER_RESET
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index a5b4a77..72bb94f 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
obj-$(CONFIG_POWER_RESET_VEXPRESS) += vexpress-poweroff.o
obj-$(CONFIG_POWER_RESET_XGENE) += xgene-reboot.o
+obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
diff --git a/drivers/power/reset/brcmstb-reboot.c
b/drivers/power/reset/brcmstb-reboot.c
new file mode 100644
index 000..3f23692
--- /dev/null
+++ b/drivers/power/reset/brcmstb-reboot.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/device.h
+#include linux/errno.h
+#include linux/init.h
+#include linux/io.h
+#include linux/jiffies.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/printk.h
+#include linux/reboot.h
+#include linux/regmap.h
+#include linux/smp.h
+#include linux/mfd/syscon.h
+
+#include asm/system_misc.h
+
+#define RESET_SOURCE_ENABLE_REG 1
+#define SW_MASTER_RESET_REG 2
+
+static struct regmap *regmap;
+static u32 rst_src_en;
+static u32 sw_mstr_rst;
+
+static void brcmstb_reboot(enum reboot_mode mode, const char *cmd)
+{
+ int rc;
+ u32 tmp;
+
+ rc = regmap_write(regmap, rst_src_en, 1);
+ if (rc) {
+ pr_err(failed to write rst_src_en (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, rst_src_en, tmp);
+ if (rc) {
+ pr_err(failed to read rst_src_en (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_write(regmap, sw_mstr_rst, 1);
+ if (rc) {
+ pr_err(failed to write sw_mstr_rst (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, sw_mstr_rst, tmp);
+ if (rc) {
+ pr_err(failed to read sw_mstr_rst (%d)\n, rc);
+ return;
+ }
+
+ while (1)
+ ;
+}
+
+static int brcmstb_reboot_probe(struct platform_device *pdev)
+{
+ int rc;
+ struct device_node *np = pdev-dev.of_node;
+
+ regmap = syscon_regmap_lookup_by_phandle(np, syscon);
+ if (IS_ERR(regmap)) {
+ pr_err(failed to get syscon phandle\n);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, syscon, RESET_SOURCE_ENABLE_REG,
+ rst_src_en);
+ if (rc) {
+ pr_err(can't get rst_src_en offset (%d)\n, rc);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, syscon, SW_MASTER_RESET_REG,
+ sw_mstr_rst
[PATCH v7 9/9] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
Cc: Matt Porter mpor...@linaro.org
---
arch/arm/boot/dts/bcm7445-bcm97445svmb.dts | 14
arch/arm/boot/dts/bcm7445.dtsi | 107
2 files changed, 121 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
create mode 100644 arch/arm/boot/dts/bcm7445.dtsi
diff --git a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
new file mode 100644
index 000..9eec2ac
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+#include bcm7445.dtsi
+
+/ {
+ model = Broadcom STB (bcm7445), SVMB reference board;
+ compatible = brcm,bcm7445, brcm,brcmstb;
+
+ memory {
+ device_type = memory;
+ reg = 0x00 0x 0x00 0x4000,
+ 0x00 0x4000 0x00 0x4000,
+ 0x00 0x8000 0x00 0x4000;
+ };
+};
diff --git a/arch/arm/boot/dts/bcm7445.dtsi b/arch/arm/boot/dts/bcm7445.dtsi
new file mode 100644
index 000..f9c9633
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445.dtsi
@@ -0,0 +1,107 @@
+#include dt-bindings/interrupt-controller/arm-gic.h
+
+#include skeleton.dtsi
+
+/ {
+ #address-cells = 2;
+ #size-cells = 2;
+ model = Broadcom STB (bcm7445);
+ compatible = brcm,bcm7445, brcm,brcmstb;
+ interrupt-parent = gic;
+
+ chosen {
+ bootargs = console=ttyS0,115200 earlyprintk;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 0;
+ };
+
+ cpu@1 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 1;
+ };
+
+ cpu@2 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 2;
+ };
+
+ cpu@3 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 3;
+ };
+ };
+
+ gic: interrupt-controller@ffd0 {
+ compatible = brcm,brahma-b15-gic, arm,cortex-a15-gic;
+ reg = 0x00 0xffd01000 0x00 0x1000,
+ 0x00 0xffd02000 0x00 0x2000,
+ 0x00 0xffd04000 0x00 0x2000,
+ 0x00 0xffd06000 0x00 0x2000;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ };
+
+ timer {
+ compatible = arm,armv7-timer;
+ interrupts = GIC_PPI 13 (GIC_CPU_MASK_RAW(15) |
IRQ_TYPE_LEVEL_LOW),
+GIC_PPI 14 (GIC_CPU_MASK_RAW(15) |
IRQ_TYPE_LEVEL_LOW),
+GIC_PPI 11 (GIC_CPU_MASK_RAW(15) |
IRQ_TYPE_LEVEL_LOW),
+GIC_PPI 10 (GIC_CPU_MASK_RAW(15) |
IRQ_TYPE_LEVEL_LOW);
+ };
+
+ rdb {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = simple-bus;
+ ranges = 0 0x00 0xf000 0x100;
+
+ serial@406b00 {
+ compatible = ns16550a;
+ reg = 0x406b00 0x20;
+ reg-shift = 2;
+ reg-io-width = 4;
+ interrupts = GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH;
+ clock-frequency = 0x4d3f640;
+ };
+
+ sun_top_ctrl: syscon@404000 {
+ compatible = brcm,bcm7445-sun-top-ctrl,
+syscon;
+ reg = 0x404000 0x51c;
+ };
+
+ hif_cpubiuctrl: syscon@3e2400 {
+ compatible = brcm,bcm7445-hif-cpubiuctrl,
+syscon;
+ reg = 0x3e2400 0x5b4;
+ };
+
+ hif_continuation: syscon@452000 {
+ compatible = brcm,bcm7445-hif-continuation,
+syscon;
+ reg = 0x452000 0x100;
+ };
+ };
+
+ smpboot {
+ compatible = brcm,brcmstb-smpboot;
+ syscon-cpu = hif_cpubiuctrl 0x88 0x178;
+ syscon-cont = hif_continuation;
+ };
+
+ reboot {
+ compatible = brcm,brcmstb-reboot;
+ syscon = sun_top_ctrl 0x304 0x308;
+ };
+};
--
1.7.1
--
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[PATCH v7 3/9] ARM: brcmstb: add debug UART for earlyprintk support
Add the UART definitions needed to support earlyprintk on brcmstb machines. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- arch/arm/Kconfig.debug | 15 ++- 1 files changed, 14 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 0531da8..5d7f76b 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -125,6 +125,17 @@ choice Say Y here if you want kernel low-level debugging support on Marvell Berlin SoC based platforms. + config DEBUG_BRCMSTB_UART + bool Use BRCMSTB UART for low-level debug + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool Kernel low-level debugging messages via UART1 depends on ARCH_CLPS711X @@ -1049,6 +1060,7 @@ config DEBUG_UART_PHYS default 0xd4018000 if DEBUG_MMP_UART3 default 0xe000 if ARCH_SPEAR13XX default 0xfbe0 if ARCH_EBSA110 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \ ARCH_ORION5X @@ -1083,6 +1095,7 @@ config DEBUG_UART_VIRT default 0xf809 if DEBUG_VEXPRESS_UART0_RS1 default 0xfb009000 if DEBUG_REALVIEW_STD_PORT default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xfd00 if ARCH_SPEAR3XX || ARCH_SPEAR6XX default 0xfd00 if ARCH_SPEAR13XX default 0xfd012000 if ARCH_MV78XX0 @@ -1136,7 +1149,7 @@ config DEBUG_UART_8250_WORD ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ - DEBUG_BCM_KONA_UART + DEBUG_BCM_KONA_UART || DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool Enable flow control for 8250 UART -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v7 5/9] ARM: Enable erratum 798181 for Broadcom Brahma-B15
From: Gregory Fong gregory.0...@gmail.com
Broadcom Brahma-B15 (r0p0..r0p2) is also affected by Cortex-A15
erratum 798181, so enable the workaround for Brahma-B15.
Signed-off-by: Gregory Fong gregory.0...@gmail.com
Acked-by: Marc Carino marc.cee...@gmail.com
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Will Deacon will.dea...@arm.com
---
arch/arm/kernel/smp_tlb.c | 20
1 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
index 95d0636..5518e3f 100644
--- a/arch/arm/kernel/smp_tlb.c
+++ b/arch/arm/kernel/smp_tlb.c
@@ -92,15 +92,19 @@ void erratum_a15_798181_init(void)
unsigned int midr = read_cpuid_id();
unsigned int revidr = read_cpuid(CPUID_REVIDR);
- /* Cortex-A15 r0p0..r3p2 w/o ECO fix affected */
- if ((midr 0xff00) != 0x410fc0f0 || midr 0x413fc0f2 ||
- (revidr 0x210) == 0x210) {
- return;
- }
- if (revidr 0x10)
- erratum_a15_798181_handler = erratum_a15_798181_partial;
- else
+ /* Brahma-B15 r0p0..(not yet fixed) affected
+* Cortex-A15 r0p0..r3p2 w/o ECO fix affected */
+ if ((midr 0xff00) == 0x420f00f0)
erratum_a15_798181_handler = erratum_a15_798181_broadcast;
+ else if ((midr 0xff00) == 0x410fc0f0 midr = 0x413fc0f2
+(revidr 0x210) != 0x210) {
+ if (revidr 0x10)
+ erratum_a15_798181_handler =
+ erratum_a15_798181_partial;
+ else
+ erratum_a15_798181_handler =
+ erratum_a15_798181_broadcast;
+ }
}
#endif
--
1.7.1
--
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[PATCH v7 4/9] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com Cc: Russell King rmk+ker...@arm.linux.org.uk --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 74f6033..e3da338 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 8/8] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
arch/arm/boot/dts/bcm7445.dts | 111 +
1 files changed, 111 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm7445.dts
diff --git a/arch/arm/boot/dts/bcm7445.dts b/arch/arm/boot/dts/bcm7445.dts
new file mode 100644
index 000..ffa3305
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445.dts
@@ -0,0 +1,111 @@
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "Broadcom STB (bcm7445)";
+ compatible = "brcm,bcm7445", "brcm,brcmstb";
+ interrupt-parent = <>;
+
+ chosen {};
+
+ memory {
+ device_type = "memory";
+ reg = <0x00 0x 0x00 0x4000>,
+ <0x00 0x4000 0x00 0x4000>,
+ <0x00 0x8000 0x00 0x4000>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <1>;
+ };
+
+ cpu@2 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <2>;
+ };
+
+ cpu@3 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <3>;
+ };
+ };
+
+ gic: interrupt-controller@ffd0 {
+ compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic";
+ reg = <0x00 0xffd01000 0x00 0x1000>,
+ <0x00 0xffd02000 0x00 0x2000>,
+ <0x00 0xffd04000 0x00 0x2000>,
+ <0x00 0xffd06000 0x00 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <1 13 0xf08>,
+<1 14 0xf08>,
+<1 11 0xf08>,
+<1 10 0xf08>;
+ };
+
+ rdb {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges = <0 0x00 0xf000 0x100>;
+
+ serial@406b00 {
+ compatible = "ns16550a";
+ reg = <0x406b00 0x20>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ interrupts = <0 75 0x4>;
+ clock-frequency = <0x4d3f640>;
+ };
+
+ sun_top_ctrl: syscon@404000 {
+ compatible = "brcm,bcm7445-sun-top-ctrl",
+"syscon";
+ reg = <0x404000 0x51c>;
+ };
+
+ hif_cpubiuctrl: syscon@3e2400 {
+ compatible = "brcm,bcm7445-hif-cpubiuctrl",
+"syscon";
+ reg = <0x3e2400 0x5b4>;
+ };
+
+ hif_continuation: syscon@452000 {
+ compatible = "brcm,bcm7445-hif-continuation",
+"syscon";
+ reg = <0x452000 0x100>;
+ };
+ };
+
+ smpboot {
+ compatible = "brcm,brcmstb-smpboot";
+ syscon-cpu = <_cpubiuctrl 0x88 0x178>;
+ syscon-cont = <_continuation>;
+ };
+
+ reboot {
+ compatible = "brcm,brcmstb-reboot";
+ syscon = <_top_ctrl 0x304 0x308>;
+ };
+};
--
1.7.1
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[PATCH v6 7/8] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/gic.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index bae0d87..d1f0b98 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -16,6 +16,7 @@ Main node required properties: "arm,cortex-a9-gic" "arm,cortex-a7-gic" "arm,arm11mp-gic" + "brcm,brahma-b15-gic" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a and the value shall be 3. -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 4/8] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index bd17819..98ea423 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 5/8] ARM: brcmstb: add CPU binding for Broadcom Brahma15
Add the Broadcom Brahma B15 CPU to the DT CPU binding list. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/cpus.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 9130435..0cd1e25 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below. "arm,cortex-r4" "arm,cortex-r5" "arm,cortex-r7" + "brcm,brahma-b15" "faraday,fa526" "intel,sa110" "intel,sa1100" -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 6/8] ARM: brcmstb: add misc. DT bindings for brcmstb
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
.../devicetree/bindings/arm/brcm-brcmstb.txt | 95
1 files changed, 95 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
new file mode 100644
index 000..3c436cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -0,0 +1,95 @@
+ARM Broadcom STB platforms Device Tree Bindings
+---
+Boards with Broadcom Brahma15 ARM-based BCM (generally BCM7xxx variants)
+SoC shall have the following DT organization:
+
+Required root node properties:
+- compatible: "brcm,bcm", "brcm,brcmstb"
+
+example:
+/ {
+#address-cells = <2>;
+#size-cells = <2>;
+model = "Broadcom STB (bcm7445)";
+compatible = "brcm,bcm7445", "brcm,brcmstb";
+
+Further, syscon nodes that map platform-specific registers used for general
+system control is required:
+
+- compatible: "brcm,bcm-sun-top-ctrl", "syscon"
+- compatible: "brcm,bcm-hif-cpubiuctrl", "syscon"
+- compatible: "brcm,bcm-hif-continuation", "syscon"
+
+example:
+rdb {
+#address-cells = <1>;
+#size-cells = <1>;
+compatible = "simple-bus";
+ranges = <0 0x00 0xf000 0x100>;
+
+sun_top_ctrl: syscon@404000 {
+compatible = "brcm,bcm7445-sun-top-ctrl", "syscon";
+reg = <0x404000 0x51c>;
+};
+
+hif_cpubiuctrl: syscon@3e2400 {
+compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon";
+reg = <0x3e2400 0x5b4>;
+};
+
+hif_continuation: syscon@452000 {
+compatible = "brcm,bcm7445-hif-continuation", "syscon";
+reg = <0x452000 0x100>;
+};
+};
+
+Lastly, nodes that allow for support of SMP initialization and reboot are
+required:
+
+smpboot
+---
+Required properties:
+
+- compatible
+The string "brcm,brcmstb-smpboot".
+
+- syscon-cpu
+A phandle / integer array property which lets the BSP know the location
+of certain CPU power-on registers.
+
+The layout of the property is as follows:
+o a phandle to the "hif_cpubiuctrl" syscon node
+o offset to the base CPU power zone register
+o offset to the base CPU reset register
+
+- syscon-cont
+A phandle pointing to the syscon node which describes the CPU boot
+continuation registers.
+o a phandle to the "hif_continuation" syscon node
+
+example:
+smpboot {
+compatible = "brcm,brcmstb-smpboot";
+syscon-cpu = <_cpubiuctrl 0x88 0x178>;
+syscon-cont = <_continuation>;
+};
+
+reboot
+---
+Required properties
+
+- compatible
+The string property "brcm,brcmstb-reboot".
+
+- syscon
+A phandle / integer array that points to the syscon node which
describes
+the general system reset registers.
+o a phandle to "sun_top_ctrl"
+o offset to the "reset source enable" register
+o offset to the "software master reset" register
+
+example:
+reboot {
+compatible = "brcm,brcmstb-reboot";
+syscon = <_top_ctrl 0x304 0x308>;
+};
--
1.7.1
--
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[PATCH v6 3/8] ARM: brcmstb: add debug UART for earlyprintk support
Add the UART definitions needed to support earlyprintk on brcmstb machines. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- arch/arm/Kconfig.debug | 15 ++- 1 files changed, 14 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 0531da8..5d7f76b 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -125,6 +125,17 @@ choice Say Y here if you want kernel low-level debugging support on Marvell Berlin SoC based platforms. + config DEBUG_BRCMSTB_UART + bool "Use BRCMSTB UART for low-level debug" + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X @@ -1049,6 +1060,7 @@ config DEBUG_UART_PHYS default 0xd4018000 if DEBUG_MMP_UART3 default 0xe000 if ARCH_SPEAR13XX default 0xfbe0 if ARCH_EBSA110 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \ ARCH_ORION5X @@ -1083,6 +1095,7 @@ config DEBUG_UART_VIRT default 0xf809 if DEBUG_VEXPRESS_UART0_RS1 default 0xfb009000 if DEBUG_REALVIEW_STD_PORT default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xfd00 if ARCH_SPEAR3XX || ARCH_SPEAR6XX default 0xfd00 if ARCH_SPEAR13XX default 0xfd012000 if ARCH_MV78XX0 @@ -1136,7 +1149,7 @@ config DEBUG_UART_8250_WORD ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ - DEBUG_BCM_KONA_UART + DEBUG_BCM_KONA_UART || DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool "Enable flow control for 8250 UART" -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 2/8] power: reset: Add reboot driver for brcmstb
Add support for reboot functionality on boards with ARM-based
Broadcom STB chipsets.
Signed-off-by: Marc Carino
---
arch/arm/mach-bcm/Kconfig|1 +
drivers/power/reset/Kconfig | 10 +++
drivers/power/reset/Makefile |1 +
drivers/power/reset/brcmstb-reboot.c | 120 ++
4 files changed, 132 insertions(+), 0 deletions(-)
create mode 100644 drivers/power/reset/brcmstb-reboot.c
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index f85e7bc..d8f6d7a 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -39,6 +39,7 @@ config ARCH_BRCMSTB
select MIGHT_HAVE_PCI
select HAVE_SMP
select HAVE_ARM_ARCH_TIMER
+ select POWER_RESET_BRCMSTB
help
Say Y if you intend to run the kernel on a Broadcom ARM-based STB
chipset.
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 6d452a7..c886505 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -12,6 +12,16 @@ config POWER_RESET_AS3722
help
This driver supports turning off board via a ams AS3722 power-off.
+config POWER_RESET_BRCMSTB
+ bool "Broadcom STB reset driver"
+ depends on POWER_RESET && ARCH_BRCMSTB
+ help
+ This driver provides restart support for ARM-based Broadcom STB
+ boards.
+
+ Say Y here if you have an ARM-based Broadcom STB board and you wish
+ to have restart support.
+
config POWER_RESET_GPIO
bool "GPIO power-off driver"
depends on OF_GPIO && POWER_RESET
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index a5b4a77..72bb94f 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
obj-$(CONFIG_POWER_RESET_VEXPRESS) += vexpress-poweroff.o
obj-$(CONFIG_POWER_RESET_XGENE) += xgene-reboot.o
+obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
diff --git a/drivers/power/reset/brcmstb-reboot.c
b/drivers/power/reset/brcmstb-reboot.c
new file mode 100644
index 000..3f23692
--- /dev/null
+++ b/drivers/power/reset/brcmstb-reboot.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#define RESET_SOURCE_ENABLE_REG 1
+#define SW_MASTER_RESET_REG 2
+
+static struct regmap *regmap;
+static u32 rst_src_en;
+static u32 sw_mstr_rst;
+
+static void brcmstb_reboot(enum reboot_mode mode, const char *cmd)
+{
+ int rc;
+ u32 tmp;
+
+ rc = regmap_write(regmap, rst_src_en, 1);
+ if (rc) {
+ pr_err("failed to write rst_src_en (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, rst_src_en, );
+ if (rc) {
+ pr_err("failed to read rst_src_en (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_write(regmap, sw_mstr_rst, 1);
+ if (rc) {
+ pr_err("failed to write sw_mstr_rst (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, sw_mstr_rst, );
+ if (rc) {
+ pr_err("failed to read sw_mstr_rst (%d)\n", rc);
+ return;
+ }
+
+ while (1)
+ ;
+}
+
+static int brcmstb_reboot_probe(struct platform_device *pdev)
+{
+ int rc;
+ struct device_node *np = pdev->dev.of_node;
+
+ regmap = syscon_regmap_lookup_by_phandle(np, "syscon");
+ if (IS_ERR(regmap)) {
+ pr_err("failed to get syscon phandle\n");
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, "syscon", RESET_SOURCE_ENABLE_REG,
+ _src_en);
+ if (rc) {
+ pr_err("can't get rst_src_en offset (%d)\n", rc);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, "syscon", SW_MASTER_RESET_REG,
+ _mstr_rst);
+ if (rc) {
+ pr_err("can't get sw_mstr_rst offset (%d)\n", rc);
+ return -EINVAL;
+ }
+
+ arm_pm_restart = brcmstb_reboot;
+
+
[PATCH v6 1/8] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
arch/arm/configs/multi_v7_defconfig |1 +
arch/arm/mach-bcm/Kconfig | 14 ++
arch/arm/mach-bcm/Makefile |4 +
arch/arm/mach-bcm/brcmstb.c | 104
arch/arm/mach-bcm/brcmstb.h | 38 +
arch/arm/mach-bcm/headsmp-brcmstb.S | 33
arch/arm/mach-bcm/hotplug-brcmstb.c | 311 +++
7 files changed, 505 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-bcm/brcmstb.c
create mode 100644 arch/arm/mach-bcm/brcmstb.h
create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S
create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 845bc74..2437b7f 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -12,6 +12,7 @@ CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BRCMSTB=y
CONFIG_ARCH_BERLIN=y
CONFIG_MACH_BERLIN_BG2=y
CONFIG_MACH_BERLIN_BG2CD=y
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index b1aa6a9..f85e7bc 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -32,6 +32,20 @@ config ARCH_BCM_MOBILE
BCM11130, BCM11140, BCM11351, BCM28145 and
BCM28155 variants.
+config ARCH_BRCMSTB
+ bool "Broadcom BCM7XXX based boards" if ARCH_MULTI_V7
+ depends on MMU
+ select ARM_GIC
+ select MIGHT_HAVE_PCI
+ select HAVE_SMP
+ select HAVE_ARM_ARCH_TIMER
+ help
+ Say Y if you intend to run the kernel on a Broadcom ARM-based STB
+ chipset.
+
+ This enables support for Broadcom ARM-based set-top box chipsets,
+ including the 7445 family of chips.
+
endmenu
endif
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index c2ccd5a..b744a12 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -13,3 +13,7 @@
obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o
bcm_kona_smc_asm.o kona.o
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec)
+
+obj-$(CONFIG_ARCH_BRCMSTB) := brcmstb.o
+obj-$(CONFIG_SMP) += headsmp-brcmstb.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug-brcmstb.o
diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
new file mode 100644
index 000..71387a8
--- /dev/null
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "brcmstb.h"
+
+/***
+ * STB CPU (main application processor)
+ ***/
+
+static const char *brcmstb_match[] __initconst = {
+ "brcm,bcm7445",
+ "brcm,brcmstb",
+ NULL
+};
+
+/***
+ * SMP boot
+ ***/
+
+#ifdef CONFIG_SMP
+static DEFINE_SPINLOCK(boot_lock);
+
+static void brcmstb_secondary_init(unsigned int cpu)
+{
+ /*
+* Synchronise with the boot thread.
+*/
+ spin_lock(_lock);
+ spin_unlock(_lock);
+}
+
+static int brcmstb_boot_secondary(unsigned int cpu,
+ struct task_struct *idle)
+{
+ /*
+* set synchronisation state between this boot processor
+* and the secondary one
+*/
+ spin_lock(_lock);
+
+ /* Bring up power to the core if necessary */
+ if (brcmstb_cpu_get_power_state(cpu) == 0)
+ brcmstb_cpu_power_on(cpu);
+
+ brcmstb_cpu_boot(cpu);
+
+ /*
+* now the secondary core is starting up let it run its
+* calibrations, then wait for it to finish
+*/
+ spin_unlock(_lock);
+
+ return 0;
+}
+
+struct smp_operations brcmstb_smp_ops __initdata = {
+ .smp_prepare_cpus = b
[PATCH v6 0/8] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. v6: - rebased to v3.14-rc1 - utilize common APIs for handling CPU power-down - drop deprecated __cpuinit attributes v5 (https://lkml.org/lkml/2014/1/21/640): - rebased to v3.13 tag - make UART DT node a child of 'rdb' node - fix ordering of debug UART entries v4 (https://lkml.org/lkml/2014/1/17/455): - make a reboot driver and put it in the drivers folder - rework DT bindings to leverage 'syscon' - rework BSP code to use 'syscon' for all register mappings - misc. tweaks per suggestions from v3 v3 (https://lkml.org/lkml/2014/1/14/696): - rebased to v3.13-rc8 - switched to using 'multi_v7_defconfig' - eliminated dependence on compile-time peripheral register access - moved DT node iomap out from 'init_early' - misc. minor cleanups from mailing-list discussion for v2 v2 (https://lkml.org/lkml/2013/11/26/570): - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B16RM v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Marc Carino (8): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs power: reset: Add reboot driver for brcmstb ARM: brcmstb: add debug UART for earlyprintk support ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcmstb ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 95 ++ Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 15 +- arch/arm/boot/dts/bcm7445.dts | 111 +++ arch/arm/configs/multi_v7_defconfig|1 + arch/arm/mach-bcm/Kconfig | 15 + arch/arm/mach-bcm/Makefile |4 + arch/arm/mach-bcm/brcmstb.c| 104 +++ arch/arm/mach-bcm/brcmstb.h| 38 +++ arch/arm/mach-bcm/headsmp-brcmstb.S| 33 ++ arch/arm/mach-bcm/hotplug-brcmstb.c| 311 arch/arm/mm/proc-v7.S | 11 + drivers/power/reset/Kconfig| 10 + drivers/power/reset/Makefile |1 + drivers/power/reset/brcmstb-reboot.c | 120 16 files changed, 870 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/bcm7445.dts create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c create mode 100644 drivers/power/reset/brcmstb-reboot.c -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 0/8] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. v6: - rebased to v3.14-rc1 - utilize common APIs for handling CPU power-down - drop deprecated __cpuinit attributes v5 (https://lkml.org/lkml/2014/1/21/640): - rebased to v3.13 tag - make UART DT node a child of 'rdb' node - fix ordering of debug UART entries v4 (https://lkml.org/lkml/2014/1/17/455): - make a reboot driver and put it in the drivers folder - rework DT bindings to leverage 'syscon' - rework BSP code to use 'syscon' for all register mappings - misc. tweaks per suggestions from v3 v3 (https://lkml.org/lkml/2014/1/14/696): - rebased to v3.13-rc8 - switched to using 'multi_v7_defconfig' - eliminated dependence on compile-time peripheral register access - moved DT node iomap out from 'init_early' - misc. minor cleanups from mailing-list discussion for v2 v2 (https://lkml.org/lkml/2013/11/26/570): - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B16RM v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Marc Carino (8): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs power: reset: Add reboot driver for brcmstb ARM: brcmstb: add debug UART for earlyprintk support ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcmstb ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 95 ++ Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 15 +- arch/arm/boot/dts/bcm7445.dts | 111 +++ arch/arm/configs/multi_v7_defconfig|1 + arch/arm/mach-bcm/Kconfig | 15 + arch/arm/mach-bcm/Makefile |4 + arch/arm/mach-bcm/brcmstb.c| 104 +++ arch/arm/mach-bcm/brcmstb.h| 38 +++ arch/arm/mach-bcm/headsmp-brcmstb.S| 33 ++ arch/arm/mach-bcm/hotplug-brcmstb.c| 311 arch/arm/mm/proc-v7.S | 11 + drivers/power/reset/Kconfig| 10 + drivers/power/reset/Makefile |1 + drivers/power/reset/brcmstb-reboot.c | 120 16 files changed, 870 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/bcm7445.dts create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c create mode 100644 drivers/power/reset/brcmstb-reboot.c -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 1/8] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
arch/arm/configs/multi_v7_defconfig |1 +
arch/arm/mach-bcm/Kconfig | 14 ++
arch/arm/mach-bcm/Makefile |4 +
arch/arm/mach-bcm/brcmstb.c | 104
arch/arm/mach-bcm/brcmstb.h | 38 +
arch/arm/mach-bcm/headsmp-brcmstb.S | 33
arch/arm/mach-bcm/hotplug-brcmstb.c | 311 +++
7 files changed, 505 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-bcm/brcmstb.c
create mode 100644 arch/arm/mach-bcm/brcmstb.h
create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S
create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 845bc74..2437b7f 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -12,6 +12,7 @@ CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BRCMSTB=y
CONFIG_ARCH_BERLIN=y
CONFIG_MACH_BERLIN_BG2=y
CONFIG_MACH_BERLIN_BG2CD=y
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index b1aa6a9..f85e7bc 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -32,6 +32,20 @@ config ARCH_BCM_MOBILE
BCM11130, BCM11140, BCM11351, BCM28145 and
BCM28155 variants.
+config ARCH_BRCMSTB
+ bool Broadcom BCM7XXX based boards if ARCH_MULTI_V7
+ depends on MMU
+ select ARM_GIC
+ select MIGHT_HAVE_PCI
+ select HAVE_SMP
+ select HAVE_ARM_ARCH_TIMER
+ help
+ Say Y if you intend to run the kernel on a Broadcom ARM-based STB
+ chipset.
+
+ This enables support for Broadcom ARM-based set-top box chipsets,
+ including the 7445 family of chips.
+
endmenu
endif
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index c2ccd5a..b744a12 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -13,3 +13,7 @@
obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o
bcm_kona_smc_asm.o kona.o
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec)
+
+obj-$(CONFIG_ARCH_BRCMSTB) := brcmstb.o
+obj-$(CONFIG_SMP) += headsmp-brcmstb.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug-brcmstb.o
diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
new file mode 100644
index 000..71387a8
--- /dev/null
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk-provider.h
+#include linux/console.h
+#include linux/clocksource.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/errno.h
+#include linux/init.h
+#include linux/io.h
+#include linux/jiffies.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/printk.h
+#include linux/smp.h
+
+#include asm/cacheflush.h
+#include asm/mach-types.h
+#include asm/mach/arch.h
+#include asm/mach/map.h
+#include asm/mach/time.h
+
+#include brcmstb.h
+
+/***
+ * STB CPU (main application processor)
+ ***/
+
+static const char *brcmstb_match[] __initconst = {
+ brcm,bcm7445,
+ brcm,brcmstb,
+ NULL
+};
+
+/***
+ * SMP boot
+ ***/
+
+#ifdef CONFIG_SMP
+static DEFINE_SPINLOCK(boot_lock);
+
+static void brcmstb_secondary_init(unsigned int cpu)
+{
+ /*
+* Synchronise with the boot thread.
+*/
+ spin_lock(boot_lock);
+ spin_unlock(boot_lock);
+}
+
+static int brcmstb_boot_secondary(unsigned int cpu,
+ struct task_struct *idle)
+{
+ /*
+* set synchronisation state between this boot processor
+* and the secondary one
+*/
+ spin_lock(boot_lock);
+
+ /* Bring up power to the core if necessary */
+ if (brcmstb_cpu_get_power_state(cpu) == 0)
+ brcmstb_cpu_power_on(cpu
[PATCH v6 2/8] power: reset: Add reboot driver for brcmstb
Add support for reboot functionality on boards with ARM-based
Broadcom STB chipsets.
Signed-off-by: Marc Carino marc.cee...@gmail.com
---
arch/arm/mach-bcm/Kconfig|1 +
drivers/power/reset/Kconfig | 10 +++
drivers/power/reset/Makefile |1 +
drivers/power/reset/brcmstb-reboot.c | 120 ++
4 files changed, 132 insertions(+), 0 deletions(-)
create mode 100644 drivers/power/reset/brcmstb-reboot.c
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index f85e7bc..d8f6d7a 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -39,6 +39,7 @@ config ARCH_BRCMSTB
select MIGHT_HAVE_PCI
select HAVE_SMP
select HAVE_ARM_ARCH_TIMER
+ select POWER_RESET_BRCMSTB
help
Say Y if you intend to run the kernel on a Broadcom ARM-based STB
chipset.
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 6d452a7..c886505 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -12,6 +12,16 @@ config POWER_RESET_AS3722
help
This driver supports turning off board via a ams AS3722 power-off.
+config POWER_RESET_BRCMSTB
+ bool Broadcom STB reset driver
+ depends on POWER_RESET ARCH_BRCMSTB
+ help
+ This driver provides restart support for ARM-based Broadcom STB
+ boards.
+
+ Say Y here if you have an ARM-based Broadcom STB board and you wish
+ to have restart support.
+
config POWER_RESET_GPIO
bool GPIO power-off driver
depends on OF_GPIO POWER_RESET
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index a5b4a77..72bb94f 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
obj-$(CONFIG_POWER_RESET_VEXPRESS) += vexpress-poweroff.o
obj-$(CONFIG_POWER_RESET_XGENE) += xgene-reboot.o
+obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
diff --git a/drivers/power/reset/brcmstb-reboot.c
b/drivers/power/reset/brcmstb-reboot.c
new file mode 100644
index 000..3f23692
--- /dev/null
+++ b/drivers/power/reset/brcmstb-reboot.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/device.h
+#include linux/errno.h
+#include linux/init.h
+#include linux/io.h
+#include linux/jiffies.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/printk.h
+#include linux/reboot.h
+#include linux/regmap.h
+#include linux/smp.h
+#include linux/mfd/syscon.h
+
+#include asm/system_misc.h
+
+#define RESET_SOURCE_ENABLE_REG 1
+#define SW_MASTER_RESET_REG 2
+
+static struct regmap *regmap;
+static u32 rst_src_en;
+static u32 sw_mstr_rst;
+
+static void brcmstb_reboot(enum reboot_mode mode, const char *cmd)
+{
+ int rc;
+ u32 tmp;
+
+ rc = regmap_write(regmap, rst_src_en, 1);
+ if (rc) {
+ pr_err(failed to write rst_src_en (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, rst_src_en, tmp);
+ if (rc) {
+ pr_err(failed to read rst_src_en (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_write(regmap, sw_mstr_rst, 1);
+ if (rc) {
+ pr_err(failed to write sw_mstr_rst (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, sw_mstr_rst, tmp);
+ if (rc) {
+ pr_err(failed to read sw_mstr_rst (%d)\n, rc);
+ return;
+ }
+
+ while (1)
+ ;
+}
+
+static int brcmstb_reboot_probe(struct platform_device *pdev)
+{
+ int rc;
+ struct device_node *np = pdev-dev.of_node;
+
+ regmap = syscon_regmap_lookup_by_phandle(np, syscon);
+ if (IS_ERR(regmap)) {
+ pr_err(failed to get syscon phandle\n);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, syscon, RESET_SOURCE_ENABLE_REG,
+ rst_src_en);
+ if (rc) {
+ pr_err(can't get rst_src_en offset (%d)\n, rc);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, syscon, SW_MASTER_RESET_REG,
+ sw_mstr_rst);
+ if (rc) {
+ pr_err(can't get sw_mstr_rst offset (%d)\n, rc
[PATCH v6 3/8] ARM: brcmstb: add debug UART for earlyprintk support
Add the UART definitions needed to support earlyprintk on brcmstb machines. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- arch/arm/Kconfig.debug | 15 ++- 1 files changed, 14 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 0531da8..5d7f76b 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -125,6 +125,17 @@ choice Say Y here if you want kernel low-level debugging support on Marvell Berlin SoC based platforms. + config DEBUG_BRCMSTB_UART + bool Use BRCMSTB UART for low-level debug + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool Kernel low-level debugging messages via UART1 depends on ARCH_CLPS711X @@ -1049,6 +1060,7 @@ config DEBUG_UART_PHYS default 0xd4018000 if DEBUG_MMP_UART3 default 0xe000 if ARCH_SPEAR13XX default 0xfbe0 if ARCH_EBSA110 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \ ARCH_ORION5X @@ -1083,6 +1095,7 @@ config DEBUG_UART_VIRT default 0xf809 if DEBUG_VEXPRESS_UART0_RS1 default 0xfb009000 if DEBUG_REALVIEW_STD_PORT default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xfd00 if ARCH_SPEAR3XX || ARCH_SPEAR6XX default 0xfd00 if ARCH_SPEAR13XX default 0xfd012000 if ARCH_MV78XX0 @@ -1136,7 +1149,7 @@ config DEBUG_UART_8250_WORD ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ - DEBUG_BCM_KONA_UART + DEBUG_BCM_KONA_UART || DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool Enable flow control for 8250 UART -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 5/8] ARM: brcmstb: add CPU binding for Broadcom Brahma15
Add the Broadcom Brahma B15 CPU to the DT CPU binding list. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- Documentation/devicetree/bindings/arm/cpus.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 9130435..0cd1e25 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below. arm,cortex-r4 arm,cortex-r5 arm,cortex-r7 + brcm,brahma-b15 faraday,fa526 intel,sa110 intel,sa1100 -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 6/8] ARM: brcmstb: add misc. DT bindings for brcmstb
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
.../devicetree/bindings/arm/brcm-brcmstb.txt | 95
1 files changed, 95 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
new file mode 100644
index 000..3c436cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -0,0 +1,95 @@
+ARM Broadcom STB platforms Device Tree Bindings
+---
+Boards with Broadcom Brahma15 ARM-based BCM (generally BCM7xxx variants)
+SoC shall have the following DT organization:
+
+Required root node properties:
+- compatible: brcm,bcmchip_id, brcm,brcmstb
+
+example:
+/ {
+#address-cells = 2;
+#size-cells = 2;
+model = Broadcom STB (bcm7445);
+compatible = brcm,bcm7445, brcm,brcmstb;
+
+Further, syscon nodes that map platform-specific registers used for general
+system control is required:
+
+- compatible: brcm,bcmchip_id-sun-top-ctrl, syscon
+- compatible: brcm,bcmchip_id-hif-cpubiuctrl, syscon
+- compatible: brcm,bcmchip_id-hif-continuation, syscon
+
+example:
+rdb {
+#address-cells = 1;
+#size-cells = 1;
+compatible = simple-bus;
+ranges = 0 0x00 0xf000 0x100;
+
+sun_top_ctrl: syscon@404000 {
+compatible = brcm,bcm7445-sun-top-ctrl, syscon;
+reg = 0x404000 0x51c;
+};
+
+hif_cpubiuctrl: syscon@3e2400 {
+compatible = brcm,bcm7445-hif-cpubiuctrl, syscon;
+reg = 0x3e2400 0x5b4;
+};
+
+hif_continuation: syscon@452000 {
+compatible = brcm,bcm7445-hif-continuation, syscon;
+reg = 0x452000 0x100;
+};
+};
+
+Lastly, nodes that allow for support of SMP initialization and reboot are
+required:
+
+smpboot
+---
+Required properties:
+
+- compatible
+The string brcm,brcmstb-smpboot.
+
+- syscon-cpu
+A phandle / integer array property which lets the BSP know the location
+of certain CPU power-on registers.
+
+The layout of the property is as follows:
+o a phandle to the hif_cpubiuctrl syscon node
+o offset to the base CPU power zone register
+o offset to the base CPU reset register
+
+- syscon-cont
+A phandle pointing to the syscon node which describes the CPU boot
+continuation registers.
+o a phandle to the hif_continuation syscon node
+
+example:
+smpboot {
+compatible = brcm,brcmstb-smpboot;
+syscon-cpu = hif_cpubiuctrl 0x88 0x178;
+syscon-cont = hif_continuation;
+};
+
+reboot
+---
+Required properties
+
+- compatible
+The string property brcm,brcmstb-reboot.
+
+- syscon
+A phandle / integer array that points to the syscon node which
describes
+the general system reset registers.
+o a phandle to sun_top_ctrl
+o offset to the reset source enable register
+o offset to the software master reset register
+
+example:
+reboot {
+compatible = brcm,brcmstb-reboot;
+syscon = sun_top_ctrl 0x304 0x308;
+};
--
1.7.1
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[PATCH v6 4/8] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index bd17819..98ea423 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 7/8] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- Documentation/devicetree/bindings/arm/gic.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index bae0d87..d1f0b98 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -16,6 +16,7 @@ Main node required properties: arm,cortex-a9-gic arm,cortex-a7-gic arm,arm11mp-gic + brcm,brahma-b15-gic - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a u32 and the value shall be 3. -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v6 8/8] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
arch/arm/boot/dts/bcm7445.dts | 111 +
1 files changed, 111 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm7445.dts
diff --git a/arch/arm/boot/dts/bcm7445.dts b/arch/arm/boot/dts/bcm7445.dts
new file mode 100644
index 000..ffa3305
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445.dts
@@ -0,0 +1,111 @@
+/dts-v1/;
+/include/ skeleton.dtsi
+
+/ {
+ #address-cells = 2;
+ #size-cells = 2;
+ model = Broadcom STB (bcm7445);
+ compatible = brcm,bcm7445, brcm,brcmstb;
+ interrupt-parent = gic;
+
+ chosen {};
+
+ memory {
+ device_type = memory;
+ reg = 0x00 0x 0x00 0x4000,
+ 0x00 0x4000 0x00 0x4000,
+ 0x00 0x8000 0x00 0x4000;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 0;
+ };
+
+ cpu@1 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 1;
+ };
+
+ cpu@2 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 2;
+ };
+
+ cpu@3 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 3;
+ };
+ };
+
+ gic: interrupt-controller@ffd0 {
+ compatible = brcm,brahma-b15-gic, arm,cortex-a15-gic;
+ reg = 0x00 0xffd01000 0x00 0x1000,
+ 0x00 0xffd02000 0x00 0x2000,
+ 0x00 0xffd04000 0x00 0x2000,
+ 0x00 0xffd06000 0x00 0x2000;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ };
+
+ timer {
+ compatible = arm,armv7-timer;
+ interrupts = 1 13 0xf08,
+1 14 0xf08,
+1 11 0xf08,
+1 10 0xf08;
+ };
+
+ rdb {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = simple-bus;
+ ranges = 0 0x00 0xf000 0x100;
+
+ serial@406b00 {
+ compatible = ns16550a;
+ reg = 0x406b00 0x20;
+ reg-shift = 2;
+ reg-io-width = 4;
+ interrupts = 0 75 0x4;
+ clock-frequency = 0x4d3f640;
+ };
+
+ sun_top_ctrl: syscon@404000 {
+ compatible = brcm,bcm7445-sun-top-ctrl,
+syscon;
+ reg = 0x404000 0x51c;
+ };
+
+ hif_cpubiuctrl: syscon@3e2400 {
+ compatible = brcm,bcm7445-hif-cpubiuctrl,
+syscon;
+ reg = 0x3e2400 0x5b4;
+ };
+
+ hif_continuation: syscon@452000 {
+ compatible = brcm,bcm7445-hif-continuation,
+syscon;
+ reg = 0x452000 0x100;
+ };
+ };
+
+ smpboot {
+ compatible = brcm,brcmstb-smpboot;
+ syscon-cpu = hif_cpubiuctrl 0x88 0x178;
+ syscon-cont = hif_continuation;
+ };
+
+ reboot {
+ compatible = brcm,brcmstb-reboot;
+ syscon = sun_top_ctrl 0x304 0x308;
+ };
+};
--
1.7.1
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[PATCH v5 8/8] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
arch/arm/boot/dts/bcm7445.dts | 111 +
1 files changed, 111 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm7445.dts
diff --git a/arch/arm/boot/dts/bcm7445.dts b/arch/arm/boot/dts/bcm7445.dts
new file mode 100644
index 000..ffa3305
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445.dts
@@ -0,0 +1,111 @@
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "Broadcom STB (bcm7445)";
+ compatible = "brcm,bcm7445", "brcm,brcmstb";
+ interrupt-parent = <>;
+
+ chosen {};
+
+ memory {
+ device_type = "memory";
+ reg = <0x00 0x 0x00 0x4000>,
+ <0x00 0x4000 0x00 0x4000>,
+ <0x00 0x8000 0x00 0x4000>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <1>;
+ };
+
+ cpu@2 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <2>;
+ };
+
+ cpu@3 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <3>;
+ };
+ };
+
+ gic: interrupt-controller@ffd0 {
+ compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic";
+ reg = <0x00 0xffd01000 0x00 0x1000>,
+ <0x00 0xffd02000 0x00 0x2000>,
+ <0x00 0xffd04000 0x00 0x2000>,
+ <0x00 0xffd06000 0x00 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <1 13 0xf08>,
+<1 14 0xf08>,
+<1 11 0xf08>,
+<1 10 0xf08>;
+ };
+
+ rdb {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges = <0 0x00 0xf000 0x100>;
+
+ serial@406b00 {
+ compatible = "ns16550a";
+ reg = <0x406b00 0x20>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ interrupts = <0 75 0x4>;
+ clock-frequency = <0x4d3f640>;
+ };
+
+ sun_top_ctrl: syscon@404000 {
+ compatible = "brcm,bcm7445-sun-top-ctrl",
+"syscon";
+ reg = <0x404000 0x51c>;
+ };
+
+ hif_cpubiuctrl: syscon@3e2400 {
+ compatible = "brcm,bcm7445-hif-cpubiuctrl",
+"syscon";
+ reg = <0x3e2400 0x5b4>;
+ };
+
+ hif_continuation: syscon@452000 {
+ compatible = "brcm,bcm7445-hif-continuation",
+"syscon";
+ reg = <0x452000 0x100>;
+ };
+ };
+
+ smpboot {
+ compatible = "brcm,brcmstb-smpboot";
+ syscon-cpu = <_cpubiuctrl 0x88 0x178>;
+ syscon-cont = <_continuation>;
+ };
+
+ reboot {
+ compatible = "brcm,brcmstb-reboot";
+ syscon = <_top_ctrl 0x304 0x308>;
+ };
+};
--
1.7.1
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[PATCH v5 2/8] power: reset: Add reboot driver for brcmstb
Add support for reboot functionality on boards with ARM-based
Broadcom STB chipsets.
Signed-off-by: Marc Carino
---
drivers/power/reset/Kconfig | 10 +++
drivers/power/reset/Makefile |1 +
drivers/power/reset/brcmstb-reboot.c | 120 ++
3 files changed, 131 insertions(+), 0 deletions(-)
create mode 100644 drivers/power/reset/brcmstb-reboot.c
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 9b3ea53..31b468b 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -6,6 +6,16 @@ menuconfig POWER_RESET
Say Y here to enable board reset and power off
+config POWER_RESET_BRCMSTB
+ bool "Broadcom STB reset driver"
+ depends on POWER_RESET && ARCH_BRCMSTB
+ help
+ This driver provides restart support for ARM-based Broadcom STB
+ boards.
+
+ Say Y here if you have an ARM-based Broadcom STB board and you wish
+ to have restart support.
+
config POWER_RESET_GPIO
bool "GPIO power-off driver"
depends on OF_GPIO && POWER_RESET
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 3e6ed88..806d056 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
obj-$(CONFIG_POWER_RESET_VEXPRESS) += vexpress-poweroff.o
obj-$(CONFIG_POWER_RESET_XGENE) += xgene-reboot.o
+obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
diff --git a/drivers/power/reset/brcmstb-reboot.c
b/drivers/power/reset/brcmstb-reboot.c
new file mode 100644
index 000..3f23692
--- /dev/null
+++ b/drivers/power/reset/brcmstb-reboot.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#define RESET_SOURCE_ENABLE_REG 1
+#define SW_MASTER_RESET_REG 2
+
+static struct regmap *regmap;
+static u32 rst_src_en;
+static u32 sw_mstr_rst;
+
+static void brcmstb_reboot(enum reboot_mode mode, const char *cmd)
+{
+ int rc;
+ u32 tmp;
+
+ rc = regmap_write(regmap, rst_src_en, 1);
+ if (rc) {
+ pr_err("failed to write rst_src_en (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, rst_src_en, );
+ if (rc) {
+ pr_err("failed to read rst_src_en (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_write(regmap, sw_mstr_rst, 1);
+ if (rc) {
+ pr_err("failed to write sw_mstr_rst (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, sw_mstr_rst, );
+ if (rc) {
+ pr_err("failed to read sw_mstr_rst (%d)\n", rc);
+ return;
+ }
+
+ while (1)
+ ;
+}
+
+static int brcmstb_reboot_probe(struct platform_device *pdev)
+{
+ int rc;
+ struct device_node *np = pdev->dev.of_node;
+
+ regmap = syscon_regmap_lookup_by_phandle(np, "syscon");
+ if (IS_ERR(regmap)) {
+ pr_err("failed to get syscon phandle\n");
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, "syscon", RESET_SOURCE_ENABLE_REG,
+ _src_en);
+ if (rc) {
+ pr_err("can't get rst_src_en offset (%d)\n", rc);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, "syscon", SW_MASTER_RESET_REG,
+ _mstr_rst);
+ if (rc) {
+ pr_err("can't get sw_mstr_rst offset (%d)\n", rc);
+ return -EINVAL;
+ }
+
+ arm_pm_restart = brcmstb_reboot;
+
+ return 0;
+}
+
+static const struct of_device_id of_match[] = {
+ { .compatible = "brcm,brcmstb-reboot", },
+ {},
+};
+
+static struct platform_driver brcmstb_reboot_driver = {
+ .probe = brcmstb_reboot_probe,
+ .driver = {
+ .name = "brcmstb-reboot",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match,
+ },
+};
+
+static int __init brcmstb_reboot_init(void)
+{
+ return platform_driver_probe(_reboot_dr
[PATCH v5 1/8] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
arch/arm/configs/multi_v7_defconfig |1 +
arch/arm/mach-bcm/Kconfig | 14 ++
arch/arm/mach-bcm/Makefile |4 +
arch/arm/mach-bcm/brcmstb.c | 110
arch/arm/mach-bcm/brcmstb.h | 38
arch/arm/mach-bcm/headsmp-brcmstb.S | 34
arch/arm/mach-bcm/hotplug-brcmstb.c | 334 +++
7 files changed, 535 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-bcm/brcmstb.c
create mode 100644 arch/arm/mach-bcm/brcmstb.h
create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S
create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index c1df4e9..7028d11 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -7,6 +7,7 @@ CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BRCMSTB=y
CONFIG_GPIO_PCA953X=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_KEYSTONE=y
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 9fe6d88..2c1ae83 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -31,6 +31,20 @@ config ARCH_BCM_MOBILE
BCM11130, BCM11140, BCM11351, BCM28145 and
BCM28155 variants.
+config ARCH_BRCMSTB
+ bool "Broadcom BCM7XXX based boards" if ARCH_MULTI_V7
+ depends on MMU
+ select ARM_GIC
+ select MIGHT_HAVE_PCI
+ select HAVE_SMP
+ select HAVE_ARM_ARCH_TIMER
+ help
+ Say Y if you intend to run the kernel on a Broadcom ARM-based STB
+ chipset.
+
+ This enables support for Broadcom ARM-based set-top box chipsets,
+ including the 7445 family of chips.
+
endmenu
endif
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index c2ccd5a..b744a12 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -13,3 +13,7 @@
obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o
bcm_kona_smc_asm.o kona.o
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec)
+
+obj-$(CONFIG_ARCH_BRCMSTB) := brcmstb.o
+obj-$(CONFIG_SMP) += headsmp-brcmstb.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug-brcmstb.o
diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
new file mode 100644
index 000..7a6093d
--- /dev/null
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "brcmstb.h"
+
+/***
+ * STB CPU (main application processor)
+ ***/
+
+static const char *brcmstb_match[] __initconst = {
+ "brcm,bcm7445",
+ "brcm,brcmstb",
+ NULL
+};
+
+static void __init brcmstb_init_early(void)
+{
+ add_preferred_console("ttyS", 0, "115200");
+}
+
+/***
+ * SMP boot
+ ***/
+
+#ifdef CONFIG_SMP
+static DEFINE_SPINLOCK(boot_lock);
+
+static void __cpuinit brcmstb_secondary_init(unsigned int cpu)
+{
+ /*
+* Synchronise with the boot thread.
+*/
+ spin_lock(_lock);
+ spin_unlock(_lock);
+}
+
+static int __cpuinit brcmstb_boot_secondary(unsigned int cpu,
+ struct task_struct *idle)
+{
+ /*
+* set synchronisation state between this boot processor
+* and the secondary one
+*/
+ spin_lock(_lock);
+
+ /* Bring up power to the core if necessary */
+ if (brcmstb_cpu_get_power_state(cpu) == 0)
+ brcmstb_cpu_power_on(cpu);
+
+ brcmstb_cpu_boot(cpu);
+
+ /*
+* now the secondary core is starting up let it run its
+* calibrations, then wait for it to finish
+
[PATCH v5 5/8] ARM: brcmstb: add CPU binding for Broadcom Brahma15
Add the Broadcom Brahma B15 CPU to the DT CPU binding list. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/cpus.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 9130435..0cd1e25 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below. "arm,cortex-r4" "arm,cortex-r5" "arm,cortex-r7" + "brcm,brahma-b15" "faraday,fa526" "intel,sa110" "intel,sa1100" -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 6/8] ARM: brcmstb: add misc. DT bindings for brcmstb
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
.../devicetree/bindings/arm/brcm-brcmstb.txt | 95
1 files changed, 95 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
new file mode 100644
index 000..3c436cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -0,0 +1,95 @@
+ARM Broadcom STB platforms Device Tree Bindings
+---
+Boards with Broadcom Brahma15 ARM-based BCM (generally BCM7xxx variants)
+SoC shall have the following DT organization:
+
+Required root node properties:
+- compatible: "brcm,bcm", "brcm,brcmstb"
+
+example:
+/ {
+#address-cells = <2>;
+#size-cells = <2>;
+model = "Broadcom STB (bcm7445)";
+compatible = "brcm,bcm7445", "brcm,brcmstb";
+
+Further, syscon nodes that map platform-specific registers used for general
+system control is required:
+
+- compatible: "brcm,bcm-sun-top-ctrl", "syscon"
+- compatible: "brcm,bcm-hif-cpubiuctrl", "syscon"
+- compatible: "brcm,bcm-hif-continuation", "syscon"
+
+example:
+rdb {
+#address-cells = <1>;
+#size-cells = <1>;
+compatible = "simple-bus";
+ranges = <0 0x00 0xf000 0x100>;
+
+sun_top_ctrl: syscon@404000 {
+compatible = "brcm,bcm7445-sun-top-ctrl", "syscon";
+reg = <0x404000 0x51c>;
+};
+
+hif_cpubiuctrl: syscon@3e2400 {
+compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon";
+reg = <0x3e2400 0x5b4>;
+};
+
+hif_continuation: syscon@452000 {
+compatible = "brcm,bcm7445-hif-continuation", "syscon";
+reg = <0x452000 0x100>;
+};
+};
+
+Lastly, nodes that allow for support of SMP initialization and reboot are
+required:
+
+smpboot
+---
+Required properties:
+
+- compatible
+The string "brcm,brcmstb-smpboot".
+
+- syscon-cpu
+A phandle / integer array property which lets the BSP know the location
+of certain CPU power-on registers.
+
+The layout of the property is as follows:
+o a phandle to the "hif_cpubiuctrl" syscon node
+o offset to the base CPU power zone register
+o offset to the base CPU reset register
+
+- syscon-cont
+A phandle pointing to the syscon node which describes the CPU boot
+continuation registers.
+o a phandle to the "hif_continuation" syscon node
+
+example:
+smpboot {
+compatible = "brcm,brcmstb-smpboot";
+syscon-cpu = <_cpubiuctrl 0x88 0x178>;
+syscon-cont = <_continuation>;
+};
+
+reboot
+---
+Required properties
+
+- compatible
+The string property "brcm,brcmstb-reboot".
+
+- syscon
+A phandle / integer array that points to the syscon node which
describes
+the general system reset registers.
+o a phandle to "sun_top_ctrl"
+o offset to the "reset source enable" register
+o offset to the "software master reset" register
+
+example:
+reboot {
+compatible = "brcm,brcmstb-reboot";
+syscon = <_top_ctrl 0x304 0x308>;
+};
--
1.7.1
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[PATCH v5 3/8] ARM: brcmstb: add debug UART for earlyprintk support
Add the UART definitions needed to support earlyprintk on brcmstb machines. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- arch/arm/Kconfig.debug | 16 +++- 1 files changed, 15 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5765abf..666afd7 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -94,6 +94,17 @@ choice depends on ARCH_BCM2835 select DEBUG_UART_PL01X + config DEBUG_BRCMSTB_UART + bool "Use BRCMSTB UART for low-level debug" + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X @@ -1008,6 +1019,7 @@ config DEBUG_UART_PHYS default 0xd4018000 if DEBUG_MMP_UART3 default 0xe000 if ARCH_SPEAR13XX default 0xfbe0 if ARCH_EBSA110 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \ ARCH_ORION5X @@ -1040,6 +1052,7 @@ config DEBUG_UART_VIRT default 0xf809 if DEBUG_VEXPRESS_UART0_RS1 default 0xfb009000 if DEBUG_REALVIEW_STD_PORT default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xfd00 if ARCH_SPEAR3XX || ARCH_SPEAR6XX default 0xfd00 if ARCH_SPEAR13XX default 0xfd012000 if ARCH_MV78XX0 @@ -1091,7 +1104,8 @@ config DEBUG_UART_8250_WORD default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \ ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ - DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 + DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ + DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool "Enable flow control for 8250 UART" -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 7/8] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/gic.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 3dfb0c0..d7409fd 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -15,6 +15,7 @@ Main node required properties: "arm,cortex-a9-gic" "arm,cortex-a7-gic" "arm,arm11mp-gic" + "brcm,brahma-b15-gic" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a and the value shall be 3. -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 0/8] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. v5: - rebased to v3.13 tag - make UART DT node a child of 'rdb' node - fix ordering of debug UART entries v4: - make a reboot driver and put it in the drivers folder - rework DT bindings to leverage 'syscon' - rework BSP code to use 'syscon' for all register mappings - misc. tweaks per suggestions from v3 v3: - rebased to v3.13-rc8 - switched to using 'multi_v7_defconfig' - eliminated dependence on compile-time peripheral register access - moved DT node iomap out from 'init_early' - misc. minor cleanups from mailing-list discussion for v2 v2: - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B15 v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Marc Carino (8): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs power: reset: Add reboot driver for brcmstb ARM: brcmstb: add debug UART for earlyprintk support ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcmstb ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 95 ++ Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 16 +- arch/arm/boot/dts/bcm7445.dts | 111 +++ arch/arm/configs/multi_v7_defconfig|1 + arch/arm/mach-bcm/Kconfig | 14 + arch/arm/mach-bcm/Makefile |4 + arch/arm/mach-bcm/brcmstb.c| 110 +++ arch/arm/mach-bcm/brcmstb.h| 38 +++ arch/arm/mach-bcm/headsmp-brcmstb.S| 34 ++ arch/arm/mach-bcm/hotplug-brcmstb.c| 334 arch/arm/mm/proc-v7.S | 11 + drivers/power/reset/Kconfig| 10 + drivers/power/reset/Makefile |1 + drivers/power/reset/brcmstb-reboot.c | 120 +++ 16 files changed, 900 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/bcm7445.dts create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c create mode 100644 drivers/power/reset/brcmstb-reboot.c -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 4/8] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index bd17819..98ea423 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 0/8] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. v5: - rebased to v3.13 tag - make UART DT node a child of 'rdb' node - fix ordering of debug UART entries v4: - make a reboot driver and put it in the drivers folder - rework DT bindings to leverage 'syscon' - rework BSP code to use 'syscon' for all register mappings - misc. tweaks per suggestions from v3 v3: - rebased to v3.13-rc8 - switched to using 'multi_v7_defconfig' - eliminated dependence on compile-time peripheral register access - moved DT node iomap out from 'init_early' - misc. minor cleanups from mailing-list discussion for v2 v2: - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B15 v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Marc Carino (8): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs power: reset: Add reboot driver for brcmstb ARM: brcmstb: add debug UART for earlyprintk support ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcmstb ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 95 ++ Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 16 +- arch/arm/boot/dts/bcm7445.dts | 111 +++ arch/arm/configs/multi_v7_defconfig|1 + arch/arm/mach-bcm/Kconfig | 14 + arch/arm/mach-bcm/Makefile |4 + arch/arm/mach-bcm/brcmstb.c| 110 +++ arch/arm/mach-bcm/brcmstb.h| 38 +++ arch/arm/mach-bcm/headsmp-brcmstb.S| 34 ++ arch/arm/mach-bcm/hotplug-brcmstb.c| 334 arch/arm/mm/proc-v7.S | 11 + drivers/power/reset/Kconfig| 10 + drivers/power/reset/Makefile |1 + drivers/power/reset/brcmstb-reboot.c | 120 +++ 16 files changed, 900 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/bcm7445.dts create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c create mode 100644 drivers/power/reset/brcmstb-reboot.c -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 4/8] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index bd17819..98ea423 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 5/8] ARM: brcmstb: add CPU binding for Broadcom Brahma15
Add the Broadcom Brahma B15 CPU to the DT CPU binding list. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- Documentation/devicetree/bindings/arm/cpus.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 9130435..0cd1e25 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below. arm,cortex-r4 arm,cortex-r5 arm,cortex-r7 + brcm,brahma-b15 faraday,fa526 intel,sa110 intel,sa1100 -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 6/8] ARM: brcmstb: add misc. DT bindings for brcmstb
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
.../devicetree/bindings/arm/brcm-brcmstb.txt | 95
1 files changed, 95 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
new file mode 100644
index 000..3c436cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -0,0 +1,95 @@
+ARM Broadcom STB platforms Device Tree Bindings
+---
+Boards with Broadcom Brahma15 ARM-based BCM (generally BCM7xxx variants)
+SoC shall have the following DT organization:
+
+Required root node properties:
+- compatible: brcm,bcmchip_id, brcm,brcmstb
+
+example:
+/ {
+#address-cells = 2;
+#size-cells = 2;
+model = Broadcom STB (bcm7445);
+compatible = brcm,bcm7445, brcm,brcmstb;
+
+Further, syscon nodes that map platform-specific registers used for general
+system control is required:
+
+- compatible: brcm,bcmchip_id-sun-top-ctrl, syscon
+- compatible: brcm,bcmchip_id-hif-cpubiuctrl, syscon
+- compatible: brcm,bcmchip_id-hif-continuation, syscon
+
+example:
+rdb {
+#address-cells = 1;
+#size-cells = 1;
+compatible = simple-bus;
+ranges = 0 0x00 0xf000 0x100;
+
+sun_top_ctrl: syscon@404000 {
+compatible = brcm,bcm7445-sun-top-ctrl, syscon;
+reg = 0x404000 0x51c;
+};
+
+hif_cpubiuctrl: syscon@3e2400 {
+compatible = brcm,bcm7445-hif-cpubiuctrl, syscon;
+reg = 0x3e2400 0x5b4;
+};
+
+hif_continuation: syscon@452000 {
+compatible = brcm,bcm7445-hif-continuation, syscon;
+reg = 0x452000 0x100;
+};
+};
+
+Lastly, nodes that allow for support of SMP initialization and reboot are
+required:
+
+smpboot
+---
+Required properties:
+
+- compatible
+The string brcm,brcmstb-smpboot.
+
+- syscon-cpu
+A phandle / integer array property which lets the BSP know the location
+of certain CPU power-on registers.
+
+The layout of the property is as follows:
+o a phandle to the hif_cpubiuctrl syscon node
+o offset to the base CPU power zone register
+o offset to the base CPU reset register
+
+- syscon-cont
+A phandle pointing to the syscon node which describes the CPU boot
+continuation registers.
+o a phandle to the hif_continuation syscon node
+
+example:
+smpboot {
+compatible = brcm,brcmstb-smpboot;
+syscon-cpu = hif_cpubiuctrl 0x88 0x178;
+syscon-cont = hif_continuation;
+};
+
+reboot
+---
+Required properties
+
+- compatible
+The string property brcm,brcmstb-reboot.
+
+- syscon
+A phandle / integer array that points to the syscon node which
describes
+the general system reset registers.
+o a phandle to sun_top_ctrl
+o offset to the reset source enable register
+o offset to the software master reset register
+
+example:
+reboot {
+compatible = brcm,brcmstb-reboot;
+syscon = sun_top_ctrl 0x304 0x308;
+};
--
1.7.1
--
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More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 3/8] ARM: brcmstb: add debug UART for earlyprintk support
Add the UART definitions needed to support earlyprintk on brcmstb machines. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- arch/arm/Kconfig.debug | 16 +++- 1 files changed, 15 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5765abf..666afd7 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -94,6 +94,17 @@ choice depends on ARCH_BCM2835 select DEBUG_UART_PL01X + config DEBUG_BRCMSTB_UART + bool Use BRCMSTB UART for low-level debug + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool Kernel low-level debugging messages via UART1 depends on ARCH_CLPS711X @@ -1008,6 +1019,7 @@ config DEBUG_UART_PHYS default 0xd4018000 if DEBUG_MMP_UART3 default 0xe000 if ARCH_SPEAR13XX default 0xfbe0 if ARCH_EBSA110 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \ ARCH_ORION5X @@ -1040,6 +1052,7 @@ config DEBUG_UART_VIRT default 0xf809 if DEBUG_VEXPRESS_UART0_RS1 default 0xfb009000 if DEBUG_REALVIEW_STD_PORT default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xfd00 if ARCH_SPEAR3XX || ARCH_SPEAR6XX default 0xfd00 if ARCH_SPEAR13XX default 0xfd012000 if ARCH_MV78XX0 @@ -1091,7 +1104,8 @@ config DEBUG_UART_8250_WORD default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \ ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ - DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 + DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ + DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool Enable flow control for 8250 UART -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 7/8] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- Documentation/devicetree/bindings/arm/gic.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 3dfb0c0..d7409fd 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -15,6 +15,7 @@ Main node required properties: arm,cortex-a9-gic arm,cortex-a7-gic arm,arm11mp-gic + brcm,brahma-b15-gic - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a u32 and the value shall be 3. -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 1/8] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
arch/arm/configs/multi_v7_defconfig |1 +
arch/arm/mach-bcm/Kconfig | 14 ++
arch/arm/mach-bcm/Makefile |4 +
arch/arm/mach-bcm/brcmstb.c | 110
arch/arm/mach-bcm/brcmstb.h | 38
arch/arm/mach-bcm/headsmp-brcmstb.S | 34
arch/arm/mach-bcm/hotplug-brcmstb.c | 334 +++
7 files changed, 535 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-bcm/brcmstb.c
create mode 100644 arch/arm/mach-bcm/brcmstb.h
create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S
create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index c1df4e9..7028d11 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -7,6 +7,7 @@ CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BRCMSTB=y
CONFIG_GPIO_PCA953X=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_KEYSTONE=y
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 9fe6d88..2c1ae83 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -31,6 +31,20 @@ config ARCH_BCM_MOBILE
BCM11130, BCM11140, BCM11351, BCM28145 and
BCM28155 variants.
+config ARCH_BRCMSTB
+ bool Broadcom BCM7XXX based boards if ARCH_MULTI_V7
+ depends on MMU
+ select ARM_GIC
+ select MIGHT_HAVE_PCI
+ select HAVE_SMP
+ select HAVE_ARM_ARCH_TIMER
+ help
+ Say Y if you intend to run the kernel on a Broadcom ARM-based STB
+ chipset.
+
+ This enables support for Broadcom ARM-based set-top box chipsets,
+ including the 7445 family of chips.
+
endmenu
endif
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index c2ccd5a..b744a12 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -13,3 +13,7 @@
obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o
bcm_kona_smc_asm.o kona.o
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec)
+
+obj-$(CONFIG_ARCH_BRCMSTB) := brcmstb.o
+obj-$(CONFIG_SMP) += headsmp-brcmstb.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug-brcmstb.o
diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
new file mode 100644
index 000..7a6093d
--- /dev/null
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk-provider.h
+#include linux/console.h
+#include linux/clocksource.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/errno.h
+#include linux/init.h
+#include linux/io.h
+#include linux/jiffies.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/printk.h
+#include linux/smp.h
+
+#include asm/cacheflush.h
+#include asm/mach-types.h
+#include asm/mach/arch.h
+#include asm/mach/map.h
+#include asm/mach/time.h
+
+#include brcmstb.h
+
+/***
+ * STB CPU (main application processor)
+ ***/
+
+static const char *brcmstb_match[] __initconst = {
+ brcm,bcm7445,
+ brcm,brcmstb,
+ NULL
+};
+
+static void __init brcmstb_init_early(void)
+{
+ add_preferred_console(ttyS, 0, 115200);
+}
+
+/***
+ * SMP boot
+ ***/
+
+#ifdef CONFIG_SMP
+static DEFINE_SPINLOCK(boot_lock);
+
+static void __cpuinit brcmstb_secondary_init(unsigned int cpu)
+{
+ /*
+* Synchronise with the boot thread.
+*/
+ spin_lock(boot_lock);
+ spin_unlock(boot_lock);
+}
+
+static int __cpuinit brcmstb_boot_secondary(unsigned int cpu,
+ struct task_struct *idle)
+{
+ /*
+* set synchronisation state between this boot processor
+* and the secondary one
+*/
+ spin_lock(boot_lock);
+
+ /* Bring up power to the core
[PATCH v5 2/8] power: reset: Add reboot driver for brcmstb
Add support for reboot functionality on boards with ARM-based
Broadcom STB chipsets.
Signed-off-by: Marc Carino marc.cee...@gmail.com
---
drivers/power/reset/Kconfig | 10 +++
drivers/power/reset/Makefile |1 +
drivers/power/reset/brcmstb-reboot.c | 120 ++
3 files changed, 131 insertions(+), 0 deletions(-)
create mode 100644 drivers/power/reset/brcmstb-reboot.c
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 9b3ea53..31b468b 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -6,6 +6,16 @@ menuconfig POWER_RESET
Say Y here to enable board reset and power off
+config POWER_RESET_BRCMSTB
+ bool Broadcom STB reset driver
+ depends on POWER_RESET ARCH_BRCMSTB
+ help
+ This driver provides restart support for ARM-based Broadcom STB
+ boards.
+
+ Say Y here if you have an ARM-based Broadcom STB board and you wish
+ to have restart support.
+
config POWER_RESET_GPIO
bool GPIO power-off driver
depends on OF_GPIO POWER_RESET
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 3e6ed88..806d056 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
obj-$(CONFIG_POWER_RESET_VEXPRESS) += vexpress-poweroff.o
obj-$(CONFIG_POWER_RESET_XGENE) += xgene-reboot.o
+obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
diff --git a/drivers/power/reset/brcmstb-reboot.c
b/drivers/power/reset/brcmstb-reboot.c
new file mode 100644
index 000..3f23692
--- /dev/null
+++ b/drivers/power/reset/brcmstb-reboot.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/device.h
+#include linux/errno.h
+#include linux/init.h
+#include linux/io.h
+#include linux/jiffies.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/printk.h
+#include linux/reboot.h
+#include linux/regmap.h
+#include linux/smp.h
+#include linux/mfd/syscon.h
+
+#include asm/system_misc.h
+
+#define RESET_SOURCE_ENABLE_REG 1
+#define SW_MASTER_RESET_REG 2
+
+static struct regmap *regmap;
+static u32 rst_src_en;
+static u32 sw_mstr_rst;
+
+static void brcmstb_reboot(enum reboot_mode mode, const char *cmd)
+{
+ int rc;
+ u32 tmp;
+
+ rc = regmap_write(regmap, rst_src_en, 1);
+ if (rc) {
+ pr_err(failed to write rst_src_en (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, rst_src_en, tmp);
+ if (rc) {
+ pr_err(failed to read rst_src_en (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_write(regmap, sw_mstr_rst, 1);
+ if (rc) {
+ pr_err(failed to write sw_mstr_rst (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, sw_mstr_rst, tmp);
+ if (rc) {
+ pr_err(failed to read sw_mstr_rst (%d)\n, rc);
+ return;
+ }
+
+ while (1)
+ ;
+}
+
+static int brcmstb_reboot_probe(struct platform_device *pdev)
+{
+ int rc;
+ struct device_node *np = pdev-dev.of_node;
+
+ regmap = syscon_regmap_lookup_by_phandle(np, syscon);
+ if (IS_ERR(regmap)) {
+ pr_err(failed to get syscon phandle\n);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, syscon, RESET_SOURCE_ENABLE_REG,
+ rst_src_en);
+ if (rc) {
+ pr_err(can't get rst_src_en offset (%d)\n, rc);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, syscon, SW_MASTER_RESET_REG,
+ sw_mstr_rst);
+ if (rc) {
+ pr_err(can't get sw_mstr_rst offset (%d)\n, rc);
+ return -EINVAL;
+ }
+
+ arm_pm_restart = brcmstb_reboot;
+
+ return 0;
+}
+
+static const struct of_device_id of_match[] = {
+ { .compatible = brcm,brcmstb-reboot, },
+ {},
+};
+
+static struct platform_driver brcmstb_reboot_driver = {
+ .probe = brcmstb_reboot_probe,
+ .driver = {
+ .name = brcmstb-reboot,
+ .owner = THIS_MODULE,
+ .of_match_table = of_match,
+ },
+};
+
+static int __init brcmstb_reboot_init(void
[PATCH v5 8/8] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
arch/arm/boot/dts/bcm7445.dts | 111 +
1 files changed, 111 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm7445.dts
diff --git a/arch/arm/boot/dts/bcm7445.dts b/arch/arm/boot/dts/bcm7445.dts
new file mode 100644
index 000..ffa3305
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445.dts
@@ -0,0 +1,111 @@
+/dts-v1/;
+/include/ skeleton.dtsi
+
+/ {
+ #address-cells = 2;
+ #size-cells = 2;
+ model = Broadcom STB (bcm7445);
+ compatible = brcm,bcm7445, brcm,brcmstb;
+ interrupt-parent = gic;
+
+ chosen {};
+
+ memory {
+ device_type = memory;
+ reg = 0x00 0x 0x00 0x4000,
+ 0x00 0x4000 0x00 0x4000,
+ 0x00 0x8000 0x00 0x4000;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 0;
+ };
+
+ cpu@1 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 1;
+ };
+
+ cpu@2 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 2;
+ };
+
+ cpu@3 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 3;
+ };
+ };
+
+ gic: interrupt-controller@ffd0 {
+ compatible = brcm,brahma-b15-gic, arm,cortex-a15-gic;
+ reg = 0x00 0xffd01000 0x00 0x1000,
+ 0x00 0xffd02000 0x00 0x2000,
+ 0x00 0xffd04000 0x00 0x2000,
+ 0x00 0xffd06000 0x00 0x2000;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ };
+
+ timer {
+ compatible = arm,armv7-timer;
+ interrupts = 1 13 0xf08,
+1 14 0xf08,
+1 11 0xf08,
+1 10 0xf08;
+ };
+
+ rdb {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = simple-bus;
+ ranges = 0 0x00 0xf000 0x100;
+
+ serial@406b00 {
+ compatible = ns16550a;
+ reg = 0x406b00 0x20;
+ reg-shift = 2;
+ reg-io-width = 4;
+ interrupts = 0 75 0x4;
+ clock-frequency = 0x4d3f640;
+ };
+
+ sun_top_ctrl: syscon@404000 {
+ compatible = brcm,bcm7445-sun-top-ctrl,
+syscon;
+ reg = 0x404000 0x51c;
+ };
+
+ hif_cpubiuctrl: syscon@3e2400 {
+ compatible = brcm,bcm7445-hif-cpubiuctrl,
+syscon;
+ reg = 0x3e2400 0x5b4;
+ };
+
+ hif_continuation: syscon@452000 {
+ compatible = brcm,bcm7445-hif-continuation,
+syscon;
+ reg = 0x452000 0x100;
+ };
+ };
+
+ smpboot {
+ compatible = brcm,brcmstb-smpboot;
+ syscon-cpu = hif_cpubiuctrl 0x88 0x178;
+ syscon-cont = hif_continuation;
+ };
+
+ reboot {
+ compatible = brcm,brcmstb-reboot;
+ syscon = sun_top_ctrl 0x304 0x308;
+ };
+};
--
1.7.1
--
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[PATCH v4 5/8] ARM: brcmstb: add CPU binding for Broadcom Brahma15
Add the Broadcom Brahma B15 CPU to the DT CPU binding list. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/cpus.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 9130435..0cd1e25 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below. "arm,cortex-r4" "arm,cortex-r5" "arm,cortex-r7" + "brcm,brahma-b15" "faraday,fa526" "intel,sa110" "intel,sa1100" -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 6/8] ARM: brcmstb: add misc. DT bindings for brcmstb
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
.../devicetree/bindings/arm/brcm-brcmstb.txt | 95
1 files changed, 95 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
new file mode 100644
index 000..3c436cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -0,0 +1,95 @@
+ARM Broadcom STB platforms Device Tree Bindings
+---
+Boards with Broadcom Brahma15 ARM-based BCM (generally BCM7xxx variants)
+SoC shall have the following DT organization:
+
+Required root node properties:
+- compatible: "brcm,bcm", "brcm,brcmstb"
+
+example:
+/ {
+#address-cells = <2>;
+#size-cells = <2>;
+model = "Broadcom STB (bcm7445)";
+compatible = "brcm,bcm7445", "brcm,brcmstb";
+
+Further, syscon nodes that map platform-specific registers used for general
+system control is required:
+
+- compatible: "brcm,bcm-sun-top-ctrl", "syscon"
+- compatible: "brcm,bcm-hif-cpubiuctrl", "syscon"
+- compatible: "brcm,bcm-hif-continuation", "syscon"
+
+example:
+rdb {
+#address-cells = <1>;
+#size-cells = <1>;
+compatible = "simple-bus";
+ranges = <0 0x00 0xf000 0x100>;
+
+sun_top_ctrl: syscon@404000 {
+compatible = "brcm,bcm7445-sun-top-ctrl", "syscon";
+reg = <0x404000 0x51c>;
+};
+
+hif_cpubiuctrl: syscon@3e2400 {
+compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon";
+reg = <0x3e2400 0x5b4>;
+};
+
+hif_continuation: syscon@452000 {
+compatible = "brcm,bcm7445-hif-continuation", "syscon";
+reg = <0x452000 0x100>;
+};
+};
+
+Lastly, nodes that allow for support of SMP initialization and reboot are
+required:
+
+smpboot
+---
+Required properties:
+
+- compatible
+The string "brcm,brcmstb-smpboot".
+
+- syscon-cpu
+A phandle / integer array property which lets the BSP know the location
+of certain CPU power-on registers.
+
+The layout of the property is as follows:
+o a phandle to the "hif_cpubiuctrl" syscon node
+o offset to the base CPU power zone register
+o offset to the base CPU reset register
+
+- syscon-cont
+A phandle pointing to the syscon node which describes the CPU boot
+continuation registers.
+o a phandle to the "hif_continuation" syscon node
+
+example:
+smpboot {
+compatible = "brcm,brcmstb-smpboot";
+syscon-cpu = <_cpubiuctrl 0x88 0x178>;
+syscon-cont = <_continuation>;
+};
+
+reboot
+---
+Required properties
+
+- compatible
+The string property "brcm,brcmstb-reboot".
+
+- syscon
+A phandle / integer array that points to the syscon node which
describes
+the general system reset registers.
+o a phandle to "sun_top_ctrl"
+o offset to the "reset source enable" register
+o offset to the "software master reset" register
+
+example:
+reboot {
+compatible = "brcm,brcmstb-reboot";
+syscon = <_top_ctrl 0x304 0x308>;
+};
--
1.7.1
--
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[PATCH v4 2/8] power: reset: Add reboot driver for brcmstb
Add support for reboot functionality on boards with ARM-based
Broadcom STB chipsets.
Signed-off-by: Marc Carino
---
drivers/power/reset/Kconfig | 10 +++
drivers/power/reset/Makefile |1 +
drivers/power/reset/brcmstb-reboot.c | 120 ++
3 files changed, 131 insertions(+), 0 deletions(-)
create mode 100644 drivers/power/reset/brcmstb-reboot.c
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 9b3ea53..31b468b 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -6,6 +6,16 @@ menuconfig POWER_RESET
Say Y here to enable board reset and power off
+config POWER_RESET_BRCMSTB
+ bool "Broadcom STB reset driver"
+ depends on POWER_RESET && ARCH_BRCMSTB
+ help
+ This driver provides restart support for ARM-based Broadcom STB
+ boards.
+
+ Say Y here if you have an ARM-based Broadcom STB board and you wish
+ to have restart support.
+
config POWER_RESET_GPIO
bool "GPIO power-off driver"
depends on OF_GPIO && POWER_RESET
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 3e6ed88..806d056 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
obj-$(CONFIG_POWER_RESET_VEXPRESS) += vexpress-poweroff.o
obj-$(CONFIG_POWER_RESET_XGENE) += xgene-reboot.o
+obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
diff --git a/drivers/power/reset/brcmstb-reboot.c
b/drivers/power/reset/brcmstb-reboot.c
new file mode 100644
index 000..3f23692
--- /dev/null
+++ b/drivers/power/reset/brcmstb-reboot.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#define RESET_SOURCE_ENABLE_REG 1
+#define SW_MASTER_RESET_REG 2
+
+static struct regmap *regmap;
+static u32 rst_src_en;
+static u32 sw_mstr_rst;
+
+static void brcmstb_reboot(enum reboot_mode mode, const char *cmd)
+{
+ int rc;
+ u32 tmp;
+
+ rc = regmap_write(regmap, rst_src_en, 1);
+ if (rc) {
+ pr_err("failed to write rst_src_en (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, rst_src_en, );
+ if (rc) {
+ pr_err("failed to read rst_src_en (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_write(regmap, sw_mstr_rst, 1);
+ if (rc) {
+ pr_err("failed to write sw_mstr_rst (%d)\n", rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, sw_mstr_rst, );
+ if (rc) {
+ pr_err("failed to read sw_mstr_rst (%d)\n", rc);
+ return;
+ }
+
+ while (1)
+ ;
+}
+
+static int brcmstb_reboot_probe(struct platform_device *pdev)
+{
+ int rc;
+ struct device_node *np = pdev->dev.of_node;
+
+ regmap = syscon_regmap_lookup_by_phandle(np, "syscon");
+ if (IS_ERR(regmap)) {
+ pr_err("failed to get syscon phandle\n");
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, "syscon", RESET_SOURCE_ENABLE_REG,
+ _src_en);
+ if (rc) {
+ pr_err("can't get rst_src_en offset (%d)\n", rc);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, "syscon", SW_MASTER_RESET_REG,
+ _mstr_rst);
+ if (rc) {
+ pr_err("can't get sw_mstr_rst offset (%d)\n", rc);
+ return -EINVAL;
+ }
+
+ arm_pm_restart = brcmstb_reboot;
+
+ return 0;
+}
+
+static const struct of_device_id of_match[] = {
+ { .compatible = "brcm,brcmstb-reboot", },
+ {},
+};
+
+static struct platform_driver brcmstb_reboot_driver = {
+ .probe = brcmstb_reboot_probe,
+ .driver = {
+ .name = "brcmstb-reboot",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match,
+ },
+};
+
+static int __init brcmstb_reboot_init(void)
+{
+ return platform_driver_probe(_reboot_dr
[PATCH v4 7/8] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/gic.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 3dfb0c0..d7409fd 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -15,6 +15,7 @@ Main node required properties: "arm,cortex-a9-gic" "arm,cortex-a7-gic" "arm,arm11mp-gic" + "brcm,brahma-b15-gic" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a and the value shall be 3. -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 1/8] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
arch/arm/configs/multi_v7_defconfig |1 +
arch/arm/mach-bcm/Kconfig | 14 ++
arch/arm/mach-bcm/Makefile |4 +
arch/arm/mach-bcm/brcmstb.c | 110
arch/arm/mach-bcm/brcmstb.h | 38
arch/arm/mach-bcm/headsmp-brcmstb.S | 34
arch/arm/mach-bcm/hotplug-brcmstb.c | 334 +++
7 files changed, 535 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-bcm/brcmstb.c
create mode 100644 arch/arm/mach-bcm/brcmstb.h
create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S
create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index c1df4e9..7028d11 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -7,6 +7,7 @@ CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BRCMSTB=y
CONFIG_GPIO_PCA953X=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_KEYSTONE=y
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 9fe6d88..2c1ae83 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -31,6 +31,20 @@ config ARCH_BCM_MOBILE
BCM11130, BCM11140, BCM11351, BCM28145 and
BCM28155 variants.
+config ARCH_BRCMSTB
+ bool "Broadcom BCM7XXX based boards" if ARCH_MULTI_V7
+ depends on MMU
+ select ARM_GIC
+ select MIGHT_HAVE_PCI
+ select HAVE_SMP
+ select HAVE_ARM_ARCH_TIMER
+ help
+ Say Y if you intend to run the kernel on a Broadcom ARM-based STB
+ chipset.
+
+ This enables support for Broadcom ARM-based set-top box chipsets,
+ including the 7445 family of chips.
+
endmenu
endif
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index c2ccd5a..b744a12 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -13,3 +13,7 @@
obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o
bcm_kona_smc_asm.o kona.o
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec)
+
+obj-$(CONFIG_ARCH_BRCMSTB) := brcmstb.o
+obj-$(CONFIG_SMP) += headsmp-brcmstb.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug-brcmstb.o
diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
new file mode 100644
index 000..7a6093d
--- /dev/null
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "brcmstb.h"
+
+/***
+ * STB CPU (main application processor)
+ ***/
+
+static const char *brcmstb_match[] __initconst = {
+ "brcm,bcm7445",
+ "brcm,brcmstb",
+ NULL
+};
+
+static void __init brcmstb_init_early(void)
+{
+ add_preferred_console("ttyS", 0, "115200");
+}
+
+/***
+ * SMP boot
+ ***/
+
+#ifdef CONFIG_SMP
+static DEFINE_SPINLOCK(boot_lock);
+
+static void __cpuinit brcmstb_secondary_init(unsigned int cpu)
+{
+ /*
+* Synchronise with the boot thread.
+*/
+ spin_lock(_lock);
+ spin_unlock(_lock);
+}
+
+static int __cpuinit brcmstb_boot_secondary(unsigned int cpu,
+ struct task_struct *idle)
+{
+ /*
+* set synchronisation state between this boot processor
+* and the secondary one
+*/
+ spin_lock(_lock);
+
+ /* Bring up power to the core if necessary */
+ if (brcmstb_cpu_get_power_state(cpu) == 0)
+ brcmstb_cpu_power_on(cpu);
+
+ brcmstb_cpu_boot(cpu);
+
+ /*
+* now the secondary core is starting up let it run its
+* calibrations, then wait for it to finish
+
[PATCH v4 8/8] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
arch/arm/boot/dts/bcm7445.dts | 111 +
1 files changed, 111 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm7445.dts
diff --git a/arch/arm/boot/dts/bcm7445.dts b/arch/arm/boot/dts/bcm7445.dts
new file mode 100644
index 000..6f2d532
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445.dts
@@ -0,0 +1,111 @@
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "Broadcom STB (bcm7445)";
+ compatible = "brcm,bcm7445", "brcm,brcmstb";
+ interrupt-parent = <>;
+
+ chosen {};
+
+ memory {
+ device_type = "memory";
+ reg = <0x00 0x 0x00 0x4000>,
+ <0x00 0x4000 0x00 0x4000>,
+ <0x00 0x8000 0x00 0x4000>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <1>;
+ };
+
+ cpu@2 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <2>;
+ };
+
+ cpu@3 {
+ compatible = "brcm,brahma-b15";
+ device_type = "cpu";
+ reg = <3>;
+ };
+ };
+
+ gic: interrupt-controller@ffd0 {
+ compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic";
+ reg = <0x00 0xffd01000 0x00 0x1000>,
+ <0x00 0xffd02000 0x00 0x2000>,
+ <0x00 0xffd04000 0x00 0x2000>,
+ <0x00 0xffd06000 0x00 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <1 13 0xf08>,
+<1 14 0xf08>,
+<1 11 0xf08>,
+<1 10 0xf08>;
+ };
+
+ serial@f0406b00 {
+ compatible = "ns16550a";
+ reg = <0x00 0xf0406b00 0x00 0x20>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ interrupts = <0 75 0x4>;
+ clock-frequency = <0x4d3f640>;
+ };
+
+ rdb {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges = <0 0x00 0xf000 0x100>;
+
+ sun_top_ctrl: syscon@404000 {
+ compatible = "brcm,bcm7445-sun-top-ctrl",
+"syscon";
+ reg = <0x404000 0x51c>;
+ };
+
+ hif_cpubiuctrl: syscon@3e2400 {
+ compatible = "brcm,bcm7445-hif-cpubiuctrl",
+"syscon";
+ reg = <0x3e2400 0x5b4>;
+ };
+
+ hif_continuation: syscon@452000 {
+ compatible = "brcm,bcm7445-hif-continuation",
+"syscon";
+ reg = <0x452000 0x100>;
+ };
+ };
+
+ smpboot {
+ compatible = "brcm,brcmstb-smpboot";
+ syscon-cpu = <_cpubiuctrl 0x88 0x178>;
+ syscon-cont = <_continuation>;
+ };
+
+ reboot {
+ compatible = "brcm,brcmstb-reboot";
+ syscon = <_top_ctrl 0x304 0x308>;
+ };
+};
--
1.7.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 3/8] ARM: brcmstb: add debug UART for earlyprintk support
Add the UART definitions needed to support earlyprintk on brcmstb machines. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- arch/arm/Kconfig.debug | 16 +++- 1 files changed, 15 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5765abf..266c699 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -94,6 +94,17 @@ choice depends on ARCH_BCM2835 select DEBUG_UART_PL01X + config DEBUG_BRCMSTB_UART + bool "Use BRCMSTB UART for low-level debug" + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X @@ -988,6 +999,7 @@ config DEBUG_UART_PHYS default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0x20201000 if DEBUG_BCM2835 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0x4000e400 if DEBUG_LL_UART_EFM32 default 0x4009 if ARCH_LPC32XX default 0x4010 if DEBUG_PXA_UART1 @@ -1029,6 +1041,7 @@ config DEBUG_UART_VIRT default 0xf0009000 if DEBUG_CNS3XXX default 0xf01fb000 if DEBUG_NOMADIK_UART default 0xf0201000 if DEBUG_BCM2835 + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xf11f1000 if ARCH_VERSATILE default 0xf160 if ARCH_INTEGRATOR default 0xf1c28000 if DEBUG_SUNXI_UART0 @@ -1091,7 +1104,8 @@ config DEBUG_UART_8250_WORD default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \ ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ - DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 + DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ + DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool "Enable flow control for 8250 UART" -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 4/8] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index bd17819..98ea423 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 0/8] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. v4: - make a reboot driver and put it in the drivers folder - rework DT bindings to leverage 'syscon' - rework BSP code to use 'syscon' for all register mappings - misc. tweaks per suggestions from v3 v3: - rebased to v3.13-rc8 - switched to using 'multi_v7_defconfig' - eliminated dependence on compile-time peripheral register access - moved DT node iomap out from 'init_early' - misc. minor cleanups from mailing-list discussion for v2 v2: - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B15 v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Marc Carino (8): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs power: reset: Add reboot driver for brcmstb ARM: brcmstb: add debug UART for earlyprintk support ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcmstb ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 95 ++ Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 16 +- arch/arm/boot/dts/bcm7445.dts | 111 +++ arch/arm/configs/multi_v7_defconfig|1 + arch/arm/mach-bcm/Kconfig | 14 + arch/arm/mach-bcm/Makefile |4 + arch/arm/mach-bcm/brcmstb.c| 110 +++ arch/arm/mach-bcm/brcmstb.h| 38 +++ arch/arm/mach-bcm/headsmp-brcmstb.S| 34 ++ arch/arm/mach-bcm/hotplug-brcmstb.c| 334 arch/arm/mm/proc-v7.S | 11 + drivers/power/reset/Kconfig| 10 + drivers/power/reset/Makefile |1 + drivers/power/reset/brcmstb-reboot.c | 120 +++ 16 files changed, 900 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/bcm7445.dts create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c create mode 100644 drivers/power/reset/brcmstb-reboot.c -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 0/8] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. v4: - make a reboot driver and put it in the drivers folder - rework DT bindings to leverage 'syscon' - rework BSP code to use 'syscon' for all register mappings - misc. tweaks per suggestions from v3 v3: - rebased to v3.13-rc8 - switched to using 'multi_v7_defconfig' - eliminated dependence on compile-time peripheral register access - moved DT node iomap out from 'init_early' - misc. minor cleanups from mailing-list discussion for v2 v2: - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B15 v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Marc Carino (8): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs power: reset: Add reboot driver for brcmstb ARM: brcmstb: add debug UART for earlyprintk support ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcmstb ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 95 ++ Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 16 +- arch/arm/boot/dts/bcm7445.dts | 111 +++ arch/arm/configs/multi_v7_defconfig|1 + arch/arm/mach-bcm/Kconfig | 14 + arch/arm/mach-bcm/Makefile |4 + arch/arm/mach-bcm/brcmstb.c| 110 +++ arch/arm/mach-bcm/brcmstb.h| 38 +++ arch/arm/mach-bcm/headsmp-brcmstb.S| 34 ++ arch/arm/mach-bcm/hotplug-brcmstb.c| 334 arch/arm/mm/proc-v7.S | 11 + drivers/power/reset/Kconfig| 10 + drivers/power/reset/Makefile |1 + drivers/power/reset/brcmstb-reboot.c | 120 +++ 16 files changed, 900 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/bcm7445.dts create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c create mode 100644 drivers/power/reset/brcmstb-reboot.c -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 4/8] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index bd17819..98ea423 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 3/8] ARM: brcmstb: add debug UART for earlyprintk support
Add the UART definitions needed to support earlyprintk on brcmstb machines. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- arch/arm/Kconfig.debug | 16 +++- 1 files changed, 15 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5765abf..266c699 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -94,6 +94,17 @@ choice depends on ARCH_BCM2835 select DEBUG_UART_PL01X + config DEBUG_BRCMSTB_UART + bool Use BRCMSTB UART for low-level debug + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool Kernel low-level debugging messages via UART1 depends on ARCH_CLPS711X @@ -988,6 +999,7 @@ config DEBUG_UART_PHYS default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0x20201000 if DEBUG_BCM2835 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0x4000e400 if DEBUG_LL_UART_EFM32 default 0x4009 if ARCH_LPC32XX default 0x4010 if DEBUG_PXA_UART1 @@ -1029,6 +1041,7 @@ config DEBUG_UART_VIRT default 0xf0009000 if DEBUG_CNS3XXX default 0xf01fb000 if DEBUG_NOMADIK_UART default 0xf0201000 if DEBUG_BCM2835 + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xf11f1000 if ARCH_VERSATILE default 0xf160 if ARCH_INTEGRATOR default 0xf1c28000 if DEBUG_SUNXI_UART0 @@ -1091,7 +1104,8 @@ config DEBUG_UART_8250_WORD default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \ ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ - DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 + DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ + DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool Enable flow control for 8250 UART -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 8/8] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
arch/arm/boot/dts/bcm7445.dts | 111 +
1 files changed, 111 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm7445.dts
diff --git a/arch/arm/boot/dts/bcm7445.dts b/arch/arm/boot/dts/bcm7445.dts
new file mode 100644
index 000..6f2d532
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445.dts
@@ -0,0 +1,111 @@
+/dts-v1/;
+/include/ skeleton.dtsi
+
+/ {
+ #address-cells = 2;
+ #size-cells = 2;
+ model = Broadcom STB (bcm7445);
+ compatible = brcm,bcm7445, brcm,brcmstb;
+ interrupt-parent = gic;
+
+ chosen {};
+
+ memory {
+ device_type = memory;
+ reg = 0x00 0x 0x00 0x4000,
+ 0x00 0x4000 0x00 0x4000,
+ 0x00 0x8000 0x00 0x4000;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 0;
+ };
+
+ cpu@1 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 1;
+ };
+
+ cpu@2 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 2;
+ };
+
+ cpu@3 {
+ compatible = brcm,brahma-b15;
+ device_type = cpu;
+ reg = 3;
+ };
+ };
+
+ gic: interrupt-controller@ffd0 {
+ compatible = brcm,brahma-b15-gic, arm,cortex-a15-gic;
+ reg = 0x00 0xffd01000 0x00 0x1000,
+ 0x00 0xffd02000 0x00 0x2000,
+ 0x00 0xffd04000 0x00 0x2000,
+ 0x00 0xffd06000 0x00 0x2000;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ };
+
+ timer {
+ compatible = arm,armv7-timer;
+ interrupts = 1 13 0xf08,
+1 14 0xf08,
+1 11 0xf08,
+1 10 0xf08;
+ };
+
+ serial@f0406b00 {
+ compatible = ns16550a;
+ reg = 0x00 0xf0406b00 0x00 0x20;
+ reg-shift = 2;
+ reg-io-width = 4;
+ interrupts = 0 75 0x4;
+ clock-frequency = 0x4d3f640;
+ };
+
+ rdb {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = simple-bus;
+ ranges = 0 0x00 0xf000 0x100;
+
+ sun_top_ctrl: syscon@404000 {
+ compatible = brcm,bcm7445-sun-top-ctrl,
+syscon;
+ reg = 0x404000 0x51c;
+ };
+
+ hif_cpubiuctrl: syscon@3e2400 {
+ compatible = brcm,bcm7445-hif-cpubiuctrl,
+syscon;
+ reg = 0x3e2400 0x5b4;
+ };
+
+ hif_continuation: syscon@452000 {
+ compatible = brcm,bcm7445-hif-continuation,
+syscon;
+ reg = 0x452000 0x100;
+ };
+ };
+
+ smpboot {
+ compatible = brcm,brcmstb-smpboot;
+ syscon-cpu = hif_cpubiuctrl 0x88 0x178;
+ syscon-cont = hif_continuation;
+ };
+
+ reboot {
+ compatible = brcm,brcmstb-reboot;
+ syscon = sun_top_ctrl 0x304 0x308;
+ };
+};
--
1.7.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 7/8] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- Documentation/devicetree/bindings/arm/gic.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 3dfb0c0..d7409fd 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -15,6 +15,7 @@ Main node required properties: arm,cortex-a9-gic arm,cortex-a7-gic arm,arm11mp-gic + brcm,brahma-b15-gic - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a u32 and the value shall be 3. -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 1/8] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
arch/arm/configs/multi_v7_defconfig |1 +
arch/arm/mach-bcm/Kconfig | 14 ++
arch/arm/mach-bcm/Makefile |4 +
arch/arm/mach-bcm/brcmstb.c | 110
arch/arm/mach-bcm/brcmstb.h | 38
arch/arm/mach-bcm/headsmp-brcmstb.S | 34
arch/arm/mach-bcm/hotplug-brcmstb.c | 334 +++
7 files changed, 535 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-bcm/brcmstb.c
create mode 100644 arch/arm/mach-bcm/brcmstb.h
create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S
create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index c1df4e9..7028d11 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -7,6 +7,7 @@ CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BRCMSTB=y
CONFIG_GPIO_PCA953X=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_KEYSTONE=y
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 9fe6d88..2c1ae83 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -31,6 +31,20 @@ config ARCH_BCM_MOBILE
BCM11130, BCM11140, BCM11351, BCM28145 and
BCM28155 variants.
+config ARCH_BRCMSTB
+ bool Broadcom BCM7XXX based boards if ARCH_MULTI_V7
+ depends on MMU
+ select ARM_GIC
+ select MIGHT_HAVE_PCI
+ select HAVE_SMP
+ select HAVE_ARM_ARCH_TIMER
+ help
+ Say Y if you intend to run the kernel on a Broadcom ARM-based STB
+ chipset.
+
+ This enables support for Broadcom ARM-based set-top box chipsets,
+ including the 7445 family of chips.
+
endmenu
endif
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index c2ccd5a..b744a12 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -13,3 +13,7 @@
obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o
bcm_kona_smc_asm.o kona.o
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec)
+
+obj-$(CONFIG_ARCH_BRCMSTB) := brcmstb.o
+obj-$(CONFIG_SMP) += headsmp-brcmstb.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug-brcmstb.o
diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
new file mode 100644
index 000..7a6093d
--- /dev/null
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk-provider.h
+#include linux/console.h
+#include linux/clocksource.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/errno.h
+#include linux/init.h
+#include linux/io.h
+#include linux/jiffies.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/printk.h
+#include linux/smp.h
+
+#include asm/cacheflush.h
+#include asm/mach-types.h
+#include asm/mach/arch.h
+#include asm/mach/map.h
+#include asm/mach/time.h
+
+#include brcmstb.h
+
+/***
+ * STB CPU (main application processor)
+ ***/
+
+static const char *brcmstb_match[] __initconst = {
+ brcm,bcm7445,
+ brcm,brcmstb,
+ NULL
+};
+
+static void __init brcmstb_init_early(void)
+{
+ add_preferred_console(ttyS, 0, 115200);
+}
+
+/***
+ * SMP boot
+ ***/
+
+#ifdef CONFIG_SMP
+static DEFINE_SPINLOCK(boot_lock);
+
+static void __cpuinit brcmstb_secondary_init(unsigned int cpu)
+{
+ /*
+* Synchronise with the boot thread.
+*/
+ spin_lock(boot_lock);
+ spin_unlock(boot_lock);
+}
+
+static int __cpuinit brcmstb_boot_secondary(unsigned int cpu,
+ struct task_struct *idle)
+{
+ /*
+* set synchronisation state between this boot processor
+* and the secondary one
+*/
+ spin_lock(boot_lock);
+
+ /* Bring up power to the core
[PATCH v4 6/8] ARM: brcmstb: add misc. DT bindings for brcmstb
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
.../devicetree/bindings/arm/brcm-brcmstb.txt | 95
1 files changed, 95 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
new file mode 100644
index 000..3c436cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -0,0 +1,95 @@
+ARM Broadcom STB platforms Device Tree Bindings
+---
+Boards with Broadcom Brahma15 ARM-based BCM (generally BCM7xxx variants)
+SoC shall have the following DT organization:
+
+Required root node properties:
+- compatible: brcm,bcmchip_id, brcm,brcmstb
+
+example:
+/ {
+#address-cells = 2;
+#size-cells = 2;
+model = Broadcom STB (bcm7445);
+compatible = brcm,bcm7445, brcm,brcmstb;
+
+Further, syscon nodes that map platform-specific registers used for general
+system control is required:
+
+- compatible: brcm,bcmchip_id-sun-top-ctrl, syscon
+- compatible: brcm,bcmchip_id-hif-cpubiuctrl, syscon
+- compatible: brcm,bcmchip_id-hif-continuation, syscon
+
+example:
+rdb {
+#address-cells = 1;
+#size-cells = 1;
+compatible = simple-bus;
+ranges = 0 0x00 0xf000 0x100;
+
+sun_top_ctrl: syscon@404000 {
+compatible = brcm,bcm7445-sun-top-ctrl, syscon;
+reg = 0x404000 0x51c;
+};
+
+hif_cpubiuctrl: syscon@3e2400 {
+compatible = brcm,bcm7445-hif-cpubiuctrl, syscon;
+reg = 0x3e2400 0x5b4;
+};
+
+hif_continuation: syscon@452000 {
+compatible = brcm,bcm7445-hif-continuation, syscon;
+reg = 0x452000 0x100;
+};
+};
+
+Lastly, nodes that allow for support of SMP initialization and reboot are
+required:
+
+smpboot
+---
+Required properties:
+
+- compatible
+The string brcm,brcmstb-smpboot.
+
+- syscon-cpu
+A phandle / integer array property which lets the BSP know the location
+of certain CPU power-on registers.
+
+The layout of the property is as follows:
+o a phandle to the hif_cpubiuctrl syscon node
+o offset to the base CPU power zone register
+o offset to the base CPU reset register
+
+- syscon-cont
+A phandle pointing to the syscon node which describes the CPU boot
+continuation registers.
+o a phandle to the hif_continuation syscon node
+
+example:
+smpboot {
+compatible = brcm,brcmstb-smpboot;
+syscon-cpu = hif_cpubiuctrl 0x88 0x178;
+syscon-cont = hif_continuation;
+};
+
+reboot
+---
+Required properties
+
+- compatible
+The string property brcm,brcmstb-reboot.
+
+- syscon
+A phandle / integer array that points to the syscon node which
describes
+the general system reset registers.
+o a phandle to sun_top_ctrl
+o offset to the reset source enable register
+o offset to the software master reset register
+
+example:
+reboot {
+compatible = brcm,brcmstb-reboot;
+syscon = sun_top_ctrl 0x304 0x308;
+};
--
1.7.1
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[PATCH v4 2/8] power: reset: Add reboot driver for brcmstb
Add support for reboot functionality on boards with ARM-based
Broadcom STB chipsets.
Signed-off-by: Marc Carino marc.cee...@gmail.com
---
drivers/power/reset/Kconfig | 10 +++
drivers/power/reset/Makefile |1 +
drivers/power/reset/brcmstb-reboot.c | 120 ++
3 files changed, 131 insertions(+), 0 deletions(-)
create mode 100644 drivers/power/reset/brcmstb-reboot.c
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 9b3ea53..31b468b 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -6,6 +6,16 @@ menuconfig POWER_RESET
Say Y here to enable board reset and power off
+config POWER_RESET_BRCMSTB
+ bool Broadcom STB reset driver
+ depends on POWER_RESET ARCH_BRCMSTB
+ help
+ This driver provides restart support for ARM-based Broadcom STB
+ boards.
+
+ Say Y here if you have an ARM-based Broadcom STB board and you wish
+ to have restart support.
+
config POWER_RESET_GPIO
bool GPIO power-off driver
depends on OF_GPIO POWER_RESET
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 3e6ed88..806d056 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
obj-$(CONFIG_POWER_RESET_VEXPRESS) += vexpress-poweroff.o
obj-$(CONFIG_POWER_RESET_XGENE) += xgene-reboot.o
+obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
diff --git a/drivers/power/reset/brcmstb-reboot.c
b/drivers/power/reset/brcmstb-reboot.c
new file mode 100644
index 000..3f23692
--- /dev/null
+++ b/drivers/power/reset/brcmstb-reboot.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/device.h
+#include linux/errno.h
+#include linux/init.h
+#include linux/io.h
+#include linux/jiffies.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/printk.h
+#include linux/reboot.h
+#include linux/regmap.h
+#include linux/smp.h
+#include linux/mfd/syscon.h
+
+#include asm/system_misc.h
+
+#define RESET_SOURCE_ENABLE_REG 1
+#define SW_MASTER_RESET_REG 2
+
+static struct regmap *regmap;
+static u32 rst_src_en;
+static u32 sw_mstr_rst;
+
+static void brcmstb_reboot(enum reboot_mode mode, const char *cmd)
+{
+ int rc;
+ u32 tmp;
+
+ rc = regmap_write(regmap, rst_src_en, 1);
+ if (rc) {
+ pr_err(failed to write rst_src_en (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, rst_src_en, tmp);
+ if (rc) {
+ pr_err(failed to read rst_src_en (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_write(regmap, sw_mstr_rst, 1);
+ if (rc) {
+ pr_err(failed to write sw_mstr_rst (%d)\n, rc);
+ return;
+ }
+
+ rc = regmap_read(regmap, sw_mstr_rst, tmp);
+ if (rc) {
+ pr_err(failed to read sw_mstr_rst (%d)\n, rc);
+ return;
+ }
+
+ while (1)
+ ;
+}
+
+static int brcmstb_reboot_probe(struct platform_device *pdev)
+{
+ int rc;
+ struct device_node *np = pdev-dev.of_node;
+
+ regmap = syscon_regmap_lookup_by_phandle(np, syscon);
+ if (IS_ERR(regmap)) {
+ pr_err(failed to get syscon phandle\n);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, syscon, RESET_SOURCE_ENABLE_REG,
+ rst_src_en);
+ if (rc) {
+ pr_err(can't get rst_src_en offset (%d)\n, rc);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(np, syscon, SW_MASTER_RESET_REG,
+ sw_mstr_rst);
+ if (rc) {
+ pr_err(can't get sw_mstr_rst offset (%d)\n, rc);
+ return -EINVAL;
+ }
+
+ arm_pm_restart = brcmstb_reboot;
+
+ return 0;
+}
+
+static const struct of_device_id of_match[] = {
+ { .compatible = brcm,brcmstb-reboot, },
+ {},
+};
+
+static struct platform_driver brcmstb_reboot_driver = {
+ .probe = brcmstb_reboot_probe,
+ .driver = {
+ .name = brcmstb-reboot,
+ .owner = THIS_MODULE,
+ .of_match_table = of_match,
+ },
+};
+
+static int __init brcmstb_reboot_init(void
[PATCH v4 5/8] ARM: brcmstb: add CPU binding for Broadcom Brahma15
Add the Broadcom Brahma B15 CPU to the DT CPU binding list. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- Documentation/devicetree/bindings/arm/cpus.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 9130435..0cd1e25 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below. arm,cortex-r4 arm,cortex-r5 arm,cortex-r7 + brcm,brahma-b15 faraday,fa526 intel,sa110 intel,sa1100 -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 6/7] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/gic.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 3dfb0c0..b7d7970 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -15,6 +15,7 @@ Main node required properties: "arm,cortex-a9-gic" "arm,cortex-a7-gic" "arm,arm11mp-gic" + "brcm,brahma15-gic" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a and the value shall be 3. -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 7/7] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
arch/arm/boot/dts/brcmstb-7445.dts | 104
1 files changed, 104 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/brcmstb-7445.dts
diff --git a/arch/arm/boot/dts/brcmstb-7445.dts
b/arch/arm/boot/dts/brcmstb-7445.dts
new file mode 100644
index 000..cbe73b4
--- /dev/null
+++ b/arch/arm/boot/dts/brcmstb-7445.dts
@@ -0,0 +1,104 @@
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ model = "Broadcom STB (7445)";
+ compatible = "brcm,brcmstb-7445";
+ interrupt-parent = <>;
+
+ chosen {};
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x4000 0x4000 0x4000 0x8000
0x4000>;
+ };
+
+ cpupll: cpupll@0 {
+ #clock-cells = <0x0>;
+ compatible = "fixed-clock";
+ clock-frequency = <15>;
+ };
+
+ cpuclk: cpu-clk-div@0 {
+ #clock-cells = <0x0>;
+ compatible = "brcm,brcmstb-cpu-clk-div";
+ reg = <0xf03e257c 0x4>;
+ clocks = <>;
+ div-table = <0x0 0x1 0x11 0x2 0x12 0x4 0x13 0x8 0x14 0x10>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,brahma15";
+ operating-points = <0x16e360 0x0
+ 0x0b71b0 0x0
+ 0x05b8d8 0x0
+ 0x02dc6c 0x0
+ 0x016e36 0x0>;
+ clocks = <>;
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <15>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,brahma15";
+ device_type = "cpu";
+ reg = <1>;
+ clock-frequency = <15>;
+ };
+
+ cpu@2 {
+ compatible = "brcm,brahma15";
+ device_type = "cpu";
+ reg = <2>;
+ clock-frequency = <15>;
+ };
+
+ cpu@3 {
+ compatible = "brcm,brahma15";
+ device_type = "cpu";
+ reg = <3>;
+ clock-frequency = <15>;
+ };
+ };
+
+ gic: interrupt-controller@ffd0 {
+ compatible = "brcm,brahma15-gic", "arm,cortex-a15-gic";
+ reg = <0xffd01000 0x1000
+ 0xffd02000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <0x3>;
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <1 13 0xf08
+ 1 14 0xf08
+ 1 11 0xf08
+ 1 10 0xf08>;
+ };
+
+ serial@f0406b00 {
+ compatible = "ns16550a";
+ reg = <0xf0406b00 0x20>;
+ reg-shift = <0x2>;
+ reg-io-width = <0x4>;
+ interrupts = <0x0 0x4b 0x4>;
+ clock-frequency = <0x4d3f640>;
+ };
+
+ gen-ctrl {
+ compatible = "brcm,brcmstb-gen-ctrl-v1";
+ reg = <0xf0404304 0x4
+ 0xf0404308 0x4
+ 0xf03e2578 0x4
+ 0xf03e2488 0x10
+ 0xf0452000 0x20>;
+ };
+};
--
1.7.1
--
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[PATCH v3 4/7] ARM: brcmstb: add CPU binding for Broadcom Brahma15
Add the Broadcom Brahma B15 CPU to the DT CPU binding list. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/cpus.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 9130435..423b879 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below. "arm,cortex-r4" "arm,cortex-r5" "arm,cortex-r7" + "brcm,brahma15" "faraday,fa526" "intel,sa110" "intel,sa1100" -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 5/7] ARM: brcmstb: add misc. DT bindings for brcm,brcmstb-*
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
.../devicetree/bindings/arm/brcm-brcmstb.txt | 43
1 files changed, 43 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
new file mode 100644
index 000..5f1aba7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -0,0 +1,43 @@
+Broadcom STB platforms Device Tree Bindings
+---
+Boards with Broadcom Brahma15 ARM-based BCM7xxx SoC shall have the following
+properties.
+
+Required root node properties:
+
+- compatible = "brcm,brcmstb-";
+
+Further, a node with the following compatible string shall be defined:
+
+- compatible: "brcm,brcmstb-gen-ctrl-v1"
+
+brcmstb-gen-ctrl
+
+This node describes the registers needed for reset and CPU power control.
+
+- compatible: "brcm,brcmstb-gen-ctrl-v1"
+- properties:
+o reg = ;
+
+example:
+/ {
+model = "Broadcom STB";
+compatible = "brcm,brcmstb-7445";
+
+/* snip */
+
+gen-ctrl {
+compatible = "brcm,brcmstb-gen-ctrl-v1";
+reg = <0xf0404304 0x4
+ 0xf0404308 0x4
+ 0xf03e2578 0x4
+ 0xf03e2488 0x10
+ 0xf0452000 0x20>;
+};
+
+/* snip */
+};
--
1.7.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 2/7] ARM: brcmstb: add debug UART for earlyprintk support
Add the UART definitions needed to support earlyprintk on brcmstb machines. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- arch/arm/Kconfig.debug | 16 +++- 1 files changed, 15 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5765abf..266c699 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -94,6 +94,17 @@ choice depends on ARCH_BCM2835 select DEBUG_UART_PL01X + config DEBUG_BRCMSTB_UART + bool "Use BRCMSTB UART for low-level debug" + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X @@ -988,6 +999,7 @@ config DEBUG_UART_PHYS default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0x20201000 if DEBUG_BCM2835 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0x4000e400 if DEBUG_LL_UART_EFM32 default 0x4009 if ARCH_LPC32XX default 0x4010 if DEBUG_PXA_UART1 @@ -1029,6 +1041,7 @@ config DEBUG_UART_VIRT default 0xf0009000 if DEBUG_CNS3XXX default 0xf01fb000 if DEBUG_NOMADIK_UART default 0xf0201000 if DEBUG_BCM2835 + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xf11f1000 if ARCH_VERSATILE default 0xf160 if ARCH_INTEGRATOR default 0xf1c28000 if DEBUG_SUNXI_UART0 @@ -1091,7 +1104,8 @@ config DEBUG_UART_8250_WORD default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \ ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ - DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 + DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ + DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool "Enable flow control for 8250 UART" -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 3/7] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index bd17819..98ea423 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 1/7] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
arch/arm/configs/multi_v7_defconfig |1 +
arch/arm/mach-bcm/Kconfig | 14 ++
arch/arm/mach-bcm/Makefile |4 +
arch/arm/mach-bcm/brcmstb.c | 146
arch/arm/mach-bcm/brcmstb.h | 46 +++
arch/arm/mach-bcm/headsmp-brcmstb.S | 34 +
arch/arm/mach-bcm/hotplug-brcmstb.c | 252 +++
7 files changed, 497 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-bcm/brcmstb.c
create mode 100644 arch/arm/mach-bcm/brcmstb.h
create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S
create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index c1df4e9..7028d11 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -7,6 +7,7 @@ CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BRCMSTB=y
CONFIG_GPIO_PCA953X=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_KEYSTONE=y
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 9fe6d88..2c1ae83 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -31,6 +31,20 @@ config ARCH_BCM_MOBILE
BCM11130, BCM11140, BCM11351, BCM28145 and
BCM28155 variants.
+config ARCH_BRCMSTB
+ bool "Broadcom BCM7XXX based boards" if ARCH_MULTI_V7
+ depends on MMU
+ select ARM_GIC
+ select MIGHT_HAVE_PCI
+ select HAVE_SMP
+ select HAVE_ARM_ARCH_TIMER
+ help
+ Say Y if you intend to run the kernel on a Broadcom ARM-based STB
+ chipset.
+
+ This enables support for Broadcom ARM-based set-top box chipsets,
+ including the 7445 family of chips.
+
endmenu
endif
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index c2ccd5a..b744a12 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -13,3 +13,7 @@
obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o
bcm_kona_smc_asm.o kona.o
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec)
+
+obj-$(CONFIG_ARCH_BRCMSTB) := brcmstb.o
+obj-$(CONFIG_SMP) += headsmp-brcmstb.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug-brcmstb.o
diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
new file mode 100644
index 000..eb9de26
--- /dev/null
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "brcmstb.h"
+
+/***
+ * STB CPU (main application processor)
+ ***/
+
+static const char *brcmstb_match[] __initconst = {
+ "brcm,brcmstb-7445",
+ NULL
+};
+
+static void brcmstb_restart(enum reboot_mode mode, const char *cmd)
+{
+ struct device_node *np;
+ char *name;
+ void __iomem *rst_src_en;
+ void __iomem *sw_mstr_rst;
+
+ name = "brcm,brcmstb-gen-ctrl-v1";
+ np = of_find_compatible_node(NULL, NULL, name);
+ if (!np) {
+ pr_err("cannot find node %s\n", name);
+ return;
+ }
+
+ rst_src_en = of_iomap(np, GEN_CTRL_V1_RST_SRC_EN);
+ if (!rst_src_en) {
+ pr_err("can't iomap rst_src_en\n");
+ return;
+ }
+
+ sw_mstr_rst = of_iomap(np, GEN_CTRL_V1_SW_MSTR_RST);
+ if (!sw_mstr_rst) {
+ pr_err("can't iomap sw_mstr_rst\n");
+ return;
+ }
+
+ writel_relaxed(1, rst_src_en);
+ readl_relaxed(rst_src_en);
+
+ writel_relaxed(1, sw_mstr_rst);
+ readl_relaxed(sw_mstr_rst);
+
+ while (1)
+ ;
+}
+
+static void __init brcmstb_init_early(void)
+{
+ add_preferred_console("ttyS", 0, "115200
[PATCH v3 0/7] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. v3: - rebased to v3.13-rc8 - switched to using 'multi_v7_defconfig' - eliminated dependence on compile-time peripheral register access - moved DT node iomap out from 'init_early' - misc. minor cleanups from mailing-list discussion for v2 v2: - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B15 v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Marc Carino (7): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs ARM: brcmstb: add debug UART for earlyprintk support ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcm,brcmstb-* ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 43 Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 16 ++- arch/arm/boot/dts/brcmstb-7445.dts | 104 arch/arm/configs/multi_v7_defconfig|1 + arch/arm/mach-bcm/Kconfig | 14 + arch/arm/mach-bcm/Makefile |4 + arch/arm/mach-bcm/brcmstb.c| 146 +++ arch/arm/mach-bcm/brcmstb.h| 46 arch/arm/mach-bcm/headsmp-brcmstb.S| 34 +++ arch/arm/mach-bcm/hotplug-brcmstb.c| 252 arch/arm/mm/proc-v7.S | 11 + 13 files changed, 672 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/brcmstb-7445.dts create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 0/7] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. v3: - rebased to v3.13-rc8 - switched to using 'multi_v7_defconfig' - eliminated dependence on compile-time peripheral register access - moved DT node iomap out from 'init_early' - misc. minor cleanups from mailing-list discussion for v2 v2: - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B15 v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Marc Carino (7): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs ARM: brcmstb: add debug UART for earlyprintk support ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcm,brcmstb-* ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 43 Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 16 ++- arch/arm/boot/dts/brcmstb-7445.dts | 104 arch/arm/configs/multi_v7_defconfig|1 + arch/arm/mach-bcm/Kconfig | 14 + arch/arm/mach-bcm/Makefile |4 + arch/arm/mach-bcm/brcmstb.c| 146 +++ arch/arm/mach-bcm/brcmstb.h| 46 arch/arm/mach-bcm/headsmp-brcmstb.S| 34 +++ arch/arm/mach-bcm/hotplug-brcmstb.c| 252 arch/arm/mm/proc-v7.S | 11 + 13 files changed, 672 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/brcmstb-7445.dts create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 1/7] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
arch/arm/configs/multi_v7_defconfig |1 +
arch/arm/mach-bcm/Kconfig | 14 ++
arch/arm/mach-bcm/Makefile |4 +
arch/arm/mach-bcm/brcmstb.c | 146
arch/arm/mach-bcm/brcmstb.h | 46 +++
arch/arm/mach-bcm/headsmp-brcmstb.S | 34 +
arch/arm/mach-bcm/hotplug-brcmstb.c | 252 +++
7 files changed, 497 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-bcm/brcmstb.c
create mode 100644 arch/arm/mach-bcm/brcmstb.h
create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S
create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index c1df4e9..7028d11 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -7,6 +7,7 @@ CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BRCMSTB=y
CONFIG_GPIO_PCA953X=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_KEYSTONE=y
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 9fe6d88..2c1ae83 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -31,6 +31,20 @@ config ARCH_BCM_MOBILE
BCM11130, BCM11140, BCM11351, BCM28145 and
BCM28155 variants.
+config ARCH_BRCMSTB
+ bool Broadcom BCM7XXX based boards if ARCH_MULTI_V7
+ depends on MMU
+ select ARM_GIC
+ select MIGHT_HAVE_PCI
+ select HAVE_SMP
+ select HAVE_ARM_ARCH_TIMER
+ help
+ Say Y if you intend to run the kernel on a Broadcom ARM-based STB
+ chipset.
+
+ This enables support for Broadcom ARM-based set-top box chipsets,
+ including the 7445 family of chips.
+
endmenu
endif
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index c2ccd5a..b744a12 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -13,3 +13,7 @@
obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o
bcm_kona_smc_asm.o kona.o
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec)
+
+obj-$(CONFIG_ARCH_BRCMSTB) := brcmstb.o
+obj-$(CONFIG_SMP) += headsmp-brcmstb.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug-brcmstb.o
diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
new file mode 100644
index 000..eb9de26
--- /dev/null
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk-provider.h
+#include linux/console.h
+#include linux/clocksource.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/errno.h
+#include linux/init.h
+#include linux/io.h
+#include linux/jiffies.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/printk.h
+#include linux/smp.h
+
+#include asm/cacheflush.h
+#include asm/mach-types.h
+#include asm/mach/arch.h
+#include asm/mach/map.h
+#include asm/mach/time.h
+
+#include brcmstb.h
+
+/***
+ * STB CPU (main application processor)
+ ***/
+
+static const char *brcmstb_match[] __initconst = {
+ brcm,brcmstb-7445,
+ NULL
+};
+
+static void brcmstb_restart(enum reboot_mode mode, const char *cmd)
+{
+ struct device_node *np;
+ char *name;
+ void __iomem *rst_src_en;
+ void __iomem *sw_mstr_rst;
+
+ name = brcm,brcmstb-gen-ctrl-v1;
+ np = of_find_compatible_node(NULL, NULL, name);
+ if (!np) {
+ pr_err(cannot find node %s\n, name);
+ return;
+ }
+
+ rst_src_en = of_iomap(np, GEN_CTRL_V1_RST_SRC_EN);
+ if (!rst_src_en) {
+ pr_err(can't iomap rst_src_en\n);
+ return;
+ }
+
+ sw_mstr_rst = of_iomap(np, GEN_CTRL_V1_SW_MSTR_RST);
+ if (!sw_mstr_rst) {
+ pr_err(can't iomap sw_mstr_rst\n);
+ return;
+ }
+
+ writel_relaxed(1, rst_src_en);
+ readl_relaxed(rst_src_en);
+
+ writel_relaxed(1, sw_mstr_rst
[PATCH v3 2/7] ARM: brcmstb: add debug UART for earlyprintk support
Add the UART definitions needed to support earlyprintk on brcmstb machines. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- arch/arm/Kconfig.debug | 16 +++- 1 files changed, 15 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5765abf..266c699 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -94,6 +94,17 @@ choice depends on ARCH_BCM2835 select DEBUG_UART_PL01X + config DEBUG_BRCMSTB_UART + bool Use BRCMSTB UART for low-level debug + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool Kernel low-level debugging messages via UART1 depends on ARCH_CLPS711X @@ -988,6 +999,7 @@ config DEBUG_UART_PHYS default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0x20201000 if DEBUG_BCM2835 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0x4000e400 if DEBUG_LL_UART_EFM32 default 0x4009 if ARCH_LPC32XX default 0x4010 if DEBUG_PXA_UART1 @@ -1029,6 +1041,7 @@ config DEBUG_UART_VIRT default 0xf0009000 if DEBUG_CNS3XXX default 0xf01fb000 if DEBUG_NOMADIK_UART default 0xf0201000 if DEBUG_BCM2835 + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xf11f1000 if ARCH_VERSATILE default 0xf160 if ARCH_INTEGRATOR default 0xf1c28000 if DEBUG_SUNXI_UART0 @@ -1091,7 +1104,8 @@ config DEBUG_UART_8250_WORD default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \ ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ - DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 + DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ + DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool Enable flow control for 8250 UART -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 5/7] ARM: brcmstb: add misc. DT bindings for brcm,brcmstb-*
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
.../devicetree/bindings/arm/brcm-brcmstb.txt | 43
1 files changed, 43 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
new file mode 100644
index 000..5f1aba7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -0,0 +1,43 @@
+Broadcom STB platforms Device Tree Bindings
+---
+Boards with Broadcom Brahma15 ARM-based BCM7xxx SoC shall have the following
+properties.
+
+Required root node properties:
+
+- compatible = brcm,brcmstb-chip_id;
+
+Further, a node with the following compatible string shall be defined:
+
+- compatible: brcm,brcmstb-gen-ctrl-v1
+
+brcmstb-gen-ctrl
+
+This node describes the registers needed for reset and CPU power control.
+
+- compatible: brcm,brcmstb-gen-ctrl-v1
+- properties:
+o reg = rst-src-en-reg-base len
+ sw-mstr-rst-reg-base len
+ cpu-rst-cfg-reg-base len
+ cpu-pwr-zone-ctrl-reg-base len
+ stb-boot-hi-addr0-reg len;
+
+example:
+/ {
+model = Broadcom STB;
+compatible = brcm,brcmstb-7445;
+
+/* snip */
+
+gen-ctrl {
+compatible = brcm,brcmstb-gen-ctrl-v1;
+reg = 0xf0404304 0x4
+ 0xf0404308 0x4
+ 0xf03e2578 0x4
+ 0xf03e2488 0x10
+ 0xf0452000 0x20;
+};
+
+/* snip */
+};
--
1.7.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 3/7] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index bd17819..98ea423 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 6/7] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- Documentation/devicetree/bindings/arm/gic.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 3dfb0c0..b7d7970 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -15,6 +15,7 @@ Main node required properties: arm,cortex-a9-gic arm,cortex-a7-gic arm,arm11mp-gic + brcm,brahma15-gic - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a u32 and the value shall be 3. -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 7/7] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino marc.cee...@gmail.com
Acked-by: Florian Fainelli f.faine...@gmail.com
---
arch/arm/boot/dts/brcmstb-7445.dts | 104
1 files changed, 104 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/brcmstb-7445.dts
diff --git a/arch/arm/boot/dts/brcmstb-7445.dts
b/arch/arm/boot/dts/brcmstb-7445.dts
new file mode 100644
index 000..cbe73b4
--- /dev/null
+++ b/arch/arm/boot/dts/brcmstb-7445.dts
@@ -0,0 +1,104 @@
+/dts-v1/;
+/include/ skeleton.dtsi
+
+/ {
+ #address-cells = 0x1;
+ #size-cells = 0x1;
+ model = Broadcom STB (7445);
+ compatible = brcm,brcmstb-7445;
+ interrupt-parent = gic;
+
+ chosen {};
+
+ memory {
+ device_type = memory;
+ reg = 0x0 0x4000 0x4000 0x4000 0x8000
0x4000;
+ };
+
+ cpupll: cpupll@0 {
+ #clock-cells = 0x0;
+ compatible = fixed-clock;
+ clock-frequency = 15;
+ };
+
+ cpuclk: cpu-clk-div@0 {
+ #clock-cells = 0x0;
+ compatible = brcm,brcmstb-cpu-clk-div;
+ reg = 0xf03e257c 0x4;
+ clocks = cpupll;
+ div-table = 0x0 0x1 0x11 0x2 0x12 0x4 0x13 0x8 0x14 0x10;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ compatible = brcm,brahma15;
+ operating-points = 0x16e360 0x0
+ 0x0b71b0 0x0
+ 0x05b8d8 0x0
+ 0x02dc6c 0x0
+ 0x016e36 0x0;
+ clocks = cpuclk;
+ device_type = cpu;
+ reg = 0;
+ clock-frequency = 15;
+ };
+
+ cpu@1 {
+ compatible = brcm,brahma15;
+ device_type = cpu;
+ reg = 1;
+ clock-frequency = 15;
+ };
+
+ cpu@2 {
+ compatible = brcm,brahma15;
+ device_type = cpu;
+ reg = 2;
+ clock-frequency = 15;
+ };
+
+ cpu@3 {
+ compatible = brcm,brahma15;
+ device_type = cpu;
+ reg = 3;
+ clock-frequency = 15;
+ };
+ };
+
+ gic: interrupt-controller@ffd0 {
+ compatible = brcm,brahma15-gic, arm,cortex-a15-gic;
+ reg = 0xffd01000 0x1000
+ 0xffd02000 0x2000;
+ interrupt-controller;
+ #interrupt-cells = 0x3;
+ };
+
+ timer {
+ compatible = arm,armv7-timer;
+ interrupts = 1 13 0xf08
+ 1 14 0xf08
+ 1 11 0xf08
+ 1 10 0xf08;
+ };
+
+ serial@f0406b00 {
+ compatible = ns16550a;
+ reg = 0xf0406b00 0x20;
+ reg-shift = 0x2;
+ reg-io-width = 0x4;
+ interrupts = 0x0 0x4b 0x4;
+ clock-frequency = 0x4d3f640;
+ };
+
+ gen-ctrl {
+ compatible = brcm,brcmstb-gen-ctrl-v1;
+ reg = 0xf0404304 0x4
+ 0xf0404308 0x4
+ 0xf03e2578 0x4
+ 0xf03e2488 0x10
+ 0xf0452000 0x20;
+ };
+};
--
1.7.1
--
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[PATCH v3 4/7] ARM: brcmstb: add CPU binding for Broadcom Brahma15
Add the Broadcom Brahma B15 CPU to the DT CPU binding list. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- Documentation/devicetree/bindings/arm/cpus.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 9130435..423b879 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below. arm,cortex-r4 arm,cortex-r5 arm,cortex-r7 + brcm,brahma15 faraday,fa526 intel,sa110 intel,sa1100 -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 6/6] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
arch/arm/boot/dts/brcmstb-7445.dts | 115
1 files changed, 115 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/brcmstb-7445.dts
diff --git a/arch/arm/boot/dts/brcmstb-7445.dts
b/arch/arm/boot/dts/brcmstb-7445.dts
new file mode 100644
index 000..a8b74c5
--- /dev/null
+++ b/arch/arm/boot/dts/brcmstb-7445.dts
@@ -0,0 +1,115 @@
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ model = "Broadcom STB (7445)";
+ compatible = "brcm,brcmstb";
+ interrupt-parent = <>;
+
+ chosen {
+ bootargs = "earlyprintk console=ttyS0,115200";
+ };
+
+ memory {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ device_type = "memory";
+ reg = <0x0 0x4000 0x4000 0x4000 0x8000
0x4000>;
+ };
+
+ cpupll: cpupll@0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <15>;
+ };
+
+ cpuclk: cpu-clk-div@0 {
+ compatible = "brcm,brcmstb-cpu-clk-div";
+ reg = <0xf03e257c 0x4>;
+ #clock-cells = <0x0>;
+ clocks = <>;
+ div-table = <0x0 0x1 0x11 0x2 0x12 0x4 0x13 0x8 0x14 0x10>;
+ };
+
+ cpus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ cpu@0 {
+ operating-points = <0x16e360 0x0
+ 0xb71b0 0x0
+ 0x5b8d8 0x0
+ 0x2dc6c 0x0
+ 0x16e36 0x0>;
+ clocks = <>;
+ device_type = "cpu";
+ compatible = "brcm,brahma15";
+ reg = <0x0>;
+ clock-frequency = <15>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "brcm,brahma15";
+ reg = <0x1>;
+ clock-frequency = <15>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "brcm,brahma15";
+ reg = <0x2>;
+ clock-frequency = <15>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "brcm,brahma15";
+ reg = <0x3>;
+ clock-frequency = <15>;
+ };
+ };
+
+ gic: interrupt-controller@ffd0 {
+ compatible = "brcm,brahma15-gic", "arm,cortex-a15-gic";
+ interrupt-controller;
+ #interrupt-cells = <0x3>;
+ reg = <0xffd01000 0x1000 0xffd02000 0x2000>;
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa
0xf08>;
+ };
+
+ serial@f0406b00 {
+ compatible = "ns16550a";
+ reg = <0xf0406b00 0x20>;
+ reg-shift = <0x2>;
+ reg-io-width = <0x4>;
+ interrupts = <0x0 0x4b 0x4>;
+ clock-frequency = <0x4d3f640>;
+ };
+
+ sun-top-ctrl@f0404000 {
+ compatible = "brcm,brcmstb-sun-top-ctrl";
+ reg = <0xf0404000 0x51c>;
+ reset-source-enable-reg = <0x304>;
+ sw-master-reset-reg = <0x308>;
+ };
+
+ cpu-biu-ctrl@f03e2400 {
+ compatible = "brcm,brcmstb-cpu-biu-ctrl";
+ reg = <0xf03e2400 0x5b4>;
+ cpu-reset-config-reg = <0x178>;
+ cpu0-pwr-zone-ctrl-reg = <0x88>;
+ };
+
+ hif-continuation@f0452000 {
+ compatible = "brcm,brcmstb-hif-continuation";
+ reg = <0xf0452000 0x100>;
+ stb-boot-hi-addr0-reg = <0x0>;
+ };
+};
--
1.7.1
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[PATCH v2 5/6] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/gic.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 3dfb0c0..b7d7970 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -15,6 +15,7 @@ Main node required properties: "arm,cortex-a9-gic" "arm,cortex-a7-gic" "arm,arm11mp-gic" + "brcm,brahma15-gic" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a and the value shall be 3. -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 4/6] ARM: brcmstb: add misc. DT bindings for brcm,brcmstb
Document the bindings that the Broadcom STB platform needs
for proper bootup.
Signed-off-by: Marc Carino
Acked-by: Florian Fainelli
---
.../devicetree/bindings/arm/brcm-brcmstb.txt | 72
1 files changed, 72 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
new file mode 100644
index 000..2f3cd50
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -0,0 +1,72 @@
+Broadcom STB platforms Device Tree Bindings
+---
+Boards with Broadcom Brahma15-based BCM7xxx SOC shall have the following
+properties.
+
+Required root node properties:
+- compatible = "brcm,brcmstb";
+
+Further, the following platform nodes shall be defined:
+
+- sun-top-ctrl
+- cpu-biu-ctrl
+- hif-continuation
+
+sun-top-ctrl
+
+This node describes the register block which is used for generic reset control.
+
+- compatible: "brcm,brcmstb-sun-top-ctrl"
+- properties:
+o reg = ;
+o reset-source-enable-reg = ;
+o sw-master-reset-reg = ;
+
+cpu-biu-ctrl
+
+This node describes the register block used for configuring the CPU complex.
+
+- compatible: "brcm,brcmstb-cpu-biu-ctrl"
+- properties:
+o reg = ;
+o cpu-reset-config-reg = ;
+o cpu0-pwr-zone-ctrl-reg = ;
+
+hif-continuation
+
+This node describes the registers for setting the starting PC for each CPU
core.
+
+- compatible: "brcm,brcmstb-hif-continuation"
+- properties:
+o reg = ;
+o stb-boot-hi-addr0-reg = ;
+
+example:
+
+/ {
+ model = "Broadcom STB";
+ compatible = "brcm,brcmstb";
+
+ /* snip */
+
+ sun-top-ctrl@f0404000 {
+ compatible = "brcm,brcmstb-sun-top-ctrl";
+ reg = <0xf0404000 0x51c>;
+ reset-source-enable-reg = <0x304>;
+ sw-master-reset-reg = <0x308>;
+ };
+
+ cpu-biu-ctrl@f0442400 {
+ compatible = "brcm,brcmstb-cpu-biu-ctrl";
+ reg = <0xf0442400 0x5b4>;
+ cpu-reset-config-reg = <0x178>;
+ cpu0-pwr-zone-ctrl-reg = <0x88>;
+ };
+
+ hif-continuation@f0452000 {
+ compatible = "brcm,brcmstb-hif-continuation";
+ reg = <0xf0452000 0x100>;
+ };
+
+ /* snip */
+};
--
1.7.1
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 3/6] ARM: brcmstb: add CPU binding for Broadcom Brahma15
Add the Broadcom Brahma B15 CPU to the DT CPU binding list. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/cpus.txt |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 9130435..423b879 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below. "arm,cortex-r4" "arm,cortex-r5" "arm,cortex-r7" + "brcm,brahma15" "faraday,fa526" "intel,sa110" "intel,sa1100" -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/6] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes. This patch adds machine support for the ARM-based Broadcom SoCs. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- arch/arm/Kconfig.debug | 16 +++- arch/arm/configs/brcmstb_defconfig | 127 ++ arch/arm/mach-bcm/Kconfig | 18 +++ arch/arm/mach-bcm/Makefile |2 + arch/arm/mach-bcm/brcmstb.c | 205 +++ arch/arm/mach-bcm/brcmstb.h | 70 arch/arm/mach-bcm/headsmp-brcmstb.S | 29 + arch/arm/mach-bcm/hotplug-brcmstb.c | 203 ++ 8 files changed, 669 insertions(+), 1 deletions(-) create mode 100644 arch/arm/configs/brcmstb_defconfig create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5765abf..266c699 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -94,6 +94,17 @@ choice depends on ARCH_BCM2835 select DEBUG_UART_PL01X + config DEBUG_BRCMSTB_UART + bool "Use BRCMSTB UART for low-level debug" + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X @@ -988,6 +999,7 @@ config DEBUG_UART_PHYS default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0x20201000 if DEBUG_BCM2835 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0x4000e400 if DEBUG_LL_UART_EFM32 default 0x4009 if ARCH_LPC32XX default 0x4010 if DEBUG_PXA_UART1 @@ -1029,6 +1041,7 @@ config DEBUG_UART_VIRT default 0xf0009000 if DEBUG_CNS3XXX default 0xf01fb000 if DEBUG_NOMADIK_UART default 0xf0201000 if DEBUG_BCM2835 + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xf11f1000 if ARCH_VERSATILE default 0xf160 if ARCH_INTEGRATOR default 0xf1c28000 if DEBUG_SUNXI_UART0 @@ -1091,7 +1104,8 @@ config DEBUG_UART_8250_WORD default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \ ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ - DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 + DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ + DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool "Enable flow control for 8250 UART" diff --git a/arch/arm/configs/brcmstb_defconfig b/arch/arm/configs/brcmstb_defconfig new file mode 100644 index 000..1741d92 --- /dev/null +++ b/arch/arm/configs/brcmstb_defconfig @@ -0,0 +1,127 @@ +CONFIG_CROSS_COMPILE="arm-linux-" +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_SYSFS_DEPRECATED=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EMBEDDED=y +CONFIG_SLAB=y +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y +# CONFIG_IOSCHED_DEADLINE is not set +CONFIG_ARCH_BCM=y +CONFIG_ARCH_BRCMSTB=y +# CONFIG_SWP_EMULATE is not set +CONFIG_SMP=y +CONFIG_HAVE_ARM_ARCH_TIMER=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_CMA=y +CONFIG_CMA_DEBUG=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_PM_RUNTIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_IPV6 is not set +CONFIG_BRIDGE=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_ROM=y +CONFIG_MTD_ABSENT=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_NAND=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_GLUEBI=y +CONFIG_PROC_DEVICET
[PATCH v2 2/6] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index bd17819..98ea423 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 0/6] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. v2: - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B15 v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Marc Carino (6): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcm,brcmstb ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 72 +++ Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 16 ++- arch/arm/boot/dts/brcmstb-7445.dts | 115 +++ arch/arm/configs/brcmstb_defconfig | 127 arch/arm/mach-bcm/Kconfig | 18 ++ arch/arm/mach-bcm/Makefile |2 + arch/arm/mach-bcm/brcmstb.c| 205 arch/arm/mach-bcm/brcmstb.h| 70 +++ arch/arm/mach-bcm/headsmp-brcmstb.S| 29 +++ arch/arm/mach-bcm/hotplug-brcmstb.c| 203 +++ arch/arm/mm/proc-v7.S | 11 + 13 files changed, 869 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/brcmstb-7445.dts create mode 100644 arch/arm/configs/brcmstb_defconfig create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 0/6] ARM: brcmstb: Add Broadcom STB SoC support
This patchset contains the board support package for the Broadcom BCM7445 ARM-based SoC [1]. These changes contain a minimal set of code needed for a BCM7445-based board to boot the Linux kernel. These changes heavily leverage the OF/devicetree framework. v2: - rebased to v3.13-rc1 - moved implementation to 'mach-bcm' folder - added CPU init for B15 v1: - initial submission [1] http://www.broadcom.com/products/Cable/Cable-Set-Top-Box-Solutions/BCM7445 Marc Carino (6): ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs ARM: do CPU-specific init for Broadcom Brahma15 cores ARM: brcmstb: add CPU binding for Broadcom Brahma15 ARM: brcmstb: add misc. DT bindings for brcm,brcmstb ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 .../devicetree/bindings/arm/brcm-brcmstb.txt | 72 +++ Documentation/devicetree/bindings/arm/cpus.txt |1 + Documentation/devicetree/bindings/arm/gic.txt |1 + arch/arm/Kconfig.debug | 16 ++- arch/arm/boot/dts/brcmstb-7445.dts | 115 +++ arch/arm/configs/brcmstb_defconfig | 127 arch/arm/mach-bcm/Kconfig | 18 ++ arch/arm/mach-bcm/Makefile |2 + arch/arm/mach-bcm/brcmstb.c| 205 arch/arm/mach-bcm/brcmstb.h| 70 +++ arch/arm/mach-bcm/headsmp-brcmstb.S| 29 +++ arch/arm/mach-bcm/hotplug-brcmstb.c| 203 +++ arch/arm/mm/proc-v7.S | 11 + 13 files changed, 869 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt create mode 100644 arch/arm/boot/dts/brcmstb-7445.dts create mode 100644 arch/arm/configs/brcmstb_defconfig create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 2/6] ARM: do CPU-specific init for Broadcom Brahma15 cores
Perform any CPU-specific initialization required on the Broadcom Brahma-15 core. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- arch/arm/mm/proc-v7.S | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index bd17819..98ea423 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -193,6 +193,7 @@ __v7_cr7mp_setup: b 1f __v7_ca7mp_setup: __v7_ca15mp_setup: +__v7_b15mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP @@ -494,6 +495,16 @@ __v7_ca15mp_proc_info: .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* +* Broadcom Corporation Brahma-B15 processor. +*/ + .type __v7_b15mp_proc_info, #object +__v7_b15mp_proc_info: + .long 0x420f00f0 + .long 0xff00 + __v7_proc __v7_b15mp_setup, hwcaps = HWCAP_IDIV + .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info + + /* * Qualcomm Inc. Krait processors. */ .type __krait_proc_info, #object -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/6] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes. This patch adds machine support for the ARM-based Broadcom SoCs. Signed-off-by: Marc Carino marc.cee...@gmail.com Acked-by: Florian Fainelli f.faine...@gmail.com --- arch/arm/Kconfig.debug | 16 +++- arch/arm/configs/brcmstb_defconfig | 127 ++ arch/arm/mach-bcm/Kconfig | 18 +++ arch/arm/mach-bcm/Makefile |2 + arch/arm/mach-bcm/brcmstb.c | 205 +++ arch/arm/mach-bcm/brcmstb.h | 70 arch/arm/mach-bcm/headsmp-brcmstb.S | 29 + arch/arm/mach-bcm/hotplug-brcmstb.c | 203 ++ 8 files changed, 669 insertions(+), 1 deletions(-) create mode 100644 arch/arm/configs/brcmstb_defconfig create mode 100644 arch/arm/mach-bcm/brcmstb.c create mode 100644 arch/arm/mach-bcm/brcmstb.h create mode 100644 arch/arm/mach-bcm/headsmp-brcmstb.S create mode 100644 arch/arm/mach-bcm/hotplug-brcmstb.c diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5765abf..266c699 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -94,6 +94,17 @@ choice depends on ARCH_BCM2835 select DEBUG_UART_PL01X + config DEBUG_BRCMSTB_UART + bool Use BRCMSTB UART for low-level debug + depends on ARCH_BRCMSTB + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. + + If you have a Broadcom STB chip and would like early print + messages to appear over the UART, select this option. + config DEBUG_CLPS711X_UART1 bool Kernel low-level debugging messages via UART1 depends on ARCH_CLPS711X @@ -988,6 +999,7 @@ config DEBUG_UART_PHYS default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0x20201000 if DEBUG_BCM2835 + default 0xf0406b00 if DEBUG_BRCMSTB_UART default 0x4000e400 if DEBUG_LL_UART_EFM32 default 0x4009 if ARCH_LPC32XX default 0x4010 if DEBUG_PXA_UART1 @@ -1029,6 +1041,7 @@ config DEBUG_UART_VIRT default 0xf0009000 if DEBUG_CNS3XXX default 0xf01fb000 if DEBUG_NOMADIK_UART default 0xf0201000 if DEBUG_BCM2835 + default 0xfc406b00 if DEBUG_BRCMSTB_UART default 0xf11f1000 if ARCH_VERSATILE default 0xf160 if ARCH_INTEGRATOR default 0xf1c28000 if DEBUG_SUNXI_UART0 @@ -1091,7 +1104,8 @@ config DEBUG_UART_8250_WORD default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \ ARCH_KEYSTONE || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ - DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 + DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \ + DEBUG_BRCMSTB_UART config DEBUG_UART_8250_FLOW_CONTROL bool Enable flow control for 8250 UART diff --git a/arch/arm/configs/brcmstb_defconfig b/arch/arm/configs/brcmstb_defconfig new file mode 100644 index 000..1741d92 --- /dev/null +++ b/arch/arm/configs/brcmstb_defconfig @@ -0,0 +1,127 @@ +CONFIG_CROSS_COMPILE=arm-linux- +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_SYSFS_DEPRECATED=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EMBEDDED=y +CONFIG_SLAB=y +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y +# CONFIG_IOSCHED_DEADLINE is not set +CONFIG_ARCH_BCM=y +CONFIG_ARCH_BRCMSTB=y +# CONFIG_SWP_EMULATE is not set +CONFIG_SMP=y +CONFIG_HAVE_ARM_ARCH_TIMER=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_CMA=y +CONFIG_CMA_DEBUG=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_PM_RUNTIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_IPV6 is not set +CONFIG_BRIDGE=y +CONFIG_UEVENT_HELPER_PATH=/sbin/hotplug +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_ROM=y +CONFIG_MTD_ABSENT=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_NAND=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_GLUEBI=y +CONFIG_PROC_DEVICETREE=y
