Re: r8152: data corruption in various scenarios

[Mark Lord]

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-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: r8152: data corruption in various scenarios

[Mark Lord]

On 2019-01-07 11:01 a.m., mario.limoncie...@dell.com wrote:
>
> TB16 contains ASMedia host controller.  It's a Thunderbolt dock and all USB 
> devices
> are connected to ASMedia host controller in the dock.
> 
> WD15 does not contain an ASMedia host controller, it connected to system's
> USB host controller.


Thank-you, Mario.

So.. why are we enabling the r8153 (USB-ethernet) workaround on this WD15 dock?
The discussion back in 2017 was that only the TB15/TB16 were affected by
the XHCI overruns it produces?

-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: r8152: data corruption in various scenarios

[Mark Lord]

On 2019-01-07 1:46 a.m., Kai Heng Feng wrote:
>
> Do you happen to use a Dell system? We can do some test here.

Yes.  It is a Dell XPS 13 9360 i7-8550U notebook,
with the Dell WD15 USB-C dock.

-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: r8152: data corruption in various scenarios

[Mark Lord]

On 2019-01-06 11:09 p.m., Kai Heng Feng wrote:
> 
> 
>> On Jan 7, 2019, at 05:16, Mark Lord  wrote:
>>
>> On 2019-01-06 4:13 p.m., Mark Lord wrote:
>>> On 2019-01-06 2:14 p.m., Kai Heng Feng wrote:>> On Jan 5, 2019, at 10:14 
>>> PM, Mark Lord
>>>  wrote:
>>> ..
>>>>> There is even now a special hack in the upstream r8152.c to attempt to 
>>>>> detect
>>>>> a Dell TB16 dock and disable RX Aggregation in the driver to prevent such 
>>>>> issues.
>>>>>
>>>>> Well.. I have a WD15 dock, not a TB16, and that same hack also catches my 
>>>>> dock
>>>>> in its net:
>>>>>
>>>>>   [5.794641] usb 4-1.2: Dell TB16 Dock, disable RX aggregation
>>>>
>>>> The serial should be unique according to Dell.
>>>>
>>>>> So one issue is that the code is not correctly identifying the dock,
>>>>> and the WD15 is claimed to be immune from the r8152 issues.
>>>>
>>>> The WD15 I tested didn't use that serial number though...
>>>
>>> What info do you need from me about the WD15 so this can be corrected?
>>>
>>>>>  xhci_hcd :39:00.0: ERROR Transfer event TRB DMA ptr not part of 
>>>>> current TD ep_index 13
>>>>> comp_code 1
>>>>
>>>> This is probably an xHC bug. A similar issue is fixed by commit 
>>>> 9da5a1092b13
>>>> ("xhci: Bad Ethernet performance plugged in ASM1042A host”). 
>>>>
>>>>> I just got that exact message above, with the r8152 in my 1-day old WD15 
>>>>> dock,
>>>>> with the TB16 "workaround" enabled in Linux kernel 4.20.0.
>>>>
>>>> Is the xHC WD15 connected an ASMedia one?
>>>
>>> I don't know.  I *think* it identifies as a DSL6340 (see below).
>>>
>>> Here is lspci and lsusb:
>>>
>>> $ lspci -vt
>>> -[:00]-+-00.0  Intel Corporation Xeon E3-1200 v6/7th Gen Core Processor 
>>> Host Bridge/DRAM Registers
>>>   +-02.0  Intel Corporation UHD Graphics 620
>>>   +-04.0  Intel Corporation Skylake Processor Thermal Subsystem
>>>   +-14.0  Intel Corporation Sunrise Point-LP USB 3.0 xHCI Controller
>>>   +-14.2  Intel Corporation Sunrise Point-LP Thermal subsystem
>>>   +-15.0  Intel Corporation Sunrise Point-LP Serial IO I2C 
>>> Controller #0
>>>   +-15.1  Intel Corporation Sunrise Point-LP Serial IO I2C 
>>> Controller #1
>>>   +-16.0  Intel Corporation Sunrise Point-LP CSME HECI #1
>>>   +-1c.0-[01-39]00.0-[02-39]--+-00.0-[03]--
>>>   |   +-01.0-[04-38]--
>>>   |   \-02.0-[39]00.0  Intel 
>>> Corporation DSL6340 USB 3.1
>>> Controller [Alpine Ridge]
>>>   +-1c.4-[3a]00.0  Qualcomm Atheros QCA6174 802.11ac Wireless 
>>> Network Adapter
>>>   +-1d.0-[3b]00.0  Samsung Electronics Co Ltd Device a808
>>>   +-1f.0  Intel Corporation Device 9d4e
>>>   +-1f.2  Intel Corporation Sunrise Point-LP PMC
>>>   +-1f.3  Intel Corporation Sunrise Point-LP HD Audio
>>>   \-1f.4  Intel Corporation Sunrise Point-LP SMBus
>>
>>
>> Mmm.. lspci -vt isn't as verbose as I thought, so here is plain lspci to 
>> fill in the blanks:
>>
>> $ lspci
>> 00:00.0 Host bridge: Intel Corporation Xeon E3-1200 v6/7th Gen Core 
>> Processor Host Bridge/DRAM
>> Registers (rev 08)
>> 00:02.0 VGA compatible controller: Intel Corporation UHD Graphics 620 (rev 
>> 07)
>>
>> 00:04.0 Signal processing controller: Intel Corporation Skylake Processor 
>> Thermal Subsystem (rev 08)
>>
>> 00:14.0 USB controller: Intel Corporation Sunrise Point-LP USB 3.0 xHCI 
>> Controller (rev 21)
>>
>> 00:14.2 Signal processing controller: Intel Corporation Sunrise Point-LP 
>> Thermal subsystem (rev 21)
>>
>> 00:15.0 Signal processing controller: Intel Corporation Sunrise Point-LP 
>> Serial IO I2C Controller #0
>> (rev 21)
>> 00:15.1 Signal processing controller: Intel Corporation Sunrise Point-LP 
>> Serial IO I2C Controller #1
>> (rev 21)
>> 00:16.0 Communication controller: Intel Corporation Sunrise Point-LP CSME 
>> HECI #1 (rev 21)
>>
>> 00:1c.0 PCI bridge: Intel Corporation Sunrise Point-LP PCI Express Root Port 
&g

Re: r8152: data corruption in various scenarios

[Mark Lord]

On 2019-01-06 4:13 p.m., Mark Lord wrote:
> On 2019-01-06 2:14 p.m., Kai Heng Feng wrote:>> On Jan 5, 2019, at 10:14 PM, 
> Mark Lord
>  wrote:
> ..
>>> There is even now a special hack in the upstream r8152.c to attempt to 
>>> detect
>>> a Dell TB16 dock and disable RX Aggregation in the driver to prevent such 
>>> issues.
>>>
>>> Well.. I have a WD15 dock, not a TB16, and that same hack also catches my 
>>> dock
>>> in its net:
>>>
>>>[5.794641] usb 4-1.2: Dell TB16 Dock, disable RX aggregation
>>
>> The serial should be unique according to Dell.
>>
>>> So one issue is that the code is not correctly identifying the dock,
>>> and the WD15 is claimed to be immune from the r8152 issues.
>>
>> The WD15 I tested didn't use that serial number though...
> 
> What info do you need from me about the WD15 so this can be corrected?
> 
>>>   xhci_hcd :39:00.0: ERROR Transfer event TRB DMA ptr not part of 
>>> current TD ep_index 13
>>> comp_code 1
>>
>> This is probably an xHC bug. A similar issue is fixed by commit 9da5a1092b13
>> ("xhci: Bad Ethernet performance plugged in ASM1042A host”). 
>>
>>> I just got that exact message above, with the r8152 in my 1-day old WD15 
>>> dock,
>>> with the TB16 "workaround" enabled in Linux kernel 4.20.0.
>>
>> Is the xHC WD15 connected an ASMedia one?
> 
> I don't know.  I *think* it identifies as a DSL6340 (see below).
> 
> Here is lspci and lsusb:
> 
> $ lspci -vt
> -[:00]-+-00.0  Intel Corporation Xeon E3-1200 v6/7th Gen Core Processor 
> Host Bridge/DRAM Registers
>+-02.0  Intel Corporation UHD Graphics 620
>+-04.0  Intel Corporation Skylake Processor Thermal Subsystem
>+-14.0  Intel Corporation Sunrise Point-LP USB 3.0 xHCI Controller
>+-14.2  Intel Corporation Sunrise Point-LP Thermal subsystem
>+-15.0  Intel Corporation Sunrise Point-LP Serial IO I2C 
> Controller #0
>+-15.1  Intel Corporation Sunrise Point-LP Serial IO I2C 
> Controller #1
>+-16.0  Intel Corporation Sunrise Point-LP CSME HECI #1
>+-1c.0-[01-39]00.0-[02-39]--+-00.0-[03]--
>|   +-01.0-[04-38]--
>|   \-02.0-[39]00.0  Intel 
> Corporation DSL6340 USB 3.1
> Controller [Alpine Ridge]
>+-1c.4-[3a]00.0  Qualcomm Atheros QCA6174 802.11ac Wireless 
> Network Adapter
>+-1d.0-[3b]00.0  Samsung Electronics Co Ltd Device a808
>+-1f.0  Intel Corporation Device 9d4e
>+-1f.2  Intel Corporation Sunrise Point-LP PMC
>+-1f.3  Intel Corporation Sunrise Point-LP HD Audio
>\-1f.4  Intel Corporation Sunrise Point-LP SMBus


Mmm.. lspci -vt isn't as verbose as I thought, so here is plain lspci to fill 
in the blanks:

$ lspci
00:00.0 Host bridge: Intel Corporation Xeon E3-1200 v6/7th Gen Core Processor 
Host Bridge/DRAM
Registers (rev 08)
00:02.0 VGA compatible controller: Intel Corporation UHD Graphics 620 (rev 07)

00:04.0 Signal processing controller: Intel Corporation Skylake Processor 
Thermal Subsystem (rev 08)

00:14.0 USB controller: Intel Corporation Sunrise Point-LP USB 3.0 xHCI 
Controller (rev 21)

00:14.2 Signal processing controller: Intel Corporation Sunrise Point-LP 
Thermal subsystem (rev 21)

00:15.0 Signal processing controller: Intel Corporation Sunrise Point-LP Serial 
IO I2C Controller #0
(rev 21)
00:15.1 Signal processing controller: Intel Corporation Sunrise Point-LP Serial 
IO I2C Controller #1
(rev 21)
00:16.0 Communication controller: Intel Corporation Sunrise Point-LP CSME HECI 
#1 (rev 21)

00:1c.0 PCI bridge: Intel Corporation Sunrise Point-LP PCI Express Root Port 
(rev f1)

00:1c.4 PCI bridge: Intel Corporation Sunrise Point-LP PCI Express Root Port #5 
(rev f1)

00:1d.0 PCI bridge: Intel Corporation Sunrise Point-LP PCI Express Root Port #9 
(rev f1)

00:1f.0 ISA bridge: Intel Corporation Device 9d4e (rev 21)

00:1f.2 Memory controller: Intel Corporation Sunrise Point-LP PMC (rev 21)

00:1f.3 Audio device: Intel Corporation Sunrise Point-LP HD Audio (rev 21)

00:1f.4 SMBus: Intel Corporation Sunrise Point-LP SMBus (rev 21)

01:00.0 PCI bridge: Intel Corporation DSL6340 Thunderbolt 3 Bridge [Alpine 
Ridge 2C 2015]

02:00.0 PCI bridge: Intel Corporation DSL6340 Thunderbolt 3 Bridge [Alpine 
Ridge 2C 2015]

02:01.0 PCI bridge: Intel Corporation DSL6340 Thunderbolt 3 Bridge [Alpine 
Ridge 2C 2015]

02:02.0 PCI bridge: Intel Corporation DSL6340 Thunderbolt 3 Bridge [Alpine 
Ridge 2C 2015]

39:00.0 USB controller: Intel Corporation DSL6340 USB 3.1 Controller [Alpine 
Ridge]

3a:00.0 Network controller: Qualcomm Atheros QCA6174 802.11ac Wireless Network 
Adapter (rev 32)

3b:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd Device a808


-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: r8152: data corruption in various scenarios

[Mark Lord]

On 2019-01-06 2:14 p.m., Kai Heng Feng wrote:>> On Jan 5, 2019, at 10:14 PM, 
Mark Lord
 wrote:
..
>> There is even now a special hack in the upstream r8152.c to attempt to detect
>> a Dell TB16 dock and disable RX Aggregation in the driver to prevent such 
>> issues.
>>
>> Well.. I have a WD15 dock, not a TB16, and that same hack also catches my 
>> dock
>> in its net:
>>
>>[5.794641] usb 4-1.2: Dell TB16 Dock, disable RX aggregation
> 
> The serial should be unique according to Dell.
>
>> So one issue is that the code is not correctly identifying the dock,
>> and the WD15 is claimed to be immune from the r8152 issues.
> 
> The WD15 I tested didn't use that serial number though...

What info do you need from me about the WD15 so this can be corrected?

>>   xhci_hcd :39:00.0: ERROR Transfer event TRB DMA ptr not part of 
>> current TD ep_index 13
>> comp_code 1
> 
> This is probably an xHC bug. A similar issue is fixed by commit 9da5a1092b13
> ("xhci: Bad Ethernet performance plugged in ASM1042A host”). 
> 
>> I just got that exact message above, with the r8152 in my 1-day old WD15 
>> dock,
>> with the TB16 "workaround" enabled in Linux kernel 4.20.0.
> 
> Is the xHC WD15 connected an ASMedia one?

I don't know.  I *think* it identifies as a DSL6340 (see below).

Here is lspci and lsusb:

$ lspci -vt
-[:00]-+-00.0  Intel Corporation Xeon E3-1200 v6/7th Gen Core Processor 
Host Bridge/DRAM Registers
   +-02.0  Intel Corporation UHD Graphics 620
   +-04.0  Intel Corporation Skylake Processor Thermal Subsystem
   +-14.0  Intel Corporation Sunrise Point-LP USB 3.0 xHCI Controller
   +-14.2  Intel Corporation Sunrise Point-LP Thermal subsystem
   +-15.0  Intel Corporation Sunrise Point-LP Serial IO I2C Controller 
#0
   +-15.1  Intel Corporation Sunrise Point-LP Serial IO I2C Controller 
#1
   +-16.0  Intel Corporation Sunrise Point-LP CSME HECI #1
   +-1c.0-[01-39]00.0-[02-39]--+-00.0-[03]--
   |   +-01.0-[04-38]--
   |   \-02.0-[39]00.0  Intel 
Corporation DSL6340 USB 3.1
Controller [Alpine Ridge]
   +-1c.4-[3a]00.0  Qualcomm Atheros QCA6174 802.11ac Wireless 
Network Adapter
   +-1d.0-[3b]00.0  Samsung Electronics Co Ltd Device a808
   +-1f.0  Intel Corporation Device 9d4e
   +-1f.2  Intel Corporation Sunrise Point-LP PMC
   +-1f.3  Intel Corporation Sunrise Point-LP HD Audio
   \-1f.4  Intel Corporation Sunrise Point-LP SMBus
$ lsusb -t
/:  Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/2p, 1M
|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/7p, 5000M
|__ Port 2: Dev 3, If 0, Class=Vendor Specific Class, Driver=r8152, 
5000M
/:  Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/2p, 480M
|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/7p, 480M
|__ Port 5: Dev 3, If 1, Class=Audio, Driver=snd-usb-audio, 480M
|__ Port 5: Dev 3, If 2, Class=Audio, Driver=snd-usb-audio, 480M
|__ Port 5: Dev 3, If 0, Class=Audio, Driver=snd-usb-audio, 480M
|__ Port 5: Dev 3, If 3, Class=Audio, Driver=snd-usb-audio, 480M
|__ Port 6: Dev 4, If 0, Class=Human Interface Device, Driver=usbhid, 
12M
|__ Port 6: Dev 4, If 1, Class=Human Interface Device, Driver=usbhid, 
12M
|__ Port 6: Dev 4, If 2, Class=Human Interface Device, Driver=usbhid, 
12M
|__ Port 7: Dev 5, If 0, Class=Human Interface Device, Driver=usbhid, 
1.5M
/:  Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/6p, 5000M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/12p, 480M
    |__ Port 3: Dev 2, If 0, Class=Wireless, Driver=btusb, 12M
|__ Port 3: Dev 2, If 1, Class=Wireless, Driver=btusb, 12M

Thanks for having a look.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: r8152: data corruption in various scenarios

[Mark Lord]

On 2019-01-05 9:14 a.m., Mark Lord wrote:
> A couple of years back, I reported data corruption resulting from
> a change in kernel 3.16 which enabled hardware checksums in the r8152 driver.
> This was happening on an embedded system that was using a r8152 USB dongle.
> 
> At the time, it was very difficult to figure out what could possibly be 
> causing it,
> other than that re-enabling software checksums prevented corrupted packets 
> from
> resulting in more serious issues.
> 
> Since that time, more and more reports of similar corruption and issues
> have been trickling in.  Eg.
> 
>https://lore.kernel.org/patchwork/patch/873920/

Forgot to include this link (below) where people still have the issue
even with the driver workaround.  Switching to software checksums "fixes" it:

https://bugzilla.redhat.com/show_bug.cgi?id=1460789

> 
> Note that there are reports in the thread above that the issues
> are not limited to only the built-in ethernet chip of the dock.
> 
> There is even now a special hack in the upstream r8152.c to attempt to detect
> a Dell TB16 dock and disable RX Aggregation in the driver to prevent such 
> issues.
> 
> Well.. I have a WD15 dock, not a TB16, and that same hack also catches my dock
> in its net:
> 
> [5.794641] usb 4-1.2: Dell TB16 Dock, disable RX aggregation
> 
> So one issue is that the code is not correctly identifying the dock,
> and the WD15 is claimed to be immune from the r8152 issues.
> 
> One of the symptoms of the r8152 issue, reported by Ansis Atteka,
> were messages like this:
> 
>xhci_hcd :39:00.0: ERROR Transfer event TRB DMA ptr not part of 
> current TD ep_index 13
> comp_code 1
> 
> I just got that exact message above, with the r8152 in my 1-day old WD15 dock,
> with the TB16 "workaround" enabled in Linux kernel 4.20.0.
> 
>>From this I conclude that the workaround is not 100% complete yet.
> 


-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

r8152: data corruption in various scenarios

[Mark Lord]

A couple of years back, I reported data corruption resulting from
a change in kernel 3.16 which enabled hardware checksums in the r8152 driver.
This was happening on an embedded system that was using a r8152 USB dongle.

At the time, it was very difficult to figure out what could possibly be causing 
it,
other than that re-enabling software checksums prevented corrupted packets from
resulting in more serious issues.

Since that time, more and more reports of similar corruption and issues
have been trickling in.  Eg.

   https://lore.kernel.org/patchwork/patch/873920/

Note that there are reports in the thread above that the issues
are not limited to only the built-in ethernet chip of the dock.

There is even now a special hack in the upstream r8152.c to attempt to detect
a Dell TB16 dock and disable RX Aggregation in the driver to prevent such 
issues.

Well.. I have a WD15 dock, not a TB16, and that same hack also catches my dock
in its net:

[5.794641] usb 4-1.2: Dell TB16 Dock, disable RX aggregation

So one issue is that the code is not correctly identifying the dock,
and the WD15 is claimed to be immune from the r8152 issues.

One of the symptoms of the r8152 issue, reported by Ansis Atteka,
were messages like this:

   xhci_hcd :39:00.0: ERROR Transfer event TRB DMA ptr not part of current 
TD ep_index 13
comp_code 1

I just got that exact message above, with the r8152 in my 1-day old WD15 dock,
with the TB16 "workaround" enabled in Linux kernel 4.20.0.

>From this I conclude that the workaround is not 100% complete yet.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 17-01-02 07:40 PM, Ansis Atteka wrote:
..
> I think that I am getting closer to the root cause of this bug. Also,
> I have a workaround that at least makes r8152 functionally stable in
> my Dell TB15 dock. Mark, would you mind giving a chance to the patch
> that I have in the bottom of this email to see if it helps your issue
> too (you might have to tweak those settings slightly differently if
> you use something else than USB 3.0)

 /* USB_RX_EARLY_TIMEOUT */
-#define COALESCE_SUPER  85000U
-#define COALESCE_HIGH  25U
-#define COALESCE_SLOW  524280U
+#define COALESCE_SUPER  8500U
+#define COALESCE_HIGH  25000U
+#define COALESCE_SLOW  52428U

The RTL_VER_02 chip that I was using does not support interrupt coalescing
in the driver [see the rtl8152_set_coalesce() function].  So that workaround
would not help here.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 17-01-02 07:40 PM, Ansis Atteka wrote:
..
> I think that I am getting closer to the root cause of this bug. Also,
> I have a workaround that at least makes r8152 functionally stable in
> my Dell TB15 dock. Mark, would you mind giving a chance to the patch
> that I have in the bottom of this email to see if it helps your issue
> too (you might have to tweak those settings slightly differently if
> you use something else than USB 3.0)

 /* USB_RX_EARLY_TIMEOUT */
-#define COALESCE_SUPER  85000U
-#define COALESCE_HIGH  25U
-#define COALESCE_SLOW  524280U
+#define COALESCE_SUPER  8500U
+#define COALESCE_HIGH  25000U
+#define COALESCE_SLOW  52428U

The RTL_VER_02 chip that I was using does not support interrupt coalescing
in the driver [see the rtl8152_set_coalesce() function].  So that workaround
would not help here.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-12-08 10:23 PM, Hayes Wang wrote:
> Mark Lord <ml...@pobox.com>
> 
> I find an issue about autosuspend, and it may result in the same
> problem with you. I don't sure if this is helpful to you, because
> it only occurs when enabling the autosuspend.

Thanks.  I am using ASIX adapters now.

I did try the latest 4.9-rc8, and 4.8.12 kernels with the r8152 dongle 
yesterday,
in hope that perhaps the many EHCI fixes from those kernels might help out.

The dongle was unusable with those newer kernels.
Most of the time it failed with "Get ether addr fail\n" at startup.

On the occasions where it got past that point, it often failed
the DHCP negotiation, but this looks more like a bug elsewhere in
the kernel, possibly racing against initialization of the random
number generators.  Adding a 2-second sleep the the r8151 probe
function made this error mostly go away.

Cheers
-- 
Mark Lord

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-12-08 10:23 PM, Hayes Wang wrote:
> Mark Lord 
> 
> I find an issue about autosuspend, and it may result in the same
> problem with you. I don't sure if this is helpful to you, because
> it only occurs when enabling the autosuspend.

Thanks.  I am using ASIX adapters now.

I did try the latest 4.9-rc8, and 4.8.12 kernels with the r8152 dongle 
yesterday,
in hope that perhaps the many EHCI fixes from those kernels might help out.

The dongle was unusable with those newer kernels.
Most of the time it failed with "Get ether addr fail\n" at startup.

On the occasions where it got past that point, it often failed
the DHCP negotiation, but this looks more like a bug elsewhere in
the kernel, possibly racing against initialization of the random
number generators.  Adding a 2-second sleep the the r8151 probe
function made this error mostly go away.

Cheers
-- 
Mark Lord

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 09:22 AM, Greg KH wrote:
> On Fri, Nov 25, 2016 at 07:41:42AM -0500, Mark Lord wrote:
>> On 16-11-25 07:34 AM, Mark Lord wrote:
>>> On 16-11-25 04:53 AM, Greg KH wrote:
>>>> Note, there are "cheap" USB monitors that can be quite handy and that work 
>>>> on Linux:
>>>>http://www.totalphase.com/products/beagle-usb12/
>>>
>>> USD$455/each in quantity, vs. USD$8 for the USB ethernet dongle.
>>
>> Oh, wrong model.  That one doesn't do USB2.
>> The USB2 version is a mere USD$1300 in quantity.
>>
>> Seems like rather a lot of money just to report a bug in a USB driver.
>> Perhaps the Linux Foundation might purchase one and loan it for this task?
> 
> You already have access to a USB analyzer you said, why would I try to
> buy one and ship it around the world instead?  Makes no sense...

No, the company where I am consulting has a paperweight called a "USB analyzer".
It doesn't work with Linux machines.

You are the one who suggested purchase of a working Linux compatible unit,
so I was just following up to see if you were serious about that.

No worries.
I'll see if the paperweight can be converted into something useful next week.

Cheers

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 09:22 AM, Greg KH wrote:
> On Fri, Nov 25, 2016 at 07:41:42AM -0500, Mark Lord wrote:
>> On 16-11-25 07:34 AM, Mark Lord wrote:
>>> On 16-11-25 04:53 AM, Greg KH wrote:
>>>> Note, there are "cheap" USB monitors that can be quite handy and that work 
>>>> on Linux:
>>>>http://www.totalphase.com/products/beagle-usb12/
>>>
>>> USD$455/each in quantity, vs. USD$8 for the USB ethernet dongle.
>>
>> Oh, wrong model.  That one doesn't do USB2.
>> The USB2 version is a mere USD$1300 in quantity.
>>
>> Seems like rather a lot of money just to report a bug in a USB driver.
>> Perhaps the Linux Foundation might purchase one and loan it for this task?
> 
> You already have access to a USB analyzer you said, why would I try to
> buy one and ship it around the world instead?  Makes no sense...

No, the company where I am consulting has a paperweight called a "USB analyzer".
It doesn't work with Linux machines.

You are the one who suggested purchase of a working Linux compatible unit,
so I was just following up to see if you were serious about that.

No worries.
I'll see if the paperweight can be converted into something useful next week.

Cheers

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 04:52 AM, Hayes Wang wrote:
..
> What is the value of /sys/bus/usb/devices/.../power/control ?

That entry does not exist -- power control is completely
disabled on this board.

Good try, though -- USB power control still causes me trouble
on PCs with mice and remote controls.  But not here.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 04:52 AM, Hayes Wang wrote:
..
> What is the value of /sys/bus/usb/devices/.../power/control ?

That entry does not exist -- power control is completely
disabled on this board.

Good try, though -- USB power control still causes me trouble
on PCs with mice and remote controls.  But not here.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 04:53 AM, Greg KH wrote:
> On Thu, Nov 24, 2016 at 10:49:33PM -0500, Mark Lord wrote:
>> There is no possibility for them to be used for anything other than
>> USB receive buffers, for this driver only.  Nothing in the driver
>> or kernel ever writes to those buffers after initial allocation,
>> and only the driver and USB host controller ever have pointers to the 
>> buffers.
> 
> You really are going to have to break out that USB monitor to verify
> that this is the data coming across the wire.

Not sure why, because there really is no other way for the data to
appear where it does at the beginning of that URB buffer.

This does seem a rather unexpected burden to place upon someone
reporting a regression in a USB network driver that corrupts user data.

I have already spent about 50 hours looking at this issue,
and everything now points firmly at some kind of FIFO overflow
within the dongle itself.  There is no evidence to the contrary.

I am very happy to test any driver updates, or data collection mods
provided by the author, to help the author find/fix the issue.

One idea, might be to have the author try testing with the dongle
connected through a USB1.1 hub, forcing it to slower speeds.
This might make reproducing the issue (if indeed a FIFO overflow)
easier, as the host transfers will then be slower than the
ethernet wire speed.

I have access to the hardware here next Tuesday.
If we can scrounge up the USB analyzer, cables, and a suitable
MS-Windows (ugh) machine of some kind, then I'll see if it can
be programmed to somewhow capture the event.  Probably just set it
in continuous capture mode, and have the target system halt
when it sees bad data at offset zero.

This can take days to reproduce, so don't hold your breaths.

Something useful to do in the meanwhile, is to then think
about "what next" after the analyzer confirms the issue.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 04:53 AM, Greg KH wrote:
> On Thu, Nov 24, 2016 at 10:49:33PM -0500, Mark Lord wrote:
>> There is no possibility for them to be used for anything other than
>> USB receive buffers, for this driver only.  Nothing in the driver
>> or kernel ever writes to those buffers after initial allocation,
>> and only the driver and USB host controller ever have pointers to the 
>> buffers.
> 
> You really are going to have to break out that USB monitor to verify
> that this is the data coming across the wire.

Not sure why, because there really is no other way for the data to
appear where it does at the beginning of that URB buffer.

This does seem a rather unexpected burden to place upon someone
reporting a regression in a USB network driver that corrupts user data.

I have already spent about 50 hours looking at this issue,
and everything now points firmly at some kind of FIFO overflow
within the dongle itself.  There is no evidence to the contrary.

I am very happy to test any driver updates, or data collection mods
provided by the author, to help the author find/fix the issue.

One idea, might be to have the author try testing with the dongle
connected through a USB1.1 hub, forcing it to slower speeds.
This might make reproducing the issue (if indeed a FIFO overflow)
easier, as the host transfers will then be slower than the
ethernet wire speed.

I have access to the hardware here next Tuesday.
If we can scrounge up the USB analyzer, cables, and a suitable
MS-Windows (ugh) machine of some kind, then I'll see if it can
be programmed to somewhow capture the event.  Probably just set it
in continuous capture mode, and have the target system halt
when it sees bad data at offset zero.

This can take days to reproduce, so don't hold your breaths.

Something useful to do in the meanwhile, is to then think
about "what next" after the analyzer confirms the issue.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 04:53 AM, Greg KH wrote:
> Note, there are "cheap" USB monitors that can be quite handy and that work on 
> Linux:
>   http://www.totalphase.com/products/beagle-usb12/

USD$455/each in quantity, vs. USD$8 for the USB ethernet dongle.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 04:53 AM, Greg KH wrote:
> Note, there are "cheap" USB monitors that can be quite handy and that work on 
> Linux:
>   http://www.totalphase.com/products/beagle-usb12/

USD$455/each in quantity, vs. USD$8 for the USB ethernet dongle.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 07:34 AM, Mark Lord wrote:
> On 16-11-25 04:53 AM, Greg KH wrote:
>> Note, there are "cheap" USB monitors that can be quite handy and that work 
>> on Linux:
>>  http://www.totalphase.com/products/beagle-usb12/
> 
> USD$455/each in quantity, vs. USD$8 for the USB ethernet dongle.

Oh, wrong model.  That one doesn't do USB2.
The USB2 version is a mere USD$1300 in quantity.

Seems like rather a lot of money just to report a bug in a USB driver.
Perhaps the Linux Foundation might purchase one and loan it for this task?

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 01:51 AM, Hayes Wang wrote:
>
> Forgive me. I provide wrong information. This is about RTL8153, not RTL8152.

No problem.  Thanks for trying though.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 07:34 AM, Mark Lord wrote:
> On 16-11-25 04:53 AM, Greg KH wrote:
>> Note, there are "cheap" USB monitors that can be quite handy and that work 
>> on Linux:
>>  http://www.totalphase.com/products/beagle-usb12/
> 
> USD$455/each in quantity, vs. USD$8 for the USB ethernet dongle.

Oh, wrong model.  That one doesn't do USB2.
The USB2 version is a mere USD$1300 in quantity.

Seems like rather a lot of money just to report a bug in a USB driver.
Perhaps the Linux Foundation might purchase one and loan it for this task?

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 01:51 AM, Hayes Wang wrote:
>
> Forgive me. I provide wrong information. This is about RTL8153, not RTL8152.

No problem.  Thanks for trying though.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 01:11 AM, Hayes Wang wrote:
> Mark Lord [mailto:ml...@pobox.com]
..
>> If that "return 0" statement is ever executed, doesn't it result
>> in the loss/leak of a buffer?
> 
> They would be found back by calling rtl_start_rx(), when the rx
> is restarted.

Good. I figured it was probably something like that, but wasn't
entirely sure about the control flow around stop/restart there.

Thanks.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-25 01:11 AM, Hayes Wang wrote:
> Mark Lord [mailto:ml...@pobox.com]
..
>> If that "return 0" statement is ever executed, doesn't it result
>> in the loss/leak of a buffer?
> 
> They would be found back by calling rtl_start_rx(), when the rx
> is restarted.

Good. I figured it was probably something like that, but wasn't
entirely sure about the control flow around stop/restart there.

Thanks.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 07:27 PM, Francois Romieu wrote:
>
> Through aliasing the URB was given a page that contains said (previously)
> received file. The ethernet chip/usb host does not write anything in it.

I don't see how that could be possible.  Please elaborate.

The URB buffers are statically allocated by the driver at probe time,
ten of them in all, allocated with usb_alloc_coherent() in the copy of
the driver I am testing with.

There is no possibility for them to be used for anything other than
USB receive buffers, for this driver only.  Nothing in the driver
or kernel ever writes to those buffers after initial allocation,
and only the driver and USB host controller ever have pointers to the buffers.
-- 
Mark Lord

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 07:27 PM, Francois Romieu wrote:
>
> Through aliasing the URB was given a page that contains said (previously)
> received file. The ethernet chip/usb host does not write anything in it.

I don't see how that could be possible.  Please elaborate.

The URB buffers are statically allocated by the driver at probe time,
ten of them in all, allocated with usb_alloc_coherent() in the copy of
the driver I am testing with.

There is no possibility for them to be used for anything other than
USB receive buffers, for this driver only.  Nothing in the driver
or kernel ever writes to those buffers after initial allocation,
and only the driver and USB host controller ever have pointers to the buffers.
-- 
Mark Lord

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 02:00 PM, Greg KH wrote:
> On Thu, Nov 24, 2016 at 01:34:08PM -0500, Mark Lord wrote:
>> One thought:  bulk data streams are byte streams, not packets.
>> Scheduling on the USB bus can break up larger transfers across
>> multiple in-kernel buffers.  A "real" URB buffer on USB2 is max 512 bytes.
>> The driver is providing 16384-byte buffers, and assumes that data will
>> never spill over from one such buffer to the next.
>> Yet the observations here consistently show otherwise.
> 
> Wait, how do you know that data will not spill over?  What is making
> that guarantee?  Will the USB device send a "zero packet" in order to
> show that all of the "logical" data is now sent for this specific
> endpoint?  Is there some sort of "framing" that the device does with the
> USB data so that the driver "knows" where the end of packet is?

Exactly my point.

> Check the zero-packet stuff for this device, that's tripped up many a
> USB driver writer over the years, myself included.

I haven't tripped over it myself, but only because we were careful
to allow for such in the USB drivers I have worked on.

The r8152 driver just assumes it never happens.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 02:00 PM, Greg KH wrote:
> On Thu, Nov 24, 2016 at 01:34:08PM -0500, Mark Lord wrote:
>> One thought:  bulk data streams are byte streams, not packets.
>> Scheduling on the USB bus can break up larger transfers across
>> multiple in-kernel buffers.  A "real" URB buffer on USB2 is max 512 bytes.
>> The driver is providing 16384-byte buffers, and assumes that data will
>> never spill over from one such buffer to the next.
>> Yet the observations here consistently show otherwise.
> 
> Wait, how do you know that data will not spill over?  What is making
> that guarantee?  Will the USB device send a "zero packet" in order to
> show that all of the "logical" data is now sent for this specific
> endpoint?  Is there some sort of "framing" that the device does with the
> USB data so that the driver "knows" where the end of packet is?

Exactly my point.

> Check the zero-packet stuff for this device, that's tripped up many a
> USB driver writer over the years, myself included.

I haven't tripped over it myself, but only because we were careful
to allow for such in the USB drivers I have worked on.

The r8152 driver just assumes it never happens.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 01:42 PM, Greg KH wrote:
>
> Have you tried using usbmon?

This system is running rootfs over NFS, so usbmon
isn't realistically going to be usable in that scenario
without a lot of reconfiguration of the setup (which in itself
might obscure the original problem).

There is a hardware USB analyzer in the building though.

But it requires a MS-Windows machine (very scarce here, I don't have one)
for the incredibly user-unfriendly software.  I'm not sure if it can be
setup to stop the trace somehow at the right point either, as it takes
overnight runs usually to catch an occurrence of the issue.

I also seem to recall that it only exports data captures in a proprietary
format that only that brand of software/device can read, but perhaps
that might not be true.  Would still need to find a MS-Windows machine/license
to even check it out though.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 01:42 PM, Greg KH wrote:
>
> Have you tried using usbmon?

This system is running rootfs over NFS, so usbmon
isn't realistically going to be usable in that scenario
without a lot of reconfiguration of the setup (which in itself
might obscure the original problem).

There is a hardware USB analyzer in the building though.

But it requires a MS-Windows machine (very scarce here, I don't have one)
for the incredibly user-unfriendly software.  I'm not sure if it can be
setup to stop the trace somehow at the right point either, as it takes
overnight runs usually to catch an occurrence of the issue.

I also seem to recall that it only exports data captures in a proprietary
format that only that brand of software/device can read, but perhaps
that might not be true.  Would still need to find a MS-Windows machine/license
to even check it out though.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 01:34 PM, Mark Lord wrote:
>From tracing through the powerpc arch code, this is the buffer that
> is being directly DMA'd into.  And the USB layer does an invalidate_dcache
> on that entire buffer before initiating the DMA (confirmed via printk).

Slight correction:  the invalidate_dcache_range() is only done when
using kmalloc'd buffers.  I have converted the driver here
to use usb_alloc_coherent() instead, so that now gets skipped
since the memory is never cached.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 01:34 PM, Mark Lord wrote:
>From tracing through the powerpc arch code, this is the buffer that
> is being directly DMA'd into.  And the USB layer does an invalidate_dcache
> on that entire buffer before initiating the DMA (confirmed via printk).

Slight correction:  the invalidate_dcache_range() is only done when
using kmalloc'd buffers.  I have converted the driver here
to use usb_alloc_coherent() instead, so that now gets skipped
since the memory is never cached.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 12:11 PM, David Miller wrote:
> From: Mark Lord <ml...@pobox.com>
> Date: Thu, 24 Nov 2016 11:43:53 -0500
> 
>> So even if this were a platform memory coherency issue, one should
>> still never see ASCII data at the beginning of an rx buffer.
> 
> I'm not so convinced, since this is the kind of random corruption one
> would expect to see when dealing with virtual caches that have
> aliasing or similar issues.
> 
> Writes to address X that show up at address Y or not at all are
> precisely the signature of virtual cache aliasing problems.
> 
> Is it a case of the chip writing to X but the cpu is still seeing
> stale data from a previous CPU store?
> 
> For NFS the cpu is writing into the page cache, so we know that
> cpu side stores are where the ASCII text is coming from.
> 
> Now is the r8152 buffer one that the USB host controller is DMA'ing
> into directly, or is it one that SWIOMMU or similar bounce buffering
> is copying into?  In the latter case we are doing cpu stores into
> the area and the writes aren't coming from the device.

>From tracing through the powerpc arch code, this is the buffer that
is being directly DMA'd into.  And the USB layer does an invalidate_dcache
on that entire buffer before initiating the DMA (confirmed via printk).

The driver itself NEVER writes anything to that buffer,
and nobody else has a pointer to it other than the USB host controller,
so there's nothing else that can write to it either.

According to the driver writer, the chip should only ever write a fresh
rx_desc struct at the beginning of a buffer, never ASCII data.

So how does that buffer end up containing ASCII data from the NFS transfers?

The only explanation I can see, is if the URB itself contains
the data that we see in the URB buffer.  Which is what one would expect.
So for that to happen, the ethernet chip must be transferring that data.

The thing that is special about the situation here, is that the processor
is very slow (800Mhz 32-bit powerpc), and very busy elsewhere.
So it can easily fall way behind in servicing the ethernet dongle,
something that never happens with most modern faster machines.
So perhaps this results in a FIFO overflow somewhere in the chip.

We can boot/run this same machine from a USB memory stick, and nary a problem.
Ditto for other types of ethernet dongles.
But boot/run from that specific ethernet dongle, and we get regular
random segfaults from corrupted page fetches over NFS.

The only end-to-end data integrity available here is the rx checksum,
when verified by software rather than trusting it to the chip/driver.

One thought:  bulk data streams are byte streams, not packets.
Scheduling on the USB bus can break up larger transfers across
multiple in-kernel buffers.  A "real" URB buffer on USB2 is max 512 bytes.
The driver is providing 16384-byte buffers, and assumes that data will
never spill over from one such buffer to the next.
Yet the observations here consistently show otherwise.

Cheers
-- 
Mark Lord

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 12:11 PM, David Miller wrote:
> From: Mark Lord 
> Date: Thu, 24 Nov 2016 11:43:53 -0500
> 
>> So even if this were a platform memory coherency issue, one should
>> still never see ASCII data at the beginning of an rx buffer.
> 
> I'm not so convinced, since this is the kind of random corruption one
> would expect to see when dealing with virtual caches that have
> aliasing or similar issues.
> 
> Writes to address X that show up at address Y or not at all are
> precisely the signature of virtual cache aliasing problems.
> 
> Is it a case of the chip writing to X but the cpu is still seeing
> stale data from a previous CPU store?
> 
> For NFS the cpu is writing into the page cache, so we know that
> cpu side stores are where the ASCII text is coming from.
> 
> Now is the r8152 buffer one that the USB host controller is DMA'ing
> into directly, or is it one that SWIOMMU or similar bounce buffering
> is copying into?  In the latter case we are doing cpu stores into
> the area and the writes aren't coming from the device.

>From tracing through the powerpc arch code, this is the buffer that
is being directly DMA'd into.  And the USB layer does an invalidate_dcache
on that entire buffer before initiating the DMA (confirmed via printk).

The driver itself NEVER writes anything to that buffer,
and nobody else has a pointer to it other than the USB host controller,
so there's nothing else that can write to it either.

According to the driver writer, the chip should only ever write a fresh
rx_desc struct at the beginning of a buffer, never ASCII data.

So how does that buffer end up containing ASCII data from the NFS transfers?

The only explanation I can see, is if the URB itself contains
the data that we see in the URB buffer.  Which is what one would expect.
So for that to happen, the ethernet chip must be transferring that data.

The thing that is special about the situation here, is that the processor
is very slow (800Mhz 32-bit powerpc), and very busy elsewhere.
So it can easily fall way behind in servicing the ethernet dongle,
something that never happens with most modern faster machines.
So perhaps this results in a FIFO overflow somewhere in the chip.

We can boot/run this same machine from a USB memory stick, and nary a problem.
Ditto for other types of ethernet dongles.
But boot/run from that specific ethernet dongle, and we get regular
random segfaults from corrupted page fetches over NFS.

The only end-to-end data integrity available here is the rx checksum,
when verified by software rather than trusting it to the chip/driver.

One thought:  bulk data streams are byte streams, not packets.
Scheduling on the USB bus can break up larger transfers across
multiple in-kernel buffers.  A "real" URB buffer on USB2 is max 512 bytes.
The driver is providing 16384-byte buffers, and assumes that data will
never spill over from one such buffer to the next.
Yet the observations here consistently show otherwise.

Cheers
-- 
Mark Lord

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 11:43 AM, Mark Lord wrote:
..

But how does this ASCII data end up at offset zero of the rx buffer??
Not possible -- this isn't even stale data, because only an rx_desc could
be at that offset in that buffer.


Answering my own question here, I suspect it ends up there as a result
of overrunning the previous URB.  So I have updated the test copy of the driver
here now to check for that exact situation.  It's running now, but could take
hours or a day for the bug to occur again.

It seems I am being overly helpful here.

Perhaps I should have just stopped with the original regression report
(driver works in 3.12.xx, fails on all newer kernels, as a result of enabling
hardware checksums).

Had I left it there, one might reasonably expect the onus to be on the driver
developer to sort it out, with me providing retests of supplied patches as need 
be.

But I've gone WAY BEYOND that, even questioning the sanity of the platform on
which it is being used, just to avoid blaming a buggy USB dongle for some other 
issue.
And this is leading people to suspect that I really think the platform is buggy.

It isn't.   It's been running for years, with a variety of USB hardware 
attached,
and nary a problem.  Except with this r8152 dongle on kernels > 3.12.

So, yeah, the driver is fixed in our local tree, and has been for some time now.
I just was hoping that perhaps others might be interested in it too,
since the bug (whatever it is) corrupts data on the NFS server.

Cheers

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 11:43 AM, Mark Lord wrote:
..

But how does this ASCII data end up at offset zero of the rx buffer??
Not possible -- this isn't even stale data, because only an rx_desc could
be at that offset in that buffer.


Answering my own question here, I suspect it ends up there as a result
of overrunning the previous URB.  So I have updated the test copy of the driver
here now to check for that exact situation.  It's running now, but could take
hours or a day for the bug to occur again.

It seems I am being overly helpful here.

Perhaps I should have just stopped with the original regression report
(driver works in 3.12.xx, fails on all newer kernels, as a result of enabling
hardware checksums).

Had I left it there, one might reasonably expect the onus to be on the driver
developer to sort it out, with me providing retests of supplied patches as need 
be.

But I've gone WAY BEYOND that, even questioning the sanity of the platform on
which it is being used, just to avoid blaming a buggy USB dongle for some other 
issue.
And this is leading people to suspect that I really think the platform is buggy.

It isn't.   It's been running for years, with a variety of USB hardware 
attached,
and nary a problem.  Except with this r8152 dongle on kernels > 3.12.

So, yeah, the driver is fixed in our local tree, and has been for some time now.
I just was hoping that perhaps others might be interested in it too,
since the bug (whatever it is) corrupts data on the NFS server.

Cheers

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 11:21 AM, David Miller wrote:

From: Hayes Wang 
Date: Thu, 24 Nov 2016 13:26:55 +


I don't think the garbage results from our driver or device.

This is my impression with what has been presented so far as well.


It's not garbage.

The latest run with the debug code I posted here earlier just spat out this 
below.
Using coherent (guarded, non-cacheable) RX buffers, with mb() calls:

[   15.199157] r8152_check_rx_desc: rx_desc looks bad.
[   15.204270] r8152_rx_bottom: offset=0/3376 bad rx_desc
[   15.209584] r8152_dump_rx_desc: 3d435253 3034336d 202f3a30 47524154 2f3d5445 
3034336d rx_len=21075

The bad data in this case is ASCII:

"SRC=m3400:/ TARGET=/m340"

This data is what is seen in /run/mount/utab, a file that is read/written over 
NFS on each boot.

"SRC=m3400:/ TARGET=/m3400 ROOT=/ ATTRS=nolock,addr=192.168.8.1\n"

But how does this ASCII data end up at offset zero of the rx buffer??
Not possible -- this isn't even stale data, because only an rx_desc could
be at that offset in that buffer.

So even if this were a platform memory coherency issue, one should still
never see ASCII data at the beginning of an rx buffer.  The driver NEVER
writes anything to the rx buffers.  Only the USB hardware ever does.

And only the r8152 dongle/driver exhibits this issue.
Other USB dongles do not.  They *might* still have such issues,
but because they use software checksums, the bad packets are caught/rejected.

The r8152 driver, without the debug/error-checking additions, would have tried
to interpret that ASCII data as an "rx_desc", and would have interpreted the
"checksum bits" therein as "valid checksum", and the packet would have passed
through the network stack, corrupting data.

This driver worked without noticeable issues in 3.12.xx.
It hasn't worked since.  Because it now trusts the hardware checksums,
without first checking to see if noise-on-the-line or something else
has corrupted the data before receipt in the rx buffer.

Based on the above capture, I suspect a bug in the chip itself, which perhaps
is only manifest on a very slow CPU.

Nobody here tests with slow CPUs, but they are very prevalent in embedded space.
And very few people use USB network dongles nowadays either, as nearly all 
"computers"
have built-in networking.  The market for USB network dongles is mostly 
embedded space.

Ergo.

Cheers

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 11:21 AM, David Miller wrote:

From: Hayes Wang 
Date: Thu, 24 Nov 2016 13:26:55 +


I don't think the garbage results from our driver or device.

This is my impression with what has been presented so far as well.


It's not garbage.

The latest run with the debug code I posted here earlier just spat out this 
below.
Using coherent (guarded, non-cacheable) RX buffers, with mb() calls:

[   15.199157] r8152_check_rx_desc: rx_desc looks bad.
[   15.204270] r8152_rx_bottom: offset=0/3376 bad rx_desc
[   15.209584] r8152_dump_rx_desc: 3d435253 3034336d 202f3a30 47524154 2f3d5445 
3034336d rx_len=21075

The bad data in this case is ASCII:

"SRC=m3400:/ TARGET=/m340"

This data is what is seen in /run/mount/utab, a file that is read/written over 
NFS on each boot.

"SRC=m3400:/ TARGET=/m3400 ROOT=/ ATTRS=nolock,addr=192.168.8.1\n"

But how does this ASCII data end up at offset zero of the rx buffer??
Not possible -- this isn't even stale data, because only an rx_desc could
be at that offset in that buffer.

So even if this were a platform memory coherency issue, one should still
never see ASCII data at the beginning of an rx buffer.  The driver NEVER
writes anything to the rx buffers.  Only the USB hardware ever does.

And only the r8152 dongle/driver exhibits this issue.
Other USB dongles do not.  They *might* still have such issues,
but because they use software checksums, the bad packets are caught/rejected.

The r8152 driver, without the debug/error-checking additions, would have tried
to interpret that ASCII data as an "rx_desc", and would have interpreted the
"checksum bits" therein as "valid checksum", and the packet would have passed
through the network stack, corrupting data.

This driver worked without noticeable issues in 3.12.xx.
It hasn't worked since.  Because it now trusts the hardware checksums,
without first checking to see if noise-on-the-line or something else
has corrupted the data before receipt in the rx buffer.

Based on the above capture, I suspect a bug in the chip itself, which perhaps
is only manifest on a very slow CPU.

Nobody here tests with slow CPUs, but they are very prevalent in embedded space.
And very few people use USB network dongles nowadays either, as nearly all 
"computers"
have built-in networking.  The market for USB network dongles is mostly 
embedded space.

Ergo.

Cheers

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 08:26 AM, Hayes Wang wrote:
..

Besides, it doesn't seem to occur for all platforms. I have
tested the iperf more than 26 hours, and it still works fine.
I think I would get the same result on x86 or x86_64 platform.

..

x86 has near fully-coherent memory, so it is the "easy" platform
to get things working on.  But Linux supports a very diverse number
of platforms, with varying degrees of cache/memory coherency,
and it can be tricky for things to work correctly on all of them.

If you are testing with the driver as currently in 4.4.34,
then you won't even notice when things are screwing up,
because the driver just silently drops packets.
Or it passes them on without noticing that they have bad data.

Here (attached) is the instrumented driver I am using here now.
I suggest you use it or something similar when testing,
and not the stock driver.

This one has also been converted to use non-cacheable RAM for the
receive buffers -- something that is probably a Good Thing
for it to do regardless of this investigation.

It also never drops a packet without logging the event,
so we can see just how often there's an issue.

This version behaves almost perfectly here, but I am still experimenting
to see what is actually necessary, and what is not.  In particular,
there are some mb() calls I had put in there that shouldn't be required,
so I have yet to try removing them again and see what changes.

It takes at least an overnight run to pop up one or two errors,
so do expect to hear back again until after the weekend at this point.

Also, unrelated, but inside r8152_submit_rx() there is this code:

/* The rx would be stopped, so skip submitting */
if (test_bit(RTL8152_UNPLUG, >flags) ||
!test_bit(WORK_ENABLE, >flags) || !netif_carrier_ok(tp->netdev))
   return 0;

If that "return 0" statement is ever executed, doesn't it result
in the loss/leak of a buffer?

Thanks


/*
 *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 */

#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 

/* Information for net-next */
#define NETNEXT_VERSION		"08"

/* Information for net */
#define NET_VERSION		"2"

#define DRIVER_VERSION		"v1." NETNEXT_VERSION "." NET_VERSION
#define DRIVER_AUTHOR "Realtek linux nic maintainers "
#define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
#define MODULENAME "r8152"

#define R8152_PHY_ID		32

#define PLA_IDR			0xc000
#define PLA_RCR			0xc010
#define PLA_RMS			0xc016
#define PLA_RXFIFO_CTRL0	0xc0a0
#define PLA_RXFIFO_CTRL1	0xc0a4
#define PLA_RXFIFO_CTRL2	0xc0a8
#define PLA_DMY_REG0		0xc0b0
#define PLA_FMC			0xc0b4
#define PLA_CFG_WOL		0xc0b6
#define PLA_TEREDO_CFG		0xc0bc
#define PLA_MAR			0xcd00
#define PLA_BACKUP		0xd000
#define PAL_BDC_CR		0xd1a0
#define PLA_TEREDO_TIMER	0xd2cc
#define PLA_REALWOW_TIMER	0xd2e8
#define PLA_LEDSEL		0xdd90
#define PLA_LED_FEATURE		0xdd92
#define PLA_PHYAR		0xde00
#define PLA_BOOT_CTRL		0xe004
#define PLA_GPHY_INTR_IMR	0xe022
#define PLA_EEE_CR		0xe040
#define PLA_EEEP_CR		0xe080
#define PLA_MAC_PWR_CTRL	0xe0c0
#define PLA_MAC_PWR_CTRL2	0xe0ca
#define PLA_MAC_PWR_CTRL3	0xe0cc
#define PLA_MAC_PWR_CTRL4	0xe0ce
#define PLA_WDT6_CTRL		0xe428
#define PLA_TCR0		0xe610
#define PLA_TCR1		0xe612
#define PLA_MTPS		0xe615
#define PLA_TXFIFO_CTRL		0xe618
#define PLA_RSTTALLY		0xe800
#define PLA_CR			0xe813
#define PLA_CRWECR		0xe81c
#define PLA_CONFIG12		0xe81e	/* CONFIG1, CONFIG2 */
#define PLA_CONFIG34		0xe820	/* CONFIG3, CONFIG4 */
#define PLA_CONFIG5		0xe822
#define PLA_PHY_PWR		0xe84c
#define PLA_OOB_CTRL		0xe84f
#define PLA_CPCR		0xe854
#define PLA_MISC_0		0xe858
#define PLA_MISC_1		0xe85a
#define PLA_OCP_GPHY_BASE	0xe86c
#define PLA_TALLYCNT		0xe890
#define PLA_SFF_STS_7		0xe8de
#define PLA_PHYSTATUS		0xe908
#define PLA_BP_BA		0xfc26
#define PLA_BP_0		0xfc28
#define PLA_BP_1		0xfc2a
#define PLA_BP_2		0xfc2c
#define PLA_BP_3		0xfc2e
#define PLA_BP_4		0xfc30
#define PLA_BP_5		0xfc32
#define PLA_BP_6		0xfc34
#define PLA_BP_7		0xfc36
#define PLA_BP_EN		0xfc38

#define USB_USB2PHY		0xb41e
#define USB_SSPHYLINK2		0xb428
#define USB_U2P3_CTRL		0xb460
#define USB_CSR_DUMMY1		0xb464
#define USB_CSR_DUMMY2		0xb466
#define USB_DEV_STAT		0xb808
#define USB_CONNECT_TIMER	0xcbf8
#define USB_BURST_SIZE		0xcfc0
#define USB_USB_CTRL		0xd406
#define USB_PHY_CTRL		0xd408
#define USB_TX_AGG		0xd40a
#define USB_RX_BUF_TH		0xd40c
#define USB_USB_TIMER		0xd428
#define USB_RX_EARLY_TIMEOUT	0xd42c
#define USB_RX_EARLY_SIZE	0xd42e
#define USB_PM_CTRL_STATUS	0xd432
#define USB_TX_DMA		0xd434
#define USB_TOLERANCE		0xd490
#define USB_LPM_CTRL		0xd41a
#define USB_UPS_CTRL	

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-24 08:26 AM, Hayes Wang wrote:
..

Besides, it doesn't seem to occur for all platforms. I have
tested the iperf more than 26 hours, and it still works fine.
I think I would get the same result on x86 or x86_64 platform.

..

x86 has near fully-coherent memory, so it is the "easy" platform
to get things working on.  But Linux supports a very diverse number
of platforms, with varying degrees of cache/memory coherency,
and it can be tricky for things to work correctly on all of them.

If you are testing with the driver as currently in 4.4.34,
then you won't even notice when things are screwing up,
because the driver just silently drops packets.
Or it passes them on without noticing that they have bad data.

Here (attached) is the instrumented driver I am using here now.
I suggest you use it or something similar when testing,
and not the stock driver.

This one has also been converted to use non-cacheable RAM for the
receive buffers -- something that is probably a Good Thing
for it to do regardless of this investigation.

It also never drops a packet without logging the event,
so we can see just how often there's an issue.

This version behaves almost perfectly here, but I am still experimenting
to see what is actually necessary, and what is not.  In particular,
there are some mb() calls I had put in there that shouldn't be required,
so I have yet to try removing them again and see what changes.

It takes at least an overnight run to pop up one or two errors,
so do expect to hear back again until after the weekend at this point.

Also, unrelated, but inside r8152_submit_rx() there is this code:

/* The rx would be stopped, so skip submitting */
if (test_bit(RTL8152_UNPLUG, >flags) ||
!test_bit(WORK_ENABLE, >flags) || !netif_carrier_ok(tp->netdev))
   return 0;

If that "return 0" statement is ever executed, doesn't it result
in the loss/leak of a buffer?

Thanks


/*
 *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 */

#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 
#include 

/* Information for net-next */
#define NETNEXT_VERSION		"08"

/* Information for net */
#define NET_VERSION		"2"

#define DRIVER_VERSION		"v1." NETNEXT_VERSION "." NET_VERSION
#define DRIVER_AUTHOR "Realtek linux nic maintainers "
#define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
#define MODULENAME "r8152"

#define R8152_PHY_ID		32

#define PLA_IDR			0xc000
#define PLA_RCR			0xc010
#define PLA_RMS			0xc016
#define PLA_RXFIFO_CTRL0	0xc0a0
#define PLA_RXFIFO_CTRL1	0xc0a4
#define PLA_RXFIFO_CTRL2	0xc0a8
#define PLA_DMY_REG0		0xc0b0
#define PLA_FMC			0xc0b4
#define PLA_CFG_WOL		0xc0b6
#define PLA_TEREDO_CFG		0xc0bc
#define PLA_MAR			0xcd00
#define PLA_BACKUP		0xd000
#define PAL_BDC_CR		0xd1a0
#define PLA_TEREDO_TIMER	0xd2cc
#define PLA_REALWOW_TIMER	0xd2e8
#define PLA_LEDSEL		0xdd90
#define PLA_LED_FEATURE		0xdd92
#define PLA_PHYAR		0xde00
#define PLA_BOOT_CTRL		0xe004
#define PLA_GPHY_INTR_IMR	0xe022
#define PLA_EEE_CR		0xe040
#define PLA_EEEP_CR		0xe080
#define PLA_MAC_PWR_CTRL	0xe0c0
#define PLA_MAC_PWR_CTRL2	0xe0ca
#define PLA_MAC_PWR_CTRL3	0xe0cc
#define PLA_MAC_PWR_CTRL4	0xe0ce
#define PLA_WDT6_CTRL		0xe428
#define PLA_TCR0		0xe610
#define PLA_TCR1		0xe612
#define PLA_MTPS		0xe615
#define PLA_TXFIFO_CTRL		0xe618
#define PLA_RSTTALLY		0xe800
#define PLA_CR			0xe813
#define PLA_CRWECR		0xe81c
#define PLA_CONFIG12		0xe81e	/* CONFIG1, CONFIG2 */
#define PLA_CONFIG34		0xe820	/* CONFIG3, CONFIG4 */
#define PLA_CONFIG5		0xe822
#define PLA_PHY_PWR		0xe84c
#define PLA_OOB_CTRL		0xe84f
#define PLA_CPCR		0xe854
#define PLA_MISC_0		0xe858
#define PLA_MISC_1		0xe85a
#define PLA_OCP_GPHY_BASE	0xe86c
#define PLA_TALLYCNT		0xe890
#define PLA_SFF_STS_7		0xe8de
#define PLA_PHYSTATUS		0xe908
#define PLA_BP_BA		0xfc26
#define PLA_BP_0		0xfc28
#define PLA_BP_1		0xfc2a
#define PLA_BP_2		0xfc2c
#define PLA_BP_3		0xfc2e
#define PLA_BP_4		0xfc30
#define PLA_BP_5		0xfc32
#define PLA_BP_6		0xfc34
#define PLA_BP_7		0xfc36
#define PLA_BP_EN		0xfc38

#define USB_USB2PHY		0xb41e
#define USB_SSPHYLINK2		0xb428
#define USB_U2P3_CTRL		0xb460
#define USB_CSR_DUMMY1		0xb464
#define USB_CSR_DUMMY2		0xb466
#define USB_DEV_STAT		0xb808
#define USB_CONNECT_TIMER	0xcbf8
#define USB_BURST_SIZE		0xcfc0
#define USB_USB_CTRL		0xd406
#define USB_PHY_CTRL		0xd408
#define USB_TX_AGG		0xd40a
#define USB_RX_BUF_TH		0xd40c
#define USB_USB_TIMER		0xd428
#define USB_RX_EARLY_TIMEOUT	0xd42c
#define USB_RX_EARLY_SIZE	0xd42e
#define USB_PM_CTRL_STATUS	0xd432
#define USB_TX_DMA		0xd434
#define USB_TOLERANCE		0xd490
#define USB_LPM_CTRL		0xd41a
#define USB_UPS_CTRL		0xd800
#define 

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-23 02:29 PM, Mark Lord wrote:

On 16-11-23 10:12 AM, Hayes Wang wrote:

Mark Lord [ml...@pobox.com]
[...]

What does this code do:



static void r8153_set_rx_early_size(struct r8152 *tp)
{
   u32 mtu = tp->netdev->mtu;
   u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;

   ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
}


This only works for RTL8153. However, what you use is RTL8152.
It is like delay completion. It is used to reduce the loading of CPU
by letting a transfer contain more data to reduce the number of
transfers.


How is ocp_data used by the hardware?
Shouldn't the calculation also include sizeof(rx_desc) in there somewhere?


The algorithm is from our hw engineers, and it should be

   (agg_buf_sz - packet size) / 8

You could refer to commit a59e6d815226 ("r8152: correct the rx early size").


Thanks.

Right now I am working quite hard trying to narrow things down exactly.
You are correct that the driver does appear to be careful about accesses
beyond the filled portion of a URB buffer -- for some reason I thought
the original driver had issues there, but looking again it does not seem to.

One idea that is now looking more likely:
Things could be suffering from speculative CPU accesses to RAM
(the system here has non-coherent d-cache/RAM).
This could incorrectly pre-load data from adjacent URB buffers
into the d-cache, creating coherency issues.  I am testing now
with cacheline-sized guard zones between the buffers to see if
that is the issue or not.


Nope.  Guard zones did not fix it, so it's probably not a prefetch issue.
Oddly, adding a couple of memory barriers to specific places in the driver
does help, A LOT.  Still not 100%, but it did pass 1800 reboot tests over night
with only three bad rx_desc's reported.

That's a new record here for the driver using kmalloc'd buffers,
and put reliability on par with using non-cacheable buffers.

Any way we look at it though, the chip/driver are simply unreliable,
and relying upon hardware checksums (which fail due to the driver
looking at garbage rather than the checksum bits) leads to data corruption.

Cheers

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-23 02:29 PM, Mark Lord wrote:

On 16-11-23 10:12 AM, Hayes Wang wrote:

Mark Lord [ml...@pobox.com]
[...]

What does this code do:



static void r8153_set_rx_early_size(struct r8152 *tp)
{
   u32 mtu = tp->netdev->mtu;
   u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;

   ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
}


This only works for RTL8153. However, what you use is RTL8152.
It is like delay completion. It is used to reduce the loading of CPU
by letting a transfer contain more data to reduce the number of
transfers.


How is ocp_data used by the hardware?
Shouldn't the calculation also include sizeof(rx_desc) in there somewhere?


The algorithm is from our hw engineers, and it should be

   (agg_buf_sz - packet size) / 8

You could refer to commit a59e6d815226 ("r8152: correct the rx early size").


Thanks.

Right now I am working quite hard trying to narrow things down exactly.
You are correct that the driver does appear to be careful about accesses
beyond the filled portion of a URB buffer -- for some reason I thought
the original driver had issues there, but looking again it does not seem to.

One idea that is now looking more likely:
Things could be suffering from speculative CPU accesses to RAM
(the system here has non-coherent d-cache/RAM).
This could incorrectly pre-load data from adjacent URB buffers
into the d-cache, creating coherency issues.  I am testing now
with cacheline-sized guard zones between the buffers to see if
that is the issue or not.


Nope.  Guard zones did not fix it, so it's probably not a prefetch issue.
Oddly, adding a couple of memory barriers to specific places in the driver
does help, A LOT.  Still not 100%, but it did pass 1800 reboot tests over night
with only three bad rx_desc's reported.

That's a new record here for the driver using kmalloc'd buffers,
and put reliability on par with using non-cacheable buffers.

Any way we look at it though, the chip/driver are simply unreliable,
and relying upon hardware checksums (which fail due to the driver
looking at garbage rather than the checksum bits) leads to data corruption.

Cheers

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-23 10:12 AM, Hayes Wang wrote:

Mark Lord [ml...@pobox.com]
[...]

What does this code do:



static void r8153_set_rx_early_size(struct r8152 *tp)
{
   u32 mtu = tp->netdev->mtu;
   u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;

   ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
}


This only works for RTL8153. However, what you use is RTL8152.
It is like delay completion. It is used to reduce the loading of CPU
by letting a transfer contain more data to reduce the number of
transfers.


How is ocp_data used by the hardware?
Shouldn't the calculation also include sizeof(rx_desc) in there somewhere?


The algorithm is from our hw engineers, and it should be

   (agg_buf_sz - packet size) / 8

You could refer to commit a59e6d815226 ("r8152: correct the rx early size").


Thanks.

Right now I am working quite hard trying to narrow things down exactly.
You are correct that the driver does appear to be careful about accesses
beyond the filled portion of a URB buffer -- for some reason I thought
the original driver had issues there, but looking again it does not seem to.

One idea that is now looking more likely:
Things could be suffering from speculative CPU accesses to RAM
(the system here has non-coherent d-cache/RAM).
This could incorrectly pre-load data from adjacent URB buffers
into the d-cache, creating coherency issues.  I am testing now
with cacheline-sized guard zones between the buffers to see if
that is the issue or not.

Worth repeating: other dongles we have tried, eg. those using the asix driver,
do not cause us any troubles here.  Only the r8152 dongles do.

The other drivers do not use hardware checksums, so even if they did
incur similar bad packets, whatever the reason, those bad packets
would be detected/rejected by the Linux network stack (software checksums).
So everything appears to behave fine with them, as it does with
the r8152 driver when hardware checksums are disabled.

Still trying to understand exactly how these errors are happening.
It takes a very long time to do a conclusive test of anything here,
and I only have the hardware for a day or two a week.
So my apologies if I am slow in getting back to you on stuff.

Cheers

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-23 10:12 AM, Hayes Wang wrote:

Mark Lord [ml...@pobox.com]
[...]

What does this code do:



static void r8153_set_rx_early_size(struct r8152 *tp)
{
   u32 mtu = tp->netdev->mtu;
   u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;

   ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
}


This only works for RTL8153. However, what you use is RTL8152.
It is like delay completion. It is used to reduce the loading of CPU
by letting a transfer contain more data to reduce the number of
transfers.


How is ocp_data used by the hardware?
Shouldn't the calculation also include sizeof(rx_desc) in there somewhere?


The algorithm is from our hw engineers, and it should be

   (agg_buf_sz - packet size) / 8

You could refer to commit a59e6d815226 ("r8152: correct the rx early size").


Thanks.

Right now I am working quite hard trying to narrow things down exactly.
You are correct that the driver does appear to be careful about accesses
beyond the filled portion of a URB buffer -- for some reason I thought
the original driver had issues there, but looking again it does not seem to.

One idea that is now looking more likely:
Things could be suffering from speculative CPU accesses to RAM
(the system here has non-coherent d-cache/RAM).
This could incorrectly pre-load data from adjacent URB buffers
into the d-cache, creating coherency issues.  I am testing now
with cacheline-sized guard zones between the buffers to see if
that is the issue or not.

Worth repeating: other dongles we have tried, eg. those using the asix driver,
do not cause us any troubles here.  Only the r8152 dongles do.

The other drivers do not use hardware checksums, so even if they did
incur similar bad packets, whatever the reason, those bad packets
would be detected/rejected by the Linux network stack (software checksums).
So everything appears to behave fine with them, as it does with
the r8152 driver when hardware checksums are disabled.

Still trying to understand exactly how these errors are happening.
It takes a very long time to do a conclusive test of anything here,
and I only have the hardware for a day or two a week.
So my apologies if I am slow in getting back to you on stuff.

Cheers

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

What does this code do:

>static void r8153_set_rx_early_size(struct r8152 *tp)
>{
>u32 mtu = tp->netdev->mtu;
>u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
>
>ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
>}

How is ocp_data used by the hardware?
Shouldn't the calculation also include sizeof(rx_desc) in there somewhere?

Thanks
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

What does this code do:

>static void r8153_set_rx_early_size(struct r8152 *tp)
>{
>u32 mtu = tp->netdev->mtu;
>u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
>
>ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
>}

How is ocp_data used by the hardware?
Shouldn't the calculation also include sizeof(rx_desc) in there somewhere?

Thanks
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-18 07:03 AM, Mark Lord wrote:

On 16-11-18 02:57 AM, Hayes Wang wrote:
..

Besides, the maximum data length which the RTL8152 would send to
the host is 16KB. That is, if the agg_buf_sz is 16KB, the host
wouldn't split it. However, you still see problems for it.


How does the RTL8152 know that the limit is 16KB,
rather than some other number?  Is this a hardwired number
in the hardware, or is it a parameter that the software
sends to the chip during initialization?

..

The first issue is that a packet sometimes begins in one URB,
and completes in the next URB, without an rx_desc at the start
of the second URB.  This I have already reported earlier.


Long run tests over the weekend, with the invalidate_dcache_range() call
before the inner loop of r8152_rx_bottom(), turned up a few instances
where packets were truncated inside a 16384 byte URB buffer, without filling 
the URB.

[10.293228] r8152_rx_bottom: 4278 corrupted urb: head=9d21 
urb_offset=2856/3376 pkt_len(1518) exceeds remainder(496)
[10.304523] r8152_dump_rx_desc: 044805ee 4008 006005dc 0602  
 rx_len=1518
..
[   16.660431] r8152_rx_bottom: 7802 corrupted urb: head=9d1f8000 
urb_offset=1544/2064 pkt_len(1518) exceeds remainder(496)
[   16.671719] r8152_dump_rx_desc: 044805ee 4048 004005dc 46020006  
 rx_len=1518

The r8152.c driver attempted to build skb's for the entire packet size,
even though the 1518-byte packets had only 496-bytes of data in the URB.
It is not clear what the chip did with the rest of the packets in question,
but the next URBs in each case began with a new/real rx_desc and new packet.

There were also unconnected events during the test runs where the
test code noticed totally invalid rx_desc structs in the middles of URBs.
The stock driver would again have attempted to treat those as "valid" (ugh).

..
[   10.273906] r8152_check_rx_desc: rx_desc looks bad.
[   10.279012] r8152_rx_bottom: 4338 corrupted urb. head=9d21 
urb_offset=2856/3376 len_used=2880
[   10.288196] r8152_dump_rx_desc: 312e3239 382e3836 0a20382e 3d435253 3034336d 
202f3a30 rx_len=12857

..
[7.184565] r8152_check_rx_desc: rx_desc looks bad.
[7.189657] r8152_rx_bottom: 1678 corrupted urb. head=9d21 
urb_offset=2856/3376 len_used=2880
[7.198852] r8152_dump_rx_desc: a1388402 803c9001 84380810 a67c5c4c a77c782b 
c64c782b rx_len=1026
..
[   10.351251] r8152_check_rx_desc: rx_desc looks bad.
[   10.356356] r8152_rx_bottom: 4397 corrupted urb. head=9d20c000 
urb_offset=4400/7984 len_used=4424
[   10.365543] r8152_dump_rx_desc: 312e3239 382e3836 0a20382e 3d435253 3034336d 
202f3a30 rx_len=12857
..
[   10.518119] r8152_check_rx_desc: rx_desc looks bad.
[   10.523204] r8152_rx_bottom: 4458 corrupted urb. head=9d21 
urb_offset=4400/7984 len_used=4424
[   10.532416] r8152_dump_rx_desc: 54544120 6e3d5352 636f6c6f 65762c6b 343d7372 
6464612c rx_len=16672
..


But the driver, as written, sometimes accesses bytes outside
of the 16KB URB buffer, because it trusts the non-existent
rx_desc in these cases, and also because it accesses bytes
from the rx_desc without first checking whether there is
sufficient remaining space in the URB to hold an rx_desc.

These incorrect accesses sometimes touch memory outside
of the URB buffer.  Since the driver allocates all of its
rx URB buffers at once, they are highly likely to be
physically (and therefore virtually) adjacent in memory.

So mistakenly accessing beyond the end of one buffer will
often result in a read from memory of the next URB buffer.
Which causes a portion of it to be loaded in the the D-cache.

When that URB is subsequently filled by DMA, there then exists
a data-consistency issue:  the D-cache contains stale information
from before the latest DMA cycle.

So this explains the strange memory behaviour observed earlier on.
When I add a call to invalidate_dcache_range() to the driver
just before it begins examining a new rx URB, the problems go away.
So this confirms the observations.

Using non-cacheable RAM also makes the problem go away.
But neither is a fix for the real buffer overrun accesses in the driver.

Fix the "packet spans URBs" bug, and fix the driver to ALWAYS
test lengths/ranges before accessing the actual buffer,
and everything should begin working reliably.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-18 07:03 AM, Mark Lord wrote:

On 16-11-18 02:57 AM, Hayes Wang wrote:
..

Besides, the maximum data length which the RTL8152 would send to
the host is 16KB. That is, if the agg_buf_sz is 16KB, the host
wouldn't split it. However, you still see problems for it.


How does the RTL8152 know that the limit is 16KB,
rather than some other number?  Is this a hardwired number
in the hardware, or is it a parameter that the software
sends to the chip during initialization?

..

The first issue is that a packet sometimes begins in one URB,
and completes in the next URB, without an rx_desc at the start
of the second URB.  This I have already reported earlier.


Long run tests over the weekend, with the invalidate_dcache_range() call
before the inner loop of r8152_rx_bottom(), turned up a few instances
where packets were truncated inside a 16384 byte URB buffer, without filling 
the URB.

[10.293228] r8152_rx_bottom: 4278 corrupted urb: head=9d21 
urb_offset=2856/3376 pkt_len(1518) exceeds remainder(496)
[10.304523] r8152_dump_rx_desc: 044805ee 4008 006005dc 0602  
 rx_len=1518
..
[   16.660431] r8152_rx_bottom: 7802 corrupted urb: head=9d1f8000 
urb_offset=1544/2064 pkt_len(1518) exceeds remainder(496)
[   16.671719] r8152_dump_rx_desc: 044805ee 4048 004005dc 46020006  
 rx_len=1518

The r8152.c driver attempted to build skb's for the entire packet size,
even though the 1518-byte packets had only 496-bytes of data in the URB.
It is not clear what the chip did with the rest of the packets in question,
but the next URBs in each case began with a new/real rx_desc and new packet.

There were also unconnected events during the test runs where the
test code noticed totally invalid rx_desc structs in the middles of URBs.
The stock driver would again have attempted to treat those as "valid" (ugh).

..
[   10.273906] r8152_check_rx_desc: rx_desc looks bad.
[   10.279012] r8152_rx_bottom: 4338 corrupted urb. head=9d21 
urb_offset=2856/3376 len_used=2880
[   10.288196] r8152_dump_rx_desc: 312e3239 382e3836 0a20382e 3d435253 3034336d 
202f3a30 rx_len=12857

..
[7.184565] r8152_check_rx_desc: rx_desc looks bad.
[7.189657] r8152_rx_bottom: 1678 corrupted urb. head=9d21 
urb_offset=2856/3376 len_used=2880
[7.198852] r8152_dump_rx_desc: a1388402 803c9001 84380810 a67c5c4c a77c782b 
c64c782b rx_len=1026
..
[   10.351251] r8152_check_rx_desc: rx_desc looks bad.
[   10.356356] r8152_rx_bottom: 4397 corrupted urb. head=9d20c000 
urb_offset=4400/7984 len_used=4424
[   10.365543] r8152_dump_rx_desc: 312e3239 382e3836 0a20382e 3d435253 3034336d 
202f3a30 rx_len=12857
..
[   10.518119] r8152_check_rx_desc: rx_desc looks bad.
[   10.523204] r8152_rx_bottom: 4458 corrupted urb. head=9d21 
urb_offset=4400/7984 len_used=4424
[   10.532416] r8152_dump_rx_desc: 54544120 6e3d5352 636f6c6f 65762c6b 343d7372 
6464612c rx_len=16672
..


But the driver, as written, sometimes accesses bytes outside
of the 16KB URB buffer, because it trusts the non-existent
rx_desc in these cases, and also because it accesses bytes
from the rx_desc without first checking whether there is
sufficient remaining space in the URB to hold an rx_desc.

These incorrect accesses sometimes touch memory outside
of the URB buffer.  Since the driver allocates all of its
rx URB buffers at once, they are highly likely to be
physically (and therefore virtually) adjacent in memory.

So mistakenly accessing beyond the end of one buffer will
often result in a read from memory of the next URB buffer.
Which causes a portion of it to be loaded in the the D-cache.

When that URB is subsequently filled by DMA, there then exists
a data-consistency issue:  the D-cache contains stale information
from before the latest DMA cycle.

So this explains the strange memory behaviour observed earlier on.
When I add a call to invalidate_dcache_range() to the driver
just before it begins examining a new rx URB, the problems go away.
So this confirms the observations.

Using non-cacheable RAM also makes the problem go away.
But neither is a fix for the real buffer overrun accesses in the driver.

Fix the "packet spans URBs" bug, and fix the driver to ALWAYS
test lengths/ranges before accessing the actual buffer,
and everything should begin working reliably.

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-18 02:57 AM, Hayes Wang wrote:
..
> Besides, the maximum data length which the RTL8152 would send to
> the host is 16KB. That is, if the agg_buf_sz is 16KB, the host
> wouldn't split it. However, you still see problems for it.

How does the RTL8152 know that the limit is 16KB,
rather than some other number?  Is this a hardwired number
in the hardware, or is it a parameter that the software
sends to the chip during initialization?

I have a USB analyzer, but it is difficult to figure out how
to program an appropriate trigger point for the capture,
since the problem (with 16KB URBs) takes minutes to hours
or even days to trigger.

And the output from the analyzer is in some proprietary format.
The in-kernel software analzer could be useful, but I have never
figured out how to use it.  :)

Since my earlier email, I have figured out another piece of the
puzzle with this dongle.

The first issue is that a packet sometimes begins in one URB,
and completes in the next URB, without an rx_desc at the start
of the second URB.  This I have already reported earlier.

But the driver, as written, sometimes accesses bytes outside
of the 16KB URB buffer, because it trusts the non-existent
rx_desc in these cases, and also because it accesses bytes
from the rx_desc without first checking whether there is
sufficient remaining space in the URB to hold an rx_desc.

These incorrect accesses sometimes touch memory outside
of the URB buffer.  Since the driver allocates all of its
rx URB buffers at once, they are highly likely to be
physically (and therefore virtually) adjacent in memory.

So mistakenly accessing beyond the end of one buffer will
often result in a read from memory of the next URB buffer.
Which causes a portion of it to be loaded in the the D-cache.

When that URB is subsequently filled by DMA, there then exists
a data-consistency issue:  the D-cache contains stale information
from before the latest DMA cycle.

So this explains the strange memory behaviour observed earlier on.
When I add a call to invalidate_dcache_range() to the driver
just before it begins examining a new rx URB, the problems go away.
So this confirms the observations.

Using non-cacheable RAM also makes the problem go away.
But neither is a fix for the real buffer overrun accesses in the driver.

Fix the "packet spans URBs" bug, and fix the driver to ALWAYS
test lengths/ranges before accessing the actual buffer,
and everything should begin working reliably.

Cheers
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-18 02:57 AM, Hayes Wang wrote:
..
> Besides, the maximum data length which the RTL8152 would send to
> the host is 16KB. That is, if the agg_buf_sz is 16KB, the host
> wouldn't split it. However, you still see problems for it.

How does the RTL8152 know that the limit is 16KB,
rather than some other number?  Is this a hardwired number
in the hardware, or is it a parameter that the software
sends to the chip during initialization?

I have a USB analyzer, but it is difficult to figure out how
to program an appropriate trigger point for the capture,
since the problem (with 16KB URBs) takes minutes to hours
or even days to trigger.

And the output from the analyzer is in some proprietary format.
The in-kernel software analzer could be useful, but I have never
figured out how to use it.  :)

Since my earlier email, I have figured out another piece of the
puzzle with this dongle.

The first issue is that a packet sometimes begins in one URB,
and completes in the next URB, without an rx_desc at the start
of the second URB.  This I have already reported earlier.

But the driver, as written, sometimes accesses bytes outside
of the 16KB URB buffer, because it trusts the non-existent
rx_desc in these cases, and also because it accesses bytes
from the rx_desc without first checking whether there is
sufficient remaining space in the URB to hold an rx_desc.

These incorrect accesses sometimes touch memory outside
of the URB buffer.  Since the driver allocates all of its
rx URB buffers at once, they are highly likely to be
physically (and therefore virtually) adjacent in memory.

So mistakenly accessing beyond the end of one buffer will
often result in a read from memory of the next URB buffer.
Which causes a portion of it to be loaded in the the D-cache.

When that URB is subsequently filled by DMA, there then exists
a data-consistency issue:  the D-cache contains stale information
from before the latest DMA cycle.

So this explains the strange memory behaviour observed earlier on.
When I add a call to invalidate_dcache_range() to the driver
just before it begins examining a new rx URB, the problems go away.
So this confirms the observations.

Using non-cacheable RAM also makes the problem go away.
But neither is a fix for the real buffer overrun accesses in the driver.

Fix the "packet spans URBs" bug, and fix the driver to ALWAYS
test lengths/ranges before accessing the actual buffer,
and everything should begin working reliably.

Cheers
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

(resending.. not sure if the original had mailer errors)

On 16-11-16 10:36 PM, Hayes Wang wrote:
> [...]
>> Fix the hw rx checksum is always enabled, and the user couldn't switch
>> it to sw rx checksum.
>>
>> Note that the RTL_VER_01 only supports sw rx checksum only. Besides,
>> the hw rx checksum for RTL_VER_02 is disabled after
>> commit b9a321b48af4 ("r8152: Fix broken RX checksums."). Re-enable it.
>
> Excuse me. If I want to re-send this one patch, should I let
> RTL_VER_02 use rx hw checksum?

Definitely NOT.

I am still doing low-level tracing through the driver as time permits,
and just now found some really interesting evidence.

Using coherent buffers (non-cacheable, allocated with usb_alloc_coherent),
I can get it to fail extremely regularly by simply reducing the buffer size
(agg_buf_sz) from 16KB down to 4KB.   This makes reproducing the issue
much much easier -- the same problems do happen with the larger 16KB size,
but much less often than with smaller sizes.

So.. with a 4KB URB transfer_buffer size, along with a ton of added 
error-checking,
I see this behaviour every 10 (rx) URBs or so:

First URB (number 593):
[   34.260667] r8152_rx_bottom: 593 corrupted urb: head=bf014000 
urb_offset=2856/4096 pkt_len(1518) exceeds remainder(1216)
[   34.271931] r8152_dump_rx_desc: 044805ee 4008 006005dc 0602  
 rx_len=1518

Next URB (number 594):
[   34.281172] r8152_check_rx_desc: rx_desc looks bad.
[   34.286228] r8152_rx_bottom: 594 corrupted urb. head=bf018000 
urb_offset=0/304 len_used=24
[   34.294774] r8152_dump_rx_desc: 8300 8400 8500 8600 8700 
8800 rx_len=768

What the above sample shows, is the URB transfer buffer ran out of space in the 
middle
of a packet, and the hardware then tried to just continue that same packet in 
the next URB,
without an rx_desc header inserted.  The r8152.c driver always assumes the URB 
buffer begins
with an rx_desc, so of course this behaviour produces really weird effects, and 
system crashes, etc..

So until that driver bug is addressed, I would advise disabling hardware RX 
checksums
for all chip versions, not only for version 02.

It is not clear to me how the chip decides when to forward an rx URB to the 
host.
If you could describe how that part works for us, then it would help in further
understanding why fast systems (eg. a PC) don't generally notice the issue,
while much slower embedded systems do see the issue regularly.

Thanks
Mark

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

(resending.. not sure if the original had mailer errors)

On 16-11-16 10:36 PM, Hayes Wang wrote:
> [...]
>> Fix the hw rx checksum is always enabled, and the user couldn't switch
>> it to sw rx checksum.
>>
>> Note that the RTL_VER_01 only supports sw rx checksum only. Besides,
>> the hw rx checksum for RTL_VER_02 is disabled after
>> commit b9a321b48af4 ("r8152: Fix broken RX checksums."). Re-enable it.
>
> Excuse me. If I want to re-send this one patch, should I let
> RTL_VER_02 use rx hw checksum?

Definitely NOT.

I am still doing low-level tracing through the driver as time permits,
and just now found some really interesting evidence.

Using coherent buffers (non-cacheable, allocated with usb_alloc_coherent),
I can get it to fail extremely regularly by simply reducing the buffer size
(agg_buf_sz) from 16KB down to 4KB.   This makes reproducing the issue
much much easier -- the same problems do happen with the larger 16KB size,
but much less often than with smaller sizes.

So.. with a 4KB URB transfer_buffer size, along with a ton of added 
error-checking,
I see this behaviour every 10 (rx) URBs or so:

First URB (number 593):
[   34.260667] r8152_rx_bottom: 593 corrupted urb: head=bf014000 
urb_offset=2856/4096 pkt_len(1518) exceeds remainder(1216)
[   34.271931] r8152_dump_rx_desc: 044805ee 4008 006005dc 0602  
 rx_len=1518

Next URB (number 594):
[   34.281172] r8152_check_rx_desc: rx_desc looks bad.
[   34.286228] r8152_rx_bottom: 594 corrupted urb. head=bf018000 
urb_offset=0/304 len_used=24
[   34.294774] r8152_dump_rx_desc: 8300 8400 8500 8600 8700 
8800 rx_len=768

What the above sample shows, is the URB transfer buffer ran out of space in the 
middle
of a packet, and the hardware then tried to just continue that same packet in 
the next URB,
without an rx_desc header inserted.  The r8152.c driver always assumes the URB 
buffer begins
with an rx_desc, so of course this behaviour produces really weird effects, and 
system crashes, etc..

So until that driver bug is addressed, I would advise disabling hardware RX 
checksums
for all chip versions, not only for version 02.

It is not clear to me how the chip decides when to forward an rx URB to the 
host.
If you could describe how that part works for us, then it would help in further
understanding why fast systems (eg. a PC) don't generally notice the issue,
while much slower embedded systems do see the issue regularly.

Thanks
Mark

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-17 09:14 AM, Mark Lord wrote:
..

Using coherent buffers (non-cacheable, allocated with usb_alloc_coherent),


Note that the same behaviour also happens with the original kmalloc'd buffers.


I can get it to fail extremely regularly by simply reducing the buffer size
(agg_buf_sz) from 16KB down to 4KB.   This makes reproducing the issue
much much easier -- the same problems do happen with the larger 16KB size,
but much less often than with smaller sizes.


Increasing the buffer size to 64KB makes the problem much less frequent,
as one might expect.  Thus far I haven't seen it happen at all, but a longer
run (1-3 days) is needed to make sure.  This however is NOT a "fix".


So.. with a 4KB URB transfer_buffer size, along with a ton of added 
error-checking,
I see this behaviour every 10 (rx) URBs or so:

First URB (number 593):
[   34.260667] r8152_rx_bottom: 593 corrupted urb: head=bf014000 
urb_offset=2856/4096 pkt_len(1518) exceeds remainder(1216)
[   34.271931] r8152_dump_rx_desc: 044805ee 4008 006005dc 0602  
 rx_len=1518

Next URB (number 594):
[   34.281172] r8152_check_rx_desc: rx_desc looks bad.
[   34.286228] r8152_rx_bottom: 594 corrupted urb. head=bf018000 
urb_offset=0/304 len_used=24
[   34.294774] r8152_dump_rx_desc: 8300 8400 8500 8600 8700 
8800 rx_len=768

What the above sample shows, is the URB transfer buffer ran out of space in the 
middle
of a packet, and the hardware then tried to just continue that same packet in 
the next URB,
without an rx_desc header inserted.  The r8152.c driver always assumes the URB 
buffer begins
with an rx_desc, so of course this behaviour produces really weird effects, and 
system crashes, etc..

So until that driver bug is addressed, I would advise disabling hardware RX 
checksums
for all chip versions, not only for version 02.

It is not clear to me how the chip decides when to forward an rx URB to the 
host.
If you could describe how that part works for us, then it would help in further
understanding why fast systems (eg. a PC) don't generally notice the issue,
while much slower embedded systems do see the issue regularly.


That last part is critical to understanding things:
How does the chip decide that a URB is "full enough" before sending it to the 
host?
Why does a really fast host see fewer packets jammed together into a single URB 
than a slower host?

The answers will help understand if there are more bugs to be found/fixed,
or if everything is explained by what has been observed thus far.

To recap:  the hardware sometimes fills a URB to the very end, and then 
continues the
current packet at the first byte of the following URB.  The r8152.c driver does 
NOT
handle this situation; instead it always interprets the first 24 bytes of every 
URB
as an "rx_desc" structure, without any kind of sanity/validation.  This results 
in
buffer overruns (it trusts the packet length field, even though the URB is too 
small
to hold such a packet), and other semi-random behaviour.

Using software rx checksums prevents Bad Things(tm) happening from most of this,
but even that is not perfect given the severity of the bug.

Cheers

Re: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

[Mark Lord]

On 16-11-17 09:14 AM, Mark Lord wrote:
..

Using coherent buffers (non-cacheable, allocated with usb_alloc_coherent),


Note that the same behaviour also happens with the original kmalloc'd buffers.


I can get it to fail extremely regularly by simply reducing the buffer size
(agg_buf_sz) from 16KB down to 4KB.   This makes reproducing the issue
much much easier -- the same problems do happen with the larger 16KB size,
but much less often than with smaller sizes.


Increasing the buffer size to 64KB makes the problem much less frequent,
as one might expect.  Thus far I haven't seen it happen at all, but a longer
run (1-3 days) is needed to make sure.  This however is NOT a "fix".


So.. with a 4KB URB transfer_buffer size, along with a ton of added 
error-checking,
I see this behaviour every 10 (rx) URBs or so:

First URB (number 593):
[   34.260667] r8152_rx_bottom: 593 corrupted urb: head=bf014000 
urb_offset=2856/4096 pkt_len(1518) exceeds remainder(1216)
[   34.271931] r8152_dump_rx_desc: 044805ee 4008 006005dc 0602  
 rx_len=1518

Next URB (number 594):
[   34.281172] r8152_check_rx_desc: rx_desc looks bad.
[   34.286228] r8152_rx_bottom: 594 corrupted urb. head=bf018000 
urb_offset=0/304 len_used=24
[   34.294774] r8152_dump_rx_desc: 8300 8400 8500 8600 8700 
8800 rx_len=768

What the above sample shows, is the URB transfer buffer ran out of space in the 
middle
of a packet, and the hardware then tried to just continue that same packet in 
the next URB,
without an rx_desc header inserted.  The r8152.c driver always assumes the URB 
buffer begins
with an rx_desc, so of course this behaviour produces really weird effects, and 
system crashes, etc..

So until that driver bug is addressed, I would advise disabling hardware RX 
checksums
for all chip versions, not only for version 02.

It is not clear to me how the chip decides when to forward an rx URB to the 
host.
If you could describe how that part works for us, then it would help in further
understanding why fast systems (eg. a PC) don't generally notice the issue,
while much slower embedded systems do see the issue regularly.


That last part is critical to understanding things:
How does the chip decide that a URB is "full enough" before sending it to the 
host?
Why does a really fast host see fewer packets jammed together into a single URB 
than a slower host?

The answers will help understand if there are more bugs to be found/fixed,
or if everything is explained by what has been observed thus far.

To recap:  the hardware sometimes fills a URB to the very end, and then 
continues the
current packet at the first byte of the following URB.  The r8152.c driver does 
NOT
handle this situation; instead it always interprets the first 24 bytes of every 
URB
as an "rx_desc" structure, without any kind of sanity/validation.  This results 
in
buffer overruns (it trusts the packet length field, even though the URB is too 
small
to hold such a packet), and other semi-random behaviour.

Using software rx checksums prevents Bad Things(tm) happening from most of this,
but even that is not perfect given the severity of the bug.

Cheers

Re: [PATCH net 2/2] r8152: rx descriptor check

[Mark Lord]

On 16-11-13 03:34 PM, Mark Lord wrote:
>
> The system I use it with is a 32-bit ppc476, with non-coherent RAM,
> and using 16KB page sizes.
> 
> The dongle instantly becomes a lot more reliable when r8152.c is updated
> to use usb_alloc_coherent() for URB buffers, rather than kmalloc().
> 
> Not sure why that would be though, as the USB stack normally would handle
> kmalloc'd buffers just fine.  It is calling the appropriate routines,
> which boil down to invalidating the dcache lines (for inbound bulk xfers)
> as part of usb_submit_urb(), and yet the problem there persists.
> 
> It could be caused by cache-line sharing with other allocations, but that 
> seems
> unlikely as the kmalloc() size is 16384 bytes per buffer.  Perhaps the driver
> is somehow accessing the buffer space again after doing usb_submit_urb()?
> That would certainly produce this kind of behaviour.
> 
> Or maybe there's just a memory barrier missing somewhere in path.
> 
> The really weird thing is that ASIX-based dongles (which use a different 
> driver)
> don't have this problem, and yet they also use kmalloc'd buffers.
> 
> I have access to the test system only for a day or two a week,
> and it takes a few hours to do a good test as to whether something helps or 
> not.
> I'll continue to poke at it as time and New Ideas permit.

Oh, and the problems did not exist with the 3.14.xx kernels and earlier.
They began to show up when we tried 3.16.xx and all newer kernels.

The difference there is that RX checksums were enabled in hardware as of 
3.16.xx,
and thus the network stack began accepting bad packets from the r8152 driver.

I don't know if the ASIX driver uses hardware checksums or just software 
checksums.
That might explain why it is more reliable here.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 2/2] r8152: rx descriptor check

[Mark Lord]

On 16-11-13 03:34 PM, Mark Lord wrote:
>
> The system I use it with is a 32-bit ppc476, with non-coherent RAM,
> and using 16KB page sizes.
> 
> The dongle instantly becomes a lot more reliable when r8152.c is updated
> to use usb_alloc_coherent() for URB buffers, rather than kmalloc().
> 
> Not sure why that would be though, as the USB stack normally would handle
> kmalloc'd buffers just fine.  It is calling the appropriate routines,
> which boil down to invalidating the dcache lines (for inbound bulk xfers)
> as part of usb_submit_urb(), and yet the problem there persists.
> 
> It could be caused by cache-line sharing with other allocations, but that 
> seems
> unlikely as the kmalloc() size is 16384 bytes per buffer.  Perhaps the driver
> is somehow accessing the buffer space again after doing usb_submit_urb()?
> That would certainly produce this kind of behaviour.
> 
> Or maybe there's just a memory barrier missing somewhere in path.
> 
> The really weird thing is that ASIX-based dongles (which use a different 
> driver)
> don't have this problem, and yet they also use kmalloc'd buffers.
> 
> I have access to the test system only for a day or two a week,
> and it takes a few hours to do a good test as to whether something helps or 
> not.
> I'll continue to poke at it as time and New Ideas permit.

Oh, and the problems did not exist with the 3.14.xx kernels and earlier.
They began to show up when we tried 3.16.xx and all newer kernels.

The difference there is that RX checksums were enabled in hardware as of 
3.16.xx,
and thus the network stack began accepting bad packets from the r8152 driver.

I don't know if the ASIX driver uses hardware checksums or just software 
checksums.
That might explain why it is more reliable here.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 2/2] r8152: rx descriptor check

[Mark Lord]

On 16-11-13 12:39 PM, David Miller wrote:
> From: Hayes Wang <hayesw...@realtek.com>
> Date: Fri, 11 Nov 2016 15:15:41 +0800
> 
>> For some platforms, the data in memory is not the same with the one
>> from the device. That is, the data of memory is unbelievable. The
>> check is used to find out this situation.
>>
>> Signed-off-by: Hayes Wang <hayesw...@realtek.com>
> 
> I'm all for adding consistency checks, but I disagree with proceeding
> in this manner for this.
> 
> If you add this patch now, there is a much smaller likelyhood that you
> will work with a high priority to figure out _why_ this is happening.
> 
> For all we know this could be a platform bug in the DMA API for the
> systems in question.
> 
> It could also be a bug elsewhere in the driver, either in setting up
> the descriptor DMA mappings or how the chip is programmed.
> 
> Either way the true cause must be found before we start throwing
> changes like this into the driver.

I agree.

The system I use it with is a 32-bit ppc476, with non-coherent RAM,
and using 16KB page sizes.

The dongle instantly becomes a lot more reliable when r8152.c is updated
to use usb_alloc_coherent() for URB buffers, rather than kmalloc().

Not sure why that would be though, as the USB stack normally would handle
kmalloc'd buffers just fine.  It is calling the appropriate routines,
which boil down to invalidating the dcache lines (for inbound bulk xfers)
as part of usb_submit_urb(), and yet the problem there persists.

It could be caused by cache-line sharing with other allocations, but that seems
unlikely as the kmalloc() size is 16384 bytes per buffer.  Perhaps the driver
is somehow accessing the buffer space again after doing usb_submit_urb()?
That would certainly produce this kind of behaviour.

Or maybe there's just a memory barrier missing somewhere in path.

The really weird thing is that ASIX-based dongles (which use a different driver)
don't have this problem, and yet they also use kmalloc'd buffers.

I have access to the test system only for a day or two a week,
and it takes a few hours to do a good test as to whether something helps or not.
I'll continue to poke at it as time and New Ideas permit.

New Ideas welcome!
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 2/2] r8152: rx descriptor check

[Mark Lord]

On 16-11-13 12:39 PM, David Miller wrote:
> From: Hayes Wang 
> Date: Fri, 11 Nov 2016 15:15:41 +0800
> 
>> For some platforms, the data in memory is not the same with the one
>> from the device. That is, the data of memory is unbelievable. The
>> check is used to find out this situation.
>>
>> Signed-off-by: Hayes Wang 
> 
> I'm all for adding consistency checks, but I disagree with proceeding
> in this manner for this.
> 
> If you add this patch now, there is a much smaller likelyhood that you
> will work with a high priority to figure out _why_ this is happening.
> 
> For all we know this could be a platform bug in the DMA API for the
> systems in question.
> 
> It could also be a bug elsewhere in the driver, either in setting up
> the descriptor DMA mappings or how the chip is programmed.
> 
> Either way the true cause must be found before we start throwing
> changes like this into the driver.

I agree.

The system I use it with is a 32-bit ppc476, with non-coherent RAM,
and using 16KB page sizes.

The dongle instantly becomes a lot more reliable when r8152.c is updated
to use usb_alloc_coherent() for URB buffers, rather than kmalloc().

Not sure why that would be though, as the USB stack normally would handle
kmalloc'd buffers just fine.  It is calling the appropriate routines,
which boil down to invalidating the dcache lines (for inbound bulk xfers)
as part of usb_submit_urb(), and yet the problem there persists.

It could be caused by cache-line sharing with other allocations, but that seems
unlikely as the kmalloc() size is 16384 bytes per buffer.  Perhaps the driver
is somehow accessing the buffer space again after doing usb_submit_urb()?
That would certainly produce this kind of behaviour.

Or maybe there's just a memory barrier missing somewhere in path.

The really weird thing is that ASIX-based dongles (which use a different driver)
don't have this problem, and yet they also use kmalloc'd buffers.

I have access to the test system only for a day or two a week,
and it takes a few hours to do a good test as to whether something helps or not.
I'll continue to poke at it as time and New Ideas permit.

New Ideas welcome!
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 2/2] r8152: rx descriptor check

[Mark Lord]

On 16-11-11 07:13 AM, Francois Romieu wrote:
> Hayes Wang <hayesw...@realtek.com> :
>> For some platforms, the data in memory is not the same with the one
>> from the device. That is, the data of memory is unbelievable. The
>> check is used to find out this situation.
> 
> Invalid packet size corrupted receive descriptors in Realtek's device
> reminds of CVE-2009-4537.
> 
> Is the silicium of both devices different enough to prevent the same
> exploit to happen ?

I don't know if the hardware can do it, but the existing Linux device
driver regularly attempts to process huge unreal packet sizes here.
I've had to patch it to reject "packets" larger than the configured MRU.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net 2/2] r8152: rx descriptor check

[Mark Lord]

On 16-11-11 07:13 AM, Francois Romieu wrote:
> Hayes Wang  :
>> For some platforms, the data in memory is not the same with the one
>> from the device. That is, the data of memory is unbelievable. The
>> check is used to find out this situation.
> 
> Invalid packet size corrupted receive descriptors in Realtek's device
> reminds of CVE-2009-4537.
> 
> Is the silicium of both devices different enough to prevent the same
> exploit to happen ?

I don't know if the hardware can do it, but the existing Linux device
driver regularly attempts to process huge unreal packet sizes here.
I've had to patch it to reject "packets" larger than the configured MRU.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-11-09 08:09 AM, Hayes Wang wrote:
> Mark Lord [mailto:ml...@pobox.com]
..
>> The MTU/MRU on this link is the standard 1500 bytes, so a pkt_len of 2045 
>> isn't
>> valid here.
>> And the rx_desc values look an awful lot like the rx_data values that follow 
>> it.
>>
>> There's definitely more broken here than just TCP RX checksums.
> 
> I don't think it is the issue of our hw. If it happens, windows or
> other OS may have problems, too. It is like the memory issue described
> in commit 990c9b347245("Merge branch 'r8152-fixes'"). It seems that
> the data in memory is not same with the one from the device.

I am still doing long-term testing of various tweaks to the driver,
and can now confirm that changing from kmalloc() to usb_alloc_coherent()
vastly improves reliability, and re-enabling RX checksums works fine
with that change.

However, even with coherent URB buffers, I still see the occasional bad rx_desc:
like, twice in 36 hours of continuous bashing at it.

So having code in the driver to sanitize the rx_desc is essential.
My current test code (shared with Hayes already) includes validation of various
key fields of the rx_desc, and detects when the chip/driver/whatever gets 
confused.

Hopefully r8152.c will get updated to take more care before trusting
what it sees in the rx_desc fields.

Cheers
-- 
Mark Lord
ml...@pobox.com

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-11-09 08:09 AM, Hayes Wang wrote:
> Mark Lord [mailto:ml...@pobox.com]
..
>> The MTU/MRU on this link is the standard 1500 bytes, so a pkt_len of 2045 
>> isn't
>> valid here.
>> And the rx_desc values look an awful lot like the rx_data values that follow 
>> it.
>>
>> There's definitely more broken here than just TCP RX checksums.
> 
> I don't think it is the issue of our hw. If it happens, windows or
> other OS may have problems, too. It is like the memory issue described
> in commit 990c9b347245("Merge branch 'r8152-fixes'"). It seems that
> the data in memory is not same with the one from the device.

I am still doing long-term testing of various tweaks to the driver,
and can now confirm that changing from kmalloc() to usb_alloc_coherent()
vastly improves reliability, and re-enabling RX checksums works fine
with that change.

However, even with coherent URB buffers, I still see the occasional bad rx_desc:
like, twice in 36 hours of continuous bashing at it.

So having code in the driver to sanitize the rx_desc is essential.
My current test code (shared with Hayes already) includes validation of various
key fields of the rx_desc, and detects when the chip/driver/whatever gets 
confused.

Hopefully r8152.c will get updated to take more care before trusting
what it sees in the rx_desc fields.

Cheers
-- 
Mark Lord
ml...@pobox.com

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-11-04 09:50 AM, Mark Lord wrote:
> Yeah, the device or driver is definitely getting confused with rx_desc 
> structures.
> I added code to check for unlikely rx_desc values, and it found this for 
> starters:
> 
> rx_desc: 00480801 00480401 00480001 0048fc00 0048f800 0048f400 pkt_len=2045
> rx_data: 00 f0 48 00 00 ec 48 00 00 e8 48 00 00 e4 48 00 00 e0 48 00 00 dc 48 
> 00 00 d8 48 00 00 d4
> 48 00
> rx_data: 00 d0 48 00 00 cc 48 00 00 c8 48 00 00 c4 48 00 00 c0 48 00 00 bc 48 
> 00 00 b8 48 00 00 b4
> 48 00
> rx_data: 00 b0 48 00 00 ac 48 00 00 01 00 00 81 ed 00 00 00 01 00 00 00 00 00 
> 00 00 00 00 02 4d ac
> 00 00
> rx_data: 10 00 ff ff ff ff 00 00 01 28 83 d6 ff 6d 00 20 25 b1 58 1b 68 ff 00 
> 05 20 01 56 41 17 35
> 00 00
> ...
> 
> The MTU/MRU on this link is the standard 1500 bytes, so a pkt_len of 2045 
> isn't valid here.
> And the rx_desc values look an awful lot like the rx_data values that follow 
> it.
> 
> There's definitely more broken here than just TCP RX checksums.

I spent a bit more time on this again today, and made progress.
The issue seems to be stale rx buffers.
I'll discuss further offline with Hayes Wang.

-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-11-04 09:50 AM, Mark Lord wrote:
> Yeah, the device or driver is definitely getting confused with rx_desc 
> structures.
> I added code to check for unlikely rx_desc values, and it found this for 
> starters:
> 
> rx_desc: 00480801 00480401 00480001 0048fc00 0048f800 0048f400 pkt_len=2045
> rx_data: 00 f0 48 00 00 ec 48 00 00 e8 48 00 00 e4 48 00 00 e0 48 00 00 dc 48 
> 00 00 d8 48 00 00 d4
> 48 00
> rx_data: 00 d0 48 00 00 cc 48 00 00 c8 48 00 00 c4 48 00 00 c0 48 00 00 bc 48 
> 00 00 b8 48 00 00 b4
> 48 00
> rx_data: 00 b0 48 00 00 ac 48 00 00 01 00 00 81 ed 00 00 00 01 00 00 00 00 00 
> 00 00 00 00 02 4d ac
> 00 00
> rx_data: 10 00 ff ff ff ff 00 00 01 28 83 d6 ff 6d 00 20 25 b1 58 1b 68 ff 00 
> 05 20 01 56 41 17 35
> 00 00
> ...
> 
> The MTU/MRU on this link is the standard 1500 bytes, so a pkt_len of 2045 
> isn't valid here.
> And the rx_desc values look an awful lot like the rx_data values that follow 
> it.
> 
> There's definitely more broken here than just TCP RX checksums.

I spent a bit more time on this again today, and made progress.
The issue seems to be stale rx buffers.
I'll discuss further offline with Hayes Wang.

-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

Yeah, the device or driver is definitely getting confused with rx_desc 
structures.
I added code to check for unlikely rx_desc values, and it found this for 
starters:

rx_desc: 00480801 00480401 00480001 0048fc00 0048f800 0048f400 pkt_len=2045
rx_data: 00 f0 48 00 00 ec 48 00 00 e8 48 00 00 e4 48 00 00 e0 48 00 00 dc 48 
00 00 d8 48 00 00 d4 48 00
rx_data: 00 d0 48 00 00 cc 48 00 00 c8 48 00 00 c4 48 00 00 c0 48 00 00 bc 48 
00 00 b8 48 00 00 b4 48 00
rx_data: 00 b0 48 00 00 ac 48 00 00 01 00 00 81 ed 00 00 00 01 00 00 00 00 00 
00 00 00 00 02 4d ac 00 00
rx_data: 10 00 ff ff ff ff 00 00 01 28 83 d6 ff 6d 00 20 25 b1 58 1b 68 ff 00 
05 20 01 56 41 17 35 00 00
...

The MTU/MRU on this link is the standard 1500 bytes, so a pkt_len of 2045 isn't 
valid here.
And the rx_desc values look an awful lot like the rx_data values that follow it.

There's definitely more broken here than just TCP RX checksums.

-ml

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

Yeah, the device or driver is definitely getting confused with rx_desc 
structures.
I added code to check for unlikely rx_desc values, and it found this for 
starters:

rx_desc: 00480801 00480401 00480001 0048fc00 0048f800 0048f400 pkt_len=2045
rx_data: 00 f0 48 00 00 ec 48 00 00 e8 48 00 00 e4 48 00 00 e0 48 00 00 dc 48 
00 00 d8 48 00 00 d4 48 00
rx_data: 00 d0 48 00 00 cc 48 00 00 c8 48 00 00 c4 48 00 00 c0 48 00 00 bc 48 
00 00 b8 48 00 00 b4 48 00
rx_data: 00 b0 48 00 00 ac 48 00 00 01 00 00 81 ed 00 00 00 01 00 00 00 00 00 
00 00 00 00 02 4d ac 00 00
rx_data: 10 00 ff ff ff ff 00 00 01 28 83 d6 ff 6d 00 20 25 b1 58 1b 68 ff 00 
05 20 01 56 41 17 35 00 00
...

The MTU/MRU on this link is the standard 1500 bytes, so a pkt_len of 2045 isn't 
valid here.
And the rx_desc values look an awful lot like the rx_data values that follow it.

There's definitely more broken here than just TCP RX checksums.

-ml

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-11-02 02:29 PM, Mark Lord wrote:


I have poked at it some more, and thus far it appears that it is
only necessary to disable TCP rx checksums.  The system doesn't crash
when only IP/UDP checksums are enabled, but does when TCP checksums are on.

This happens regardless of whether RX_AGG is disabled or enabled,
and increasing/decreasing the number of RX URBs (RTL8152_MAX_RX)
doesn't seem to affect it.


..

I noticed that BIT(20) was not defined as anything for "opts3",
and so I added a line to rx_csum to check whether or not that bit
was ever set.

It triggered after a few thousand reset/reboot cycles with opts3
having the rather dubious looking value of an ASCII string: 0x5c7d7852.

So to me, it appears that the rx_desc's are getting mixed-up with data 
somewhere,
and when using hardware TCP checksums this doesn't get caught.  So perhaps the
checksums themselves are fine, but there's another bug (driver or hardware?)
that sneaks through when not doing software checksums.

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-11-02 02:29 PM, Mark Lord wrote:


I have poked at it some more, and thus far it appears that it is
only necessary to disable TCP rx checksums.  The system doesn't crash
when only IP/UDP checksums are enabled, but does when TCP checksums are on.

This happens regardless of whether RX_AGG is disabled or enabled,
and increasing/decreasing the number of RX URBs (RTL8152_MAX_RX)
doesn't seem to affect it.


..

I noticed that BIT(20) was not defined as anything for "opts3",
and so I added a line to rx_csum to check whether or not that bit
was ever set.

It triggered after a few thousand reset/reboot cycles with opts3
having the rather dubious looking value of an ASCII string: 0x5c7d7852.

So to me, it appears that the rx_desc's are getting mixed-up with data 
somewhere,
and when using hardware TCP checksums this doesn't get caught.  So perhaps the
checksums themselves are fine, but there's another bug (driver or hardware?)
that sneaks through when not doing software checksums.

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-11-03 04:56 AM, Hayes Wang wrote:
> Mark Lord [mailto:ml...@pobox.com]
>> Sent: Thursday, November 03, 2016 2:30 AM
>> To: Hayes Wang; David Miller
> [...]
>> I have poked at it some more, and thus far it appears that it is
>> only necessary to disable TCP rx checksums.  The system doesn't crash
>> when only IP/UDP checksums are enabled, but does when TCP checksums are on.
>>
>> This happens regardless of whether RX_AGG is disabled or enabled,
>> and increasing/decreasing the number of RX URBs (RTL8152_MAX_RX)
>> doesn't seem to affect it.
> 
> I test Raspberry Pi v1, but I couldn't boot with NFSROOT through
> both onboard nic and RTL8152. I get following error.
> 
>VFS: Unable to mount root fs via NFS, trying floppy.
>Kernel panic - not syncing: VFS: Unable to mount root fs on 
> unknown-block(2,0)
> 
> However, if I start the system without NFSROOT, I could mount the nfs fs.
> Any idea?

Rather than getting caught up in all of that,
you could then just chroot to the mounted nfs fs
at that point, and continue on from there.

Eg.  chroot /mnt/nfsxxx /bin/sh

Running from NFS is probably not necessary though.
Instead, perhaps just run md5sum on every file on the nfs fs
from the Raspberry Pi, and then repeat the md5sum's on the server,
and compare the results for errors.

The system I am using the dongle with is a custom embedded board,
but I think the important thing is that it has a slow-ish CPU,
which means it is more prone to having the on-chip RX FIFO overflow.
It is also big-endian rather than little-endian, though that seems
to be correctly handled already in the device driver.

I will try the md5sum test on an x86 box for comparison.

Cheers
-- 
Mark Lord

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-11-03 04:56 AM, Hayes Wang wrote:
> Mark Lord [mailto:ml...@pobox.com]
>> Sent: Thursday, November 03, 2016 2:30 AM
>> To: Hayes Wang; David Miller
> [...]
>> I have poked at it some more, and thus far it appears that it is
>> only necessary to disable TCP rx checksums.  The system doesn't crash
>> when only IP/UDP checksums are enabled, but does when TCP checksums are on.
>>
>> This happens regardless of whether RX_AGG is disabled or enabled,
>> and increasing/decreasing the number of RX URBs (RTL8152_MAX_RX)
>> doesn't seem to affect it.
> 
> I test Raspberry Pi v1, but I couldn't boot with NFSROOT through
> both onboard nic and RTL8152. I get following error.
> 
>VFS: Unable to mount root fs via NFS, trying floppy.
>Kernel panic - not syncing: VFS: Unable to mount root fs on 
> unknown-block(2,0)
> 
> However, if I start the system without NFSROOT, I could mount the nfs fs.
> Any idea?

Rather than getting caught up in all of that,
you could then just chroot to the mounted nfs fs
at that point, and continue on from there.

Eg.  chroot /mnt/nfsxxx /bin/sh

Running from NFS is probably not necessary though.
Instead, perhaps just run md5sum on every file on the nfs fs
from the Raspberry Pi, and then repeat the md5sum's on the server,
and compare the results for errors.

The system I am using the dongle with is a custom embedded board,
but I think the important thing is that it has a slow-ish CPU,
which means it is more prone to having the on-chip RX FIFO overflow.
It is also big-endian rather than little-endian, though that seems
to be correctly handled already in the device driver.

I will try the md5sum test on an x86 box for comparison.

Cheers
-- 
Mark Lord

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-10-31 04:14 AM, Hayes Wang wrote:

The r8152 driver has been broken since (approx) 3.16.xx
when support was added for hardware RX checksums
on newer chip versions.  Symptoms include random
segfaults and silent data corruption over NFS.

The hardware checksum logig does not work on the VER_02
dongles I have here when used with a slow embedded system CPU.
Google reveals others reporting similar issues on Raspberry Pi.

...

Our hw engineer says only VER_01 has the issue about rx checksum.
I need more information for checking it.


I have poked at it some more, and thus far it appears that it is
only necessary to disable TCP rx checksums.  The system doesn't crash
when only IP/UDP checksums are enabled, but does when TCP checksums are on.

This happens regardless of whether RX_AGG is disabled or enabled,
and increasing/decreasing the number of RX URBs (RTL8152_MAX_RX)
doesn't seem to affect it.

lsusb -vv (from an x86 system, not the failing embedded system) follows:

Bus 001 Device 004: ID 0bda:8152 Realtek Semiconductor Corp.
Device Descriptor:
  bLength18
  bDescriptorType 1
  bcdUSB   2.10
  bDeviceClass0 (Defined at Interface level)
  bDeviceSubClass 0
  bDeviceProtocol 0
  bMaxPacketSize064
  idVendor   0x0bda Realtek Semiconductor Corp.
  idProduct  0x8152
  bcdDevice   20.00
  iManufacturer   1 Realtek
  iProduct2 USB 10/100 LAN
  iSerial 3 84E71400257D
  bNumConfigurations  2
  Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength   39
bNumInterfaces  1
bConfigurationValue 1
iConfiguration  0
bmAttributes 0xa0
  (Bus Powered)
  Remote Wakeup
MaxPower  100mA
Interface Descriptor:
  bLength 9
  bDescriptorType 4
  bInterfaceNumber0
  bAlternateSetting   0
  bNumEndpoints   3
  bInterfaceClass   255 Vendor Specific Class
  bInterfaceSubClass255 Vendor Specific Subclass
  bInterfaceProtocol  0
  iInterface  0
  Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x81  EP 1 IN
bmAttributes2
  Transfer TypeBulk
  Synch Type   None
  Usage Type   Data
wMaxPacketSize 0x0200  1x 512 bytes
bInterval   0
  Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x02  EP 2 OUT
bmAttributes2
  Transfer TypeBulk
  Synch Type   None
  Usage Type   Data
wMaxPacketSize 0x0200  1x 512 bytes
bInterval   0
  Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x83  EP 3 IN
bmAttributes3
  Transfer TypeInterrupt
  Synch Type   None
  Usage Type   Data
wMaxPacketSize 0x0002  1x 2 bytes
bInterval   8
  Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength   80
bNumInterfaces  2
bConfigurationValue 2
iConfiguration  0
bmAttributes 0xa0
  (Bus Powered)
  Remote Wakeup
MaxPower  100mA
Interface Descriptor:
  bLength 9
  bDescriptorType 4
  bInterfaceNumber0
  bAlternateSetting   0
  bNumEndpoints   1
  bInterfaceClass 2 Communications
  bInterfaceSubClass  6 Ethernet Networking
  bInterfaceProtocol  0
  iInterface  5 CDC Communications Control
  CDC Header:
bcdCDC   1.10
  CDC Union:
bMasterInterface0
bSlaveInterface 1
  CDC Ethernet:
iMacAddress  3 84E71400257D
bmEthernetStatistics0x
wMaxSegmentSize   1514
wNumberMCFilters0x
bNumberPowerFilters  0
  Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x83  EP 3 IN
bmAttributes3
  Transfer TypeInterrupt
  Synch Type   None
  Usage Type   Data
wMaxPacketSize 0x0010  1x 16 bytes
bInterval   8
Interface Descriptor:
  bLength 9
  bDescriptorType 4
  bInterfaceNumber1
  bAlternateSetting   0
  bNumEndpoints   0
  

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-10-31 04:14 AM, Hayes Wang wrote:

The r8152 driver has been broken since (approx) 3.16.xx
when support was added for hardware RX checksums
on newer chip versions.  Symptoms include random
segfaults and silent data corruption over NFS.

The hardware checksum logig does not work on the VER_02
dongles I have here when used with a slow embedded system CPU.
Google reveals others reporting similar issues on Raspberry Pi.

...

Our hw engineer says only VER_01 has the issue about rx checksum.
I need more information for checking it.


I have poked at it some more, and thus far it appears that it is
only necessary to disable TCP rx checksums.  The system doesn't crash
when only IP/UDP checksums are enabled, but does when TCP checksums are on.

This happens regardless of whether RX_AGG is disabled or enabled,
and increasing/decreasing the number of RX URBs (RTL8152_MAX_RX)
doesn't seem to affect it.

lsusb -vv (from an x86 system, not the failing embedded system) follows:

Bus 001 Device 004: ID 0bda:8152 Realtek Semiconductor Corp.
Device Descriptor:
  bLength18
  bDescriptorType 1
  bcdUSB   2.10
  bDeviceClass0 (Defined at Interface level)
  bDeviceSubClass 0
  bDeviceProtocol 0
  bMaxPacketSize064
  idVendor   0x0bda Realtek Semiconductor Corp.
  idProduct  0x8152
  bcdDevice   20.00
  iManufacturer   1 Realtek
  iProduct2 USB 10/100 LAN
  iSerial 3 84E71400257D
  bNumConfigurations  2
  Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength   39
bNumInterfaces  1
bConfigurationValue 1
iConfiguration  0
bmAttributes 0xa0
  (Bus Powered)
  Remote Wakeup
MaxPower  100mA
Interface Descriptor:
  bLength 9
  bDescriptorType 4
  bInterfaceNumber0
  bAlternateSetting   0
  bNumEndpoints   3
  bInterfaceClass   255 Vendor Specific Class
  bInterfaceSubClass255 Vendor Specific Subclass
  bInterfaceProtocol  0
  iInterface  0
  Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x81  EP 1 IN
bmAttributes2
  Transfer TypeBulk
  Synch Type   None
  Usage Type   Data
wMaxPacketSize 0x0200  1x 512 bytes
bInterval   0
  Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x02  EP 2 OUT
bmAttributes2
  Transfer TypeBulk
  Synch Type   None
  Usage Type   Data
wMaxPacketSize 0x0200  1x 512 bytes
bInterval   0
  Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x83  EP 3 IN
bmAttributes3
  Transfer TypeInterrupt
  Synch Type   None
  Usage Type   Data
wMaxPacketSize 0x0002  1x 2 bytes
bInterval   8
  Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength   80
bNumInterfaces  2
bConfigurationValue 2
iConfiguration  0
bmAttributes 0xa0
  (Bus Powered)
  Remote Wakeup
MaxPower  100mA
Interface Descriptor:
  bLength 9
  bDescriptorType 4
  bInterfaceNumber0
  bAlternateSetting   0
  bNumEndpoints   1
  bInterfaceClass 2 Communications
  bInterfaceSubClass  6 Ethernet Networking
  bInterfaceProtocol  0
  iInterface  5 CDC Communications Control
  CDC Header:
bcdCDC   1.10
  CDC Union:
bMasterInterface0
bSlaveInterface 1
  CDC Ethernet:
iMacAddress  3 84E71400257D
bmEthernetStatistics0x
wMaxSegmentSize   1514
wNumberMCFilters0x
bNumberPowerFilters  0
  Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x83  EP 3 IN
bmAttributes3
  Transfer TypeInterrupt
  Synch Type   None
  Usage Type   Data
wMaxPacketSize 0x0010  1x 16 bytes
bInterval   8
Interface Descriptor:
  bLength 9
  bDescriptorType 4
  bInterfaceNumber1
  bAlternateSetting   0
  bNumEndpoints   0
  

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-10-31 04:14 AM, Hayes Wang wrote:
>
> Our hw engineer says only VER_01 has the issue about rx checksum.
> I need more information for checking it.

I've been doing driver work for Linux since 1991,
and learned long ago not to trust engineering specs 100%.

Get yourself a Raspberry Pi v1, set up an NFSROOT root filesystem for it,
and boot/run from that using the ethernet dongle to connect.

It should segfault like crazy when hardware RX checksums are enabled.

Definitely something wrong there, and whatever it is goes away
when RX checksums are disabled in the driver.

I have two theories as to why this happens:

1) The hardware buffer on the dongle overflows because the slow host CPU
does not empty it quickly enough.  This results in a bad checksum on the
final/truncated packet in the buffer.  The chip does not detect this.

2) Perhaps the device driver is looking at the wrong bits.

Either way, this results in data corruption and until otherwise fixed,
it is safest to just not enable RX checksums.

If it happens on a slow embedded CPU, then it can also happen on a heavily
loaded Intel/AMD CPU -- just a lot less frequently.

Cheers
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-10-31 04:14 AM, Hayes Wang wrote:
>
> Our hw engineer says only VER_01 has the issue about rx checksum.
> I need more information for checking it.

I've been doing driver work for Linux since 1991,
and learned long ago not to trust engineering specs 100%.

Get yourself a Raspberry Pi v1, set up an NFSROOT root filesystem for it,
and boot/run from that using the ethernet dongle to connect.

It should segfault like crazy when hardware RX checksums are enabled.

Definitely something wrong there, and whatever it is goes away
when RX checksums are disabled in the driver.

I have two theories as to why this happens:

1) The hardware buffer on the dongle overflows because the slow host CPU
does not empty it quickly enough.  This results in a bad checksum on the
final/truncated packet in the buffer.  The chip does not detect this.

2) Perhaps the device driver is looking at the wrong bits.

Either way, this results in data corruption and until otherwise fixed,
it is safest to just not enable RX checksums.

If it happens on a slow embedded CPU, then it can also happen on a heavily
loaded Intel/AMD CPU -- just a lot less frequently.

Cheers
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-10-30 08:57 PM, David Miller wrote:
> From: Mark Lord <ml...@pobox.com>
> Date: Sun, 30 Oct 2016 19:28:27 -0400
> 
>> The r8152 driver has been broken since (approx) 3.16.xx
>> when support was added for hardware RX checksums
>> on newer chip versions.  Symptoms include random
>> segfaults and silent data corruption over NFS.
>>
>> The hardware checksum logig does not work on the VER_02
>> dongles I have here when used with a slow embedded system CPU.
>> Google reveals others reporting similar issues on Raspberry Pi.
>>
>> So, disable hardware RX checksum support for VER_02, and fix
>> an obvious coding error for IPV6 checksums in the same function.
>>
>> Because this bug results in silent data corruption,
>> it is a good candidate for back-porting to -stable >= 3.16.xx.
>>
>> Signed-off-by: Mark Lord <ml...@pobox.com>
> 
> Applied and queued up for -stable, thanks.

Thanks.  Now that this is taken care of, I do wonder if perhaps
RX checksums ought to be enabled at all for ANY versions of this chip?

My theory is that the checksums probably work okay most of the time,
except when the hardware RX buffer overflows.

In my case, and in the case of the Raspberry Pi, the receiving CPU
is quite a bit slower than mainstream x86, so it can quite easily
fall behind in emptying the RX buffer on the chip.
The only indication this has happened may be an incorrect RX checksum.

This is only a theory, but I otherwise have trouble explaining
why we are seeing invalid RX checksums -- direct cable connections
to a switch, shared only with the NFS server.  No reason for it
to have bad RX checksums in the first place.

Should we just blanket disable RX checksums for all versions here
unless proven otherwise/safe?

Anyone out there know better?

Cheers
Mark

Re: [PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

On 16-10-30 08:57 PM, David Miller wrote:
> From: Mark Lord 
> Date: Sun, 30 Oct 2016 19:28:27 -0400
> 
>> The r8152 driver has been broken since (approx) 3.16.xx
>> when support was added for hardware RX checksums
>> on newer chip versions.  Symptoms include random
>> segfaults and silent data corruption over NFS.
>>
>> The hardware checksum logig does not work on the VER_02
>> dongles I have here when used with a slow embedded system CPU.
>> Google reveals others reporting similar issues on Raspberry Pi.
>>
>> So, disable hardware RX checksum support for VER_02, and fix
>> an obvious coding error for IPV6 checksums in the same function.
>>
>> Because this bug results in silent data corruption,
>> it is a good candidate for back-porting to -stable >= 3.16.xx.
>>
>> Signed-off-by: Mark Lord 
> 
> Applied and queued up for -stable, thanks.

Thanks.  Now that this is taken care of, I do wonder if perhaps
RX checksums ought to be enabled at all for ANY versions of this chip?

My theory is that the checksums probably work okay most of the time,
except when the hardware RX buffer overflows.

In my case, and in the case of the Raspberry Pi, the receiving CPU
is quite a bit slower than mainstream x86, so it can quite easily
fall behind in emptying the RX buffer on the chip.
The only indication this has happened may be an incorrect RX checksum.

This is only a theory, but I otherwise have trouble explaining
why we are seeing invalid RX checksums -- direct cable connections
to a switch, shared only with the NFS server.  No reason for it
to have bad RX checksums in the first place.

Should we just blanket disable RX checksums for all versions here
unless proven otherwise/safe?

Anyone out there know better?

Cheers
Mark

[PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

The r8152 driver has been broken since (approx) 3.16.xx
when support was added for hardware RX checksums
on newer chip versions.  Symptoms include random
segfaults and silent data corruption over NFS.

The hardware checksum logig does not work on the VER_02
dongles I have here when used with a slow embedded system CPU.
Google reveals others reporting similar issues on Raspberry Pi.

So, disable hardware RX checksum support for VER_02, and fix
an obvious coding error for IPV6 checksums in the same function.

Because this bug results in silent data corruption,
it is a good candidate for back-porting to -stable >= 3.16.xx.

Signed-off-by: Mark Lord <ml...@pobox.com>

--- old/drivers/net/usb/r8152.c 2016-09-30 04:20:43.0 -0400
+++ linux/drivers/net/usb/r8152.c   2016-10-26 14:15:44.932517676 -0400
@@ -1645,7 +1645,7 @@
u8 checksum = CHECKSUM_NONE;
u32 opts2, opts3;

-   if (tp->version == RTL_VER_01)
+   if (tp->version == RTL_VER_01 || tp->version == RTL_VER_02)
goto return_result;

opts2 = le32_to_cpu(rx_desc->opts2);
@@ -1660,7 +1660,7 @@
checksum = CHECKSUM_NONE;
else
checksum = CHECKSUM_UNNECESSARY;
-   } else if (RD_IPV6_CS) {
+   } else if (opts2 & RD_IPV6_CS) {
if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
checksum = CHECKSUM_UNNECESSARY;
else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))

[PATCH net] r8152: Fix broken RX checksums.

[Mark Lord]

The r8152 driver has been broken since (approx) 3.16.xx
when support was added for hardware RX checksums
on newer chip versions.  Symptoms include random
segfaults and silent data corruption over NFS.

The hardware checksum logig does not work on the VER_02
dongles I have here when used with a slow embedded system CPU.
Google reveals others reporting similar issues on Raspberry Pi.

So, disable hardware RX checksum support for VER_02, and fix
an obvious coding error for IPV6 checksums in the same function.

Because this bug results in silent data corruption,
it is a good candidate for back-porting to -stable >= 3.16.xx.

Signed-off-by: Mark Lord 

--- old/drivers/net/usb/r8152.c 2016-09-30 04:20:43.0 -0400
+++ linux/drivers/net/usb/r8152.c   2016-10-26 14:15:44.932517676 -0400
@@ -1645,7 +1645,7 @@
u8 checksum = CHECKSUM_NONE;
u32 opts2, opts3;

-   if (tp->version == RTL_VER_01)
+   if (tp->version == RTL_VER_01 || tp->version == RTL_VER_02)
goto return_result;

opts2 = le32_to_cpu(rx_desc->opts2);
@@ -1660,7 +1660,7 @@
checksum = CHECKSUM_NONE;
else
checksum = CHECKSUM_UNNECESSARY;
-   } else if (RD_IPV6_CS) {
+   } else if (opts2 & RD_IPV6_CS) {
if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
checksum = CHECKSUM_UNNECESSARY;
else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))

Re: [PATCH] drivers/net/usb/r8152 fix broken rx checksums

[Mark Lord]

On 16-10-26 06:36 PM, Mark Lord wrote:

The r8152 driver has been broken since (approx) 3.6.16,


Correction:  broken since 3.16.xx.


when support was added for hardware rx checksum on newer chip versions.
Symptoms include random segfaults and silent data corruption over NFS.

This does not work on the VER_02 dongle I have here
when used with a slow embedded system CPU.
Google reveals others reporting similar issues on Raspberry Pi.

So, disable hardware rx checksum for VER_02, and fix
an obvious coding error for IPV6 checksums in the same function.

Because this bug results in silent data corruption,
it is a good candidate for back-porting to -stable >= 3.16.xx.
Patch attached (to deal with buggy mailer) and also below for review.

Signed-off-by: Mark Lord <ml...@pobox.com>

--- old/drivers/net/usb/r8152.c2016-09-30 04:20:43.0 -0400
+++ linux/drivers/net/usb/r8152.c2016-10-26 14:15:44.932517676 -0400
@@ -1645,7 +1645,7 @@
 u8 checksum = CHECKSUM_NONE;
 u32 opts2, opts3;

-if (tp->version == RTL_VER_01)
+if (tp->version == RTL_VER_01 || tp->version == RTL_VER_02)
 goto return_result;

 opts2 = le32_to_cpu(rx_desc->opts2);
@@ -1660,7 +1660,7 @@
 checksum = CHECKSUM_NONE;
 else
 checksum = CHECKSUM_UNNECESSARY;
-} else if (RD_IPV6_CS) {
+} else if (opts2 & RD_IPV6_CS) {
 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
 checksum = CHECKSUM_UNNECESSARY;
 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))



--
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

Re: [PATCH] drivers/net/usb/r8152 fix broken rx checksums

[Mark Lord]

On 16-10-26 06:36 PM, Mark Lord wrote:

The r8152 driver has been broken since (approx) 3.6.16,


Correction:  broken since 3.16.xx.


when support was added for hardware rx checksum on newer chip versions.
Symptoms include random segfaults and silent data corruption over NFS.

This does not work on the VER_02 dongle I have here
when used with a slow embedded system CPU.
Google reveals others reporting similar issues on Raspberry Pi.

So, disable hardware rx checksum for VER_02, and fix
an obvious coding error for IPV6 checksums in the same function.

Because this bug results in silent data corruption,
it is a good candidate for back-porting to -stable >= 3.16.xx.
Patch attached (to deal with buggy mailer) and also below for review.

Signed-off-by: Mark Lord 

--- old/drivers/net/usb/r8152.c2016-09-30 04:20:43.0 -0400
+++ linux/drivers/net/usb/r8152.c2016-10-26 14:15:44.932517676 -0400
@@ -1645,7 +1645,7 @@
 u8 checksum = CHECKSUM_NONE;
 u32 opts2, opts3;

-if (tp->version == RTL_VER_01)
+if (tp->version == RTL_VER_01 || tp->version == RTL_VER_02)
 goto return_result;

 opts2 = le32_to_cpu(rx_desc->opts2);
@@ -1660,7 +1660,7 @@
 checksum = CHECKSUM_NONE;
 else
 checksum = CHECKSUM_UNNECESSARY;
-} else if (RD_IPV6_CS) {
+} else if (opts2 & RD_IPV6_CS) {
 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
 checksum = CHECKSUM_UNNECESSARY;
 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))



--
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com

[PATCH] drivers/net/usb/r8152 fix broken rx checksums

[Mark Lord]

The r8152 driver has been broken since (approx) 3.6.16,
when support was added for hardware rx checksum on newer chip versions.
Symptoms include random segfaults and silent data corruption over NFS.

This does not work on the VER_02 dongle I have here
when used with a slow embedded system CPU.
Google reveals others reporting similar issues on Raspberry Pi.

So, disable hardware rx checksum for VER_02, and fix
an obvious coding error for IPV6 checksums in the same function.

Because this bug results in silent data corruption,
it is a good candidate for back-porting to -stable >= 3.16.xx.
Patch attached (to deal with buggy mailer) and also below for review.

Signed-off-by: Mark Lord <ml...@pobox.com>

--- old/drivers/net/usb/r8152.c 2016-09-30 04:20:43.0 -0400
+++ linux/drivers/net/usb/r8152.c   2016-10-26 14:15:44.932517676 -0400
@@ -1645,7 +1645,7 @@
u8 checksum = CHECKSUM_NONE;
u32 opts2, opts3;

-   if (tp->version == RTL_VER_01)
+   if (tp->version == RTL_VER_01 || tp->version == RTL_VER_02)
goto return_result;

opts2 = le32_to_cpu(rx_desc->opts2);
@@ -1660,7 +1660,7 @@
checksum = CHECKSUM_NONE;
else
checksum = CHECKSUM_UNNECESSARY;
-   } else if (RD_IPV6_CS) {
+   } else if (opts2 & RD_IPV6_CS) {
if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
checksum = CHECKSUM_UNNECESSARY;
else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
The r8152 driver has been broken since (approx) 3.6.16,
when support was added for hardware rx checksum on newer chip versions.
Symptoms include random segfaults and silent data corruption over NFS.

This does not work on the VER_02 dongle I have here
when used with a slow embedded system CPU.
Google reveals others reporting similar issues on Raspberry Pi.

So, disable hardware rx checksum for VER_02, and fix
an obvious coding error for IPV6 checksums in the same function.

Because this bug results in silent data corruption,
it is a good candidate for back-porting to -stable >= 3.16.xx.

Signed-off-by: Mark Lord <ml...@pobox.com>

--- old/drivers/net/usb/r8152.c	2016-09-30 04:20:43.0 -0400
+++ linux/drivers/net/usb/r8152.c	2016-10-26 14:15:44.932517676 -0400
@@ -1645,7 +1645,7 @@
 	u8 checksum = CHECKSUM_NONE;
 	u32 opts2, opts3;
 
-	if (tp->version == RTL_VER_01)
+	if (tp->version == RTL_VER_01 || tp->version == RTL_VER_02)
 		goto return_result;
 
 	opts2 = le32_to_cpu(rx_desc->opts2);
@@ -1660,7 +1660,7 @@
 			checksum = CHECKSUM_NONE;
 		else
 			checksum = CHECKSUM_UNNECESSARY;
-	} else if (RD_IPV6_CS) {
+	} else if (opts2 & RD_IPV6_CS) {
 		if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
 			checksum = CHECKSUM_UNNECESSARY;
 		else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))

[PATCH] drivers/net/usb/r8152 fix broken rx checksums

[Mark Lord]

The r8152 driver has been broken since (approx) 3.6.16,
when support was added for hardware rx checksum on newer chip versions.
Symptoms include random segfaults and silent data corruption over NFS.

This does not work on the VER_02 dongle I have here
when used with a slow embedded system CPU.
Google reveals others reporting similar issues on Raspberry Pi.

So, disable hardware rx checksum for VER_02, and fix
an obvious coding error for IPV6 checksums in the same function.

Because this bug results in silent data corruption,
it is a good candidate for back-porting to -stable >= 3.16.xx.
Patch attached (to deal with buggy mailer) and also below for review.

Signed-off-by: Mark Lord 

--- old/drivers/net/usb/r8152.c 2016-09-30 04:20:43.0 -0400
+++ linux/drivers/net/usb/r8152.c   2016-10-26 14:15:44.932517676 -0400
@@ -1645,7 +1645,7 @@
u8 checksum = CHECKSUM_NONE;
u32 opts2, opts3;

-   if (tp->version == RTL_VER_01)
+   if (tp->version == RTL_VER_01 || tp->version == RTL_VER_02)
goto return_result;

opts2 = le32_to_cpu(rx_desc->opts2);
@@ -1660,7 +1660,7 @@
checksum = CHECKSUM_NONE;
else
checksum = CHECKSUM_UNNECESSARY;
-   } else if (RD_IPV6_CS) {
+   } else if (opts2 & RD_IPV6_CS) {
if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
checksum = CHECKSUM_UNNECESSARY;
else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
The r8152 driver has been broken since (approx) 3.6.16,
when support was added for hardware rx checksum on newer chip versions.
Symptoms include random segfaults and silent data corruption over NFS.

This does not work on the VER_02 dongle I have here
when used with a slow embedded system CPU.
Google reveals others reporting similar issues on Raspberry Pi.

So, disable hardware rx checksum for VER_02, and fix
an obvious coding error for IPV6 checksums in the same function.

Because this bug results in silent data corruption,
it is a good candidate for back-porting to -stable >= 3.16.xx.

Signed-off-by: Mark Lord 

--- old/drivers/net/usb/r8152.c	2016-09-30 04:20:43.0 -0400
+++ linux/drivers/net/usb/r8152.c	2016-10-26 14:15:44.932517676 -0400
@@ -1645,7 +1645,7 @@
 	u8 checksum = CHECKSUM_NONE;
 	u32 opts2, opts3;
 
-	if (tp->version == RTL_VER_01)
+	if (tp->version == RTL_VER_01 || tp->version == RTL_VER_02)
 		goto return_result;
 
 	opts2 = le32_to_cpu(rx_desc->opts2);
@@ -1660,7 +1660,7 @@
 			checksum = CHECKSUM_NONE;
 		else
 			checksum = CHECKSUM_UNNECESSARY;
-	} else if (RD_IPV6_CS) {
+	} else if (opts2 & RD_IPV6_CS) {
 		if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
 			checksum = CHECKSUM_UNNECESSARY;
 		else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))

Re: [PATCH v2] libata: add support for NCQ commands for SG interface

[Mark Lord]

On 15-10-27 01:49 AM, vinayak.k...@gmail.com wrote:

From: Vinayak Kale 

This patch is needed to make NCQ commands with FPDMA protocol value
(eg READ/WRITE FPDMA) work over SCSI Generic (SG) interface.

..

+   /* For NCQ commands with FPDMA protocol, copy the tag value */
+   if (tf->protocol == ATA_PROT_NCQ)
+   tf->nsect = qc->tag << 3;
+



What prevents the qc-tag value here from conflicting with in-flight I/O
using the exact same qc-tag ??
--
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Please read the FAQ at  http://www.tux.org/lkml/

Re: [PATCH v2] libata: add support for NCQ commands for SG interface

[Mark Lord]

On 15-10-27 01:49 AM, vinayak.k...@gmail.com wrote:

From: Vinayak Kale 

This patch is needed to make NCQ commands with FPDMA protocol value
(eg READ/WRITE FPDMA) work over SCSI Generic (SG) interface.

..

+   /* For NCQ commands with FPDMA protocol, copy the tag value */
+   if (tf->protocol == ATA_PROT_NCQ)
+   tf->nsect = qc->tag << 3;
+



What prevents the qc-tag value here from conflicting with in-flight I/O
using the exact same qc-tag ??
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Re: linux: sata_nv: adma support

[Mark Lord]

On 15-08-01 09:45 PM, Robert Hancock wrote:

On Sat, Aug 1, 2015 at 2:09 PM, Pali Rohár  wrote:

On Thursday 25 December 2014 07:22:13 Robert Hancock wrote:

On Tue, Dec 23, 2014 at 1:51 PM, Pali Rohár 
wrote:

Hello,

I have nvidia nforce4 motherboard with nvidia sata controller:

..

It looks like something is trying to issue a command to disable APM
power management on the drive, and the command fails (likely because
it doesn't support that command).

..

  /sbin/hdparm -B254 $DRIVE

And that -B254 cause above error message in dmesg log. Output from
hdparm is:

  /dev/sda:
   setting Advanced Power Management level to 0xfe (254)
   APM_level  = not supported

..

  $ sudo hdparm -I /dev/sda | grep -i power
 *Power Management feature set


That's not the same as APM ("Advanced" Power Management).


However, these NVIDIA SATAs are black boxes, and rather buggy ones at that,
so it's possible there's an unknown issue there.


I wonder if NVIDIA simply bought out the IP from Pacific Digital
when they went bust?  Pacific Digital invented the original "ADMA",
and the pdc_adma.c driver in the kernel knows all about it.
If the IP is pretty similar (identical?) then we could probably
improve things.

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Re: linux: sata_nv: adma support

[Mark Lord]

On 15-08-01 09:45 PM, Robert Hancock wrote:

On Sat, Aug 1, 2015 at 2:09 PM, Pali Rohár pali.ro...@gmail.com wrote:

On Thursday 25 December 2014 07:22:13 Robert Hancock wrote:

On Tue, Dec 23, 2014 at 1:51 PM, Pali Rohár pali.ro...@gmail.com
wrote:

Hello,

I have nvidia nforce4 motherboard with nvidia sata controller:

..

It looks like something is trying to issue a command to disable APM
power management on the drive, and the command fails (likely because
it doesn't support that command).

..

  /sbin/hdparm -B254 $DRIVE

And that -B254 cause above error message in dmesg log. Output from
hdparm is:

  /dev/sda:
   setting Advanced Power Management level to 0xfe (254)
   APM_level  = not supported

..

  $ sudo hdparm -I /dev/sda | grep -i power
 *Power Management feature set


That's not the same as APM (Advanced Power Management).


However, these NVIDIA SATAs are black boxes, and rather buggy ones at that,
so it's possible there's an unknown issue there.


I wonder if NVIDIA simply bought out the IP from Pacific Digital
when they went bust?  Pacific Digital invented the original ADMA,
and the pdc_adma.c driver in the kernel knows all about it.
If the IP is pretty similar (identical?) then we could probably
improve things.

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Re: linux-3.14 nfsd regression

[Mark Lord]

On 14-04-04 09:58 AM, J. Bruce Fields wrote:
> On Thu, Apr 03, 2014 at 07:21:46PM -0400, Jeff Layton wrote:
>> So according to the RFC you have to encode both the mode bits and the
>> ftype for v2. The type bits seem to be removed from the mode in NFSv3
>> though, so perhaps we should only be doing that masking in versions
>> above v2?
> 
> Right, the problematic patch applied the same mask in both v2 and v3
> cases, so I'm reverting just the v2 part (see below).
> 
>> With a quick check, it looks like the v3 code doesn't rely on those bits
>> and I imagine v4 doesn't either.
>>
>> It might also be nice to have the client v2 decode_fattr function to
>> throw a warning if the server sends us mismatched type bits and ftype
>> values. That would have helped us catch this sooner...
> 
> Yes, that might be a reasonable thing to do, though I don't know if it's
> worth it.
> 
> --b.
> 
> commit 35a8dff14e76c00e5b52140290cfb498dc2454a0
> Author: J. Bruce Fields 
> Date:   Thu Apr 3 15:10:35 2014 -0400
> 
> nfsd: revert v2 half of "nfsd: don't return high mode bits"
> 
>     This reverts the part of commit 6e14b46b91fee8a049b0940333ce13a820beaaa5
> that changes NFSv2 behavior.
> 
> Mark Lord found that it broke nfs-root for Linux clients, because it
> broke NFSv2.
> 
> In fact, from RFC 1094:
> 
>   "Notice that the file type is specified both in the mode bits
>   and in the file type.  This is really a bug in the protocol and
>   will be fixed in future versions."
> 
> So NFSv2 clients really are expected to depend on the high bits of the
> mode.
> 
> Cc: sta...@kernel.org
> Reported-by: Mark Lord 
> Signed-off-by: J. Bruce Fields 
> 
> diff --git a/fs/nfsd/nfsxdr.c b/fs/nfsd/nfsxdr.c
> index b17d932..9c769a4 100644
> --- a/fs/nfsd/nfsxdr.c
> +++ b/fs/nfsd/nfsxdr.c
> @@ -152,7 +152,7 @@ encode_fattr(struct svc_rqst *rqstp, __be32 *p, struct 
> svc_fh *fhp,
>   type = (stat->mode & S_IFMT);
>  
>   *p++ = htonl(nfs_ftypes[type >> 12]);
> - *p++ = htonl((u32) (stat->mode & S_IALLUGO));
> + *p++ = htonl((u32) stat->mode);
>   *p++ = htonl((u32) stat->nlink);
>   *p++ = htonl((u32) from_kuid(_user_ns, stat->uid));
>   *p++ = htonl((u32) from_kgid(_user_ns, stat->gid));
> 


Still a regression in 3.14.2 now.
Anyone got plans to push this patch out to mainline, as well as +stable ?

-- 
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Real-Time Remedies Inc.
ml...@pobox.com
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Re: linux-3.14 nfsd regression

[Mark Lord]

On 14-04-04 09:58 AM, J. Bruce Fields wrote:
 On Thu, Apr 03, 2014 at 07:21:46PM -0400, Jeff Layton wrote:
 So according to the RFC you have to encode both the mode bits and the
 ftype for v2. The type bits seem to be removed from the mode in NFSv3
 though, so perhaps we should only be doing that masking in versions
 above v2?
 
 Right, the problematic patch applied the same mask in both v2 and v3
 cases, so I'm reverting just the v2 part (see below).
 
 With a quick check, it looks like the v3 code doesn't rely on those bits
 and I imagine v4 doesn't either.

 It might also be nice to have the client v2 decode_fattr function to
 throw a warning if the server sends us mismatched type bits and ftype
 values. That would have helped us catch this sooner...
 
 Yes, that might be a reasonable thing to do, though I don't know if it's
 worth it.
 
 --b.
 
 commit 35a8dff14e76c00e5b52140290cfb498dc2454a0
 Author: J. Bruce Fields bfie...@redhat.com
 Date:   Thu Apr 3 15:10:35 2014 -0400
 
 nfsd: revert v2 half of nfsd: don't return high mode bits
 
 This reverts the part of commit 6e14b46b91fee8a049b0940333ce13a820beaaa5
 that changes NFSv2 behavior.
 
 Mark Lord found that it broke nfs-root for Linux clients, because it
 broke NFSv2.
 
 In fact, from RFC 1094:
 
   Notice that the file type is specified both in the mode bits
   and in the file type.  This is really a bug in the protocol and
   will be fixed in future versions.
 
 So NFSv2 clients really are expected to depend on the high bits of the
 mode.
 
 Cc: sta...@kernel.org
 Reported-by: Mark Lord ml...@pobox.com
 Signed-off-by: J. Bruce Fields bfie...@redhat.com
 
 diff --git a/fs/nfsd/nfsxdr.c b/fs/nfsd/nfsxdr.c
 index b17d932..9c769a4 100644
 --- a/fs/nfsd/nfsxdr.c
 +++ b/fs/nfsd/nfsxdr.c
 @@ -152,7 +152,7 @@ encode_fattr(struct svc_rqst *rqstp, __be32 *p, struct 
 svc_fh *fhp,
   type = (stat-mode  S_IFMT);
  
   *p++ = htonl(nfs_ftypes[type  12]);
 - *p++ = htonl((u32) (stat-mode  S_IALLUGO));
 + *p++ = htonl((u32) stat-mode);
   *p++ = htonl((u32) stat-nlink);
   *p++ = htonl((u32) from_kuid(init_user_ns, stat-uid));
   *p++ = htonl((u32) from_kgid(init_user_ns, stat-gid));
 


Still a regression in 3.14.2 now.
Anyone got plans to push this patch out to mainline, as well as +stable ?

-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com
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Re: driver skip pci_set_master, fix it? No.

[Mark Lord]

On 14-04-09 11:52 AM, Bjorn Helgaas wrote:
> On Wed, Apr 9, 2014 at 8:18 AM, Mark Lord  wrote:
>> On 14-04-09 10:12 AM, Mark Lord wrote:
>>> On 14-04-09 09:08 AM, Mark Lord wrote:
>>>> On 14-04-08 10:51 PM, Benjamin Herrenschmidt wrote:
>>>>> On Tue, 2014-04-08 at 17:18 -0400, Mark Lord wrote:
>>>>>>> I assume you're talking about the one added by cf3e1feba7f9 ("PCI:
>>>>>>> Workaround missing pci_set_master in pci drivers"), but as far as I
>>>>>>> can tell, it only calls pci_set_master() for *bridge* devices.  What
>>>>>>> am I missing?  Is pci_set_master() being called for your endpoint?
>>>>>>> What path is that?
>>>>>>
>>>>>> Yes, it is being called during execution of the _probe() function in my 
>>>>>> driver,
>>>>>> as evidenced by the annoying (and wrong) message it produces.
>>>>>>
>>>>>> Next time I've got the hardware at hand, I'll put a "dump_stack()" into 
>>>>>> there
>>>>>> to see the exact calling path.
>>>>>
>>>>> Note that one of the reason we want to do it early on bridges is that 
>>>>> without it,
>>>>> we may also not get the PCIe error messages.
>>>>
>>>> Sure, for bridges.
>>>>
>>>> I'll get a stack trace later today, but what I suspect is happening
>>>> is that this multi-function card is being treated by the PCI layers
>>>> as a "bridge" for purposes of the multiple virtual functions it implements.
>>>>
>>>> We will probably need to distinguish this kind of device from real bridges 
>>>> here.
>>>
>>> Here's the call trace, all the way back to k7_probe(),
>>> the driver's PCI "probe" function, and beyond:
>>>
>>> [   30.481454] k7: loading driver version 0.80
>>> [   30.485561] pcieport :00:1c.0: driver skip pci_set_master, fix it!
> 
> This message says we're enabling bus mastering for a PCIe Root Port,
> which I think is the expected behavior and shouldn't cause trouble for
> your device (correct me if I'm wrong).
> 
> I don't know the system topology, but I'm guessing the k7 device is
> below that Root Port.  We might be enabling bus mastering for the k7
> device, too, but that's not what this message is about, and we'd have
> to look at the k7 command register to know for sure whether we did
> anything to it.
> 
>>> [   30.485580] CPU: 2 PID: 4401 Comm: insmod Tainted: G   O 3.12.14 
>>> #3
>>> [   30.485583] Hardware name: Supermicro X9SCI/X9SCA/X9SCI/X9SCA, BIOS 2.0b 
>>> 09/17/2012
>>> [   30.485590]  0300 88041c11b9b8 8156c40b 
>>> 
>>> [   30.485598]  88041d2b7000 88041c11b9d8 812dc493 
>>> 0300
>>> [   30.485603]  88041d399000 88041c11ba08 812dc50d 
>>> 1000
>>> [   30.485607] Call Trace:
>>> [   30.485616]  [] dump_stack+0x4f/0x84
>>> [   30.485622]  [] pci_enable_bridge+0x93/0xa0
>>> [   30.485627]  [] pci_enable_device_flags+0x6d/0xe0
>>> [   30.485631]  [] pci_enable_device+0xe/0x10
>>> [   30.485641]  [] k7_enable_device+0x3d/0xa30 [k7]
>>> [   30.485649]  [] ? k7_devmem_alloc+0x32/0x140 [k7]
>>> [   30.485654]  [] ? _raw_spin_lock+0x16/0x40
>>> [   30.485658]  [] ? _raw_spin_unlock+0x11/0x40
>>> [   30.485666]  [] k7_probe+0x458/0x630 [k7]
...
>> The e1000e network driver is suffering from this as well in 3.12.14.
> 
> I'll look at this more closely, in 3.12.14 in particular (I was
> looking at 3.14 before).  Can you collect "lspci -vv" output for one
> or both of these systems (the whole system, not just the device in
> question)?
> 
> Maybe you could read the PCI command register after the
> pci_enable_device() and verify that bus mastering is actually being
> enabled when you didn't expect it?

I've checked the master bit now in my own driver,
and you are right -- it is still 0 after pci_enable_device().

So that message is complaining about the root port driver,
not my driver or the e1000e driver.   Confusing at first.

Whoever added the message ought to have taken care of the
root ports already. So a fix may still be needed for that.

To confirm this, here are the messages and the tree view:

pcieport :00:1c.4: driver skip pci_set_master, fix it!
pcieport :00:1c.5: driver skip pci_set_master, fix it!
pcieport :00:1c.0: driver skip pci_set_mast

Re: driver skip pci_set_master, fix it? No.

[Mark Lord]

On 14-04-09 10:12 AM, Mark Lord wrote:
> On 14-04-09 09:08 AM, Mark Lord wrote:
>> On 14-04-08 10:51 PM, Benjamin Herrenschmidt wrote:
>>> On Tue, 2014-04-08 at 17:18 -0400, Mark Lord wrote:
>>>>> I assume you're talking about the one added by cf3e1feba7f9 ("PCI:
>>>>> Workaround missing pci_set_master in pci drivers"), but as far as I
>>>>> can tell, it only calls pci_set_master() for *bridge* devices.  What
>>>>> am I missing?  Is pci_set_master() being called for your endpoint?
>>>>> What path is that?
>>>>
>>>> Yes, it is being called during execution of the _probe() function in my 
>>>> driver,
>>>> as evidenced by the annoying (and wrong) message it produces.
>>>>
>>>> Next time I've got the hardware at hand, I'll put a "dump_stack()" into 
>>>> there
>>>> to see the exact calling path.
>>>
>>> Note that one of the reason we want to do it early on bridges is that 
>>> without it,
>>> we may also not get the PCIe error messages.
>>
>> Sure, for bridges.
>>
>> I'll get a stack trace later today, but what I suspect is happening
>> is that this multi-function card is being treated by the PCI layers
>> as a "bridge" for purposes of the multiple virtual functions it implements.
>>
>> We will probably need to distinguish this kind of device from real bridges 
>> here.
> 
> Here's the call trace, all the way back to k7_probe(),
> the driver's PCI "probe" function, and beyond:
> 
> [   30.481454] k7: loading driver version 0.80
> [   30.485561] pcieport :00:1c.0: driver skip pci_set_master, fix it!
> [   30.485580] CPU: 2 PID: 4401 Comm: insmod Tainted: G   O 3.12.14 #3
> [   30.485583] Hardware name: Supermicro X9SCI/X9SCA/X9SCI/X9SCA, BIOS 2.0b 
> 09/17/2012
> [   30.485590]  0300 88041c11b9b8 8156c40b 
> 
> [   30.485598]  88041d2b7000 88041c11b9d8 812dc493 
> 0300
> [   30.485603]  88041d399000 88041c11ba08 812dc50d 
> 1000
> [   30.485607] Call Trace:
> [   30.485616]  [] dump_stack+0x4f/0x84
> [   30.485622]  [] pci_enable_bridge+0x93/0xa0
> [   30.485627]  [] pci_enable_device_flags+0x6d/0xe0
> [   30.485631]  [] pci_enable_device+0xe/0x10
> [   30.485641]  [] k7_enable_device+0x3d/0xa30 [k7]
> [   30.485649]  [] ? k7_devmem_alloc+0x32/0x140 [k7]
> [   30.485654]  [] ? _raw_spin_lock+0x16/0x40
> [   30.485658]  [] ? _raw_spin_unlock+0x11/0x40
> [   30.485666]  [] k7_probe+0x458/0x630 [k7]
> 
> [   30.485682]  [] local_pci_probe+0x46/0x80
> [   30.485696]  [] pci_device_probe+0x101/0x110
> [   30.485702]  [] driver_probe_device+0x76/0x240
> [   30.485705]  [] __driver_attach+0x9b/0xa0
> [   30.485709]  [] ? driver_probe_device+0x240/0x240
> [   30.485713]  [] bus_for_each_dev+0x55/0x90
> [   30.485717]  [] driver_attach+0x19/0x20
> [   30.485720]  [] bus_add_driver+0x104/0x290
> [   30.485724]  [] driver_register+0x5f/0xf0
> [   30.485728]  [] __pci_register_driver+0x46/0x50
> [   30.485736]  [] k7_init+0x16e/0x1000 [k7]
> [   30.485746]  [] ? 0xa024bfff
> [   30.485765]  [] do_one_initcall+0x112/0x160
> [   30.485779]  [] ? set_memory_nx+0x43/0x50
> [   30.485785]  [] load_module+0x1e51/0x2480
> [   30.485789]  [] ? show_initstate+0x50/0x50
> [   30.485794]  [] SyS_init_module+0x9e/0xc0
> [   30.485799]  [] tracesys+0xdd/0xe
> 

The e1000e network driver is suffering from this as well in 3.12.14.

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Re: driver skip pci_set_master, fix it? No.

[Mark Lord]

On 14-04-09 09:08 AM, Mark Lord wrote:
> On 14-04-08 10:51 PM, Benjamin Herrenschmidt wrote:
>> On Tue, 2014-04-08 at 17:18 -0400, Mark Lord wrote:
>>>> I assume you're talking about the one added by cf3e1feba7f9 ("PCI:
>>>> Workaround missing pci_set_master in pci drivers"), but as far as I
>>>> can tell, it only calls pci_set_master() for *bridge* devices.  What
>>>> am I missing?  Is pci_set_master() being called for your endpoint?
>>>> What path is that?
>>>
>>> Yes, it is being called during execution of the _probe() function in my 
>>> driver,
>>> as evidenced by the annoying (and wrong) message it produces.
>>>
>>> Next time I've got the hardware at hand, I'll put a "dump_stack()" into 
>>> there
>>> to see the exact calling path.
>>
>> Note that one of the reason we want to do it early on bridges is that 
>> without it,
>> we may also not get the PCIe error messages.
> 
> Sure, for bridges.
> 
> I'll get a stack trace later today, but what I suspect is happening
> is that this multi-function card is being treated by the PCI layers
> as a "bridge" for purposes of the multiple virtual functions it implements.
> 
> We will probably need to distinguish this kind of device from real bridges 
> here.

Here's the call trace, all the way back to k7_probe(),
the driver's PCI "probe" function, and beyond:

[   30.481454] k7: loading driver version 0.80
[   30.485561] pcieport :00:1c.0: driver skip pci_set_master, fix it!
[   30.485580] CPU: 2 PID: 4401 Comm: insmod Tainted: G   O 3.12.14 #3
[   30.485583] Hardware name: Supermicro X9SCI/X9SCA/X9SCI/X9SCA, BIOS 2.0b 
09/17/2012
[   30.485590]  0300 88041c11b9b8 8156c40b 

[   30.485598]  88041d2b7000 88041c11b9d8 812dc493 
0300
[   30.485603]  88041d399000 88041c11ba08 812dc50d 
1000
[   30.485607] Call Trace:
[   30.485616]  [] dump_stack+0x4f/0x84
[   30.485622]  [] pci_enable_bridge+0x93/0xa0
[   30.485627]  [] pci_enable_device_flags+0x6d/0xe0
[   30.485631]  [] pci_enable_device+0xe/0x10
[   30.485641]  [] k7_enable_device+0x3d/0xa30 [k7]
[   30.485649]  [] ? k7_devmem_alloc+0x32/0x140 [k7]
[   30.485654]  [] ? _raw_spin_lock+0x16/0x40
[   30.485658]  [] ? _raw_spin_unlock+0x11/0x40
[   30.485666]  [] k7_probe+0x458/0x630 [k7]

[   30.485682]  [] local_pci_probe+0x46/0x80
[   30.485696]  [] pci_device_probe+0x101/0x110
[   30.485702]  [] driver_probe_device+0x76/0x240
[   30.485705]  [] __driver_attach+0x9b/0xa0
[   30.485709]  [] ? driver_probe_device+0x240/0x240
[   30.485713]  [] bus_for_each_dev+0x55/0x90
[   30.485717]  [] driver_attach+0x19/0x20
[   30.485720]  [] bus_add_driver+0x104/0x290
[   30.485724]  [] driver_register+0x5f/0xf0
[   30.485728]  [] __pci_register_driver+0x46/0x50
[   30.485736]  [] k7_init+0x16e/0x1000 [k7]
[   30.485746]  [] ? 0xa024bfff
[   30.485765]  [] do_one_initcall+0x112/0x160
[   30.485779]  [] ? set_memory_nx+0x43/0x50
[   30.485785]  [] load_module+0x1e51/0x2480
[   30.485789]  [] ? show_initstate+0x50/0x50
[   30.485794]  [] SyS_init_module+0x9e/0xc0
[   30.485799]  [] tracesys+0xdd/0xe
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Re: driver skip pci_set_master, fix it? No.

[Mark Lord]

On 14-04-08 10:51 PM, Benjamin Herrenschmidt wrote:
> On Tue, 2014-04-08 at 17:18 -0400, Mark Lord wrote:
>>> I assume you're talking about the one added by cf3e1feba7f9 ("PCI:
>>> Workaround missing pci_set_master in pci drivers"), but as far as I
>>> can tell, it only calls pci_set_master() for *bridge* devices.  What
>>> am I missing?  Is pci_set_master() being called for your endpoint?
>>> What path is that?
>>
>> Yes, it is being called during execution of the _probe() function in my 
>> driver,
>> as evidenced by the annoying (and wrong) message it produces.
>>
>> Next time I've got the hardware at hand, I'll put a "dump_stack()" into there
>> to see the exact calling path.
> 
> Note that one of the reason we want to do it early on bridges is that without 
> it,
> we may also not get the PCIe error messages.

Sure, for bridges.

I'll get a stack trace later today, but what I suspect is happening
is that this multi-function card is being treated by the PCI layers
as a "bridge" for purposes of the multiple virtual functions it implements.

We will probably need to distinguish this kind of device from real bridges here.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com
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Re: driver skip pci_set_master, fix it? No.

[Mark Lord]

On 14-04-08 10:51 PM, Benjamin Herrenschmidt wrote:
 On Tue, 2014-04-08 at 17:18 -0400, Mark Lord wrote:
 I assume you're talking about the one added by cf3e1feba7f9 (PCI:
 Workaround missing pci_set_master in pci drivers), but as far as I
 can tell, it only calls pci_set_master() for *bridge* devices.  What
 am I missing?  Is pci_set_master() being called for your endpoint?
 What path is that?

 Yes, it is being called during execution of the _probe() function in my 
 driver,
 as evidenced by the annoying (and wrong) message it produces.

 Next time I've got the hardware at hand, I'll put a dump_stack() into there
 to see the exact calling path.
 
 Note that one of the reason we want to do it early on bridges is that without 
 it,
 we may also not get the PCIe error messages.

Sure, for bridges.

I'll get a stack trace later today, but what I suspect is happening
is that this multi-function card is being treated by the PCI layers
as a bridge for purposes of the multiple virtual functions it implements.

We will probably need to distinguish this kind of device from real bridges here.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com
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Re: driver skip pci_set_master, fix it? No.

[Mark Lord]

On 14-04-09 09:08 AM, Mark Lord wrote:
 On 14-04-08 10:51 PM, Benjamin Herrenschmidt wrote:
 On Tue, 2014-04-08 at 17:18 -0400, Mark Lord wrote:
 I assume you're talking about the one added by cf3e1feba7f9 (PCI:
 Workaround missing pci_set_master in pci drivers), but as far as I
 can tell, it only calls pci_set_master() for *bridge* devices.  What
 am I missing?  Is pci_set_master() being called for your endpoint?
 What path is that?

 Yes, it is being called during execution of the _probe() function in my 
 driver,
 as evidenced by the annoying (and wrong) message it produces.

 Next time I've got the hardware at hand, I'll put a dump_stack() into 
 there
 to see the exact calling path.

 Note that one of the reason we want to do it early on bridges is that 
 without it,
 we may also not get the PCIe error messages.
 
 Sure, for bridges.
 
 I'll get a stack trace later today, but what I suspect is happening
 is that this multi-function card is being treated by the PCI layers
 as a bridge for purposes of the multiple virtual functions it implements.
 
 We will probably need to distinguish this kind of device from real bridges 
 here.

Here's the call trace, all the way back to k7_probe(),
the driver's PCI probe function, and beyond:

[   30.481454] k7: loading driver version 0.80
[   30.485561] pcieport :00:1c.0: driver skip pci_set_master, fix it!
[   30.485580] CPU: 2 PID: 4401 Comm: insmod Tainted: G   O 3.12.14 #3
[   30.485583] Hardware name: Supermicro X9SCI/X9SCA/X9SCI/X9SCA, BIOS 2.0b 
09/17/2012
[   30.485590]  0300 88041c11b9b8 8156c40b 

[   30.485598]  88041d2b7000 88041c11b9d8 812dc493 
0300
[   30.485603]  88041d399000 88041c11ba08 812dc50d 
1000
[   30.485607] Call Trace:
[   30.485616]  [8156c40b] dump_stack+0x4f/0x84
[   30.485622]  [812dc493] pci_enable_bridge+0x93/0xa0
[   30.485627]  [812dc50d] pci_enable_device_flags+0x6d/0xe0
[   30.485631]  [812dc58e] pci_enable_device+0xe/0x10
[   30.485641]  [a0469c0d] k7_enable_device+0x3d/0xa30 [k7]
[   30.485649]  [a0462d72] ? k7_devmem_alloc+0x32/0x140 [k7]
[   30.485654]  [81572ab6] ? _raw_spin_lock+0x16/0x40
[   30.485658]  [81572721] ? _raw_spin_unlock+0x11/0x40
[   30.485666]  [a046aee8] k7_probe+0x458/0x630 [k7]

[   30.485682]  [812de3d6] local_pci_probe+0x46/0x80
[   30.485696]  [812de6f1] pci_device_probe+0x101/0x110
[   30.485702]  [813941d6] driver_probe_device+0x76/0x240
[   30.485705]  [8139443b] __driver_attach+0x9b/0xa0
[   30.485709]  [813943a0] ? driver_probe_device+0x240/0x240
[   30.485713]  [81392385] bus_for_each_dev+0x55/0x90
[   30.485717]  [81393ce9] driver_attach+0x19/0x20
[   30.485720]  [81393814] bus_add_driver+0x104/0x290
[   30.485724]  [81394abf] driver_register+0x5f/0xf0
[   30.485728]  [812dd3f6] __pci_register_driver+0x46/0x50
[   30.485736]  [a024c16e] k7_init+0x16e/0x1000 [k7]
[   30.485746]  [a024c000] ? 0xa024bfff
[   30.485765]  [81000302] do_one_initcall+0x112/0x160
[   30.485779]  [81038143] ? set_memory_nx+0x43/0x50
[   30.485785]  [810abbe1] load_module+0x1e51/0x2480
[   30.485789]  [810a8b10] ? show_initstate+0x50/0x50
[   30.485794]  [810ac2ae] SyS_init_module+0x9e/0xc0
[   30.485799]  [8157389b] tracesys+0xdd/0xe
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Re: driver skip pci_set_master, fix it? No.

[Mark Lord]

On 14-04-09 10:12 AM, Mark Lord wrote:
 On 14-04-09 09:08 AM, Mark Lord wrote:
 On 14-04-08 10:51 PM, Benjamin Herrenschmidt wrote:
 On Tue, 2014-04-08 at 17:18 -0400, Mark Lord wrote:
 I assume you're talking about the one added by cf3e1feba7f9 (PCI:
 Workaround missing pci_set_master in pci drivers), but as far as I
 can tell, it only calls pci_set_master() for *bridge* devices.  What
 am I missing?  Is pci_set_master() being called for your endpoint?
 What path is that?

 Yes, it is being called during execution of the _probe() function in my 
 driver,
 as evidenced by the annoying (and wrong) message it produces.

 Next time I've got the hardware at hand, I'll put a dump_stack() into 
 there
 to see the exact calling path.

 Note that one of the reason we want to do it early on bridges is that 
 without it,
 we may also not get the PCIe error messages.

 Sure, for bridges.

 I'll get a stack trace later today, but what I suspect is happening
 is that this multi-function card is being treated by the PCI layers
 as a bridge for purposes of the multiple virtual functions it implements.

 We will probably need to distinguish this kind of device from real bridges 
 here.
 
 Here's the call trace, all the way back to k7_probe(),
 the driver's PCI probe function, and beyond:
 
 [   30.481454] k7: loading driver version 0.80
 [   30.485561] pcieport :00:1c.0: driver skip pci_set_master, fix it!
 [   30.485580] CPU: 2 PID: 4401 Comm: insmod Tainted: G   O 3.12.14 #3
 [   30.485583] Hardware name: Supermicro X9SCI/X9SCA/X9SCI/X9SCA, BIOS 2.0b 
 09/17/2012
 [   30.485590]  0300 88041c11b9b8 8156c40b 
 
 [   30.485598]  88041d2b7000 88041c11b9d8 812dc493 
 0300
 [   30.485603]  88041d399000 88041c11ba08 812dc50d 
 1000
 [   30.485607] Call Trace:
 [   30.485616]  [8156c40b] dump_stack+0x4f/0x84
 [   30.485622]  [812dc493] pci_enable_bridge+0x93/0xa0
 [   30.485627]  [812dc50d] pci_enable_device_flags+0x6d/0xe0
 [   30.485631]  [812dc58e] pci_enable_device+0xe/0x10
 [   30.485641]  [a0469c0d] k7_enable_device+0x3d/0xa30 [k7]
 [   30.485649]  [a0462d72] ? k7_devmem_alloc+0x32/0x140 [k7]
 [   30.485654]  [81572ab6] ? _raw_spin_lock+0x16/0x40
 [   30.485658]  [81572721] ? _raw_spin_unlock+0x11/0x40
 [   30.485666]  [a046aee8] k7_probe+0x458/0x630 [k7]
 
 [   30.485682]  [812de3d6] local_pci_probe+0x46/0x80
 [   30.485696]  [812de6f1] pci_device_probe+0x101/0x110
 [   30.485702]  [813941d6] driver_probe_device+0x76/0x240
 [   30.485705]  [8139443b] __driver_attach+0x9b/0xa0
 [   30.485709]  [813943a0] ? driver_probe_device+0x240/0x240
 [   30.485713]  [81392385] bus_for_each_dev+0x55/0x90
 [   30.485717]  [81393ce9] driver_attach+0x19/0x20
 [   30.485720]  [81393814] bus_add_driver+0x104/0x290
 [   30.485724]  [81394abf] driver_register+0x5f/0xf0
 [   30.485728]  [812dd3f6] __pci_register_driver+0x46/0x50
 [   30.485736]  [a024c16e] k7_init+0x16e/0x1000 [k7]
 [   30.485746]  [a024c000] ? 0xa024bfff
 [   30.485765]  [81000302] do_one_initcall+0x112/0x160
 [   30.485779]  [81038143] ? set_memory_nx+0x43/0x50
 [   30.485785]  [810abbe1] load_module+0x1e51/0x2480
 [   30.485789]  [810a8b10] ? show_initstate+0x50/0x50
 [   30.485794]  [810ac2ae] SyS_init_module+0x9e/0xc0
 [   30.485799]  [8157389b] tracesys+0xdd/0xe
 

The e1000e network driver is suffering from this as well in 3.12.14.

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Re: driver skip pci_set_master, fix it? No.

[Mark Lord]

On 14-04-09 11:52 AM, Bjorn Helgaas wrote:
 On Wed, Apr 9, 2014 at 8:18 AM, Mark Lord ml...@pobox.com wrote:
 On 14-04-09 10:12 AM, Mark Lord wrote:
 On 14-04-09 09:08 AM, Mark Lord wrote:
 On 14-04-08 10:51 PM, Benjamin Herrenschmidt wrote:
 On Tue, 2014-04-08 at 17:18 -0400, Mark Lord wrote:
 I assume you're talking about the one added by cf3e1feba7f9 (PCI:
 Workaround missing pci_set_master in pci drivers), but as far as I
 can tell, it only calls pci_set_master() for *bridge* devices.  What
 am I missing?  Is pci_set_master() being called for your endpoint?
 What path is that?

 Yes, it is being called during execution of the _probe() function in my 
 driver,
 as evidenced by the annoying (and wrong) message it produces.

 Next time I've got the hardware at hand, I'll put a dump_stack() into 
 there
 to see the exact calling path.

 Note that one of the reason we want to do it early on bridges is that 
 without it,
 we may also not get the PCIe error messages.

 Sure, for bridges.

 I'll get a stack trace later today, but what I suspect is happening
 is that this multi-function card is being treated by the PCI layers
 as a bridge for purposes of the multiple virtual functions it implements.

 We will probably need to distinguish this kind of device from real bridges 
 here.

 Here's the call trace, all the way back to k7_probe(),
 the driver's PCI probe function, and beyond:

 [   30.481454] k7: loading driver version 0.80
 [   30.485561] pcieport :00:1c.0: driver skip pci_set_master, fix it!
 
 This message says we're enabling bus mastering for a PCIe Root Port,
 which I think is the expected behavior and shouldn't cause trouble for
 your device (correct me if I'm wrong).
 
 I don't know the system topology, but I'm guessing the k7 device is
 below that Root Port.  We might be enabling bus mastering for the k7
 device, too, but that's not what this message is about, and we'd have
 to look at the k7 command register to know for sure whether we did
 anything to it.
 
 [   30.485580] CPU: 2 PID: 4401 Comm: insmod Tainted: G   O 3.12.14 
 #3
 [   30.485583] Hardware name: Supermicro X9SCI/X9SCA/X9SCI/X9SCA, BIOS 2.0b 
 09/17/2012
 [   30.485590]  0300 88041c11b9b8 8156c40b 
 
 [   30.485598]  88041d2b7000 88041c11b9d8 812dc493 
 0300
 [   30.485603]  88041d399000 88041c11ba08 812dc50d 
 1000
 [   30.485607] Call Trace:
 [   30.485616]  [8156c40b] dump_stack+0x4f/0x84
 [   30.485622]  [812dc493] pci_enable_bridge+0x93/0xa0
 [   30.485627]  [812dc50d] pci_enable_device_flags+0x6d/0xe0
 [   30.485631]  [812dc58e] pci_enable_device+0xe/0x10
 [   30.485641]  [a0469c0d] k7_enable_device+0x3d/0xa30 [k7]
 [   30.485649]  [a0462d72] ? k7_devmem_alloc+0x32/0x140 [k7]
 [   30.485654]  [81572ab6] ? _raw_spin_lock+0x16/0x40
 [   30.485658]  [81572721] ? _raw_spin_unlock+0x11/0x40
 [   30.485666]  [a046aee8] k7_probe+0x458/0x630 [k7]
...
 The e1000e network driver is suffering from this as well in 3.12.14.
 
 I'll look at this more closely, in 3.12.14 in particular (I was
 looking at 3.14 before).  Can you collect lspci -vv output for one
 or both of these systems (the whole system, not just the device in
 question)?
 
 Maybe you could read the PCI command register after the
 pci_enable_device() and verify that bus mastering is actually being
 enabled when you didn't expect it?

I've checked the master bit now in my own driver,
and you are right -- it is still 0 after pci_enable_device().

So that message is complaining about the root port driver,
not my driver or the e1000e driver.   Confusing at first.

Whoever added the message ought to have taken care of the
root ports already. So a fix may still be needed for that.

To confirm this, here are the messages and the tree view:

pcieport :00:1c.4: driver skip pci_set_master, fix it!
pcieport :00:1c.5: driver skip pci_set_master, fix it!
pcieport :00:1c.0: driver skip pci_set_master, fix it!

lspci -t
-[:00]-+-00.0
   +-01.0-[01]--+-00.0
   |\-00.1
   +-16.0
   +-16.1
   +-1a.0
   +-1c.0-[02]--+-00.0  (these are part of my k7 device)
   |+-00.1
   |+-00.2
   |+-00.3
   |+-00.4
   |+-00.5
   |+-00.6
   |\-00.7
   +-1c.4-[03]00.0  (e1000e)
   +-1c.5-[04]00.0  (e1000e)
   +-1d.0
   +-1e.0-[05]03.0
   +-1f.0
   +-1f.2
   \-1f.3

Here is the simple lspci view.
The device I am working with has not yet been announced/released,
so I have to hide the identification for now (NDA).
The driver is being developed for GPL licensing/distribution though.

00:00.0 Host bridge: Intel Corporation Xeon E3-1200 Processor Family DRAM

Re: driver skip pci_set_master, fix it? No.

[Mark Lord]

On 14-04-08 02:27 PM, Bjorn Helgaas wrote:
> [+cc Ben, linux-pci]
> 
> On Tue, Apr 8, 2014 at 10:34 AM, Mark Lord  wrote:
>> I am working a couple of drivers for chips that perform extensive 
>> bus-mastering ops.
>> These including full SRIOV support, and allow assigning virtual functions to 
>> virtual machines, etc.
>>
>> One thing the driver (still in development) does for safety,
>> is defer the call to pci_set_master() until *after* it has mapped
>> the MMIO space of the chips, so it can reset/flush the DMA engines
>> before giving them permission to scribble over host RAM.
>>
>> But a recent patch to the kernel has removed this from the driver's control.
>> The core PCI now does pci_set_master() immediately on pci_enable_device().
> 
> I assume you're talking about the one added by cf3e1feba7f9 ("PCI:
> Workaround missing pci_set_master in pci drivers"), but as far as I
> can tell, it only calls pci_set_master() for *bridge* devices.  What
> am I missing?  Is pci_set_master() being called for your endpoint?
> What path is that?

Yes, it is being called during execution of the _probe() function in my driver,
as evidenced by the annoying (and wrong) message it produces.

Next time I've got the hardware at hand, I'll put a "dump_stack()" into there
to see the exact calling path.
-- 
Mark Lord
Real-Time Remedies Inc.
ml...@pobox.com
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Please read the FAQ at  http://www.tux.org/lkml/

driver skip pci_set_master, fix it? No.

[Mark Lord]

I am working a couple of drivers for chips that perform extensive bus-mastering 
ops.
These including full SRIOV support, and allow assigning virtual functions to 
virtual machines, etc.

One thing the driver (still in development) does for safety,
is defer the call to pci_set_master() until *after* it has mapped
the MMIO space of the chips, so it can reset/flush the DMA engines
before giving them permission to scribble over host RAM.

But a recent patch to the kernel has removed this from the driver's control.
The core PCI now does pci_set_master() immediately on pci_enable_device().

This could be catastrophic in some situations, depending upon the state
of the DMA engines in the device.  If they have "leftovers" from a previous 
"life"
(or a previous VM assignment), then they'll immediately resume accessing host 
RAM
as soon as the driver calls pci_enable_device(), courtesy of the embedded call
to pci_set_master().

This isn't good, and these may not be the only devices affected in this way.

Can we perhaps not do that, or provide some other way to return control of 
bus-mastering
to the device driver ?
--
ml...@pobox.com
Mark Lord
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