Re: [PATCH] Fix set apic mode from x2apic enabled bit patch

[Mike Travis]

Hi Thomas,

Thanks for pointing that out, though Boris did highlight the same 
problem.  I still do all the patches in quilt but I've created an 
automated conversion to take those patch(es) and use git send mail to 
send them upstream.  The platform information used to be included but 
it's not now and I hadn't noticed that.  I will look at the tool 
particularly the git format patch step.


Thanks again for accepting the patch as is.  And I will be more 
descriptive in the patch and in code comments.  I do get into the 
mindset that no one else really cares about how UV works but it sounds 
like I'm mistaken, at least in regards to how it affects the kernel.


Thanks,
Mike

On 4/17/2021 4:10 PM, Thomas Gleixner wrote:

Mike!

On Sun, Apr 18 2021 at 00:39, Thomas Gleixner wrote:

If you can't come up with something sensible anytime soon before the
merge window opens then I'm simply going to revert 41e2da9b5e67 and you
can try again for the next cycle.


so I just figured out that Boris wasted his time once more to fix that
up and redo the commit in question.

Won't happen again.

Thanks,

 tglx

[tip: x86/platform] x86/platform/uv: Use x2apic enabled bit as set by BIOS to indicate APIC mode

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 26d4be3ea1b77cc00b5b638faed7a357204f9150
Gitweb:
https://git.kernel.org/tip/26d4be3ea1b77cc00b5b638faed7a357204f9150
Author:Mike Travis 
AuthorDate:Thu, 08 Apr 2021 11:00:47 -05:00
Committer: Borislav Petkov 
CommitterDate: Fri, 16 Apr 2021 12:51:03 +02:00

x86/platform/uv: Use x2apic enabled bit as set by BIOS to indicate APIC mode

BIOS now sets the x2apic enabled bit (and the ACPI table) for extended
APIC modes. Use that bit to indicate if extended mode is set.

 [ bp: Fixup subject prefix, merge subsequent fix
   https://lkml.kernel.org/r/20210415220626.223955-1-mike.tra...@hpe.com ]

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/20210408160047.1703-1-mike.tra...@hpe.com
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 30 -
 1 file changed, 13 insertions(+), 17 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index c9ddd23..f5a48e6 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -369,6 +369,15 @@ static int __init early_get_arch_type(void)
return ret;
 }
 
+/* UV system found, check which APIC MODE BIOS already selected */
+static void __init early_set_apic_mode(void)
+{
+   if (x2apic_enabled())
+   uv_system_type = UV_X2APIC;
+   else
+   uv_system_type = UV_LEGACY_APIC;
+}
+
 static int __init uv_set_system_type(char *_oem_id, char *_oem_table_id)
 {
/* Save OEM_ID passed from ACPI MADT */
@@ -404,11 +413,12 @@ static int __init uv_set_system_type(char *_oem_id, char 
*_oem_table_id)
else
uv_hubless_system |= 0x8;
 
-   /* Copy APIC type */
+   /* Copy OEM Table ID */
uv_stringify(sizeof(oem_table_id), oem_table_id, _oem_table_id);
 
pr_info("UV: OEM IDs %s/%s, SystemType %d, HUBLESS ID %x\n",
oem_id, oem_table_id, uv_system_type, 
uv_hubless_system);
+
return 0;
}
 
@@ -453,6 +463,7 @@ static int __init uv_set_system_type(char *_oem_id, char 
*_oem_table_id)
early_set_hub_type();
 
/* Other UV setup functions */
+   early_set_apic_mode();
early_get_pnodeid();
early_get_apic_socketid_shift();
x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range;
@@ -472,29 +483,14 @@ static int __init uv_acpi_madt_oem_check(char *_oem_id, 
char *_oem_table_id)
if (uv_set_system_type(_oem_id, _oem_table_id) == 0)
return 0;
 
-   /* Save and Decode OEM Table ID */
+   /* Save for display of the OEM Table ID */
uv_stringify(sizeof(oem_table_id), oem_table_id, _oem_table_id);
 
-   /* This is the most common hardware variant, x2apic mode */
-   if (!strcmp(oem_table_id, "UVX"))
-   uv_system_type = UV_X2APIC;
-
-   /* Only used for very small systems, usually 1 chassis, legacy mode  */
-   else if (!strcmp(oem_table_id, "UVL"))
-   uv_system_type = UV_LEGACY_APIC;
-
-   else
-   goto badbios;
-
pr_info("UV: OEM IDs %s/%s, System/UVType %d/0x%x, HUB RevID %d\n",
oem_id, oem_table_id, uv_system_type, is_uv(UV_ANY),
uv_min_hub_revision_id);
 
return 0;
-
-badbios:
-   pr_err("UV: UVarchtype:%s not supported\n", uv_archtype);
-   BUG();
 }
 
 enum uv_system_type get_uv_system_type(void)

[PATCH] Fix set apic mode from x2apic enabled bit patch

[Mike Travis]

Do not set uv_system_type for hubless UV systems as it tricks the
is_uv_system function into thinking it's a UV hubbed system and includes
a UV HUB RTC.  This causes UV RTC init to panic on UV hubless systems.

Fixes: 41e2da9b5e67 ("x86/platform/uv: Use x2apic enabled bit as set by BIOS to 
indicate APIC mode")

[41e2da9b5e67 was accepted into tip x86/platform branch but not yet
pulled into the linus tree.]

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
Reviewed-by: Dimitri Sivanich 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 2e99605f9a05..68ef9abc91f7 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -413,9 +413,8 @@ static int __init uv_set_system_type(char *_oem_id, char 
*_oem_table_id)
else
uv_hubless_system |= 0x8;
 
-   /* Copy OEM Table ID and set APIC Mode */
+   /* Copy OEM Table ID */
uv_stringify(sizeof(oem_table_id), oem_table_id, _oem_table_id);
-   early_set_apic_mode();
 
pr_info("UV: OEM IDs %s/%s, SystemType %d, HUBLESS ID %x\n",
oem_id, oem_table_id, uv_system_type, 
uv_hubless_system);
-- 
2.21.0

[tip: x86/platform] x86/platform/uv: Use x2apic enabled bit as set by BIOS to indicate APIC mode

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 41e2da9b5e670a9876ea7b4d8c685a49b170
Gitweb:
https://git.kernel.org/tip/41e2da9b5e670a9876ea7b4d8c685a49b170
Author:Mike Travis 
AuthorDate:Thu, 08 Apr 2021 11:00:47 -05:00
Committer: Borislav Petkov 
CommitterDate: Mon, 12 Apr 2021 15:00:34 +02:00

x86/platform/uv: Use x2apic enabled bit as set by BIOS to indicate APIC mode

BIOS now sets the x2apic enabled bit (and the ACPI table) for extended
APIC modes. Use that bit to indicate if extended mode is set.

 [ bp: Fixup subject prefix. ]

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/20210408160047.1703-1-mike.tra...@hpe.com
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 31 +
 1 file changed, 14 insertions(+), 17 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index c9ddd23..930dd09 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -369,6 +369,15 @@ static int __init early_get_arch_type(void)
return ret;
 }
 
+/* UV system found, check which APIC MODE BIOS already selected */
+static void __init early_set_apic_mode(void)
+{
+   if (x2apic_enabled())
+   uv_system_type = UV_X2APIC;
+   else
+   uv_system_type = UV_LEGACY_APIC;
+}
+
 static int __init uv_set_system_type(char *_oem_id, char *_oem_table_id)
 {
/* Save OEM_ID passed from ACPI MADT */
@@ -404,11 +413,13 @@ static int __init uv_set_system_type(char *_oem_id, char 
*_oem_table_id)
else
uv_hubless_system |= 0x8;
 
-   /* Copy APIC type */
+   /* Copy OEM Table ID and set APIC Mode */
uv_stringify(sizeof(oem_table_id), oem_table_id, _oem_table_id);
+   early_set_apic_mode();
 
pr_info("UV: OEM IDs %s/%s, SystemType %d, HUBLESS ID %x\n",
oem_id, oem_table_id, uv_system_type, 
uv_hubless_system);
+
return 0;
}
 
@@ -453,6 +464,7 @@ static int __init uv_set_system_type(char *_oem_id, char 
*_oem_table_id)
early_set_hub_type();
 
/* Other UV setup functions */
+   early_set_apic_mode();
early_get_pnodeid();
early_get_apic_socketid_shift();
x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range;
@@ -472,29 +484,14 @@ static int __init uv_acpi_madt_oem_check(char *_oem_id, 
char *_oem_table_id)
if (uv_set_system_type(_oem_id, _oem_table_id) == 0)
return 0;
 
-   /* Save and Decode OEM Table ID */
+   /* Save for display of the OEM Table ID */
uv_stringify(sizeof(oem_table_id), oem_table_id, _oem_table_id);
 
-   /* This is the most common hardware variant, x2apic mode */
-   if (!strcmp(oem_table_id, "UVX"))
-   uv_system_type = UV_X2APIC;
-
-   /* Only used for very small systems, usually 1 chassis, legacy mode  */
-   else if (!strcmp(oem_table_id, "UVL"))
-   uv_system_type = UV_LEGACY_APIC;
-
-   else
-   goto badbios;
-
pr_info("UV: OEM IDs %s/%s, System/UVType %d/0x%x, HUB RevID %d\n",
oem_id, oem_table_id, uv_system_type, is_uv(UV_ANY),
uv_min_hub_revision_id);
 
return 0;
-
-badbios:
-   pr_err("UV: UVarchtype:%s not supported\n", uv_archtype);
-   BUG();
 }
 
 enum uv_system_type get_uv_system_type(void)

[PATCH] Use x2apic enabled bit as set by BIOS to indicate APIC mode

[Mike Travis]

BIOS now sets the x2apic enabled bit (and the ACPI table) for extended
APIC modes.  Use that bit to indicate if extended mode is set.

Signed-off-by: Mike Travis 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 31 ++
 1 file changed, 14 insertions(+), 17 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 52bc217ca8c3..2e99605f9a05 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -369,6 +369,15 @@ static int __init early_get_arch_type(void)
return ret;
 }
 
+/* UV system found, check which APIC MODE BIOS already selected */
+static void __init early_set_apic_mode(void)
+{
+   if (x2apic_enabled())
+   uv_system_type = UV_X2APIC;
+   else
+   uv_system_type = UV_LEGACY_APIC;
+}
+
 static int __init uv_set_system_type(char *_oem_id, char *_oem_table_id)
 {
/* Save OEM_ID passed from ACPI MADT */
@@ -404,11 +413,13 @@ static int __init uv_set_system_type(char *_oem_id, char 
*_oem_table_id)
else
uv_hubless_system |= 0x8;
 
-   /* Copy APIC type */
+   /* Copy OEM Table ID and set APIC Mode */
uv_stringify(sizeof(oem_table_id), oem_table_id, _oem_table_id);
+   early_set_apic_mode();
 
pr_info("UV: OEM IDs %s/%s, SystemType %d, HUBLESS ID %x\n",
oem_id, oem_table_id, uv_system_type, 
uv_hubless_system);
+
return 0;
}
 
@@ -453,6 +464,7 @@ static int __init uv_set_system_type(char *_oem_id, char 
*_oem_table_id)
early_set_hub_type();
 
/* Other UV setup functions */
+   early_set_apic_mode();
early_get_pnodeid();
early_get_apic_socketid_shift();
x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range;
@@ -472,29 +484,14 @@ static int __init uv_acpi_madt_oem_check(char *_oem_id, 
char *_oem_table_id)
if (uv_set_system_type(_oem_id, _oem_table_id) == 0)
return 0;
 
-   /* Save and Decode OEM Table ID */
+   /* Save for display of the OEM Table ID */
uv_stringify(sizeof(oem_table_id), oem_table_id, _oem_table_id);
 
-   /* This is the most common hardware variant, x2apic mode */
-   if (!strcmp(oem_table_id, "UVX"))
-   uv_system_type = UV_X2APIC;
-
-   /* Only used for very small systems, usually 1 chassis, legacy mode  */
-   else if (!strcmp(oem_table_id, "UVL"))
-   uv_system_type = UV_LEGACY_APIC;
-
-   else
-   goto badbios;
-
pr_info("UV: OEM IDs %s/%s, System/UVType %d/0x%x, HUB RevID %d\n",
oem_id, oem_table_id, uv_system_type, is_uv(UV_ANY),
uv_min_hub_revision_id);
 
return 0;
-
-badbios:
-   pr_err("UV: UVarchtype:%s not supported\n", uv_archtype);
-   BUG();
 }
 
 enum uv_system_type get_uv_system_type(void)
-- 
2.21.0

[PATCH] x86/platform/uv: Add more to secondary cpu kdump info

[Mike Travis]

From: Georges Aureau 

Add call to run_crash_ipi_callback() to gather more info of what the
secondary cpus were doing to help with failure analysis.

Excerpt from Georges:
'It is only changing where crash secondaries will be stalling after having
taken care of properly laying down "crash note regs". Please note that
"crash note regs" are a key piece of data used by crash dump debuggers
to provide a reliable backtrace of running processors.'

Secondary change pursuant to a5f526ec:
change master/slave to main/secondary

Signed-off-by: Georges Aureau 
Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 arch/x86/platform/uv/uv_nmi.c | 39 +--
 1 file changed, 24 insertions(+), 15 deletions(-)

diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index eafc530c8767..f83810f7bcc2 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -834,34 +835,42 @@ static void uv_nmi_touch_watchdogs(void)
touch_nmi_watchdog();
 }
 
-static atomic_t uv_nmi_kexec_failed;
-
 #if defined(CONFIG_KEXEC_CORE)
-static void uv_nmi_kdump(int cpu, int master, struct pt_regs *regs)
+static atomic_t uv_nmi_kexec_failed;
+static void uv_nmi_kdump(int cpu, int main, struct pt_regs *regs)
 {
+   /* Check if kdump kernel loaded for both main and secondary CPUs */
+   if (!kexec_crash_image) {
+   if (main)
+   pr_err("UV: NMI error: kdump kernel not loaded\n");
+   return;
+   }
+
/* Call crash to dump system state */
-   if (master) {
+   if (main) {
pr_emerg("UV: NMI executing crash_kexec on CPU%d\n", cpu);
crash_kexec(regs);
 
-   pr_emerg("UV: crash_kexec unexpectedly returned, ");
+   pr_emerg("UV: crash_kexec unexpectedly returned\n");
atomic_set(_nmi_kexec_failed, 1);
-   if (!kexec_crash_image) {
-   pr_cont("crash kernel not loaded\n");
-   return;
+
+   } else { /* secondary */
+
+   /* If kdump kernel fails, secondaries will exit this loop */
+   while (atomic_read(_nmi_kexec_failed) == 0) {
+
+   /* Once shootdown cpus starts, they do not return */
+   run_crash_ipi_callback(regs);
+
+   mdelay(10);
}
-   pr_cont("kexec busy, stalling cpus while waiting\n");
}
-
-   /* If crash exec fails the slaves should return, otherwise stall */
-   while (atomic_read(_nmi_kexec_failed) == 0)
-   mdelay(10);
 }
 
 #else /* !CONFIG_KEXEC_CORE */
-static inline void uv_nmi_kdump(int cpu, int master, struct pt_regs *regs)
+static inline void uv_nmi_kdump(int cpu, int main, struct pt_regs *regs)
 {
-   if (master)
+   if (main)
pr_err("UV: NMI kdump: KEXEC not supported in this kernel\n");
atomic_set(_nmi_kexec_failed, 1);
 }
-- 
2.21.0

[tip: x86/platform] x86/platform/uv: Set section block size for hubless architectures

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 6840a150b9daf35e4d21ab9780d0a03b4ed74a5b
Gitweb:
https://git.kernel.org/tip/6840a150b9daf35e4d21ab9780d0a03b4ed74a5b
Author:Mike Travis 
AuthorDate:Fri, 05 Mar 2021 10:28:53 -06:00
Committer: Borislav Petkov 
CommitterDate: Mon, 08 Mar 2021 12:17:53 +01:00

x86/platform/uv: Set section block size for hubless architectures

Commit

  bbbd2b51a2aa ("x86/platform/UV: Use new set memory block size function")

added a call to set the block size value that is needed by the kernel
to set the boundaries in the section list. This was done for UV Hubbed
systems but missed in the UV Hubless setup. Fix that mistake by adding
that same set call for hubless systems, which support the same NVRAMs
and Intel BIOS, thus the same problem occurs.

 [ bp: Massage commit message. ]

Fixes: bbbd2b51a2aa ("x86/platform/UV: Use new set memory block size function")
Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Steve Wahl 
Reviewed-by: Russ Anderson 
Link: https://lkml.kernel.org/r/20210305162853.299892-1-mike.tra...@hpe.com
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 52bc217..c9ddd23 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1671,6 +1671,9 @@ static __init int uv_system_init_hubless(void)
if (rc < 0)
return rc;
 
+   /* Set section block size for current node memory */
+   set_block_size();
+
/* Create user access node */
if (rc >= 0)
uv_setup_proc_files(1);

[PATCH v2] x86/platform/uv: Add set of kernel block size for hubless arches

[Mike Travis]

The commit below added a call to set the block size value that is needed
by the kernel to set the boundaries in the section list.  This was done
for UV Hubbed systems but missed in the UV Hubless setup.  Fix that
mistake by adding that same set call for hubless systems, which support
the same NVRAMS and Intel BIOS, thus the same problem occurs.

Fixes: bbbd2b51a2aa ("x86/platform/UV: Use new set memory block size function")

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
Reviewed-by: Russ Anderson 
---
v2: Change patch description to match requirements.
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 52bc217ca8c3..c9ddd233e32f 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1671,6 +1671,9 @@ static __init int uv_system_init_hubless(void)
if (rc < 0)
return rc;
 
+   /* Set section block size for current node memory */
+   set_block_size();
+
/* Create user access node */
if (rc >= 0)
uv_setup_proc_files(1);
-- 
2.21.0

[PATCH] x86/platform/uv: Add set of kernel block size for hubless arches

[Mike Travis]

The commit below added a call to set the block size value that is needed
to set the value used by the kernel.  This was done for UV Hubbed systems.
This commit adds that same set call to hubless systems which supports the
same NVRAMS and Intel BIOS thus the same problem occurs.

Fixes: bbbd2b51a2aa ...
Add a call to the new function to "adjust" the current fixed
UV memory block size of 2GB so it can be changed to a different
physical boundary.  This accommodates changes in the Intel BIOS,
and therefore UV BIOS, which now can align boundaries different
than the previous UV standard of 2GB.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
Reviewed-by: Russ Anderson 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 52bc217ca8c3..c9ddd233e32f 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1671,6 +1671,9 @@ static __init int uv_system_init_hubless(void)
if (rc < 0)
return rc;
 
+   /* Set section block size for current node memory */
+   set_block_size();
+
/* Create user access node */
if (rc >= 0)
uv_setup_proc_files(1);
-- 
2.21.0

[PATCH] x86/platform/uv: Add more to secondary cpu kdump info

[Mike Travis]

From: Georges Aureau 

Add call to run_crash_ipi_callback() to gather more info of what the
secondary cpus were doing to help with failure analysis.

Excerpt from Georges:
'It is only changing where crash secondaries will be stalling after having
taken care of properly laying down "crash note regs". Please note that
"crash note regs" are a key piece of data used by crash dump debuggers
to provide a reliable backtrace of running processors.'

Secondary change pursuant to a5f526ec:
change master/slave to main/secondary

Signed-off-by: Georges Aureau 
Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 arch/x86/platform/uv/uv_nmi.c | 39 +--
 1 file changed, 24 insertions(+), 15 deletions(-)

diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index eafc530c8767..f83810f7bcc2 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -834,34 +835,42 @@ static void uv_nmi_touch_watchdogs(void)
touch_nmi_watchdog();
 }
 
-static atomic_t uv_nmi_kexec_failed;
-
 #if defined(CONFIG_KEXEC_CORE)
-static void uv_nmi_kdump(int cpu, int master, struct pt_regs *regs)
+static atomic_t uv_nmi_kexec_failed;
+static void uv_nmi_kdump(int cpu, int main, struct pt_regs *regs)
 {
+   /* Check if kdump kernel loaded for both main and secondary CPUs */
+   if (!kexec_crash_image) {
+   if (main)
+   pr_err("UV: NMI error: kdump kernel not loaded\n");
+   return;
+   }
+
/* Call crash to dump system state */
-   if (master) {
+   if (main) {
pr_emerg("UV: NMI executing crash_kexec on CPU%d\n", cpu);
crash_kexec(regs);
 
-   pr_emerg("UV: crash_kexec unexpectedly returned, ");
+   pr_emerg("UV: crash_kexec unexpectedly returned\n");
atomic_set(_nmi_kexec_failed, 1);
-   if (!kexec_crash_image) {
-   pr_cont("crash kernel not loaded\n");
-   return;
+
+   } else { /* secondary */
+
+   /* If kdump kernel fails, secondaries will exit this loop */
+   while (atomic_read(_nmi_kexec_failed) == 0) {
+
+   /* Once shootdown cpus starts, they do not return */
+   run_crash_ipi_callback(regs);
+
+   mdelay(10);
}
-   pr_cont("kexec busy, stalling cpus while waiting\n");
}
-
-   /* If crash exec fails the slaves should return, otherwise stall */
-   while (atomic_read(_nmi_kexec_failed) == 0)
-   mdelay(10);
 }
 
 #else /* !CONFIG_KEXEC_CORE */
-static inline void uv_nmi_kdump(int cpu, int master, struct pt_regs *regs)
+static inline void uv_nmi_kdump(int cpu, int main, struct pt_regs *regs)
 {
-   if (master)
+   if (main)
pr_err("UV: NMI kdump: KEXEC not supported in this kernel\n");
atomic_set(_nmi_kexec_failed, 1);
 }
-- 
2.21.0

[PATCH] x86/platform/uv: Add more to slave cpu kdump info

[Mike Travis]

Add call to run_crash_ipi_callback() to gather more info of what the
slave cpus were doing to help with failure analysis.

Excerpt from Georges:
'It is only changing where crash slaves will be stalling after having
taken care of properly laying down "crash note regs". Please note that
"crash note regs" are a key piece of data used by crash dump debuggers
to provide a reliable backtrace of running processors.'

Signed-off-by: Mike Travis 
Signed-off-by: Georges Aureau 
Reviewed-by: Steve Wahl 
---
 arch/x86/platform/uv/uv_nmi.c | 30 +++---
 1 file changed, 19 insertions(+), 11 deletions(-)

diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index eafc530c8767..811997b16b42 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -834,28 +835,35 @@ static void uv_nmi_touch_watchdogs(void)
touch_nmi_watchdog();
 }
 
-static atomic_t uv_nmi_kexec_failed;
-
 #if defined(CONFIG_KEXEC_CORE)
+static atomic_t uv_nmi_kexec_failed;
 static void uv_nmi_kdump(int cpu, int master, struct pt_regs *regs)
 {
+   /* Check if kdump kernel loaded for both master and slave CPUs */
+   if (!kexec_crash_image) {
+   if (master)
+   pr_err("UV: NMI error: kdump kernel not loaded\n");
+   return;
+   }
+
/* Call crash to dump system state */
if (master) {
pr_emerg("UV: NMI executing crash_kexec on CPU%d\n", cpu);
crash_kexec(regs);
 
-   pr_emerg("UV: crash_kexec unexpectedly returned, ");
+   pr_emerg("UV: crash_kexec unexpectedly returned\n");
atomic_set(_nmi_kexec_failed, 1);
-   if (!kexec_crash_image) {
-   pr_cont("crash kernel not loaded\n");
-   return;
+   } else {
+   /* If kdump kernel fails, slaves will exit this loop */
+   while (atomic_read(_nmi_kexec_failed) == 0) {
+   /*
+* If crash exec sets "crash_ipi_issued",
+* ... slaves do not return from callback function.
+*/
+   run_crash_ipi_callback(regs);
+   mdelay(10);
}
-   pr_cont("kexec busy, stalling cpus while waiting\n");
}
-
-   /* If crash exec fails the slaves should return, otherwise stall */
-   while (atomic_read(_nmi_kexec_failed) == 0)
-   mdelay(10);
 }
 
 #else /* !CONFIG_KEXEC_CORE */
-- 
2.21.0

[tip: x86/platform] x86/platform/uv: Add sysfs leaves to replace those in procfs

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 612a0063c9ba3aba79b9006faa0edad5f9d41162
Gitweb:
https://git.kernel.org/tip/612a0063c9ba3aba79b9006faa0edad5f9d41162
Author:Mike Travis 
AuthorDate:Fri, 27 Nov 2020 21:42:24 -06:00
Committer: Borislav Petkov 
CommitterDate: Mon, 07 Dec 2020 19:49:01 +01:00

x86/platform/uv: Add sysfs leaves to replace those in procfs

Add uv_sysfs leaves to display the info.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Steve Wahl 
Acked-by: Hans de Goede 
Link: https://lkml.kernel.org/r/20201128034227.120869-3-mike.tra...@hpe.com
---
 drivers/platform/x86/uv_sysfs.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/platform/x86/uv_sysfs.c b/drivers/platform/x86/uv_sysfs.c
index c27f5ff..922d32f 100644
--- a/drivers/platform/x86/uv_sysfs.c
+++ b/drivers/platform/x86/uv_sysfs.c
@@ -736,17 +736,35 @@ static ssize_t uv_type_show(struct kobject *kobj,
return scnprintf(buf, PAGE_SIZE, "%s\n", uv_type_string());
 }
 
+static ssize_t uv_archtype_show(struct kobject *kobj,
+   struct kobj_attribute *attr, char *buf)
+{
+   return uv_get_archtype(buf, PAGE_SIZE);
+}
+
+static ssize_t uv_hub_type_show(struct kobject *kobj,
+   struct kobj_attribute *attr, char *buf)
+{
+   return scnprintf(buf, PAGE_SIZE, "0x%x\n", uv_hub_type());
+}
+
 static struct kobj_attribute partition_id_attr =
__ATTR(partition_id, 0444, partition_id_show, NULL);
 static struct kobj_attribute coherence_id_attr =
__ATTR(coherence_id, 0444, coherence_id_show, NULL);
 static struct kobj_attribute uv_type_attr =
__ATTR(uv_type, 0444, uv_type_show, NULL);
+static struct kobj_attribute uv_archtype_attr =
+   __ATTR(archtype, 0444, uv_archtype_show, NULL);
+static struct kobj_attribute uv_hub_type_attr =
+   __ATTR(hub_type, 0444, uv_hub_type_show, NULL);
 
 static struct attribute *base_attrs[] = {
_id_attr.attr,
_id_attr.attr,
_type_attr.attr,
+   _archtype_attr.attr,
+   _hub_type_attr.attr,
NULL,
 };
 

[tip: x86/platform] x86/platform/uv: Add sysfs hubless leaves

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 433e817ae157479844d84b186dd4d165a3f2b06e
Gitweb:
https://git.kernel.org/tip/433e817ae157479844d84b186dd4d165a3f2b06e
Author:Mike Travis 
AuthorDate:Fri, 27 Nov 2020 21:42:25 -06:00
Committer: Borislav Petkov 
CommitterDate: Mon, 07 Dec 2020 19:51:05 +01:00

x86/platform/uv: Add sysfs hubless leaves

Add uv_sysfs hubless leaves for UV hubless systems.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Steve Wahl 
Acked-by: Hans de Goede 
Link: https://lkml.kernel.org/r/20201128034227.120869-4-mike.tra...@hpe.com
---
 drivers/platform/x86/uv_sysfs.c | 52 ++--
 1 file changed, 50 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/x86/uv_sysfs.c b/drivers/platform/x86/uv_sysfs.c
index 922d32f..7badcfa 100644
--- a/drivers/platform/x86/uv_sysfs.c
+++ b/drivers/platform/x86/uv_sysfs.c
@@ -44,6 +44,8 @@ static const char *uv_type_string(void)
return "5.0";
else if (is_uv2_hub())
return "3.0";
+   else if (uv_get_hubless_system())
+   return "0.1";
else
return "unknown";
 }
@@ -748,6 +750,12 @@ static ssize_t uv_hub_type_show(struct kobject *kobj,
return scnprintf(buf, PAGE_SIZE, "0x%x\n", uv_hub_type());
 }
 
+static ssize_t uv_hubless_show(struct kobject *kobj,
+   struct kobj_attribute *attr, char *buf)
+{
+   return scnprintf(buf, PAGE_SIZE, "0x%x\n", uv_get_hubless_system());
+}
+
 static struct kobj_attribute partition_id_attr =
__ATTR(partition_id, 0444, partition_id_show, NULL);
 static struct kobj_attribute coherence_id_attr =
@@ -758,6 +766,8 @@ static struct kobj_attribute uv_archtype_attr =
__ATTR(archtype, 0444, uv_archtype_show, NULL);
 static struct kobj_attribute uv_hub_type_attr =
__ATTR(hub_type, 0444, uv_hub_type_show, NULL);
+static struct kobj_attribute uv_hubless_attr =
+   __ATTR(hubless, 0444, uv_hubless_show, NULL);
 
 static struct attribute *base_attrs[] = {
_id_attr.attr,
@@ -805,11 +815,36 @@ static int initial_bios_setup(void)
return 0;
 }
 
+static struct attribute *hubless_base_attrs[] = {
+   _id_attr.attr,
+   _type_attr.attr,
+   _archtype_attr.attr,
+   _hubless_attr.attr,
+   NULL,
+};
+
+static struct attribute_group hubless_base_attr_group = {
+   .attrs = hubless_base_attrs
+};
+
+
+static int __init uv_sysfs_hubless_init(void)
+{
+   int ret;
+
+   ret = sysfs_create_group(sgi_uv_kobj, _base_attr_group);
+   if (ret) {
+   pr_warn("sysfs_create_group hubless_base_attr_group failed\n");
+   kobject_put(sgi_uv_kobj);
+   }
+   return ret;
+}
+
 static int __init uv_sysfs_init(void)
 {
int ret = 0;
 
-   if (!is_uv_system())
+   if (!is_uv_system() && !uv_get_hubless_system())
return -ENODEV;
 
num_cnodes = uv_num_possible_blades();
@@ -820,6 +855,10 @@ static int __init uv_sysfs_init(void)
pr_warn("kobject_create_and_add sgi_uv failed\n");
return -EINVAL;
}
+
+   if (uv_get_hubless_system())
+   return uv_sysfs_hubless_init();
+
ret = sysfs_create_group(sgi_uv_kobj, _attr_group);
if (ret) {
pr_warn("sysfs_create_group base_attr_group failed\n");
@@ -857,10 +896,19 @@ err_create_group:
return ret;
 }
 
+static void __exit uv_sysfs_hubless_exit(void)
+{
+   sysfs_remove_group(sgi_uv_kobj, _base_attr_group);
+   kobject_put(sgi_uv_kobj);
+}
+
 static void __exit uv_sysfs_exit(void)
 {
-   if (!is_uv_system())
+   if (!is_uv_system()) {
+   if (uv_get_hubless_system())
+   uv_sysfs_hubless_exit();
return;
+   }
 
pci_topology_exit();
uv_ports_exit();

[tip: x86/platform] x86/platform/uv: Add deprecated messages to /proc info leaves

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 148c277165cdc72d97d1711b9a1e566d66521828
Gitweb:
https://git.kernel.org/tip/148c277165cdc72d97d1711b9a1e566d66521828
Author:Mike Travis 
AuthorDate:Fri, 27 Nov 2020 21:42:26 -06:00
Committer: Borislav Petkov 
CommitterDate: Mon, 07 Dec 2020 20:03:09 +01:00

x86/platform/uv: Add deprecated messages to /proc info leaves

Add "deprecated" message to any access to old /proc/sgi_uv/* leaves.

 [ bp: Do not have a trailing function opening brace and the arguments
   continuing on the next line and align them on the opening brace. ]

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Steve Wahl 
Acked-by: Hans de Goede 
Link: https://lkml.kernel.org/r/20201128034227.120869-5-mike.tra...@hpe.com
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 4874603..d75e1d9 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1615,21 +1615,30 @@ static void check_efi_reboot(void)
reboot_type = BOOT_ACPI;
 }
 
-/* Setup user proc fs files */
+/*
+ * User proc fs file handling now deprecated.
+ * Recommend using /sys/firmware/sgi_uv/... instead.
+ */
 static int __maybe_unused proc_hubbed_show(struct seq_file *file, void *data)
 {
+   pr_notice_once("%s: using deprecated /proc/sgi_uv/hubbed, use 
/sys/firmware/sgi_uv/hub_type\n",
+  current->comm);
seq_printf(file, "0x%x\n", uv_hubbed_system);
return 0;
 }
 
 static int __maybe_unused proc_hubless_show(struct seq_file *file, void *data)
 {
+   pr_notice_once("%s: using deprecated /proc/sgi_uv/hubless, use 
/sys/firmware/sgi_uv/hubless\n",
+  current->comm);
seq_printf(file, "0x%x\n", uv_hubless_system);
return 0;
 }
 
 static int __maybe_unused proc_archtype_show(struct seq_file *file, void *data)
 {
+   pr_notice_once("%s: using deprecated /proc/sgi_uv/archtype, use 
/sys/firmware/sgi_uv/archtype\n",
+  current->comm);
seq_printf(file, "%s/%s\n", uv_archtype, oem_table_id);
return 0;
 }

[tip: x86/platform] x86/platform/uv: Add kernel interfaces for obtaining system info

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: a67fffb017aed93fca42ce7aa5b6aaf54ff912ad
Gitweb:
https://git.kernel.org/tip/a67fffb017aed93fca42ce7aa5b6aaf54ff912ad
Author:Mike Travis 
AuthorDate:Fri, 27 Nov 2020 21:42:23 -06:00
Committer: Borislav Petkov 
CommitterDate: Mon, 07 Dec 2020 19:44:54 +01:00

x86/platform/uv: Add kernel interfaces for obtaining system info

Add kernel interfaces used to obtain info for the uv_sysfs driver
to display.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Steve Wahl 
Acked-by: Hans de Goede 
Link: https://lkml.kernel.org/r/20201128034227.120869-2-mike.tra...@hpe.com
---
 arch/x86/include/asm/uv/bios.h |  2 ++
 arch/x86/kernel/apic/x2apic_uv_x.c | 12 
 2 files changed, 14 insertions(+)

diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index 01ba080..1b6455f 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -200,6 +200,8 @@ extern long sn_partition_id;
 extern long sn_coherency_id;
 extern long sn_region_size;
 extern long system_serial_number;
+extern ssize_t uv_get_archtype(char *buf, int len);
+extern int uv_get_hubless_system(void);
 
 extern struct kobject *sgi_uv_kobj;/* /sys/firmware/sgi_uv */
 
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 1b98f8c..4874603 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -502,6 +502,18 @@ enum uv_system_type get_uv_system_type(void)
return uv_system_type;
 }
 
+int uv_get_hubless_system(void)
+{
+   return uv_hubless_system;
+}
+EXPORT_SYMBOL_GPL(uv_get_hubless_system);
+
+ssize_t uv_get_archtype(char *buf, int len)
+{
+   return scnprintf(buf, len, "%s/%s", uv_archtype, oem_table_id);
+}
+EXPORT_SYMBOL_GPL(uv_get_archtype);
+
 int is_uv_system(void)
 {
return uv_system_type != UV_NONE;

[tip: x86/platform] x86/platform/uv: Update sysfs documentation

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: c9624cb7db1c418cbdc8fd2cde6835f83cd0f8a2
Gitweb:
https://git.kernel.org/tip/c9624cb7db1c418cbdc8fd2cde6835f83cd0f8a2
Author:Mike Travis 
AuthorDate:Fri, 27 Nov 2020 21:42:27 -06:00
Committer: Borislav Petkov 
CommitterDate: Mon, 07 Dec 2020 21:19:20 +01:00

x86/platform/uv: Update sysfs documentation

Update sysfs documentation file to include moved /proc leaves.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Acked-by: Hans de Goede 
Link: https://lkml.kernel.org/r/20201128034227.120869-6-mike.tra...@hpe.com
---
 Documentation/ABI/testing/sysfs-firmware-sgi_uv | 16 -
 1 file changed, 16 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-firmware-sgi_uv 
b/Documentation/ABI/testing/sysfs-firmware-sgi_uv
index 351b1f4..637c668 100644
--- a/Documentation/ABI/testing/sysfs-firmware-sgi_uv
+++ b/Documentation/ABI/testing/sysfs-firmware-sgi_uv
@@ -7,10 +7,25 @@ Description:
 
Under that directory are a number of read-only attributes::
 
+   archtype
+   hub_type
+   hubless
partition_id
coherence_id
uv_type
 
+   The archtype entry contains the UV architecture type that
+   is used to select arch-dependent addresses and features.
+   It can be set via the OEM_ID in the ACPI MADT table or by
+   UVsystab entry both passed from UV BIOS.
+
+   The hub_type entry is used to select the type of hub which is
+   similar to uv_type but encoded in a binary format.  Include
+   the file uv_hub.h to get the definitions.
+
+   The hubless entry basically is present and set only if there
+   is no hub.  In this case the hub_type entry is not present.
+
The partition_id entry contains the partition id.
UV systems can be partitioned into multiple physical
machines, which each partition running a unique copy
@@ -24,6 +39,7 @@ Description:
 
The uv_type entry contains the hub revision number.
This value can be used to identify the UV system version::
+   "0.*" = Hubless UV ('*' is subtype)
 
"3.0" = UV2
"5.0" = UV3

[tip: x86/urgent] x86/platform/uv: Fix UV4 hub revision adjustment

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID: 8dcc0e19dfbd73ad6b3172924d6da8f7f3f8b3b0
Gitweb:
https://git.kernel.org/tip/8dcc0e19dfbd73ad6b3172924d6da8f7f3f8b3b0
Author:Mike Travis 
AuthorDate:Thu, 03 Dec 2020 09:22:52 -06:00
Committer: Borislav Petkov 
CommitterDate: Thu, 03 Dec 2020 18:09:18 +01:00

x86/platform/uv: Fix UV4 hub revision adjustment

Currently, UV4 is incorrectly identified as UV4A and UV4A as UV5. Hub
chip starts with revision 1, fix it.

 [ bp: Massage commit message. ]

Fixes: 647128f1536e ("x86/platform/uv: Update UV MMRs for UV5")
Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Steve Wahl 
Acked-by: Dimitri Sivanich 
Link: https://lkml.kernel.org/r/20201203152252.371199-1-mike.tra...@hpe.com
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 1b98f8c..235f5cd 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -161,7 +161,7 @@ static int __init early_set_hub_type(void)
/* UV4/4A only have a revision difference */
case UV4_HUB_PART_NUMBER:
uv_min_hub_revision_id = node_id.s.revision
-+ UV4_HUB_REVISION_BASE;
++ UV4_HUB_REVISION_BASE - 1;
uv_hub_type_set(UV4);
if (uv_min_hub_revision_id == UV4A_HUB_REVISION_BASE)
uv_hub_type_set(UV4|UV4A);

[PATCH] Fix UV4 Hub Revision adjustment

[Mike Travis]

Fix UV4 Hub Revision adjustment as Hub chip starts with revision 1.
Incorrectly identifies UV4 as UV4A and UV4A as UV5.

Fixes 647128f1536ef: x86/platform/uv: Update UV MMRs for UV5

Signed-off-by: Mike Travis 
Acked-by: Dimitri Sivanich 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 1b98f8c12b96..235f5cde06fc 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -161,7 +161,7 @@ static int __init early_set_hub_type(void)
/* UV4/4A only have a revision difference */
case UV4_HUB_PART_NUMBER:
uv_min_hub_revision_id = node_id.s.revision
-+ UV4_HUB_REVISION_BASE;
++ UV4_HUB_REVISION_BASE - 1;
uv_hub_type_set(UV4);
if (uv_min_hub_revision_id == UV4A_HUB_REVISION_BASE)
uv_hub_type_set(UV4|UV4A);
-- 
2.21.0

[PATCH v2 5/5] x86/platform/uv: Update sysfs document file

[Mike Travis]

Update sysfs Document file to include moved /proc leaves.

Signed-off-by: Mike Travis 
---
 Documentation/ABI/testing/sysfs-firmware-sgi_uv | 16 
 1 file changed, 16 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-firmware-sgi_uv 
b/Documentation/ABI/testing/sysfs-firmware-sgi_uv
index 50e25ce80fa2..b377f1470ba2 100644
--- a/Documentation/ABI/testing/sysfs-firmware-sgi_uv
+++ b/Documentation/ABI/testing/sysfs-firmware-sgi_uv
@@ -7,10 +7,25 @@ Description:
 
Under that directory are a number of read-only attributes:
 
+   archtype
+   hub_type
+   hubless
partition_id
coherence_id
uv_type
 
+   The archtype entry contains the UV architecture type that
+   is used to select arch-dependent addresses and features.
+   If can be set via the OEM_ID in the ACPI MADT table or by
+   UVsystab entry both passed from UV BIOS.
+
+   The hub_type entry is used to select the type of hub which is
+   similar to uv_type but encoded in a binary format.  Include
+   the file uv_hub.h to get the definitions.
+
+   The hubless entry basically is present and set only if there
+   is no hub.  In this case the hub_type entry is not present.
+
The partition_id entry contains the partition id.
UV systems can be partitioned into multiple physical
machines, which each partition running a unique copy
@@ -24,6 +39,7 @@ Description:
 
The uv_type entry contains the hub revision number.
This value can be used to identify the UV system version:
+   "0.*" = Hubless UV ('*' is subtype)
"3.0" = UV2
"5.0" = UV3
"7.0" = UV4
-- 
2.21.0

[PATCH v2 0/5] x86/platform/uv: Move UV procfs leaves to sysfs

[Mike Travis]

Duplicate the current UV procfs leaves to the uv_sysfs driver so they show
up under /sys/firmware/sgi_uv.  Show a 'deprecated' warning message if
any of the old /proc/sgi_uv leaves are used.

These patches depend on the prior v3 patchset sent by Justin Ernst 

x86/platform/uv: Remove existing /sys/firmware/sgi_uv/ interface
x86/platform/uv: Add and export uv_bios_* functions
x86/platform/uv: Add new uv_sysfs platform driver
x86/platform/uv: Update ABI documentation of /sys/firmware/sgi_uv/
x86/platform/uv: Update MAINTAINERS for uv_sysfs driver

v2: Updated to apply to v3 of dependency patch set listed above.

Mike Travis (5):
  x86/platform/uv: Add kernel interfaces for obtaining system info.
  x86/platform/uv: Add sysfs leaves to replace those in procfs
  x86/platform/uv: Add sysfs hubless leaves
  x86/platform/uv: Add deprecated messages to /proc info leaves
  x86/platform/uv: Update sysfs document file

 .../ABI/testing/sysfs-firmware-sgi_uv | 16 +
 arch/x86/include/asm/uv/bios.h|  2 +
 arch/x86/kernel/apic/x2apic_uv_x.c| 26 ++-
 drivers/platform/x86/uv_sysfs.c   | 70 ++-
 4 files changed, 111 insertions(+), 3 deletions(-)

-- 
2.21.0

[PATCH v2 2/5] x86/platform/uv: Add sysfs leaves to replace those in procfs

[Mike Travis]

Add uv_sysfs leaves to display the info.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 drivers/platform/x86/uv_sysfs.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/platform/x86/uv_sysfs.c b/drivers/platform/x86/uv_sysfs.c
index 54c342579f1c..115754cdcd89 100644
--- a/drivers/platform/x86/uv_sysfs.c
+++ b/drivers/platform/x86/uv_sysfs.c
@@ -735,17 +735,35 @@ static ssize_t uv_type_show(struct kobject *kobj,
return scnprintf(buf, PAGE_SIZE, "%s\n", uv_type_string());
 }
 
+static ssize_t uv_archtype_show(struct kobject *kobj,
+   struct kobj_attribute *attr, char *buf)
+{
+   return uv_get_archtype(buf, PAGE_SIZE);
+}
+
+static ssize_t uv_hub_type_show(struct kobject *kobj,
+   struct kobj_attribute *attr, char *buf)
+{
+   return scnprintf(buf, PAGE_SIZE, "0x%x\n", uv_hub_type());
+}
+
 static struct kobj_attribute partition_id_attr =
__ATTR(partition_id, 0444, partition_id_show, NULL);
 static struct kobj_attribute coherence_id_attr =
__ATTR(coherence_id, 0444, coherence_id_show, NULL);
 static struct kobj_attribute uv_type_attr =
__ATTR(uv_type, 0444, uv_type_show, NULL);
+static struct kobj_attribute uv_archtype_attr =
+   __ATTR(archtype, 0444, uv_archtype_show, NULL);
+static struct kobj_attribute uv_hub_type_attr =
+   __ATTR(hub_type, 0444, uv_hub_type_show, NULL);
 
 static struct attribute *base_attrs[] = {
_id_attr.attr,
_id_attr.attr,
_type_attr.attr,
+   _archtype_attr.attr,
+   _hub_type_attr.attr,
NULL,
 };
 
-- 
2.21.0

[PATCH v2 4/5] x86/platform/uv: Add deprecated messages to /proc info leaves

[Mike Travis]

Add "deprecated" message to any access to old /proc/sgi_uv/* leaves.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 48746031b39a..4248579825fb 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1615,21 +1615,33 @@ static void check_efi_reboot(void)
reboot_type = BOOT_ACPI;
 }
 
-/* Setup user proc fs files */
+/*
+ * User proc fs file handling now deprecated.
+ * Recommend using /sys/firmware/sgi_uv/... instead.
+ */
 static int __maybe_unused proc_hubbed_show(struct seq_file *file, void *data)
 {
+   pr_notice_once(
+   "%s: using deprecated /proc/sgi_uv/hubbed, use 
/sys/firmware/sgi_uv/hub_type\n",
+   current->comm);
seq_printf(file, "0x%x\n", uv_hubbed_system);
return 0;
 }
 
 static int __maybe_unused proc_hubless_show(struct seq_file *file, void *data)
 {
+   pr_notice_once(
+   "%s: using deprecated /proc/sgi_uv/hubless, use 
/sys/firmware/sgi_uv/hubless\n",
+   current->comm);
seq_printf(file, "0x%x\n", uv_hubless_system);
return 0;
 }
 
 static int __maybe_unused proc_archtype_show(struct seq_file *file, void *data)
 {
+   pr_notice_once(
+   "%s: using deprecated /proc/sgi_uv/archtype, use 
/sys/firmware/sgi_uv/archtype\n",
+   current->comm);
seq_printf(file, "%s/%s\n", uv_archtype, oem_table_id);
return 0;
 }
-- 
2.21.0

[PATCH v2 1/5] x86/platform/uv: Add kernel interfaces for obtaining system info.

[Mike Travis]

Add kernel interfaces used to obtain info for the uv_sysfs driver
to display.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 arch/x86/include/asm/uv/bios.h |  2 ++
 arch/x86/kernel/apic/x2apic_uv_x.c | 12 
 2 files changed, 14 insertions(+)

diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index 01ba080887b3..1b6455f881f9 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -200,6 +200,8 @@ extern long sn_partition_id;
 extern long sn_coherency_id;
 extern long sn_region_size;
 extern long system_serial_number;
+extern ssize_t uv_get_archtype(char *buf, int len);
+extern int uv_get_hubless_system(void);
 
 extern struct kobject *sgi_uv_kobj;/* /sys/firmware/sgi_uv */
 
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 1b98f8c12b96..48746031b39a 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -502,6 +502,18 @@ enum uv_system_type get_uv_system_type(void)
return uv_system_type;
 }
 
+int uv_get_hubless_system(void)
+{
+   return uv_hubless_system;
+}
+EXPORT_SYMBOL_GPL(uv_get_hubless_system);
+
+ssize_t uv_get_archtype(char *buf, int len)
+{
+   return scnprintf(buf, len, "%s/%s", uv_archtype, oem_table_id);
+}
+EXPORT_SYMBOL_GPL(uv_get_archtype);
+
 int is_uv_system(void)
 {
return uv_system_type != UV_NONE;
-- 
2.21.0

[PATCH v2 3/5] x86/platform/uv: Add sysfs hubless leaves

[Mike Travis]

Add uv_sysfs hubless leaves for UV hubless systems.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 drivers/platform/x86/uv_sysfs.c | 52 +++--
 1 file changed, 50 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/x86/uv_sysfs.c b/drivers/platform/x86/uv_sysfs.c
index 115754cdcd89..913559797ba4 100644
--- a/drivers/platform/x86/uv_sysfs.c
+++ b/drivers/platform/x86/uv_sysfs.c
@@ -44,6 +44,8 @@ static const char *uv_type_string(void)
return "5.0";
else if (is_uv2_hub())
return "3.0";
+   else if (uv_get_hubless_system())
+   return "0.1";
else
return "unknown";
 }
@@ -747,6 +749,12 @@ static ssize_t uv_hub_type_show(struct kobject *kobj,
return scnprintf(buf, PAGE_SIZE, "0x%x\n", uv_hub_type());
 }
 
+static ssize_t uv_hubless_show(struct kobject *kobj,
+   struct kobj_attribute *attr, char *buf)
+{
+   return scnprintf(buf, PAGE_SIZE, "0x%x\n", uv_get_hubless_system());
+}
+
 static struct kobj_attribute partition_id_attr =
__ATTR(partition_id, 0444, partition_id_show, NULL);
 static struct kobj_attribute coherence_id_attr =
@@ -757,6 +765,8 @@ static struct kobj_attribute uv_archtype_attr =
__ATTR(archtype, 0444, uv_archtype_show, NULL);
 static struct kobj_attribute uv_hub_type_attr =
__ATTR(hub_type, 0444, uv_hub_type_show, NULL);
+static struct kobj_attribute uv_hubless_attr =
+   __ATTR(hubless, 0444, uv_hubless_show, NULL);
 
 static struct attribute *base_attrs[] = {
_id_attr.attr,
@@ -804,11 +814,36 @@ static int initial_bios_setup(void)
return 0;
 }
 
+static struct attribute *hubless_base_attrs[] = {
+   _id_attr.attr,
+   _type_attr.attr,
+   _archtype_attr.attr,
+   _hubless_attr.attr,
+   NULL,
+};
+
+static struct attribute_group hubless_base_attr_group = {
+   .attrs = hubless_base_attrs
+};
+
+
+static int __init uv_sysfs_hubless_init(void)
+{
+   int ret;
+
+   ret = sysfs_create_group(sgi_uv_kobj, _base_attr_group);
+   if (ret) {
+   pr_warn("sysfs_create_group hubless_base_attr_group failed\n");
+   kobject_put(sgi_uv_kobj);
+   }
+   return ret;
+}
+
 static int __init uv_sysfs_init(void)
 {
int ret = 0;
 
-   if (!is_uv_system())
+   if (!is_uv_system() && !uv_get_hubless_system())
return -ENODEV;
 
num_cnodes = uv_num_possible_blades();
@@ -819,6 +854,10 @@ static int __init uv_sysfs_init(void)
pr_warn("kobject_create_and_add sgi_uv failed\n");
return -EINVAL;
}
+
+   if (uv_get_hubless_system())
+   return uv_sysfs_hubless_init();
+
ret = sysfs_create_group(sgi_uv_kobj, _attr_group);
if (ret) {
pr_warn("sysfs_create_group base_attr_group failed\n");
@@ -856,10 +895,19 @@ static int __init uv_sysfs_init(void)
return ret;
 }
 
+static void __exit uv_sysfs_hubless_exit(void)
+{
+   sysfs_remove_group(sgi_uv_kobj, _base_attr_group);
+   kobject_put(sgi_uv_kobj);
+}
+
 static void __exit uv_sysfs_exit(void)
 {
-   if (!is_uv_system())
+   if (!is_uv_system()) {
+   if (uv_get_hubless_system())
+   uv_sysfs_hubless_exit();
return;
+   }
 
pci_topology_exit();
uv_ports_exit();
-- 
2.21.0

Re: [PATCH 4/5] x86/platform/uv: Add deprecated messages to /proc info leaves

[Mike Travis]

On 11/26/2020 2:45 AM, Hans de Goede wrote:

Hi,

On 11/25/20 6:29 PM, Mike Travis wrote:

Add "deprecated" message to any access to old /proc/sgi_uv/* leaves.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
  arch/x86/kernel/apic/x2apic_uv_x.c | 26 +-
  1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 48746031b39a..bfd77a00c2a1 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1615,21 +1615,45 @@ static void check_efi_reboot(void)
reboot_type = BOOT_ACPI;
  }
  
-/* Setup user proc fs files */

+/*
+ * User proc fs file handling now deprecated.
+ * Recommend using /sys/firmware/sgi_uv/... instead.
+ */
+static void proc_print_msg(int *flag, char *what, char *which)
+{
+   if (*flag)
+   return;
+
+   pr_notice(
+   "%s: using deprecated /proc/sgi_uv/%s, use 
/sys/firmware/sgi_uv/%s\n",
+   current->comm, what, which ? which : what);
+
+   *flag = 1;
+}
+


You have just re-invented pr_notice_once, please just use pr_notice_once
directly in the _show functions.


I tried it both ways (actually with rate limiting as well).  The problem 
with using a static check in the error print function it will only print 
the first instance it encounters, not all of the references.


If I move it to the final output I need to replicate the verbiage of the 
format for every instance as you can't seem to combine the KERN_* level 
of printing and the pr_fmt reference of the format string.  I tried a 
few ways including just putting everything into a format character list. 
 But what used to work (indirect format pointer) doesn't any more.  Or 
I didn't hit on the correct combination of KERN_* level and indirect 
format string.


The last combination was no print limiting which caused of course the 
error message to be output on every occurrence.  (NASA has 35,000 
customers for their big systems, that's a lot of potential console 
messages.)  This really annoys them and we would get calls from those 
that don't have any means of changing this so they ask us.


So I just chose this method of accomplishing all goals, except of course 
using the higher level of print function (pr_notice_once).  But if you 
think method two ("use pr_notice_once directly in the _show function") 
is most favorable I will switch to that.  Thanks.




Regards,

Hans





  static int __maybe_unused proc_hubbed_show(struct seq_file *file, void *data)
  {
+   static int flag;
+
+   proc_print_msg(, "hubbed", "hub_type");
seq_printf(file, "0x%x\n", uv_hubbed_system);
return 0;
  }
  
  static int __maybe_unused proc_hubless_show(struct seq_file *file, void *data)

  {
+   static int flag;
+
+   proc_print_msg(, "hubless", NULL);
seq_printf(file, "0x%x\n", uv_hubless_system);
return 0;
  }
  
  static int __maybe_unused proc_archtype_show(struct seq_file *file, void *data)

  {
+   static int flag;
+
+   proc_print_msg(, "archtype", NULL);
seq_printf(file, "%s/%s\n", uv_archtype, oem_table_id);
return 0;
  }

Re: [PATCH 0/5] x86/platform/uv: Move UV procfs leaves to sysfs

[Mike Travis]

On 11/26/2020 2:44 AM, Hans de Goede wrote:

Hi,

On 11/25/20 6:29 PM, Mike Travis wrote:


Duplicate the current UV procfs leaves to the uv_sysfs driver so they show
up under /sys/firmware/sgi_uv.  Show a 'deprecated' warning message if
any of the old /proc/sgi_uv leaves are used.

These patches depend on the prior set sent by Justin Ernst 

x86/platform/uv: Remove existing /sys/firmware/sgi_uv/ interface
x86/platform/uv: Add and export uv_bios_* functions
x86/platform/uv: Add new uv_sysfs platform driver
x86/platform/uv: Update ABI documentation of /sys/firmware/sgi_uv/
x86/platform/uv: Update MAINTAINERS for uv_sysfs driver

Mike Travis (5):
   x86/platform/uv: Add kernel interfaces for obtaining system info.
   x86/platform/uv: Add sysfs leaves to replace those in procfs
   x86/platform/uv: Add sysfs hubless leaves
   x86/platform/uv: Add deprecated messages to /proc info leaves
   x86/platform/uv: Update sysfs document file

  .../ABI/testing/sysfs-firmware-sgi_uv | 16 +
  arch/x86/include/asm/uv/bios.h|  2 +
  arch/x86/kernel/apic/x2apic_uv_x.c| 38 +-
  drivers/platform/x86/uv_sysfs.c   | 70 ++-
  4 files changed, 123 insertions(+), 3 deletions(-)


This series depends on the:

[PATCH v3 0/5] x86/platform/uv: Add uv_sysfs platform driver

Series, next time when such a thing is the case, please add a note
about this to the cover letter.

Like with the "[PATCH v3 0/5] x86/platform/uv: Add uv_sysfs platform driver" 
series,
this series too should be merged in its entirety through the x86/tip tree (once 
the
other series is merged). Please also add this info to the cover letter.

I've one remark to patch 4 (which I send in a reply to that). So a v2 is going
to be necessary. Please include the above bits in the v2 cover-letter.


I was just about to send a notice that Justin changed the underlying 
patch that these depend on.  (I was gone late Wednesday and all day 
yesterday).  That will be done later today, thanks!




Regards,

Hans

[PATCH 5/5] x86/platform/uv: Update sysfs document file

[Mike Travis]

Update sysfs Document file to include moved /proc leaves.

Signed-off-by: Mike Travis 
---
 Documentation/ABI/testing/sysfs-firmware-sgi_uv | 16 
 1 file changed, 16 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-firmware-sgi_uv 
b/Documentation/ABI/testing/sysfs-firmware-sgi_uv
index ca5cdccdb1a8..fa7f7aefa5ed 100644
--- a/Documentation/ABI/testing/sysfs-firmware-sgi_uv
+++ b/Documentation/ABI/testing/sysfs-firmware-sgi_uv
@@ -7,9 +7,24 @@ Description:
 
Under that directory are a number of read-only attributes:
 
+   archtype
+   hub_type
+   hubless
partition_id
uv_type
 
+   The archtype entry contains the UV architecture type that
+   is used to select arch-dependent addresses and features.
+   If can be set via the OEM_ID in the ACPI MADT table or by
+   UVsystab entry both passed from UV BIOS.
+
+   The hub_type entry is used to select the type of hub which is
+   similar to uv_type but encoded in a binary format.  Include
+   the file uv_hub.h to get the definitions.
+
+   The hubless entry basically is present and set only if there
+   is no hub.  In this case the hub_type entry is not present.
+
The partition_id entry contains the partition id.
UV systems can be partitioned into multiple physical
machines, which each partition running a unique copy
@@ -18,6 +33,7 @@ Description:
 
The uv_type entry contains the hub revision number.
This value can be used to identify the UV system version:
+   "0.*" = Hubless UV ('*' is subtype)
"3.0" = UV2
"5.0" = UV3
"7.0" = UV4
-- 
2.21.0

[PATCH 2/5] x86/platform/uv: Add sysfs leaves to replace those in procfs

[Mike Travis]

Add uv_sysfs leaves to display the info.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 drivers/platform/x86/uv_sysfs.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/platform/x86/uv_sysfs.c b/drivers/platform/x86/uv_sysfs.c
index 6de360370f0e..6729ea8b63d2 100644
--- a/drivers/platform/x86/uv_sysfs.c
+++ b/drivers/platform/x86/uv_sysfs.c
@@ -729,14 +729,32 @@ static ssize_t uv_type_show(struct kobject *kobj,
return scnprintf(buf, PAGE_SIZE, "%s\n", uv_type_string());
 }
 
+static ssize_t uv_archtype_show(struct kobject *kobj,
+   struct kobj_attribute *attr, char *buf)
+{
+   return uv_get_archtype(buf, PAGE_SIZE);
+}
+
+static ssize_t uv_hub_type_show(struct kobject *kobj,
+   struct kobj_attribute *attr, char *buf)
+{
+   return scnprintf(buf, PAGE_SIZE, "0x%x\n", uv_hub_type());
+}
+
 static struct kobj_attribute partition_id_attr =
__ATTR(partition_id, 0444, partition_id_show, NULL);
 static struct kobj_attribute uv_type_attr =
__ATTR(uv_type, 0444, uv_type_show, NULL);
+static struct kobj_attribute uv_archtype_attr =
+   __ATTR(archtype, 0444, uv_archtype_show, NULL);
+static struct kobj_attribute uv_hub_type_attr =
+   __ATTR(hub_type, 0444, uv_hub_type_show, NULL);
 
 static struct attribute *base_attrs[] = {
_id_attr.attr,
_type_attr.attr,
+   _archtype_attr.attr,
+   _hub_type_attr.attr,
NULL,
 };
 
-- 
2.21.0

[PATCH 3/5] x86/platform/uv: Add sysfs hubless leaves

[Mike Travis]

Add uv_sysfs hubless leaves for UV hubless systems.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 drivers/platform/x86/uv_sysfs.c | 52 +++--
 1 file changed, 50 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/x86/uv_sysfs.c b/drivers/platform/x86/uv_sysfs.c
index 6729ea8b63d2..5aa1addf3598 100644
--- a/drivers/platform/x86/uv_sysfs.c
+++ b/drivers/platform/x86/uv_sysfs.c
@@ -44,6 +44,8 @@ static const char *uv_type_string(void)
return "5.0";
else if (is_uv2_hub())
return "3.0";
+   else if (uv_get_hubless_system())
+   return "0.1";
else
return "unknown";
 }
@@ -741,6 +743,12 @@ static ssize_t uv_hub_type_show(struct kobject *kobj,
return scnprintf(buf, PAGE_SIZE, "0x%x\n", uv_hub_type());
 }
 
+static ssize_t uv_hubless_show(struct kobject *kobj,
+   struct kobj_attribute *attr, char *buf)
+{
+   return scnprintf(buf, PAGE_SIZE, "0x%x\n", uv_get_hubless_system());
+}
+
 static struct kobj_attribute partition_id_attr =
__ATTR(partition_id, 0444, partition_id_show, NULL);
 static struct kobj_attribute uv_type_attr =
@@ -749,6 +757,8 @@ static struct kobj_attribute uv_archtype_attr =
__ATTR(archtype, 0444, uv_archtype_show, NULL);
 static struct kobj_attribute uv_hub_type_attr =
__ATTR(hub_type, 0444, uv_hub_type_show, NULL);
+static struct kobj_attribute uv_hubless_attr =
+   __ATTR(hubless, 0444, uv_hubless_show, NULL);
 
 static struct attribute *base_attrs[] = {
_id_attr.attr,
@@ -795,11 +805,36 @@ static int initial_bios_setup(void)
return 0;
 }
 
+static struct attribute *hubless_base_attrs[] = {
+   _id_attr.attr,
+   _type_attr.attr,
+   _archtype_attr.attr,
+   _hubless_attr.attr,
+   NULL,
+};
+
+static struct attribute_group hubless_base_attr_group = {
+   .attrs = hubless_base_attrs
+};
+
+
+static int __init uv_sysfs_hubless_init(void)
+{
+   int ret;
+
+   ret = sysfs_create_group(sgi_uv_kobj, _base_attr_group);
+   if (ret) {
+   pr_warn("sysfs_create_group hubless_base_attr_group failed\n");
+   kobject_put(sgi_uv_kobj);
+   }
+   return ret;
+}
+
 static int __init uv_sysfs_init(void)
 {
int ret = 0;
 
-   if (!is_uv_system())
+   if (!is_uv_system() && !uv_get_hubless_system())
return -ENODEV;
 
num_cnodes = uv_num_possible_blades();
@@ -810,6 +845,10 @@ static int __init uv_sysfs_init(void)
pr_warn("kobject_create_and_add sgi_uv failed\n");
return -EINVAL;
}
+
+   if (uv_get_hubless_system())
+   return uv_sysfs_hubless_init();
+
ret = sysfs_create_group(sgi_uv_kobj, _attr_group);
if (ret) {
pr_warn("sysfs_create_group base_attr_group failed\n");
@@ -847,10 +886,19 @@ static int __init uv_sysfs_init(void)
return ret;
 }
 
+static void __exit uv_sysfs_hubless_exit(void)
+{
+   sysfs_remove_group(sgi_uv_kobj, _base_attr_group);
+   kobject_put(sgi_uv_kobj);
+}
+
 static void __exit uv_sysfs_exit(void)
 {
-   if (!is_uv_system())
+   if (!is_uv_system()) {
+   if (uv_get_hubless_system())
+   uv_sysfs_hubless_exit();
return;
+   }
 
pci_topology_exit();
uv_ports_exit();
-- 
2.21.0

[PATCH 4/5] x86/platform/uv: Add deprecated messages to /proc info leaves

[Mike Travis]

Add "deprecated" message to any access to old /proc/sgi_uv/* leaves.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 26 +-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 48746031b39a..bfd77a00c2a1 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1615,21 +1615,45 @@ static void check_efi_reboot(void)
reboot_type = BOOT_ACPI;
 }
 
-/* Setup user proc fs files */
+/*
+ * User proc fs file handling now deprecated.
+ * Recommend using /sys/firmware/sgi_uv/... instead.
+ */
+static void proc_print_msg(int *flag, char *what, char *which)
+{
+   if (*flag)
+   return;
+
+   pr_notice(
+   "%s: using deprecated /proc/sgi_uv/%s, use 
/sys/firmware/sgi_uv/%s\n",
+   current->comm, what, which ? which : what);
+
+   *flag = 1;
+}
+
 static int __maybe_unused proc_hubbed_show(struct seq_file *file, void *data)
 {
+   static int flag;
+
+   proc_print_msg(, "hubbed", "hub_type");
seq_printf(file, "0x%x\n", uv_hubbed_system);
return 0;
 }
 
 static int __maybe_unused proc_hubless_show(struct seq_file *file, void *data)
 {
+   static int flag;
+
+   proc_print_msg(, "hubless", NULL);
seq_printf(file, "0x%x\n", uv_hubless_system);
return 0;
 }
 
 static int __maybe_unused proc_archtype_show(struct seq_file *file, void *data)
 {
+   static int flag;
+
+   proc_print_msg(, "archtype", NULL);
seq_printf(file, "%s/%s\n", uv_archtype, oem_table_id);
return 0;
 }
-- 
2.21.0

[PATCH 1/5] x86/platform/uv: Add kernel interfaces for obtaining system info.

[Mike Travis]

Add kernel interfaces used to obtain info for the uv_sysfs driver
to display.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 arch/x86/include/asm/uv/bios.h |  2 ++
 arch/x86/kernel/apic/x2apic_uv_x.c | 12 
 2 files changed, 14 insertions(+)

diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index 01ba080887b3..1b6455f881f9 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -200,6 +200,8 @@ extern long sn_partition_id;
 extern long sn_coherency_id;
 extern long sn_region_size;
 extern long system_serial_number;
+extern ssize_t uv_get_archtype(char *buf, int len);
+extern int uv_get_hubless_system(void);
 
 extern struct kobject *sgi_uv_kobj;/* /sys/firmware/sgi_uv */
 
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 1b98f8c12b96..48746031b39a 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -502,6 +502,18 @@ enum uv_system_type get_uv_system_type(void)
return uv_system_type;
 }
 
+int uv_get_hubless_system(void)
+{
+   return uv_hubless_system;
+}
+EXPORT_SYMBOL_GPL(uv_get_hubless_system);
+
+ssize_t uv_get_archtype(char *buf, int len)
+{
+   return scnprintf(buf, len, "%s/%s", uv_archtype, oem_table_id);
+}
+EXPORT_SYMBOL_GPL(uv_get_archtype);
+
 int is_uv_system(void)
 {
return uv_system_type != UV_NONE;
-- 
2.21.0

[PATCH 0/5] x86/platform/uv: Move UV procfs leaves to sysfs

[Mike Travis]

Duplicate the current UV procfs leaves to the uv_sysfs driver so they show
up under /sys/firmware/sgi_uv.  Show a 'deprecated' warning message if
any of the old /proc/sgi_uv leaves are used.

These patches depend on the prior set sent by Justin Ernst 

x86/platform/uv: Remove existing /sys/firmware/sgi_uv/ interface
x86/platform/uv: Add and export uv_bios_* functions
x86/platform/uv: Add new uv_sysfs platform driver
x86/platform/uv: Update ABI documentation of /sys/firmware/sgi_uv/
x86/platform/uv: Update MAINTAINERS for uv_sysfs driver

Mike Travis (5):
  x86/platform/uv: Add kernel interfaces for obtaining system info.
  x86/platform/uv: Add sysfs leaves to replace those in procfs
  x86/platform/uv: Add sysfs hubless leaves
  x86/platform/uv: Add deprecated messages to /proc info leaves
  x86/platform/uv: Update sysfs document file

 .../ABI/testing/sysfs-firmware-sgi_uv | 16 +
 arch/x86/include/asm/uv/bios.h|  2 +
 arch/x86/kernel/apic/x2apic_uv_x.c| 38 +-
 drivers/platform/x86/uv_sysfs.c   | 70 ++-
 4 files changed, 123 insertions(+), 3 deletions(-)

-- 
2.21.0

[tip: x86/urgent] x86/platform/uv: Fix copied UV5 output archtype

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID: 77c7e1bc060deab6430f1dff5922ccd3093d9776
Gitweb:
https://git.kernel.org/tip/77c7e1bc060deab6430f1dff5922ccd3093d9776
Author:Mike Travis 
AuthorDate:Tue, 10 Nov 2020 19:04:18 -06:00
Committer: Thomas Gleixner 
CommitterDate: Fri, 13 Nov 2020 00:00:31 +01:00

x86/platform/uv: Fix copied UV5 output archtype

A test shows that the output contains a space:
# cat /proc/sgi_uv/archtype
NSGI4 U/UVX

Remove that embedded space by copying the "trimmed" buffer instead of the
untrimmed input character list.  Use sizeof to remove size dependency on
copy out length.  Increase output buffer size by one character just in case
BIOS sends an 8 character string for archtype.

Fixes: 1e61f5a95f19 ("Add and decode Arch Type in UVsystab")
Signed-off-by: Mike Travis 
Signed-off-by: Thomas Gleixner 
Reviewed-by: Steve Wahl 
Link: https://lore.kernel.org/r/2020010418.82133-1-mike.tra...@hpe.com
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 3115caa..1b98f8c 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -33,7 +33,7 @@ static union uvh_apicid   uvh_apicid;
 static int uv_node_id;
 
 /* Unpack AT/OEM/TABLE ID's to be NULL terminated strings */
-static u8 uv_archtype[UV_AT_SIZE];
+static u8 uv_archtype[UV_AT_SIZE + 1];
 static u8 oem_id[ACPI_OEM_ID_SIZE + 1];
 static u8 oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
 
@@ -320,7 +320,7 @@ static int __init decode_arch_type(unsigned long ptr)
 
if (n > 0 && n < sizeof(uv_ate->archtype)) {
pr_info("UV: UVarchtype received from BIOS\n");
-   uv_stringify(UV_AT_SIZE, uv_archtype, uv_ate->archtype);
+   uv_stringify(sizeof(uv_archtype), uv_archtype, 
uv_ate->archtype);
return 1;
}
return 0;
@@ -378,7 +378,7 @@ static int __init uv_set_system_type(char *_oem_id, char 
*_oem_table_id)
if (!early_get_arch_type())
 
/* If not use OEM ID for UVarchtype */
-   uv_stringify(UV_AT_SIZE, uv_archtype, _oem_id);
+   uv_stringify(sizeof(uv_archtype), uv_archtype, oem_id);
 
/* Check if not hubbed */
if (strncmp(uv_archtype, "SGI", 3) != 0) {

[PATCH] x86/platform/uv: UV5 Fix copied output archtype

[Mike Travis]

A test shows that the output contains a space:
# cat /proc/sgi_uv/archtype
NSGI4 U/UVX
Remove that embedded space by copying the "trimmed" buffer instead of the
untrimmed input character list.  Use sizeof to remove size dependency
on copy out length.  Increase output buffer size by one character just
in case BIOS sends an 8 character string for archtype.

Fixes: 1e61f5a95f191 (Add and decode Arch Type in UVsystab)

Signed-off-by: Mike Travis 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 3115caa7d7d0..1b98f8c12b96 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -33,7 +33,7 @@ static union uvh_apicid   uvh_apicid;
 static int uv_node_id;
 
 /* Unpack AT/OEM/TABLE ID's to be NULL terminated strings */
-static u8 uv_archtype[UV_AT_SIZE];
+static u8 uv_archtype[UV_AT_SIZE + 1];
 static u8 oem_id[ACPI_OEM_ID_SIZE + 1];
 static u8 oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
 
@@ -320,7 +320,7 @@ static int __init decode_arch_type(unsigned long ptr)
 
if (n > 0 && n < sizeof(uv_ate->archtype)) {
pr_info("UV: UVarchtype received from BIOS\n");
-   uv_stringify(UV_AT_SIZE, uv_archtype, uv_ate->archtype);
+   uv_stringify(sizeof(uv_archtype), uv_archtype, 
uv_ate->archtype);
return 1;
}
return 0;
@@ -378,7 +378,7 @@ static int __init uv_set_system_type(char *_oem_id, char 
*_oem_table_id)
if (!early_get_arch_type())
 
/* If not use OEM ID for UVarchtype */
-   uv_stringify(UV_AT_SIZE, uv_archtype, _oem_id);
+   uv_stringify(sizeof(uv_archtype), uv_archtype, oem_id);
 
/* Check if not hubbed */
if (strncmp(uv_archtype, "SGI", 3) != 0) {
-- 
2.21.0

Re: [PATCH] x86/platform/uv: drop last traces of uv_flush_tlb_others

[Mike Travis]

Thanks Jiri for catching that.

Acked-By: Mike Travis 

On 11/9/2020 1:36 AM, Jiri Slaby wrote:

Commit 39297dde7390 ("x86/platform/uv: Remove UV BAU TLB Shootdown
Handler") removed uv_flush_tlb_others. Its declaration was removed also
from asm/uv/uv.h. But only for the CONFIG_X86_UV=y case. The inline
definition (!X86_UV case) is still in place.

So remove this implementation with everything what was added to support
uv_flush_tlb_others:
* include of asm/tlbflush.h
* forward declarations of struct cpumask, mm_struct, and flush_tlb_info

Signed-off-by: Jiri Slaby 
Cc: Mike Travis 
Cc: Dimitri Sivanich 
Cc: Steve Wahl 
Cc: Russ Anderson 
Cc: Thomas Gleixner 
Cc: Ingo Molnar 
Cc: Borislav Petkov 
Cc: x...@kernel.org
Cc: "H. Peter Anvin" 
---
  arch/x86/include/asm/uv/uv.h | 10 --
  1 file changed, 10 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv.h b/arch/x86/include/asm/uv/uv.h
index 172d3e4a9e4b..648eb23fe7f0 100644
--- a/arch/x86/include/asm/uv/uv.h
+++ b/arch/x86/include/asm/uv/uv.h
@@ -2,14 +2,8 @@
  #ifndef _ASM_X86_UV_UV_H
  #define _ASM_X86_UV_UV_H
  
-#include 

-
  enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC};
  
-struct cpumask;

-struct mm_struct;
-struct flush_tlb_info;
-
  #ifdef CONFIG_X86_UV
  #include 
  
@@ -44,10 +38,6 @@ static inline int is_uv_system(void)	{ return 0; }

  static inline int is_uv_hubbed(int uv){ return 0; }
  static inline void uv_cpu_init(void)  { }
  static inline void uv_system_init(void)   { }
-static inline const struct cpumask *
-uv_flush_tlb_others(const struct cpumask *cpumask,
-   const struct flush_tlb_info *info)
-{ return cpumask; }
  
  #endif	/* X86_UV */
  

[tip: x86/urgent] x86/platform/uv: Recognize UV5 hubless system identifier

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID: 801284f9737883a2b2639bd494455a72c82fdedf
Gitweb:
https://git.kernel.org/tip/801284f9737883a2b2639bd494455a72c82fdedf
Author:Mike Travis 
AuthorDate:Thu, 05 Nov 2020 16:27:41 -06:00
Committer: Thomas Gleixner 
CommitterDate: Sat, 07 Nov 2020 11:17:39 +01:00

x86/platform/uv: Recognize UV5 hubless system identifier

Testing shows a problem in that UV5 hubless systems were not being
recognized.  Add them to the list of OEM IDs checked.

Fixes: 6c7794423a998 ("Add UV5 direct references")
Signed-off-by: Mike Travis 
Signed-off-by: Thomas Gleixner 
Link: https://lore.kernel.org/r/20201105222741.157029-4-mike.tra...@hpe.com


---
 arch/x86/kernel/apic/x2apic_uv_x.c | 13 ++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 0f848d6..3115caa 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -389,13 +389,20 @@ static int __init uv_set_system_type(char *_oem_id, char 
*_oem_table_id)
/* (Not hubless), not a UV */
return 0;
 
+   /* Is UV hubless system */
+   uv_hubless_system = 0x01;
+
+   /* UV5 Hubless */
+   if (strncmp(uv_archtype, "NSGI5", 5) == 0)
+   uv_hubless_system |= 0x20;
+
/* UV4 Hubless: CH */
-   if (strncmp(uv_archtype, "NSGI4", 5) == 0)
-   uv_hubless_system = 0x11;
+   else if (strncmp(uv_archtype, "NSGI4", 5) == 0)
+   uv_hubless_system |= 0x10;
 
/* UV3 Hubless: UV300/MC990X w/o hub */
else
-   uv_hubless_system = 0x9;
+   uv_hubless_system |= 0x8;
 
/* Copy APIC type */
uv_stringify(sizeof(oem_table_id), oem_table_id, _oem_table_id);

[tip: x86/urgent] x86/platform/uv: Fix missing OEM_TABLE_ID

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID: 1aec69ae56be28b5fd3c9daead5f3840c30153c8
Gitweb:
https://git.kernel.org/tip/1aec69ae56be28b5fd3c9daead5f3840c30153c8
Author:Mike Travis 
AuthorDate:Thu, 05 Nov 2020 16:27:39 -06:00
Committer: Thomas Gleixner 
CommitterDate: Sat, 07 Nov 2020 11:17:39 +01:00

x86/platform/uv: Fix missing OEM_TABLE_ID

Testing shows a problem in that the OEM_TABLE_ID was missing for
hubless systems.  This is used to determine the APIC type (legacy or
extended).  Add the OEM_TABLE_ID to the early hubless processing.

Fixes: 1e61f5a95f191 ("Add and decode Arch Type in UVsystab")
Signed-off-by: Mike Travis 
Signed-off-by: Thomas Gleixner 
Link: https://lore.kernel.org/r/20201105222741.157029-2-mike.tra...@hpe.com
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 714233c..a579479 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -366,7 +366,7 @@ static int __init early_get_arch_type(void)
return ret;
 }
 
-static int __init uv_set_system_type(char *_oem_id)
+static int __init uv_set_system_type(char *_oem_id, char *_oem_table_id)
 {
/* Save OEM_ID passed from ACPI MADT */
uv_stringify(sizeof(oem_id), oem_id, _oem_id);
@@ -394,6 +394,9 @@ static int __init uv_set_system_type(char *_oem_id)
else
uv_hubless_system = 0x9;
 
+   /* Copy APIC type */
+   uv_stringify(sizeof(oem_table_id), oem_table_id, _oem_table_id);
+
pr_info("UV: OEM IDs %s/%s, SystemType %d, HUBLESS ID %x\n",
oem_id, oem_table_id, uv_system_type, 
uv_hubless_system);
return 0;
@@ -456,7 +459,7 @@ static int __init uv_acpi_madt_oem_check(char *_oem_id, 
char *_oem_table_id)
uv_cpu_info->p_uv_hub_info = _hub_info_node0;
 
/* If not UV, return. */
-   if (likely(uv_set_system_type(_oem_id) == 0))
+   if (uv_set_system_type(_oem_id, _oem_table_id) == 0)
return 0;
 
/* Save and Decode OEM Table ID */

[tip: x86/urgent] x86/platform/uv: Remove spaces from OEM IDs

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID: 1aee505e0171fc38fd5ed70c7f0dcbb7398c759f
Gitweb:
https://git.kernel.org/tip/1aee505e0171fc38fd5ed70c7f0dcbb7398c759f
Author:Mike Travis 
AuthorDate:Thu, 05 Nov 2020 16:27:40 -06:00
Committer: Thomas Gleixner 
CommitterDate: Sat, 07 Nov 2020 11:17:39 +01:00

x86/platform/uv: Remove spaces from OEM IDs

Testing shows that trailing spaces caused problems with the OEM_ID and
the OEM_TABLE_ID.  One being that the OEM_ID would not string compare
correctly.  Another the OEM_ID and OEM_TABLE_ID would be concatenated
in the printout.  Remove any trailing spaces.

Fixes: 1e61f5a95f191 ("Add and decode Arch Type in UVsystab")
Signed-off-by: Mike Travis 
Signed-off-by: Thomas Gleixner 
Link: https://lore.kernel.org/r/20201105222741.157029-3-mike.tra...@hpe.com


---
 arch/x86/kernel/apic/x2apic_uv_x.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index a579479..0f848d6 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -290,6 +290,9 @@ static void __init uv_stringify(int len, char *to, char 
*from)
 {
/* Relies on 'to' being NULL chars so result will be NULL terminated */
strncpy(to, from, len-1);
+
+   /* Trim trailing spaces */
+   (void)strim(to);
 }
 
 /* Find UV arch type entry in UVsystab */

[PATCH 2/3] x86/platform/uv: Remove spaces from OEM IDs

[Mike Travis]

Testing shows that trailing spaces caused problems with the OEM_ID and
the OEM_TABLE_ID.  One being that the OEM_ID would not string compare
correctly.  Another the OEM_ID and OEM_TABLE_ID would be concatenated
in the printout.  Remove any trailing spaces.

Fixes: 1e61f5a95f191 ("Add and decode Arch Type in UVsystab")

Signed-off-by: Mike Travis 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index a5794794ea59..0f848d6dddc9 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -290,6 +290,9 @@ static void __init uv_stringify(int len, char *to, char 
*from)
 {
/* Relies on 'to' being NULL chars so result will be NULL terminated */
strncpy(to, from, len-1);
+
+   /* Trim trailing spaces */
+   (void)strim(to);
 }
 
 /* Find UV arch type entry in UVsystab */
-- 
2.21.0

[PATCH 3/3] x86/platform/uv: Recognize UV5 hubless system identifier

[Mike Travis]

Testing shows a problem in that UV5 hubless systems were not being
recognized.  Add them to the list of OEM IDs checked.

Fixes: 6c7794423a998 ("Add UV5 direct references")

Signed-off-by: Mike Travis 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 13 ++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 0f848d6dddc9..3115caa7d7d0 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -389,13 +389,20 @@ static int __init uv_set_system_type(char *_oem_id, char 
*_oem_table_id)
/* (Not hubless), not a UV */
return 0;
 
+   /* Is UV hubless system */
+   uv_hubless_system = 0x01;
+
+   /* UV5 Hubless */
+   if (strncmp(uv_archtype, "NSGI5", 5) == 0)
+   uv_hubless_system |= 0x20;
+
/* UV4 Hubless: CH */
-   if (strncmp(uv_archtype, "NSGI4", 5) == 0)
-   uv_hubless_system = 0x11;
+   else if (strncmp(uv_archtype, "NSGI4", 5) == 0)
+   uv_hubless_system |= 0x10;
 
/* UV3 Hubless: UV300/MC990X w/o hub */
else
-   uv_hubless_system = 0x9;
+   uv_hubless_system |= 0x8;
 
/* Copy APIC type */
uv_stringify(sizeof(oem_table_id), oem_table_id, _oem_table_id);
-- 
2.21.0

[PATCH 1/3] x86/platform/uv: Fix missing OEM_TABLE_ID

[Mike Travis]

Testing shows a problem in that the OEM_TABLE_ID was missing for
hubless systems.  This is used to determine the APIC type (legacy or
extended).  Add the OEM_TABLE_ID to the early hubless processing.

Fixes: 1e61f5a95f191 ("Add and decode Arch Type in UVsystab")

Signed-off-by: Mike Travis 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 714233cee0b5..a5794794ea59 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -366,7 +366,7 @@ static int __init early_get_arch_type(void)
return ret;
 }
 
-static int __init uv_set_system_type(char *_oem_id)
+static int __init uv_set_system_type(char *_oem_id, char *_oem_table_id)
 {
/* Save OEM_ID passed from ACPI MADT */
uv_stringify(sizeof(oem_id), oem_id, _oem_id);
@@ -394,6 +394,9 @@ static int __init uv_set_system_type(char *_oem_id)
else
uv_hubless_system = 0x9;
 
+   /* Copy APIC type */
+   uv_stringify(sizeof(oem_table_id), oem_table_id, _oem_table_id);
+
pr_info("UV: OEM IDs %s/%s, SystemType %d, HUBLESS ID %x\n",
oem_id, oem_table_id, uv_system_type, 
uv_hubless_system);
return 0;
@@ -456,7 +459,7 @@ static int __init uv_acpi_madt_oem_check(char *_oem_id, 
char *_oem_table_id)
uv_cpu_info->p_uv_hub_info = _hub_info_node0;
 
/* If not UV, return. */
-   if (likely(uv_set_system_type(_oem_id) == 0))
+   if (uv_set_system_type(_oem_id, _oem_table_id) == 0)
return 0;
 
/* Save and Decode OEM Table ID */
-- 
2.21.0

[PATCH 0/3] x86/platform/uv: UV5 Update Fixes

[Mike Travis]

Fixes for UV5 updates found in testing:

* Fix missing oem_table ids.

* Fix oem/oem_table ids with trailing spaces.

* Fix H3/UV5 hubless not being recognized.


Mike Travis (3):
  x86/platform/uv: Fix missing OEM_TABLE_ID
  x86/platform/uv: Remove spaces from OEM IDs
  x86/platform/uv: Recognize UV5 hubless system identifier

 arch/x86/kernel/apic/x2apic_uv_x.c | 23 ++-
 1 file changed, 18 insertions(+), 5 deletions(-)

-- 
2.21.0

[tip: x86/urgent] x86/platform/uv: Remove unused variable in UV5 NMI handler

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID: 081dd68c89061077930ec7776d98837cb64b0405
Gitweb:
https://git.kernel.org/tip/081dd68c89061077930ec7776d98837cb64b0405
Author:Mike Travis 
AuthorDate:Tue, 13 Oct 2020 10:47:31 -05:00
Committer: Borislav Petkov 
CommitterDate: Tue, 13 Oct 2020 19:21:13 +02:00

x86/platform/uv: Remove unused variable in UV5 NMI handler

Remove an unused variable.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/20201013154731.132565-1-mike.tra...@hpe.com
---
 arch/x86/platform/uv/uv_nmi.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index 0f5cbcf..eafc530 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -59,7 +59,6 @@ DEFINE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
 static unsigned long uvh_nmi_mmrx; /* UVH_EVENT_OCCURRED0/1 */
 static unsigned long uvh_nmi_mmrx_clear;   /* UVH_EVENT_OCCURRED0/1_ALIAS 
*/
 static int uvh_nmi_mmrx_shift; /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_SHFT */
-static int uvh_nmi_mmrx_mask;  /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
 static char *uvh_nmi_mmrx_type;/* "EXTIO_INT0" */
 
 /* Non-zero indicates newer SMM NMI handler present */
@@ -247,7 +246,6 @@ static void uv_nmi_setup_mmrs(void)
uvh_nmi_mmrx = UVH_EVENT_OCCURRED0;
uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED0_ALIAS;
uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT;
-   uvh_nmi_mmrx_mask = UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK;
uvh_nmi_mmrx_type = "OCRD0-EXTIO_INT0";
 
uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;
@@ -258,7 +256,6 @@ static void uv_nmi_setup_mmrs(void)
uvh_nmi_mmrx = UVH_EVENT_OCCURRED1;
uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED1_ALIAS;
uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED1_EXTIO_INT0_SHFT;
-   uvh_nmi_mmrx_mask = UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK;
uvh_nmi_mmrx_type = "OCRD1-EXTIO_INT0";
 
uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;

[PATCH] x86/platform/uv: Remove unused variable in UV5 NMI handler

[Mike Travis]

Remove an unused variable.

Signed-off-by: Mike Travis 
---
 arch/x86/platform/uv/uv_nmi.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index 0f5cbcf0da63..eafc530c8767 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -59,7 +59,6 @@ DEFINE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
 static unsigned long uvh_nmi_mmrx; /* UVH_EVENT_OCCURRED0/1 */
 static unsigned long uvh_nmi_mmrx_clear;   /* UVH_EVENT_OCCURRED0/1_ALIAS 
*/
 static int uvh_nmi_mmrx_shift; /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_SHFT */
-static int uvh_nmi_mmrx_mask;  /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
 static char *uvh_nmi_mmrx_type;/* "EXTIO_INT0" */
 
 /* Non-zero indicates newer SMM NMI handler present */
@@ -247,7 +246,6 @@ static void uv_nmi_setup_mmrs(void)
uvh_nmi_mmrx = UVH_EVENT_OCCURRED0;
uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED0_ALIAS;
uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT;
-   uvh_nmi_mmrx_mask = UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK;
uvh_nmi_mmrx_type = "OCRD0-EXTIO_INT0";
 
uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;
@@ -258,7 +256,6 @@ static void uv_nmi_setup_mmrs(void)
uvh_nmi_mmrx = UVH_EVENT_OCCURRED1;
uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED1_ALIAS;
uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED1_EXTIO_INT0_SHFT;
-   uvh_nmi_mmrx_mask = UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK;
uvh_nmi_mmrx_type = "OCRD1-EXTIO_INT0";
 
uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;
-- 
2.21.0

Re: [GIT PULL] x86/platform updates for v5.10

[Mike Travis]

On 10/13/2020 6:37 AM, Mike Travis wrote:



On 10/13/2020 6:29 AM, Borislav Petkov wrote:

On Tue, Oct 13, 2020 at 05:33:37AM -0700, Mike Travis wrote:

I'm working on the correct code now, and I have UV4 & UV4A machine time
starting at 7am (PDT) to test it.  The UV5 simulator does not yet 
emulate

console initiated NMI from the BMC.


Ok, let me put it another way: is this simple fix good enough for now so
that it doesn't trigger the build error on Linus' tree or not? You can
take your time and do all kinds of fixing later but we need a minimal
fix *now*!

Pretty please?



Yes, it does fix the compile error.


Turns out I was combining 3 different sources to determine if the NMI 
INT occurred and I used the 1ULL << SHIFT to check each one.  So the 
MASK is indeed extraneous and can be removed.  Tested and patch follows.

Re: [GIT PULL] x86/platform updates for v5.10

[Mike Travis]

On 10/13/2020 6:29 AM, Borislav Petkov wrote:

On Tue, Oct 13, 2020 at 05:33:37AM -0700, Mike Travis wrote:

I'm working on the correct code now, and I have UV4 & UV4A machine time
starting at 7am (PDT) to test it.  The UV5 simulator does not yet emulate
console initiated NMI from the BMC.


Ok, let me put it another way: is this simple fix good enough for now so
that it doesn't trigger the build error on Linus' tree or not? You can
take your time and do all kinds of fixing later but we need a minimal
fix *now*!

Pretty please?



Yes, it does fix the compile error.

Re: [GIT PULL] x86/platform updates for v5.10

[Mike Travis]

On 10/13/2020 4:11 AM, Borislav Petkov wrote:

On Mon, Oct 12, 2020 at 02:58:07PM -0700, Mike Travis wrote:

I was in the process of tracing it through and perhaps it does need a bit
more analysis to be correct.  What does it mean to send a patch to fix the
compile error, just remove it?


Yes, to remove it for now as it is unused currently. But making it an
unsigned long is ok too AFAICT. So should I queue it and send it to
Linus later?



I'm working on the correct code now, and I have UV4 & UV4A machine time 
starting at 7am (PDT) to test it.  The UV5 simulator does not yet 
emulate console initiated NMI from the BMC.

Re: [GIT PULL] x86/platform updates for v5.10

[Mike Travis]

On 10/12/2020 2:56 PM, Borislav Petkov wrote:

On Mon, Oct 12, 2020 at 02:46:10PM -0700, Linus Torvalds wrote:

At least "git grep" only shows two assignments to it.

Of course, that would miss any cases that play games with preprocessor
token pasting etc, so it's not entirely meaningful, but it's certainly
a hint..


 From a quick staring at gcc asm, it looks write only. And gcc didn't
warn because it optimized that assignment away completely AFAICT.


And yes, I expect that the fix is to just make it "unsigned long", but
if it truly isn't actually used, maybe removal is better.


Yeah, below is a proper patch which builds fine with gcc and clang-10.
You guys have fun - I'm going to bed. :-)

---
From: Mike Travis 
Date: Mon, 12 Oct 2020 23:46:34 +0200
Subject: [PATCH] x86/platform/uv: Correct uvh_nmi_mmrx_mask's type

Clang rightfully warns:

   arch/x86/platform/uv/uv_nmi.c:250:23: warning: implicit conversion
   from 'unsigned long' to 'int' changes value from 1152921504606846976
   to 0 [-Wconstant-conversion]
   uvh_nmi_mmrx_mask = UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK;
   ~ ^~~

Make the variable unsigned long.

  [ bp: Productize it. ]


Thanks, I will look at it (and test it on hardware and the UV5 simulator 
to make sure it's correct.)


Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
---
  arch/x86/platform/uv/uv_nmi.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index 0f5cbcf0da63..8566730f154d 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -59,7 +59,7 @@ DEFINE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
  static unsigned long uvh_nmi_mmrx;/* UVH_EVENT_OCCURRED0/1 */
  static unsigned long uvh_nmi_mmrx_clear;  /* UVH_EVENT_OCCURRED0/1_ALIAS 
*/
  static int uvh_nmi_mmrx_shift;/* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_SHFT */
-static int uvh_nmi_mmrx_mask;  /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
+static unsigned long uvh_nmi_mmrx_mask;/* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
  static char *uvh_nmi_mmrx_type;   /* "EXTIO_INT0" */
  
  /* Non-zero indicates newer SMM NMI handler present */

Re: [GIT PULL] x86/platform updates for v5.10

[Mike Travis]

On 10/12/2020 2:42 PM, Mike Travis wrote:



On 10/12/2020 2:27 PM, Borislav Petkov wrote:

On Mon, Oct 12, 2020 at 02:15:55PM -0700, Mike Travis wrote:

Of course, it also looks like that 'uvh_nmi_mmrx_mask' thing is a
write-only variable so it doesn't matter, but can we _please_ get this
code fixed ASAP?


Yes, I'll look at it right now.  Thanks.


As this variable is write-only you could simply zap it now with a patch
ontop to fix the build and then introduce it properly later, when you
really need it?



It should have been an unsigned long instead of an int as Linus 
suggested.  I'm not sure it's a write only variable as I think the mask 
is used to check if the interrupt occurred (I'll have to look closer). 
I'm trying now to send the fixed patch.  It only has this change:


dog 74> diff -u patches/uv5_update_nmi{.v1,}
--- patches/uv5_update_nmi.v1   2020-10-12 16:30:06.083941459 -0500
+++ patches/uv5_update_nmi  2020-10-12 16:30:46.663903731 -0500
@@ -55,7 +55,7 @@
  +static unsigned long uvh_nmi_mmrx;    /* 
UVH_EVENT_OCCURRED0/1 */
  +static unsigned long uvh_nmi_mmrx_clear;  /* 
UVH_EVENT_OCCURRED0/1_ALIAS */
  +static int uvh_nmi_mmrx_shift;    /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_SHFT */
-+static int uvh_nmi_mmrx_mask; /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
++static unsigned long uvh_nmi_mmrx_mask;   /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */

  +static char *uvh_nmi_mmrx_type;   /* "EXTIO_INT0" */
  +
  +/* Non-zero indicates newer SMM NMI handler present */

(or quoted)


dog 74> diff -u patches/uv5_update_nmi{.v1,}
--- patches/uv5_update_nmi.v1   2020-10-12 16:30:06.083941459 -0500
+++ patches/uv5_update_nmi  2020-10-12 16:30:46.663903731 -0500
@@ -55,7 +55,7 @@
 +static unsigned long uvh_nmi_mmrx;    /* 
UVH_EVENT_OCCURRED0/1 */
 +static unsigned long uvh_nmi_mmrx_clear;  /* 
UVH_EVENT_OCCURRED0/1_ALIAS */
 +static int uvh_nmi_mmrx_shift;    /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_SHFT */
-+static int uvh_nmi_mmrx_mask; /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
++static unsigned long uvh_nmi_mmrx_mask;   /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
 +static char *uvh_nmi_mmrx_type;   /* 
"EXTIO_INT0" */

 +
 +/* Non-zero indicates newer SMM NMI handler present */


I was in the process of tracing it through and perhaps it does need a 
bit more analysis to be correct.  What does it mean to send a patch to 
fix the compile error, just remove it?

Re: [GIT PULL] x86/platform updates for v5.10

[Mike Travis]

On 10/12/2020 2:27 PM, Borislav Petkov wrote:

On Mon, Oct 12, 2020 at 02:15:55PM -0700, Mike Travis wrote:

Of course, it also looks like that 'uvh_nmi_mmrx_mask' thing is a
write-only variable so it doesn't matter, but can we _please_ get this
code fixed ASAP?


Yes, I'll look at it right now.  Thanks.


As this variable is write-only you could simply zap it now with a patch
ontop to fix the build and then introduce it properly later, when you
really need it?



It should have been an unsigned long instead of an int as Linus 
suggested.  I'm not sure it's a write only variable as I think the mask 
is used to check if the interrupt occurred (I'll have to look closer). 
I'm trying now to send the fixed patch.  It only has this change:


dog 74> diff -u patches/uv5_update_nmi{.v1,}
--- patches/uv5_update_nmi.v1   2020-10-12 16:30:06.083941459 -0500
+++ patches/uv5_update_nmi  2020-10-12 16:30:46.663903731 -0500
@@ -55,7 +55,7 @@
 +static unsigned long uvh_nmi_mmrx;/* UVH_EVENT_OCCURRED0/1 */
 +static unsigned long uvh_nmi_mmrx_clear;  /* 
UVH_EVENT_OCCURRED0/1_ALIAS */
 +static int uvh_nmi_mmrx_shift;/* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_SHFT */
-+static int uvh_nmi_mmrx_mask; /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
++static unsigned long uvh_nmi_mmrx_mask;   /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */

 +static char *uvh_nmi_mmrx_type;   /* "EXTIO_INT0" */
 +
 +/* Non-zero indicates newer SMM NMI handler present */

(or quoted)


dog 74> diff -u patches/uv5_update_nmi{.v1,}
--- patches/uv5_update_nmi.v1   2020-10-12 16:30:06.083941459 -0500
+++ patches/uv5_update_nmi  2020-10-12 16:30:46.663903731 -0500
@@ -55,7 +55,7 @@
 +static unsigned long uvh_nmi_mmrx;/* UVH_EVENT_OCCURRED0/1 */
 +static unsigned long uvh_nmi_mmrx_clear;  /* UVH_EVENT_OCCURRED0/1_ALIAS 
*/
 +static int uvh_nmi_mmrx_shift;/* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_SHFT */
-+static int uvh_nmi_mmrx_mask; /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
++static unsigned long uvh_nmi_mmrx_mask;   /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
 +static char *uvh_nmi_mmrx_type;   /* "EXTIO_INT0" */
 +
 +/* Non-zero indicates newer SMM NMI handler present */

Re: [GIT PULL] x86/platform updates for v5.10

[Mike Travis]

On 10/12/2020 2:10 PM, Linus Torvalds wrote:

On Mon, Oct 12, 2020 at 3:10 AM Borislav Petkov  wrote:


please pull the x86/platform queue.


Hmm. I didn't immediately notice this new warning, because it only
happens with the clang build that I don't do in between every pull.

But this pull causes new warnings from clang:

arch/x86/platform/uv/uv_nmi.c:250:23: warning: implicit conversion
from 'unsigned long' to 'int' changes value from 1152921504606846976
to 0 [-Wconstant-conversion]
 uvh_nmi_mmrx_mask = UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK;
   ~ ^~~

and I think that warning is correct, and the code is wrong.

In particular, we have

  static int uvh_nmi_mmrx_mask;

so it's a signed 32-bit integer, and the code is treating it like it's
a 64-bit mask.

Of course, it also looks like that 'uvh_nmi_mmrx_mask' thing is a
write-only variable so it doesn't matter, but can we _please_ get this
code fixed ASAP?


Yes, I'll look at it right now.  Thanks.


  Linus

[tip: x86/platform] x86/platform/uv: Update MMIOH references based on new UV5 MMRs

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: ffe2febca4304b9288e2d274d2ece5e66c125441
Gitweb:
https://git.kernel.org/tip/ffe2febca4304b9288e2d274d2ece5e66c125441
Author:Mike Travis 
AuthorDate:Mon, 05 Oct 2020 15:39:23 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 09:07:27 +02:00

x86/platform/uv: Update MMIOH references based on new UV5 MMRs

Make modifications to the MMIOH mappings to accommodate changes for UV5.

[ Fix W=1 build warnings. ]
Reported-by: kernel test robot 
Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Steve Wahl 
Link: https://lkml.kernel.org/r/20201005203929.148656-8-mike.tra...@hpe.com
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 212 +++-
 1 file changed, 144 insertions(+), 68 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 9b7a334..e2e866a 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -226,6 +226,13 @@ static void __init uv_tsc_check_sync(void)
mark_tsc_unstable("UV BIOS");
 }
 
+/* Selector for (4|4A|5) structs */
+#define uvxy_field(sname, field, undef) (  \
+   is_uv(UV4A) ? sname.s4a.field : \
+   is_uv(UV4) ? sname.s4.field :   \
+   is_uv(UV3) ? sname.s3.field :   \
+   undef)
+
 /* [Copied from arch/x86/kernel/cpu/topology.c:detect_extended_topology()] */
 
 #define SMT_LEVEL  0   /* Leaf 0xb SMT level */
@@ -878,6 +885,7 @@ static __init void get_lowmem_redirect(unsigned long *base, 
unsigned long *size)
 }
 
 enum map_type {map_wb, map_uc};
+static const char * const mt[] = { "WB", "UC" };
 
 static __init void map_high(char *id, unsigned long base, int pshift, int 
bshift, int max_pnode, enum map_type map_type)
 {
@@ -889,11 +897,13 @@ static __init void map_high(char *id, unsigned long base, 
int pshift, int bshift
pr_info("UV: Map %s_HI base address NULL\n", id);
return;
}
-   pr_debug("UV: Map %s_HI 0x%lx - 0x%lx\n", id, paddr, paddr + bytes);
if (map_type == map_uc)
init_extra_mapping_uc(paddr, bytes);
else
init_extra_mapping_wb(paddr, bytes);
+
+   pr_info("UV: Map %s_HI 0x%lx - 0x%lx %s (%d segments)\n",
+   id, paddr, paddr + bytes, mt[map_type], max_pnode + 1);
 }
 
 static __init void map_gru_high(int max_pnode)
@@ -927,52 +937,74 @@ static __init void map_mmr_high(int max_pnode)
pr_info("UV: MMR disabled\n");
 }
 
-/* UV3/4 have identical MMIOH overlay configs, UV4A is slightly different */
-static __init void map_mmioh_high_uv34(int index, int min_pnode, int max_pnode)
-{
-   unsigned long overlay;
-   unsigned long mmr;
-   unsigned long base;
-   unsigned long nasid_mask;
-   unsigned long m_overlay;
-   int i, n, shift, m_io, max_io;
-   int nasid, lnasid, fi, li;
-   char *id;
-
-   if (index == 0) {
-   id = "MMIOH0";
-   m_overlay = UVH_RH_GAM_MMIOH_OVERLAY_CONFIG0;
-   overlay = uv_read_local_mmr(m_overlay);
-   base = overlay & UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK;
+/* Arch specific ENUM cases */
+enum mmioh_arch {
+   UV2_MMIOH = -1,
+   UVY_MMIOH0, UVY_MMIOH1,
+   UVX_MMIOH0, UVX_MMIOH1,
+};
+
+/* Calculate and Map MMIOH Regions */
+static void __init calc_mmioh_map(enum mmioh_arch index,
+   int min_pnode, int max_pnode,
+   int shift, unsigned long base, int m_io, int n_io)
+{
+   unsigned long mmr, nasid_mask;
+   int nasid, min_nasid, max_nasid, lnasid, mapped;
+   int i, fi, li, n, max_io;
+   char id[8];
+
+   /* One (UV2) mapping */
+   if (index == UV2_MMIOH) {
+   strncpy(id, "MMIOH", sizeof(id));
+   max_io = max_pnode;
+   mapped = 0;
+   goto map_exit;
+   }
+
+   /* small and large MMIOH mappings */
+   switch (index) {
+   case UVY_MMIOH0:
+   mmr = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG0;
+   nasid_mask = UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK;
+   n = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG0_DEPTH;
+   min_nasid = min_pnode;
+   max_nasid = max_pnode;
+   mapped = 1;
+   break;
+   case UVY_MMIOH1:
+   mmr = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG1;
+   nasid_mask = UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG1_BASE_MASK;
+   n = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG1_DEPTH;
+   min_nasid = min_pnode;
+   max_nasid = max_pnode;
+   mapped = 1;
+   break;
+   case UVX_MMIOH0:
mmr = UVH_RH_GAM_MMIOH_R

[tip: x86/platform] drivers/misc/sgi-xp: Adjust references in UV kernel modules

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 788b66e34e8ab82a93c63a83ba5a9d04f2f4ae26
Gitweb:
https://git.kernel.org/tip/788b66e34e8ab82a93c63a83ba5a9d04f2f4ae26
Author:Mike Travis 
AuthorDate:Tue, 06 Oct 2020 16:34:27 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 08:56:05 +02:00

drivers/misc/sgi-xp: Adjust references in UV kernel modules

Remove the define is_uv() is_uv_system and just use the latter as is.
This removes a conflict with a new symbol in the generated uv_mmrs.h
file (is_uv()).

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
Link: https://lkml.kernel.org/r/20201005203929.148656-4-mike.tra...@hpe.com
---
 drivers/misc/sgi-xp/xp.h| 7 +--
 drivers/misc/sgi-xp/xp_main.c   | 4 ++--
 drivers/misc/sgi-xp/xp_uv.c | 6 --
 drivers/misc/sgi-xp/xpc_main.c  | 6 +++---
 drivers/misc/sgi-xp/xpc_partition.c | 2 +-
 drivers/misc/sgi-xp/xpnet.c | 2 +-
 6 files changed, 12 insertions(+), 15 deletions(-)

diff --git a/drivers/misc/sgi-xp/xp.h b/drivers/misc/sgi-xp/xp.h
index 06469b1..2b6aabc 100644
--- a/drivers/misc/sgi-xp/xp.h
+++ b/drivers/misc/sgi-xp/xp.h
@@ -17,11 +17,6 @@
 
 #if defined CONFIG_X86_UV || defined CONFIG_IA64_SGI_UV
 #include 
-#define is_uv()is_uv_system()
-#endif
-
-#ifndef is_uv
-#define is_uv()0
 #endif
 
 #ifdef USE_DBUG_ON
@@ -79,7 +74,7 @@
 
 #define XPC_MSG_SIZE(_payload_size) \
ALIGN(XPC_MSG_HDR_MAX_SIZE + (_payload_size), \
- is_uv() ? 64 : 128)
+ is_uv_system() ? 64 : 128)
 
 
 /*
diff --git a/drivers/misc/sgi-xp/xp_main.c b/drivers/misc/sgi-xp/xp_main.c
index 61b03fc..0eea2f5 100644
--- a/drivers/misc/sgi-xp/xp_main.c
+++ b/drivers/misc/sgi-xp/xp_main.c
@@ -233,7 +233,7 @@ xp_init(void)
for (ch_number = 0; ch_number < XPC_MAX_NCHANNELS; ch_number++)
mutex_init(_registrations[ch_number].mutex);
 
-   if (is_uv())
+   if (is_uv_system())
ret = xp_init_uv();
else
ret = 0;
@@ -249,7 +249,7 @@ module_init(xp_init);
 static void __exit
 xp_exit(void)
 {
-   if (is_uv())
+   if (is_uv_system())
xp_exit_uv();
 }
 
diff --git a/drivers/misc/sgi-xp/xp_uv.c b/drivers/misc/sgi-xp/xp_uv.c
index f15a9f2..5dcca03 100644
--- a/drivers/misc/sgi-xp/xp_uv.c
+++ b/drivers/misc/sgi-xp/xp_uv.c
@@ -148,7 +148,9 @@ xp_restrict_memprotect_uv(unsigned long phys_addr, unsigned 
long size)
 enum xp_retval
 xp_init_uv(void)
 {
-   BUG_ON(!is_uv());
+   WARN_ON(!is_uv_system());
+   if (!is_uv_system())
+   return xpUnsupported;
 
xp_max_npartitions = XP_MAX_NPARTITIONS_UV;
 #ifdef CONFIG_X86
@@ -168,5 +170,5 @@ xp_init_uv(void)
 void
 xp_exit_uv(void)
 {
-   BUG_ON(!is_uv());
+   WARN_ON(!is_uv_system());
 }
diff --git a/drivers/misc/sgi-xp/xpc_main.c b/drivers/misc/sgi-xp/xpc_main.c
index 8a495dc..e3261e6 100644
--- a/drivers/misc/sgi-xp/xpc_main.c
+++ b/drivers/misc/sgi-xp/xpc_main.c
@@ -1043,7 +1043,7 @@ xpc_do_exit(enum xp_retval reason)
 
xpc_teardown_partitions();
 
-   if (is_uv())
+   if (is_uv_system())
xpc_exit_uv();
 }
 
@@ -1226,7 +1226,7 @@ xpc_init(void)
dev_set_name(xpc_part, "part");
dev_set_name(xpc_chan, "chan");
 
-   if (is_uv()) {
+   if (is_uv_system()) {
ret = xpc_init_uv();
 
} else {
@@ -1312,7 +1312,7 @@ out_2:
 
xpc_teardown_partitions();
 out_1:
-   if (is_uv())
+   if (is_uv_system())
xpc_exit_uv();
return ret;
 }
diff --git a/drivers/misc/sgi-xp/xpc_partition.c 
b/drivers/misc/sgi-xp/xpc_partition.c
index 099a53b..a47b3bd 100644
--- a/drivers/misc/sgi-xp/xpc_partition.c
+++ b/drivers/misc/sgi-xp/xpc_partition.c
@@ -433,7 +433,7 @@ xpc_discovery(void)
 */
region_size = xp_region_size;
 
-   if (is_uv())
+   if (is_uv_system())
max_regions = 256;
else {
max_regions = 64;
diff --git a/drivers/misc/sgi-xp/xpnet.c b/drivers/misc/sgi-xp/xpnet.c
index 837d6c3..8ee3991 100644
--- a/drivers/misc/sgi-xp/xpnet.c
+++ b/drivers/misc/sgi-xp/xpnet.c
@@ -515,7 +515,7 @@ xpnet_init(void)
 {
int result;
 
-   if (!is_uv())
+   if (!is_uv_system())
return -ENODEV;
 
dev_info(xpnet, "registering network device %s\n", XPNET_DEVICE_NAME);

[tip: x86/platform] x86/platform/uv: Remove UV BAU TLB Shootdown Handler

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 39297dde7390e01bfd737052fbb5313a09062e2d
Gitweb:
https://git.kernel.org/tip/39297dde7390e01bfd737052fbb5313a09062e2d
Author:Mike Travis 
AuthorDate:Mon, 05 Oct 2020 15:39:17 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 08:45:39 +02:00

x86/platform/uv: Remove UV BAU TLB Shootdown Handler

The Broadcast Assist Unit (BAU) TLB shootdown handler is being rewritten
to become the UV BAU APIC driver. It is designed to speed up sending
IPIs to selective CPUs within the system. Remove the current TLB
shutdown handler (tlb_uv.c) file and a couple of kernel hooks in the
interim.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Dimitri Sivanich 
Link: https://lkml.kernel.org/r/20201005203929.148656-2-mike.tra...@hpe.com
---
 arch/x86/include/asm/idtentry.h  |4 +-
 arch/x86/include/asm/uv/uv.h |4 +-
 arch/x86/include/asm/uv/uv_bau.h |  755 +--
 arch/x86/kernel/idt.c|3 +-
 arch/x86/mm/tlb.c|   24 +-
 arch/x86/platform/uv/Makefile|2 +-
 arch/x86/platform/uv/tlb_uv.c| 2097 +-
 7 files changed, 2 insertions(+), 2887 deletions(-)
 delete mode 100644 arch/x86/include/asm/uv/uv_bau.h
 delete mode 100644 arch/x86/platform/uv/tlb_uv.c

diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h
index a063864..df4dc97 100644
--- a/arch/x86/include/asm/idtentry.h
+++ b/arch/x86/include/asm/idtentry.h
@@ -591,10 +591,6 @@ DECLARE_IDTENTRY_SYSVEC(CALL_FUNCTION_VECTOR,  
sysvec_call_function);
 #endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
-# ifdef CONFIG_X86_UV
-DECLARE_IDTENTRY_SYSVEC(UV_BAU_MESSAGE,
sysvec_uv_bau_message);
-# endif
-
 # ifdef CONFIG_X86_MCE_THRESHOLD
 DECLARE_IDTENTRY_SYSVEC(THRESHOLD_APIC_VECTOR, sysvec_threshold);
 # endif
diff --git a/arch/x86/include/asm/uv/uv.h b/arch/x86/include/asm/uv/uv.h
index e48aea9..172d3e4 100644
--- a/arch/x86/include/asm/uv/uv.h
+++ b/arch/x86/include/asm/uv/uv.h
@@ -35,10 +35,8 @@ extern int is_uv_hubbed(int uvtype);
 extern void uv_cpu_init(void);
 extern void uv_nmi_init(void);
 extern void uv_system_init(void);
-extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
-const struct flush_tlb_info 
*info);
 
-#else  /* X86_UV */
+#else  /* !X86_UV */
 
 static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; }
 static inline bool is_early_uv_system(void){ return 0; }
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
deleted file mode 100644
index cd24804..000
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ /dev/null
@@ -1,755 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SGI UV Broadcast Assist Unit definitions
- *
- * Copyright (C) 2008-2011 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_X86_UV_UV_BAU_H
-#define _ASM_X86_UV_UV_BAU_H
-
-#include 
-#include 
-
-#define BITSPERBYTE 8
-
-/*
- * Broadcast Assist Unit messaging structures
- *
- * Selective Broadcast activations are induced by software action
- * specifying a particular 8-descriptor "set" via a 6-bit index written
- * to an MMR.
- * Thus there are 64 unique 512-byte sets of SB descriptors - one set for
- * each 6-bit index value. These descriptor sets are mapped in sequence
- * starting with set 0 located at the address specified in the
- * BAU_SB_DESCRIPTOR_BASE register, set 1 is located at BASE + 512,
- * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on.
- *
- * We will use one set for sending BAU messages from each of the
- * cpu's on the uvhub.
- *
- * TLB shootdown will use the first of the 8 descriptors of each set.
- * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set).
- */
-
-#define MAX_CPUS_PER_UVHUB 128
-#define MAX_CPUS_PER_SOCKET64
-#define ADP_SZ 64 /* hardware-provided max. */
-#define UV_CPUS_PER_AS 32 /* hardware-provided max. */
-#define ITEMS_PER_DESC 8
-/* the 'throttle' to prevent the hardware stay-busy bug */
-#define MAX_BAU_CONCURRENT 3
-#define UV_ACT_STATUS_MASK 0x3
-#define UV_ACT_STATUS_SIZE 2
-#define UV_DISTRIBUTION_SIZE   256
-#define UV_SW_ACK_NPENDING 8
-#define UV_NET_ENDPOINT_INTD   0x28
-#define UV_PAYLOADQ_GNODE_SHIFT49
-#define UV_PTC_BASENAME"sgi_uv/ptc_statistics"
-#define UV_BAU_BASENAME"sgi_uv/bau_tunables"
-#define UV_BAU_TUNABLES_DIR"sgi_uv"
-#define UV_BAU_TUNABLES

[tip: x86/platform] x86/platform/uv: Add and decode Arch Type in UVsystab

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 1e61f5a95f1913c015a2d6a1544c108248b3971c
Gitweb:
https://git.kernel.org/tip/1e61f5a95f1913c015a2d6a1544c108248b3971c
Author:Mike Travis 
AuthorDate:Mon, 05 Oct 2020 15:39:22 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 09:06:10 +02:00

x86/platform/uv: Add and decode Arch Type in UVsystab

When the UV BIOS starts the kernel it passes the UVsystab info struct to
the kernel which contains information elements more specific than ACPI,
and generally pertinent only to the MMRs. These are read only fields
so information is passed one way only. A new field starting with UV5 is
the UV architecture type so the ACPI OEM_ID field can be used for other
purposes going forward. The UV Arch Type selects the entirety of the
MMRs available, with their addresses and fields defined in uv_mmrs.h.

Reported-by: kernel test robot 
Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
Link: https://lkml.kernel.org/r/20201005203929.148656-7-mike.tra...@hpe.com
---
 arch/x86/include/asm/uv/bios.h |  16 ++-
 arch/x86/kernel/apic/x2apic_uv_x.c | 135 
 arch/x86/platform/uv/bios_uv.c |  27 --
 3 files changed, 148 insertions(+), 30 deletions(-)

diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index 70050d0..97ac595 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -5,8 +5,8 @@
 /*
  * UV BIOS layer definitions.
  *
- *  Copyright (c) 2008-2009 Silicon Graphics, Inc.  All Rights Reserved.
- *  Copyright (c) Russ Anderson 
+ * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (c) Russ Anderson 
  */
 
 #include 
@@ -71,6 +71,11 @@ struct uv_gam_range_entry {
u32 limit;  /* PA bits 56:26 (UV_GAM_RANGE_SHFT) */
 };
 
+#defineUV_AT_SIZE  8   /* 7 character arch type + NULL char */
+struct uv_arch_type_entry {
+   chararchtype[UV_AT_SIZE];
+};
+
 #defineUV_SYSTAB_SIG   "UVST"
 #defineUV_SYSTAB_VERSION_1 1   /* UV2/3 BIOS version */
 #defineUV_SYSTAB_VERSION_UV4   0x400   /* UV4 BIOS base 
version */
@@ -79,10 +84,14 @@ struct uv_gam_range_entry {
 #defineUV_SYSTAB_VERSION_UV4_3 0x403   /* - GAM Range PXM 
Value */
 #defineUV_SYSTAB_VERSION_UV4_LATESTUV_SYSTAB_VERSION_UV4_3
 
+#defineUV_SYSTAB_VERSION_UV5   0x500   /* UV5 GAM base version 
*/
+#defineUV_SYSTAB_VERSION_UV5_LATESTUV_SYSTAB_VERSION_UV5
+
 #defineUV_SYSTAB_TYPE_UNUSED   0   /* End of table (offset 
== 0) */
 #defineUV_SYSTAB_TYPE_GAM_PARAMS   1   /* GAM PARAM 
conversions */
 #defineUV_SYSTAB_TYPE_GAM_RNG_TBL  2   /* GAM entry table */
-#defineUV_SYSTAB_TYPE_MAX  3
+#defineUV_SYSTAB_TYPE_ARCH_TYPE3   /* UV arch type */
+#defineUV_SYSTAB_TYPE_MAX  4
 
 /*
  * The UV system table describes specific firmware
@@ -133,6 +142,7 @@ extern s64 uv_bios_reserved_page_pa(u64, u64 *, u64 *, u64 
*);
 extern int uv_bios_set_legacy_vga_target(bool decode, int domain, int bus);
 
 extern int uv_bios_init(void);
+extern unsigned long get_uv_systab_phys(bool msg);
 
 extern unsigned long sn_rtc_cycles_per_second;
 extern int uv_type;
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index fca5f94..9b7a334 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -31,7 +31,8 @@ static u64gru_start_paddr, gru_end_paddr;
 static union uvh_apiciduvh_apicid;
 static int uv_node_id;
 
-/* Unpack OEM/TABLE ID's to be NULL terminated strings */
+/* Unpack AT/OEM/TABLE ID's to be NULL terminated strings */
+static u8 uv_archtype[UV_AT_SIZE];
 static u8 oem_id[ACPI_OEM_ID_SIZE + 1];
 static u8 oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
 
@@ -284,18 +285,102 @@ static void __init uv_stringify(int len, char *to, char 
*from)
strncpy(to, from, len-1);
 }
 
+/* Find UV arch type entry in UVsystab */
+static unsigned long __init early_find_archtype(struct uv_systab *st)
+{
+   int i;
+
+   for (i = 0; st->entry[i].type != UV_SYSTAB_TYPE_UNUSED; i++) {
+   unsigned long ptr = st->entry[i].offset;
+
+   if (!ptr)
+   continue;
+   ptr += (unsigned long)st;
+   if (st->entry[i].type == UV_SYSTAB_TYPE_ARCH_TYPE)
+   return ptr;
+   }
+   return 0;
+}
+
+/* Validate UV arch type field in UVsystab */
+static int __init decode_arch_type(unsigned long ptr)
+{
+   struct uv_arch_type_entry *uv_ate = (struct uv_arch_type_entry *)ptr;
+   int n = strl

[tip: x86/platform] x86/platform/uv: Add UV5 direct references

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 6c7794423a998478f6df0234d2dd5baa3ccbdb1d
Gitweb:
https://git.kernel.org/tip/6c7794423a998478f6df0234d2dd5baa3ccbdb1d
Author:Mike Travis 
AuthorDate:Mon, 05 Oct 2020 15:39:21 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 09:01:46 +02:00

x86/platform/uv: Add UV5 direct references

Add new references to UV5 (and UVY class) system MMR addresses and
fields primarily caused by the expansion from 46 to 52 bits of physical
memory address.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
Link: https://lkml.kernel.org/r/20201005203929.148656-6-mike.tra...@hpe.com
---
 arch/x86/include/asm/uv/uv_hub.h   | 49 ++-
 arch/x86/kernel/apic/x2apic_uv_x.c | 97 -
 2 files changed, 103 insertions(+), 43 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 76969be..ecf5c93 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -160,6 +160,7 @@ struct uv_hub_info_s {
unsigned char   gr_table_len;
unsigned char   apic_pnode_shift;
unsigned char   gpa_shift;
+   unsigned char   nasid_shift;
unsigned char   m_shift;
unsigned char   n_lshift;
unsigned intgnode_extra;
@@ -226,6 +227,7 @@ static inline __init void uv_hub_type_set(int uvmask)
 #define UV3_HUB_REVISION_BASE  5
 #define UV4_HUB_REVISION_BASE  7
 #define UV4A_HUB_REVISION_BASE 8   /* UV4 (fixed) rev 2 */
+#define UV5_HUB_REVISION_BASE  9
 
 static inline int is_uv(int uvmask) { return uv_hub_type() & uvmask; }
 static inline int is_uv1_hub(void) { return 0; }
@@ -233,7 +235,7 @@ static inline int is_uv2_hub(void) { return is_uv(UV2); }
 static inline int is_uv3_hub(void) { return is_uv(UV3); }
 static inline int is_uv4a_hub(void) { return is_uv(UV4A); }
 static inline int is_uv4_hub(void) { return is_uv(UV4); }
-static inline int is_uv5_hub(void) { return 0; }
+static inline int is_uv5_hub(void) { return is_uv(UV5); }
 
 /*
  * UV4A is a revision of UV4.  So on UV4A, both is_uv4_hub() and
@@ -246,7 +248,7 @@ static inline int is_uv5_hub(void) { return 0; }
 static inline int is_uvx_hub(void) { return is_uv(UVX); }
 
 /* UVY class: UV5,..? */
-static inline int is_uvy_hub(void) { return 0; }
+static inline int is_uvy_hub(void) { return is_uv(UVY); }
 
 /* Any UV Hubbed System */
 static inline int is_uv_hub(void) { return is_uv(UV_ANY); }
@@ -271,9 +273,11 @@ union uvh_apicid {
  * g -  GNODE (full 15-bit global nasid, right shifted 1)
  * p -  PNODE (local part of nsids, right shifted 1)
  */
-#define UV_NASID_TO_PNODE(n)   (((n) >> 1) & uv_hub_info->pnode_mask)
+#define UV_NASID_TO_PNODE(n)   \
+   (((n) >> uv_hub_info->nasid_shift) & uv_hub_info->pnode_mask)
 #define UV_PNODE_TO_GNODE(p)   ((p) |uv_hub_info->gnode_extra)
-#define UV_PNODE_TO_NASID(p)   (UV_PNODE_TO_GNODE(p) << 1)
+#define UV_PNODE_TO_NASID(p)   \
+   (UV_PNODE_TO_GNODE(p) << uv_hub_info->nasid_shift)
 
 #define UV2_LOCAL_MMR_BASE 0xfa00UL
 #define UV2_GLOBAL_MMR32_BASE  0xfc00UL
@@ -290,25 +294,38 @@ union uvh_apicid {
 #define UV4_LOCAL_MMR_SIZE (32UL * 1024 * 1024)
 #define UV4_GLOBAL_MMR32_SIZE  0
 
+#define UV5_LOCAL_MMR_BASE 0xfa00UL
+#define UV5_GLOBAL_MMR32_BASE  0
+#define UV5_LOCAL_MMR_SIZE (32UL * 1024 * 1024)
+#define UV5_GLOBAL_MMR32_SIZE  0
+
 #define UV_LOCAL_MMR_BASE  (   \
-   is_uv2_hub() ? UV2_LOCAL_MMR_BASE : \
-   is_uv3_hub() ? UV3_LOCAL_MMR_BASE : \
-   /*is_uv4_hub*/ UV4_LOCAL_MMR_BASE)
+   is_uv(UV2) ? UV2_LOCAL_MMR_BASE : \
+   is_uv(UV3) ? UV3_LOCAL_MMR_BASE : \
+   is_uv(UV4) ? UV4_LOCAL_MMR_BASE : \
+   is_uv(UV5) ? UV5_LOCAL_MMR_BASE : \
+   0)
 
 #define UV_GLOBAL_MMR32_BASE   (   \
-   is_uv2_hub() ? UV2_GLOBAL_MMR32_BASE : \
-   is_uv3_hub() ? UV3_GLOBAL_MMR32_BASE : \
-   /*is_uv4_hub*/ UV4_GLOBAL_MMR32_BASE)
+   is_uv(UV2) ? UV2_GLOBAL_MMR32_BASE : \
+   is_uv(UV3) ? UV3_GLOBAL_MMR32_BASE : \
+  

[tip: x86/platform] x86/platform/uv: Update UV5 MMR references in UV GRU

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: a74a7e992caf0745f548a63b263ac34c6a4a29dd
Gitweb:
https://git.kernel.org/tip/a74a7e992caf0745f548a63b263ac34c6a4a29dd
Author:Mike Travis 
AuthorDate:Mon, 05 Oct 2020 15:39:25 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 09:08:00 +02:00

x86/platform/uv: Update UV5 MMR references in UV GRU

Make modifications to the GRU mappings to accommodate changes for UV5.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
Link: https://lkml.kernel.org/r/20201005203929.148656-10-mike.tra...@hpe.com
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 30 +++--
 1 file changed, 24 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 5aed07f..64a1c59 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -82,6 +82,9 @@ static unsigned long __init uv_early_read_mmr(unsigned long 
addr)
 
 static inline bool is_GRU_range(u64 start, u64 end)
 {
+   if (!gru_start_paddr)
+   return false;
+
return start >= gru_start_paddr && end <= gru_end_paddr;
 }
 
@@ -909,13 +912,24 @@ static __init void map_high(char *id, unsigned long base, 
int pshift, int bshift
 static __init void map_gru_high(int max_pnode)
 {
union uvh_rh_gam_gru_overlay_config_u gru;
-   int shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
-   unsigned long mask = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
-   unsigned long base;
+   unsigned long mask, base;
+   int shift;
+
+   if (UVH_RH_GAM_GRU_OVERLAY_CONFIG) {
+   gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG);
+   shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
+   mask = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
+   } else if (UVH_RH10_GAM_GRU_OVERLAY_CONFIG) {
+   gru.v = uv_read_local_mmr(UVH_RH10_GAM_GRU_OVERLAY_CONFIG);
+   shift = UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
+   mask = UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
+   } else {
+   pr_err("UV: GRU unavailable (no MMR)\n");
+   return;
+   }
 
-   gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG);
if (!gru.s.enable) {
-   pr_info("UV: GRU disabled\n");
+   pr_info("UV: GRU disabled (by BIOS)\n");
return;
}
 
@@ -1288,7 +1302,11 @@ static void __init uv_init_hub_info(struct uv_hub_info_s 
*hi)
/* Show system specific info: */
pr_info("UV: N:%d M:%d m_shift:%d n_lshift:%d\n", hi->n_val, hi->m_val, 
hi->m_shift, hi->n_lshift);
pr_info("UV: gpa_mask/shift:0x%lx/%d pnode_mask:0x%x apic_pns:%d\n", 
hi->gpa_mask, hi->gpa_shift, hi->pnode_mask, hi->apic_pnode_shift);
-   pr_info("UV: mmr_base/shift:0x%lx/%ld gru_base/shift:0x%lx/%ld\n", 
hi->global_mmr_base, hi->global_mmr_shift, hi->global_gru_base, 
hi->global_gru_shift);
+   pr_info("UV: mmr_base/shift:0x%lx/%ld\n", hi->global_mmr_base, 
hi->global_mmr_shift);
+   if (hi->global_gru_base)
+   pr_info("UV: gru_base/shift:0x%lx/%ld\n",
+   hi->global_gru_base, hi->global_gru_shift);
+
pr_info("UV: gnode_upper:0x%lx gnode_extra:0x%x\n", hi->gnode_upper, 
hi->gnode_extra);
 }
 

[tip: x86/platform] x86/platform/uv: Update for UV5 NMI MMR changes

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: ae5f8ce3c247b8d937782e76802a9036c09998ad
Gitweb:
https://git.kernel.org/tip/ae5f8ce3c247b8d937782e76802a9036c09998ad
Author:Mike Travis 
AuthorDate:Mon, 05 Oct 2020 15:39:28 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 09:09:50 +02:00

x86/platform/uv: Update for UV5 NMI MMR changes

The UV NMI MMR addresses and fields moved between UV4 and UV5
necessitating a rewrite of the UV NMI handler.  Adjust references
to accommodate those changes.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
Link: https://lkml.kernel.org/r/20201005203929.148656-13-mike.tra...@hpe.com
---
 arch/x86/include/asm/uv/uv_hub.h | 13 +--
 arch/x86/platform/uv/uv_nmi.c| 64 ++-
 2 files changed, 54 insertions(+), 23 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 07079b5..610bda2 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -734,19 +734,6 @@ extern void uv_nmi_setup_hubless(void);
 #define UVH_NMI_MMR_SHIFT  63
 #define UVH_NMI_MMR_TYPE   "SCRATCH5"
 
-/* Newer SMM NMI handler, not present in all systems */
-#define UVH_NMI_MMRX   UVH_EVENT_OCCURRED0
-#define UVH_NMI_MMRX_CLEAR UVH_EVENT_OCCURRED0_ALIAS
-#define UVH_NMI_MMRX_SHIFT UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT
-#define UVH_NMI_MMRX_TYPE  "EXTIO_INT0"
-
-/* Non-zero indicates newer SMM NMI handler present */
-#define UVH_NMI_MMRX_SUPPORTED UVH_EXTIO_INT0_BROADCAST
-
-/* Indicates to BIOS that we want to use the newer SMM NMI handler */
-#define UVH_NMI_MMRX_REQ   UVH_BIOS_KERNEL_MMR_ALIAS_2
-#define UVH_NMI_MMRX_REQ_SHIFT 62
-
 struct uv_hub_nmi_s {
raw_spinlock_t  nmi_lock;
atomic_tin_nmi; /* flag this node in UV NMI IRQ */
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index 9d08ff5..eac26fe 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -2,8 +2,8 @@
 /*
  * SGI NMI support routines
  *
- *  Copyright (c) 2009-2013 Silicon Graphics, Inc.  All Rights Reserved.
- *  Copyright (c) Mike Travis
+ * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (c) Mike Travis
  */
 
 #include 
@@ -54,6 +54,20 @@ static struct uv_hub_nmi_s **uv_hub_nmi_list;
 
 DEFINE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
 
+/* Newer SMM NMI handler, not present in all systems */
+static unsigned long uvh_nmi_mmrx; /* UVH_EVENT_OCCURRED0/1 */
+static unsigned long uvh_nmi_mmrx_clear;   /* UVH_EVENT_OCCURRED0/1_ALIAS 
*/
+static int uvh_nmi_mmrx_shift; /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_SHFT */
+static int uvh_nmi_mmrx_mask;  /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
+static char *uvh_nmi_mmrx_type;/* "EXTIO_INT0" */
+
+/* Non-zero indicates newer SMM NMI handler present */
+static unsigned long uvh_nmi_mmrx_supported;   /* UVH_EXTIO_INT0_BROADCAST */
+
+/* Indicates to BIOS that we want to use the newer SMM NMI handler */
+static unsigned long uvh_nmi_mmrx_req; /* UVH_BIOS_KERNEL_MMR_ALIAS_2 
*/
+static int uvh_nmi_mmrx_req_shift; /* 62 */
+
 /* UV hubless values */
 #define NMI_CONTROL_PORT   0x70
 #define NMI_DUMMY_PORT 0x71
@@ -227,13 +241,43 @@ static inline bool uv_nmi_action_is(const char *action)
 /* Setup which NMI support is present in system */
 static void uv_nmi_setup_mmrs(void)
 {
-   if (uv_read_local_mmr(UVH_NMI_MMRX_SUPPORTED)) {
-   uv_write_local_mmr(UVH_NMI_MMRX_REQ,
-   1UL << UVH_NMI_MMRX_REQ_SHIFT);
-   nmi_mmr = UVH_NMI_MMRX;
-   nmi_mmr_clear = UVH_NMI_MMRX_CLEAR;
-   nmi_mmr_pending = 1UL << UVH_NMI_MMRX_SHIFT;
-   pr_info("UV: SMI NMI support: %s\n", UVH_NMI_MMRX_TYPE);
+   /* First determine arch specific MMRs to handshake with BIOS */
+   if (UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK) {
+   uvh_nmi_mmrx = UVH_EVENT_OCCURRED0;
+   uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED0_ALIAS;
+   uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT;
+   uvh_nmi_mmrx_mask = UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK;
+   uvh_nmi_mmrx_type = "OCRD0-EXTIO_INT0";
+
+   uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;
+   uvh_nmi_mmrx_req = UVH_BIOS_KERNEL_MMR_ALIAS_2;
+   uvh_nmi_mmrx_req_shift = 62;
+
+   } else if (UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK) {
+   uvh_nmi_mmrx = UVH_EVENT_OCCURRED1;
+   uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED1_ALIAS;
+   uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED1_EXTIO_INT0_SHFT;
+

[tip: x86/platform] x86/platform/uv: Update Copyrights to conform to HPE standards

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 7a6d94f0ed957fb667d4d74c5c6c640a26e87c8f
Gitweb:
https://git.kernel.org/tip/7a6d94f0ed957fb667d4d74c5c6c640a26e87c8f
Author:Mike Travis 
AuthorDate:Mon, 05 Oct 2020 15:39:29 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 09:10:07 +02:00

x86/platform/uv: Update Copyrights to conform to HPE standards

Add Copyrights to those files that have been updated for UV5 changes.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/20201005203929.148656-14-mike.tra...@hpe.com
---
 arch/x86/include/asm/uv/bios.h  | 1 +
 arch/x86/include/asm/uv/uv_hub.h| 1 +
 arch/x86/include/asm/uv/uv_mmrs.h   | 1 +
 arch/x86/kernel/apic/x2apic_uv_x.c  | 1 +
 arch/x86/platform/uv/bios_uv.c  | 1 +
 arch/x86/platform/uv/uv_nmi.c   | 1 +
 arch/x86/platform/uv/uv_time.c  | 1 +
 drivers/misc/sgi-gru/grufile.c  | 1 +
 drivers/misc/sgi-xp/xp.h| 1 +
 drivers/misc/sgi-xp/xp_main.c   | 1 +
 drivers/misc/sgi-xp/xp_uv.c | 1 +
 drivers/misc/sgi-xp/xpc_main.c  | 1 +
 drivers/misc/sgi-xp/xpc_partition.c | 1 +
 drivers/misc/sgi-xp/xpnet.c | 1 +
 14 files changed, 14 insertions(+)

diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index 97ac595..08b3d81 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -5,6 +5,7 @@
 /*
  * UV BIOS layer definitions.
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
  * Copyright (c) Russ Anderson 
  */
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 610bda2..5002f52 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -5,6 +5,7 @@
  *
  * SGI UV architectural definitions
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2014 Silicon Graphics, Inc. All rights reserved.
  */
 
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h 
b/arch/x86/include/asm/uv/uv_mmrs.h
index 06ea2d1..57fa673 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -5,6 +5,7 @@
  *
  * HPE UV MMR definitions
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2016 Silicon Graphics, Inc. All rights reserved.
  */
 
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 9a83aa1..714233c 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -5,6 +5,7 @@
  *
  * SGI UV APIC functions (note: not an Intel compatible APIC)
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2014 Silicon Graphics, Inc. All rights reserved.
  */
 #include 
diff --git a/arch/x86/platform/uv/bios_uv.c b/arch/x86/platform/uv/bios_uv.c
index b148b4c..54511ea 100644
--- a/arch/x86/platform/uv/bios_uv.c
+++ b/arch/x86/platform/uv/bios_uv.c
@@ -2,6 +2,7 @@
 /*
  * BIOS run time interface routines.
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
  * Copyright (c) Russ Anderson 
  */
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index eac26fe..0f5cbcf 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -2,6 +2,7 @@
 /*
  * SGI NMI support routines
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
  * Copyright (c) Mike Travis
  */
diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c
index d996735..54663f3 100644
--- a/arch/x86/platform/uv/uv_time.c
+++ b/arch/x86/platform/uv/uv_time.c
@@ -2,6 +2,7 @@
 /*
  * SGI RTC clock/timer routines.
  *
+ *  (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  *  Copyright (c) 2009-2013 Silicon Graphics, Inc.  All Rights Reserved.
  *  Copyright (c) Dimitri Sivanich
  */
diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c
index 18aa8c8..7ffcfc0 100644
--- a/drivers/misc/sgi-gru/grufile.c
+++ b/drivers/misc/sgi-gru/grufile.c
@@ -7,6 +7,7 @@
  * This file supports the user system call for file open, close, mmap, etc.
  * This also incudes the driver initialization code.
  *
+ *  (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  *  Copyright (c) 2008-2014 Silicon Graphics, Inc.  All Rights Reserved.
  */
 
diff --git a/drivers/misc/sgi-xp/xp.h b/drivers/misc/sgi-xp/xp.h
index 2b6aabc..9f9af77 100644
--- a/drivers/misc/sgi-xp/xp.h
+++ b/drivers/misc/sgi-xp/xp.h
@@ -3,6 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Co

[tip: x86/platform] x86/platform/uv: Update UV5 TSC checking

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 6a7cf55e9f2b743695adac84375548aa18112327
Gitweb:
https://git.kernel.org/tip/6a7cf55e9f2b743695adac84375548aa18112327
Author:Mike Travis 
AuthorDate:Mon, 05 Oct 2020 15:39:27 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 09:09:04 +02:00

x86/platform/uv: Update UV5 TSC checking

Update check of BIOS TSC sync status to include both possible "invalid"
states provided by newer UV5 BIOS.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Steve Wahl 
Link: https://lkml.kernel.org/r/20201005203929.148656-12-mike.tra...@hpe.com
---
 arch/x86/include/asm/uv/uv_hub.h   |  2 +-
 arch/x86/kernel/apic/x2apic_uv_x.c | 24 ++--
 2 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index ecf5c93..07079b5 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -726,7 +726,7 @@ extern void uv_nmi_setup_hubless(void);
 #define UVH_TSC_SYNC_SHIFT_UV2K16  /* UV2/3k have different bits */
 #define UVH_TSC_SYNC_MASK  3   /* 0011 */
 #define UVH_TSC_SYNC_VALID 3   /* 0011 */
-#define UVH_TSC_SYNC_INVALID   2   /* 0010 */
+#define UVH_TSC_SYNC_UNKNOWN   0   /*  */
 
 /* BMC sets a bit this MMR non-zero before sending an NMI */
 #define UVH_NMI_MMRUVH_BIOS_KERNEL_MMR
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 9b44f45..9a83aa1 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -197,36 +197,32 @@ static void __init uv_tsc_check_sync(void)
int sync_state;
int mmr_shift;
char *state;
-   bool valid;
 
-   /* Accommodate different UV arch BIOSes */
+   /* Different returns from different UV BIOS versions */
mmr = uv_early_read_mmr(UVH_TSC_SYNC_MMR);
mmr_shift =
is_uv2_hub() ? UVH_TSC_SYNC_SHIFT_UV2K : UVH_TSC_SYNC_SHIFT;
sync_state = (mmr >> mmr_shift) & UVH_TSC_SYNC_MASK;
 
+   /* Check if TSC is valid for all sockets */
switch (sync_state) {
case UVH_TSC_SYNC_VALID:
state = "in sync";
-   valid = true;
+   mark_tsc_async_resets("UV BIOS");
break;
 
-   case UVH_TSC_SYNC_INVALID:
-   state = "unstable";
-   valid = false;
+   /* If BIOS state unknown, don't do anything */
+   case UVH_TSC_SYNC_UNKNOWN:
+   state = "unknown";
break;
+
+   /* Otherwise, BIOS indicates problem with TSC */
default:
-   state = "unknown: assuming valid";
-   valid = true;
+   state = "unstable";
+   mark_tsc_unstable("UV BIOS");
break;
}
pr_info("UV: TSC sync state from BIOS:0%d(%s)\n", sync_state, state);
-
-   /* Mark flag that says TSC != 0 is valid for socket 0 */
-   if (valid)
-   mark_tsc_async_resets("UV BIOS");
-   else
-   mark_tsc_unstable("UV BIOS");
 }
 
 /* Selector for (4|4A|5) structs */

[tip: x86/platform] x86/platform/uv: Remove SCIR MMR references for UV systems

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: c4d98077443adf61268ffb8b2c5d63c6176d845f
Gitweb:
https://git.kernel.org/tip/c4d98077443adf61268ffb8b2c5d63c6176d845f
Author:Mike Travis 
AuthorDate:Mon, 05 Oct 2020 15:39:18 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 08:53:51 +02:00

x86/platform/uv: Remove SCIR MMR references for UV systems

UV class systems no longer use System Controller for monitoring of CPU
activity provided by this driver. Other methods have been developed for
BIOS and the management controller (BMC). Remove that supporting code.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Dimitri Sivanich 
Link: https://lkml.kernel.org/r/20201005203929.148656-3-mike.tra...@hpe.com
---
 arch/x86/include/asm/uv/uv_hub.h   | 43 +--
 arch/x86/kernel/apic/x2apic_uv_x.c | 82 +-
 2 files changed, 3 insertions(+), 122 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 100d668..b21228d 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -129,17 +129,6 @@
  */
 #define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_BLADES * 2)
 
-/* System Controller Interface Reg info */
-struct uv_scir_s {
-   struct timer_list timer;
-   unsigned long   offset;
-   unsigned long   last;
-   unsigned long   idle_on;
-   unsigned long   idle_off;
-   unsigned char   state;
-   unsigned char   enabled;
-};
-
 /* GAM (globally addressed memory) range table */
 struct uv_gam_range_s {
u32 limit;  /* PA bits 56:26 (GAM_RANGE_SHFT) */
@@ -191,16 +180,13 @@ struct uv_hub_info_s {
 struct uv_cpu_info_s {
void*p_uv_hub_info;
unsigned char   blade_cpu_id;
-   struct uv_scir_sscir;
+   void*reserved;
 };
 DECLARE_PER_CPU(struct uv_cpu_info_s, __uv_cpu_info);
 
 #define uv_cpu_infothis_cpu_ptr(&__uv_cpu_info)
 #define uv_cpu_info_per(cpu)   (_cpu(__uv_cpu_info, cpu))
 
-#defineuv_scir_info(_cpu_info->scir)
-#defineuv_cpu_scir_info(cpu)   (_cpu_info_per(cpu)->scir)
-
 /* Node specific hub common info struct */
 extern void **__uv_hub_info_list;
 static inline struct uv_hub_info_s *uv_hub_info_list(int node)
@@ -297,9 +283,9 @@ union uvh_apicid {
 #define UV3_GLOBAL_MMR32_SIZE  (32UL * 1024 * 1024)
 
 #define UV4_LOCAL_MMR_BASE 0xfa00UL
-#define UV4_GLOBAL_MMR32_BASE  0xfc00UL
+#define UV4_GLOBAL_MMR32_BASE  0
 #define UV4_LOCAL_MMR_SIZE (32UL * 1024 * 1024)
-#define UV4_GLOBAL_MMR32_SIZE  (16UL * 1024 * 1024)
+#define UV4_GLOBAL_MMR32_SIZE  0
 
 #define UV_LOCAL_MMR_BASE  (   \
is_uv2_hub() ? UV2_LOCAL_MMR_BASE : \
@@ -772,29 +758,6 @@ DECLARE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
 #defineUV_NMI_STATE_DUMP   2
 #defineUV_NMI_STATE_DUMP_DONE  3
 
-/* Update SCIR state */
-static inline void uv_set_scir_bits(unsigned char value)
-{
-   if (uv_scir_info->state != value) {
-   uv_scir_info->state = value;
-   uv_write_local_mmr8(uv_scir_info->offset, value);
-   }
-}
-
-static inline unsigned long uv_scir_offset(int apicid)
-{
-   return SCIR_LOCAL_MMR_BASE | (apicid & 0x3f);
-}
-
-static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value)
-{
-   if (uv_cpu_scir_info(cpu)->state != value) {
-   uv_write_global_mmr8(uv_cpu_to_pnode(cpu),
-   uv_cpu_scir_info(cpu)->offset, value);
-   uv_cpu_scir_info(cpu)->state = value;
-   }
-}
-
 /*
  * Get the minimum revision number of the hub chips within the partition.
  * (See UVx_HUB_REVISION_BASE above for specific values.)
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 0b6eea3..f51fabf 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -909,85 +909,6 @@ static __init void uv_rtc_init(void)
}
 }
 
-/*
- * percpu heartbeat timer
- */
-static void uv_heartbeat(struct timer_list *timer)
-{
-   unsigned char bits = uv_scir_info->state;
-
-   /* Flip heartbeat bit: */
-   bits ^= SCIR_CPU_HEARTBEAT;
-
-   /* Is this CPU idle? */
-   if (idle_cpu(raw_smp_processor_id()))
-   bits &= ~SCIR_CPU_ACTIVITY;
-   else
-   bits |= SCIR_CPU_ACTIVITY;
-
-   /* Update system controller interface reg: */
-   uv_set_scir_bits(bits);
-
-   /* Enable next timer period: */
-   mod_timer(timer, jiffies + SCIR_CPU_HB_INTERVAL);
-}
-
-static int uv_heartbeat_enable(unsigned int cpu)
-{
-   while (!uv_cpu_scir_info(cpu)->enabled) 

[tip: x86/platform] x86/platform/uv: Adjust GAM MMR references affected by UV5 updates

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: 8540b2cf0de09b6d96b7dce56a16e26ab4fe8a9b
Gitweb:
https://git.kernel.org/tip/8540b2cf0de09b6d96b7dce56a16e26ab4fe8a9b
Author:Mike Travis 
AuthorDate:Mon, 05 Oct 2020 15:39:24 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 09:07:44 +02:00

x86/platform/uv: Adjust GAM MMR references affected by UV5 updates

Make modifications to the GAM MMR mappings to accommodate changes for UV5.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
Link: https://lkml.kernel.org/r/20201005203929.148656-9-mike.tra...@hpe.com
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 30 -
 1 file changed, 25 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index e2e866a..5aed07f 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -927,12 +927,32 @@ static __init void map_gru_high(int max_pnode)
 
 static __init void map_mmr_high(int max_pnode)
 {
-   union uvh_rh_gam_mmr_overlay_config_u mmr;
-   int shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT;
+   unsigned long base;
+   int shift;
+   bool enable;
+
+   if (UVH_RH10_GAM_MMR_OVERLAY_CONFIG) {
+   union uvh_rh10_gam_mmr_overlay_config_u mmr;
+
+   mmr.v = uv_read_local_mmr(UVH_RH10_GAM_MMR_OVERLAY_CONFIG);
+   enable = mmr.s.enable;
+   base = mmr.s.base;
+   shift = UVH_RH10_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT;
+   } else if (UVH_RH_GAM_MMR_OVERLAY_CONFIG) {
+   union uvh_rh_gam_mmr_overlay_config_u mmr;
+
+   mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG);
+   enable = mmr.s.enable;
+   base = mmr.s.base;
+   shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT;
+   } else {
+   pr_err("UV:%s:RH_GAM_MMR_OVERLAY_CONFIG MMR undefined?\n",
+   __func__);
+   return;
+   }
 
-   mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG);
-   if (mmr.s.enable)
-   map_high("MMR", mmr.s.base, shift, shift, max_pnode, map_uc);
+   if (enable)
+   map_high("MMR", base, shift, shift, max_pnode, map_uc);
else
pr_info("UV: MMR disabled\n");
 }

[tip: x86/platform] x86/platform/uv: Update node present counting

[tip-bot2 for Mike Travis]

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: d6922effe4f3d5c643c8c05d51a572d6db4c9cb3
Gitweb:
https://git.kernel.org/tip/d6922effe4f3d5c643c8c05d51a572d6db4c9cb3
Author:Mike Travis 
AuthorDate:Mon, 05 Oct 2020 15:39:26 -05:00
Committer: Borislav Petkov 
CommitterDate: Wed, 07 Oct 2020 09:08:35 +02:00

x86/platform/uv: Update node present counting

The changes in the UV5 arch shrunk the NODE PRESENT table to just 2x64
entries (128 total) so are in to 64 bit MMRs instead of a depth of 64
bits in an array.  Adjust references when counting up the nodes present.

Signed-off-by: Mike Travis 
Signed-off-by: Borislav Petkov 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
Link: https://lkml.kernel.org/r/20201005203929.148656-11-mike.tra...@hpe.com
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 26 +++---
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 64a1c59..9b44f45 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1436,20 +1436,32 @@ static int __init decode_uv_systab(void)
 /* Set up physical blade translations from UVH_NODE_PRESENT_TABLE */
 static __init void boot_init_possible_blades(struct uv_hub_info_s *hub_info)
 {
+   unsigned long np;
int i, uv_pb = 0;
 
-   pr_info("UV: NODE_PRESENT_DEPTH = %d\n", UVH_NODE_PRESENT_TABLE_DEPTH);
-   for (i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) {
-   unsigned long np;
-
-   np = uv_read_local_mmr(UVH_NODE_PRESENT_TABLE + i * 8);
-   if (np)
+   if (UVH_NODE_PRESENT_TABLE) {
+   pr_info("UV: NODE_PRESENT_DEPTH = %d\n",
+   UVH_NODE_PRESENT_TABLE_DEPTH);
+   for (i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) {
+   np = uv_read_local_mmr(UVH_NODE_PRESENT_TABLE + i * 8);
pr_info("UV: NODE_PRESENT(%d) = 0x%016lx\n", i, np);
-
+   uv_pb += hweight64(np);
+   }
+   }
+   if (UVH_NODE_PRESENT_0) {
+   np = uv_read_local_mmr(UVH_NODE_PRESENT_0);
+   pr_info("UV: NODE_PRESENT_0 = 0x%016lx\n", np);
+   uv_pb += hweight64(np);
+   }
+   if (UVH_NODE_PRESENT_1) {
+   np = uv_read_local_mmr(UVH_NODE_PRESENT_1);
+   pr_info("UV: NODE_PRESENT_1 = 0x%016lx\n", np);
uv_pb += hweight64(np);
}
if (uv_possible_blades != uv_pb)
uv_possible_blades = uv_pb;
+
+   pr_info("UV: number nodes/possible blades %d\n", uv_pb);
 }
 
 static void __init build_socket_tables(void)

Re: [PATCH v4 06/13] x86/platform/uv: Add and Decode Arch Type in UVsystab

[Mike Travis]

On 10/6/2020 8:19 AM, Borislav Petkov wrote:

On Mon, Oct 05, 2020 at 02:35:58PM -0700, Mike Travis wrote:



On 10/5/2020 2:21 PM, Borislav Petkov wrote:

On Mon, Oct 05, 2020 at 03:39:22PM -0500, Mike Travis wrote:

A patch to add and process the UV Arch Type field in the UVsystab passed
from UV BIOS to the kernel.


What does that mean?



There have been recent cases where OEM's want to use the OEM_ID in the ACPI
tables to brand their own product.  The UV BIOS used that field to tell the
Linux kernel which UV arch the running system is.  The Arch Type in the
UVsystab (also created by UV BIOS) now carries that field in systems that
support it.


I am unclear on the whole patch passing from UV BIOS to the kernel. Are
you talking about a kernel patch here? If so, commit ID is? Or what kind
of patch are you talking about?



When the UV BIOS starts the kernel it passes the UVsystab info struct to 
the kernel which contains information elements more specific than ACPI, 
and generally pertinent only to the MMR's.  These are read only fields 
so information is passed one way only.  A new field starting with UV5 is 
the UV architecture type so the ACPI OEM_ID field can be used for other 
purposes going forward.  The UV Arch Type selects the entirety of the 
MMRs available, with their addresses and fields defined in uv_mmrs.h.


Thanks,
Mike

Re: [PATCH v4 02/13] x86/platform/uv: Remove SCIR MMR references for UVY systems.

[Mike Travis]

On 10/6/2020 6:16 AM, Borislav Petkov wrote:

Subject: Re: [PATCH v4 02/13] x86/platform/uv: Remove SCIR MMR references for 
UVY systems.


You mean "UV" systems, right? Or are there "UVY" systems too? git grep
says no.


I thought there was more references to the UVY class which currently has 
only UV5 as a member.  There might be UV5 references where they should 
be UVY.  The struct references use "uvy" as the selector so the grep 
should look for upper and lower case.


The UV5 system is still in the design stage so we are doing development 
using simulators.  More UV5 support is expected to arrive as needed. 
(The earlier class was UVX if interested.)



On Mon, Oct 05, 2020 at 03:39:18PM -0500, Mike Travis wrote:

UV class systems no longer use System Controller for monitoring of CPU
activity provided by this driver.  Other methods have been developed
for BIOS and the management controller (BMC).  This patch removes that
supporting code.


Avoid having "This patch" or "This commit" in the commit message. It is
tautologically useless.

Also, do

$ git grep 'This patch' Documentation/process >
for more details.

I've fixed it up but please try not to do that in future patches.


Will do, thanks for the update it has been awhile for me.


Thx.

[PATCH v4 02/13] x86/platform/uv: Remove SCIR MMR references for UVY systems.

[Mike Travis]

UV class systems no longer use System Controller for monitoring of CPU
activity provided by this driver.  Other methods have been developed
for BIOS and the management controller (BMC).  This patch removes that
supporting code.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
---
 arch/x86/include/asm/uv/uv_hub.h   | 43 ++--
 arch/x86/kernel/apic/x2apic_uv_x.c | 82 --
 2 files changed, 3 insertions(+), 122 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 100d66806503..b21228db75bf 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -129,17 +129,6 @@
  */
 #define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_BLADES * 2)
 
-/* System Controller Interface Reg info */
-struct uv_scir_s {
-   struct timer_list timer;
-   unsigned long   offset;
-   unsigned long   last;
-   unsigned long   idle_on;
-   unsigned long   idle_off;
-   unsigned char   state;
-   unsigned char   enabled;
-};
-
 /* GAM (globally addressed memory) range table */
 struct uv_gam_range_s {
u32 limit;  /* PA bits 56:26 (GAM_RANGE_SHFT) */
@@ -191,16 +180,13 @@ struct uv_hub_info_s {
 struct uv_cpu_info_s {
void*p_uv_hub_info;
unsigned char   blade_cpu_id;
-   struct uv_scir_sscir;
+   void*reserved;
 };
 DECLARE_PER_CPU(struct uv_cpu_info_s, __uv_cpu_info);
 
 #define uv_cpu_infothis_cpu_ptr(&__uv_cpu_info)
 #define uv_cpu_info_per(cpu)   (_cpu(__uv_cpu_info, cpu))
 
-#defineuv_scir_info(_cpu_info->scir)
-#defineuv_cpu_scir_info(cpu)   (_cpu_info_per(cpu)->scir)
-
 /* Node specific hub common info struct */
 extern void **__uv_hub_info_list;
 static inline struct uv_hub_info_s *uv_hub_info_list(int node)
@@ -297,9 +283,9 @@ union uvh_apicid {
 #define UV3_GLOBAL_MMR32_SIZE  (32UL * 1024 * 1024)
 
 #define UV4_LOCAL_MMR_BASE 0xfa00UL
-#define UV4_GLOBAL_MMR32_BASE  0xfc00UL
+#define UV4_GLOBAL_MMR32_BASE  0
 #define UV4_LOCAL_MMR_SIZE (32UL * 1024 * 1024)
-#define UV4_GLOBAL_MMR32_SIZE  (16UL * 1024 * 1024)
+#define UV4_GLOBAL_MMR32_SIZE  0
 
 #define UV_LOCAL_MMR_BASE  (   \
is_uv2_hub() ? UV2_LOCAL_MMR_BASE : \
@@ -772,29 +758,6 @@ DECLARE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
 #defineUV_NMI_STATE_DUMP   2
 #defineUV_NMI_STATE_DUMP_DONE  3
 
-/* Update SCIR state */
-static inline void uv_set_scir_bits(unsigned char value)
-{
-   if (uv_scir_info->state != value) {
-   uv_scir_info->state = value;
-   uv_write_local_mmr8(uv_scir_info->offset, value);
-   }
-}
-
-static inline unsigned long uv_scir_offset(int apicid)
-{
-   return SCIR_LOCAL_MMR_BASE | (apicid & 0x3f);
-}
-
-static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value)
-{
-   if (uv_cpu_scir_info(cpu)->state != value) {
-   uv_write_global_mmr8(uv_cpu_to_pnode(cpu),
-   uv_cpu_scir_info(cpu)->offset, value);
-   uv_cpu_scir_info(cpu)->state = value;
-   }
-}
-
 /*
  * Get the minimum revision number of the hub chips within the partition.
  * (See UVx_HUB_REVISION_BASE above for specific values.)
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 0b6eea3f54e6..f51fabf56010 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -909,85 +909,6 @@ static __init void uv_rtc_init(void)
}
 }
 
-/*
- * percpu heartbeat timer
- */
-static void uv_heartbeat(struct timer_list *timer)
-{
-   unsigned char bits = uv_scir_info->state;
-
-   /* Flip heartbeat bit: */
-   bits ^= SCIR_CPU_HEARTBEAT;
-
-   /* Is this CPU idle? */
-   if (idle_cpu(raw_smp_processor_id()))
-   bits &= ~SCIR_CPU_ACTIVITY;
-   else
-   bits |= SCIR_CPU_ACTIVITY;
-
-   /* Update system controller interface reg: */
-   uv_set_scir_bits(bits);
-
-   /* Enable next timer period: */
-   mod_timer(timer, jiffies + SCIR_CPU_HB_INTERVAL);
-}
-
-static int uv_heartbeat_enable(unsigned int cpu)
-{
-   while (!uv_cpu_scir_info(cpu)->enabled) {
-   struct timer_list *timer = _cpu_scir_info(cpu)->timer;
-
-   uv_set_cpu_scir_bits(cpu, SCIR_CPU_HEARTBEAT|SCIR_CPU_ACTIVITY);
-   timer_setup(timer, uv_heartbeat, TIMER_PINNED);
-   timer->expires = jiffies + SCIR_CPU_HB_INTERVAL;
-   add_timer_on(timer, cpu);
-   uv_cpu_scir_info(cpu)->enabled = 1;
-
-   /* Also ensure that boot CPU is enabled: */
-   cpu = 0;
-   }
-   re

[PATCH v4 13/13] x86/platform/uv: Update Copyrights to conform to HPE standards

[Mike Travis]

Add Copyrights to those files that have been updated for UV5 changes.

Signed-off-by: Mike Travis 
---
 arch/x86/include/asm/uv/bios.h  | 1 +
 arch/x86/include/asm/uv/uv_hub.h| 1 +
 arch/x86/include/asm/uv/uv_mmrs.h   | 1 +
 arch/x86/kernel/apic/x2apic_uv_x.c  | 1 +
 arch/x86/platform/uv/bios_uv.c  | 1 +
 arch/x86/platform/uv/uv_nmi.c   | 1 +
 arch/x86/platform/uv/uv_time.c  | 1 +
 drivers/misc/sgi-gru/grufile.c  | 1 +
 drivers/misc/sgi-xp/xp.h| 1 +
 drivers/misc/sgi-xp/xp_main.c   | 1 +
 drivers/misc/sgi-xp/xp_uv.c | 1 +
 drivers/misc/sgi-xp/xpc_main.c  | 1 +
 drivers/misc/sgi-xp/xpc_partition.c | 1 +
 drivers/misc/sgi-xp/xpnet.c | 1 +
 14 files changed, 14 insertions(+)

diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index 97ac595ebc6a..08b3d810dfba 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -5,6 +5,7 @@
 /*
  * UV BIOS layer definitions.
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
  * Copyright (c) Russ Anderson 
  */
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 610bda21a8d9..5002f52be332 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -5,6 +5,7 @@
  *
  * SGI UV architectural definitions
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2014 Silicon Graphics, Inc. All rights reserved.
  */
 
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h 
b/arch/x86/include/asm/uv/uv_mmrs.h
index 06ea2d1aaa3e..57fa67373262 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -5,6 +5,7 @@
  *
  * HPE UV MMR definitions
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2016 Silicon Graphics, Inc. All rights reserved.
  */
 
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 9ab4ac4d3ec0..1813176f1483 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -5,6 +5,7 @@
  *
  * SGI UV APIC functions (note: not an Intel compatible APIC)
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2014 Silicon Graphics, Inc. All rights reserved.
  */
 #include 
diff --git a/arch/x86/platform/uv/bios_uv.c b/arch/x86/platform/uv/bios_uv.c
index b148b4c8c2ec..54511eaccf4d 100644
--- a/arch/x86/platform/uv/bios_uv.c
+++ b/arch/x86/platform/uv/bios_uv.c
@@ -2,6 +2,7 @@
 /*
  * BIOS run time interface routines.
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
  * Copyright (c) Russ Anderson 
  */
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index eac26feb0461..0f5cbcf0da63 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -2,6 +2,7 @@
 /*
  * SGI NMI support routines
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
  * Copyright (c) Mike Travis
  */
diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c
index e94436ba3022..a39e0f394c0e 100644
--- a/arch/x86/platform/uv/uv_time.c
+++ b/arch/x86/platform/uv/uv_time.c
@@ -2,6 +2,7 @@
 /*
  * SGI RTC clock/timer routines.
  *
+ *  (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  *  Copyright (c) 2009-2013 Silicon Graphics, Inc.  All Rights Reserved.
  *  Copyright (c) Dimitri Sivanich
  */
diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c
index 18aa8c877bf8..7ffcfc0bb587 100644
--- a/drivers/misc/sgi-gru/grufile.c
+++ b/drivers/misc/sgi-gru/grufile.c
@@ -7,6 +7,7 @@
  * This file supports the user system call for file open, close, mmap, etc.
  * This also incudes the driver initialization code.
  *
+ *  (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  *  Copyright (c) 2008-2014 Silicon Graphics, Inc.  All Rights Reserved.
  */
 
diff --git a/drivers/misc/sgi-xp/xp.h b/drivers/misc/sgi-xp/xp.h
index 0af267baf031..7d839d844847 100644
--- a/drivers/misc/sgi-xp/xp.h
+++ b/drivers/misc/sgi-xp/xp.h
@@ -3,6 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2004-2008 Silicon Graphics, Inc. All rights reserved.
  */
 
diff --git a/drivers/misc/sgi-xp/xp_main.c b/drivers/misc/sgi-xp/xp_main.c
index 33558555820d..049c9aef0559 100644
--- a/drivers/misc/sgi-xp/xp_main.c
+++ b/drivers/misc/sgi-xp/xp_main.c
@@ -3,6 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Cop

Re: [PATCH v4 06/13] x86/platform/uv: Add and Decode Arch Type in UVsystab

[Mike Travis]

On 10/5/2020 2:21 PM, Borislav Petkov wrote:

On Mon, Oct 05, 2020 at 03:39:22PM -0500, Mike Travis wrote:

A patch to add and process the UV Arch Type field in the UVsystab passed
from UV BIOS to the kernel.


What does that mean?



There have been recent cases where OEM's want to use the OEM_ID in the 
ACPI tables to brand their own product.  The UV BIOS used that field to 
tell the Linux kernel which UV arch the running system is.  The Arch 
Type in the UVsystab (also created by UV BIOS) now carries that field in 
systems that support it.

Re: [PATCH v4 03/13] x86/platform/uv: Adjust references in UV kernel modules

[Mike Travis]

On 10/5/2020 2:16 PM, Borislav Petkov wrote:

On Mon, Oct 05, 2020 at 03:39:19PM -0500, Mike Travis wrote:

Make a small symbol change (is_uv() ==> is_uv_sys()) to accommodate a
change in the uv_mmrs.h file (is_uv() is the new arch selector function).

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
  drivers/misc/sgi-xp/xp.h| 8 
  drivers/misc/sgi-xp/xp_main.c   | 4 ++--
  drivers/misc/sgi-xp/xp_uv.c | 6 --
  drivers/misc/sgi-xp/xpc_main.c  | 6 +++---
  drivers/misc/sgi-xp/xpc_partition.c | 2 +-
  drivers/misc/sgi-xp/xpnet.c | 2 +-
  6 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/misc/sgi-xp/xp.h b/drivers/misc/sgi-xp/xp.h
index 06469b12aced..0af267baf031 100644
--- a/drivers/misc/sgi-xp/xp.h
+++ b/drivers/misc/sgi-xp/xp.h
@@ -17,11 +17,11 @@
  
  #if defined CONFIG_X86_UV || defined CONFIG_IA64_SGI_UV

  #include 
-#define is_uv()is_uv_system()
+#define is_uv_sys()is_uv_system()


Do I see it correctly that you can simply use is_uv_system() directly
instead of this macro indirection?


Yes, there was the MACRO is_uv() that conflicted with the automated 
"generate uv_mmrs.h" PERL script that also uses it that I changed.  I 
see now maybe just getting rid of the entire thing in this file might 
have been better?

[PATCH v4 07/13] x86/platform/uv: Update MMIOH references based on new UV5 MMRs.

[Mike Travis]

Make modifications to the MMIOH mappings to accommodate changes for UV5.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
Reported-by: kernel test robot 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 212 -
 1 file changed, 144 insertions(+), 68 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 9b7a334578e6..f2c5a03b5cf7 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -226,6 +226,13 @@ static void __init uv_tsc_check_sync(void)
mark_tsc_unstable("UV BIOS");
 }
 
+/* Selector for (4|4A|5) structs */
+#define uvxy_field(sname, field, undef) (  \
+   is_uv(UV4A) ? sname.s4a.field : \
+   is_uv(UV4) ? sname.s4.field :   \
+   is_uv(UV3) ? sname.s3.field :   \
+   undef)
+
 /* [Copied from arch/x86/kernel/cpu/topology.c:detect_extended_topology()] */
 
 #define SMT_LEVEL  0   /* Leaf 0xb SMT level */
@@ -878,6 +885,7 @@ static __init void get_lowmem_redirect(unsigned long *base, 
unsigned long *size)
 }
 
 enum map_type {map_wb, map_uc};
+static const char * const mt[] = { "WB", "UC" };
 
 static __init void map_high(char *id, unsigned long base, int pshift, int 
bshift, int max_pnode, enum map_type map_type)
 {
@@ -889,11 +897,13 @@ static __init void map_high(char *id, unsigned long base, 
int pshift, int bshift
pr_info("UV: Map %s_HI base address NULL\n", id);
return;
}
-   pr_debug("UV: Map %s_HI 0x%lx - 0x%lx\n", id, paddr, paddr + bytes);
if (map_type == map_uc)
init_extra_mapping_uc(paddr, bytes);
else
init_extra_mapping_wb(paddr, bytes);
+
+   pr_info("UV: Map %s_HI 0x%lx - 0x%lx %s (%d segments)\n",
+   id, paddr, paddr + bytes, mt[map_type], max_pnode + 1);
 }
 
 static __init void map_gru_high(int max_pnode)
@@ -927,52 +937,74 @@ static __init void map_mmr_high(int max_pnode)
pr_info("UV: MMR disabled\n");
 }
 
-/* UV3/4 have identical MMIOH overlay configs, UV4A is slightly different */
-static __init void map_mmioh_high_uv34(int index, int min_pnode, int max_pnode)
-{
-   unsigned long overlay;
-   unsigned long mmr;
-   unsigned long base;
-   unsigned long nasid_mask;
-   unsigned long m_overlay;
-   int i, n, shift, m_io, max_io;
-   int nasid, lnasid, fi, li;
-   char *id;
-
-   if (index == 0) {
-   id = "MMIOH0";
-   m_overlay = UVH_RH_GAM_MMIOH_OVERLAY_CONFIG0;
-   overlay = uv_read_local_mmr(m_overlay);
-   base = overlay & UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK;
+/* Arch specific ENUM cases */
+enum mmioh_arch {
+   UV2_MMIOH = -1,
+   UVY_MMIOH0, UVY_MMIOH1,
+   UVX_MMIOH0, UVX_MMIOH1,
+};
+
+/* Calculate and Map MMIOH Regions */
+static void __init calc_mmioh_map(enum mmioh_arch index,
+   int min_pnode, int max_pnode,
+   int shift, unsigned long base, int m_io, int n_io)
+{
+   unsigned long mmr, nasid_mask;
+   int nasid, min_nasid, max_nasid, lnasid, mapped;
+   int i, fi, li, n, max_io;
+   char id[8];
+
+   /* One (UV2) mapping */
+   if (index == UV2_MMIOH) {
+   strncpy(id, "MMIOH", sizeof(id));
+   max_io = max_pnode;
+   mapped = 0;
+   goto map_exit;
+   }
+
+   /* small and large MMIOH mappings */
+   switch (index) {
+   case UVY_MMIOH0:
+   mmr = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG0;
+   nasid_mask = UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK;
+   n = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG0_DEPTH;
+   min_nasid = min_pnode;
+   max_nasid = max_pnode;
+   mapped = 1;
+   break;
+   case UVY_MMIOH1:
+   mmr = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG1;
+   nasid_mask = UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG1_BASE_MASK;
+   n = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG1_DEPTH;
+   min_nasid = min_pnode;
+   max_nasid = max_pnode;
+   mapped = 1;
+   break;
+   case UVX_MMIOH0:
mmr = UVH_RH_GAM_MMIOH_REDIRECT_CONFIG0;
-   m_io = (overlay & UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_MASK)
-   >> UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_SHFT;
-   shift = UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_SHFT;
+   nasid_mask = UVH_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK;
n = UVH_RH_GAM_MMIOH_REDIRECT_CONFIG0_DEPTH;
-   nasid_mask = UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK;
-   } else {
-   id = "MMIOH1";
-   m_overlay = UVH_RH_GAM_MMIOH_OVERLAY_CONFIG1;
-   ov

[PATCH v4 05/13] x86/platform/uv: Add UV5 direct references

[Mike Travis]

Add new references to UV5 (and UVY class) system MMR addresses and
fields primarily caused by the expansion from 46 to 52 bits of
physical memory address.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/include/asm/uv/uv_hub.h   | 49 ++-
 arch/x86/kernel/apic/x2apic_uv_x.c | 97 +-
 2 files changed, 103 insertions(+), 43 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 76969be09660..ecf5c93e7ae8 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -160,6 +160,7 @@ struct uv_hub_info_s {
unsigned char   gr_table_len;
unsigned char   apic_pnode_shift;
unsigned char   gpa_shift;
+   unsigned char   nasid_shift;
unsigned char   m_shift;
unsigned char   n_lshift;
unsigned intgnode_extra;
@@ -226,6 +227,7 @@ static inline __init void uv_hub_type_set(int uvmask)
 #define UV3_HUB_REVISION_BASE  5
 #define UV4_HUB_REVISION_BASE  7
 #define UV4A_HUB_REVISION_BASE 8   /* UV4 (fixed) rev 2 */
+#define UV5_HUB_REVISION_BASE  9
 
 static inline int is_uv(int uvmask) { return uv_hub_type() & uvmask; }
 static inline int is_uv1_hub(void) { return 0; }
@@ -233,7 +235,7 @@ static inline int is_uv2_hub(void) { return is_uv(UV2); }
 static inline int is_uv3_hub(void) { return is_uv(UV3); }
 static inline int is_uv4a_hub(void) { return is_uv(UV4A); }
 static inline int is_uv4_hub(void) { return is_uv(UV4); }
-static inline int is_uv5_hub(void) { return 0; }
+static inline int is_uv5_hub(void) { return is_uv(UV5); }
 
 /*
  * UV4A is a revision of UV4.  So on UV4A, both is_uv4_hub() and
@@ -246,7 +248,7 @@ static inline int is_uv5_hub(void) { return 0; }
 static inline int is_uvx_hub(void) { return is_uv(UVX); }
 
 /* UVY class: UV5,..? */
-static inline int is_uvy_hub(void) { return 0; }
+static inline int is_uvy_hub(void) { return is_uv(UVY); }
 
 /* Any UV Hubbed System */
 static inline int is_uv_hub(void) { return is_uv(UV_ANY); }
@@ -271,9 +273,11 @@ union uvh_apicid {
  * g -  GNODE (full 15-bit global nasid, right shifted 1)
  * p -  PNODE (local part of nsids, right shifted 1)
  */
-#define UV_NASID_TO_PNODE(n)   (((n) >> 1) & uv_hub_info->pnode_mask)
+#define UV_NASID_TO_PNODE(n)   \
+   (((n) >> uv_hub_info->nasid_shift) & uv_hub_info->pnode_mask)
 #define UV_PNODE_TO_GNODE(p)   ((p) |uv_hub_info->gnode_extra)
-#define UV_PNODE_TO_NASID(p)   (UV_PNODE_TO_GNODE(p) << 1)
+#define UV_PNODE_TO_NASID(p)   \
+   (UV_PNODE_TO_GNODE(p) << uv_hub_info->nasid_shift)
 
 #define UV2_LOCAL_MMR_BASE 0xfa00UL
 #define UV2_GLOBAL_MMR32_BASE  0xfc00UL
@@ -290,25 +294,38 @@ union uvh_apicid {
 #define UV4_LOCAL_MMR_SIZE (32UL * 1024 * 1024)
 #define UV4_GLOBAL_MMR32_SIZE  0
 
+#define UV5_LOCAL_MMR_BASE 0xfa00UL
+#define UV5_GLOBAL_MMR32_BASE  0
+#define UV5_LOCAL_MMR_SIZE (32UL * 1024 * 1024)
+#define UV5_GLOBAL_MMR32_SIZE  0
+
 #define UV_LOCAL_MMR_BASE  (   \
-   is_uv2_hub() ? UV2_LOCAL_MMR_BASE : \
-   is_uv3_hub() ? UV3_LOCAL_MMR_BASE : \
-   /*is_uv4_hub*/ UV4_LOCAL_MMR_BASE)
+   is_uv(UV2) ? UV2_LOCAL_MMR_BASE : \
+   is_uv(UV3) ? UV3_LOCAL_MMR_BASE : \
+   is_uv(UV4) ? UV4_LOCAL_MMR_BASE : \
+   is_uv(UV5) ? UV5_LOCAL_MMR_BASE : \
+   0)
 
 #define UV_GLOBAL_MMR32_BASE   (   \
-   is_uv2_hub() ? UV2_GLOBAL_MMR32_BASE : \
-   is_uv3_hub() ? UV3_GLOBAL_MMR32_BASE : \
-   /*is_uv4_hub*/ UV4_GLOBAL_MMR32_BASE)
+   is_uv(UV2) ? UV2_GLOBAL_MMR32_BASE : \
+   is_uv(UV3) ? UV3_GLOBAL_MMR32_BASE : \
+   is_uv(UV4) ? UV4_GLOBAL_MMR32_BASE : \
+   is_uv(UV5) ? UV5_GLOBAL_MMR32_BASE : \
+   0)
 
 #define UV_LOCAL_MMR_SIZE  (   \
-   is_uv2_hub() ? UV2_LOCAL_MMR_SIZE : \
-   is_uv3_hub() ? UV3_LOCAL_MMR_SIZE : \
-   /*is_uv4_hub*/ UV4_LOCAL_MMR_SIZE)
+   

[PATCH v4 09/13] x86/platform/uv: Update UV5 MMR references in UV GRU

[Mike Travis]

Make modifications to the GRU mappings to accommodate changes for UV5.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 30 --
 1 file changed, 24 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 948029576441..9208a84d381a 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -82,6 +82,9 @@ static unsigned long __init uv_early_read_mmr(unsigned long 
addr)
 
 static inline bool is_GRU_range(u64 start, u64 end)
 {
+   if (!gru_start_paddr)
+   return false;
+
return start >= gru_start_paddr && end <= gru_end_paddr;
 }
 
@@ -909,13 +912,24 @@ static __init void map_high(char *id, unsigned long base, 
int pshift, int bshift
 static __init void map_gru_high(int max_pnode)
 {
union uvh_rh_gam_gru_overlay_config_u gru;
-   int shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
-   unsigned long mask = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
-   unsigned long base;
+   unsigned long mask, base;
+   int shift;
+
+   if (UVH_RH_GAM_GRU_OVERLAY_CONFIG) {
+   gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG);
+   shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
+   mask = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
+   } else if (UVH_RH10_GAM_GRU_OVERLAY_CONFIG) {
+   gru.v = uv_read_local_mmr(UVH_RH10_GAM_GRU_OVERLAY_CONFIG);
+   shift = UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
+   mask = UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
+   } else {
+   pr_err("UV: GRU unavailable (no MMR)\n");
+   return;
+   }
 
-   gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG);
if (!gru.s.enable) {
-   pr_info("UV: GRU disabled\n");
+   pr_info("UV: GRU disabled (by BIOS)\n");
return;
}
 
@@ -1288,7 +1302,11 @@ static void __init uv_init_hub_info(struct uv_hub_info_s 
*hi)
/* Show system specific info: */
pr_info("UV: N:%d M:%d m_shift:%d n_lshift:%d\n", hi->n_val, hi->m_val, 
hi->m_shift, hi->n_lshift);
pr_info("UV: gpa_mask/shift:0x%lx/%d pnode_mask:0x%x apic_pns:%d\n", 
hi->gpa_mask, hi->gpa_shift, hi->pnode_mask, hi->apic_pnode_shift);
-   pr_info("UV: mmr_base/shift:0x%lx/%ld gru_base/shift:0x%lx/%ld\n", 
hi->global_mmr_base, hi->global_mmr_shift, hi->global_gru_base, 
hi->global_gru_shift);
+   pr_info("UV: mmr_base/shift:0x%lx/%ld\n", hi->global_mmr_base, 
hi->global_mmr_shift);
+   if (hi->global_gru_base)
+   pr_info("UV: gru_base/shift:0x%lx/%ld\n",
+   hi->global_gru_base, hi->global_gru_shift);
+
pr_info("UV: gnode_upper:0x%lx gnode_extra:0x%x\n", hi->gnode_upper, 
hi->gnode_extra);
 }
 
-- 
2.21.0

[PATCH v4 12/13] x86/platform/uv: Update for UV5 NMI MMR changes

[Mike Travis]

The UV NMI MMR addresses and fields moved between UV4 and UV5
necessitating a rewrite of the UV NMI handler.  Adjust references
to accommodate those changes.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/include/asm/uv/uv_hub.h | 13 ---
 arch/x86/platform/uv/uv_nmi.c| 64 +++-
 2 files changed, 54 insertions(+), 23 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 07079b59824d..610bda21a8d9 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -734,19 +734,6 @@ extern void uv_nmi_setup_hubless(void);
 #define UVH_NMI_MMR_SHIFT  63
 #define UVH_NMI_MMR_TYPE   "SCRATCH5"
 
-/* Newer SMM NMI handler, not present in all systems */
-#define UVH_NMI_MMRX   UVH_EVENT_OCCURRED0
-#define UVH_NMI_MMRX_CLEAR UVH_EVENT_OCCURRED0_ALIAS
-#define UVH_NMI_MMRX_SHIFT UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT
-#define UVH_NMI_MMRX_TYPE  "EXTIO_INT0"
-
-/* Non-zero indicates newer SMM NMI handler present */
-#define UVH_NMI_MMRX_SUPPORTED UVH_EXTIO_INT0_BROADCAST
-
-/* Indicates to BIOS that we want to use the newer SMM NMI handler */
-#define UVH_NMI_MMRX_REQ   UVH_BIOS_KERNEL_MMR_ALIAS_2
-#define UVH_NMI_MMRX_REQ_SHIFT 62
-
 struct uv_hub_nmi_s {
raw_spinlock_t  nmi_lock;
atomic_tin_nmi; /* flag this node in UV NMI IRQ */
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index 9d08ff5a755e..eac26feb0461 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -2,8 +2,8 @@
 /*
  * SGI NMI support routines
  *
- *  Copyright (c) 2009-2013 Silicon Graphics, Inc.  All Rights Reserved.
- *  Copyright (c) Mike Travis
+ * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (c) Mike Travis
  */
 
 #include 
@@ -54,6 +54,20 @@ static struct uv_hub_nmi_s **uv_hub_nmi_list;
 
 DEFINE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
 
+/* Newer SMM NMI handler, not present in all systems */
+static unsigned long uvh_nmi_mmrx; /* UVH_EVENT_OCCURRED0/1 */
+static unsigned long uvh_nmi_mmrx_clear;   /* UVH_EVENT_OCCURRED0/1_ALIAS 
*/
+static int uvh_nmi_mmrx_shift; /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_SHFT */
+static int uvh_nmi_mmrx_mask;  /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
+static char *uvh_nmi_mmrx_type;/* "EXTIO_INT0" */
+
+/* Non-zero indicates newer SMM NMI handler present */
+static unsigned long uvh_nmi_mmrx_supported;   /* UVH_EXTIO_INT0_BROADCAST */
+
+/* Indicates to BIOS that we want to use the newer SMM NMI handler */
+static unsigned long uvh_nmi_mmrx_req; /* UVH_BIOS_KERNEL_MMR_ALIAS_2 
*/
+static int uvh_nmi_mmrx_req_shift; /* 62 */
+
 /* UV hubless values */
 #define NMI_CONTROL_PORT   0x70
 #define NMI_DUMMY_PORT 0x71
@@ -227,13 +241,43 @@ static inline bool uv_nmi_action_is(const char *action)
 /* Setup which NMI support is present in system */
 static void uv_nmi_setup_mmrs(void)
 {
-   if (uv_read_local_mmr(UVH_NMI_MMRX_SUPPORTED)) {
-   uv_write_local_mmr(UVH_NMI_MMRX_REQ,
-   1UL << UVH_NMI_MMRX_REQ_SHIFT);
-   nmi_mmr = UVH_NMI_MMRX;
-   nmi_mmr_clear = UVH_NMI_MMRX_CLEAR;
-   nmi_mmr_pending = 1UL << UVH_NMI_MMRX_SHIFT;
-   pr_info("UV: SMI NMI support: %s\n", UVH_NMI_MMRX_TYPE);
+   /* First determine arch specific MMRs to handshake with BIOS */
+   if (UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK) {
+   uvh_nmi_mmrx = UVH_EVENT_OCCURRED0;
+   uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED0_ALIAS;
+   uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT;
+   uvh_nmi_mmrx_mask = UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK;
+   uvh_nmi_mmrx_type = "OCRD0-EXTIO_INT0";
+
+   uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;
+   uvh_nmi_mmrx_req = UVH_BIOS_KERNEL_MMR_ALIAS_2;
+   uvh_nmi_mmrx_req_shift = 62;
+
+   } else if (UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK) {
+   uvh_nmi_mmrx = UVH_EVENT_OCCURRED1;
+   uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED1_ALIAS;
+   uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED1_EXTIO_INT0_SHFT;
+   uvh_nmi_mmrx_mask = UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK;
+   uvh_nmi_mmrx_type = "OCRD1-EXTIO_INT0";
+
+   uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;
+   uvh_nmi_mmrx_req = UVH_BIOS_KERNEL_MMR_ALIAS_2;
+   uvh_nmi_mmrx_req_shift = 62;
+
+   } else {
+   pr_err("UV:%s:cannot find EVENT_OCCURRED*_EXTIO_INT0\n",
+   __func__);
+   return;
+   }
+
+   /* Then find out if n

[PATCH v4 11/13] x86/platform/uv: Update UV5 TSC Checking

[Mike Travis]

Update check of BIOS TSC sync status to include both possible "invalid"
states provided by newer UV5 BIOS.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 arch/x86/include/asm/uv/uv_hub.h   |  2 +-
 arch/x86/kernel/apic/x2apic_uv_x.c | 24 ++--
 2 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index ecf5c93e7ae8..07079b59824d 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -726,7 +726,7 @@ extern void uv_nmi_setup_hubless(void);
 #define UVH_TSC_SYNC_SHIFT_UV2K16  /* UV2/3k have different bits */
 #define UVH_TSC_SYNC_MASK  3   /* 0011 */
 #define UVH_TSC_SYNC_VALID 3   /* 0011 */
-#define UVH_TSC_SYNC_INVALID   2   /* 0010 */
+#define UVH_TSC_SYNC_UNKNOWN   0   /*  */
 
 /* BMC sets a bit this MMR non-zero before sending an NMI */
 #define UVH_NMI_MMRUVH_BIOS_KERNEL_MMR
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index c7f5c1a2..9ab4ac4d3ec0 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -197,36 +197,32 @@ static void __init uv_tsc_check_sync(void)
int sync_state;
int mmr_shift;
char *state;
-   bool valid;
 
-   /* Accommodate different UV arch BIOSes */
+   /* Different returns from different UV BIOS versions */
mmr = uv_early_read_mmr(UVH_TSC_SYNC_MMR);
mmr_shift =
is_uv2_hub() ? UVH_TSC_SYNC_SHIFT_UV2K : UVH_TSC_SYNC_SHIFT;
sync_state = (mmr >> mmr_shift) & UVH_TSC_SYNC_MASK;
 
+   /* Check if TSC is valid for all sockets */
switch (sync_state) {
case UVH_TSC_SYNC_VALID:
state = "in sync";
-   valid = true;
+   mark_tsc_async_resets("UV BIOS");
break;
 
-   case UVH_TSC_SYNC_INVALID:
-   state = "unstable";
-   valid = false;
+   /* If BIOS state unknown, don't do anything */
+   case UVH_TSC_SYNC_UNKNOWN:
+   state = "unknown";
break;
+
+   /* Otherwise, BIOS indicates problem with TSC */
default:
-   state = "unknown: assuming valid";
-   valid = true;
+   state = "unstable";
+   mark_tsc_unstable("UV BIOS");
break;
}
pr_info("UV: TSC sync state from BIOS:0%d(%s)\n", sync_state, state);
-
-   /* Mark flag that says TSC != 0 is valid for socket 0 */
-   if (valid)
-   mark_tsc_async_resets("UV BIOS");
-   else
-   mark_tsc_unstable("UV BIOS");
 }
 
 /* Selector for (4|4A|5) structs */
-- 
2.21.0

[PATCH v4 06/13] x86/platform/uv: Add and Decode Arch Type in UVsystab

[Mike Travis]

A patch to add and process the UV Arch Type field in the UVsystab passed
from UV BIOS to the kernel.  This allows the system to be recognized
without relying on the OEM_ID which OEMs want to change.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
Reported-by: kernel test robot 
---
 arch/x86/include/asm/uv/bios.h |  16 +++-
 arch/x86/kernel/apic/x2apic_uv_x.c | 135 +
 arch/x86/platform/uv/bios_uv.c |  27 --
 3 files changed, 148 insertions(+), 30 deletions(-)

diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index 70050d0136c3..97ac595ebc6a 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -5,8 +5,8 @@
 /*
  * UV BIOS layer definitions.
  *
- *  Copyright (c) 2008-2009 Silicon Graphics, Inc.  All Rights Reserved.
- *  Copyright (c) Russ Anderson 
+ * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (c) Russ Anderson 
  */
 
 #include 
@@ -71,6 +71,11 @@ struct uv_gam_range_entry {
u32 limit;  /* PA bits 56:26 (UV_GAM_RANGE_SHFT) */
 };
 
+#defineUV_AT_SIZE  8   /* 7 character arch type + NULL char */
+struct uv_arch_type_entry {
+   chararchtype[UV_AT_SIZE];
+};
+
 #defineUV_SYSTAB_SIG   "UVST"
 #defineUV_SYSTAB_VERSION_1 1   /* UV2/3 BIOS version */
 #defineUV_SYSTAB_VERSION_UV4   0x400   /* UV4 BIOS base 
version */
@@ -79,10 +84,14 @@ struct uv_gam_range_entry {
 #defineUV_SYSTAB_VERSION_UV4_3 0x403   /* - GAM Range PXM 
Value */
 #defineUV_SYSTAB_VERSION_UV4_LATESTUV_SYSTAB_VERSION_UV4_3
 
+#defineUV_SYSTAB_VERSION_UV5   0x500   /* UV5 GAM base version 
*/
+#defineUV_SYSTAB_VERSION_UV5_LATESTUV_SYSTAB_VERSION_UV5
+
 #defineUV_SYSTAB_TYPE_UNUSED   0   /* End of table (offset 
== 0) */
 #defineUV_SYSTAB_TYPE_GAM_PARAMS   1   /* GAM PARAM 
conversions */
 #defineUV_SYSTAB_TYPE_GAM_RNG_TBL  2   /* GAM entry table */
-#defineUV_SYSTAB_TYPE_MAX  3
+#defineUV_SYSTAB_TYPE_ARCH_TYPE3   /* UV arch type */
+#defineUV_SYSTAB_TYPE_MAX  4
 
 /*
  * The UV system table describes specific firmware
@@ -133,6 +142,7 @@ extern s64 uv_bios_reserved_page_pa(u64, u64 *, u64 *, u64 
*);
 extern int uv_bios_set_legacy_vga_target(bool decode, int domain, int bus);
 
 extern int uv_bios_init(void);
+extern unsigned long get_uv_systab_phys(bool msg);
 
 extern unsigned long sn_rtc_cycles_per_second;
 extern int uv_type;
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index fca5f94d055e..9b7a334578e6 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -31,7 +31,8 @@ static u64gru_start_paddr, gru_end_paddr;
 static union uvh_apiciduvh_apicid;
 static int uv_node_id;
 
-/* Unpack OEM/TABLE ID's to be NULL terminated strings */
+/* Unpack AT/OEM/TABLE ID's to be NULL terminated strings */
+static u8 uv_archtype[UV_AT_SIZE];
 static u8 oem_id[ACPI_OEM_ID_SIZE + 1];
 static u8 oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
 
@@ -284,18 +285,102 @@ static void __init uv_stringify(int len, char *to, char 
*from)
strncpy(to, from, len-1);
 }
 
+/* Find UV arch type entry in UVsystab */
+static unsigned long __init early_find_archtype(struct uv_systab *st)
+{
+   int i;
+
+   for (i = 0; st->entry[i].type != UV_SYSTAB_TYPE_UNUSED; i++) {
+   unsigned long ptr = st->entry[i].offset;
+
+   if (!ptr)
+   continue;
+   ptr += (unsigned long)st;
+   if (st->entry[i].type == UV_SYSTAB_TYPE_ARCH_TYPE)
+   return ptr;
+   }
+   return 0;
+}
+
+/* Validate UV arch type field in UVsystab */
+static int __init decode_arch_type(unsigned long ptr)
+{
+   struct uv_arch_type_entry *uv_ate = (struct uv_arch_type_entry *)ptr;
+   int n = strlen(uv_ate->archtype);
+
+   if (n > 0 && n < sizeof(uv_ate->archtype)) {
+   pr_info("UV: UVarchtype received from BIOS\n");
+   uv_stringify(UV_AT_SIZE, uv_archtype, uv_ate->archtype);
+   return 1;
+   }
+   return 0;
+}
+
+/* Determine if UV arch type entry might exist in UVsystab */
+static int __init early_get_arch_type(void)
+{
+   unsigned long uvst_physaddr, uvst_size, ptr;
+   struct uv_systab *st;
+   u32 rev;
+   int ret;
+
+   uvst_physaddr = get_uv_systab_phys(0);
+   if (!uvst_physaddr)
+   return 0;
+
+   st = early_memremap_ro(uvst_physaddr, sizeof(struct uv_systab));
+   if (!st) {
+   pr_err("UV: Cannot access UVsystab, remap failed\n");
+ 

[PATCH v4 10/13] x86/platform/uv: Update Node Present Counting

[Mike Travis]

The changes in the UV5 arch shrunk the NODE PRESENT table to just 2x64
entries (128 total) so are in to 64 bit MMRs instead of a depth of 64
bits in an array.  Adjust references when counting up the nodes present.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 26 +++---
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 9208a84d381a..c7f5c1a2 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1436,20 +1436,32 @@ static int __init decode_uv_systab(void)
 /* Set up physical blade translations from UVH_NODE_PRESENT_TABLE */
 static __init void boot_init_possible_blades(struct uv_hub_info_s *hub_info)
 {
+   unsigned long np;
int i, uv_pb = 0;
 
-   pr_info("UV: NODE_PRESENT_DEPTH = %d\n", UVH_NODE_PRESENT_TABLE_DEPTH);
-   for (i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) {
-   unsigned long np;
-
-   np = uv_read_local_mmr(UVH_NODE_PRESENT_TABLE + i * 8);
-   if (np)
+   if (UVH_NODE_PRESENT_TABLE) {
+   pr_info("UV: NODE_PRESENT_DEPTH = %d\n",
+   UVH_NODE_PRESENT_TABLE_DEPTH);
+   for (i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) {
+   np = uv_read_local_mmr(UVH_NODE_PRESENT_TABLE + i * 8);
pr_info("UV: NODE_PRESENT(%d) = 0x%016lx\n", i, np);
-
+   uv_pb += hweight64(np);
+   }
+   }
+   if (UVH_NODE_PRESENT_0) {
+   np = uv_read_local_mmr(UVH_NODE_PRESENT_0);
+   pr_info("UV: NODE_PRESENT_0 = 0x%016lx\n", np);
+   uv_pb += hweight64(np);
+   }
+   if (UVH_NODE_PRESENT_1) {
+   np = uv_read_local_mmr(UVH_NODE_PRESENT_1);
+   pr_info("UV: NODE_PRESENT_1 = 0x%016lx\n", np);
uv_pb += hweight64(np);
}
if (uv_possible_blades != uv_pb)
uv_possible_blades = uv_pb;
+
+   pr_info("UV: number nodes/possible blades %d\n", uv_pb);
 }
 
 static void __init build_socket_tables(void)
-- 
2.21.0

[PATCH v4 03/13] x86/platform/uv: Adjust references in UV kernel modules

[Mike Travis]

Make a small symbol change (is_uv() ==> is_uv_sys()) to accommodate a
change in the uv_mmrs.h file (is_uv() is the new arch selector function).

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 drivers/misc/sgi-xp/xp.h| 8 
 drivers/misc/sgi-xp/xp_main.c   | 4 ++--
 drivers/misc/sgi-xp/xp_uv.c | 6 --
 drivers/misc/sgi-xp/xpc_main.c  | 6 +++---
 drivers/misc/sgi-xp/xpc_partition.c | 2 +-
 drivers/misc/sgi-xp/xpnet.c | 2 +-
 6 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/misc/sgi-xp/xp.h b/drivers/misc/sgi-xp/xp.h
index 06469b12aced..0af267baf031 100644
--- a/drivers/misc/sgi-xp/xp.h
+++ b/drivers/misc/sgi-xp/xp.h
@@ -17,11 +17,11 @@
 
 #if defined CONFIG_X86_UV || defined CONFIG_IA64_SGI_UV
 #include 
-#define is_uv()is_uv_system()
+#define is_uv_sys()is_uv_system()
 #endif
 
-#ifndef is_uv
-#define is_uv()0
+#ifndef is_uv_sys
+#define is_uv_sys()0
 #endif
 
 #ifdef USE_DBUG_ON
@@ -79,7 +79,7 @@
 
 #define XPC_MSG_SIZE(_payload_size) \
ALIGN(XPC_MSG_HDR_MAX_SIZE + (_payload_size), \
- is_uv() ? 64 : 128)
+ is_uv_sys() ? 64 : 128)
 
 
 /*
diff --git a/drivers/misc/sgi-xp/xp_main.c b/drivers/misc/sgi-xp/xp_main.c
index 61b03fcefb13..33558555820d 100644
--- a/drivers/misc/sgi-xp/xp_main.c
+++ b/drivers/misc/sgi-xp/xp_main.c
@@ -233,7 +233,7 @@ xp_init(void)
for (ch_number = 0; ch_number < XPC_MAX_NCHANNELS; ch_number++)
mutex_init(_registrations[ch_number].mutex);
 
-   if (is_uv())
+   if (is_uv_sys())
ret = xp_init_uv();
else
ret = 0;
@@ -249,7 +249,7 @@ module_init(xp_init);
 static void __exit
 xp_exit(void)
 {
-   if (is_uv())
+   if (is_uv_sys())
xp_exit_uv();
 }
 
diff --git a/drivers/misc/sgi-xp/xp_uv.c b/drivers/misc/sgi-xp/xp_uv.c
index f15a9f2ac1dd..118aef64518d 100644
--- a/drivers/misc/sgi-xp/xp_uv.c
+++ b/drivers/misc/sgi-xp/xp_uv.c
@@ -148,7 +148,9 @@ xp_restrict_memprotect_uv(unsigned long phys_addr, unsigned 
long size)
 enum xp_retval
 xp_init_uv(void)
 {
-   BUG_ON(!is_uv());
+   WARN_ON(!is_uv_sys());
+   if (!is_uv_sys())
+   return xpUnsupported;
 
xp_max_npartitions = XP_MAX_NPARTITIONS_UV;
 #ifdef CONFIG_X86
@@ -168,5 +170,5 @@ xp_init_uv(void)
 void
 xp_exit_uv(void)
 {
-   BUG_ON(!is_uv());
+   WARN_ON(!is_uv_sys());
 }
diff --git a/drivers/misc/sgi-xp/xpc_main.c b/drivers/misc/sgi-xp/xpc_main.c
index 8a495dc82f16..f533ded72941 100644
--- a/drivers/misc/sgi-xp/xpc_main.c
+++ b/drivers/misc/sgi-xp/xpc_main.c
@@ -1043,7 +1043,7 @@ xpc_do_exit(enum xp_retval reason)
 
xpc_teardown_partitions();
 
-   if (is_uv())
+   if (is_uv_sys())
xpc_exit_uv();
 }
 
@@ -1226,7 +1226,7 @@ xpc_init(void)
dev_set_name(xpc_part, "part");
dev_set_name(xpc_chan, "chan");
 
-   if (is_uv()) {
+   if (is_uv_sys()) {
ret = xpc_init_uv();
 
} else {
@@ -1312,7 +1312,7 @@ xpc_init(void)
 
xpc_teardown_partitions();
 out_1:
-   if (is_uv())
+   if (is_uv_sys())
xpc_exit_uv();
return ret;
 }
diff --git a/drivers/misc/sgi-xp/xpc_partition.c 
b/drivers/misc/sgi-xp/xpc_partition.c
index 099a53bdbb7d..c21d48fd65cd 100644
--- a/drivers/misc/sgi-xp/xpc_partition.c
+++ b/drivers/misc/sgi-xp/xpc_partition.c
@@ -433,7 +433,7 @@ xpc_discovery(void)
 */
region_size = xp_region_size;
 
-   if (is_uv())
+   if (is_uv_sys())
max_regions = 256;
else {
max_regions = 64;
diff --git a/drivers/misc/sgi-xp/xpnet.c b/drivers/misc/sgi-xp/xpnet.c
index 837d6c3fe69c..fc5cd83f21f2 100644
--- a/drivers/misc/sgi-xp/xpnet.c
+++ b/drivers/misc/sgi-xp/xpnet.c
@@ -515,7 +515,7 @@ xpnet_init(void)
 {
int result;
 
-   if (!is_uv())
+   if (!is_uv_sys())
return -ENODEV;
 
dev_info(xpnet, "registering network device %s\n", XPNET_DEVICE_NAME);
-- 
2.21.0

[PATCH v4 01/13] x86/platform/uv: Remove UV BAU TLB Shootdown Handler

[Mike Travis]

The Broadcast Assist Unit (BAU) TLB shootdown handler is being rewritten
to become the UV BAU APIC driver.  It is designed to speed up sending
IPI's to selective CPUs within the system.  Remove the current TLB
shutdown handler (tlb_uv.c) file and a couple of kernel hooks in the
interim.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
---
 arch/x86/include/asm/idtentry.h  |4 -
 arch/x86/include/asm/uv/uv.h |4 +-
 arch/x86/include/asm/uv/uv_bau.h |  755 ---
 arch/x86/kernel/idt.c|3 -
 arch/x86/mm/tlb.c|   24 -
 arch/x86/platform/uv/Makefile|2 +-
 arch/x86/platform/uv/tlb_uv.c| 2097 --
 7 files changed, 2 insertions(+), 2887 deletions(-)
 delete mode 100644 arch/x86/include/asm/uv/uv_bau.h
 delete mode 100644 arch/x86/platform/uv/tlb_uv.c

diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h
index a0638640f1ed..df4dc975e8fd 100644
--- a/arch/x86/include/asm/idtentry.h
+++ b/arch/x86/include/asm/idtentry.h
@@ -591,10 +591,6 @@ DECLARE_IDTENTRY_SYSVEC(CALL_FUNCTION_VECTOR,  
sysvec_call_function);
 #endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
-# ifdef CONFIG_X86_UV
-DECLARE_IDTENTRY_SYSVEC(UV_BAU_MESSAGE,
sysvec_uv_bau_message);
-# endif
-
 # ifdef CONFIG_X86_MCE_THRESHOLD
 DECLARE_IDTENTRY_SYSVEC(THRESHOLD_APIC_VECTOR, sysvec_threshold);
 # endif
diff --git a/arch/x86/include/asm/uv/uv.h b/arch/x86/include/asm/uv/uv.h
index e48aea9ba47d..172d3e4a9e4b 100644
--- a/arch/x86/include/asm/uv/uv.h
+++ b/arch/x86/include/asm/uv/uv.h
@@ -35,10 +35,8 @@ extern int is_uv_hubbed(int uvtype);
 extern void uv_cpu_init(void);
 extern void uv_nmi_init(void);
 extern void uv_system_init(void);
-extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
-const struct flush_tlb_info 
*info);
 
-#else  /* X86_UV */
+#else  /* !X86_UV */
 
 static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; }
 static inline bool is_early_uv_system(void){ return 0; }
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
deleted file mode 100644
index cd24804955d7..
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ /dev/null
@@ -1,755 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SGI UV Broadcast Assist Unit definitions
- *
- * Copyright (C) 2008-2011 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_X86_UV_UV_BAU_H
-#define _ASM_X86_UV_UV_BAU_H
-
-#include 
-#include 
-
-#define BITSPERBYTE 8
-
-/*
- * Broadcast Assist Unit messaging structures
- *
- * Selective Broadcast activations are induced by software action
- * specifying a particular 8-descriptor "set" via a 6-bit index written
- * to an MMR.
- * Thus there are 64 unique 512-byte sets of SB descriptors - one set for
- * each 6-bit index value. These descriptor sets are mapped in sequence
- * starting with set 0 located at the address specified in the
- * BAU_SB_DESCRIPTOR_BASE register, set 1 is located at BASE + 512,
- * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on.
- *
- * We will use one set for sending BAU messages from each of the
- * cpu's on the uvhub.
- *
- * TLB shootdown will use the first of the 8 descriptors of each set.
- * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set).
- */
-
-#define MAX_CPUS_PER_UVHUB 128
-#define MAX_CPUS_PER_SOCKET64
-#define ADP_SZ 64 /* hardware-provided max. */
-#define UV_CPUS_PER_AS 32 /* hardware-provided max. */
-#define ITEMS_PER_DESC 8
-/* the 'throttle' to prevent the hardware stay-busy bug */
-#define MAX_BAU_CONCURRENT 3
-#define UV_ACT_STATUS_MASK 0x3
-#define UV_ACT_STATUS_SIZE 2
-#define UV_DISTRIBUTION_SIZE   256
-#define UV_SW_ACK_NPENDING 8
-#define UV_NET_ENDPOINT_INTD   0x28
-#define UV_PAYLOADQ_GNODE_SHIFT49
-#define UV_PTC_BASENAME"sgi_uv/ptc_statistics"
-#define UV_BAU_BASENAME"sgi_uv/bau_tunables"
-#define UV_BAU_TUNABLES_DIR"sgi_uv"
-#define UV_BAU_TUNABLES_FILE   "bau_tunables"
-#define WHITESPACE " \t\n"
-#define cpubit_isset(cpu, bau_local_cpumask) \
-   test_bit((cpu), (bau_local_cpumask).bits)
-
-/* [19:16] SOFT_ACK timeout period  19: 1 is urgency 7  17:16 1 is multiplier 
*/
-/*
- * UV2: Bit 19 selects between
- *  (0): 10 microsecond timebase and
- *  (1): 80 microseconds
- *  we're using 560us
- */
-#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD(15UL)
-/* assuming UV3 is the same */
-
-#def

[PATCH v4 08/13] x86/platform/uv: Adjust GAM MMR references affected by UV5 updates

[Mike Travis]

Make modifications to the GAM MMR mappings to accommodate changes for UV5.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 30 +-
 1 file changed, 25 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index f2c5a03b5cf7..948029576441 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -927,12 +927,32 @@ static __init void map_gru_high(int max_pnode)
 
 static __init void map_mmr_high(int max_pnode)
 {
-   union uvh_rh_gam_mmr_overlay_config_u mmr;
-   int shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT;
+   unsigned long base;
+   int shift;
+   bool enable;
+
+   if (UVH_RH10_GAM_MMR_OVERLAY_CONFIG) {
+   union uvh_rh10_gam_mmr_overlay_config_u mmr;
+
+   mmr.v = uv_read_local_mmr(UVH_RH10_GAM_MMR_OVERLAY_CONFIG);
+   enable = mmr.s.enable;
+   base = mmr.s.base;
+   shift = UVH_RH10_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT;
+   } else if (UVH_RH_GAM_MMR_OVERLAY_CONFIG) {
+   union uvh_rh_gam_mmr_overlay_config_u mmr;
+
+   mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG);
+   enable = mmr.s.enable;
+   base = mmr.s.base;
+   shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT;
+   } else {
+   pr_err("UV:%s:RH_GAM_MMR_OVERLAY_CONFIG MMR undefined?\n",
+   __func__);
+   return;
+   }
 
-   mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG);
-   if (mmr.s.enable)
-   map_high("MMR", mmr.s.base, shift, shift, max_pnode, map_uc);
+   if (enable)
+   map_high("MMR", base, shift, shift, max_pnode, map_uc);
else
pr_info("UV: MMR disabled\n");
 }
-- 
2.21.0

[PATCH v4 00/13] x86/platform/uv: Updates for UV5 Architecture

[Mike Travis]

Changes included in this patch set:

 * Add changes needed for new UV5 UV architecture.  Chief among the
   changes are 52 bits of physical memory address and 57 bits of
   virtual address space.

 * Remove the BAU TLB code cuurently being replaced by BAU APIC driver.

 * Remove System Controller (monitoring) code

 * Updated UV mmrs.h file removing UV1, adding UVY class, optimizing
   the arch selection of the MMR address/field, and trimming down MMR
   selection list reducing number of MMRs being defined.

 * Process UV ArchType in UV BIOS generated UVsystab allowing OEMs to
   use OEM_ID for their own purposes.

 * Update various mapping functions (MMIOH, MMR, GRU) to accommodate
   UV5 differences.

 * Update node present counting for change in MMRs.

 * Update TSC sync check of BIOS sync status.

 * Update NMI handler for UV5 MMR changes.

 * Update copyrights to conform to HPE standards.


This is version 4 with these changes since version 3: 

 * Fixed coding errors reported by kernel test robot 

 - In [PATCH 04/13] x86/platform/uv: Update UV MMRs for UV5
 Remove pnodeid return from early_get_pnodeid() as it was only used by UV1.
 Remove read node_id in uv_init_hub_info() as it was no longer relevant.

 - In [PATCH v3 07/13] x86/platform/uv: Update MMIOH references based on new 
UV5 MMRs.
 Make calc_mmioh_map() a static function.


This is version 3 with these changes since version 2: 

 * Changes made to .gitconfig so no internal (unreachable) systems
   are referenced.


This is version 2 with these changes since version 1: 

 * Added diffstats to p-intro.

 * Updated Copyrights to be in one file and only include the year
   the code was modified.

 * Updated to use git format-patch to construct patch email and 
   git send-email to send the patches.


Mike Travis (13):
  x86/platform/uv: Remove UV BAU TLB Shootdown Handler
  x86/platform/uv: Remove SCIR MMR references for UVY systems.
  x86/platform/uv: Adjust references in UV kernel modules
  x86/platform/uv: Update UV MMRs for UV5
  x86/platform/uv: Add UV5 direct references
  x86/platform/uv: Add and Decode Arch Type in UVsystab
  x86/platform/uv: Update MMIOH references based on new UV5 MMRs.
  x86/platform/uv: Adjust GAM MMR references affected by UV5 updates
  x86/platform/uv: Update UV5 MMR references in UV GRU
  x86/platform/uv: Update Node Present Counting
  x86/platform/uv: Update UV5 TSC Checking
  x86/platform/uv: Update for UV5 NMI MMR changes
  x86/platform/uv: Update Copyrights to conform to HPE standards

 arch/x86/include/asm/idtentry.h |4 -
 arch/x86/include/asm/uv/bios.h  |   17 +-
 arch/x86/include/asm/uv/uv.h|4 +-
 arch/x86/include/asm/uv/uv_bau.h|  755 ---
 arch/x86/include/asm/uv/uv_hub.h|  165 +-
 arch/x86/include/asm/uv/uv_mmrs.h   | 7646 ++-
 arch/x86/kernel/apic/x2apic_uv_x.c  |  822 +--
 arch/x86/kernel/idt.c   |3 -
 arch/x86/mm/tlb.c   |   24 -
 arch/x86/platform/uv/Makefile   |2 +-
 arch/x86/platform/uv/bios_uv.c  |   28 +-
 arch/x86/platform/uv/tlb_uv.c   | 2097 
 arch/x86/platform/uv/uv_nmi.c   |   65 +-
 arch/x86/platform/uv/uv_time.c  |   11 +-
 drivers/misc/sgi-gru/grufile.c  |3 +-
 drivers/misc/sgi-xp/xp.h|9 +-
 drivers/misc/sgi-xp/xp_main.c   |5 +-
 drivers/misc/sgi-xp/xp_uv.c |7 +-
 drivers/misc/sgi-xp/xpc_main.c  |7 +-
 drivers/misc/sgi-xp/xpc_partition.c |3 +-
 drivers/misc/sgi-xp/xpnet.c |3 +-
 21 files changed, 4797 insertions(+), 6883 deletions(-)
 delete mode 100644 arch/x86/include/asm/uv/uv_bau.h
 delete mode 100644 arch/x86/platform/uv/tlb_uv.c

-- 
2.21.0

[PATCH v3 06/13] x86/platform/uv: Add and Decode Arch Type in UVsystab

[Mike Travis]

A patch to add and process the UV Arch Type field in the UVsystab passed
from UV BIOS to the kernel.  This allows the system to be recognized
without relying on the OEM_ID which OEMs want to change.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/include/asm/uv/bios.h |  16 +++-
 arch/x86/kernel/apic/x2apic_uv_x.c | 135 +
 arch/x86/platform/uv/bios_uv.c |  27 --
 3 files changed, 148 insertions(+), 30 deletions(-)

diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index 70050d0136c3..97ac595ebc6a 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -5,8 +5,8 @@
 /*
  * UV BIOS layer definitions.
  *
- *  Copyright (c) 2008-2009 Silicon Graphics, Inc.  All Rights Reserved.
- *  Copyright (c) Russ Anderson 
+ * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (c) Russ Anderson 
  */
 
 #include 
@@ -71,6 +71,11 @@ struct uv_gam_range_entry {
u32 limit;  /* PA bits 56:26 (UV_GAM_RANGE_SHFT) */
 };
 
+#defineUV_AT_SIZE  8   /* 7 character arch type + NULL char */
+struct uv_arch_type_entry {
+   chararchtype[UV_AT_SIZE];
+};
+
 #defineUV_SYSTAB_SIG   "UVST"
 #defineUV_SYSTAB_VERSION_1 1   /* UV2/3 BIOS version */
 #defineUV_SYSTAB_VERSION_UV4   0x400   /* UV4 BIOS base 
version */
@@ -79,10 +84,14 @@ struct uv_gam_range_entry {
 #defineUV_SYSTAB_VERSION_UV4_3 0x403   /* - GAM Range PXM 
Value */
 #defineUV_SYSTAB_VERSION_UV4_LATESTUV_SYSTAB_VERSION_UV4_3
 
+#defineUV_SYSTAB_VERSION_UV5   0x500   /* UV5 GAM base version 
*/
+#defineUV_SYSTAB_VERSION_UV5_LATESTUV_SYSTAB_VERSION_UV5
+
 #defineUV_SYSTAB_TYPE_UNUSED   0   /* End of table (offset 
== 0) */
 #defineUV_SYSTAB_TYPE_GAM_PARAMS   1   /* GAM PARAM 
conversions */
 #defineUV_SYSTAB_TYPE_GAM_RNG_TBL  2   /* GAM entry table */
-#defineUV_SYSTAB_TYPE_MAX  3
+#defineUV_SYSTAB_TYPE_ARCH_TYPE3   /* UV arch type */
+#defineUV_SYSTAB_TYPE_MAX  4
 
 /*
  * The UV system table describes specific firmware
@@ -133,6 +142,7 @@ extern s64 uv_bios_reserved_page_pa(u64, u64 *, u64 *, u64 
*);
 extern int uv_bios_set_legacy_vga_target(bool decode, int domain, int bus);
 
 extern int uv_bios_init(void);
+extern unsigned long get_uv_systab_phys(bool msg);
 
 extern unsigned long sn_rtc_cycles_per_second;
 extern int uv_type;
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 4e055a01cc63..353825a0b327 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -31,7 +31,8 @@ static u64gru_start_paddr, gru_end_paddr;
 static union uvh_apiciduvh_apicid;
 static int uv_node_id;
 
-/* Unpack OEM/TABLE ID's to be NULL terminated strings */
+/* Unpack AT/OEM/TABLE ID's to be NULL terminated strings */
+static u8 uv_archtype[UV_AT_SIZE];
 static u8 oem_id[ACPI_OEM_ID_SIZE + 1];
 static u8 oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
 
@@ -286,20 +287,104 @@ static void __init uv_stringify(int len, char *to, char 
*from)
strncpy(to, from, len-1);
 }
 
+/* Find UV arch type entry in UVsystab */
+static unsigned long __init early_find_archtype(struct uv_systab *st)
+{
+   int i;
+
+   for (i = 0; st->entry[i].type != UV_SYSTAB_TYPE_UNUSED; i++) {
+   unsigned long ptr = st->entry[i].offset;
+
+   if (!ptr)
+   continue;
+   ptr += (unsigned long)st;
+   if (st->entry[i].type == UV_SYSTAB_TYPE_ARCH_TYPE)
+   return ptr;
+   }
+   return 0;
+}
+
+/* Validate UV arch type field in UVsystab */
+static int __init decode_arch_type(unsigned long ptr)
+{
+   struct uv_arch_type_entry *uv_ate = (struct uv_arch_type_entry *)ptr;
+   int n = strlen(uv_ate->archtype);
+
+   if (n > 0 && n < sizeof(uv_ate->archtype)) {
+   pr_info("UV: UVarchtype received from BIOS\n");
+   uv_stringify(UV_AT_SIZE, uv_archtype, uv_ate->archtype);
+   return 1;
+   }
+   return 0;
+}
+
+/* Determine if UV arch type entry might exist in UVsystab */
+static int __init early_get_arch_type(void)
+{
+   unsigned long uvst_physaddr, uvst_size, ptr;
+   struct uv_systab *st;
+   u32 rev;
+   int ret;
+
+   uvst_physaddr = get_uv_systab_phys(0);
+   if (!uvst_physaddr)
+   return 0;
+
+   st = early_memremap_ro(uvst_physaddr, sizeof(struct uv_systab));
+   if (!st) {
+   pr_err("UV: Cannot access UVsystab, remap failed\n");
+   return 0;
+   }
+
+

[PATCH v3 11/13] x86/platform/uv: Update UV5 TSC Checking

[Mike Travis]

Update check of BIOS TSC sync status to include both possible "invalid"
states provided by newer UV5 BIOS.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 arch/x86/include/asm/uv/uv_hub.h   |  2 +-
 arch/x86/kernel/apic/x2apic_uv_x.c | 24 ++--
 2 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index ecf5c93e7ae8..07079b59824d 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -726,7 +726,7 @@ extern void uv_nmi_setup_hubless(void);
 #define UVH_TSC_SYNC_SHIFT_UV2K16  /* UV2/3k have different bits */
 #define UVH_TSC_SYNC_MASK  3   /* 0011 */
 #define UVH_TSC_SYNC_VALID 3   /* 0011 */
-#define UVH_TSC_SYNC_INVALID   2   /* 0010 */
+#define UVH_TSC_SYNC_UNKNOWN   0   /*  */
 
 /* BMC sets a bit this MMR non-zero before sending an NMI */
 #define UVH_NMI_MMRUVH_BIOS_KERNEL_MMR
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 0e40f4866bc3..0c97315bf864 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -199,36 +199,32 @@ static void __init uv_tsc_check_sync(void)
int sync_state;
int mmr_shift;
char *state;
-   bool valid;
 
-   /* Accommodate different UV arch BIOSes */
+   /* Different returns from different UV BIOS versions */
mmr = uv_early_read_mmr(UVH_TSC_SYNC_MMR);
mmr_shift =
is_uv2_hub() ? UVH_TSC_SYNC_SHIFT_UV2K : UVH_TSC_SYNC_SHIFT;
sync_state = (mmr >> mmr_shift) & UVH_TSC_SYNC_MASK;
 
+   /* Check if TSC is valid for all sockets */
switch (sync_state) {
case UVH_TSC_SYNC_VALID:
state = "in sync";
-   valid = true;
+   mark_tsc_async_resets("UV BIOS");
break;
 
-   case UVH_TSC_SYNC_INVALID:
-   state = "unstable";
-   valid = false;
+   /* If BIOS state unknown, don't do anything */
+   case UVH_TSC_SYNC_UNKNOWN:
+   state = "unknown";
break;
+
+   /* Otherwise, BIOS indicates problem with TSC */
default:
-   state = "unknown: assuming valid";
-   valid = true;
+   state = "unstable";
+   mark_tsc_unstable("UV BIOS");
break;
}
pr_info("UV: TSC sync state from BIOS:0%d(%s)\n", sync_state, state);
-
-   /* Mark flag that says TSC != 0 is valid for socket 0 */
-   if (valid)
-   mark_tsc_async_resets("UV BIOS");
-   else
-   mark_tsc_unstable("UV BIOS");
 }
 
 /* Selector for (4|4A|5) structs */
-- 
2.21.0

[PATCH v3 12/13] x86/platform/uv: Update for UV5 NMI MMR changes

[Mike Travis]

The UV NMI MMR addresses and fields moved between UV4 and UV5
necessitating a rewrite of the UV NMI handler.  Adjust references
to accommodate those changes.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/include/asm/uv/uv_hub.h | 13 ---
 arch/x86/platform/uv/uv_nmi.c| 64 +++-
 2 files changed, 54 insertions(+), 23 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 07079b59824d..610bda21a8d9 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -734,19 +734,6 @@ extern void uv_nmi_setup_hubless(void);
 #define UVH_NMI_MMR_SHIFT  63
 #define UVH_NMI_MMR_TYPE   "SCRATCH5"
 
-/* Newer SMM NMI handler, not present in all systems */
-#define UVH_NMI_MMRX   UVH_EVENT_OCCURRED0
-#define UVH_NMI_MMRX_CLEAR UVH_EVENT_OCCURRED0_ALIAS
-#define UVH_NMI_MMRX_SHIFT UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT
-#define UVH_NMI_MMRX_TYPE  "EXTIO_INT0"
-
-/* Non-zero indicates newer SMM NMI handler present */
-#define UVH_NMI_MMRX_SUPPORTED UVH_EXTIO_INT0_BROADCAST
-
-/* Indicates to BIOS that we want to use the newer SMM NMI handler */
-#define UVH_NMI_MMRX_REQ   UVH_BIOS_KERNEL_MMR_ALIAS_2
-#define UVH_NMI_MMRX_REQ_SHIFT 62
-
 struct uv_hub_nmi_s {
raw_spinlock_t  nmi_lock;
atomic_tin_nmi; /* flag this node in UV NMI IRQ */
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index 9d08ff5a755e..eac26feb0461 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -2,8 +2,8 @@
 /*
  * SGI NMI support routines
  *
- *  Copyright (c) 2009-2013 Silicon Graphics, Inc.  All Rights Reserved.
- *  Copyright (c) Mike Travis
+ * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (c) Mike Travis
  */
 
 #include 
@@ -54,6 +54,20 @@ static struct uv_hub_nmi_s **uv_hub_nmi_list;
 
 DEFINE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
 
+/* Newer SMM NMI handler, not present in all systems */
+static unsigned long uvh_nmi_mmrx; /* UVH_EVENT_OCCURRED0/1 */
+static unsigned long uvh_nmi_mmrx_clear;   /* UVH_EVENT_OCCURRED0/1_ALIAS 
*/
+static int uvh_nmi_mmrx_shift; /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_SHFT */
+static int uvh_nmi_mmrx_mask;  /* 
UVH_EVENT_OCCURRED0/1_EXTIO_INT0_MASK */
+static char *uvh_nmi_mmrx_type;/* "EXTIO_INT0" */
+
+/* Non-zero indicates newer SMM NMI handler present */
+static unsigned long uvh_nmi_mmrx_supported;   /* UVH_EXTIO_INT0_BROADCAST */
+
+/* Indicates to BIOS that we want to use the newer SMM NMI handler */
+static unsigned long uvh_nmi_mmrx_req; /* UVH_BIOS_KERNEL_MMR_ALIAS_2 
*/
+static int uvh_nmi_mmrx_req_shift; /* 62 */
+
 /* UV hubless values */
 #define NMI_CONTROL_PORT   0x70
 #define NMI_DUMMY_PORT 0x71
@@ -227,13 +241,43 @@ static inline bool uv_nmi_action_is(const char *action)
 /* Setup which NMI support is present in system */
 static void uv_nmi_setup_mmrs(void)
 {
-   if (uv_read_local_mmr(UVH_NMI_MMRX_SUPPORTED)) {
-   uv_write_local_mmr(UVH_NMI_MMRX_REQ,
-   1UL << UVH_NMI_MMRX_REQ_SHIFT);
-   nmi_mmr = UVH_NMI_MMRX;
-   nmi_mmr_clear = UVH_NMI_MMRX_CLEAR;
-   nmi_mmr_pending = 1UL << UVH_NMI_MMRX_SHIFT;
-   pr_info("UV: SMI NMI support: %s\n", UVH_NMI_MMRX_TYPE);
+   /* First determine arch specific MMRs to handshake with BIOS */
+   if (UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK) {
+   uvh_nmi_mmrx = UVH_EVENT_OCCURRED0;
+   uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED0_ALIAS;
+   uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT;
+   uvh_nmi_mmrx_mask = UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK;
+   uvh_nmi_mmrx_type = "OCRD0-EXTIO_INT0";
+
+   uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;
+   uvh_nmi_mmrx_req = UVH_BIOS_KERNEL_MMR_ALIAS_2;
+   uvh_nmi_mmrx_req_shift = 62;
+
+   } else if (UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK) {
+   uvh_nmi_mmrx = UVH_EVENT_OCCURRED1;
+   uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED1_ALIAS;
+   uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED1_EXTIO_INT0_SHFT;
+   uvh_nmi_mmrx_mask = UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK;
+   uvh_nmi_mmrx_type = "OCRD1-EXTIO_INT0";
+
+   uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;
+   uvh_nmi_mmrx_req = UVH_BIOS_KERNEL_MMR_ALIAS_2;
+   uvh_nmi_mmrx_req_shift = 62;
+
+   } else {
+   pr_err("UV:%s:cannot find EVENT_OCCURRED*_EXTIO_INT0\n",
+   __func__);
+   return;
+   }
+
+   /* Then find out if n

[PATCH v3 03/13] x86/platform/uv: Adjust references in UV kernel modules

[Mike Travis]

Make a small symbol change (is_uv() ==> is_uv_sys()) to accommodate a
change in the uv_mmrs.h file (is_uv() is the new arch selector function).

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 drivers/misc/sgi-xp/xp.h| 8 
 drivers/misc/sgi-xp/xp_main.c   | 4 ++--
 drivers/misc/sgi-xp/xp_uv.c | 6 --
 drivers/misc/sgi-xp/xpc_main.c  | 6 +++---
 drivers/misc/sgi-xp/xpc_partition.c | 2 +-
 drivers/misc/sgi-xp/xpnet.c | 2 +-
 6 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/misc/sgi-xp/xp.h b/drivers/misc/sgi-xp/xp.h
index 06469b12aced..0af267baf031 100644
--- a/drivers/misc/sgi-xp/xp.h
+++ b/drivers/misc/sgi-xp/xp.h
@@ -17,11 +17,11 @@
 
 #if defined CONFIG_X86_UV || defined CONFIG_IA64_SGI_UV
 #include 
-#define is_uv()is_uv_system()
+#define is_uv_sys()is_uv_system()
 #endif
 
-#ifndef is_uv
-#define is_uv()0
+#ifndef is_uv_sys
+#define is_uv_sys()0
 #endif
 
 #ifdef USE_DBUG_ON
@@ -79,7 +79,7 @@
 
 #define XPC_MSG_SIZE(_payload_size) \
ALIGN(XPC_MSG_HDR_MAX_SIZE + (_payload_size), \
- is_uv() ? 64 : 128)
+ is_uv_sys() ? 64 : 128)
 
 
 /*
diff --git a/drivers/misc/sgi-xp/xp_main.c b/drivers/misc/sgi-xp/xp_main.c
index 61b03fcefb13..33558555820d 100644
--- a/drivers/misc/sgi-xp/xp_main.c
+++ b/drivers/misc/sgi-xp/xp_main.c
@@ -233,7 +233,7 @@ xp_init(void)
for (ch_number = 0; ch_number < XPC_MAX_NCHANNELS; ch_number++)
mutex_init(_registrations[ch_number].mutex);
 
-   if (is_uv())
+   if (is_uv_sys())
ret = xp_init_uv();
else
ret = 0;
@@ -249,7 +249,7 @@ module_init(xp_init);
 static void __exit
 xp_exit(void)
 {
-   if (is_uv())
+   if (is_uv_sys())
xp_exit_uv();
 }
 
diff --git a/drivers/misc/sgi-xp/xp_uv.c b/drivers/misc/sgi-xp/xp_uv.c
index f15a9f2ac1dd..118aef64518d 100644
--- a/drivers/misc/sgi-xp/xp_uv.c
+++ b/drivers/misc/sgi-xp/xp_uv.c
@@ -148,7 +148,9 @@ xp_restrict_memprotect_uv(unsigned long phys_addr, unsigned 
long size)
 enum xp_retval
 xp_init_uv(void)
 {
-   BUG_ON(!is_uv());
+   WARN_ON(!is_uv_sys());
+   if (!is_uv_sys())
+   return xpUnsupported;
 
xp_max_npartitions = XP_MAX_NPARTITIONS_UV;
 #ifdef CONFIG_X86
@@ -168,5 +170,5 @@ xp_init_uv(void)
 void
 xp_exit_uv(void)
 {
-   BUG_ON(!is_uv());
+   WARN_ON(!is_uv_sys());
 }
diff --git a/drivers/misc/sgi-xp/xpc_main.c b/drivers/misc/sgi-xp/xpc_main.c
index 8a495dc82f16..f533ded72941 100644
--- a/drivers/misc/sgi-xp/xpc_main.c
+++ b/drivers/misc/sgi-xp/xpc_main.c
@@ -1043,7 +1043,7 @@ xpc_do_exit(enum xp_retval reason)
 
xpc_teardown_partitions();
 
-   if (is_uv())
+   if (is_uv_sys())
xpc_exit_uv();
 }
 
@@ -1226,7 +1226,7 @@ xpc_init(void)
dev_set_name(xpc_part, "part");
dev_set_name(xpc_chan, "chan");
 
-   if (is_uv()) {
+   if (is_uv_sys()) {
ret = xpc_init_uv();
 
} else {
@@ -1312,7 +1312,7 @@ xpc_init(void)
 
xpc_teardown_partitions();
 out_1:
-   if (is_uv())
+   if (is_uv_sys())
xpc_exit_uv();
return ret;
 }
diff --git a/drivers/misc/sgi-xp/xpc_partition.c 
b/drivers/misc/sgi-xp/xpc_partition.c
index 099a53bdbb7d..c21d48fd65cd 100644
--- a/drivers/misc/sgi-xp/xpc_partition.c
+++ b/drivers/misc/sgi-xp/xpc_partition.c
@@ -433,7 +433,7 @@ xpc_discovery(void)
 */
region_size = xp_region_size;
 
-   if (is_uv())
+   if (is_uv_sys())
max_regions = 256;
else {
max_regions = 64;
diff --git a/drivers/misc/sgi-xp/xpnet.c b/drivers/misc/sgi-xp/xpnet.c
index 837d6c3fe69c..fc5cd83f21f2 100644
--- a/drivers/misc/sgi-xp/xpnet.c
+++ b/drivers/misc/sgi-xp/xpnet.c
@@ -515,7 +515,7 @@ xpnet_init(void)
 {
int result;
 
-   if (!is_uv())
+   if (!is_uv_sys())
return -ENODEV;
 
dev_info(xpnet, "registering network device %s\n", XPNET_DEVICE_NAME);
-- 
2.21.0

[PATCH v3 00/13] x86/platform/uv: Updates for UV5 Architecture

[Mike Travis]

Changes included in this patch set:

 * Add changes needed for new UV5 UV architecture.  Chief among the
   changes are 52 bits of physical memory address and 57 bits of
   virtual address space.

 * Remove the BAU TLB code cuurently being replaced by BAU APIC driver.

 * Remove System Controller (monitoring) code

 * Updated UV mmrs.h file removing UV1, adding UVY class, optimizing
   the arch selection of the MMR address/field, and trimming down MMR
   selection list reducing number of MMRs being defined.

 * Process UV ArchType in UV BIOS generated UVsystab allowing OEMs to
   use OEM_ID for their own purposes.

 * Update various mapping functions (MMIOH, MMR, GRU) to accommodate
   UV5 differences.

 * Update node present counting for change in MMRs.

 * Update TSC sync check of BIOS sync status.

 * Update NMI handler for UV5 MMR changes.

 * Update copyrights to conform to HPE standards.


This is version 2 with these changes since version 1: 

 * Added diffstats to p-intro.

 * Updated Copyrights to be in one file and only include the year
   the code was modified.

 * Updated to use git format-patch to construct patch email and 
   git send-email to send the patches.


This is version 3 with these changes since version 2: 

 * Changes made to .gitconfig so no internal (unreachable) systems
   are referenced.


Mike Travis (13):
  x86/platform/uv: Remove UV BAU TLB Shootdown Handler
  x86/platform/uv: Remove SCIR MMR references for UVY systems.
  x86/platform/uv: Adjust references in UV kernel modules
  x86/platform/uv: Update UV MMRs for UV5
  x86/platform/uv: Add UV5 direct references
  x86/platform/uv: Add and Decode Arch Type in UVsystab
  x86/platform/uv: Update MMIOH references based on new UV5 MMRs.
  x86/platform/uv: Adjust GAM MMR references affected by UV5 updates
  x86/platform/uv: Update UV5 MMR references in UV GRU
  x86/platform/uv: Update Node Present Counting
  x86/platform/uv: Update UV5 TSC Checking
  x86/platform/uv: Update for UV5 NMI MMR changes
  x86/platform/uv: Update Copyrights to conform to HPE standards

 arch/x86/include/asm/idtentry.h |4 -
 arch/x86/include/asm/uv/bios.h  |   17 +-
 arch/x86/include/asm/uv/uv.h|4 +-
 arch/x86/include/asm/uv/uv_bau.h|  755 ---
 arch/x86/include/asm/uv/uv_hub.h|  165 +-
 arch/x86/include/asm/uv/uv_mmrs.h   | 7646 ++-
 arch/x86/kernel/apic/x2apic_uv_x.c  |  817 ++-
 arch/x86/kernel/idt.c   |3 -
 arch/x86/mm/tlb.c   |   24 -
 arch/x86/platform/uv/Makefile   |2 +-
 arch/x86/platform/uv/bios_uv.c  |   28 +-
 arch/x86/platform/uv/tlb_uv.c   | 2097 
 arch/x86/platform/uv/uv_nmi.c   |   65 +-
 arch/x86/platform/uv/uv_time.c  |   11 +-
 drivers/misc/sgi-gru/grufile.c  |3 +-
 drivers/misc/sgi-xp/xp.h|9 +-
 drivers/misc/sgi-xp/xp_main.c   |5 +-
 drivers/misc/sgi-xp/xp_uv.c |7 +-
 drivers/misc/sgi-xp/xpc_main.c  |7 +-
 drivers/misc/sgi-xp/xpc_partition.c |3 +-
 drivers/misc/sgi-xp/xpnet.c |3 +-
 21 files changed, 4797 insertions(+), 6878 deletions(-)
 delete mode 100644 arch/x86/include/asm/uv/uv_bau.h
 delete mode 100644 arch/x86/platform/uv/tlb_uv.c

-- 
2.21.0

[PATCH v3 07/13] x86/platform/uv: Update MMIOH references based on new UV5 MMRs.

[Mike Travis]

Make modifications to the MMIOH mappings to accommodate changes for UV5.

Signed-off-by: Mike Travis 
Reviewed-by: Steve Wahl 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 211 +++--
 1 file changed, 143 insertions(+), 68 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 353825a0b327..746a56466066 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -228,6 +228,13 @@ static void __init uv_tsc_check_sync(void)
mark_tsc_unstable("UV BIOS");
 }
 
+/* Selector for (4|4A|5) structs */
+#define uvxy_field(sname, field, undef) (  \
+   is_uv(UV4A) ? sname.s4a.field : \
+   is_uv(UV4) ? sname.s4.field :   \
+   is_uv(UV3) ? sname.s3.field :   \
+   undef)
+
 /* [Copied from arch/x86/kernel/cpu/topology.c:detect_extended_topology()] */
 
 #define SMT_LEVEL  0   /* Leaf 0xb SMT level */
@@ -882,6 +889,7 @@ static __init void get_lowmem_redirect(unsigned long *base, 
unsigned long *size)
 }
 
 enum map_type {map_wb, map_uc};
+static const char * const mt[] = { "WB", "UC" };
 
 static __init void map_high(char *id, unsigned long base, int pshift, int 
bshift, int max_pnode, enum map_type map_type)
 {
@@ -893,11 +901,13 @@ static __init void map_high(char *id, unsigned long base, 
int pshift, int bshift
pr_info("UV: Map %s_HI base address NULL\n", id);
return;
}
-   pr_debug("UV: Map %s_HI 0x%lx - 0x%lx\n", id, paddr, paddr + bytes);
if (map_type == map_uc)
init_extra_mapping_uc(paddr, bytes);
else
init_extra_mapping_wb(paddr, bytes);
+
+   pr_info("UV: Map %s_HI 0x%lx - 0x%lx %s (%d segments)\n",
+   id, paddr, paddr + bytes, mt[map_type], max_pnode + 1);
 }
 
 static __init void map_gru_high(int max_pnode)
@@ -931,52 +941,73 @@ static __init void map_mmr_high(int max_pnode)
pr_info("UV: MMR disabled\n");
 }
 
-/* UV3/4 have identical MMIOH overlay configs, UV4A is slightly different */
-static __init void map_mmioh_high_uv34(int index, int min_pnode, int max_pnode)
-{
-   unsigned long overlay;
-   unsigned long mmr;
-   unsigned long base;
-   unsigned long nasid_mask;
-   unsigned long m_overlay;
-   int i, n, shift, m_io, max_io;
-   int nasid, lnasid, fi, li;
-   char *id;
-
-   if (index == 0) {
-   id = "MMIOH0";
-   m_overlay = UVH_RH_GAM_MMIOH_OVERLAY_CONFIG0;
-   overlay = uv_read_local_mmr(m_overlay);
-   base = overlay & UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK;
+/* Arch specific ENUM cases */
+enum mmioh_arch {
+   UV2_MMIOH = -1,
+   UVY_MMIOH0, UVY_MMIOH1,
+   UVX_MMIOH0, UVX_MMIOH1,
+};
+
+/* Calculate and Map MMIOH Regions */
+void __init calc_mmioh_map(enum mmioh_arch index, int min_pnode, int max_pnode,
+   int shift, unsigned long base, int m_io, int n_io)
+{
+   unsigned long mmr, nasid_mask;
+   int nasid, min_nasid, max_nasid, lnasid, mapped;
+   int i, fi, li, n, max_io;
+   char id[8];
+
+   /* One (UV2) mapping */
+   if (index == UV2_MMIOH) {
+   strncpy(id, "MMIOH", sizeof(id));
+   max_io = max_pnode;
+   mapped = 0;
+   goto map_exit;
+   }
+
+   /* small and large MMIOH mappings */
+   switch (index) {
+   case UVY_MMIOH0:
+   mmr = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG0;
+   nasid_mask = UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK;
+   n = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG0_DEPTH;
+   min_nasid = min_pnode;
+   max_nasid = max_pnode;
+   mapped = 1;
+   break;
+   case UVY_MMIOH1:
+   mmr = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG1;
+   nasid_mask = UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG1_BASE_MASK;
+   n = UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG1_DEPTH;
+   min_nasid = min_pnode;
+   max_nasid = max_pnode;
+   mapped = 1;
+   break;
+   case UVX_MMIOH0:
mmr = UVH_RH_GAM_MMIOH_REDIRECT_CONFIG0;
-   m_io = (overlay & UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_MASK)
-   >> UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_SHFT;
-   shift = UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_SHFT;
+   nasid_mask = UVH_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK;
n = UVH_RH_GAM_MMIOH_REDIRECT_CONFIG0_DEPTH;
-   nasid_mask = UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK;
-   } else {
-   id = "MMIOH1";
-   m_overlay = UVH_RH_GAM_MMIOH_OVERLAY_CONFIG1;
-   overlay = uv_read_local_mmr(m_overlay);
-

[PATCH v3 09/13] x86/platform/uv: Update UV5 MMR references in UV GRU

[Mike Travis]

Make modifications to the GRU mappings to accommodate changes for UV5.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 30 --
 1 file changed, 24 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 9f89c1e82df0..678001ff789d 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -82,6 +82,9 @@ static unsigned long __init uv_early_read_mmr(unsigned long 
addr)
 
 static inline bool is_GRU_range(u64 start, u64 end)
 {
+   if (!gru_start_paddr)
+   return false;
+
return start >= gru_start_paddr && end <= gru_end_paddr;
 }
 
@@ -913,13 +916,24 @@ static __init void map_high(char *id, unsigned long base, 
int pshift, int bshift
 static __init void map_gru_high(int max_pnode)
 {
union uvh_rh_gam_gru_overlay_config_u gru;
-   int shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
-   unsigned long mask = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
-   unsigned long base;
+   unsigned long mask, base;
+   int shift;
+
+   if (UVH_RH_GAM_GRU_OVERLAY_CONFIG) {
+   gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG);
+   shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
+   mask = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
+   } else if (UVH_RH10_GAM_GRU_OVERLAY_CONFIG) {
+   gru.v = uv_read_local_mmr(UVH_RH10_GAM_GRU_OVERLAY_CONFIG);
+   shift = UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
+   mask = UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
+   } else {
+   pr_err("UV: GRU unavailable (no MMR)\n");
+   return;
+   }
 
-   gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG);
if (!gru.s.enable) {
-   pr_info("UV: GRU disabled\n");
+   pr_info("UV: GRU disabled (by BIOS)\n");
return;
}
 
@@ -1293,7 +1307,11 @@ static void __init uv_init_hub_info(struct uv_hub_info_s 
*hi)
/* Show system specific info: */
pr_info("UV: N:%d M:%d m_shift:%d n_lshift:%d\n", hi->n_val, hi->m_val, 
hi->m_shift, hi->n_lshift);
pr_info("UV: gpa_mask/shift:0x%lx/%d pnode_mask:0x%x apic_pns:%d\n", 
hi->gpa_mask, hi->gpa_shift, hi->pnode_mask, hi->apic_pnode_shift);
-   pr_info("UV: mmr_base/shift:0x%lx/%ld gru_base/shift:0x%lx/%ld\n", 
hi->global_mmr_base, hi->global_mmr_shift, hi->global_gru_base, 
hi->global_gru_shift);
+   pr_info("UV: mmr_base/shift:0x%lx/%ld\n", hi->global_mmr_base, 
hi->global_mmr_shift);
+   if (hi->global_gru_base)
+   pr_info("UV: gru_base/shift:0x%lx/%ld\n",
+   hi->global_gru_base, hi->global_gru_shift);
+
pr_info("UV: gnode_upper:0x%lx gnode_extra:0x%x\n", hi->gnode_upper, 
hi->gnode_extra);
 }
 
-- 
2.21.0

[PATCH v3 10/13] x86/platform/uv: Update Node Present Counting

[Mike Travis]

The changes in the UV5 arch shrunk the NODE PRESENT table to just 2x64
entries (128 total) so are in to 64 bit MMRs instead of a depth of 64
bits in an array.  Adjust references when counting up the nodes present.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 26 +++---
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 678001ff789d..0e40f4866bc3 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1441,20 +1441,32 @@ static int __init decode_uv_systab(void)
 /* Set up physical blade translations from UVH_NODE_PRESENT_TABLE */
 static __init void boot_init_possible_blades(struct uv_hub_info_s *hub_info)
 {
+   unsigned long np;
int i, uv_pb = 0;
 
-   pr_info("UV: NODE_PRESENT_DEPTH = %d\n", UVH_NODE_PRESENT_TABLE_DEPTH);
-   for (i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) {
-   unsigned long np;
-
-   np = uv_read_local_mmr(UVH_NODE_PRESENT_TABLE + i * 8);
-   if (np)
+   if (UVH_NODE_PRESENT_TABLE) {
+   pr_info("UV: NODE_PRESENT_DEPTH = %d\n",
+   UVH_NODE_PRESENT_TABLE_DEPTH);
+   for (i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) {
+   np = uv_read_local_mmr(UVH_NODE_PRESENT_TABLE + i * 8);
pr_info("UV: NODE_PRESENT(%d) = 0x%016lx\n", i, np);
-
+   uv_pb += hweight64(np);
+   }
+   }
+   if (UVH_NODE_PRESENT_0) {
+   np = uv_read_local_mmr(UVH_NODE_PRESENT_0);
+   pr_info("UV: NODE_PRESENT_0 = 0x%016lx\n", np);
+   uv_pb += hweight64(np);
+   }
+   if (UVH_NODE_PRESENT_1) {
+   np = uv_read_local_mmr(UVH_NODE_PRESENT_1);
+   pr_info("UV: NODE_PRESENT_1 = 0x%016lx\n", np);
uv_pb += hweight64(np);
}
if (uv_possible_blades != uv_pb)
uv_possible_blades = uv_pb;
+
+   pr_info("UV: number nodes/possible blades %d\n", uv_pb);
 }
 
 static void __init build_socket_tables(void)
-- 
2.21.0

[PATCH v3 08/13] x86/platform/uv: Adjust GAM MMR references affected by UV5 updates

[Mike Travis]

Make modifications to the GAM MMR mappings to accommodate changes for UV5.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 30 +-
 1 file changed, 25 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 746a56466066..9f89c1e82df0 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -931,12 +931,32 @@ static __init void map_gru_high(int max_pnode)
 
 static __init void map_mmr_high(int max_pnode)
 {
-   union uvh_rh_gam_mmr_overlay_config_u mmr;
-   int shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT;
+   unsigned long base;
+   int shift;
+   bool enable;
+
+   if (UVH_RH10_GAM_MMR_OVERLAY_CONFIG) {
+   union uvh_rh10_gam_mmr_overlay_config_u mmr;
+
+   mmr.v = uv_read_local_mmr(UVH_RH10_GAM_MMR_OVERLAY_CONFIG);
+   enable = mmr.s.enable;
+   base = mmr.s.base;
+   shift = UVH_RH10_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT;
+   } else if (UVH_RH_GAM_MMR_OVERLAY_CONFIG) {
+   union uvh_rh_gam_mmr_overlay_config_u mmr;
+
+   mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG);
+   enable = mmr.s.enable;
+   base = mmr.s.base;
+   shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT;
+   } else {
+   pr_err("UV:%s:RH_GAM_MMR_OVERLAY_CONFIG MMR undefined?\n",
+   __func__);
+   return;
+   }
 
-   mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG);
-   if (mmr.s.enable)
-   map_high("MMR", mmr.s.base, shift, shift, max_pnode, map_uc);
+   if (enable)
+   map_high("MMR", base, shift, shift, max_pnode, map_uc);
else
pr_info("UV: MMR disabled\n");
 }
-- 
2.21.0

[PATCH v3 13/13] x86/platform/uv: Update Copyrights to conform to HPE standards

[Mike Travis]

Add Copyrights to those files that have been updated for UV5 changes.

Signed-off-by: Mike Travis 
---
 arch/x86/include/asm/uv/bios.h  | 1 +
 arch/x86/include/asm/uv/uv_hub.h| 1 +
 arch/x86/include/asm/uv/uv_mmrs.h   | 1 +
 arch/x86/kernel/apic/x2apic_uv_x.c  | 1 +
 arch/x86/platform/uv/bios_uv.c  | 1 +
 arch/x86/platform/uv/uv_nmi.c   | 1 +
 arch/x86/platform/uv/uv_time.c  | 1 +
 drivers/misc/sgi-gru/grufile.c  | 1 +
 drivers/misc/sgi-xp/xp.h| 1 +
 drivers/misc/sgi-xp/xp_main.c   | 1 +
 drivers/misc/sgi-xp/xp_uv.c | 1 +
 drivers/misc/sgi-xp/xpc_main.c  | 1 +
 drivers/misc/sgi-xp/xpc_partition.c | 1 +
 drivers/misc/sgi-xp/xpnet.c | 1 +
 14 files changed, 14 insertions(+)

diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index 97ac595ebc6a..08b3d810dfba 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -5,6 +5,7 @@
 /*
  * UV BIOS layer definitions.
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
  * Copyright (c) Russ Anderson 
  */
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 610bda21a8d9..5002f52be332 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -5,6 +5,7 @@
  *
  * SGI UV architectural definitions
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2014 Silicon Graphics, Inc. All rights reserved.
  */
 
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h 
b/arch/x86/include/asm/uv/uv_mmrs.h
index 06ea2d1aaa3e..57fa67373262 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -5,6 +5,7 @@
  *
  * HPE UV MMR definitions
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2016 Silicon Graphics, Inc. All rights reserved.
  */
 
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 0c97315bf864..7c895991389c 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -5,6 +5,7 @@
  *
  * SGI UV APIC functions (note: not an Intel compatible APIC)
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2014 Silicon Graphics, Inc. All rights reserved.
  */
 #include 
diff --git a/arch/x86/platform/uv/bios_uv.c b/arch/x86/platform/uv/bios_uv.c
index b148b4c8c2ec..54511eaccf4d 100644
--- a/arch/x86/platform/uv/bios_uv.c
+++ b/arch/x86/platform/uv/bios_uv.c
@@ -2,6 +2,7 @@
 /*
  * BIOS run time interface routines.
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
  * Copyright (c) Russ Anderson 
  */
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index eac26feb0461..0f5cbcf0da63 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -2,6 +2,7 @@
 /*
  * SGI NMI support routines
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
  * Copyright (c) Mike Travis
  */
diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c
index e94436ba3022..a39e0f394c0e 100644
--- a/arch/x86/platform/uv/uv_time.c
+++ b/arch/x86/platform/uv/uv_time.c
@@ -2,6 +2,7 @@
 /*
  * SGI RTC clock/timer routines.
  *
+ *  (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  *  Copyright (c) 2009-2013 Silicon Graphics, Inc.  All Rights Reserved.
  *  Copyright (c) Dimitri Sivanich
  */
diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c
index 18aa8c877bf8..7ffcfc0bb587 100644
--- a/drivers/misc/sgi-gru/grufile.c
+++ b/drivers/misc/sgi-gru/grufile.c
@@ -7,6 +7,7 @@
  * This file supports the user system call for file open, close, mmap, etc.
  * This also incudes the driver initialization code.
  *
+ *  (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  *  Copyright (c) 2008-2014 Silicon Graphics, Inc.  All Rights Reserved.
  */
 
diff --git a/drivers/misc/sgi-xp/xp.h b/drivers/misc/sgi-xp/xp.h
index 0af267baf031..7d839d844847 100644
--- a/drivers/misc/sgi-xp/xp.h
+++ b/drivers/misc/sgi-xp/xp.h
@@ -3,6 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Copyright (C) 2004-2008 Silicon Graphics, Inc. All rights reserved.
  */
 
diff --git a/drivers/misc/sgi-xp/xp_main.c b/drivers/misc/sgi-xp/xp_main.c
index 33558555820d..049c9aef0559 100644
--- a/drivers/misc/sgi-xp/xp_main.c
+++ b/drivers/misc/sgi-xp/xp_main.c
@@ -3,6 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
  * Cop

[PATCH v3 02/13] x86/platform/uv: Remove SCIR MMR references for UVY systems.

[Mike Travis]

UV class systems no longer use System Controller for monitoring of CPU
activity provided by this driver.  Other methods have been developed
for BIOS and the management controller (BMC).  This patch removes that
supporting code.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
---
 arch/x86/include/asm/uv/uv_hub.h   | 43 ++--
 arch/x86/kernel/apic/x2apic_uv_x.c | 82 --
 2 files changed, 3 insertions(+), 122 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 100d66806503..b21228db75bf 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -129,17 +129,6 @@
  */
 #define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_BLADES * 2)
 
-/* System Controller Interface Reg info */
-struct uv_scir_s {
-   struct timer_list timer;
-   unsigned long   offset;
-   unsigned long   last;
-   unsigned long   idle_on;
-   unsigned long   idle_off;
-   unsigned char   state;
-   unsigned char   enabled;
-};
-
 /* GAM (globally addressed memory) range table */
 struct uv_gam_range_s {
u32 limit;  /* PA bits 56:26 (GAM_RANGE_SHFT) */
@@ -191,16 +180,13 @@ struct uv_hub_info_s {
 struct uv_cpu_info_s {
void*p_uv_hub_info;
unsigned char   blade_cpu_id;
-   struct uv_scir_sscir;
+   void*reserved;
 };
 DECLARE_PER_CPU(struct uv_cpu_info_s, __uv_cpu_info);
 
 #define uv_cpu_infothis_cpu_ptr(&__uv_cpu_info)
 #define uv_cpu_info_per(cpu)   (_cpu(__uv_cpu_info, cpu))
 
-#defineuv_scir_info(_cpu_info->scir)
-#defineuv_cpu_scir_info(cpu)   (_cpu_info_per(cpu)->scir)
-
 /* Node specific hub common info struct */
 extern void **__uv_hub_info_list;
 static inline struct uv_hub_info_s *uv_hub_info_list(int node)
@@ -297,9 +283,9 @@ union uvh_apicid {
 #define UV3_GLOBAL_MMR32_SIZE  (32UL * 1024 * 1024)
 
 #define UV4_LOCAL_MMR_BASE 0xfa00UL
-#define UV4_GLOBAL_MMR32_BASE  0xfc00UL
+#define UV4_GLOBAL_MMR32_BASE  0
 #define UV4_LOCAL_MMR_SIZE (32UL * 1024 * 1024)
-#define UV4_GLOBAL_MMR32_SIZE  (16UL * 1024 * 1024)
+#define UV4_GLOBAL_MMR32_SIZE  0
 
 #define UV_LOCAL_MMR_BASE  (   \
is_uv2_hub() ? UV2_LOCAL_MMR_BASE : \
@@ -772,29 +758,6 @@ DECLARE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
 #defineUV_NMI_STATE_DUMP   2
 #defineUV_NMI_STATE_DUMP_DONE  3
 
-/* Update SCIR state */
-static inline void uv_set_scir_bits(unsigned char value)
-{
-   if (uv_scir_info->state != value) {
-   uv_scir_info->state = value;
-   uv_write_local_mmr8(uv_scir_info->offset, value);
-   }
-}
-
-static inline unsigned long uv_scir_offset(int apicid)
-{
-   return SCIR_LOCAL_MMR_BASE | (apicid & 0x3f);
-}
-
-static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value)
-{
-   if (uv_cpu_scir_info(cpu)->state != value) {
-   uv_write_global_mmr8(uv_cpu_to_pnode(cpu),
-   uv_cpu_scir_info(cpu)->offset, value);
-   uv_cpu_scir_info(cpu)->state = value;
-   }
-}
-
 /*
  * Get the minimum revision number of the hub chips within the partition.
  * (See UVx_HUB_REVISION_BASE above for specific values.)
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c 
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 0b6eea3f54e6..f51fabf56010 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -909,85 +909,6 @@ static __init void uv_rtc_init(void)
}
 }
 
-/*
- * percpu heartbeat timer
- */
-static void uv_heartbeat(struct timer_list *timer)
-{
-   unsigned char bits = uv_scir_info->state;
-
-   /* Flip heartbeat bit: */
-   bits ^= SCIR_CPU_HEARTBEAT;
-
-   /* Is this CPU idle? */
-   if (idle_cpu(raw_smp_processor_id()))
-   bits &= ~SCIR_CPU_ACTIVITY;
-   else
-   bits |= SCIR_CPU_ACTIVITY;
-
-   /* Update system controller interface reg: */
-   uv_set_scir_bits(bits);
-
-   /* Enable next timer period: */
-   mod_timer(timer, jiffies + SCIR_CPU_HB_INTERVAL);
-}
-
-static int uv_heartbeat_enable(unsigned int cpu)
-{
-   while (!uv_cpu_scir_info(cpu)->enabled) {
-   struct timer_list *timer = _cpu_scir_info(cpu)->timer;
-
-   uv_set_cpu_scir_bits(cpu, SCIR_CPU_HEARTBEAT|SCIR_CPU_ACTIVITY);
-   timer_setup(timer, uv_heartbeat, TIMER_PINNED);
-   timer->expires = jiffies + SCIR_CPU_HB_INTERVAL;
-   add_timer_on(timer, cpu);
-   uv_cpu_scir_info(cpu)->enabled = 1;
-
-   /* Also ensure that boot CPU is enabled: */
-   cpu = 0;
-   }
-   re

[PATCH v3 05/13] x86/platform/uv: Add UV5 direct references

[Mike Travis]

Add new references to UV5 (and UVY class) system MMR addresses and
fields primarily caused by the expansion from 46 to 52 bits of
physical memory address.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/include/asm/uv/uv_hub.h   |  49 +-
 arch/x86/kernel/apic/x2apic_uv_x.c | 100 +
 2 files changed, 105 insertions(+), 44 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 76969be09660..ecf5c93e7ae8 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -160,6 +160,7 @@ struct uv_hub_info_s {
unsigned char   gr_table_len;
unsigned char   apic_pnode_shift;
unsigned char   gpa_shift;
+   unsigned char   nasid_shift;
unsigned char   m_shift;
unsigned char   n_lshift;
unsigned intgnode_extra;
@@ -226,6 +227,7 @@ static inline __init void uv_hub_type_set(int uvmask)
 #define UV3_HUB_REVISION_BASE  5
 #define UV4_HUB_REVISION_BASE  7
 #define UV4A_HUB_REVISION_BASE 8   /* UV4 (fixed) rev 2 */
+#define UV5_HUB_REVISION_BASE  9
 
 static inline int is_uv(int uvmask) { return uv_hub_type() & uvmask; }
 static inline int is_uv1_hub(void) { return 0; }
@@ -233,7 +235,7 @@ static inline int is_uv2_hub(void) { return is_uv(UV2); }
 static inline int is_uv3_hub(void) { return is_uv(UV3); }
 static inline int is_uv4a_hub(void) { return is_uv(UV4A); }
 static inline int is_uv4_hub(void) { return is_uv(UV4); }
-static inline int is_uv5_hub(void) { return 0; }
+static inline int is_uv5_hub(void) { return is_uv(UV5); }
 
 /*
  * UV4A is a revision of UV4.  So on UV4A, both is_uv4_hub() and
@@ -246,7 +248,7 @@ static inline int is_uv5_hub(void) { return 0; }
 static inline int is_uvx_hub(void) { return is_uv(UVX); }
 
 /* UVY class: UV5,..? */
-static inline int is_uvy_hub(void) { return 0; }
+static inline int is_uvy_hub(void) { return is_uv(UVY); }
 
 /* Any UV Hubbed System */
 static inline int is_uv_hub(void) { return is_uv(UV_ANY); }
@@ -271,9 +273,11 @@ union uvh_apicid {
  * g -  GNODE (full 15-bit global nasid, right shifted 1)
  * p -  PNODE (local part of nsids, right shifted 1)
  */
-#define UV_NASID_TO_PNODE(n)   (((n) >> 1) & uv_hub_info->pnode_mask)
+#define UV_NASID_TO_PNODE(n)   \
+   (((n) >> uv_hub_info->nasid_shift) & uv_hub_info->pnode_mask)
 #define UV_PNODE_TO_GNODE(p)   ((p) |uv_hub_info->gnode_extra)
-#define UV_PNODE_TO_NASID(p)   (UV_PNODE_TO_GNODE(p) << 1)
+#define UV_PNODE_TO_NASID(p)   \
+   (UV_PNODE_TO_GNODE(p) << uv_hub_info->nasid_shift)
 
 #define UV2_LOCAL_MMR_BASE 0xfa00UL
 #define UV2_GLOBAL_MMR32_BASE  0xfc00UL
@@ -290,25 +294,38 @@ union uvh_apicid {
 #define UV4_LOCAL_MMR_SIZE (32UL * 1024 * 1024)
 #define UV4_GLOBAL_MMR32_SIZE  0
 
+#define UV5_LOCAL_MMR_BASE 0xfa00UL
+#define UV5_GLOBAL_MMR32_BASE  0
+#define UV5_LOCAL_MMR_SIZE (32UL * 1024 * 1024)
+#define UV5_GLOBAL_MMR32_SIZE  0
+
 #define UV_LOCAL_MMR_BASE  (   \
-   is_uv2_hub() ? UV2_LOCAL_MMR_BASE : \
-   is_uv3_hub() ? UV3_LOCAL_MMR_BASE : \
-   /*is_uv4_hub*/ UV4_LOCAL_MMR_BASE)
+   is_uv(UV2) ? UV2_LOCAL_MMR_BASE : \
+   is_uv(UV3) ? UV3_LOCAL_MMR_BASE : \
+   is_uv(UV4) ? UV4_LOCAL_MMR_BASE : \
+   is_uv(UV5) ? UV5_LOCAL_MMR_BASE : \
+   0)
 
 #define UV_GLOBAL_MMR32_BASE   (   \
-   is_uv2_hub() ? UV2_GLOBAL_MMR32_BASE : \
-   is_uv3_hub() ? UV3_GLOBAL_MMR32_BASE : \
-   /*is_uv4_hub*/ UV4_GLOBAL_MMR32_BASE)
+   is_uv(UV2) ? UV2_GLOBAL_MMR32_BASE : \
+   is_uv(UV3) ? UV3_GLOBAL_MMR32_BASE : \
+   is_uv(UV4) ? UV4_GLOBAL_MMR32_BASE : \
+   is_uv(UV5) ? UV5_GLOBAL_MMR32_BASE : \
+   0)
 
 #define UV_LOCAL_MMR_SIZE  (   \
-   is_uv2_hub() ? UV2_LOCAL_MMR_SIZE : \
-   is_uv3_hub() ? UV3_LOCAL_MMR_SIZE : \
-   /*is_uv4_hub*/ UV4_LOCAL_MMR_SIZE)
+   

[PATCH v3 01/13] x86/platform/uv: Remove UV BAU TLB Shootdown Handler

[Mike Travis]

The Broadcast Assist Unit (BAU) TLB shootdown handler is being rewritten
to become the UV BAU APIC driver.  It is designed to speed up sending
IPI's to selective CPUs within the system.  Remove the current TLB
shutdown handler (tlb_uv.c) file and a couple of kernel hooks in the
interim.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
---
 arch/x86/include/asm/idtentry.h  |4 -
 arch/x86/include/asm/uv/uv.h |4 +-
 arch/x86/include/asm/uv/uv_bau.h |  755 ---
 arch/x86/kernel/idt.c|3 -
 arch/x86/mm/tlb.c|   24 -
 arch/x86/platform/uv/Makefile|2 +-
 arch/x86/platform/uv/tlb_uv.c| 2097 --
 7 files changed, 2 insertions(+), 2887 deletions(-)
 delete mode 100644 arch/x86/include/asm/uv/uv_bau.h
 delete mode 100644 arch/x86/platform/uv/tlb_uv.c

diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h
index a43366191212..27485af16008 100644
--- a/arch/x86/include/asm/idtentry.h
+++ b/arch/x86/include/asm/idtentry.h
@@ -591,10 +591,6 @@ DECLARE_IDTENTRY_SYSVEC(CALL_FUNCTION_VECTOR,  
sysvec_call_function);
 #endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
-# ifdef CONFIG_X86_UV
-DECLARE_IDTENTRY_SYSVEC(UV_BAU_MESSAGE,
sysvec_uv_bau_message);
-# endif
-
 # ifdef CONFIG_X86_MCE_THRESHOLD
 DECLARE_IDTENTRY_SYSVEC(THRESHOLD_APIC_VECTOR, sysvec_threshold);
 # endif
diff --git a/arch/x86/include/asm/uv/uv.h b/arch/x86/include/asm/uv/uv.h
index e48aea9ba47d..172d3e4a9e4b 100644
--- a/arch/x86/include/asm/uv/uv.h
+++ b/arch/x86/include/asm/uv/uv.h
@@ -35,10 +35,8 @@ extern int is_uv_hubbed(int uvtype);
 extern void uv_cpu_init(void);
 extern void uv_nmi_init(void);
 extern void uv_system_init(void);
-extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
-const struct flush_tlb_info 
*info);
 
-#else  /* X86_UV */
+#else  /* !X86_UV */
 
 static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; }
 static inline bool is_early_uv_system(void){ return 0; }
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
deleted file mode 100644
index cd24804955d7..
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ /dev/null
@@ -1,755 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SGI UV Broadcast Assist Unit definitions
- *
- * Copyright (C) 2008-2011 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_X86_UV_UV_BAU_H
-#define _ASM_X86_UV_UV_BAU_H
-
-#include 
-#include 
-
-#define BITSPERBYTE 8
-
-/*
- * Broadcast Assist Unit messaging structures
- *
- * Selective Broadcast activations are induced by software action
- * specifying a particular 8-descriptor "set" via a 6-bit index written
- * to an MMR.
- * Thus there are 64 unique 512-byte sets of SB descriptors - one set for
- * each 6-bit index value. These descriptor sets are mapped in sequence
- * starting with set 0 located at the address specified in the
- * BAU_SB_DESCRIPTOR_BASE register, set 1 is located at BASE + 512,
- * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on.
- *
- * We will use one set for sending BAU messages from each of the
- * cpu's on the uvhub.
- *
- * TLB shootdown will use the first of the 8 descriptors of each set.
- * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set).
- */
-
-#define MAX_CPUS_PER_UVHUB 128
-#define MAX_CPUS_PER_SOCKET64
-#define ADP_SZ 64 /* hardware-provided max. */
-#define UV_CPUS_PER_AS 32 /* hardware-provided max. */
-#define ITEMS_PER_DESC 8
-/* the 'throttle' to prevent the hardware stay-busy bug */
-#define MAX_BAU_CONCURRENT 3
-#define UV_ACT_STATUS_MASK 0x3
-#define UV_ACT_STATUS_SIZE 2
-#define UV_DISTRIBUTION_SIZE   256
-#define UV_SW_ACK_NPENDING 8
-#define UV_NET_ENDPOINT_INTD   0x28
-#define UV_PAYLOADQ_GNODE_SHIFT49
-#define UV_PTC_BASENAME"sgi_uv/ptc_statistics"
-#define UV_BAU_BASENAME"sgi_uv/bau_tunables"
-#define UV_BAU_TUNABLES_DIR"sgi_uv"
-#define UV_BAU_TUNABLES_FILE   "bau_tunables"
-#define WHITESPACE " \t\n"
-#define cpubit_isset(cpu, bau_local_cpumask) \
-   test_bit((cpu), (bau_local_cpumask).bits)
-
-/* [19:16] SOFT_ACK timeout period  19: 1 is urgency 7  17:16 1 is multiplier 
*/
-/*
- * UV2: Bit 19 selects between
- *  (0): 10 microsecond timebase and
- *  (1): 80 microseconds
- *  we're using 560us
- */
-#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD(15UL)
-/* assuming UV3 is the same */
-
-#def

Re: [PATCH 04/12] x86/platform/uv: Update UV MMRs for UV5

[Mike Travis]

On 9/8/2020 8:23 AM, Greg KH wrote:

On Mon, Sep 07, 2020 at 01:54:34PM -0500, Mike Travis wrote:

--- linux.orig/drivers/misc/sgi-gru/grufile.c
+++ linux/drivers/misc/sgi-gru/grufile.c
@@ -7,7 +7,8 @@
   * This file supports the user system call for file open, close, mmap, etc.
   * This also incudes the driver initialization code.
   *
- *  Copyright (c) 2008-2014 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2018-2020 Hewlett Packard Enterprise Development LP
+ * Copyright (c) 2008-2017 Silicon Graphics, Inc.  All Rights Reserved.


Please drop all copyright changes from this series, as these do not look
correct at all, sorry.

You can send an add-on patch for all of that if it's really necessary,
and you get legal approval for it :)


I can move them all to a single patch.  The HPE one is straight from 
their guidance on Copyrights.  The older SGI one is also from SGI's 
guidance though I'm not sure if I can find it anymore.  I also wasn't 
sure if it should be retained since the HPE one didn't take effect until 
SGI was legally part of HPE (circa 2018).  2017/18 was also the last 
time we did this big a change (for the UV4A).




thanks,

greg k-h

Re: [PATCH 00/12] x86/platform/uv: Updates for UV5

[Mike Travis]

On 9/8/2020 8:20 AM, Greg KH wrote:

On Mon, Sep 07, 2020 at 01:54:30PM -0500, Mike Travis wrote:

Subject: [PATCH 00/12] x86/platform/uv: Updates for UV5

Add changes needed for new UV5 UV architecture.  Chief among the changes
are 52 bits of physical memory address and 57 bits of virtual address space.

0001 Remove UV BAU TLB Shootdown Handler
 - removes BAU TLB code being replaced by BAU APIC driver

0002 Remove SCIR built in driver
 - removes System Controller (monitoring) code

0003 Update UV kernel modules
 - update loadable UV kernel modules prior to a clash of symbols
   (is_uv) produced by auto-generated UV5 uv_mmrs.h file

0004 Update UV MMRs for UV5
 - update uv_mmrs.h file and fix resultant compiler errors

0005 Add UV5 direct references
 - add references to UV5 specific values

0006 Decode and Use Arch Type in UVsystab
 - add UV ArchType field to UVsystab to remove dependency on OEM_ID

0007 Update MMIOH references
 - display MMIOH mapping for each MMIOH region

0008 Adjust GAM MMR references
 - update GAM mapping for MMR accesses

0009 Update UV GRU references
 - update GRU mapping to include UV5

0010 Update Node Present Counting
 - UV5 changes method of counting nodes present

0011 Update UV5 TSC Checking
 - update TSC sync check of BIOS sync status

0012 Update for UV5 NMI MMR changes
 - update NMI handler



No diffstat?  Did you use 'git format-patch' cover letter for this?


I didn't.  If I could figure out how to convert quilt patches into git 
commits I might be able to do that?  (And I didn't know that diffstats 
were needed on the into?)


Thanks,
Mike



thanks,

greg k-h

Re: [PATCH 00/12] x86/platform/uv: Updates for UV5

[Mike Travis]

On 9/8/2020 8:47 AM, pet...@infradead.org wrote:

On Tue, Sep 08, 2020 at 08:28:16AM -0700, Mike Travis wrote:

I didn't.  If I could figure out how to convert quilt patches into git
commits I might be able to do that?  (And I didn't know that diffstats were
needed on the into?)


$ git quiltimport

Or, for the more enterprising person:

$ quilt series | while read file; do git am $file; done

Generating a diffstat from a quilt series (when applied):

$ quilt diff --combine - | diffstat



Cool, thanks.  I am doing this for the V2 version of the patches.  Most 
will get touched anyways because of the Copyright thing.

Re: [PATCH 04/12] x86/platform/uv: Update UV MMRs for UV5

[Mike Travis]

On 9/8/2020 8:44 AM, Greg KH wrote:

On Tue, Sep 08, 2020 at 08:35:37AM -0700, Mike Travis wrote:



On 9/8/2020 8:23 AM, Greg KH wrote:

On Mon, Sep 07, 2020 at 01:54:34PM -0500, Mike Travis wrote:

--- linux.orig/drivers/misc/sgi-gru/grufile.c
+++ linux/drivers/misc/sgi-gru/grufile.c
@@ -7,7 +7,8 @@
* This file supports the user system call for file open, close, mmap, etc.
* This also incudes the driver initialization code.
*
- *  Copyright (c) 2008-2014 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2018-2020 Hewlett Packard Enterprise Development LP
+ * Copyright (c) 2008-2017 Silicon Graphics, Inc.  All Rights Reserved.


Please drop all copyright changes from this series, as these do not look
correct at all, sorry.

You can send an add-on patch for all of that if it's really necessary,
and you get legal approval for it :)


I can move them all to a single patch.  The HPE one is straight from their
guidance on Copyrights.  The older SGI one is also from SGI's guidance
though I'm not sure if I can find it anymore.  I also wasn't sure if it
should be retained since the HPE one didn't take effect until SGI was
legally part of HPE (circa 2018).  2017/18 was also the last time we did
this big a change (for the UV4A).


If you haven't touched a file in a year, you don't get to claim
copyright on that year.  If you wish to disagree on this, great, I'll
gladly take a patch that modifies the lines that has a signed-off-by
from one of your lawyers for it :)


I skipped over that part.  But I'm moving all changes to a single patch 
and I will look more closely at HPE's documents.  Heaven knows they have 
plenty of lawyers, so many it's hard to ask a simple question... like 
when does a copyright take effect.  When you change it internally, or 
when it gets published?  Sounds like you lean towards the second?


Thanks,
Mike



thanks,

greg k-h

[PATCH 09/12] x86/platform/uv: Update UV5 MMR references in UV GRU

[Mike Travis]

Make modifications to the GRU mappings to accommodate changes for UV5.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 arch/x86/kernel/apic/x2apic_uv_x.c |   30 --
 1 file changed, 24 insertions(+), 6 deletions(-)

--- linux.orig/arch/x86/kernel/apic/x2apic_uv_x.c
+++ linux/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -83,6 +83,9 @@ static unsigned long __init uv_early_rea
 
 static inline bool is_GRU_range(u64 start, u64 end)
 {
+   if (!gru_start_paddr)
+   return false;
+
return start >= gru_start_paddr && end <= gru_end_paddr;
 }
 
@@ -914,13 +917,24 @@ static __init void map_high(char *id, un
 static __init void map_gru_high(int max_pnode)
 {
union uvh_rh_gam_gru_overlay_config_u gru;
-   int shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
-   unsigned long mask = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
-   unsigned long base;
+   unsigned long mask, base;
+   int shift;
+
+   if (UVH_RH_GAM_GRU_OVERLAY_CONFIG) {
+   gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG);
+   shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
+   mask = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
+   } else if (UVH_RH10_GAM_GRU_OVERLAY_CONFIG) {
+   gru.v = uv_read_local_mmr(UVH_RH10_GAM_GRU_OVERLAY_CONFIG);
+   shift = UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
+   mask = UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
+   } else {
+   pr_err("UV: GRU unavailable (no MMR)\n");
+   return;
+   }
 
-   gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG);
if (!gru.s.enable) {
-   pr_info("UV: GRU disabled\n");
+   pr_info("UV: GRU disabled (by BIOS)\n");
return;
}
 
@@ -1289,7 +1303,11 @@ static void __init uv_init_hub_info(stru
/* Show system specific info: */
pr_info("UV: N:%d M:%d m_shift:%d n_lshift:%d\n", hi->n_val, hi->m_val, 
hi->m_shift, hi->n_lshift);
pr_info("UV: gpa_mask/shift:0x%lx/%d pnode_mask:0x%x apic_pns:%d\n", 
hi->gpa_mask, hi->gpa_shift, hi->pnode_mask, hi->apic_pnode_shift);
-   pr_info("UV: mmr_base/shift:0x%lx/%ld gru_base/shift:0x%lx/%ld\n", 
hi->global_mmr_base, hi->global_mmr_shift, hi->global_gru_base, 
hi->global_gru_shift);
+   pr_info("UV: mmr_base/shift:0x%lx/%ld\n", hi->global_mmr_base, 
hi->global_mmr_shift);
+   if (hi->global_gru_base)
+   pr_info("UV: gru_base/shift:0x%lx/%ld\n",
+   hi->global_gru_base, hi->global_gru_shift);
+
pr_info("UV: gnode_upper:0x%lx gnode_extra:0x%x\n", hi->gnode_upper, 
hi->gnode_extra);
 }
 

[PATCH 00/12] x86/platform/uv: Updates for UV5

[Mike Travis]

Subject: [PATCH 00/12] x86/platform/uv: Updates for UV5

Add changes needed for new UV5 UV architecture.  Chief among the changes
are 52 bits of physical memory address and 57 bits of virtual address space.  

0001 Remove UV BAU TLB Shootdown Handler
- removes BAU TLB code being replaced by BAU APIC driver

0002 Remove SCIR built in driver
- removes System Controller (monitoring) code

0003 Update UV kernel modules
- update loadable UV kernel modules prior to a clash of symbols
  (is_uv) produced by auto-generated UV5 uv_mmrs.h file

0004 Update UV MMRs for UV5
- update uv_mmrs.h file and fix resultant compiler errors

0005 Add UV5 direct references
- add references to UV5 specific values

0006 Decode and Use Arch Type in UVsystab
- add UV ArchType field to UVsystab to remove dependency on OEM_ID

0007 Update MMIOH references
- display MMIOH mapping for each MMIOH region

0008 Adjust GAM MMR references
- update GAM mapping for MMR accesses

0009 Update UV GRU references
- update GRU mapping to include UV5

0010 Update Node Present Counting
- UV5 changes method of counting nodes present

0011 Update UV5 TSC Checking
- update TSC sync check of BIOS sync status

0012 Update for UV5 NMI MMR changes
- update NMI handler

[PATCH 03/12] x86/platform/uv: Adjust references in UV kernel modules

[Mike Travis]

There is a symbol clash from the auto-generated uv_mmrs.h file that
clashes with code in the UV kernel modules (is_uv() is the symbol).
Change those prior to the symbol clash so as to not cause a compile error.

Signed-off-by: Mike Travis 
Reviewed-by: Dimitri Sivanich 
Reviewed-by: Steve Wahl 
---
 drivers/misc/sgi-xp/xp.h|   11 ++-
 drivers/misc/sgi-xp/xp_main.c   |7 ---
 drivers/misc/sgi-xp/xp_uv.c |9 ++---
 drivers/misc/sgi-xp/xpc_main.c  |9 +
 drivers/misc/sgi-xp/xpc_partition.c |5 +++--
 drivers/misc/sgi-xp/xpnet.c |5 +++--
 6 files changed, 27 insertions(+), 19 deletions(-)

--- linux.orig/drivers/misc/sgi-xp/xp.h
+++ linux/drivers/misc/sgi-xp/xp.h
@@ -3,7 +3,8 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2004-2008 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (c) 2018-2020 Hewlett Packard Enterprise Development LP
+ * Copyright (c) 2008-2017 Silicon Graphics, Inc.  All Rights Reserved.
  */
 
 /*
@@ -17,11 +18,11 @@
 
 #if defined CONFIG_X86_UV || defined CONFIG_IA64_SGI_UV
 #include 
-#define is_uv()is_uv_system()
+#define is_uv_sys()is_uv_system()
 #endif
 
-#ifndef is_uv
-#define is_uv()0
+#ifndef is_uv_sys
+#define is_uv_sys()0
 #endif
 
 #ifdef USE_DBUG_ON
@@ -79,7 +80,7 @@
 
 #define XPC_MSG_SIZE(_payload_size) \
ALIGN(XPC_MSG_HDR_MAX_SIZE + (_payload_size), \
- is_uv() ? 64 : 128)
+ is_uv_sys() ? 64 : 128)
 
 
 /*
--- linux.orig/drivers/misc/sgi-xp/xp_main.c
+++ linux/drivers/misc/sgi-xp/xp_main.c
@@ -3,7 +3,8 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (c) 2004-2008 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2018-2020 Hewlett Packard Enterprise Development LP
+ * Copyright (c) 2008-2017 Silicon Graphics, Inc.  All Rights Reserved.
  */
 
 /*
@@ -233,7 +234,7 @@ xp_init(void)
for (ch_number = 0; ch_number < XPC_MAX_NCHANNELS; ch_number++)
mutex_init(_registrations[ch_number].mutex);
 
-   if (is_uv())
+   if (is_uv_sys())
ret = xp_init_uv();
else
ret = 0;
@@ -249,7 +250,7 @@ module_init(xp_init);
 void __exit
 xp_exit(void)
 {
-   if (is_uv())
+   if (is_uv_sys())
xp_exit_uv();
 }
 
--- linux.orig/drivers/misc/sgi-xp/xp_uv.c
+++ linux/drivers/misc/sgi-xp/xp_uv.c
@@ -3,7 +3,8 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (c) 2008 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2018-2020 Hewlett Packard Enterprise Development LP
+ * Copyright (c) 2008-2017 Silicon Graphics, Inc.  All Rights Reserved.
  */
 
 /*
@@ -148,7 +149,9 @@ xp_restrict_memprotect_uv(unsigned long
 enum xp_retval
 xp_init_uv(void)
 {
-   BUG_ON(!is_uv());
+   WARN_ON(!is_uv_sys());
+   if (!is_uv_sys())
+   return xpUnsupported;
 
xp_max_npartitions = XP_MAX_NPARTITIONS_UV;
 #ifdef CONFIG_X86
@@ -168,5 +171,5 @@ xp_init_uv(void)
 void
 xp_exit_uv(void)
 {
-   BUG_ON(!is_uv());
+   WARN_ON(!is_uv_sys());
 }
--- linux.orig/drivers/misc/sgi-xp/xpc_main.c
+++ linux/drivers/misc/sgi-xp/xpc_main.c
@@ -3,7 +3,8 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (c) 2004-2009 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2018-2020 Hewlett Packard Enterprise Development LP
+ * Copyright (c) 2008-2017 Silicon Graphics, Inc.  All Rights Reserved.
  */
 
 /*
@@ -1043,7 +1044,7 @@ xpc_do_exit(enum xp_retval reason)
 
xpc_teardown_partitions();
 
-   if (is_uv())
+   if (is_uv_sys())
xpc_exit_uv();
 }
 
@@ -1226,7 +1227,7 @@ xpc_init(void)
dev_set_name(xpc_part, "part");
dev_set_name(xpc_chan, "chan");
 
-   if (is_uv()) {
+   if (is_uv_sys()) {
ret = xpc_init_uv();
 
} else {
@@ -1312,7 +1313,7 @@ out_2:
 
xpc_teardown_partitions();
 out_1:
-   if (is_uv())
+   if (is_uv_sys())
xpc_exit_uv();
return ret;
 }
--- linux.orig/drivers/misc/sgi-xp/xpc_partition.c
+++ linux/drivers/misc/sgi-xp/xpc_partition.c
@@ -3,7 +3,8 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (c) 2004-2008 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2018-2020 Hewlett Packard Enterprise Development LP
+ * Copyright (c) 2008-2017 Silicon Graphics, Inc.  All Rights Reserved.
  */
 
 /*
@@ -433,7 +434,7 @@ xpc_discovery(void)
 */
r