[PATCH] staging: sm750fb: replace roundedDiv with DIV_ROUND_CLOSEST
Replace local implementation of rounded division (roundedDiv macro) with the in-kernel implementation (DIV_ROUND_CLOSEST macro) in ddk750_chip.c Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 3a0afe1..839d673 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -6,8 +6,6 @@ #include "ddk750_chip.h" #include "ddk750_power.h" -/* n / d + 1 / 2 = (2n + d) / 2d */ -#define roundedDiv(num, denom) ((2 * (num) + (denom)) / (2 * (denom))) #define MHz(x) ((x) * 100) logical_chip_type_t sm750_get_chip_type(void) @@ -102,7 +100,7 @@ static void setMemoryClock(unsigned int frequency) frequency = MHz(336); /* Calculate the divisor */ - divisor = roundedDiv(get_mxclk_freq(), frequency); + divisor = DIV_ROUND_CLOSEST(get_mxclk_freq(), frequency); /* Set the corresponding divisor in the register. */ reg = PEEK32(CURRENT_GATE) & ~CURRENT_GATE_M2XCLK_MASK; @@ -152,7 +150,7 @@ static void setMasterClock(unsigned int frequency) frequency = MHz(190); /* Calculate the divisor */ - divisor = roundedDiv(get_mxclk_freq(), frequency); + divisor = DIV_ROUND_CLOSEST(get_mxclk_freq(), frequency); /* Set the corresponding divisor in the register. */ reg = PEEK32(CURRENT_GATE) & ~CURRENT_GATE_MCLK_MASK; -- 2.7.4
Re: [PATCH] staging: sm750fb: rename macro roundedDiv to rounded_div in ddk750_chip.c
On Sun, Oct 02, 2016 at 11:47:47AM +0200, Greg KH wrote: > On Sun, Oct 02, 2016 at 08:48:32AM +0300, Moshe Green wrote: > > Rename CamelCased macro roundedDiv to rounded_div. > > > > This issue was found by checkpatch.pl > > > > Signed-off-by: Moshe Green > > --- > > drivers/staging/sm750fb/ddk750_chip.c | 6 +++--- > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/staging/sm750fb/ddk750_chip.c > > b/drivers/staging/sm750fb/ddk750_chip.c > > index 3a0afe1..e4efe91 100644 > > --- a/drivers/staging/sm750fb/ddk750_chip.c > > +++ b/drivers/staging/sm750fb/ddk750_chip.c > > @@ -7,7 +7,7 @@ > > #include "ddk750_power.h" > > > > /* n / d + 1 / 2 = (2n + d) / 2d */ > > -#define roundedDiv(num, denom) ((2 * (num) + (denom)) / (2 * (denom))) > > +#define rounded_div(num, denom)((2 * (num) + (denom)) / (2 * (denom))) > > Shouldn't you use the in-kernel function for this instead? (I thought briefly of looking for an existing implementation but then chose not to since I wanted to minimize the functional changes in my patches for the time being. Additionally I was wary of using a different implementation for a division operation.) I'll submit a patch that will replace the local implemetaion of rounded division with the in-kernel implementation (I'm assuming you're referring to the DIV_ROUND_CLOSEST macro from include/linux/kernel.h). Thanks Moshe Green
[PATCH] staging: sm750fb: rename macro roundedDiv to rounded_div in ddk750_chip.c
Rename CamelCased macro roundedDiv to rounded_div. This issue was found by checkpatch.pl Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 3a0afe1..e4efe91 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -7,7 +7,7 @@ #include "ddk750_power.h" /* n / d + 1 / 2 = (2n + d) / 2d */ -#define roundedDiv(num, denom) ((2 * (num) + (denom)) / (2 * (denom))) +#define rounded_div(num, denom)((2 * (num) + (denom)) / (2 * (denom))) #define MHz(x) ((x) * 100) logical_chip_type_t sm750_get_chip_type(void) @@ -102,7 +102,7 @@ static void setMemoryClock(unsigned int frequency) frequency = MHz(336); /* Calculate the divisor */ - divisor = roundedDiv(get_mxclk_freq(), frequency); + divisor = rounded_div(get_mxclk_freq(), frequency); /* Set the corresponding divisor in the register. */ reg = PEEK32(CURRENT_GATE) & ~CURRENT_GATE_M2XCLK_MASK; @@ -152,7 +152,7 @@ static void setMasterClock(unsigned int frequency) frequency = MHz(190); /* Calculate the divisor */ - divisor = roundedDiv(get_mxclk_freq(), frequency); + divisor = rounded_div(get_mxclk_freq(), frequency); /* Set the corresponding divisor in the register. */ reg = PEEK32(CURRENT_GATE) & ~CURRENT_GATE_MCLK_MASK; -- 2.7.4
[PATCH] staging: sm750fb: rename getChipType to sm750_get_chip_type
Rename CamelCased function getChipType to sm750_get_chip_type (prefex with sm750 in order to make the context of the function clear). This issue was found by checkpatch.pl Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 16 drivers/staging/sm750fb/ddk750_chip.h | 2 +- drivers/staging/sm750fb/ddk750_mode.c | 4 ++-- drivers/staging/sm750fb/ddk750_power.c | 6 +++--- drivers/staging/sm750fb/ddk750_swi2c.c | 2 +- drivers/staging/sm750fb/sm750_hw.c | 8 6 files changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index a887f32..3a0afe1 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -10,7 +10,7 @@ #define roundedDiv(num, denom) ((2 * (num) + (denom)) / (2 * (denom))) #define MHz(x) ((x) * 100) -logical_chip_type_t getChipType(void) +logical_chip_type_t sm750_get_chip_type(void) { unsigned short physicalID; char physicalRev; @@ -37,7 +37,7 @@ static unsigned int get_mxclk_freq(void) unsigned int pll_reg; unsigned int M, N, OD, POD; - if (getChipType() == SM750LE) + if (sm750_get_chip_type() == SM750LE) return MHz(130); pll_reg = PEEK32(MXCLK_PLL_CTRL); @@ -60,7 +60,7 @@ static void setChipClock(unsigned int frequency) unsigned int ulActualMxClk; /* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */ - if (getChipType() == SM750LE) + if (sm750_get_chip_type() == SM750LE) return; if (frequency) { @@ -90,7 +90,7 @@ static void setMemoryClock(unsigned int frequency) /* Cheok_0509: For SM750LE, the memory clock is fixed. * Nothing to set. */ - if (getChipType() == SM750LE) + if (sm750_get_chip_type() == SM750LE) return; if (frequency) { @@ -141,7 +141,7 @@ static void setMasterClock(unsigned int frequency) /* Cheok_0509: For SM750LE, the memory clock is fixed. * Nothing to set. */ - if (getChipType() == SM750LE) + if (sm750_get_chip_type() == SM750LE) return; if (frequency) { @@ -182,7 +182,7 @@ unsigned int ddk750_getVMSize(void) unsigned int data; /* sm750le only use 64 mb memory*/ - if (getChipType() == SM750LE) + if (sm750_get_chip_type() == SM750LE) return SZ_64M; /* for 750,always use power mode0*/ @@ -221,7 +221,7 @@ int ddk750_initHw(initchip_param_t *pInitParam) reg |= (CURRENT_GATE_DISPLAY | CURRENT_GATE_LOCALMEM); setCurrentGate(reg); - if (getChipType() != SM750LE) { + if (sm750_get_chip_type() != SM750LE) { /* set panel pll and graphic mode via mmio_88 */ reg = PEEK32(VGA_CONFIGURATION); reg |= (VGA_CONFIGURATION_PLL | VGA_CONFIGURATION_MODE); @@ -320,7 +320,7 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) const int max_OD = 3; int max_d = 6; - if (getChipType() == SM750LE) { + if (sm750_get_chip_type() == SM750LE) { /* SM750LE don't have * programmable PLL and M/N values to work on. * Just return the requested clock. diff --git a/drivers/staging/sm750fb/ddk750_chip.h b/drivers/staging/sm750fb/ddk750_chip.h index 0891384..14357fd 100644 --- a/drivers/staging/sm750fb/ddk750_chip.h +++ b/drivers/staging/sm750fb/ddk750_chip.h @@ -69,7 +69,7 @@ typedef struct _initchip_param_t { } initchip_param_t; -logical_chip_type_t getChipType(void); +logical_chip_type_t sm750_get_chip_type(void); unsigned int calcPllValue(unsigned int request, pll_value_t *pll); unsigned int formatPllReg(pll_value_t *pPLL); void ddk750_set_mmio(void __iomem *, unsigned short, char); diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c index e29d4bd..b767c7d 100644 --- a/drivers/staging/sm750fb/ddk750_mode.c +++ b/drivers/staging/sm750fb/ddk750_mode.c @@ -117,7 +117,7 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll) if (pModeParam->horizontal_sync_polarity) tmp |= DISPLAY_CTRL_HSYNC_PHASE; - if (getChipType() == SM750LE) { + if (sm750_get_chip_type() == SM750LE) { displayControlAdjust_SM750LE(pModeParam, tmp); } else { reg = PEEK32(CRT_DISPLAY_CTRL) & @@ -209,7 +209,7 @@ int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock) pll.clockType = clock; uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll); - if (getChipType() == SM750LE) { + if (sm750_get_chip_type() == SM750LE) { /* set graphic mode via IO method */
Re: [PATCH] staging: sm750fb: rename getChipType to get_chip_type
On Fri, Sep 23, 2016 at 02:13:52PM +0200, Greg KH wrote: > On Thu, Sep 22, 2016 at 09:15:45PM +0300, Moshe Green wrote: > > Rename CamelCased function getChipType to get_chip_type. > > This issue was found by checkpatch.pl > > As this is a global function, can you rename it to something like > "sm750_get_chip_type()"? Having a driver-specific function called > get_chip_type() is not good. > > thanks, > > greg k-h Will do. Thanks, Moshe Green
[PATCH] staging: sm750fb: rename getChipType to get_chip_type
Rename CamelCased function getChipType to get_chip_type. This issue was found by checkpatch.pl Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 16 drivers/staging/sm750fb/ddk750_chip.h | 2 +- drivers/staging/sm750fb/ddk750_mode.c | 4 ++-- drivers/staging/sm750fb/ddk750_power.c | 6 +++--- drivers/staging/sm750fb/ddk750_swi2c.c | 2 +- drivers/staging/sm750fb/sm750_hw.c | 8 6 files changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index a887f32..66127c9 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -10,7 +10,7 @@ #define roundedDiv(num, denom) ((2 * (num) + (denom)) / (2 * (denom))) #define MHz(x) ((x) * 100) -logical_chip_type_t getChipType(void) +logical_chip_type_t get_chip_type(void) { unsigned short physicalID; char physicalRev; @@ -37,7 +37,7 @@ static unsigned int get_mxclk_freq(void) unsigned int pll_reg; unsigned int M, N, OD, POD; - if (getChipType() == SM750LE) + if (get_chip_type() == SM750LE) return MHz(130); pll_reg = PEEK32(MXCLK_PLL_CTRL); @@ -60,7 +60,7 @@ static void setChipClock(unsigned int frequency) unsigned int ulActualMxClk; /* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */ - if (getChipType() == SM750LE) + if (get_chip_type() == SM750LE) return; if (frequency) { @@ -90,7 +90,7 @@ static void setMemoryClock(unsigned int frequency) /* Cheok_0509: For SM750LE, the memory clock is fixed. * Nothing to set. */ - if (getChipType() == SM750LE) + if (get_chip_type() == SM750LE) return; if (frequency) { @@ -141,7 +141,7 @@ static void setMasterClock(unsigned int frequency) /* Cheok_0509: For SM750LE, the memory clock is fixed. * Nothing to set. */ - if (getChipType() == SM750LE) + if (get_chip_type() == SM750LE) return; if (frequency) { @@ -182,7 +182,7 @@ unsigned int ddk750_getVMSize(void) unsigned int data; /* sm750le only use 64 mb memory*/ - if (getChipType() == SM750LE) + if (get_chip_type() == SM750LE) return SZ_64M; /* for 750,always use power mode0*/ @@ -221,7 +221,7 @@ int ddk750_initHw(initchip_param_t *pInitParam) reg |= (CURRENT_GATE_DISPLAY | CURRENT_GATE_LOCALMEM); setCurrentGate(reg); - if (getChipType() != SM750LE) { + if (get_chip_type() != SM750LE) { /* set panel pll and graphic mode via mmio_88 */ reg = PEEK32(VGA_CONFIGURATION); reg |= (VGA_CONFIGURATION_PLL | VGA_CONFIGURATION_MODE); @@ -320,7 +320,7 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) const int max_OD = 3; int max_d = 6; - if (getChipType() == SM750LE) { + if (get_chip_type() == SM750LE) { /* SM750LE don't have * programmable PLL and M/N values to work on. * Just return the requested clock. diff --git a/drivers/staging/sm750fb/ddk750_chip.h b/drivers/staging/sm750fb/ddk750_chip.h index 0891384..3429be6 100644 --- a/drivers/staging/sm750fb/ddk750_chip.h +++ b/drivers/staging/sm750fb/ddk750_chip.h @@ -69,7 +69,7 @@ typedef struct _initchip_param_t { } initchip_param_t; -logical_chip_type_t getChipType(void); +logical_chip_type_t get_chip_type(void); unsigned int calcPllValue(unsigned int request, pll_value_t *pll); unsigned int formatPllReg(pll_value_t *pPLL); void ddk750_set_mmio(void __iomem *, unsigned short, char); diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c index e29d4bd..9e629a5 100644 --- a/drivers/staging/sm750fb/ddk750_mode.c +++ b/drivers/staging/sm750fb/ddk750_mode.c @@ -117,7 +117,7 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll) if (pModeParam->horizontal_sync_polarity) tmp |= DISPLAY_CTRL_HSYNC_PHASE; - if (getChipType() == SM750LE) { + if (get_chip_type() == SM750LE) { displayControlAdjust_SM750LE(pModeParam, tmp); } else { reg = PEEK32(CRT_DISPLAY_CTRL) & @@ -209,7 +209,7 @@ int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock) pll.clockType = clock; uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll); - if (getChipType() == SM750LE) { + if (get_chip_type() == SM750LE) { /* set graphic mode via IO method */ outb_p(0x88, 0x3d4); outb_p(0x06, 0x3d5); diff --git a/drivers/staging/sm750fb/ddk750_power.c b/drivers/staging/sm750fb/d
[PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c
Fix the following warning types: - line length - block comment line * prefix - trailing */ on a separate line found by the checkpatch.pl tool in multiple block comments. Fix a single spelling error in a comment. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 49 +++ 1 file changed, 27 insertions(+), 22 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 7cba1ab..f557b6d 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -145,8 +145,9 @@ static void setMasterClock(unsigned int frequency) return; if (frequency) { - /* Set the frequency to the maximum frequency that the SM750 engine can - run, which is about 190 MHz. */ + /* Set the frequency to the maximum frequency +* that the SM750 engine can run, which is about 190 MHz. +*/ if (frequency > MHz(190)) frequency = MHz(190); @@ -243,9 +244,10 @@ int ddk750_initHw(initchip_param_t *pInitParam) setMasterClock(MHz(pInitParam->masterClock)); - /* Reset the memory controller. If the memory controller is not reset in SM750, - the system might hang when sw accesses the memory. - The memory should be resetted after changing the MXCLK. + /* Reset the memory controller. +* If the memory controller is not reset in SM750, +* the system might hang when sw accesses the memory. +* The memory should be resetted after changing the MXCLK. */ if (pInitParam->resetMemory == 1) { reg = PEEK32(MISC_CTRL); @@ -289,21 +291,22 @@ int ddk750_initHw(initchip_param_t *pInitParam) } /* - monk liu @ 4/6/2011: - re-write the calculatePLL function of ddk750. - the original version function does not use some mathematics tricks and shortcut - when it doing the calculation of the best N,M,D combination - I think this version gives a little upgrade in speed - - 750 pll clock formular: - Request Clock = (Input Clock * M )/(N * X) - - Input Clock = 14318181 hz - X = 2 power D - D ={0,1,2,3,4,5,6} - M = {1,...,255} - N = {2,...,15} -*/ + * monk liu @ 4/6/2011: + * re-write the calculatePLL function of ddk750. + * the original version function does not use + * some mathematics tricks and shortcut + * when it doing the calculation of the best N,M,D combination + * I think this version gives a little upgrade in speed + * + * 750 pll clock formular: + * Request Clock = (Input Clock * M )/(N * X) + * + * Input Clock = 14318181 hz + * X = 2 power D + * D ={0,1,2,3,4,5,6} + * M = {1,...,255} + * N = {2,...,15} + */ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) { /* as sm750 register definition, @@ -318,8 +321,10 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) int max_d = 6; if (getChipType() == SM750LE) { - /* SM750LE don't have prgrammable PLL and M/N values to work on. - Just return the requested clock. */ + /* SM750LE don't have +* programmable PLL and M/N values to work on. +* Just return the requested clock. +*/ return request_orig; } -- 2.7.4
[PATCH 1/2] staging: sm750fb: fix line length coding style issues in ddk750_chip.c
Fix multiple line length warnings found by the checkpatch.pl tool in ddk750_chip.c. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 23 +++ 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index c1356bb..7cba1ab 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -71,9 +71,10 @@ static void setChipClock(unsigned int frequency) pll.clockType = MXCLK_PLL; /* - * Call calcPllValue() to fill up the other fields for PLL structure. - * Sometime, the chip cannot set up the exact clock required by User. - * Return value from calcPllValue() gives the actual possible clock. + * Call calcPllValue() to fill the other fields of PLL structure. + * Sometime, the chip cannot set up the exact clock + * required by the User. + * Return value of calcPllValue gives the actual possible clock. */ ulActualMxClk = calcPllValue(frequency, &pll); @@ -94,8 +95,8 @@ static void setMemoryClock(unsigned int frequency) if (frequency) { /* -* Set the frequency to the maximum frequency that the DDR Memory can take -* which is 336MHz. +* Set the frequency to the maximum frequency +* that the DDR Memory can take which is 336MHz. */ if (frequency > MHz(336)) frequency = MHz(336); @@ -305,7 +306,9 @@ int ddk750_initHw(initchip_param_t *pInitParam) */ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) { - /* as sm750 register definition, N located in 2,15 and M located in 1,255 */ + /* as sm750 register definition, +* N located in 2,15 and M located in 1,255 +*/ int N, M, X, d; int mini_diff; unsigned int RN, quo, rem, fl_quo; @@ -325,12 +328,16 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) request = request_orig / 1000; input = pll->inputFreq / 1000; - /* for MXCLK register , no POD provided, so need be treated differently */ + /* for MXCLK register, +* no POD provided, so need be treated differently +*/ if (pll->clockType == MXCLK_PLL) max_d = 3; for (N = 15; N > 1; N--) { - /* RN will not exceed maximum long if @request <= 285 MHZ (for 32bit cpu) */ + /* RN will not exceed maximum long +* if @request <= 285 MHZ (for 32bit cpu) +*/ RN = N * request; quo = RN / input; rem = RN % input;/* rem always small than 14318181 */ -- 2.7.4
Re: [PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c
On Mon, Sep 12, 2016 at 01:17:25PM +0200, Greg KH wrote: > On Sun, Sep 04, 2016 at 09:04:10PM +0300, Moshe Green wrote: > > Fix the following warning types: > > - line length > > - block comment line * prefix > > - trailing */ on a separate line > > found by the checkpatch.pl tool in multiple block comments. > > > > Fix a single spelling error in a comment. > > > > Signed-off-by: Moshe Green > > --- > > drivers/staging/sm750fb/ddk750_chip.c | 49 > > +++ > > 1 file changed, 27 insertions(+), 22 deletions(-) > > As I didn't take the first patch, this one didn't apply :( > > Please resend when you send the first one again. > > thanks, > > greg k-h Will do. Thanks Moshe Green
Re: [PATCH 1/2] staging: sm750fb: fix line length coding style issues in ddk750_chip.c
On Mon, Sep 12, 2016 at 01:16:35PM +0200, Greg KH wrote: > On Sun, Sep 04, 2016 at 09:03:27PM +0300, Moshe Green wrote: > > Fix multiple line length warnings found by the checkpatch.pl tool > > in ddk750_chip.c. > > > > Signed-off-by: Moshe Green > > --- > > drivers/staging/sm750fb/ddk750_chip.c | 18 -- > > 1 file changed, 12 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/staging/sm750fb/ddk750_chip.c > > b/drivers/staging/sm750fb/ddk750_chip.c > > index c1356bb..76aaeaa 100644 > > --- a/drivers/staging/sm750fb/ddk750_chip.c > > +++ b/drivers/staging/sm750fb/ddk750_chip.c > > @@ -71,7 +71,7 @@ static void setChipClock(unsigned int frequency) > > pll.clockType = MXCLK_PLL; > > > > /* > > - * Call calcPllValue() to fill up the other fields for PLL > > structure. > > + * Call calcPllValue() to fill the other fields of PLL structure. > > * Sometime, the chip cannot set up the exact clock required by > > User. > > * Return value from calcPllValue() gives the actual possible > > clock. > > You only changed one sentance here, please fix the whole block. > > thanks, > > greg k-h Will do. Thanks
[PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c
Fix the following warning types: - line length - block comment line * prefix - trailing */ on a separate line found by the checkpatch.pl tool in multiple block comments. Fix a single spelling error in a comment. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 49 +++ 1 file changed, 27 insertions(+), 22 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 76aaeaa..09fda26 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -144,8 +144,9 @@ static void setMasterClock(unsigned int frequency) return; if (frequency) { - /* Set the frequency to the maximum frequency that the SM750 engine can - run, which is about 190 MHz. */ + /* Set the frequency to the maximum frequency +* that the SM750 engine can run, which is about 190 MHz. +*/ if (frequency > MHz(190)) frequency = MHz(190); @@ -242,9 +243,10 @@ int ddk750_initHw(initchip_param_t *pInitParam) setMasterClock(MHz(pInitParam->masterClock)); - /* Reset the memory controller. If the memory controller is not reset in SM750, - the system might hang when sw accesses the memory. - The memory should be resetted after changing the MXCLK. + /* Reset the memory controller. +* If the memory controller is not reset in SM750, +* the system might hang when sw accesses the memory. +* The memory should be resetted after changing the MXCLK. */ if (pInitParam->resetMemory == 1) { reg = PEEK32(MISC_CTRL); @@ -288,21 +290,22 @@ int ddk750_initHw(initchip_param_t *pInitParam) } /* - monk liu @ 4/6/2011: - re-write the calculatePLL function of ddk750. - the original version function does not use some mathematics tricks and shortcut - when it doing the calculation of the best N,M,D combination - I think this version gives a little upgrade in speed - - 750 pll clock formular: - Request Clock = (Input Clock * M )/(N * X) - - Input Clock = 14318181 hz - X = 2 power D - D ={0,1,2,3,4,5,6} - M = {1,...,255} - N = {2,...,15} -*/ + * monk liu @ 4/6/2011: + * re-write the calculatePLL function of ddk750. + * the original version function does not use + * some mathematics tricks and shortcut + * when it doing the calculation of the best N,M,D combination + * I think this version gives a little upgrade in speed + * + * 750 pll clock formular: + * Request Clock = (Input Clock * M )/(N * X) + * + * Input Clock = 14318181 hz + * X = 2 power D + * D ={0,1,2,3,4,5,6} + * M = {1,...,255} + * N = {2,...,15} + */ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) { /* as sm750 register definition, @@ -317,8 +320,10 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) int max_d = 6; if (getChipType() == SM750LE) { - /* SM750LE don't have prgrammable PLL and M/N values to work on. - Just return the requested clock. */ + /* SM750LE don't have +* programmable PLL and M/N values to work on. +* Just return the requested clock. +*/ return request_orig; } -- 2.7.4
[PATCH 1/2] staging: sm750fb: fix line length coding style issues in ddk750_chip.c
Fix multiple line length warnings found by the checkpatch.pl tool in ddk750_chip.c. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index c1356bb..76aaeaa 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -71,7 +71,7 @@ static void setChipClock(unsigned int frequency) pll.clockType = MXCLK_PLL; /* - * Call calcPllValue() to fill up the other fields for PLL structure. + * Call calcPllValue() to fill the other fields of PLL structure. * Sometime, the chip cannot set up the exact clock required by User. * Return value from calcPllValue() gives the actual possible clock. */ @@ -94,8 +94,8 @@ static void setMemoryClock(unsigned int frequency) if (frequency) { /* -* Set the frequency to the maximum frequency that the DDR Memory can take -* which is 336MHz. +* Set the frequency to the maximum frequency +* that the DDR Memory can take which is 336MHz. */ if (frequency > MHz(336)) frequency = MHz(336); @@ -305,7 +305,9 @@ int ddk750_initHw(initchip_param_t *pInitParam) */ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) { - /* as sm750 register definition, N located in 2,15 and M located in 1,255 */ + /* as sm750 register definition, +* N located in 2,15 and M located in 1,255 +*/ int N, M, X, d; int mini_diff; unsigned int RN, quo, rem, fl_quo; @@ -325,12 +327,16 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) request = request_orig / 1000; input = pll->inputFreq / 1000; - /* for MXCLK register , no POD provided, so need be treated differently */ + /* for MXCLK register, +* no POD provided, so need be treated differently +*/ if (pll->clockType == MXCLK_PLL) max_d = 3; for (N = 15; N > 1; N--) { - /* RN will not exceed maximum long if @request <= 285 MHZ (for 32bit cpu) */ + /* RN will not exceed maximum long +* if @request <= 285 MHZ (for 32bit cpu) +*/ RN = N * request; quo = RN / input; rem = RN % input;/* rem always small than 14318181 */ -- 2.7.4
Re: [PATCH 1/9] staging: sm750fb: fix line length coding style issue in ddk750_chip.c
On Fri, Sep 02, 2016 at 01:35:08PM +0200, Greg KH wrote: > > A: Because it messes up the order in which people normally read text. > Q: Why is top-posting such a bad thing? > A: Top-posting. > Q: What is the most annoying thing in e-mail? > > A: No. > Q: Should I include quotations after my reply? > > > http://daringfireball.net/2007/07/on_top > > On Fri, Sep 02, 2016 at 11:28:51AM +0300, moshe green wrote: > > There were (mostly) two kinds of warnings that I've handled, "80 > > character line length" and block comments structure. > > Some of the changes involve handling two separate warnings in a single > > comment. > > Where this occurs, should I break down the change into two steps - > > fixing a warning at a time? > > Or should I fix both warnings in the same commit - and place the > > commit in the most appropriate patch? > > Hm, use your best judgement here, what would you want to be on the > receiving end of if you had to review such a patch series? > > thanks, > > greg k-h Will do. thanks, Moshe Green
Re: [PATCH 1/9] staging: sm750fb: fix line length coding style issue in ddk750_chip.c
There were (mostly) two kinds of warnings that I've handled, "80 character line length" and block comments structure. Some of the changes involve handling two separate warnings in a single comment. Where this occurs, should I break down the change into two steps - fixing a warning at a time? Or should I fix both warnings in the same commit - and place the commit in the most appropriate patch? thanks Moshe Green On 1 September 2016 at 19:04, Greg KH wrote: > On Tue, Aug 30, 2016 at 10:04:02PM +0300, Moshe Green wrote: >> Fix a line length warning found by the checkpatch.pl tool in >> ddk750_chip.c. >> >> Signed-off-by: Moshe Green >> --- >> drivers/staging/sm750fb/ddk750_chip.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) > > Lots of the patches in this series have the same exact subject: line, > yet they do different things. Please fix them up and make them more > obvious, or even better yet, merge them into less patches (one type of > thing per file per patch, not one single change per patch). > > thanks, > > greg k-h
Re: [PATCH 7/9] staging: sm750fb: fix block comment style issues in ddk750_chip.c
Will do. Thanks On 30 August 2016 at 22:19, Joe Perches wrote: > On Tue, 2016-08-30 at 22:05 +0300, Moshe Green wrote: >> Fix block comment * prefix and trailing */ warnings found >> by the checkpatch.pl tool in ddk750_chip.c. > [] >> diff --git a/drivers/staging/sm750fb/ddk750_chip.c >> b/drivers/staging/sm750fb/ddk750_chip.c > [] >> @@ -320,8 +320,10 @@ unsigned int calcPllValue(unsigned int request_orig, >> pll_value_t *pll) >> int max_d = 6; >> >> if (getChipType() == SM750LE) { >> - /* SM750LE don't have prgrammable PLL and M/N values to work >> on. >> - Just return the requested clock. */ >> + /* SM750LE don't have >> + * prgrammable PLL and M/N values to work on > > Might as well fix the programmable typo too. >
[PATCH 5/9] staging: sm750fb: fix coding style issues in ddk750_chip.c
Fix line length and block comment * prefix warnings found by the checkpatch.pl tool in ddk750_chip.c. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 31 --- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index f15800a..13f8a36 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -290,21 +290,22 @@ int ddk750_initHw(initchip_param_t *pInitParam) } /* - monk liu @ 4/6/2011: - re-write the calculatePLL function of ddk750. - the original version function does not use some mathematics tricks and shortcut - when it doing the calculation of the best N,M,D combination - I think this version gives a little upgrade in speed - - 750 pll clock formular: - Request Clock = (Input Clock * M )/(N * X) - - Input Clock = 14318181 hz - X = 2 power D - D ={0,1,2,3,4,5,6} - M = {1,...,255} - N = {2,...,15} -*/ + * monk liu @ 4/6/2011: + * re-write the calculatePLL function of ddk750. + * the original version function does not use + * some mathematics tricks and shortcut when it doing + * the calculation of the best N,M,D combination + * I think this version gives a little upgrade in speed + * + * 750 pll clock formular: + * Request Clock = (Input Clock * M )/(N * X) + * + * Input Clock = 14318181 hz + * X = 2 power D + * D ={0,1,2,3,4,5,6} + * M = {1,...,255} + * N = {2,...,15} + */ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) { /* as sm750 register definition, N located in 2,15 and M located in 1,255 */ -- 2.7.4
[PATCH 6/9] staging: sm750fb: fix line length coding style issue in ddk750_chip.c
Fix a line length warning found by the checkpatch.pl tool in ddk750_chip.c. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 13f8a36..5e954ea 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -308,7 +308,9 @@ int ddk750_initHw(initchip_param_t *pInitParam) */ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) { - /* as sm750 register definition, N located in 2,15 and M located in 1,255 */ + /* as sm750 register definition, +* N located in 2,15 and M located in 1,255 +*/ int N, M, X, d; int mini_diff; unsigned int RN, quo, rem, fl_quo; -- 2.7.4
[PATCH 9/9] staging: sm750fb: fix line length coding style issue in ddk750_chip.c
Fix a line length warning found by the checkpatch.pl tool in ddk750_chip.c. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 07c2537..0049e5d 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -339,7 +339,9 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) max_d = 3; for (N = 15; N > 1; N--) { - /* RN will not exceed maximum long if @request <= 285 MHZ (for 32bit cpu) */ + /* RN will not exceed maximum long +* if @request <= 285 MHZ (for 32bit cpu) +*/ RN = N * request; quo = RN / input; rem = RN % input;/* rem always small than 14318181 */ -- 2.7.4
[PATCH 4/9] staging: sm750fb: fix coding style issues in ddk750_chip.c
Fix line length and block comment * prefix warnings found by the checkpatch.pl tool in ddk750_chip.c. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 577a279..f15800a 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -243,9 +243,10 @@ int ddk750_initHw(initchip_param_t *pInitParam) setMasterClock(MHz(pInitParam->masterClock)); - /* Reset the memory controller. If the memory controller is not reset in SM750, - the system might hang when sw accesses the memory. - The memory should be resetted after changing the MXCLK. + /* Reset the memory controller. +* If the memory controller is not reset in SM750, +* the system might hang when sw accesses the memory. +* The memory should be resetted after changing the MXCLK. */ if (pInitParam->resetMemory == 1) { reg = PEEK32(MISC_CTRL); -- 2.7.4
[PATCH 7/9] staging: sm750fb: fix block comment style issues in ddk750_chip.c
Fix block comment * prefix and trailing */ warnings found by the checkpatch.pl tool in ddk750_chip.c. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 5e954ea..c59fe22 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -320,8 +320,10 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) int max_d = 6; if (getChipType() == SM750LE) { - /* SM750LE don't have prgrammable PLL and M/N values to work on. - Just return the requested clock. */ + /* SM750LE don't have +* prgrammable PLL and M/N values to work on. +* Just return the requested clock. +*/ return request_orig; } -- 2.7.4
[PATCH 8/9] staging: sm750fb: fix line length coding style issue in ddk750_chip.c
Fix a line length warning found by the checkpatch.pl tool in ddk750_chip.c. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index c59fe22..07c2537 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -332,7 +332,9 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) request = request_orig / 1000; input = pll->inputFreq / 1000; - /* for MXCLK register , no POD provided, so need be treated differently */ + /* for MXCLK register, +* no POD provided, so need be treated differently. +*/ if (pll->clockType == MXCLK_PLL) max_d = 3; -- 2.7.4
[PATCH 2/9] staging: sm750fb: fix line length coding style issue in ddk750_chip.c
Fix a line length warning found by the checkpatch.pl tool in ddk750_chip.c. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index fb27eb4..a0e7771 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -94,8 +94,8 @@ static void setMemoryClock(unsigned int frequency) if (frequency) { /* -* Set the frequency to the maximum frequency that the DDR Memory can take -* which is 336MHz. +* Set the frequency to the maximum frequency +* that the DDR Memory can take which is 336MHz. */ if (frequency > MHz(336)) frequency = MHz(336); -- 2.7.4
[PATCH 1/9] staging: sm750fb: fix line length coding style issue in ddk750_chip.c
Fix a line length warning found by the checkpatch.pl tool in ddk750_chip.c. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index c1356bb..fb27eb4 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -71,7 +71,7 @@ static void setChipClock(unsigned int frequency) pll.clockType = MXCLK_PLL; /* - * Call calcPllValue() to fill up the other fields for PLL structure. + * Call calcPllValue() to fill the other fields of PLL structure. * Sometime, the chip cannot set up the exact clock required by User. * Return value from calcPllValue() gives the actual possible clock. */ -- 2.7.4
[PATCH 3/9] staging: sm750fb: fix coding style issues in ddk750_chip.c
Fix line length and block comment * prefix warnings found by the checkpatch.pl tool in ddk750_chip.c. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index a0e7771..577a279 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -144,8 +144,9 @@ static void setMasterClock(unsigned int frequency) return; if (frequency) { - /* Set the frequency to the maximum frequency that the SM750 engine can - run, which is about 190 MHz. */ + /* Set the frequency to the maximum frequency +* that the SM750 engine can run, which is about 190 MHz. + */ if (frequency > MHz(190)) frequency = MHz(190); -- 2.7.4
[PATCH] Staging: sm750fb: fix block comment coding style issue in ddk750_chip.c
This is a patch to the ddk750_chip.c file that fixes up two block comment coding style warnings found by the checkpatch.pl tool Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index f80ee77..3d408d6 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -91,8 +91,10 @@ static void setMemoryClock(unsigned int frequency) return; if (frequency) { - /* Set the frequency to the maximum frequency that the DDR Memory can take - which is 336MHz. */ + /* +* Set the frequency to the maximum frequency that the DDR Memory can take +* which is 336MHz. +*/ if (frequency > MHz(336)) frequency = MHz(336); -- 2.7.4
[PATCH] Staging: sm750fb: fix line length coding style issue in ddk750_chip.c
This is a patch to the ddk750_chip.c file that fixes up a line length warning found by the checkpatch.pl tool Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index f80ee77..9780659 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -86,7 +86,9 @@ static void setMemoryClock(unsigned int frequency) { unsigned int reg, divisor; - /* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */ + /* Cheok_0509: For SM750LE, the memory clock is fixed. +* Nothing to set. +*/ if (getChipType() == SM750LE) return; -- 2.7.4