Re: [PATCH v6] ARM: dts: aspeed: Adding Lenovo Hr630 BMC
On Sun, May 5, 2019 at 8:17 PM Andrew Jeffery wrote:
>
>
>
> On Sun, 5 May 2019, at 15:38, Andrew Peng wrote:
> > Initial introduction of Lenovo Hr630 family equipped with
> > Aspeed 2500 BMC SoC. Hr630 is a x86 server development kit
> > with a ASPEED ast2500 BMC manufactured by Lenovo.
> > Specifically, This adds the Hr630 platform device tree file
> > used by the Hr630 BMC machines.
> >
> > This also adds an entry of Hr630 device tree file in Makefile
> >
> > Signed-off-by: Andrew Peng
> > Signed-off-by: Yonghui Liu
> > Signed-off-by: Lisa Liu
>
> Reviewed-by: Andrew Jeffery
Reviewed-by: Patrick Venture
>
> > ---
> > Changes in v6:
> > - add appropriate pinctrl property for uar1, uart2, uart3 and adc.
> > - remove vhub definition and comment.
> > - remove some GPIO definitions.
> > - revise Makefile according to sort alphabetically.
> > Changes in v5:
> > - revise pca9545 and pca9546 switch aliases name.
> > Changes in v4:
> > - add pca9546 switch aliases name.
> > Changes in v3:
> > - revise i2c switch aliases name.
> > Changes in v2:
> > - add i2c switch aliases name.
> > - remove the unused eeprom device from DT file.
> > - remove "Licensed under..." sentence.
> >
> > arch/arm/boot/dts/Makefile| 1 +
> > arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts | 566
> > ++
> > 2 files changed, 567 insertions(+)
> > create mode 100644 arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index f4f5aea..1276167 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -1255,6 +1255,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> > aspeed-bmc-facebook-cmm.dtb \
> > aspeed-bmc-facebook-tiogapass.dtb \
> > aspeed-bmc-intel-s2600wf.dtb \
> > + aspeed-bmc-lenovo-hr630.dtb \
> > aspeed-bmc-opp-lanyang.dtb \
> > aspeed-bmc-opp-palmetto.dtb \
> > aspeed-bmc-opp-romulus.dtb \
> > diff --git a/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> > b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> > new file mode 100644
> > index 000..d3695a3
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> > @@ -0,0 +1,566 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Device Tree file for Lenovo Hr630 platform
> > + *
> > + * Copyright (C) 2019-present Lenovo
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "aspeed-g5.dtsi"
> > +#include
> > +
> > +/ {
> > + model = "HR630 BMC";
> > + compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
> > +
> > + aliases {
> > + i2c14 = &i2c_rbp;
> > + i2c15 = &i2c_fbp1;
> > + i2c16 = &i2c_fbp2;
> > + i2c17 = &i2c_fbp3;
> > + i2c18 = &i2c_riser2;
> > + i2c19 = &i2c_pcie4;
> > + i2c20 = &i2c_riser1;
> > + i2c21 = &i2c_ocp;
> > + };
> > +
> > + chosen {
> > + stdout-path = &uart5;
> > + bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
> > + };
> > +
> > + memory@8000 {
> > + device_type = "memory";
> > + reg = <0x8000 0x2000>;
> > + };
> > +
> > + reserved-memory {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + flash_memory: region@9800 {
> > + no-map;
> > + reg = <0x9800 0x0010>; /* 1M */
> > + };
> > +
> > + gfx_memory: framebuffer {
> > + size = <0x0100>;
> > + alignment = <0x0100>;
> > + compatible = "shared-dma-pool";
> > + reusable;
> > + };
> > + };
> > +
> > + leds {
> > + compatible = "gpio-leds";
> > +
> > + heartbeat {
> > + gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + fault {
> > + gpios =
Re: [PATCH 1/2] dt-bindings: Add ir38064 as a trivial device
On Mon, Apr 29, 2019 at 5:42 PM Rob Herring wrote: > > On Tue, Apr 16, 2019 at 08:41:38AM -0700, Patrick Venture wrote: > > The ir38064 is a voltage regulator from Infineon. > > > > Signed-off-by: Patrick Venture > > --- > > Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ > > 1 file changed, 2 insertions(+) > > Patch 1 and 2 applied. Thanks! > > Rob
Re: [PATCH v2] soc: add aspeed folder and misc drivers
On Mon, Apr 29, 2019 at 12:35 PM Patrick Venture wrote: > > On Mon, Apr 29, 2019 at 12:27 PM Olof Johansson wrote: > > > > On Mon, Apr 29, 2019 at 10:12 AM Patrick Venture wrote: > > > > > > On Mon, Apr 29, 2019 at 10:08 AM Olof Johansson wrote: > > > > > > > > On Thu, Apr 25, 2019 at 07:25:49PM +0200, Greg KH wrote: > > > > > On Tue, Apr 23, 2019 at 08:28:14AM -0700, Patrick Venture wrote: > > > > > > On Tue, Apr 23, 2019 at 8:22 AM Patrick Venture > > > > > > wrote: > > > > > > > > > > > > > > On Tue, Apr 23, 2019 at 7:26 AM Patrick Venture > > > > > > > wrote: > > > > > > > > > > > > > > > > Create a SoC folder for the ASPEED parts and place the misc > > > > > > > > drivers > > > > > > > > currently present into this folder. These drivers are not > > > > > > > > generic part > > > > > > > > drivers, but rather only apply to the ASPEED SoCs. > > > > > > > > > > > > > > > > Signed-off-by: Patrick Venture > > > > > > > > > > > > > > Accidentally lost the Acked-by when re-sending this patchset as I > > > > > > > didn't see it on v1 before re-sending v2 to the larger audience. > > > > > > > > > > > > Since there was a change between v1 and v2, Arnd, I'd appreciate you > > > > > > Ack this version of the patchset since it changes when the > > > > > > soc/aspeed > > > > > > Makefile is followed. > > > > > > > > > > I have no objection for moving stuff out of drivers/misc/ so the SOC > > > > > maintainers are free to take this. > > > > > > > > > > Acked-by: Greg Kroah-Hartman > > > > > > > > I'm totally confused. This is the second "PATCH v2" of this patch that > > > > I came > > > > across, I already applied the first. > > > > > > I think the issue here was that I added to the CC list another email > > > and so you may see the v2 without that mailing list, and a v2 with it > > > -- > > > > > > Does this require a v3? I honestly didn't think so, but this was the > > > first time I had to add more people without needing other changes. > > > > Well, v2 doesn't build. I'll fix it up locally by adding an 'endmenu' > > to drivers/soc/aspeed/Kconfig. But... brings up questions how this was > > tested before submitting? Thanks for fixing this for me, and I apologize for the nuisance of it. > > That's a lost change issue. I'll try to be more diligent in the > future. My dev workspace is disconnected from the kernel used for > upstreaming patches, so if i make a change in one it isn't always > reflected in the other. I'm working on rectifying the underlying > build space issue to let me use the same repo. > > > > > scripts/kconfig/conf --allnoconfig Kconfig > > drivers/soc/Kconfig:24: 'menu' in different file than 'menu' > > drivers/soc/aspeed/Kconfig:1: location of the 'menu' > > drivers/Kconfig:233: 'menu' in different file than 'menu' > > drivers/soc/aspeed/Kconfig:1: location of the 'menu' > > :34: syntax error > > > > > > > > > > Patrick: Follow up with incremental patch in case there's any > > > > difference. > > > > Meanwhile, please keep in mind that you're adding a lot of work for > > > > people when > > > > you respin patches without following up on the previous version. Thanks! > > > > > > w.r.t this patch series. I found an issue with v1, and released a v2 > > > with the detail of what changed. I thought that was the correct > > > approach. I apologize for creating extra work, that's something > > > nobody needs. > > > > It's ok to submit newer versions, but it's convenient when they get > > threaded also in non-gmail mail readers (by using in-reply-to). > > Roger that. > > > > > > > -Olof
Re: [PATCH v2] soc: add aspeed folder and misc drivers
On Mon, Apr 29, 2019 at 12:27 PM Olof Johansson wrote: > > On Mon, Apr 29, 2019 at 10:12 AM Patrick Venture wrote: > > > > On Mon, Apr 29, 2019 at 10:08 AM Olof Johansson wrote: > > > > > > On Thu, Apr 25, 2019 at 07:25:49PM +0200, Greg KH wrote: > > > > On Tue, Apr 23, 2019 at 08:28:14AM -0700, Patrick Venture wrote: > > > > > On Tue, Apr 23, 2019 at 8:22 AM Patrick Venture > > > > > wrote: > > > > > > > > > > > > On Tue, Apr 23, 2019 at 7:26 AM Patrick Venture > > > > > > wrote: > > > > > > > > > > > > > > Create a SoC folder for the ASPEED parts and place the misc > > > > > > > drivers > > > > > > > currently present into this folder. These drivers are not > > > > > > > generic part > > > > > > > drivers, but rather only apply to the ASPEED SoCs. > > > > > > > > > > > > > > Signed-off-by: Patrick Venture > > > > > > > > > > > > Accidentally lost the Acked-by when re-sending this patchset as I > > > > > > didn't see it on v1 before re-sending v2 to the larger audience. > > > > > > > > > > Since there was a change between v1 and v2, Arnd, I'd appreciate you > > > > > Ack this version of the patchset since it changes when the soc/aspeed > > > > > Makefile is followed. > > > > > > > > I have no objection for moving stuff out of drivers/misc/ so the SOC > > > > maintainers are free to take this. > > > > > > > > Acked-by: Greg Kroah-Hartman > > > > > > I'm totally confused. This is the second "PATCH v2" of this patch that I > > > came > > > across, I already applied the first. > > > > I think the issue here was that I added to the CC list another email > > and so you may see the v2 without that mailing list, and a v2 with it > > -- > > > > Does this require a v3? I honestly didn't think so, but this was the > > first time I had to add more people without needing other changes. > > Well, v2 doesn't build. I'll fix it up locally by adding an 'endmenu' > to drivers/soc/aspeed/Kconfig. But... brings up questions how this was > tested before submitting? That's a lost change issue. I'll try to be more diligent in the future. My dev workspace is disconnected from the kernel used for upstreaming patches, so if i make a change in one it isn't always reflected in the other. I'm working on rectifying the underlying build space issue to let me use the same repo. > > scripts/kconfig/conf --allnoconfig Kconfig > drivers/soc/Kconfig:24: 'menu' in different file than 'menu' > drivers/soc/aspeed/Kconfig:1: location of the 'menu' > drivers/Kconfig:233: 'menu' in different file than 'menu' > drivers/soc/aspeed/Kconfig:1: location of the 'menu' > :34: syntax error > > > > > > > Patrick: Follow up with incremental patch in case there's any difference. > > > Meanwhile, please keep in mind that you're adding a lot of work for > > > people when > > > you respin patches without following up on the previous version. Thanks! > > > > w.r.t this patch series. I found an issue with v1, and released a v2 > > with the detail of what changed. I thought that was the correct > > approach. I apologize for creating extra work, that's something > > nobody needs. > > It's ok to submit newer versions, but it's convenient when they get > threaded also in non-gmail mail readers (by using in-reply-to). Roger that. > > > -Olof
Re: [PATCH v2] soc: add aspeed folder and misc drivers
On Mon, Apr 29, 2019 at 10:19 AM Olof Johansson wrote: > > On Mon, Apr 29, 2019 at 10:16 AM Patrick Venture wrote: > > > > On Mon, Apr 29, 2019 at 10:13 AM Olof Johansson wrote: > > > > > > On Mon, Apr 29, 2019 at 10:08 AM Olof Johansson wrote: > > > > > > > > On Thu, Apr 25, 2019 at 07:25:49PM +0200, Greg KH wrote: > > > > > On Tue, Apr 23, 2019 at 08:28:14AM -0700, Patrick Venture wrote: > > > > > > On Tue, Apr 23, 2019 at 8:22 AM Patrick Venture > > > > > > wrote: > > > > > > > > > > > > > > On Tue, Apr 23, 2019 at 7:26 AM Patrick Venture > > > > > > > wrote: > > > > > > > > > > > > > > > > Create a SoC folder for the ASPEED parts and place the misc > > > > > > > > drivers > > > > > > > > currently present into this folder. These drivers are not > > > > > > > > generic part > > > > > > > > drivers, but rather only apply to the ASPEED SoCs. > > > > > > > > > > > > > > > > Signed-off-by: Patrick Venture > > > > > > > > > > > > > > Accidentally lost the Acked-by when re-sending this patchset as I > > > > > > > didn't see it on v1 before re-sending v2 to the larger audience. > > > > > > > > > > > > Since there was a change between v1 and v2, Arnd, I'd appreciate you > > > > > > Ack this version of the patchset since it changes when the > > > > > > soc/aspeed > > > > > > Makefile is followed. > > > > > > > > > > I have no objection for moving stuff out of drivers/misc/ so the SOC > > > > > maintainers are free to take this. > > > > > > > > > > Acked-by: Greg Kroah-Hartman > > > > > > > > I'm totally confused. This is the second "PATCH v2" of this patch that > > > > I came > > > > across, I already applied the first. > > > > > > > > Patrick: Follow up with incremental patch in case there's any > > > > difference. > > > > Meanwhile, please keep in mind that you're adding a lot of work for > > > > people when > > > > you respin patches without following up on the previous version. Thanks! > > > > > > Not only that, but subthreads were cc:d to a...@kernel.org and some > > > were not, so I missed the overnight conversation on the topic. > > > > > > If this email thread is any indication of how the code will be > > > flowing, there's definitely need for more structure. Joel, I'm hoping > > > you'll coordinate. > > > > To be honest, this patchset thread was a bit less clear than anyone > > prefers. I use get_maintainers to get the initial list, and so adding > > arm@ or soc@ per a request tells me that perhaps those should be > > output via that script. > > The tools are working as expected, we normally don't take patches > directly to a...@kernel.org, we let them go in through platform > maintainers who then send it on to us. Thanks for clarifying. > > > > > > > I'm with Arnd on whether the code should be in drivers/soc or not -- > > > most of it likely should not. > > > > I think the misc drivers for a SoC that are a single user interface > > that is focused on the use-case that belongs to that SoC only belong > > in soc/, while if there is something we can do in common -- different > > story. If it makes sense to just have misc/aspeed/ instead of > > soc/aspeed -- would that align more? > > Those views are how the "board file hell" started on 32-bit ARM too, > so we're definitely hesitant to jump to that conclusion without > knowing more about what's actually anticipated. > > > Do you happen to have an estimate on what kind of drivers are > needed/anticipated? There is a UART routing control driver for ASPEED that spawned my push to soc/aspeed. The advice on that thread was to put such drivers there. There's likely to be a few more control-focused aspeed drivers. For Nuvoton, we definitely expect some similar LPC control drivers. Possibly an LPC snoop driver, similar to aspeed-lpc-snoop. This supports the idea of creating some form of bmc subsystem as suggested above (or in a different thread). > > > -Olof
Re: [PATCH v2] soc: add aspeed folder and misc drivers
On Mon, Apr 29, 2019 at 10:13 AM Olof Johansson wrote: > > On Mon, Apr 29, 2019 at 10:08 AM Olof Johansson wrote: > > > > On Thu, Apr 25, 2019 at 07:25:49PM +0200, Greg KH wrote: > > > On Tue, Apr 23, 2019 at 08:28:14AM -0700, Patrick Venture wrote: > > > > On Tue, Apr 23, 2019 at 8:22 AM Patrick Venture > > > > wrote: > > > > > > > > > > On Tue, Apr 23, 2019 at 7:26 AM Patrick Venture > > > > > wrote: > > > > > > > > > > > > Create a SoC folder for the ASPEED parts and place the misc drivers > > > > > > currently present into this folder. These drivers are not generic > > > > > > part > > > > > > drivers, but rather only apply to the ASPEED SoCs. > > > > > > > > > > > > Signed-off-by: Patrick Venture > > > > > > > > > > Accidentally lost the Acked-by when re-sending this patchset as I > > > > > didn't see it on v1 before re-sending v2 to the larger audience. > > > > > > > > Since there was a change between v1 and v2, Arnd, I'd appreciate you > > > > Ack this version of the patchset since it changes when the soc/aspeed > > > > Makefile is followed. > > > > > > I have no objection for moving stuff out of drivers/misc/ so the SOC > > > maintainers are free to take this. > > > > > > Acked-by: Greg Kroah-Hartman > > > > I'm totally confused. This is the second "PATCH v2" of this patch that I > > came > > across, I already applied the first. > > > > Patrick: Follow up with incremental patch in case there's any difference. > > Meanwhile, please keep in mind that you're adding a lot of work for people > > when > > you respin patches without following up on the previous version. Thanks! > > Not only that, but subthreads were cc:d to a...@kernel.org and some > were not, so I missed the overnight conversation on the topic. > > If this email thread is any indication of how the code will be > flowing, there's definitely need for more structure. Joel, I'm hoping > you'll coordinate. To be honest, this patchset thread was a bit less clear than anyone prefers. I use get_maintainers to get the initial list, and so adding arm@ or soc@ per a request tells me that perhaps those should be output via that script. > > I'm with Arnd on whether the code should be in drivers/soc or not -- > most of it likely should not. I think the misc drivers for a SoC that are a single user interface that is focused on the use-case that belongs to that SoC only belong in soc/, while if there is something we can do in common -- different story. If it makes sense to just have misc/aspeed/ instead of soc/aspeed -- would that align more? > > > -Olof
Re: [PATCH v2] soc: add aspeed folder and misc drivers
On Mon, Apr 29, 2019 at 10:08 AM Olof Johansson wrote: > > On Thu, Apr 25, 2019 at 07:25:49PM +0200, Greg KH wrote: > > On Tue, Apr 23, 2019 at 08:28:14AM -0700, Patrick Venture wrote: > > > On Tue, Apr 23, 2019 at 8:22 AM Patrick Venture > > > wrote: > > > > > > > > On Tue, Apr 23, 2019 at 7:26 AM Patrick Venture > > > > wrote: > > > > > > > > > > Create a SoC folder for the ASPEED parts and place the misc drivers > > > > > currently present into this folder. These drivers are not generic > > > > > part > > > > > drivers, but rather only apply to the ASPEED SoCs. > > > > > > > > > > Signed-off-by: Patrick Venture > > > > > > > > Accidentally lost the Acked-by when re-sending this patchset as I > > > > didn't see it on v1 before re-sending v2 to the larger audience. > > > > > > Since there was a change between v1 and v2, Arnd, I'd appreciate you > > > Ack this version of the patchset since it changes when the soc/aspeed > > > Makefile is followed. > > > > I have no objection for moving stuff out of drivers/misc/ so the SOC > > maintainers are free to take this. > > > > Acked-by: Greg Kroah-Hartman > > I'm totally confused. This is the second "PATCH v2" of this patch that I came > across, I already applied the first. I think the issue here was that I added to the CC list another email and so you may see the v2 without that mailing list, and a v2 with it -- Does this require a v3? I honestly didn't think so, but this was the first time I had to add more people without needing other changes. > > Patrick: Follow up with incremental patch in case there's any difference. > Meanwhile, please keep in mind that you're adding a lot of work for people > when > you respin patches without following up on the previous version. Thanks! w.r.t this patch series. I found an issue with v1, and released a v2 with the detail of what changed. I thought that was the correct approach. I apologize for creating extra work, that's something nobody needs. > > > -Olof
Re: linux-next: build warning after merge of the char-misc tree
On Fri, Apr 26, 2019 at 7:30 AM Patrick Venture wrote:
>
> On Thu, Apr 25, 2019 at 11:25 PM Greg KH wrote:
> >
> > On Fri, Apr 26, 2019 at 03:56:53PM +1000, Stephen Rothwell wrote:
> > > Hi all,
> > >
> > > After merging the char-misc tree, today's linux-next build (x86_64
> > > allmodconfig) produced this warning:
> > >
> > > drivers/misc/aspeed-p2a-ctrl.c: In function 'aspeed_p2a_mmap':
> > > drivers/misc/aspeed-p2a-ctrl.c:110:2: warning: ISO C90 forbids mixed
> > > declarations and code [-Wdeclaration-after-statement]
> > > pgprot_t prot = vma->vm_page_prot;
> > > ^~~~
> > >
> > > Introduced by commit
> > >
> > > 01c60dcea9f7 ("drivers/misc: Add Aspeed P2A control driver")
> >
> > Patrick, I thought you fixed all of these already? Can you send a patch
> > again?
>
> I fixed the ones caught by the robot. I'll have to switch up my build
> environment a bit to fault on warnings for the kernel, not sure why it
> isn't --
Verified the warnings being ignored isn't a local configuration issue,
but the way OpenBMC is configured. Verified the warning via normal
kernel compilation and fixed the issue. Reran and found no other
issues for that drivers. Submitted patch for review.
>
> >
> > Can you also make the driver so it can build with CONFIG_COMPILE_TEST
> > enabled so that others can find your problems earlier in the review
> > process?
Verified the driver builds and produces no warnings.
Thanks,
Patrick
>
> Roger that.
>
> >
> > thanks,
> >
> > greg k-h
[PATCH] misc: aspeed-p2a-ctrl: fix mixed declarations
Fix up mixed declarations and code in aspeed_p2a_mmap.
Tested: Verified the build had the error and that this patch resolved it
and there were no other warnings or build errors associated with
compilation of this driver.
Reported-by: Stephen Rothwell
Signed-off-by: Patrick Venture
---
drivers/misc/aspeed-p2a-ctrl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c
index 9736821972ef..b60fbeaffcbd 100644
--- a/drivers/misc/aspeed-p2a-ctrl.c
+++ b/drivers/misc/aspeed-p2a-ctrl.c
@@ -100,6 +100,7 @@ static void aspeed_p2a_disable_bridge(struct
aspeed_p2a_ctrl *p2a_ctrl)
static int aspeed_p2a_mmap(struct file *file, struct vm_area_struct *vma)
{
unsigned long vsize;
+ pgprot_t prot;
struct aspeed_p2a_user *priv = file->private_data;
struct aspeed_p2a_ctrl *ctrl = priv->parent;
@@ -107,7 +108,7 @@ static int aspeed_p2a_mmap(struct file *file, struct
vm_area_struct *vma)
return -EINVAL;
vsize = vma->vm_end - vma->vm_start;
- pgprot_t prot = vma->vm_page_prot;
+ prot = vma->vm_page_prot;
if (vma->vm_pgoff + vsize > ctrl->mem_base + ctrl->mem_size)
return -EINVAL;
--
2.21.0.593.g511ec345e18-goog
Re: linux-next: build warning after merge of the char-misc tree
On Thu, Apr 25, 2019 at 11:25 PM Greg KH wrote:
>
> On Fri, Apr 26, 2019 at 03:56:53PM +1000, Stephen Rothwell wrote:
> > Hi all,
> >
> > After merging the char-misc tree, today's linux-next build (x86_64
> > allmodconfig) produced this warning:
> >
> > drivers/misc/aspeed-p2a-ctrl.c: In function 'aspeed_p2a_mmap':
> > drivers/misc/aspeed-p2a-ctrl.c:110:2: warning: ISO C90 forbids mixed
> > declarations and code [-Wdeclaration-after-statement]
> > pgprot_t prot = vma->vm_page_prot;
> > ^~~~
> >
> > Introduced by commit
> >
> > 01c60dcea9f7 ("drivers/misc: Add Aspeed P2A control driver")
>
> Patrick, I thought you fixed all of these already? Can you send a patch
> again?
I fixed the ones caught by the robot. I'll have to switch up my build
environment a bit to fault on warnings for the kernel, not sure why it
isn't --
>
> Can you also make the driver so it can build with CONFIG_COMPILE_TEST
> enabled so that others can find your problems earlier in the review
> process?
Roger that.
>
> thanks,
>
> greg k-h
Re: [PATCH] fixup! drivers/misc: Add Aspeed P2A control driver
On Thu, Apr 25, 2019 at 1:36 PM Greg KH wrote: > > On Thu, Apr 25, 2019 at 01:23:47PM -0700, Patrick Venture wrote: > > Fixup compiler warnings: > > - 108 warning: ISO C90 forbids mixed declarations and code > > - 264 warning: unused variable 'value' > > - 335 warning: unused variable 'res' > > > > Signed-off-by: Patrick Venture > > Reported-by: kbuild... > > I'll go add it, next time please do it yourself. Roger that! > > thanks, > > greg k-h
[PATCH] fixup! drivers/misc: Add Aspeed P2A control driver
Fixup compiler warnings:
- 108 warning: ISO C90 forbids mixed declarations and code
- 264 warning: unused variable 'value'
- 335 warning: unused variable 'res'
Signed-off-by: Patrick Venture
---
drivers/misc/aspeed-p2a-ctrl.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c
index c0521b2ffc6a..9736821972ef 100644
--- a/drivers/misc/aspeed-p2a-ctrl.c
+++ b/drivers/misc/aspeed-p2a-ctrl.c
@@ -99,13 +99,14 @@ static void aspeed_p2a_disable_bridge(struct
aspeed_p2a_ctrl *p2a_ctrl)
static int aspeed_p2a_mmap(struct file *file, struct vm_area_struct *vma)
{
+ unsigned long vsize;
struct aspeed_p2a_user *priv = file->private_data;
struct aspeed_p2a_ctrl *ctrl = priv->parent;
if (ctrl->mem_base == 0 && ctrl->mem_size == 0)
return -EINVAL;
- unsigned long vsize = vma->vm_end - vma->vm_start;
+ vsize = vma->vm_end - vma->vm_start;
pgprot_t prot = vma->vm_page_prot;
if (vma->vm_pgoff + vsize > ctrl->mem_base + ctrl->mem_size)
@@ -261,7 +262,6 @@ static int aspeed_p2a_open(struct inode *inode, struct file
*file)
static int aspeed_p2a_release(struct inode *inode, struct file *file)
{
int i;
- u32 value;
u32 bits = 0;
bool open_regions = false;
struct aspeed_p2a_user *priv = file->private_data;
@@ -332,7 +332,7 @@ static int aspeed_p2a_ctrl_probe(struct platform_device
*pdev)
{
struct aspeed_p2a_ctrl *misc_ctrl;
struct device *dev;
- struct resource *res, resm;
+ struct resource resm;
struct device_node *node;
int rc = 0;
--
2.21.0.593.g511ec345e18-goog
[PATCH 1/2] ARM: dts: aspeed: Add aspeed-p2a-ctrl node
Add a node for the aspeed-p2a-ctrl module. This node, when enabled will
disable the PCI-to-AHB bridge and then allow control of this bridge via
ioctls, and access via mmap.
Signed-off-by: Patrick Venture
---
arch/arm/boot/dts/aspeed-g4.dtsi | 4
arch/arm/boot/dts/aspeed-g5.dtsi | 5 +
2 files changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 9549f867aa1ef..0b7bc6072aed0 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -165,6 +165,10 @@
compatible = "aspeed,g4-pinctrl";
};
+ p2a: p2a-control {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ status = "disabled";
+ };
};
rng: hwrng@1e6e2078 {
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 3e4ed081505cc..5f01befcca1e2 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -212,6 +212,11 @@
aspeed,external-nodes = <&gfx &lhc>;
};
+
+ p2a: p2a-control {
+ compatible = "aspeed,ast2500-p2a-ctrl";
+ status = "disabled";
+ };
};
rng: hwrng@1e6e2078 {
--
2.21.0.593.g511ec345e18-goog
[PATCH 2/2] ARM: dts: aspeed: quanta-q71: Enable p2a node
Enable the aspeed-p2a-ctrl node and configure with memory-region to
enable mmap access.
Signed-off-by: Patrick Venture
---
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
index 0d7c6339da465..a68ff0675c28a 100644
--- a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
@@ -112,6 +112,11 @@
&pinctrl_ddcclk_default &pinctrl_ddcdat_default>;
};
+&p2a {
+ status = "okay";
+ memory-region = <&vga_memory>;
+};
+
&ibt {
status = "okay";
};
--
2.21.0.593.g511ec345e18-goog
Re: [PATCH v3] ARM: dts: aspeed: Adding Lenovo Hr630 BMC
On Wed, Apr 24, 2019 at 5:29 AM Andrew Peng wrote:
>
> Initial introduction of Lenovo Hr630 family equipped with
> Aspeed 2500 BMC SoC. Hr630 is a x86 server development kit
> with a ASPEED ast2500 BMC manufactured by Lenovo.
> Specifically, This adds the Hr630 platform device tree file
> used by the Hr630 BMC machines.
>
> This also adds an entry of Hr630 device tree file in Makefile
>
> Signed-off-by: Andrew Peng
> Signed-off-by: Yonghui Liu
> Signed-off-by: Lisa Liu
> ---
> Changes in v3:
> - revise i2c switch aliases name.
> Changes in v2:
> - add i2c switch aliases name.
> - remove the unused eeprom device from DT file.
> - remove "Licensed under..." sentence.
>
> arch/arm/boot/dts/Makefile| 3 +-
> arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts | 886
> ++
> 2 files changed, 888 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index f4f5aea..375e53b 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1261,4 +1261,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-opp-witherspoon.dtb \
> aspeed-bmc-opp-zaius.dtb \
> aspeed-bmc-portwell-neptune.dtb \
> - aspeed-bmc-quanta-q71l.dtb
> + aspeed-bmc-quanta-q71l.dtb \
> + aspeed-bmc-lenovo-hr630.dtb
> diff --git a/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> new file mode 100644
> index 000..5c45523
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> @@ -0,0 +1,886 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Device Tree file for Lenovo Hr630 platform
> + *
> + * Copyright (C) 2019-present Lenovo
> + */
> +
> +/dts-v1/;
> +
> +#include "aspeed-g5.dtsi"
> +#include
> +
> +/ {
> + model = "HR630 BMC";
> + compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
> +
> + aliases {
> + pca9545_i2c0 = &i2c_rbp;
> + pca9545_i2c1 = &i2c_fbp1;
> + pca9545_i2c2 = &i2c_fbp2;
> + pca9545_i2c3 = &i2c_fbp3;
> + };
> +
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
> + };
> +
> + memory@8000 {
> + device_type = "memory";
> + reg = <0x8000 0x2000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + flash_memory: region@9800 {
> + no-map;
> + reg = <0x9800 0x0010>; /* 1M */
> + };
> +
> + gfx_memory: framebuffer {
> + size = <0x0100>;
> + alignment = <0x0100>;
> + compatible = "shared-dma-pool";
> + reusable;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + heartbeat {
> + gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
> + };
> +
> + fault {
> + gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + iio-hwmon {
> + compatible = "iio-hwmon";
> + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
> + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
> + <&adc 8>, <&adc 9>, <&adc 10>,
> + <&adc 12>, <&adc 13>, <&adc 14>;
> + };
> +
> +};
> +
> +&fmc {
> + status = "okay";
> + flash@0 {
> + status = "okay";
> + m25p,fast-read;
> + label = "bmc";
> + spi-max-frequency = <5000>;
> +#include "openbmc-flash-layout.dtsi"
> + };
> +};
> +
> +&lpc_ctrl {
> + status = "okay";
> + memory-region = <&flash_memory>;
> + flash = <&spi1>;
> +};
> +
> +&uart1 {
> + status = "okay";
> +};
> +
> +&uart2 {
> + status = "okay";
> +};
> +
> +&uart3 {
> + status = "okay";
> +};
> +
> +&uart5 {
> + status = "okay";
> +};
> +
> +&vuart {
> + status = "okay";
> +};
> +
> +&ibt {
> + status = "okay";
> +};
> +
> +&mac0 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rmii1_default>;
> + use-ncsi;
> +};
> +
> +&mac1 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
> +};
> +
> +&adc {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + status = "okay";
> + /* temp1 inlet */
> + tmp75@4e {
> + compatible = "national,lm75";
> + reg = <0x4e>;
> + };
> +};
> +
> +&i2c1 {
> + statu
Re: [PATCH] soc: add aspeed folder and misc drivers
On Tue, Apr 23, 2019 at 8:33 AM Arnd Bergmann wrote: > > On Tue, Apr 23, 2019 at 4:24 PM Patrick Venture wrote: > > > > On Tue, Apr 23, 2019 at 1:08 AM Arnd Bergmann wrote: > > > > > > On Mon, Apr 22, 2019 at 7:38 PM Patrick Venture > > > wrote: > > > > > > > > Create a SoC folder for the ASPEED parts and place the misc drivers > > > > currently present into this folder. These drivers are not generic part > > > > drivers, but rather only apply to the ASPEED SoCs. > > > > > > > > Signed-off-by: Patrick Venture > > > > > > Looks ok, but please resend to a...@kernel.org or s...@kernel.org > > > so we can track the submission and make sure it gets applied if > > > you want this to go through the arm-soc tree. > > > > Thanks, I didn't see those come up in the get_maintainers output. > > > > I had a longer question related to this patch progression -- if I am > > moving the aspeed gpio driver to the soc folder, the soc tree may have > > the soc/aspeed folder in their next, but the gpio tree wouldn't > > necessarily. I know the branches sync up when things are merged at > > the top, but I wasn't sure if there was another mechanism for this? > > We can generally deal with merge conflicts like this, or you can ask > the respective maintainers about it and let us figure something out. Thanks for explaining that. > > In this particular case, why would you move the gpio driver into > the soc folder? If there is a proper subsystem for a driver, it should > not be in drivers/misc or drivers/soc. Ok, that makes sense. I was trying to get a sense of what belonged in soc versus the subsystem folders. My thinking from the limited reading was the purpose of a SoC folder was to contain the drivers that were only associated with a system-on-a-chip and not a part you could buy and place on any board. A tmp421 sensor is just a generic part, versus the pwm controller, which is only for the specific SoCs. That said, there are quite a few misc drivers associated with the Aspeed parts -- and there are two under review now, so there's a strong motivation to move those at least into the soc/aspeed folder. Thanks for these clarifying remarks. > >Arnd
Re: [PATCH v2] soc: add aspeed folder and misc drivers
On Tue, Apr 23, 2019 at 8:22 AM Patrick Venture wrote:
>
> On Tue, Apr 23, 2019 at 7:26 AM Patrick Venture wrote:
> >
> > Create a SoC folder for the ASPEED parts and place the misc drivers
> > currently present into this folder. These drivers are not generic part
> > drivers, but rather only apply to the ASPEED SoCs.
> >
> > Signed-off-by: Patrick Venture
>
> Accidentally lost the Acked-by when re-sending this patchset as I
> didn't see it on v1 before re-sending v2 to the larger audience.
Since there was a change between v1 and v2, Arnd, I'd appreciate you
Ack this version of the patchset since it changes when the soc/aspeed
Makefile is followed.
>
> > ---
> > v2:
> > Added configuration option for ASPEED to soc/Makefile
> > ---
> > drivers/misc/Kconfig | 16
> > drivers/misc/Makefile | 2 --
> > drivers/soc/Kconfig | 1 +
> > drivers/soc/Makefile | 1 +
> > drivers/soc/aspeed/Kconfig| 19 +++
> > drivers/soc/aspeed/Makefile | 2 ++
> > .../{misc => soc/aspeed}/aspeed-lpc-ctrl.c| 0
> > .../{misc => soc/aspeed}/aspeed-lpc-snoop.c | 0
> > 8 files changed, 23 insertions(+), 18 deletions(-)
> > create mode 100644 drivers/soc/aspeed/Kconfig
> > create mode 100644 drivers/soc/aspeed/Makefile
> > rename drivers/{misc => soc/aspeed}/aspeed-lpc-ctrl.c (100%)
> > rename drivers/{misc => soc/aspeed}/aspeed-lpc-snoop.c (100%)
> >
> > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
> > index 42ab8ec92a04..b80cb6af0cb4 100644
> > --- a/drivers/misc/Kconfig
> > +++ b/drivers/misc/Kconfig
> > @@ -496,22 +496,6 @@ config VEXPRESS_SYSCFG
> > bus. System Configuration interface is one of the possible means
> > of generating transactions on this bus.
> >
> > -config ASPEED_LPC_CTRL
> > - depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
> > - tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
> > - ---help---
> > - Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
> > - ioctl()s, the driver also provides a read/write interface to a
> > BMC ram
> > - region where the host LPC read/write region can be buffered.
> > -
> > -config ASPEED_LPC_SNOOP
> > - tristate "Aspeed ast2500 HOST LPC snoop support"
> > - depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
> > - help
> > - Provides a driver to control the LPC snoop interface which
> > - allows the BMC to listen on and save the data written by
> > - the host to an arbitrary LPC I/O port.
> > -
> > config PCI_ENDPOINT_TEST
> > depends on PCI
> > select CRC32
> > diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
> > index d5b7d3404dc7..b9affcdaa3d6 100644
> > --- a/drivers/misc/Makefile
> > +++ b/drivers/misc/Makefile
> > @@ -54,8 +54,6 @@ obj-$(CONFIG_GENWQE) += genwqe/
> > obj-$(CONFIG_ECHO) += echo/
> > obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
> > obj-$(CONFIG_CXL_BASE) += cxl/
> > -obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o
> > -obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o
> > obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
> > obj-$(CONFIG_OCXL) += ocxl/
> > obj-y += cardreader/
> > diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
> > index c07b4a85253f..b750a88547c7 100644
> > --- a/drivers/soc/Kconfig
> > +++ b/drivers/soc/Kconfig
> > @@ -2,6 +2,7 @@ menu "SOC (System On Chip) specific Drivers"
> >
> > source "drivers/soc/actions/Kconfig"
> > source "drivers/soc/amlogic/Kconfig"
> > +source "drivers/soc/aspeed/Kconfig"
> > source "drivers/soc/atmel/Kconfig"
> > source "drivers/soc/bcm/Kconfig"
> > source "drivers/soc/fsl/Kconfig"
> > diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
> > index 90b686e586c6..814128fe479f 100644
> > --- a/drivers/soc/Makefile
> > +++ b/drivers/soc/Makefile
> > @@ -4,6 +4,7 @@
> > #
> >
> > obj-$(CONFIG_ARCH_ACTIONS) += actions/
> > +obj-$(CONFIG_ARCH_ASPEED) += aspeed/
> > obj-$(CONFIG_ARCH_AT91)+= atmel/
> > obj-y
Re: [PATCH v2] soc: add aspeed folder and misc drivers
On Tue, Apr 23, 2019 at 7:26 AM Patrick Venture wrote:
>
> Create a SoC folder for the ASPEED parts and place the misc drivers
> currently present into this folder. These drivers are not generic part
> drivers, but rather only apply to the ASPEED SoCs.
>
> Signed-off-by: Patrick Venture
Accidentally lost the Acked-by when re-sending this patchset as I
didn't see it on v1 before re-sending v2 to the larger audience.
> ---
> v2:
> Added configuration option for ASPEED to soc/Makefile
> ---
> drivers/misc/Kconfig | 16
> drivers/misc/Makefile | 2 --
> drivers/soc/Kconfig | 1 +
> drivers/soc/Makefile | 1 +
> drivers/soc/aspeed/Kconfig| 19 +++
> drivers/soc/aspeed/Makefile | 2 ++
> .../{misc => soc/aspeed}/aspeed-lpc-ctrl.c| 0
> .../{misc => soc/aspeed}/aspeed-lpc-snoop.c | 0
> 8 files changed, 23 insertions(+), 18 deletions(-)
> create mode 100644 drivers/soc/aspeed/Kconfig
> create mode 100644 drivers/soc/aspeed/Makefile
> rename drivers/{misc => soc/aspeed}/aspeed-lpc-ctrl.c (100%)
> rename drivers/{misc => soc/aspeed}/aspeed-lpc-snoop.c (100%)
>
> diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
> index 42ab8ec92a04..b80cb6af0cb4 100644
> --- a/drivers/misc/Kconfig
> +++ b/drivers/misc/Kconfig
> @@ -496,22 +496,6 @@ config VEXPRESS_SYSCFG
> bus. System Configuration interface is one of the possible means
> of generating transactions on this bus.
>
> -config ASPEED_LPC_CTRL
> - depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
> - tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
> - ---help---
> - Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
> - ioctl()s, the driver also provides a read/write interface to a BMC
> ram
> - region where the host LPC read/write region can be buffered.
> -
> -config ASPEED_LPC_SNOOP
> - tristate "Aspeed ast2500 HOST LPC snoop support"
> - depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
> - help
> - Provides a driver to control the LPC snoop interface which
> - allows the BMC to listen on and save the data written by
> - the host to an arbitrary LPC I/O port.
> -
> config PCI_ENDPOINT_TEST
> depends on PCI
> select CRC32
> diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
> index d5b7d3404dc7..b9affcdaa3d6 100644
> --- a/drivers/misc/Makefile
> +++ b/drivers/misc/Makefile
> @@ -54,8 +54,6 @@ obj-$(CONFIG_GENWQE) += genwqe/
> obj-$(CONFIG_ECHO) += echo/
> obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
> obj-$(CONFIG_CXL_BASE) += cxl/
> -obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o
> -obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o
> obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
> obj-$(CONFIG_OCXL) += ocxl/
> obj-y += cardreader/
> diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
> index c07b4a85253f..b750a88547c7 100644
> --- a/drivers/soc/Kconfig
> +++ b/drivers/soc/Kconfig
> @@ -2,6 +2,7 @@ menu "SOC (System On Chip) specific Drivers"
>
> source "drivers/soc/actions/Kconfig"
> source "drivers/soc/amlogic/Kconfig"
> +source "drivers/soc/aspeed/Kconfig"
> source "drivers/soc/atmel/Kconfig"
> source "drivers/soc/bcm/Kconfig"
> source "drivers/soc/fsl/Kconfig"
> diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
> index 90b686e586c6..814128fe479f 100644
> --- a/drivers/soc/Makefile
> +++ b/drivers/soc/Makefile
> @@ -4,6 +4,7 @@
> #
>
> obj-$(CONFIG_ARCH_ACTIONS) += actions/
> +obj-$(CONFIG_ARCH_ASPEED) += aspeed/
> obj-$(CONFIG_ARCH_AT91)+= atmel/
> obj-y += bcm/
> obj-$(CONFIG_ARCH_DOVE)+= dove/
> diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig
> new file mode 100644
> index ..457282cd1da5
> --- /dev/null
> +++ b/drivers/soc/aspeed/Kconfig
> @@ -0,0 +1,19 @@
> +menu "Aspeed SoC drivers"
> +
> +config ASPEED_LPC_CTRL
> + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
> + tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
> + ---help---
> + Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
> + ioctl()s, the driver also p
Re: [PATCH v2] ARM: dts: aspeed: Adding Lenovo Hr630 BMC
On Tue, Apr 23, 2019 at 4:55 AM Andrew Peng wrote:
>
> Initial introduction of Lenovo Hr630 family equipped with
> Aspeed 2500 BMC SoC. Hr630 is a x86 server development kit
> with a ASPEED ast2500 BMC manufactured by Lenovo.
> Specifically, This adds the Hr630 platform device tree file
> used by the Hr630 BMC machines.
>
> This also adds an entry of Hr630 device tree file in Makefile
>
> Signed-off-by: Andrew Peng
> Signed-off-by: Yonghui Liu
> Signed-off-by: Lisa Liu
In the future, or in the next version, please add a section here
explaining what changed. You can look at other v2 or v3, etc, to see
how it should appear.
> ---
> arch/arm/boot/dts/Makefile| 3 +-
> arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts | 886
> ++
> 2 files changed, 888 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index f4f5aea..375e53b 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1261,4 +1261,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-opp-witherspoon.dtb \
> aspeed-bmc-opp-zaius.dtb \
> aspeed-bmc-portwell-neptune.dtb \
> - aspeed-bmc-quanta-q71l.dtb
> + aspeed-bmc-quanta-q71l.dtb \
> + aspeed-bmc-lenovo-hr630.dtb
> diff --git a/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> new file mode 100644
> index 000..3322f83
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> @@ -0,0 +1,886 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Device Tree file for Lenovo Hr630 platform
> + *
> + * Copyright (C) 2019-present Lenovo
> + */
> +
> +/dts-v1/;
> +
> +#include "aspeed-g5.dtsi"
> +#include
> +
> +/ {
> + model = "HR630 BMC";
> + compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
> +
> + aliases {
> + i2c_rbp = &i2c_rbp;
> + i2c_fbp1 = &i2c_fbp1;
> + i2c_fbp2 = &i2c_fbp2;
> + i2c_fbp3 = &i2c_fbp3;
> + };
These aliases don't do anything that I can see - they are assigning
themselves to themselves. I was referring to the i2c bus numbers.
For instance:
i2c14 = &ic2_rbp;
That will insure that i2c_rbp will be slotted as i2c14.
> +
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
> + };
> +
> + memory@8000 {
> + device_type = "memory";
> + reg = <0x8000 0x2000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + flash_memory: region@9800 {
> + no-map;
> + reg = <0x9800 0x0010>; /* 1M */
> + };
> +
> + gfx_memory: framebuffer {
> + size = <0x0100>;
> + alignment = <0x0100>;
> + compatible = "shared-dma-pool";
> + reusable;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + heartbeat {
> + gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
> + };
> +
> + fault {
> + gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + iio-hwmon {
> + compatible = "iio-hwmon";
> + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
> + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
> + <&adc 8>, <&adc 9>, <&adc 10>,
> + <&adc 12>, <&adc 13>, <&adc 14>;
> + };
> +
> +};
> +
> +&fmc {
> + status = "okay";
> + flash@0 {
> + status = "okay";
> + m25p,fast-read;
> + label = "bmc";
> + spi-max-frequency = <5000>;
> +#include "openbmc-flash-layout.dtsi"
> + };
> +};
> +
> +&lpc_ctrl {
> + status = "okay";
> + memory-region = <&flash_memory>;
> + flash = <&spi1>;
> +};
> +
> +&uart1 {
> + status = "okay";
> +};
> +
> +&uart2 {
> + status = "okay";
> +};
> +
> +&uart3 {
> + status = "okay";
> +};
> +
> +&uart5 {
> + status = "okay";
> +};
> +
> +&vuart {
> + status = "okay";
> +};
> +
> +&ibt {
> + status = "okay";
> +};
> +
> +&mac0 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rmii1_default>;
> + use-ncsi;
> +};
> +
> +&mac1 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
> +};
> +
> +&adc {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + status = "okay";
> +
[PATCH v2] soc: add aspeed folder and misc drivers
Create a SoC folder for the ASPEED parts and place the misc drivers
currently present into this folder. These drivers are not generic part
drivers, but rather only apply to the ASPEED SoCs.
Signed-off-by: Patrick Venture
---
v2:
Added configuration option for ASPEED to soc/Makefile
---
drivers/misc/Kconfig | 16
drivers/misc/Makefile | 2 --
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/aspeed/Kconfig| 19 +++
drivers/soc/aspeed/Makefile | 2 ++
.../{misc => soc/aspeed}/aspeed-lpc-ctrl.c| 0
.../{misc => soc/aspeed}/aspeed-lpc-snoop.c | 0
8 files changed, 23 insertions(+), 18 deletions(-)
create mode 100644 drivers/soc/aspeed/Kconfig
create mode 100644 drivers/soc/aspeed/Makefile
rename drivers/{misc => soc/aspeed}/aspeed-lpc-ctrl.c (100%)
rename drivers/{misc => soc/aspeed}/aspeed-lpc-snoop.c (100%)
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 42ab8ec92a04..b80cb6af0cb4 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -496,22 +496,6 @@ config VEXPRESS_SYSCFG
bus. System Configuration interface is one of the possible means
of generating transactions on this bus.
-config ASPEED_LPC_CTRL
- depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
- tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
- ---help---
- Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
- ioctl()s, the driver also provides a read/write interface to a BMC ram
- region where the host LPC read/write region can be buffered.
-
-config ASPEED_LPC_SNOOP
- tristate "Aspeed ast2500 HOST LPC snoop support"
- depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
- help
- Provides a driver to control the LPC snoop interface which
- allows the BMC to listen on and save the data written by
- the host to an arbitrary LPC I/O port.
-
config PCI_ENDPOINT_TEST
depends on PCI
select CRC32
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index d5b7d3404dc7..b9affcdaa3d6 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -54,8 +54,6 @@ obj-$(CONFIG_GENWQE) += genwqe/
obj-$(CONFIG_ECHO) += echo/
obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
obj-$(CONFIG_CXL_BASE) += cxl/
-obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o
-obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o
obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
obj-$(CONFIG_OCXL) += ocxl/
obj-y += cardreader/
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index c07b4a85253f..b750a88547c7 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -2,6 +2,7 @@ menu "SOC (System On Chip) specific Drivers"
source "drivers/soc/actions/Kconfig"
source "drivers/soc/amlogic/Kconfig"
+source "drivers/soc/aspeed/Kconfig"
source "drivers/soc/atmel/Kconfig"
source "drivers/soc/bcm/Kconfig"
source "drivers/soc/fsl/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 90b686e586c6..814128fe479f 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -4,6 +4,7 @@
#
obj-$(CONFIG_ARCH_ACTIONS) += actions/
+obj-$(CONFIG_ARCH_ASPEED) += aspeed/
obj-$(CONFIG_ARCH_AT91)+= atmel/
obj-y += bcm/
obj-$(CONFIG_ARCH_DOVE)+= dove/
diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig
new file mode 100644
index ..457282cd1da5
--- /dev/null
+++ b/drivers/soc/aspeed/Kconfig
@@ -0,0 +1,19 @@
+menu "Aspeed SoC drivers"
+
+config ASPEED_LPC_CTRL
+ depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
+ tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
+ ---help---
+ Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
+ ioctl()s, the driver also provides a read/write interface to a BMC ram
+ region where the host LPC read/write region can be buffered.
+
+config ASPEED_LPC_SNOOP
+ tristate "Aspeed ast2500 HOST LPC snoop support"
+ depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
+ help
+ Provides a driver to control the LPC snoop interface which
+ allows the BMC to listen on and save the data written by
+ the host to an arbitrary LPC I/O port.
+
+
diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile
new file mode 100644
index ..cfaa9adc67b5
--- /dev/null
+++ b/drivers/soc/aspeed/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONF
Re: [PATCH] soc: add aspeed folder and misc drivers
On Tue, Apr 23, 2019 at 1:08 AM Arnd Bergmann wrote:
>
> On Mon, Apr 22, 2019 at 7:38 PM Patrick Venture wrote:
> >
> > Create a SoC folder for the ASPEED parts and place the misc drivers
> > currently present into this folder. These drivers are not generic part
> > drivers, but rather only apply to the ASPEED SoCs.
> >
> > Signed-off-by: Patrick Venture
>
> Looks ok, but please resend to a...@kernel.org or s...@kernel.org
> so we can track the submission and make sure it gets applied if
> you want this to go through the arm-soc tree.
Thanks, I didn't see those come up in the get_maintainers output.
I had a longer question related to this patch progression -- if I am
moving the aspeed gpio driver to the soc folder, the soc tree may have
the soc/aspeed folder in their next, but the gpio tree wouldn't
necessarily. I know the branches sync up when things are merged at
the top, but I wasn't sure if there was another mechanism for this?
>
> If Greg wants to pick it up, that's fine too.
>
> Either way,
>
> Acked-by: Arnd Bergmann
>
> > ---
> > drivers/misc/Kconfig | 16
> > drivers/misc/Makefile | 2 --
> > drivers/soc/Kconfig | 1 +
> > drivers/soc/Makefile | 1 +
> > drivers/soc/aspeed/Kconfig| 19 +++
> > drivers/soc/aspeed/Makefile | 2 ++
> > .../{misc => soc/aspeed}/aspeed-lpc-ctrl.c| 0
> > .../{misc => soc/aspeed}/aspeed-lpc-snoop.c | 0
> > 8 files changed, 23 insertions(+), 18 deletions(-)
> > create mode 100644 drivers/soc/aspeed/Kconfig
> > create mode 100644 drivers/soc/aspeed/Makefile
> > rename drivers/{misc => soc/aspeed}/aspeed-lpc-ctrl.c (100%)
> > rename drivers/{misc => soc/aspeed}/aspeed-lpc-snoop.c (100%)
> >
> > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
> > index 42ab8ec92a04..b80cb6af0cb4 100644
> > --- a/drivers/misc/Kconfig
> > +++ b/drivers/misc/Kconfig
> > @@ -496,22 +496,6 @@ config VEXPRESS_SYSCFG
> > bus. System Configuration interface is one of the possible means
> > of generating transactions on this bus.
> >
> > -config ASPEED_LPC_CTRL
> > - depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
> > - tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
> > - ---help---
> > - Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
> > - ioctl()s, the driver also provides a read/write interface to a
> > BMC ram
> > - region where the host LPC read/write region can be buffered.
> > -
> > -config ASPEED_LPC_SNOOP
> > - tristate "Aspeed ast2500 HOST LPC snoop support"
> > - depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
> > - help
> > - Provides a driver to control the LPC snoop interface which
> > - allows the BMC to listen on and save the data written by
> > - the host to an arbitrary LPC I/O port.
> > -
> > config PCI_ENDPOINT_TEST
> > depends on PCI
> > select CRC32
> > diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
> > index d5b7d3404dc7..b9affcdaa3d6 100644
> > --- a/drivers/misc/Makefile
> > +++ b/drivers/misc/Makefile
> > @@ -54,8 +54,6 @@ obj-$(CONFIG_GENWQE) += genwqe/
> > obj-$(CONFIG_ECHO) += echo/
> > obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
> > obj-$(CONFIG_CXL_BASE) += cxl/
> > -obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o
> > -obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o
> > obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
> > obj-$(CONFIG_OCXL) += ocxl/
> > obj-y += cardreader/
> > diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
> > index c07b4a85253f..b750a88547c7 100644
> > --- a/drivers/soc/Kconfig
> > +++ b/drivers/soc/Kconfig
> > @@ -2,6 +2,7 @@ menu "SOC (System On Chip) specific Drivers"
> >
> > source "drivers/soc/actions/Kconfig"
> > source "drivers/soc/amlogic/Kconfig"
> > +source "drivers/soc/aspeed/Kconfig"
> > source "drivers/soc/atmel/Kconfig"
> > source "drivers/soc/bcm/Kconfig"
> > source "drivers/soc/fsl/Kconfig"
> > diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
> > index 90b686e586c6..83a032db
Re: [PATCH v2] soc: add aspeed folder and misc drivers
On Mon, Apr 22, 2019 at 10:54 AM Patrick Venture wrote:
>
> Create a SoC folder for the ASPEED parts and place the misc drivers
> currently present into this folder. These drivers are not generic part
> drivers, but rather only apply to the ASPEED SoCs.
>
> Signed-off-by: Patrick Venture
> ---
> v2:
> Added configuration option for ASPEED to soc/Makefile
> ---
> drivers/misc/Kconfig | 16
> drivers/misc/Makefile | 2 --
> drivers/soc/Kconfig | 1 +
> drivers/soc/Makefile | 1 +
> drivers/soc/aspeed/Kconfig| 19 +++
> drivers/soc/aspeed/Makefile | 2 ++
> .../{misc => soc/aspeed}/aspeed-lpc-ctrl.c| 0
> .../{misc => soc/aspeed}/aspeed-lpc-snoop.c | 0
> 8 files changed, 23 insertions(+), 18 deletions(-)
> create mode 100644 drivers/soc/aspeed/Kconfig
> create mode 100644 drivers/soc/aspeed/Makefile
> rename drivers/{misc => soc/aspeed}/aspeed-lpc-ctrl.c (100%)
> rename drivers/{misc => soc/aspeed}/aspeed-lpc-snoop.c (100%)
>
> diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
> index 42ab8ec92a04..b80cb6af0cb4 100644
> --- a/drivers/misc/Kconfig
> +++ b/drivers/misc/Kconfig
> @@ -496,22 +496,6 @@ config VEXPRESS_SYSCFG
> bus. System Configuration interface is one of the possible means
> of generating transactions on this bus.
>
> -config ASPEED_LPC_CTRL
> - depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
> - tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
> - ---help---
> - Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
> - ioctl()s, the driver also provides a read/write interface to a BMC
> ram
> - region where the host LPC read/write region can be buffered.
> -
> -config ASPEED_LPC_SNOOP
> - tristate "Aspeed ast2500 HOST LPC snoop support"
> - depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
> - help
> - Provides a driver to control the LPC snoop interface which
> - allows the BMC to listen on and save the data written by
> - the host to an arbitrary LPC I/O port.
> -
> config PCI_ENDPOINT_TEST
> depends on PCI
> select CRC32
> diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
> index d5b7d3404dc7..b9affcdaa3d6 100644
> --- a/drivers/misc/Makefile
> +++ b/drivers/misc/Makefile
> @@ -54,8 +54,6 @@ obj-$(CONFIG_GENWQE) += genwqe/
> obj-$(CONFIG_ECHO) += echo/
> obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
> obj-$(CONFIG_CXL_BASE) += cxl/
> -obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o
> -obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o
> obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
> obj-$(CONFIG_OCXL) += ocxl/
> obj-y += cardreader/
> diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
> index c07b4a85253f..b750a88547c7 100644
> --- a/drivers/soc/Kconfig
> +++ b/drivers/soc/Kconfig
> @@ -2,6 +2,7 @@ menu "SOC (System On Chip) specific Drivers"
>
> source "drivers/soc/actions/Kconfig"
> source "drivers/soc/amlogic/Kconfig"
> +source "drivers/soc/aspeed/Kconfig"
> source "drivers/soc/atmel/Kconfig"
> source "drivers/soc/bcm/Kconfig"
> source "drivers/soc/fsl/Kconfig"
> diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
> index 90b686e586c6..814128fe479f 100644
> --- a/drivers/soc/Makefile
> +++ b/drivers/soc/Makefile
> @@ -4,6 +4,7 @@
> #
>
> obj-$(CONFIG_ARCH_ACTIONS) += actions/
> +obj-$(CONFIG_ARCH_ASPEED) += aspeed/
> obj-$(CONFIG_ARCH_AT91)+= atmel/
> obj-y += bcm/
> obj-$(CONFIG_ARCH_DOVE)+= dove/
> diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig
> new file mode 100644
> index ..457282cd1da5
> --- /dev/null
> +++ b/drivers/soc/aspeed/Kconfig
> @@ -0,0 +1,19 @@
> +menu "Aspeed SoC drivers"
> +
> +config ASPEED_LPC_CTRL
> + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
> + tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
> + ---help---
> + Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
> + ioctl()s, the driver also provides a read/write interface to a BMC
> ram
> + region where the host LPC read/write region can be buffered.
> +
>
[PATCH v2] soc: add aspeed folder and misc drivers
Create a SoC folder for the ASPEED parts and place the misc drivers
currently present into this folder. These drivers are not generic part
drivers, but rather only apply to the ASPEED SoCs.
Signed-off-by: Patrick Venture
---
v2:
Added configuration option for ASPEED to soc/Makefile
---
drivers/misc/Kconfig | 16
drivers/misc/Makefile | 2 --
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/aspeed/Kconfig| 19 +++
drivers/soc/aspeed/Makefile | 2 ++
.../{misc => soc/aspeed}/aspeed-lpc-ctrl.c| 0
.../{misc => soc/aspeed}/aspeed-lpc-snoop.c | 0
8 files changed, 23 insertions(+), 18 deletions(-)
create mode 100644 drivers/soc/aspeed/Kconfig
create mode 100644 drivers/soc/aspeed/Makefile
rename drivers/{misc => soc/aspeed}/aspeed-lpc-ctrl.c (100%)
rename drivers/{misc => soc/aspeed}/aspeed-lpc-snoop.c (100%)
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 42ab8ec92a04..b80cb6af0cb4 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -496,22 +496,6 @@ config VEXPRESS_SYSCFG
bus. System Configuration interface is one of the possible means
of generating transactions on this bus.
-config ASPEED_LPC_CTRL
- depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
- tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
- ---help---
- Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
- ioctl()s, the driver also provides a read/write interface to a BMC ram
- region where the host LPC read/write region can be buffered.
-
-config ASPEED_LPC_SNOOP
- tristate "Aspeed ast2500 HOST LPC snoop support"
- depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
- help
- Provides a driver to control the LPC snoop interface which
- allows the BMC to listen on and save the data written by
- the host to an arbitrary LPC I/O port.
-
config PCI_ENDPOINT_TEST
depends on PCI
select CRC32
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index d5b7d3404dc7..b9affcdaa3d6 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -54,8 +54,6 @@ obj-$(CONFIG_GENWQE) += genwqe/
obj-$(CONFIG_ECHO) += echo/
obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
obj-$(CONFIG_CXL_BASE) += cxl/
-obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o
-obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o
obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
obj-$(CONFIG_OCXL) += ocxl/
obj-y += cardreader/
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index c07b4a85253f..b750a88547c7 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -2,6 +2,7 @@ menu "SOC (System On Chip) specific Drivers"
source "drivers/soc/actions/Kconfig"
source "drivers/soc/amlogic/Kconfig"
+source "drivers/soc/aspeed/Kconfig"
source "drivers/soc/atmel/Kconfig"
source "drivers/soc/bcm/Kconfig"
source "drivers/soc/fsl/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 90b686e586c6..814128fe479f 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -4,6 +4,7 @@
#
obj-$(CONFIG_ARCH_ACTIONS) += actions/
+obj-$(CONFIG_ARCH_ASPEED) += aspeed/
obj-$(CONFIG_ARCH_AT91)+= atmel/
obj-y += bcm/
obj-$(CONFIG_ARCH_DOVE)+= dove/
diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig
new file mode 100644
index ..457282cd1da5
--- /dev/null
+++ b/drivers/soc/aspeed/Kconfig
@@ -0,0 +1,19 @@
+menu "Aspeed SoC drivers"
+
+config ASPEED_LPC_CTRL
+ depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
+ tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
+ ---help---
+ Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
+ ioctl()s, the driver also provides a read/write interface to a BMC ram
+ region where the host LPC read/write region can be buffered.
+
+config ASPEED_LPC_SNOOP
+ tristate "Aspeed ast2500 HOST LPC snoop support"
+ depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
+ help
+ Provides a driver to control the LPC snoop interface which
+ allows the BMC to listen on and save the data written by
+ the host to an arbitrary LPC I/O port.
+
+
diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile
new file mode 100644
index ..cfaa9adc67b5
--- /dev/null
+++ b/drivers/soc/aspeed/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONF
[PATCH] soc: add aspeed folder and misc drivers
Create a SoC folder for the ASPEED parts and place the misc drivers
currently present into this folder. These drivers are not generic part
drivers, but rather only apply to the ASPEED SoCs.
Signed-off-by: Patrick Venture
---
drivers/misc/Kconfig | 16
drivers/misc/Makefile | 2 --
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/aspeed/Kconfig| 19 +++
drivers/soc/aspeed/Makefile | 2 ++
.../{misc => soc/aspeed}/aspeed-lpc-ctrl.c| 0
.../{misc => soc/aspeed}/aspeed-lpc-snoop.c | 0
8 files changed, 23 insertions(+), 18 deletions(-)
create mode 100644 drivers/soc/aspeed/Kconfig
create mode 100644 drivers/soc/aspeed/Makefile
rename drivers/{misc => soc/aspeed}/aspeed-lpc-ctrl.c (100%)
rename drivers/{misc => soc/aspeed}/aspeed-lpc-snoop.c (100%)
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 42ab8ec92a04..b80cb6af0cb4 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -496,22 +496,6 @@ config VEXPRESS_SYSCFG
bus. System Configuration interface is one of the possible means
of generating transactions on this bus.
-config ASPEED_LPC_CTRL
- depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
- tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
- ---help---
- Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
- ioctl()s, the driver also provides a read/write interface to a BMC ram
- region where the host LPC read/write region can be buffered.
-
-config ASPEED_LPC_SNOOP
- tristate "Aspeed ast2500 HOST LPC snoop support"
- depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
- help
- Provides a driver to control the LPC snoop interface which
- allows the BMC to listen on and save the data written by
- the host to an arbitrary LPC I/O port.
-
config PCI_ENDPOINT_TEST
depends on PCI
select CRC32
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index d5b7d3404dc7..b9affcdaa3d6 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -54,8 +54,6 @@ obj-$(CONFIG_GENWQE) += genwqe/
obj-$(CONFIG_ECHO) += echo/
obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
obj-$(CONFIG_CXL_BASE) += cxl/
-obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o
-obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o
obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
obj-$(CONFIG_OCXL) += ocxl/
obj-y += cardreader/
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index c07b4a85253f..b750a88547c7 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -2,6 +2,7 @@ menu "SOC (System On Chip) specific Drivers"
source "drivers/soc/actions/Kconfig"
source "drivers/soc/amlogic/Kconfig"
+source "drivers/soc/aspeed/Kconfig"
source "drivers/soc/atmel/Kconfig"
source "drivers/soc/bcm/Kconfig"
source "drivers/soc/fsl/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 90b686e586c6..83a032db3e44 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -4,6 +4,7 @@
#
obj-$(CONFIG_ARCH_ACTIONS) += actions/
+obj-y += aspeed/
obj-$(CONFIG_ARCH_AT91)+= atmel/
obj-y += bcm/
obj-$(CONFIG_ARCH_DOVE)+= dove/
diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig
new file mode 100644
index ..457282cd1da5
--- /dev/null
+++ b/drivers/soc/aspeed/Kconfig
@@ -0,0 +1,19 @@
+menu "Aspeed SoC drivers"
+
+config ASPEED_LPC_CTRL
+ depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
+ tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
+ ---help---
+ Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
+ ioctl()s, the driver also provides a read/write interface to a BMC ram
+ region where the host LPC read/write region can be buffered.
+
+config ASPEED_LPC_SNOOP
+ tristate "Aspeed ast2500 HOST LPC snoop support"
+ depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
+ help
+ Provides a driver to control the LPC snoop interface which
+ allows the BMC to listen on and save the data written by
+ the host to an arbitrary LPC I/O port.
+
+
diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile
new file mode 100644
index ..cfaa9adc67b5
--- /dev/null
+++ b/drivers/soc/aspeed/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o
+obj-$(CONFIG_AS
[PATCH 3/3] ARM: dts: aspeed: zaius: fixed I2C bus numbers for pcie slots
From: Robert Lippert
The change to include ibm-power9-cfam.dtsi resulted in a renumbering
of all of the I2C bus numbers behind the on-board muxes. This breaks
some tools which have hardcoded the bus numbers.
Add device tree aliases for the I2C buses routed through the PCIe slots
so that they return to their former numbers before the cfam change.
Signed-off-by: Robert Lippert
Signed-off-by: Patrick Venture
---
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 40 ++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
index 51265af622574..c12f89e042efc 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
@@ -7,6 +7,14 @@
model = "Zaius BMC";
compatible = "ingrasys,zaius-bmc", "aspeed,ast2500";
+ aliases {
+ i2c15 = &i2cpcie0;
+ i2c16 = &i2cpcie1;
+ i2c17 = &i2cpcie2;
+ i2c19 = &i2cpcie3;
+ i2c20 = &i2cpcie4;
+ };
+
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
@@ -223,6 +231,27 @@
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
+
+ i2cpcie0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+ i2cpcie1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ i2cpcie2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+ i2ctpm: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
};
/* MUX1 PCA9546A @71h
@@ -253,6 +282,17 @@
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
+
+ i2cpcie3: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+ i2cpcie4: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
};
/* MUX1 PCA9546A @71h
--
2.21.0.392.gf8f6787159e-goog
[PATCH 0/3] update aspeed-bmc-opp-zaius device-tree
Hi, This series contains three updates to the Zaius ASPEED device-tree to add voltrage regulators, and update addresses and aliases. The Infineon and Intersil drivers are staged on hwmon-next, and the trivial device dt-bindings changed are up for review. Maxim Sloyko (1): ARM: dts: aspeed: zaius: add Infineon and Intersil regulators Robert Lippert (2): ARM: dts: aspeed: zaius: update 12V brick I2C address ARM: dts: aspeed: zaius: fixed I2C bus numbers for pcie slots arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 121 +++-- 1 file changed, 113 insertions(+), 8 deletions(-) -- 2.21.0.392.gf8f6787159e-goog
[PATCH 1/3] ARM: dts: aspeed: zaius: add Infineon and Intersil regulators
From: Maxim Sloyko
Add the nodes for the ir38064 and isl68137 devices on the Zaius board.
Signed-off-by: Maxim Sloyko
Signed-off-by: Robert Lippert
Signed-off-by: Patrick Venture
---
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 65 --
1 file changed, 60 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
index 2c5aa90a546d7..63e892f16d050 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
@@ -296,6 +296,32 @@
reg = <0x54>;
};
};
+
+ };
+
+ vrm@64 {
+ compatible = "isil,isl68137";
+ reg = <0x64>;
+ };
+
+ vrm@40 {
+ compatible = "isil,isl68137";
+ reg = <0x40>;
+ };
+
+ vrm@60 {
+ compatible = "isil,isl68137";
+ reg = <0x60>;
+ };
+
+ vrm@43 {
+ compatible = "infineon,ir38064";
+ reg = <0x43>;
+ };
+
+ vrm@41 {
+ compatible = "isil,isl68137";
+ reg = <0x41>;
};
/* Master selector PCA9541A @70h (other master: CPU0)
@@ -311,18 +337,47 @@
/* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
/* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */
/* CPU0 VR ISL68137 0.8V PMBUS @60h */
- /* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @41h */
+ /* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @43h */
/* CPU0 VR ISL68137 1.2V CH47 PMBUS @41h */
+ /* Master selector PCA9541A @70h (other master: CPU0)
+* LM5066I PMBUS @10h
+*/
+ /* 12V SMPS Q54SH12050NNDH @61h */
};
&i2c8 {
status = "okay";
- /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */
- /* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */
- /* CPU1 VR ISL68137 0.8V PMBUS @61h */
+ vrm@64 {
+ compatible = "isil,isl68137";
+ reg = <0x64>;
+ };
+
+ vrm@40 {
+ compatible = "isil,isl68137";
+ reg = <0x40>;
+ };
+
+ vrm@41 {
+ compatible = "isil,isl68137";
+ reg = <0x41>;
+ };
+
+ vrm@42 {
+ compatible = "infineon,ir38064";
+ reg = <0x42>;
+ };
+
+ vrm@60 {
+ compatible = "isil,isl68137";
+ reg = <0x60>;
+ };
+
+ /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @64h */
+ /* CPU1 VR ISL68137 1.2V CH03 PMBUS @40h */
+ /* CPU1 VR ISL68137 1.2V CH47 PMBUS @41h */
/* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */
- /* CPU0 VR ISL68137 1.2V CH47 PMBUS @45h */
+ /* CPU1 VR ISL68137 0.8V PMBUS @60h */
};
--
2.21.0.392.gf8f6787159e-goog
[PATCH 2/3] ARM: dts: aspeed: zaius: update 12V brick I2C address
From: Robert Lippert
The I2C address of the brick is different depending on the board SKU.
Update the values to instantiate addresses which work for most boards.
Signed-off-by: Robert Lippert
Signed-off-by: Patrick Venture
---
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
index 63e892f16d050..51265af622574 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
@@ -328,10 +328,21 @@
* LM5066I PMBUS @10h
*/
- /* 12V Quarter Brick DC/DC Converter Q54SJ12050 @61h */
- power-brick@61 {
+ /*
+* Brick will be one of these types/addresses. Depending
+* on the board SKU only one is actually present and will successfully
+* instantiate while the others will fail the probe operation.
+* These are the PVT (and presumably beyond) addresses:
+*12V Quarter Brick DC/DC Converter Q54SJ12050 @6Ah
+*12V Quarter Brick DC/DC Converter Q54SH12050 @30h
+*/
+ power-brick@6a {
+ compatible = "delta,dps800";
+ reg = <0x6a>;
+ };
+ power-brick@30 {
compatible = "delta,dps800";
- reg = <0x61>;
+ reg = <0x30>;
};
/* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
@@ -342,7 +353,6 @@
/* Master selector PCA9541A @70h (other master: CPU0)
* LM5066I PMBUS @10h
*/
- /* 12V SMPS Q54SH12050NNDH @61h */
};
&i2c8 {
--
2.21.0.392.gf8f6787159e-goog
[PATCH 2/2] dt-bindings: Add isl68137 as a trivial device
The isl68137 is a digital output 7-phrase configurable PWM controller with an AVSBus interface from Intersil. Signed-off-by: Patrick Venture --- Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 92184ef0db2e..747fd3f689dc 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -104,6 +104,8 @@ properties: - isil,isl29028 # Intersil ISL29030 Ambient Light and Proximity Sensor - isil,isl29030 +# Intersil ISL68137 Digital Output Configurable PWM Controller + - isil,isl68137 # 5 Bit Programmable, Pulse-Width Modulator - maxim,ds1050 # Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs -- 2.21.0.392.gf8f6787159e-goog
[PATCH 1/2] dt-bindings: Add ir38064 as a trivial device
The ir38064 is a voltage regulator from Infineon. Signed-off-by: Patrick Venture --- Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index d79fb22bde39..92184ef0db2e 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -92,6 +92,8 @@ properties: - fsl,sgtl5000 # G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface - gmt,g751 +# Infineon IR38064 Voltage Regulator + - infineon,ir38064 # Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz) - infineon,slb9635tt # Infineon SLB9645 I2C TPM (new protocol, max 400khz) -- 2.21.0.392.gf8f6787159e-goog
Re: [PATCH] dt-bindings: Add vendor prefix for intersil
On Tue, Apr 16, 2019 at 7:53 AM Patrick Venture wrote: > > Add vendor prefix for intersil, known as Intersil, a subsidiary of > Renesas Electronic Corporation. > > Signed-off-by: Patrick Venture > --- > Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt > b/Documentation/devicetree/bindings/vendor-prefixes.txt > index 8162b0eb4b50..ffc69a8bedaf 100644 > --- a/Documentation/devicetree/bindings/vendor-prefixes.txt > +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt > @@ -191,6 +191,7 @@ innolux Innolux Corporation > inside-secure INSIDE Secure > intel Intel Corporation > intercontrol Inter Control Group > +intersil Intersil I see there's already isil for this. I'll update my device-tree patches to use isil. > invensense InvenSense Inc. > inversepathInverse Path > iomIomega Corporation > -- > 2.21.0.392.gf8f6787159e-goog >
[PATCH] dt-bindings: Add vendor prefix for intersil
Add vendor prefix for intersil, known as Intersil, a subsidiary of Renesas Electronic Corporation. Signed-off-by: Patrick Venture --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 8162b0eb4b50..ffc69a8bedaf 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -191,6 +191,7 @@ innolux Innolux Corporation inside-secure INSIDE Secure intel Intel Corporation intercontrol Inter Control Group +intersil Intersil invensense InvenSense Inc. inversepathInverse Path iomIomega Corporation -- 2.21.0.392.gf8f6787159e-goog
Re: [PATCH v10 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
On Mon, Apr 8, 2019 at 5:48 PM Andrew Jeffery wrote:
>
>
>
> On Tue, 9 Apr 2019, at 00:12, Patrick Venture wrote:
> > Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
> >
> > Signed-off-by: Patrick Venture
> > Reviewed-by: Rob Herring
>
> Reviewed-by: Andrew Jeffery
>
> > ---
> > Changes for v10:
> > - Chopped out nearly identical information.
> > Changes for v9:
> > - Added missing details about syscon parent
> > Changes for v8:
> > - None
> > Changes for v7:
> > - Moved node under the syscon node it requires
> > Changes for v6:
> > - None
> > Changes for v5:
> > - None
> > Changes for v4:
> > - None
> > Changes for v3:
> > - None
> > Changes for v2:
> > - Added comment about syscon required parameter.
> > ---
> > .../bindings/misc/aspeed-p2a-ctrl.txt | 47 +++
> > 1 file changed, 47 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> >
> > diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > new file mode 100644
> > index 0..854bd67ffec68
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > @@ -0,0 +1,47 @@
> > +==
> > +Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge
> > Control Driver
> > +==
> > +
> > +The bridge is available on platforms with the VGA enabled on the
> > Aspeed device.
> > +In this case, the host has access to a 64KiB window into all of the
> > BMC's
> > +memory. The BMC can disable this bridge. If the bridge is enabled,
> > the host
> > +has read access to all the regions of memory, however the host only
> > has read
> > +and write access depending on a register controlled by the BMC.
> > +
> > +Required properties:
> > +===
> > +
> > + - compatible: must be one of:
> > + - "aspeed,ast2400-p2a-ctrl"
> > + - "aspeed,ast2500-p2a-ctrl"
> > +
> > +Optional properties:
> > +===
> > +
> > +- memory-region: A phandle to a reserved_memory region to be used for
> > the PCI
> > + to AHB mapping
> > +
> > +The p2a-control node should be the child of a syscon node with the
> > required
> > +property:
> > +
> > +- compatible : Should be one of the following:
> > + "aspeed,ast2400-scu", "syscon", "simple-mfd"
> > + "aspeed,g4-scu", "syscon", "simple-mfd"
> > + "aspeed,ast2500-scu", "syscon", "simple-mfd"
> > + "aspeed,g5-scu", "syscon", "simple-mfd"
> > +
> > +Example
> > +===
> > +
> > +g4 Example
> > +--
> > +
> > +syscon: scu@1e6e2000 {
> > + compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
> > + reg = <0x1e6e2000 0x1a8>;
> > +
> > + p2a: p2a-control {
> > + compatible = "aspeed,ast2400-p2a-ctrl";
> > + memory-region = <&reserved_memory>;
> > + };
> > +};
> > --
> > 2.21.0.392.gf8f6787159e-goog
> >
> >
I'm sorry, is there something more I need to do with the patch series?
Sometimes I miss emails.
Thanks,
Patrick
[PATCH v10 2/2] drivers/misc: Add Aspeed P2A control driver
The ASPEED AST2400, and AST2500 in some configurations include a PCI-to-AHB MMIO bridge. This bridge allows a server to read and write in the BMC's physical address space. This feature is especially useful when using this bridge to send large files to the BMC. The host may use this to send down a firmware image by staging data at a specific memory address, and in a coordinated effort with the BMC's software stack and kernel, transmit the bytes. This driver enables the BMC to unlock the PCI bridge on demand, and configure it via ioctl to allow the host to write bytes to an agreed upon location. In the primary use-case, the region to use is known apriori on the BMC, and the host requests this information. Once this request is received, the BMC's software stack will enable the bridge and the region and then using some software flow control (possibly via IPMI packets), copy the bytes down. Once the process is complete, the BMC will disable the bridge and unset any region involved. The default behavior of this bridge when present is: enabled and all regions marked read-write. This driver will fix the regions to be read-only and then disable the bridge entirely. The memory regions protected are: * BMC flash MMIO window * System flash MMIO windows * SOC IO (peripheral MMIO) * DRAM The DRAM region itself is all of DRAM and cannot be further specified. Once the PCI bridge is enabled, the host can read all of DRAM, and if the DRAM section is write-enabled, then it can write to all of it. Signed-off-by: Patrick Venture Reviewed-by: Andrew Jeffery --- Changes for v10: - None Changes for v9: - Stop zeroing out memory that is already zeroed out. Changes for v8: - Promoted u32 address values to u64 to be compatible with either. Changes for v7: - Moved node under the syscon node and changed therefore how it grabs the phandle for the regmap. Changes for v6: - Cleaned up documentation - Added missing machine-readable copyright lines. - Fixed over 80 chars instances. - Changed error from invalid memory-region node to ENODEV. Changes for v5: - Fixup missing exit condition and remove extra jump. Changes for v4: - Added ioctl for reading back the memory-region configuration. - Cleaned up some unused variables. Changes for v3: - Deleted unused read and write methods. Changes for v2: - Dropped unused reads. - Moved call to disable bridge to before registering device. - Switch from using regs to using a syscon regmap. <<< IN PROGRESS - Updated the commit message. <<< TODO - Updated the bit flipped for SCU180_ENP2A - Dropped boolean region_specified variable. - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire - Updated commit message. --- drivers/misc/Kconfig | 8 + drivers/misc/Makefile| 1 + drivers/misc/aspeed-p2a-ctrl.c | 443 +++ include/uapi/linux/aspeed-p2a-ctrl.h | 62 4 files changed, 514 insertions(+) create mode 100644 drivers/misc/aspeed-p2a-ctrl.c create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 42ab8ec92a046..3209ee020b153 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -496,6 +496,14 @@ config VEXPRESS_SYSCFG bus. System Configuration interface is one of the possible means of generating transactions on this bus. +config ASPEED_P2A_CTRL + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" + help + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through + ioctl()s, the driver also provides an interface for userspace mappings to + a pre-defined region. + config ASPEED_LPC_CTRL depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index d5b7d3404dc78..c36239573a5ca 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o +obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c new file mode 100644 index 0..c0521b2ffc6ac --- /dev/null +++ b/drivers/misc/aspeed-p2a-ctrl.c @@ -0,0 +1,443 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 Google Inc + * + * This program is free software; you can redistribute it and/o
[PATCH v10 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture
Reviewed-by: Rob Herring
---
Changes for v10:
- Chopped out nearly identical information.
Changes for v9:
- Added missing details about syscon parent
Changes for v8:
- None
Changes for v7:
- Moved node under the syscon node it requires
Changes for v6:
- None
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- Added comment about syscon required parameter.
---
.../bindings/misc/aspeed-p2a-ctrl.txt | 47 +++
1 file changed, 47 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
new file mode 100644
index 0..854bd67ffec68
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -0,0 +1,47 @@
+==
+Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
Driver
+==
+
+The bridge is available on platforms with the VGA enabled on the Aspeed device.
+In this case, the host has access to a 64KiB window into all of the BMC's
+memory. The BMC can disable this bridge. If the bridge is enabled, the host
+has read access to all the regions of memory, however the host only has read
+and write access depending on a register controlled by the BMC.
+
+Required properties:
+===
+
+ - compatible: must be one of:
+ - "aspeed,ast2400-p2a-ctrl"
+ - "aspeed,ast2500-p2a-ctrl"
+
+Optional properties:
+===
+
+- memory-region: A phandle to a reserved_memory region to be used for the PCI
+ to AHB mapping
+
+The p2a-control node should be the child of a syscon node with the required
+property:
+
+- compatible : Should be one of the following:
+ "aspeed,ast2400-scu", "syscon", "simple-mfd"
+ "aspeed,g4-scu", "syscon", "simple-mfd"
+ "aspeed,ast2500-scu", "syscon", "simple-mfd"
+ "aspeed,g5-scu", "syscon", "simple-mfd"
+
+Example
+===
+
+g4 Example
+--
+
+syscon: scu@1e6e2000 {
+ compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
+ reg = <0x1e6e2000 0x1a8>;
+
+ p2a: p2a-control {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ memory-region = <&reserved_memory>;
+ };
+};
--
2.21.0.392.gf8f6787159e-goog
Re: [PATCH v9 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
On Sun, Apr 7, 2019 at 7:03 PM Andrew Jeffery wrote:
>
>
>
> On Fri, 5 Apr 2019, at 01:55, Patrick Venture wrote:
> > Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
> >
> > Signed-off-by: Patrick Venture
> > Reviewed-by: Rob Herring
> > ---
> > Changes for v9:
> > - Added missing details about syscon parent
> > Changes for v8:
> > - None
> > Changes for v7:
> > - Moved node under the syscon node it requires
> > Changes for v6:
> > - None
> > Changes for v5:
> > - None
> > Changes for v4:
> > - None
> > Changes for v3:
> > - None
> > Changes for v2:
> > - Added comment about syscon required parameter.
> > ---
> > .../bindings/misc/aspeed-p2a-ctrl.txt | 56 +++
> > 1 file changed, 56 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> >
> > diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > new file mode 100644
> > index 0..05ed654848b60
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > @@ -0,0 +1,56 @@
> > +==
> > +Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge
> > Control Driver
> > +==
> > +
> > +The bridge is available on platforms with the VGA enabled on the
> > Aspeed device.
> > +In this case, the host has access to a 64KiB window into all of the
> > BMC's
> > +memory. The BMC can disable this bridge. If the bridge is enabled,
> > the host
> > +has read access to all the regions of memory, however the host only
> > has read
> > +and write access depending on a register controlled by the BMC.
> > +
> > +Required properties:
> > +===
> > +
> > + - compatible: must be one of:
> > + - "aspeed,ast2400-p2a-ctrl"
> > + - "aspeed,ast2500-p2a-ctrl"
> > +
> > +Optional properties:
> > +===
> > +
> > +- memory-region: A phandle to a reserved_memory region to be used for
> > the PCI
> > + to AHB mapping
> > +
> > +The p2a-control node should be the child of a syscon node with the
> > required
> > +property:
> > +
> > +- compatible : Should be one of the following:
> > + "aspeed,ast2400-scu", "syscon", "simple-mfd"
> > + "aspeed,g4-scu", "syscon", "simple-mfd"
> > + "aspeed,ast2500-scu", "syscon", "simple-mfd"
> > + "aspeed,g5-scu", "syscon", "simple-mfd"
> > +
> > +The aspeed-p2a-ctrl node should be the child of a syscon node with the
> > required
> > +property:
> > +
> > +- compatible : Should be one of the following:
> > + "aspeed,ast2400-scu", "syscon", "simple-mfd"
> > + "aspeed,g4-scu", "syscon", "simple-mfd"
> > + "aspeed,ast2500-scu", "syscon", "simple-mfd"
> > + "aspeed,g5-scu", "syscon", "simple-mfd"
>
> Agh, now the info's here twice!
Agh! I don't even know how that happened. Perhaps I was overzealous
in my pasting! I can fix it.
>
> Next time, surely :D
>
> Unless Greg or Rob want to chop one out as they apply it? It looks good to
> me otherwise.
>
> Andrew
>
> > +
> > +Example
> > +===
> > +
> > +g4 Example
> > +--
> > +
> > +syscon: scu@1e6e2000 {
> > + compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
> > + reg = <0x1e6e2000 0x1a8>;
> > +
> > + p2a: p2a-control {
> > + compatible = "aspeed,ast2400-p2a-ctrl";
> > + memory-region = <&reserved_memory>;
> > + };
> > +};
> > --
> > 2.21.0.392.gf8f6787159e-goog
> >
> >
[PATCH v9 2/2] drivers/misc: Add Aspeed P2A control driver
The ASPEED AST2400, and AST2500 in some configurations include a PCI-to-AHB MMIO bridge. This bridge allows a server to read and write in the BMC's physical address space. This feature is especially useful when using this bridge to send large files to the BMC. The host may use this to send down a firmware image by staging data at a specific memory address, and in a coordinated effort with the BMC's software stack and kernel, transmit the bytes. This driver enables the BMC to unlock the PCI bridge on demand, and configure it via ioctl to allow the host to write bytes to an agreed upon location. In the primary use-case, the region to use is known apriori on the BMC, and the host requests this information. Once this request is received, the BMC's software stack will enable the bridge and the region and then using some software flow control (possibly via IPMI packets), copy the bytes down. Once the process is complete, the BMC will disable the bridge and unset any region involved. The default behavior of this bridge when present is: enabled and all regions marked read-write. This driver will fix the regions to be read-only and then disable the bridge entirely. The memory regions protected are: * BMC flash MMIO window * System flash MMIO windows * SOC IO (peripheral MMIO) * DRAM The DRAM region itself is all of DRAM and cannot be further specified. Once the PCI bridge is enabled, the host can read all of DRAM, and if the DRAM section is write-enabled, then it can write to all of it. Signed-off-by: Patrick Venture Reviewed-by: Andrew Jeffery --- Changes for v9: - Stop zeroing out memory that is already zeroed out. Changes for v8: - Promoted u32 address values to u64 to be compatible with either. Changes for v7: - Moved node under the syscon node and changed therefore how it grabs the phandle for the regmap. Changes for v6: - Cleaned up documentation - Added missing machine-readable copyright lines. - Fixed over 80 chars instances. - Changed error from invalid memory-region node to ENODEV. Changes for v5: - Fixup missing exit condition and remove extra jump. Changes for v4: - Added ioctl for reading back the memory-region configuration. - Cleaned up some unused variables. Changes for v3: - Deleted unused read and write methods. Changes for v2: - Dropped unused reads. - Moved call to disable bridge to before registering device. - Switch from using regs to using a syscon regmap. <<< IN PROGRESS - Updated the commit message. <<< TODO - Updated the bit flipped for SCU180_ENP2A - Dropped boolean region_specified variable. - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire - Updated commit message. --- drivers/misc/Kconfig | 8 + drivers/misc/Makefile| 1 + drivers/misc/aspeed-p2a-ctrl.c | 443 +++ include/uapi/linux/aspeed-p2a-ctrl.h | 62 4 files changed, 514 insertions(+) create mode 100644 drivers/misc/aspeed-p2a-ctrl.c create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 42ab8ec92a046..3209ee020b153 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -496,6 +496,14 @@ config VEXPRESS_SYSCFG bus. System Configuration interface is one of the possible means of generating transactions on this bus. +config ASPEED_P2A_CTRL + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" + help + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through + ioctl()s, the driver also provides an interface for userspace mappings to + a pre-defined region. + config ASPEED_LPC_CTRL depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index d5b7d3404dc78..c36239573a5ca 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o +obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c new file mode 100644 index 0..c0521b2ffc6ac --- /dev/null +++ b/drivers/misc/aspeed-p2a-ctrl.c @@ -0,0 +1,443 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 Google Inc + * + * This program is free software; you can redistribute it and/or + * modify it un
[PATCH v9 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture
Reviewed-by: Rob Herring
---
Changes for v9:
- Added missing details about syscon parent
Changes for v8:
- None
Changes for v7:
- Moved node under the syscon node it requires
Changes for v6:
- None
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- Added comment about syscon required parameter.
---
.../bindings/misc/aspeed-p2a-ctrl.txt | 56 +++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
new file mode 100644
index 0..05ed654848b60
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -0,0 +1,56 @@
+==
+Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
Driver
+==
+
+The bridge is available on platforms with the VGA enabled on the Aspeed device.
+In this case, the host has access to a 64KiB window into all of the BMC's
+memory. The BMC can disable this bridge. If the bridge is enabled, the host
+has read access to all the regions of memory, however the host only has read
+and write access depending on a register controlled by the BMC.
+
+Required properties:
+===
+
+ - compatible: must be one of:
+ - "aspeed,ast2400-p2a-ctrl"
+ - "aspeed,ast2500-p2a-ctrl"
+
+Optional properties:
+===
+
+- memory-region: A phandle to a reserved_memory region to be used for the PCI
+ to AHB mapping
+
+The p2a-control node should be the child of a syscon node with the required
+property:
+
+- compatible : Should be one of the following:
+ "aspeed,ast2400-scu", "syscon", "simple-mfd"
+ "aspeed,g4-scu", "syscon", "simple-mfd"
+ "aspeed,ast2500-scu", "syscon", "simple-mfd"
+ "aspeed,g5-scu", "syscon", "simple-mfd"
+
+The aspeed-p2a-ctrl node should be the child of a syscon node with the required
+property:
+
+- compatible : Should be one of the following:
+ "aspeed,ast2400-scu", "syscon", "simple-mfd"
+ "aspeed,g4-scu", "syscon", "simple-mfd"
+ "aspeed,ast2500-scu", "syscon", "simple-mfd"
+ "aspeed,g5-scu", "syscon", "simple-mfd"
+
+Example
+===
+
+g4 Example
+--
+
+syscon: scu@1e6e2000 {
+ compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
+ reg = <0x1e6e2000 0x1a8>;
+
+ p2a: p2a-control {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ memory-region = <&reserved_memory>;
+ };
+};
--
2.21.0.392.gf8f6787159e-goog
Re: [PATCH v8 2/2] drivers/misc: Add Aspeed P2A control driver
On Tue, Apr 2, 2019 at 2:25 PM Patrick Venture wrote: > > On Mon, Apr 1, 2019 at 8:36 PM Andrew Jeffery wrote: > > > > > > > > On Thu, 28 Mar 2019, at 07:52, Patrick Venture wrote: > > > The ASPEED AST2400, and AST2500 in some configurations include a > > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > > > in the BMC's physical address space. This feature is especially useful > > > when using this bridge to send large files to the BMC. > > > > > > The host may use this to send down a firmware image by staging data at a > > > specific memory address, and in a coordinated effort with the BMC's > > > software stack and kernel, transmit the bytes. > > > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > > configure it via ioctl to allow the host to write bytes to an agreed > > > upon location. In the primary use-case, the region to use is known > > > apriori on the BMC, and the host requests this information. Once this > > > request is received, the BMC's software stack will enable the bridge and > > > the region and then using some software flow control (possibly via IPMI > > > packets), copy the bytes down. Once the process is complete, the BMC > > > will disable the bridge and unset any region involved. > > > > > > The default behavior of this bridge when present is: enabled and all > > > regions marked read-write. This driver will fix the regions to be > > > read-only and then disable the bridge entirely. > > > > > > The memory regions protected are: > > > * BMC flash MMIO window > > > * System flash MMIO windows > > > * SOC IO (peripheral MMIO) > > > * DRAM > > > > > > The DRAM region itself is all of DRAM and cannot be further specified. > > > Once the PCI bridge is enabled, the host can read all of DRAM, and if > > > the DRAM section is write-enabled, then it can write to all of it. > > > > > > Signed-off-by: Patrick Venture > > > --- > > > Changes for v8: > > > - Promoted u32 address values to u64 to be compatible with either. > > > Changes for v7: > > > - Moved node under the syscon node and changed therefore how it grabs > > > the phandle for the regmap. > > > Changes for v6: > > > - Cleaned up documentation > > > - Added missing machine-readable copyright lines. > > > - Fixed over 80 chars instances. > > > - Changed error from invalid memory-region node to ENODEV. > > > Changes for v5: > > > - Fixup missing exit condition and remove extra jump. > > > Changes for v4: > > > - Added ioctl for reading back the memory-region configuration. > > > - Cleaned up some unused variables. > > > Changes for v3: > > > - Deleted unused read and write methods. > > > Changes for v2: > > > - Dropped unused reads. > > > - Moved call to disable bridge to before registering device. > > > - Switch from using regs to using a syscon regmap. <<< IN PROGRESS > > > - Updated the commit message. <<< TODO > > > - Updated the bit flipped for SCU180_ENP2A > > > - Dropped boolean region_specified variable. > > > - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. > > > - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire > > > - Updated commit message. > > > --- > > > drivers/misc/Kconfig | 8 + > > > drivers/misc/Makefile| 1 + > > > drivers/misc/aspeed-p2a-ctrl.c | 448 +++ > > > include/uapi/linux/aspeed-p2a-ctrl.h | 62 > > > 4 files changed, 519 insertions(+) > > > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > > > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > > > > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > > > index 42ab8ec92a046..3209ee020b153 100644 > > > --- a/drivers/misc/Kconfig > > > +++ b/drivers/misc/Kconfig > > > @@ -496,6 +496,14 @@ config VEXPRESS_SYSCFG > > > bus. System Configuration interface is one of the possible means > > > of generating transactions on this bus. > > > > > > +config ASPEED_P2A_CTRL > > > + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > > > + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge > > > control" > > >
Re: [PATCH v8 2/2] drivers/misc: Add Aspeed P2A control driver
On Mon, Apr 1, 2019 at 8:36 PM Andrew Jeffery wrote: > > > > On Thu, 28 Mar 2019, at 07:52, Patrick Venture wrote: > > The ASPEED AST2400, and AST2500 in some configurations include a > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > > in the BMC's physical address space. This feature is especially useful > > when using this bridge to send large files to the BMC. > > > > The host may use this to send down a firmware image by staging data at a > > specific memory address, and in a coordinated effort with the BMC's > > software stack and kernel, transmit the bytes. > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > configure it via ioctl to allow the host to write bytes to an agreed > > upon location. In the primary use-case, the region to use is known > > apriori on the BMC, and the host requests this information. Once this > > request is received, the BMC's software stack will enable the bridge and > > the region and then using some software flow control (possibly via IPMI > > packets), copy the bytes down. Once the process is complete, the BMC > > will disable the bridge and unset any region involved. > > > > The default behavior of this bridge when present is: enabled and all > > regions marked read-write. This driver will fix the regions to be > > read-only and then disable the bridge entirely. > > > > The memory regions protected are: > > * BMC flash MMIO window > > * System flash MMIO windows > > * SOC IO (peripheral MMIO) > > * DRAM > > > > The DRAM region itself is all of DRAM and cannot be further specified. > > Once the PCI bridge is enabled, the host can read all of DRAM, and if > > the DRAM section is write-enabled, then it can write to all of it. > > > > Signed-off-by: Patrick Venture > > --- > > Changes for v8: > > - Promoted u32 address values to u64 to be compatible with either. > > Changes for v7: > > - Moved node under the syscon node and changed therefore how it grabs > > the phandle for the regmap. > > Changes for v6: > > - Cleaned up documentation > > - Added missing machine-readable copyright lines. > > - Fixed over 80 chars instances. > > - Changed error from invalid memory-region node to ENODEV. > > Changes for v5: > > - Fixup missing exit condition and remove extra jump. > > Changes for v4: > > - Added ioctl for reading back the memory-region configuration. > > - Cleaned up some unused variables. > > Changes for v3: > > - Deleted unused read and write methods. > > Changes for v2: > > - Dropped unused reads. > > - Moved call to disable bridge to before registering device. > > - Switch from using regs to using a syscon regmap. <<< IN PROGRESS > > - Updated the commit message. <<< TODO > > - Updated the bit flipped for SCU180_ENP2A > > - Dropped boolean region_specified variable. > > - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. > > - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire > > - Updated commit message. > > --- > > drivers/misc/Kconfig | 8 + > > drivers/misc/Makefile| 1 + > > drivers/misc/aspeed-p2a-ctrl.c | 448 +++ > > include/uapi/linux/aspeed-p2a-ctrl.h | 62 > > 4 files changed, 519 insertions(+) > > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > > index 42ab8ec92a046..3209ee020b153 100644 > > --- a/drivers/misc/Kconfig > > +++ b/drivers/misc/Kconfig > > @@ -496,6 +496,14 @@ config VEXPRESS_SYSCFG > > bus. System Configuration interface is one of the possible means > > of generating transactions on this bus. > > > > +config ASPEED_P2A_CTRL > > + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > > + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" > > + help > > + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings > > through > > + ioctl()s, the driver also provides an interface for userspace > > mappings to > > + a pre-defined region. > > + > > config ASPEED_LPC_CTRL > > depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > > tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" > > diff --git a/drivers/misc/Ma
Re: [PATCH v8 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
On Mon, Apr 1, 2019 at 8:42 PM Andrew Jeffery wrote:
>
> Hi Patrick,
>
> I held off on reviewing this until we'd hashed out what we needed in the
> driver.
>
> I have some comments below.
>
> On Sat, 30 Mar 2019, at 01:40, Patrick Venture wrote:
> > Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
> >
> > Signed-off-by: Patrick Venture
> > Reviewed-by: Rob Herring
> > ---
> > Changes for v8:
> > - None
> > Changes for v7:
> > - Moved node under the syscon node it requires
> > Changes for v6:
> > - None
> > Changes for v5:
> > - None
> > Changes for v4:
> > - None
> > Changes for v3:
> > - None
> > Changes for v2:
> > - Added comment about syscon required parameter.
> > ---
> > .../bindings/misc/aspeed-p2a-ctrl.txt | 48 +++
> > 1 file changed, 48 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> >
> > diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > new file mode 100644
> > index 0..088cc4e3dc54b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > @@ -0,0 +1,48 @@
> > +==
> > +Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge
> > Control Driver
> > +==
> > +
> > +The bridge is available on platforms with the VGA enabled on the
> > Aspeed device.
> > +In this case, the host has access to a 64KiB window into all of the
> > BMC's
> > +memory. The BMC can disable this bridge. If the bridge is enabled,
> > the host
> > +has read access to all the regions of memory, however the host only
> > has read
> > +and write access depending on a register controlled by the BMC.
> > +
> > +Required properties:
> > +===
> > +
> > + - compatible: must be one of:
> > + - "aspeed,ast2400-p2a-ctrl"
> > + - "aspeed,ast2500-p2a-ctrl"
> > +
> > + - syscon: handle to syscon device node controlling PCI.
>
> The p2a-ctrl node is meant to be a child of the syscon. I noted this in my
> review
> of the associated driver - you need to remove the description of the syscon
> property.
Roger that, I'll take a hack at cleaning this up later this week (I'm OOO).
>
> > +
> > +Optional properties:
> > +===
> > +
> > +- memory-region: A phandle to a reserved_memory region to be used for
> > the PCI
> > + to AHB mapping
> > +
> > +The p2a-control node should be the child of a syscon node with the
> > required
> > +property:
> > +
> > +- compatible : Should be one of the following:
> > + "aspeed,ast2400-scu", "syscon", "simple-mfd"
> > + "aspeed,g4-scu", "syscon", "simple-mfd"
> > + "aspeed,ast2500-scu", "syscon", "simple-mfd"
> > + "aspeed,g5-scu", "syscon", "simple-mfd"
>
> The note above should go where you've described the syscon property above.
>
> Cheers,
>
> Andrew
>
> > +
> > +Example:
> > +
> > +g4 Example
> > +--
> > +
> > +syscon: scu@1e6e2000 {
> > + compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
> > + reg = <0x1e6e2000 0x1a8>;
> > +
> > + p2a: p2a-control {
> > + compatible = "aspeed,ast2400-p2a-ctrl";
> > + memory-region = <&reserved_memory>;
> > + };
> > +};
> > --
> > 2.21.0.392.gf8f6787159e-goog
> >
> >
Re: [PATCH v8 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
On Fri, Mar 29, 2019 at 7:59 AM Patrick Venture wrote: > > On Fri, Mar 29, 2019 at 7:56 AM Patrick Venture wrote: > > > > On Fri, Mar 29, 2019 at 6:38 AM Rob Herring wrote: > > > > > > On Thu, Mar 28, 2019 at 12:03 PM Patrick Venture > > > wrote: > > > > > > > > On Thu, Mar 28, 2019 at 9:50 AM Rob Herring wrote: > > > > > > > > > > On Wed, 27 Mar 2019 14:21:55 -0700, Patrick Venture wrote: > > > > > > Document the ast2400, ast2500 PCI-to-AHB bridge control driver > > > > > > bindings. > > > > > > > > > > > > Signed-off-by: Patrick Venture > > > > > > --- > > > > > > Changes for v8: > > > > > > - None > > > > > > Changes for v7: > > > > > > - Moved node under the syscon node it requires > > > > > > Changes for v6: > > > > > > - None > > > > > > Changes for v5: > > > > > > - None > > > > > > Changes for v4: > > > > > > - None > > > > > > Changes for v3: > > > > > > - None > > > > > > Changes for v2: > > > > > > - Added comment about syscon required parameter. > > > > > > --- > > > > > > .../bindings/misc/aspeed-p2a-ctrl.txt | 48 > > > > > > +++ > > > > > > 1 file changed, 48 insertions(+) > > > > > > create mode 100644 > > > > > > Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt > > > > > > > > > > > > > > > > Please add Acked-by/Reviewed-by tags when posting new versions. > > > > > However, > > > > > there's no need to repost patches *only* to add the tags. The upstream > > > > > maintainer will do that for acks received on the version they apply. > > > > > > > > > > If a tag was not added on purpose, please state why and what changed. > > > > > > > > Adding tags in this case is adding a change version? I was doing this > > > > to keep the two patches version-synced. I thought that was required. > > > > There was a version change in the other patch in this set. > > > > > > Adding tags is not considered a change. I gave a Reviewed-by in v7. > > > Subsequent versions should carry that tag if there's no change (or > > > only minor changes) in this patch. What happens in the other patches > > > is not really important. Maintainers are not going to go searching > > > thru the versions to find all the ack/review tags. And if I've already > > > reviewed this, I don't want to look at it again. > > > > Thank you, I didn't realize that had happened. > > I went back through my email and found the line of your email that > included it. I apologize. > > So, before I send the updated patch with your ack -- do I need to send > a v9? or is this just me sending v8 again? Sorry. I see you already answered that when you said that adding a tag isn't considered a change. I have therefore re-sent v8 of this patch with your tag added. > > > > > > > > > Rob
[PATCH v8 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture
Reviewed-by: Rob Herring
---
Changes for v8:
- None
Changes for v7:
- Moved node under the syscon node it requires
Changes for v6:
- None
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- Added comment about syscon required parameter.
---
.../bindings/misc/aspeed-p2a-ctrl.txt | 48 +++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
new file mode 100644
index 0..088cc4e3dc54b
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -0,0 +1,48 @@
+==
+Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
Driver
+==
+
+The bridge is available on platforms with the VGA enabled on the Aspeed device.
+In this case, the host has access to a 64KiB window into all of the BMC's
+memory. The BMC can disable this bridge. If the bridge is enabled, the host
+has read access to all the regions of memory, however the host only has read
+and write access depending on a register controlled by the BMC.
+
+Required properties:
+===
+
+ - compatible: must be one of:
+ - "aspeed,ast2400-p2a-ctrl"
+ - "aspeed,ast2500-p2a-ctrl"
+
+ - syscon: handle to syscon device node controlling PCI.
+
+Optional properties:
+===
+
+- memory-region: A phandle to a reserved_memory region to be used for the PCI
+ to AHB mapping
+
+The p2a-control node should be the child of a syscon node with the required
+property:
+
+- compatible : Should be one of the following:
+ "aspeed,ast2400-scu", "syscon", "simple-mfd"
+ "aspeed,g4-scu", "syscon", "simple-mfd"
+ "aspeed,ast2500-scu", "syscon", "simple-mfd"
+ "aspeed,g5-scu", "syscon", "simple-mfd"
+
+Example:
+
+g4 Example
+--
+
+syscon: scu@1e6e2000 {
+ compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
+ reg = <0x1e6e2000 0x1a8>;
+
+ p2a: p2a-control {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ memory-region = <&reserved_memory>;
+ };
+};
--
2.21.0.392.gf8f6787159e-goog
Re: [PATCH v8 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
On Fri, Mar 29, 2019 at 7:56 AM Patrick Venture wrote: > > On Fri, Mar 29, 2019 at 6:38 AM Rob Herring wrote: > > > > On Thu, Mar 28, 2019 at 12:03 PM Patrick Venture wrote: > > > > > > On Thu, Mar 28, 2019 at 9:50 AM Rob Herring wrote: > > > > > > > > On Wed, 27 Mar 2019 14:21:55 -0700, Patrick Venture wrote: > > > > > Document the ast2400, ast2500 PCI-to-AHB bridge control driver > > > > > bindings. > > > > > > > > > > Signed-off-by: Patrick Venture > > > > > --- > > > > > Changes for v8: > > > > > - None > > > > > Changes for v7: > > > > > - Moved node under the syscon node it requires > > > > > Changes for v6: > > > > > - None > > > > > Changes for v5: > > > > > - None > > > > > Changes for v4: > > > > > - None > > > > > Changes for v3: > > > > > - None > > > > > Changes for v2: > > > > > - Added comment about syscon required parameter. > > > > > --- > > > > > .../bindings/misc/aspeed-p2a-ctrl.txt | 48 > > > > > +++ > > > > > 1 file changed, 48 insertions(+) > > > > > create mode 100644 > > > > > Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt > > > > > > > > > > > > > Please add Acked-by/Reviewed-by tags when posting new versions. However, > > > > there's no need to repost patches *only* to add the tags. The upstream > > > > maintainer will do that for acks received on the version they apply. > > > > > > > > If a tag was not added on purpose, please state why and what changed. > > > > > > Adding tags in this case is adding a change version? I was doing this > > > to keep the two patches version-synced. I thought that was required. > > > There was a version change in the other patch in this set. > > > > Adding tags is not considered a change. I gave a Reviewed-by in v7. > > Subsequent versions should carry that tag if there's no change (or > > only minor changes) in this patch. What happens in the other patches > > is not really important. Maintainers are not going to go searching > > thru the versions to find all the ack/review tags. And if I've already > > reviewed this, I don't want to look at it again. > > Thank you, I didn't realize that had happened. I went back through my email and found the line of your email that included it. I apologize. So, before I send the updated patch with your ack -- do I need to send a v9? or is this just me sending v8 again? > > > > > Rob
Re: [PATCH v8 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
On Fri, Mar 29, 2019 at 6:38 AM Rob Herring wrote: > > On Thu, Mar 28, 2019 at 12:03 PM Patrick Venture wrote: > > > > On Thu, Mar 28, 2019 at 9:50 AM Rob Herring wrote: > > > > > > On Wed, 27 Mar 2019 14:21:55 -0700, Patrick Venture wrote: > > > > Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings. > > > > > > > > Signed-off-by: Patrick Venture > > > > --- > > > > Changes for v8: > > > > - None > > > > Changes for v7: > > > > - Moved node under the syscon node it requires > > > > Changes for v6: > > > > - None > > > > Changes for v5: > > > > - None > > > > Changes for v4: > > > > - None > > > > Changes for v3: > > > > - None > > > > Changes for v2: > > > > - Added comment about syscon required parameter. > > > > --- > > > > .../bindings/misc/aspeed-p2a-ctrl.txt | 48 +++ > > > > 1 file changed, 48 insertions(+) > > > > create mode 100644 > > > > Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt > > > > > > > > > > Please add Acked-by/Reviewed-by tags when posting new versions. However, > > > there's no need to repost patches *only* to add the tags. The upstream > > > maintainer will do that for acks received on the version they apply. > > > > > > If a tag was not added on purpose, please state why and what changed. > > > > Adding tags in this case is adding a change version? I was doing this > > to keep the two patches version-synced. I thought that was required. > > There was a version change in the other patch in this set. > > Adding tags is not considered a change. I gave a Reviewed-by in v7. > Subsequent versions should carry that tag if there's no change (or > only minor changes) in this patch. What happens in the other patches > is not really important. Maintainers are not going to go searching > thru the versions to find all the ack/review tags. And if I've already > reviewed this, I don't want to look at it again. Thank you, I didn't realize that had happened. > > Rob
Re: [PATCH v8 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
On Thu, Mar 28, 2019 at 9:50 AM Rob Herring wrote: > > On Wed, 27 Mar 2019 14:21:55 -0700, Patrick Venture wrote: > > Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings. > > > > Signed-off-by: Patrick Venture > > --- > > Changes for v8: > > - None > > Changes for v7: > > - Moved node under the syscon node it requires > > Changes for v6: > > - None > > Changes for v5: > > - None > > Changes for v4: > > - None > > Changes for v3: > > - None > > Changes for v2: > > - Added comment about syscon required parameter. > > --- > > .../bindings/misc/aspeed-p2a-ctrl.txt | 48 +++ > > 1 file changed, 48 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt > > > > Please add Acked-by/Reviewed-by tags when posting new versions. However, > there's no need to repost patches *only* to add the tags. The upstream > maintainer will do that for acks received on the version they apply. > > If a tag was not added on purpose, please state why and what changed. Adding tags in this case is adding a change version? I was doing this to keep the two patches version-synced. I thought that was required. There was a version change in the other patch in this set.
Re: [PATCH v7 2/2] drivers/misc: Add Aspeed P2A control driver
On Wed, Mar 27, 2019 at 11:52 PM Greg KH wrote:
>
> On Wed, Mar 27, 2019 at 12:01:50PM -0700, Patrick Venture wrote:
> > On Wed, Mar 27, 2019 at 11:54 AM Greg KH wrote:
> > >
> > > On Wed, Mar 27, 2019 at 11:44:36AM -0700, Patrick Venture wrote:
> > > > On Wed, Mar 27, 2019 at 11:28 AM Greg KH
> > > > wrote:
> > > > >
> > > > > On Tue, Mar 12, 2019 at 09:31:01AM -0700, Patrick Venture wrote:
> > > > > > + phys_addr_t mem_base;
> > > > >
> > > > > Is this really a 32bit value?
> > > >
> > > > It's going to be a 32-bit value if this is in the dts for one of the
> > > > correspondingly supported aspeed models.
> > > >
> > > > >
> > > > > Your ioctl thinks it is:
> > > > >
> > > > > > +struct aspeed_p2a_ctrl_mapping {
> > > > > > + __u32 addr;
> > > > >
> > > > > Does this driver not work on a 64bit kernel?
> > > >
> > > > This driver is aimed at only 32-bit hardware (ast2400/2500). I
> > > > modeled the approach after the aspeed-lpc-ctrl driver as it's
> > > > providing similar functionality.
> > > >
> > > > >
> > > > > > + __u32 length;
> > > > > > + __u32 flags;
> > > > > > +};
> > > > >
> > > > > addr really should be __u32 here so you don't have to mess with 32/64
> > > > > bit user/kernel issues, right?
> > > >
> > > > Add is __u32 there. Are you suggesting it shouldn't be?
> > >
> > > Ugh, yes, sorry, I meant to say "__u64".
> > >
> > > If you all insist that this is all that is ever going to be needed, ok,
> > > but I reserve the right to complain in 4 years when this needs to be
> > > changed :)
> >
> > In the event the ast2600 comes out and is 64-bit -- I can't imagine
> > that's likely to happen. I can take solace that this won't be the
> > only thing that needs retrofitting. But it wouldn't kill me to just
> > make the change. I'll just have to tweak it to return failure in the
> > event the address provided isn't found in any region...
> >
> > Is that all that needs to change for 64-bit addressing support - given
> > your read of the driver?
>
> That's all that I noticed at first glance, yes.
Thanks, that's addressed in v8.
> I do dislike having
> custom user/kernel apis for random chips like this, but I don't know of
> a way to have a generic api for them at the moment as I really do not
> know what these chips do :(
>
> One would think that the firmware api would work for you, but given the
> complexity here, it does not seem that it would match up.
Yeah, this driver is basically just allowing control over a bridge and
allows for a convenient common use-case for such bridges. I don't
have enough exposure to see if there's some commonality for
configuration and control of bridges across different chips, and I
would imagine they're very distinct.
>
> thanks,
>
> greg k-h
Thanks
[PATCH v8 2/2] drivers/misc: Add Aspeed P2A control driver
The ASPEED AST2400, and AST2500 in some configurations include a PCI-to-AHB MMIO bridge. This bridge allows a server to read and write in the BMC's physical address space. This feature is especially useful when using this bridge to send large files to the BMC. The host may use this to send down a firmware image by staging data at a specific memory address, and in a coordinated effort with the BMC's software stack and kernel, transmit the bytes. This driver enables the BMC to unlock the PCI bridge on demand, and configure it via ioctl to allow the host to write bytes to an agreed upon location. In the primary use-case, the region to use is known apriori on the BMC, and the host requests this information. Once this request is received, the BMC's software stack will enable the bridge and the region and then using some software flow control (possibly via IPMI packets), copy the bytes down. Once the process is complete, the BMC will disable the bridge and unset any region involved. The default behavior of this bridge when present is: enabled and all regions marked read-write. This driver will fix the regions to be read-only and then disable the bridge entirely. The memory regions protected are: * BMC flash MMIO window * System flash MMIO windows * SOC IO (peripheral MMIO) * DRAM The DRAM region itself is all of DRAM and cannot be further specified. Once the PCI bridge is enabled, the host can read all of DRAM, and if the DRAM section is write-enabled, then it can write to all of it. Signed-off-by: Patrick Venture --- Changes for v8: - Promoted u32 address values to u64 to be compatible with either. Changes for v7: - Moved node under the syscon node and changed therefore how it grabs the phandle for the regmap. Changes for v6: - Cleaned up documentation - Added missing machine-readable copyright lines. - Fixed over 80 chars instances. - Changed error from invalid memory-region node to ENODEV. Changes for v5: - Fixup missing exit condition and remove extra jump. Changes for v4: - Added ioctl for reading back the memory-region configuration. - Cleaned up some unused variables. Changes for v3: - Deleted unused read and write methods. Changes for v2: - Dropped unused reads. - Moved call to disable bridge to before registering device. - Switch from using regs to using a syscon regmap. <<< IN PROGRESS - Updated the commit message. <<< TODO - Updated the bit flipped for SCU180_ENP2A - Dropped boolean region_specified variable. - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire - Updated commit message. --- drivers/misc/Kconfig | 8 + drivers/misc/Makefile| 1 + drivers/misc/aspeed-p2a-ctrl.c | 448 +++ include/uapi/linux/aspeed-p2a-ctrl.h | 62 4 files changed, 519 insertions(+) create mode 100644 drivers/misc/aspeed-p2a-ctrl.c create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 42ab8ec92a046..3209ee020b153 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -496,6 +496,14 @@ config VEXPRESS_SYSCFG bus. System Configuration interface is one of the possible means of generating transactions on this bus. +config ASPEED_P2A_CTRL + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" + help + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through + ioctl()s, the driver also provides an interface for userspace mappings to + a pre-defined region. + config ASPEED_LPC_CTRL depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index d5b7d3404dc78..c36239573a5ca 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o +obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c new file mode 100644 index 0..06afbfe51a279 --- /dev/null +++ b/drivers/misc/aspeed-p2a-ctrl.c @@ -0,0 +1,448 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 Google Inc + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either ve
[PATCH v8 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture
---
Changes for v8:
- None
Changes for v7:
- Moved node under the syscon node it requires
Changes for v6:
- None
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- Added comment about syscon required parameter.
---
.../bindings/misc/aspeed-p2a-ctrl.txt | 48 +++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
new file mode 100644
index 0..088cc4e3dc54b
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -0,0 +1,48 @@
+==
+Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
Driver
+==
+
+The bridge is available on platforms with the VGA enabled on the Aspeed device.
+In this case, the host has access to a 64KiB window into all of the BMC's
+memory. The BMC can disable this bridge. If the bridge is enabled, the host
+has read access to all the regions of memory, however the host only has read
+and write access depending on a register controlled by the BMC.
+
+Required properties:
+===
+
+ - compatible: must be one of:
+ - "aspeed,ast2400-p2a-ctrl"
+ - "aspeed,ast2500-p2a-ctrl"
+
+ - syscon: handle to syscon device node controlling PCI.
+
+Optional properties:
+===
+
+- memory-region: A phandle to a reserved_memory region to be used for the PCI
+ to AHB mapping
+
+The p2a-control node should be the child of a syscon node with the required
+property:
+
+- compatible : Should be one of the following:
+ "aspeed,ast2400-scu", "syscon", "simple-mfd"
+ "aspeed,g4-scu", "syscon", "simple-mfd"
+ "aspeed,ast2500-scu", "syscon", "simple-mfd"
+ "aspeed,g5-scu", "syscon", "simple-mfd"
+
+Example:
+
+g4 Example
+--
+
+syscon: scu@1e6e2000 {
+ compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
+ reg = <0x1e6e2000 0x1a8>;
+
+ p2a: p2a-control {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ memory-region = <&reserved_memory>;
+ };
+};
--
2.21.0.392.gf8f6787159e-goog
Re: [PATCH v7 2/2] drivers/misc: Add Aspeed P2A control driver
On Wed, Mar 27, 2019 at 12:01 PM Patrick Venture wrote:
>
> On Wed, Mar 27, 2019 at 11:54 AM Greg KH wrote:
> >
> > On Wed, Mar 27, 2019 at 11:44:36AM -0700, Patrick Venture wrote:
> > > On Wed, Mar 27, 2019 at 11:28 AM Greg KH
> > > wrote:
> > > >
> > > > On Tue, Mar 12, 2019 at 09:31:01AM -0700, Patrick Venture wrote:
> > > > > + phys_addr_t mem_base;
> > > >
> > > > Is this really a 32bit value?
> > >
> > > It's going to be a 32-bit value if this is in the dts for one of the
> > > correspondingly supported aspeed models.
> > >
> > > >
> > > > Your ioctl thinks it is:
> > > >
> > > > > +struct aspeed_p2a_ctrl_mapping {
> > > > > + __u32 addr;
> > > >
> > > > Does this driver not work on a 64bit kernel?
> > >
> > > This driver is aimed at only 32-bit hardware (ast2400/2500). I
> > > modeled the approach after the aspeed-lpc-ctrl driver as it's
> > > providing similar functionality.
> > >
> > > >
> > > > > + __u32 length;
> > > > > + __u32 flags;
> > > > > +};
> > > >
> > > > addr really should be __u32 here so you don't have to mess with 32/64
> > > > bit user/kernel issues, right?
> > >
> > > Add is __u32 there. Are you suggesting it shouldn't be?
> >
> > Ugh, yes, sorry, I meant to say "__u64".
> >
> > If you all insist that this is all that is ever going to be needed, ok,
> > but I reserve the right to complain in 4 years when this needs to be
> > changed :)
>
> In the event the ast2600 comes out and is 64-bit -- I can't imagine
> that's likely to happen. I can take solace that this won't be the
> only thing that needs retrofitting. But it wouldn't kill me to just
> make the change. I'll just have to tweak it to return failure in the
> event the address provided isn't found in any region...
>
> Is that all that needs to change for 64-bit addressing support - given
> your read of the driver?
I should have v8 for review shortly.
>
> >
> > thanks,
> >
> > greg k-h
Re: [PATCH v7 2/2] drivers/misc: Add Aspeed P2A control driver
On Wed, Mar 27, 2019 at 11:54 AM Greg KH wrote:
>
> On Wed, Mar 27, 2019 at 11:44:36AM -0700, Patrick Venture wrote:
> > On Wed, Mar 27, 2019 at 11:28 AM Greg KH wrote:
> > >
> > > On Tue, Mar 12, 2019 at 09:31:01AM -0700, Patrick Venture wrote:
> > > > + phys_addr_t mem_base;
> > >
> > > Is this really a 32bit value?
> >
> > It's going to be a 32-bit value if this is in the dts for one of the
> > correspondingly supported aspeed models.
> >
> > >
> > > Your ioctl thinks it is:
> > >
> > > > +struct aspeed_p2a_ctrl_mapping {
> > > > + __u32 addr;
> > >
> > > Does this driver not work on a 64bit kernel?
> >
> > This driver is aimed at only 32-bit hardware (ast2400/2500). I
> > modeled the approach after the aspeed-lpc-ctrl driver as it's
> > providing similar functionality.
> >
> > >
> > > > + __u32 length;
> > > > + __u32 flags;
> > > > +};
> > >
> > > addr really should be __u32 here so you don't have to mess with 32/64
> > > bit user/kernel issues, right?
> >
> > Add is __u32 there. Are you suggesting it shouldn't be?
>
> Ugh, yes, sorry, I meant to say "__u64".
>
> If you all insist that this is all that is ever going to be needed, ok,
> but I reserve the right to complain in 4 years when this needs to be
> changed :)
In the event the ast2600 comes out and is 64-bit -- I can't imagine
that's likely to happen. I can take solace that this won't be the
only thing that needs retrofitting. But it wouldn't kill me to just
make the change. I'll just have to tweak it to return failure in the
event the address provided isn't found in any region...
Is that all that needs to change for 64-bit addressing support - given
your read of the driver?
>
> thanks,
>
> greg k-h
Re: [PATCH v7 2/2] drivers/misc: Add Aspeed P2A control driver
On Wed, Mar 27, 2019 at 11:28 AM Greg KH wrote:
>
> On Tue, Mar 12, 2019 at 09:31:01AM -0700, Patrick Venture wrote:
> > + phys_addr_t mem_base;
>
> Is this really a 32bit value?
It's going to be a 32-bit value if this is in the dts for one of the
correspondingly supported aspeed models.
>
> Your ioctl thinks it is:
>
> > +struct aspeed_p2a_ctrl_mapping {
> > + __u32 addr;
>
> Does this driver not work on a 64bit kernel?
This driver is aimed at only 32-bit hardware (ast2400/2500). I
modeled the approach after the aspeed-lpc-ctrl driver as it's
providing similar functionality.
>
> > + __u32 length;
> > + __u32 flags;
> > +};
>
> addr really should be __u32 here so you don't have to mess with 32/64
> bit user/kernel issues, right?
Add is __u32 there. Are you suggesting it shouldn't be?
>
> thanks,
>
> greg k-h
Re: [PATCH v7 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
On Wed, Mar 13, 2019 at 12:54 PM Rob Herring wrote:
>
> On Tue, Mar 12, 2019 at 11:30 AM Patrick Venture wrote:
> >
> > Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
> >
> > Signed-off-by: Patrick Venture
> > ---
> > Changes for v7:
> > - Moved node under the syscon node it requires
> > Changes for v6:
> > - None
> > Changes for v5:
> > - None
> > Changes for v4:
> > - None
> > Changes for v3:
> > - None
> > Changes for v2:
> > - Added comment about syscon required parameter.
> > ---
> > .../bindings/misc/aspeed-p2a-ctrl.txt | 48 +++
> > 1 file changed, 48 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> >
> > diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > new file mode 100644
> > index ..088cc4e3dc54
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > @@ -0,0 +1,48 @@
> > +==
> > +Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
> > Driver
> > +==
> > +
> > +The bridge is available on platforms with the VGA enabled on the Aspeed
> > device.
> > +In this case, the host has access to a 64KiB window into all of the BMC's
> > +memory. The BMC can disable this bridge. If the bridge is enabled, the
> > host
> > +has read access to all the regions of memory, however the host only has
> > read
> > +and write access depending on a register controlled by the BMC.
> > +
> > +Required properties:
> > +===
> > +
> > + - compatible: must be one of:
> > + - "aspeed,ast2400-p2a-ctrl"
> > + - "aspeed,ast2500-p2a-ctrl"
> > +
> > + - syscon: handle to syscon device node controlling PCI.
> > +
> > +Optional properties:
> > +===
> > +
> > +- memory-region: A phandle to a reserved_memory region to be used for the
> > PCI
> > + to AHB mapping
> > +
> > +The p2a-control node should be the child of a syscon node with the required
> > +property:
> > +
> > +- compatible : Should be one of the following:
> > + "aspeed,ast2400-scu", "syscon", "simple-mfd"
> > + "aspeed,g4-scu", "syscon", "simple-mfd"
> > + "aspeed,ast2500-scu", "syscon", "simple-mfd"
> > + "aspeed,g5-scu", "syscon", "simple-mfd"
> > +
> > +Example:
> > +
> > +g4 Example
> > +--
> > +
> > +syscon: scu@1e6e2000 {
> > + compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
> > + reg = <0x1e6e2000 0x1a8>;
> > +
> > + p2a: p2a-control {
> > + compatible = "aspeed,ast2400-p2a-ctrl";
>
> If there's a defined register range, then you could add a reg property
> (even though Linux doesn't use it).
in this case, the device just needs access to two separate registers
controlled by the syscon to which it is now a child.
>
> Either way,
>
> Reviewed-by: Rob Herring
[PATCH v7 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture
---
Changes for v7:
- Moved node under the syscon node it requires
Changes for v6:
- None
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- Added comment about syscon required parameter.
---
.../bindings/misc/aspeed-p2a-ctrl.txt | 48 +++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
new file mode 100644
index ..088cc4e3dc54
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -0,0 +1,48 @@
+==
+Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
Driver
+==
+
+The bridge is available on platforms with the VGA enabled on the Aspeed device.
+In this case, the host has access to a 64KiB window into all of the BMC's
+memory. The BMC can disable this bridge. If the bridge is enabled, the host
+has read access to all the regions of memory, however the host only has read
+and write access depending on a register controlled by the BMC.
+
+Required properties:
+===
+
+ - compatible: must be one of:
+ - "aspeed,ast2400-p2a-ctrl"
+ - "aspeed,ast2500-p2a-ctrl"
+
+ - syscon: handle to syscon device node controlling PCI.
+
+Optional properties:
+===
+
+- memory-region: A phandle to a reserved_memory region to be used for the PCI
+ to AHB mapping
+
+The p2a-control node should be the child of a syscon node with the required
+property:
+
+- compatible : Should be one of the following:
+ "aspeed,ast2400-scu", "syscon", "simple-mfd"
+ "aspeed,g4-scu", "syscon", "simple-mfd"
+ "aspeed,ast2500-scu", "syscon", "simple-mfd"
+ "aspeed,g5-scu", "syscon", "simple-mfd"
+
+Example:
+
+g4 Example
+--
+
+syscon: scu@1e6e2000 {
+ compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
+ reg = <0x1e6e2000 0x1a8>;
+
+ p2a: p2a-control {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ memory-region = <&reserved_memory>;
+ };
+};
--
2.21.0.360.g471c308f928-goog
[PATCH v7 2/2] drivers/misc: Add Aspeed P2A control driver
The ASPEED AST2400, and AST2500 in some configurations include a PCI-to-AHB MMIO bridge. This bridge allows a server to read and write in the BMC's physical address space. This feature is especially useful when using this bridge to send large files to the BMC. The host may use this to send down a firmware image by staging data at a specific memory address, and in a coordinated effort with the BMC's software stack and kernel, transmit the bytes. This driver enables the BMC to unlock the PCI bridge on demand, and configure it via ioctl to allow the host to write bytes to an agreed upon location. In the primary use-case, the region to use is known apriori on the BMC, and the host requests this information. Once this request is received, the BMC's software stack will enable the bridge and the region and then using some software flow control (possibly via IPMI packets), copy the bytes down. Once the process is complete, the BMC will disable the bridge and unset any region involved. The default behavior of this bridge when present is: enabled and all regions marked read-write. This driver will fix the regions to be read-only and then disable the bridge entirely. The memory regions protected are: * BMC flash MMIO window * System flash MMIO windows * SOC IO (peripheral MMIO) * DRAM The DRAM region itself is all of DRAM and cannot be further specified. Once the PCI bridge is enabled, the host can read all of DRAM, and if the DRAM section is write-enabled, then it can write to all of it. Signed-off-by: Patrick Venture --- Changes for v7: - Moved node under the syscon node and changed therefore how it grabs the phandle for the regmap. Changes for v6: - Cleaned up documentation - Added missing machine-readable copyright lines. - Fixed over 80 chars instances. - Changed error from invalid memory-region node to ENODEV. Changes for v5: - Fixup missing exit condition and remove extra jump. Changes for v4: - Added ioctl for reading back the memory-region configuration. - Cleaned up some unused variables. Changes for v3: - Deleted unused read and write methods. Changes for v2: - Dropped unused reads. - Moved call to disable bridge to before registering device. - Switch from using regs to using a syscon regmap. <<< IN PROGRESS - Updated the commit message. <<< TODO - Updated the bit flipped for SCU180_ENP2A - Dropped boolean region_specified variable. - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire - Updated commit message. --- drivers/misc/Kconfig | 8 + drivers/misc/Makefile| 1 + drivers/misc/aspeed-p2a-ctrl.c | 440 +++ include/uapi/linux/aspeed-p2a-ctrl.h | 62 4 files changed, 511 insertions(+) create mode 100644 drivers/misc/aspeed-p2a-ctrl.c create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index f417b06e11c5..9de1bafe5606 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG bus. System Configuration interface is one of the possible means of generating transactions on this bus. +config ASPEED_P2A_CTRL + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" + help + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through + ioctl()s, the driver also provides an interface for userspace mappings to + a pre-defined region. + config ASPEED_LPC_CTRL depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index e39ccbbc1b3a..57577aee354f 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o +obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c new file mode 100644 index ..9b9f831ef334 --- /dev/null +++ b/drivers/misc/aspeed-p2a-ctrl.c @@ -0,0 +1,440 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 Google Inc + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * Provides a si
Re: [PATCH v6 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
On Mon, Mar 11, 2019 at 7:38 PM Rob Herring wrote:
>
> On Mon, Mar 11, 2019 at 6:49 PM Patrick Venture wrote:
> >
> > On Mon, Mar 11, 2019 at 3:20 PM Rob Herring wrote:
> > >
> > > On Mon, Mar 04, 2019 at 10:55:36AM -0800, Patrick Venture wrote:
> > > > Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
> > > >
> > > > Signed-off-by: Patrick Venture
> > > > ---
> > > > Changes for v6:
> > > > - None
> > > > Changes for v5:
> > > > - None
> > > > Changes for v4:
> > > > - None
> > > > Changes for v3:
> > > > - None
> > > > Changes for v2:
> > > > - Added comment about syscon required parameter.
> > > > ---
> > > > .../bindings/misc/aspeed-p2a-ctrl.txt | 32 +++
> > > > 1 file changed, 32 insertions(+)
> > > > create mode 100644
> > > > Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > > > b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > > > new file mode 100644
> > > > index ..1092d62d1c92
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > > > @@ -0,0 +1,32 @@
> > > > +==
> > > > +Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge
> > > > Control Driver
> > > > +==
> > > > +
> > > > +The bridge is available on platforms with the VGA enabled on the
> > > > Aspeed device.
> > > > +In this case, the host has access to a 64KiB window into all of the
> > > > BMC's
> > > > +memory. The BMC can disable this bridge. If the bridge is enabled,
> > > > the host
> > > > +has read access to all the regions of memory, however the host only
> > > > has read
> > > > +and write access depending on a register controlled by the BMC.
> > > > +
> > > > +Required properties:
> > > > +===
> > > > +
> > > > + - compatible: must be one of:
> > > > + - "aspeed,ast2400-p2a-ctrl"
> > > > + - "aspeed,ast2500-p2a-ctrl"
> > > > +
> > > > + - syscon: handle to syscon device node controlling PCI.
> > > > +
> > > > +Optional properties:
> > > > +===
> > > > +
> > > > +- memory-region: A phandle to a reserved_memory region to be used for
> > > > the PCI
> > > > + to AHB mapping
> > > > +
> > > > +Example:
> > > > +
> > > > +p2a: p2a-control@1e6e2000 {
> > > > + compatible = "aspeed,ast2400-p2a-ctrl";
> > > > + memory-region = <&reserved_memory>;
> > > > + syscon = <&syscon>;
> > >
> > > Make this node a child of what you are pointing to instead if this the
> > > only control interface.
> >
> > You're suggesting I make this a child of the syscon?
>
> Yes.
Roger that, will update and send out a patchset v6 with the
corresponding changes.
>
> Rob
Re: [PATCH v6 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
On Mon, Mar 11, 2019 at 3:20 PM Rob Herring wrote:
>
> On Mon, Mar 04, 2019 at 10:55:36AM -0800, Patrick Venture wrote:
> > Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
> >
> > Signed-off-by: Patrick Venture
> > ---
> > Changes for v6:
> > - None
> > Changes for v5:
> > - None
> > Changes for v4:
> > - None
> > Changes for v3:
> > - None
> > Changes for v2:
> > - Added comment about syscon required parameter.
> > ---
> > .../bindings/misc/aspeed-p2a-ctrl.txt | 32 +++
> > 1 file changed, 32 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> >
> > diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > new file mode 100644
> > index ..1092d62d1c92
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
> > @@ -0,0 +1,32 @@
> > +==
> > +Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
> > Driver
> > +==
> > +
> > +The bridge is available on platforms with the VGA enabled on the Aspeed
> > device.
> > +In this case, the host has access to a 64KiB window into all of the BMC's
> > +memory. The BMC can disable this bridge. If the bridge is enabled, the
> > host
> > +has read access to all the regions of memory, however the host only has
> > read
> > +and write access depending on a register controlled by the BMC.
> > +
> > +Required properties:
> > +===
> > +
> > + - compatible: must be one of:
> > + - "aspeed,ast2400-p2a-ctrl"
> > + - "aspeed,ast2500-p2a-ctrl"
> > +
> > + - syscon: handle to syscon device node controlling PCI.
> > +
> > +Optional properties:
> > +===
> > +
> > +- memory-region: A phandle to a reserved_memory region to be used for the
> > PCI
> > + to AHB mapping
> > +
> > +Example:
> > +
> > +p2a: p2a-control@1e6e2000 {
> > + compatible = "aspeed,ast2400-p2a-ctrl";
> > + memory-region = <&reserved_memory>;
> > + syscon = <&syscon>;
>
> Make this node a child of what you are pointing to instead if this the
> only control interface.
You're suggesting I make this a child of the syscon?
>
> Rob
>
>
>
Re: [PATCH v5 2/2] drivers/misc: Add Aspeed P2A control driver
On Mon, Mar 4, 2019 at 5:53 PM Andrew Jeffery wrote: > > > > On Tue, 5 Mar 2019, at 05:01, Patrick Venture wrote: > > On Mon, Mar 4, 2019 at 7:45 AM Patrick Venture wrote: > > > > > > On Sun, Mar 3, 2019 at 4:04 PM Andrew Jeffery wrote: > > > > > > > > Hi Patrick. > > > > > > > > I've got some minor comments, otherwise it looks reasonable to me. > > > > > > > > On Thu, 28 Feb 2019, at 12:22, Patrick Venture wrote: > > > > > The ASPEED AST2400, and AST2500 in some configurations include a > > > > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > > > > > in the BMC's physical address space. This feature is especially > > > > > useful > > > > > when using this bridge to send large files to the BMC. > > > > > > > > > > The host may use this to send down a firmware image by staging data > > > > > at a > > > > > specific memory address, and in a coordinated effort with the BMC's > > > > > software stack and kernel, transmit the bytes. > > > > > > > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > > > > configure it via ioctl to allow the host to write bytes to an agreed > > > > > upon location. In the primary use-case, the region to use is known > > > > > apriori on the BMC, and the host requests this information. Once this > > > > > request is received, the BMC's software stack will enable the bridge > > > > > and > > > > > the region and then using some software flow control (possibly via > > > > > IPMI > > > > > packets), copy the bytes down. Once the process is complete, the BMC > > > > > will disable the bridge and unset any region involved. > > > > > > > > > > The default behavior of this bridge when present is: enabled and all > > > > > regions marked read-write. This driver will fix the regions to be > > > > > read-only and then disable the bridge entirely. > > > > > > > > > > The memory regions protected are: > > > > > * BMC flash MMIO window > > > > > * System flash MMIO windows > > > > > * SOC IO (peripheral MMIO) > > > > > * DRAM > > > > > > > > > > The DRAM region itself is all of DRAM and cannot be further specified. > > > > > Once the PCI bridge is enabled, the host can read all of DRAM, and if > > > > > the DRAM section is write-enabled, then it can write to all of it. > > > > > > > > > > Signed-off-by: Patrick Venture > > > > > --- > > > > > Changes for v5: > > > > > - Fixup missing exit condition and remove extra jump. > > > > > Changes for v4: > > > > > - Added ioctl for reading back the memory-region configuration. > > > > > - Cleaned up some unused variables. > > > > > Changes for v3: > > > > > - Deleted unused read and write methods. > > > > > Changes for v2: > > > > > - Dropped unused reads. > > > > > - Moved call to disable bridge to before registering device. > > > > > - Switch from using regs to using a syscon regmap. <<< IN PROGRESS > > > > > - Updated the commit message. <<< TODO > > > > > - Updated the bit flipped for SCU180_ENP2A > > > > > - Dropped boolean region_specified variable. > > > > > - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. > > > > > - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire > > > > > - Updated commit message. > > > > > --- > > > > > drivers/misc/Kconfig | 8 + > > > > > drivers/misc/Makefile| 1 + > > > > > drivers/misc/aspeed-p2a-ctrl.c | 456 > > > > > +++ > > > > > include/uapi/linux/aspeed-p2a-ctrl.h | 59 > > > > > 4 files changed, 524 insertions(+) > > > > > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > > > > > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > > > > > > > > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > > > > > index f417b06e11c5..9de1bafe5606 100644 > > > > > --- a/drivers/misc/
[PATCH v6 2/2] drivers/misc: Add Aspeed P2A control driver
The ASPEED AST2400, and AST2500 in some configurations include a PCI-to-AHB MMIO bridge. This bridge allows a server to read and write in the BMC's physical address space. This feature is especially useful when using this bridge to send large files to the BMC. The host may use this to send down a firmware image by staging data at a specific memory address, and in a coordinated effort with the BMC's software stack and kernel, transmit the bytes. This driver enables the BMC to unlock the PCI bridge on demand, and configure it via ioctl to allow the host to write bytes to an agreed upon location. In the primary use-case, the region to use is known apriori on the BMC, and the host requests this information. Once this request is received, the BMC's software stack will enable the bridge and the region and then using some software flow control (possibly via IPMI packets), copy the bytes down. Once the process is complete, the BMC will disable the bridge and unset any region involved. The default behavior of this bridge when present is: enabled and all regions marked read-write. This driver will fix the regions to be read-only and then disable the bridge entirely. The memory regions protected are: * BMC flash MMIO window * System flash MMIO windows * SOC IO (peripheral MMIO) * DRAM The DRAM region itself is all of DRAM and cannot be further specified. Once the PCI bridge is enabled, the host can read all of DRAM, and if the DRAM section is write-enabled, then it can write to all of it. Signed-off-by: Patrick Venture --- Changes for v6: - Cleaned up documentation - Added missing machine-readable copyright lines. - Fixed over 80 chars instances. - Changed error from invalid memory-region node to ENODEV. Changes for v5: - Fixup missing exit condition and remove extra jump. Changes for v4: - Added ioctl for reading back the memory-region configuration. - Cleaned up some unused variables. Changes for v3: - Deleted unused read and write methods. Changes for v2: - Dropped unused reads. - Moved call to disable bridge to before registering device. - Switch from using regs to using a syscon regmap. <<< IN PROGRESS - Updated the commit message. <<< TODO - Updated the bit flipped for SCU180_ENP2A - Dropped boolean region_specified variable. - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire - Updated commit message. --- drivers/misc/Kconfig | 8 + drivers/misc/Makefile| 1 + drivers/misc/aspeed-p2a-ctrl.c | 447 +++ include/uapi/linux/aspeed-p2a-ctrl.h | 62 4 files changed, 518 insertions(+) create mode 100644 drivers/misc/aspeed-p2a-ctrl.c create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index f417b06e11c5..9de1bafe5606 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG bus. System Configuration interface is one of the possible means of generating transactions on this bus. +config ASPEED_P2A_CTRL + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" + help + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through + ioctl()s, the driver also provides an interface for userspace mappings to + a pre-defined region. + config ASPEED_LPC_CTRL depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index e39ccbbc1b3a..57577aee354f 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o +obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c new file mode 100644 index ..f79e122a71e2 --- /dev/null +++ b/drivers/misc/aspeed-p2a-ctrl.c @@ -0,0 +1,447 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 Google Inc + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * Provides a simple driver to control the ASPEED P2A interface which allows + * the host to read and write to various regions of the
[PATCH v6 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture
---
Changes for v6:
- None
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- Added comment about syscon required parameter.
---
.../bindings/misc/aspeed-p2a-ctrl.txt | 32 +++
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
new file mode 100644
index ..1092d62d1c92
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -0,0 +1,32 @@
+==
+Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
Driver
+==
+
+The bridge is available on platforms with the VGA enabled on the Aspeed device.
+In this case, the host has access to a 64KiB window into all of the BMC's
+memory. The BMC can disable this bridge. If the bridge is enabled, the host
+has read access to all the regions of memory, however the host only has read
+and write access depending on a register controlled by the BMC.
+
+Required properties:
+===
+
+ - compatible: must be one of:
+ - "aspeed,ast2400-p2a-ctrl"
+ - "aspeed,ast2500-p2a-ctrl"
+
+ - syscon: handle to syscon device node controlling PCI.
+
+Optional properties:
+===
+
+- memory-region: A phandle to a reserved_memory region to be used for the PCI
+ to AHB mapping
+
+Example:
+
+p2a: p2a-control@1e6e2000 {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ memory-region = <&reserved_memory>;
+ syscon = <&syscon>;
+};
--
2.21.0.352.gf09ad66450-goog
Re: [PATCH v5 2/2] drivers/misc: Add Aspeed P2A control driver
On Mon, Mar 4, 2019 at 7:45 AM Patrick Venture wrote: > > On Sun, Mar 3, 2019 at 4:04 PM Andrew Jeffery wrote: > > > > Hi Patrick. > > > > I've got some minor comments, otherwise it looks reasonable to me. > > > > On Thu, 28 Feb 2019, at 12:22, Patrick Venture wrote: > > > The ASPEED AST2400, and AST2500 in some configurations include a > > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > > > in the BMC's physical address space. This feature is especially useful > > > when using this bridge to send large files to the BMC. > > > > > > The host may use this to send down a firmware image by staging data at a > > > specific memory address, and in a coordinated effort with the BMC's > > > software stack and kernel, transmit the bytes. > > > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > > configure it via ioctl to allow the host to write bytes to an agreed > > > upon location. In the primary use-case, the region to use is known > > > apriori on the BMC, and the host requests this information. Once this > > > request is received, the BMC's software stack will enable the bridge and > > > the region and then using some software flow control (possibly via IPMI > > > packets), copy the bytes down. Once the process is complete, the BMC > > > will disable the bridge and unset any region involved. > > > > > > The default behavior of this bridge when present is: enabled and all > > > regions marked read-write. This driver will fix the regions to be > > > read-only and then disable the bridge entirely. > > > > > > The memory regions protected are: > > > * BMC flash MMIO window > > > * System flash MMIO windows > > > * SOC IO (peripheral MMIO) > > > * DRAM > > > > > > The DRAM region itself is all of DRAM and cannot be further specified. > > > Once the PCI bridge is enabled, the host can read all of DRAM, and if > > > the DRAM section is write-enabled, then it can write to all of it. > > > > > > Signed-off-by: Patrick Venture > > > --- > > > Changes for v5: > > > - Fixup missing exit condition and remove extra jump. > > > Changes for v4: > > > - Added ioctl for reading back the memory-region configuration. > > > - Cleaned up some unused variables. > > > Changes for v3: > > > - Deleted unused read and write methods. > > > Changes for v2: > > > - Dropped unused reads. > > > - Moved call to disable bridge to before registering device. > > > - Switch from using regs to using a syscon regmap. <<< IN PROGRESS > > > - Updated the commit message. <<< TODO > > > - Updated the bit flipped for SCU180_ENP2A > > > - Dropped boolean region_specified variable. > > > - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. > > > - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire > > > - Updated commit message. > > > --- > > > drivers/misc/Kconfig | 8 + > > > drivers/misc/Makefile| 1 + > > > drivers/misc/aspeed-p2a-ctrl.c | 456 +++ > > > include/uapi/linux/aspeed-p2a-ctrl.h | 59 > > > 4 files changed, 524 insertions(+) > > > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > > > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > > > > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > > > index f417b06e11c5..9de1bafe5606 100644 > > > --- a/drivers/misc/Kconfig > > > +++ b/drivers/misc/Kconfig > > > @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG > > > bus. System Configuration interface is one of the possible means > > > of generating transactions on this bus. > > > > > > +config ASPEED_P2A_CTRL > > > + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > > > + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge > > > control" > > > + help > > > + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings > > > through > > > + ioctl()s, the driver also provides an interface for userspace > > > mappings to > > > + a pre-defined region. > > > + > > > config ASPEED_LPC_CTRL > > > depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON >
Re: [PATCH v5 2/2] drivers/misc: Add Aspeed P2A control driver
On Mon, Mar 4, 2019 at 8:31 AM Patrick Venture wrote: > > On Mon, Mar 4, 2019 at 8:31 AM Greg Kroah-Hartman > wrote: > > > > On Mon, Mar 04, 2019 at 07:45:31AM -0800, Patrick Venture wrote: > > > On Sun, Mar 3, 2019 at 4:04 PM Andrew Jeffery wrote: > > > > > > > > Hi Patrick. > > > > > > > > I've got some minor comments, otherwise it looks reasonable to me. > > > > > > > > On Thu, 28 Feb 2019, at 12:22, Patrick Venture wrote: > > > > > The ASPEED AST2400, and AST2500 in some configurations include a > > > > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > > > > > in the BMC's physical address space. This feature is especially > > > > > useful > > > > > when using this bridge to send large files to the BMC. > > > > > > > > > > The host may use this to send down a firmware image by staging data > > > > > at a > > > > > specific memory address, and in a coordinated effort with the BMC's > > > > > software stack and kernel, transmit the bytes. > > > > > > > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > > > > configure it via ioctl to allow the host to write bytes to an agreed > > > > > upon location. In the primary use-case, the region to use is known > > > > > apriori on the BMC, and the host requests this information. Once this > > > > > request is received, the BMC's software stack will enable the bridge > > > > > and > > > > > the region and then using some software flow control (possibly via > > > > > IPMI > > > > > packets), copy the bytes down. Once the process is complete, the BMC > > > > > will disable the bridge and unset any region involved. > > > > > > > > > > The default behavior of this bridge when present is: enabled and all > > > > > regions marked read-write. This driver will fix the regions to be > > > > > read-only and then disable the bridge entirely. > > > > > > > > > > The memory regions protected are: > > > > > * BMC flash MMIO window > > > > > * System flash MMIO windows > > > > > * SOC IO (peripheral MMIO) > > > > > * DRAM > > > > > > > > > > The DRAM region itself is all of DRAM and cannot be further specified. > > > > > Once the PCI bridge is enabled, the host can read all of DRAM, and if > > > > > the DRAM section is write-enabled, then it can write to all of it. > > > > > > > > > > Signed-off-by: Patrick Venture > > > > > --- > > > > > Changes for v5: > > > > > - Fixup missing exit condition and remove extra jump. > > > > > Changes for v4: > > > > > - Added ioctl for reading back the memory-region configuration. > > > > > - Cleaned up some unused variables. > > > > > Changes for v3: > > > > > - Deleted unused read and write methods. > > > > > Changes for v2: > > > > > - Dropped unused reads. > > > > > - Moved call to disable bridge to before registering device. > > > > > - Switch from using regs to using a syscon regmap. <<< IN PROGRESS > > > > > - Updated the commit message. <<< TODO > > > > > - Updated the bit flipped for SCU180_ENP2A > > > > > - Dropped boolean region_specified variable. > > > > > - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. > > > > > - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire > > > > > - Updated commit message. > > > > > --- > > > > > drivers/misc/Kconfig | 8 + > > > > > drivers/misc/Makefile| 1 + > > > > > drivers/misc/aspeed-p2a-ctrl.c | 456 > > > > > +++ > > > > > include/uapi/linux/aspeed-p2a-ctrl.h | 59 > > > > > 4 files changed, 524 insertions(+) > > > > > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > > > > > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > > > > > > > > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > > > > > index f417b06e11c5..9de1bafe5606 100644 > > > > > --- a/drivers/misc/Kconfi
Re: [PATCH v5 2/2] drivers/misc: Add Aspeed P2A control driver
On Mon, Mar 4, 2019 at 8:31 AM Greg Kroah-Hartman wrote: > > On Mon, Mar 04, 2019 at 07:45:31AM -0800, Patrick Venture wrote: > > On Sun, Mar 3, 2019 at 4:04 PM Andrew Jeffery wrote: > > > > > > Hi Patrick. > > > > > > I've got some minor comments, otherwise it looks reasonable to me. > > > > > > On Thu, 28 Feb 2019, at 12:22, Patrick Venture wrote: > > > > The ASPEED AST2400, and AST2500 in some configurations include a > > > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > > > > in the BMC's physical address space. This feature is especially useful > > > > when using this bridge to send large files to the BMC. > > > > > > > > The host may use this to send down a firmware image by staging data at a > > > > specific memory address, and in a coordinated effort with the BMC's > > > > software stack and kernel, transmit the bytes. > > > > > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > > > configure it via ioctl to allow the host to write bytes to an agreed > > > > upon location. In the primary use-case, the region to use is known > > > > apriori on the BMC, and the host requests this information. Once this > > > > request is received, the BMC's software stack will enable the bridge and > > > > the region and then using some software flow control (possibly via IPMI > > > > packets), copy the bytes down. Once the process is complete, the BMC > > > > will disable the bridge and unset any region involved. > > > > > > > > The default behavior of this bridge when present is: enabled and all > > > > regions marked read-write. This driver will fix the regions to be > > > > read-only and then disable the bridge entirely. > > > > > > > > The memory regions protected are: > > > > * BMC flash MMIO window > > > > * System flash MMIO windows > > > > * SOC IO (peripheral MMIO) > > > > * DRAM > > > > > > > > The DRAM region itself is all of DRAM and cannot be further specified. > > > > Once the PCI bridge is enabled, the host can read all of DRAM, and if > > > > the DRAM section is write-enabled, then it can write to all of it. > > > > > > > > Signed-off-by: Patrick Venture > > > > --- > > > > Changes for v5: > > > > - Fixup missing exit condition and remove extra jump. > > > > Changes for v4: > > > > - Added ioctl for reading back the memory-region configuration. > > > > - Cleaned up some unused variables. > > > > Changes for v3: > > > > - Deleted unused read and write methods. > > > > Changes for v2: > > > > - Dropped unused reads. > > > > - Moved call to disable bridge to before registering device. > > > > - Switch from using regs to using a syscon regmap. <<< IN PROGRESS > > > > - Updated the commit message. <<< TODO > > > > - Updated the bit flipped for SCU180_ENP2A > > > > - Dropped boolean region_specified variable. > > > > - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. > > > > - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire > > > > - Updated commit message. > > > > --- > > > > drivers/misc/Kconfig | 8 + > > > > drivers/misc/Makefile| 1 + > > > > drivers/misc/aspeed-p2a-ctrl.c | 456 +++ > > > > include/uapi/linux/aspeed-p2a-ctrl.h | 59 > > > > 4 files changed, 524 insertions(+) > > > > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > > > > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > > > > > > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > > > > index f417b06e11c5..9de1bafe5606 100644 > > > > --- a/drivers/misc/Kconfig > > > > +++ b/drivers/misc/Kconfig > > > > @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG > > > > bus. System Configuration interface is one of the possible means > > > > of generating transactions on this bus. > > > > > > > > +config ASPEED_P2A_CTRL > > > > + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > > > > + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge > > > >
Re: [PATCH v5 2/2] drivers/misc: Add Aspeed P2A control driver
On Sun, Mar 3, 2019 at 4:04 PM Andrew Jeffery wrote: > > Hi Patrick. > > I've got some minor comments, otherwise it looks reasonable to me. > > On Thu, 28 Feb 2019, at 12:22, Patrick Venture wrote: > > The ASPEED AST2400, and AST2500 in some configurations include a > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > > in the BMC's physical address space. This feature is especially useful > > when using this bridge to send large files to the BMC. > > > > The host may use this to send down a firmware image by staging data at a > > specific memory address, and in a coordinated effort with the BMC's > > software stack and kernel, transmit the bytes. > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > configure it via ioctl to allow the host to write bytes to an agreed > > upon location. In the primary use-case, the region to use is known > > apriori on the BMC, and the host requests this information. Once this > > request is received, the BMC's software stack will enable the bridge and > > the region and then using some software flow control (possibly via IPMI > > packets), copy the bytes down. Once the process is complete, the BMC > > will disable the bridge and unset any region involved. > > > > The default behavior of this bridge when present is: enabled and all > > regions marked read-write. This driver will fix the regions to be > > read-only and then disable the bridge entirely. > > > > The memory regions protected are: > > * BMC flash MMIO window > > * System flash MMIO windows > > * SOC IO (peripheral MMIO) > > * DRAM > > > > The DRAM region itself is all of DRAM and cannot be further specified. > > Once the PCI bridge is enabled, the host can read all of DRAM, and if > > the DRAM section is write-enabled, then it can write to all of it. > > > > Signed-off-by: Patrick Venture > > --- > > Changes for v5: > > - Fixup missing exit condition and remove extra jump. > > Changes for v4: > > - Added ioctl for reading back the memory-region configuration. > > - Cleaned up some unused variables. > > Changes for v3: > > - Deleted unused read and write methods. > > Changes for v2: > > - Dropped unused reads. > > - Moved call to disable bridge to before registering device. > > - Switch from using regs to using a syscon regmap. <<< IN PROGRESS > > - Updated the commit message. <<< TODO > > - Updated the bit flipped for SCU180_ENP2A > > - Dropped boolean region_specified variable. > > - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. > > - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire > > - Updated commit message. > > --- > > drivers/misc/Kconfig | 8 + > > drivers/misc/Makefile| 1 + > > drivers/misc/aspeed-p2a-ctrl.c | 456 +++ > > include/uapi/linux/aspeed-p2a-ctrl.h | 59 > > 4 files changed, 524 insertions(+) > > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > > index f417b06e11c5..9de1bafe5606 100644 > > --- a/drivers/misc/Kconfig > > +++ b/drivers/misc/Kconfig > > @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG > > bus. System Configuration interface is one of the possible means > > of generating transactions on this bus. > > > > +config ASPEED_P2A_CTRL > > + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > > + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" > > + help > > + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings > > through > > + ioctl()s, the driver also provides an interface for userspace > > mappings to > > + a pre-defined region. > > + > > config ASPEED_LPC_CTRL > > depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > > tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" > > diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile > > index e39ccbbc1b3a..57577aee354f 100644 > > --- a/drivers/misc/Makefile > > +++ b/drivers/misc/Makefile > > @@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o > > obj-$(CONFIG_CXL_BASE) += cxl/ > > obj-$(CONFIG_ASPEED_LPC_CTRL)+= aspeed-lpc-ctrl.o > > obj-$(CONF
[PATCH v5 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture
---
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- Added comment about syscon required parameter.
---
.../bindings/misc/aspeed-p2a-ctrl.txt | 32 +++
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
new file mode 100644
index ..1092d62d1c92
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -0,0 +1,32 @@
+==
+Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
Driver
+==
+
+The bridge is available on platforms with the VGA enabled on the Aspeed device.
+In this case, the host has access to a 64KiB window into all of the BMC's
+memory. The BMC can disable this bridge. If the bridge is enabled, the host
+has read access to all the regions of memory, however the host only has read
+and write access depending on a register controlled by the BMC.
+
+Required properties:
+===
+
+ - compatible: must be one of:
+ - "aspeed,ast2400-p2a-ctrl"
+ - "aspeed,ast2500-p2a-ctrl"
+
+ - syscon: handle to syscon device node controlling PCI.
+
+Optional properties:
+===
+
+- memory-region: A phandle to a reserved_memory region to be used for the PCI
+ to AHB mapping
+
+Example:
+
+p2a: p2a-control@1e6e2000 {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ memory-region = <&reserved_memory>;
+ syscon = <&syscon>;
+};
--
2.21.0.rc2.261.ga7da99ff1b-goog
[PATCH v5 2/2] drivers/misc: Add Aspeed P2A control driver
The ASPEED AST2400, and AST2500 in some configurations include a PCI-to-AHB MMIO bridge. This bridge allows a server to read and write in the BMC's physical address space. This feature is especially useful when using this bridge to send large files to the BMC. The host may use this to send down a firmware image by staging data at a specific memory address, and in a coordinated effort with the BMC's software stack and kernel, transmit the bytes. This driver enables the BMC to unlock the PCI bridge on demand, and configure it via ioctl to allow the host to write bytes to an agreed upon location. In the primary use-case, the region to use is known apriori on the BMC, and the host requests this information. Once this request is received, the BMC's software stack will enable the bridge and the region and then using some software flow control (possibly via IPMI packets), copy the bytes down. Once the process is complete, the BMC will disable the bridge and unset any region involved. The default behavior of this bridge when present is: enabled and all regions marked read-write. This driver will fix the regions to be read-only and then disable the bridge entirely. The memory regions protected are: * BMC flash MMIO window * System flash MMIO windows * SOC IO (peripheral MMIO) * DRAM The DRAM region itself is all of DRAM and cannot be further specified. Once the PCI bridge is enabled, the host can read all of DRAM, and if the DRAM section is write-enabled, then it can write to all of it. Signed-off-by: Patrick Venture --- Changes for v5: - Fixup missing exit condition and remove extra jump. Changes for v4: - Added ioctl for reading back the memory-region configuration. - Cleaned up some unused variables. Changes for v3: - Deleted unused read and write methods. Changes for v2: - Dropped unused reads. - Moved call to disable bridge to before registering device. - Switch from using regs to using a syscon regmap. <<< IN PROGRESS - Updated the commit message. <<< TODO - Updated the bit flipped for SCU180_ENP2A - Dropped boolean region_specified variable. - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire - Updated commit message. --- drivers/misc/Kconfig | 8 + drivers/misc/Makefile| 1 + drivers/misc/aspeed-p2a-ctrl.c | 456 +++ include/uapi/linux/aspeed-p2a-ctrl.h | 59 4 files changed, 524 insertions(+) create mode 100644 drivers/misc/aspeed-p2a-ctrl.c create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index f417b06e11c5..9de1bafe5606 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG bus. System Configuration interface is one of the possible means of generating transactions on this bus. +config ASPEED_P2A_CTRL + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" + help + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through + ioctl()s, the driver also provides an interface for userspace mappings to + a pre-defined region. + config ASPEED_LPC_CTRL depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index e39ccbbc1b3a..57577aee354f 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o +obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c new file mode 100644 index ..6bde4f64632d --- /dev/null +++ b/drivers/misc/aspeed-p2a-ctrl.c @@ -0,0 +1,456 @@ +/* + * Copyright 2019 Google Inc + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * Provides a simple driver to control the ASPEED P2A interface which allows + * the host to read and write to various regions of the BMC's memory. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define DEVICE_NAME"aspeed-p
Re: [PATCH v4 2/2] drivers/misc: Add Aspeed P2A control driver
On Wed, Feb 27, 2019 at 8:59 AM Patrick Venture wrote: > > The ASPEED AST2400, and AST2500 in some configurations include a > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > in the BMC's physical address space. This feature is especially useful > when using this bridge to send large files to the BMC. > > The host may use this to send down a firmware image by staging data at a > specific memory address, and in a coordinated effort with the BMC's > software stack and kernel, transmit the bytes. > > This driver enables the BMC to unlock the PCI bridge on demand, and > configure it via ioctl to allow the host to write bytes to an agreed > upon location. In the primary use-case, the region to use is known > apriori on the BMC, and the host requests this information. Once this > request is received, the BMC's software stack will enable the bridge and > the region and then using some software flow control (possibly via IPMI > packets), copy the bytes down. Once the process is complete, the BMC > will disable the bridge and unset any region involved. > > The default behavior of this bridge when present is: enabled and all > regions marked read-write. This driver will fix the regions to be > read-only and then disable the bridge entirely. > > The memory regions protected are: > * BMC flash MMIO window > * System flash MMIO windows > * SOC IO (peripheral MMIO) > * DRAM > > The DRAM region itself is all of DRAM and cannot be further specified. > Once the PCI bridge is enabled, the host can read all of DRAM, and if > the DRAM section is write-enabled, then it can write to all of it. > > Signed-off-by: Patrick Venture > --- > Changes for v4: > - Added ioctl for reading back the memory-region configuration. > - Cleaned up some unused variables. > Changes for v3: > - Deleted unused read and write methods. > Changes for v2: > - Dropped unused reads. > - Moved call to disable bridge to before registering device. > - Switch from using regs to using a syscon regmap. <<< IN PROGRESS > - Updated the commit message. <<< TODO > - Updated the bit flipped for SCU180_ENP2A > - Dropped boolean region_specified variable. > - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. > - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire > - Updated commit message. > --- > drivers/misc/Kconfig | 8 + > drivers/misc/Makefile| 1 + > drivers/misc/aspeed-p2a-ctrl.c | 451 +++ > include/uapi/linux/aspeed-p2a-ctrl.h | 59 > 4 files changed, 519 insertions(+) > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > index f417b06e11c5..9de1bafe5606 100644 > --- a/drivers/misc/Kconfig > +++ b/drivers/misc/Kconfig > @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG > bus. System Configuration interface is one of the possible means > of generating transactions on this bus. > > +config ASPEED_P2A_CTRL > + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" > + help > + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings > through > + ioctl()s, the driver also provides an interface for userspace > mappings to > + a pre-defined region. > + > config ASPEED_LPC_CTRL > depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" > diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile > index e39ccbbc1b3a..57577aee354f 100644 > --- a/drivers/misc/Makefile > +++ b/drivers/misc/Makefile > @@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o > obj-$(CONFIG_CXL_BASE) += cxl/ > obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o > obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o > +obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o > obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o > obj-$(CONFIG_OCXL) += ocxl/ > obj-y += cardreader/ > diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c > new file mode 100644 > index ..bcf68f086e74 > --- /dev/null > +++ b/drivers/misc/aspeed-p2a-ctrl.c > @@ -0,0 +1,451 @@ > +/* > + * Copyright 2019 Google Inc > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public Lic
[PATCH v4 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture
---
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- Added comment about syscon required parameter.
---
.../bindings/misc/aspeed-p2a-ctrl.txt | 32 +++
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
new file mode 100644
index ..1092d62d1c92
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -0,0 +1,32 @@
+==
+Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
Driver
+==
+
+The bridge is available on platforms with the VGA enabled on the Aspeed device.
+In this case, the host has access to a 64KiB window into all of the BMC's
+memory. The BMC can disable this bridge. If the bridge is enabled, the host
+has read access to all the regions of memory, however the host only has read
+and write access depending on a register controlled by the BMC.
+
+Required properties:
+===
+
+ - compatible: must be one of:
+ - "aspeed,ast2400-p2a-ctrl"
+ - "aspeed,ast2500-p2a-ctrl"
+
+ - syscon: handle to syscon device node controlling PCI.
+
+Optional properties:
+===
+
+- memory-region: A phandle to a reserved_memory region to be used for the PCI
+ to AHB mapping
+
+Example:
+
+p2a: p2a-control@1e6e2000 {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ memory-region = <&reserved_memory>;
+ syscon = <&syscon>;
+};
--
2.21.0.rc2.261.ga7da99ff1b-goog
[PATCH v4 2/2] drivers/misc: Add Aspeed P2A control driver
The ASPEED AST2400, and AST2500 in some configurations include a PCI-to-AHB MMIO bridge. This bridge allows a server to read and write in the BMC's physical address space. This feature is especially useful when using this bridge to send large files to the BMC. The host may use this to send down a firmware image by staging data at a specific memory address, and in a coordinated effort with the BMC's software stack and kernel, transmit the bytes. This driver enables the BMC to unlock the PCI bridge on demand, and configure it via ioctl to allow the host to write bytes to an agreed upon location. In the primary use-case, the region to use is known apriori on the BMC, and the host requests this information. Once this request is received, the BMC's software stack will enable the bridge and the region and then using some software flow control (possibly via IPMI packets), copy the bytes down. Once the process is complete, the BMC will disable the bridge and unset any region involved. The default behavior of this bridge when present is: enabled and all regions marked read-write. This driver will fix the regions to be read-only and then disable the bridge entirely. The memory regions protected are: * BMC flash MMIO window * System flash MMIO windows * SOC IO (peripheral MMIO) * DRAM The DRAM region itself is all of DRAM and cannot be further specified. Once the PCI bridge is enabled, the host can read all of DRAM, and if the DRAM section is write-enabled, then it can write to all of it. Signed-off-by: Patrick Venture --- Changes for v4: - Added ioctl for reading back the memory-region configuration. - Cleaned up some unused variables. Changes for v3: - Deleted unused read and write methods. Changes for v2: - Dropped unused reads. - Moved call to disable bridge to before registering device. - Switch from using regs to using a syscon regmap. <<< IN PROGRESS - Updated the commit message. <<< TODO - Updated the bit flipped for SCU180_ENP2A - Dropped boolean region_specified variable. - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire - Updated commit message. --- drivers/misc/Kconfig | 8 + drivers/misc/Makefile| 1 + drivers/misc/aspeed-p2a-ctrl.c | 451 +++ include/uapi/linux/aspeed-p2a-ctrl.h | 59 4 files changed, 519 insertions(+) create mode 100644 drivers/misc/aspeed-p2a-ctrl.c create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index f417b06e11c5..9de1bafe5606 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG bus. System Configuration interface is one of the possible means of generating transactions on this bus. +config ASPEED_P2A_CTRL + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" + help + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through + ioctl()s, the driver also provides an interface for userspace mappings to + a pre-defined region. + config ASPEED_LPC_CTRL depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index e39ccbbc1b3a..57577aee354f 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o +obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c new file mode 100644 index ..bcf68f086e74 --- /dev/null +++ b/drivers/misc/aspeed-p2a-ctrl.c @@ -0,0 +1,451 @@ +/* + * Copyright 2019 Google Inc + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * Provides a simple driver to control the ASPEED P2A interface which allows + * the host to read and write to various regions of the BMC's memory. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define DEVICE_NAME"aspeed-p2a-ctrl" + +/* SCU2C is a Misc. Control Register. */ +#define SCU2C
Re: [PATCH 2/2] drivers/misc: Add Aspeed P2A control driver
On Tue, Feb 26, 2019 at 9:53 PM Andrew Jeffery wrote: > > > > On Wed, 27 Feb 2019, at 13:04, Patrick Venture wrote: > > On Tue, Feb 26, 2019 at 5:05 PM Andrew Jeffery wrote: > > > > > > > > > > > > On Wed, 27 Feb 2019, at 08:12, Patrick Venture wrote: > > > > On Sun, Feb 24, 2019 at 5:26 PM Andrew Jeffery wrote: > > > > > > > > > > On Fri, 22 Feb 2019, at 08:55, Patrick Venture wrote: > > > > > > The ASPEED AST2400, and AST2500 in some configurations include a > > > > > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and > > > > > > write > > > > > > in the BMC's memory space. > > > > > > > > > > Bit of a nit, but I think s/memory space/physical address space/ makes > > > > > the power of the interface a bit clearer. > > > > > > > > > > > This feature is especially useful when using > > > > > > this bridge to send large files to the BMC. > > > > > > > > > > > > The host may use this to send down a firmware image by staging data > > > > > > at a > > > > > > specific memory address, and in a coordinated effort with the BMC's > > > > > > software stack and kernel, transmit the bytes. > > > > > > > > > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > > > > > configure it via ioctl to allow the host to write bytes to an agreed > > > > > > upon location. In the primary use-case, the region to use is known > > > > > > apriori on the BMC, and the host requests this information. Once > > > > > > this > > > > > > request is received, the BMC's software stack will enable the > > > > > > bridge and > > > > > > the region and then using some software flow control (possibly via > > > > > > IPMI > > > > > > packets), copy the bytes down. Once the process is complete, the > > > > > > BMC > > > > > > will disable the bridge and unset any region involved. > > > > > > > > > > I feel the description is a little subtle. You mention locations and > > > > > regions > > > > > without really defining their relationship. We have the means to > > > > > prevent > > > > > writes via the P2A to following regions in the BMC's physical address > > > > > space: > > > > > > > > > > * BMC flash MMIO window > > > > > * System flash MMIO windows > > > > > * SOC IO (peripheral MMIO) > > > > > * DRAM > > > > > > > > > > So what I think should be made clear is once we allow the host to > > > > > write > > > > > to e.g. DRAM, it can write to *all* of DRAM, regardless of what > > > > > location the > > > > > BMC recommended, i.e. the BMC is at the mercy of the host wrt > > > > > confidentiality once the P2A is enabled (host can always read > > > > > anywhere) > > > > > and integrity when the DRAM write filter is disabled. > > > > > > > > Ok, I can try to work that phrasing in. > > > > > > > > > > > > > > There is no way to specify and constrain P2A writes to specific > > > > > locations > > > > > in DRAM. > > > > > > > > > > > > > > > > > The default behavior of this bridge when present is: enabled and all > > > > > > regions marked read-write. This driver will fix the regions to be > > > > > > read-only and then disable the bridge entirely. > > > > > > > > > > > > Signed-off-by: Patrick Venture > > > > > > --- > > > > > > drivers/misc/Kconfig | 8 + > > > > > > drivers/misc/Makefile| 1 + > > > > > > drivers/misc/aspeed-p2a-ctrl.c | 498 > > > > > > +++ > > > > > > include/uapi/linux/aspeed-p2a-ctrl.h | 46 +++ > > > > > > 4 files changed, 553 insertions(+) > > > > > > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > > > > > > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > > > > > > > > >
Re: [PATCH 2/2] drivers/misc: Add Aspeed P2A control driver
On Tue, Feb 26, 2019 at 9:05 PM Florian Fainelli wrote: > > > > On 2/21/2019 2:25 PM, Patrick Venture wrote: > > The ASPEED AST2400, and AST2500 in some configurations include a > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > > in the BMC's memory space. This feature is especially useful when using > > this bridge to send large files to the BMC. > > > > The host may use this to send down a firmware image by staging data at a > > specific memory address, and in a coordinated effort with the BMC's > > software stack and kernel, transmit the bytes. > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > configure it via ioctl to allow the host to write bytes to an agreed > > upon location. In the primary use-case, the region to use is known > > apriori on the BMC, and the host requests this information. Once this > > request is received, the BMC's software stack will enable the bridge and > > the region and then using some software flow control (possibly via IPMI > > packets), copy the bytes down. Once the process is complete, the BMC > > will disable the bridge and unset any region involved. > > > > The default behavior of this bridge when present is: enabled and all > > regions marked read-write. This driver will fix the regions to be > > read-only and then disable the bridge entirely. > > A complete drive by review, so I could be completely off here (most > likely am), but have you considered using virtio and doing some sort of > rudimentary features (regions here) negotiation over that interface? I have not. > > If I get your description right in premise maybe emulating the AHB side > on the BMC as a PCI end-point device driver, and using it as a seemingly > regular PCI EP from the host side with BARs and stuff might make sense > here and be less of a security hole than it currently looks like. In this case, what I"m trying to do is control access to regions of BMC physical address space. The ASPEED BMC is by default, completely open in this regard, see CVE-2019-6260. There are two sets of registers that control the host's ability to read or write the physical address space. The host needs to be able to write to the BMC's physical address space in some use-cases -- one of which is my firmware staging case. It could just as easily be used as a memory buffer region for a virtual nic. Part of the goal here though is that the host should not have control of what regions are on/off without the BMC allowing it. It's currently a security hole, and this driver is meant to open that hole on demand for specific purposes, whereas the default state is completely open. > -- > Florian
Re: [PATCH 2/2] drivers/misc: Add Aspeed P2A control driver
On Tue, Feb 26, 2019 at 5:05 PM Andrew Jeffery wrote: > > > > On Wed, 27 Feb 2019, at 08:12, Patrick Venture wrote: > > On Sun, Feb 24, 2019 at 5:26 PM Andrew Jeffery wrote: > > > > > > On Fri, 22 Feb 2019, at 08:55, Patrick Venture wrote: > > > > The ASPEED AST2400, and AST2500 in some configurations include a > > > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > > > > in the BMC's memory space. > > > > > > Bit of a nit, but I think s/memory space/physical address space/ makes > > > the power of the interface a bit clearer. > > > > > > > This feature is especially useful when using > > > > this bridge to send large files to the BMC. > > > > > > > > The host may use this to send down a firmware image by staging data at a > > > > specific memory address, and in a coordinated effort with the BMC's > > > > software stack and kernel, transmit the bytes. > > > > > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > > > configure it via ioctl to allow the host to write bytes to an agreed > > > > upon location. In the primary use-case, the region to use is known > > > > apriori on the BMC, and the host requests this information. Once this > > > > request is received, the BMC's software stack will enable the bridge and > > > > the region and then using some software flow control (possibly via IPMI > > > > packets), copy the bytes down. Once the process is complete, the BMC > > > > will disable the bridge and unset any region involved. > > > > > > I feel the description is a little subtle. You mention locations and > > > regions > > > without really defining their relationship. We have the means to prevent > > > writes via the P2A to following regions in the BMC's physical address > > > space: > > > > > > * BMC flash MMIO window > > > * System flash MMIO windows > > > * SOC IO (peripheral MMIO) > > > * DRAM > > > > > > So what I think should be made clear is once we allow the host to write > > > to e.g. DRAM, it can write to *all* of DRAM, regardless of what location > > > the > > > BMC recommended, i.e. the BMC is at the mercy of the host wrt > > > confidentiality once the P2A is enabled (host can always read anywhere) > > > and integrity when the DRAM write filter is disabled. > > > > Ok, I can try to work that phrasing in. > > > > > > > > There is no way to specify and constrain P2A writes to specific locations > > > in DRAM. > > > > > > > > > > > The default behavior of this bridge when present is: enabled and all > > > > regions marked read-write. This driver will fix the regions to be > > > > read-only and then disable the bridge entirely. > > > > > > > > Signed-off-by: Patrick Venture > > > > --- > > > > drivers/misc/Kconfig | 8 + > > > > drivers/misc/Makefile| 1 + > > > > drivers/misc/aspeed-p2a-ctrl.c | 498 +++ > > > > include/uapi/linux/aspeed-p2a-ctrl.h | 46 +++ > > > > 4 files changed, 553 insertions(+) > > > > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > > > > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > > > > > > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > > > > index f417b06e11c5..54ed265a26f0 100644 > > > > --- a/drivers/misc/Kconfig > > > > +++ b/drivers/misc/Kconfig > > > > @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG > > > > bus. System Configuration interface is one of the possible means > > > > of generating transactions on this bus. > > > > > > > > +config ASPEED_P2A_CTRL > > > > + depends on (ARCH_ASPEED || COMPILE_TEST) > > > > + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge > > > > control" > > > > + help > > > > + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings > > > > through > > > > + ioctl()s, the driver also provides an interface for userspace > > > > mappings to > > > > + a pre-defined region. > > > > + > > > > config ASPEED_LPC_CTRL > > > > depends on (ARCH_ASPEED || COMPILE_
[PATCH v3 2/2] drivers/misc: Add Aspeed P2A control driver
The ASPEED AST2400, and AST2500 in some configurations include a PCI-to-AHB MMIO bridge. This bridge allows a server to read and write in the BMC's physical address space. This feature is especially useful when using this bridge to send large files to the BMC. The host may use this to send down a firmware image by staging data at a specific memory address, and in a coordinated effort with the BMC's software stack and kernel, transmit the bytes. This driver enables the BMC to unlock the PCI bridge on demand, and configure it via ioctl to allow the host to write bytes to an agreed upon location. In the primary use-case, the region to use is known apriori on the BMC, and the host requests this information. Once this request is received, the BMC's software stack will enable the bridge and the region and then using some software flow control (possibly via IPMI packets), copy the bytes down. Once the process is complete, the BMC will disable the bridge and unset any region involved. The default behavior of this bridge when present is: enabled and all regions marked read-write. This driver will fix the regions to be read-only and then disable the bridge entirely. The memory regions protected are: * BMC flash MMIO window * System flash MMIO windows * SOC IO (peripheral MMIO) * DRAM The DRAM region itself is all of DRAM and cannot be further specified. Once the PCI bridge is enabled, the host can read all of DRAM, and if the DRAM section is write-enabled, then it can write to all of it. Signed-off-by: Patrick Venture --- Changes for v3: - Deleted unused read and write methods. Changes for v2: - Dropped unused reads. - Moved call to disable bridge to before registering device. - Switch from using regs to using a syscon regmap. <<< IN PROGRESS - Updated the commit message. <<< TODO - Updated the bit flipped for SCU180_ENP2A - Dropped boolean region_specified variable. - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire - Updated commit message. --- drivers/misc/Kconfig | 8 + drivers/misc/Makefile| 1 + drivers/misc/aspeed-p2a-ctrl.c | 444 +++ include/uapi/linux/aspeed-p2a-ctrl.h | 46 +++ 4 files changed, 499 insertions(+) create mode 100644 drivers/misc/aspeed-p2a-ctrl.c create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index f417b06e11c5..9de1bafe5606 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG bus. System Configuration interface is one of the possible means of generating transactions on this bus. +config ASPEED_P2A_CTRL + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" + help + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through + ioctl()s, the driver also provides an interface for userspace mappings to + a pre-defined region. + config ASPEED_LPC_CTRL depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index e39ccbbc1b3a..57577aee354f 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o +obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c new file mode 100644 index ..7e63269b29c4 --- /dev/null +++ b/drivers/misc/aspeed-p2a-ctrl.c @@ -0,0 +1,444 @@ +/* + * Copyright 2019 Google Inc + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * Provides a simple driver to control the ASPEED P2A interface which allows + * the host to read and write to various regions of the BMC's memory. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define DEVICE_NAME"aspeed-p2a-ctrl" + +/* SCU2C is a Misc. Control Register. */ +#define SCU2C 0x2c +/* SCU180 is the PCIe Configuration Setting Control Register. */ +#define SCU180 0x180 +/* Bit 1 controls the
Re: [PATCH v2 2/2] drivers/misc: Add Aspeed P2A control driver
On Tue, Feb 26, 2019 at 3:36 PM Patrick Venture wrote: > > The ASPEED AST2400, and AST2500 in some configurations include a > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > in the BMC's physical address space. This feature is especially useful > when using this bridge to send large files to the BMC. > > The host may use this to send down a firmware image by staging data at a > specific memory address, and in a coordinated effort with the BMC's > software stack and kernel, transmit the bytes. > > This driver enables the BMC to unlock the PCI bridge on demand, and > configure it via ioctl to allow the host to write bytes to an agreed > upon location. In the primary use-case, the region to use is known > apriori on the BMC, and the host requests this information. Once this > request is received, the BMC's software stack will enable the bridge and > the region and then using some software flow control (possibly via IPMI > packets), copy the bytes down. Once the process is complete, the BMC > will disable the bridge and unset any region involved. > > The default behavior of this bridge when present is: enabled and all > regions marked read-write. This driver will fix the regions to be > read-only and then disable the bridge entirely. > > The memory regions protected are: > * BMC flash MMIO window > * System flash MMIO windows > * SOC IO (peripheral MMIO) > * DRAM > > The DRAM region itself is all of DRAM and cannot be further specified. > Once the PCI bridge is enabled, the host can read all of DRAM, and if > the DRAM section is write-enabled, then it can write to all of it. > > Signed-off-by: Patrick Venture > Change-Id: I56da837e061556bb1e57d0aca0678d1cab0561f2 > --- > Changes for v2: > - Dropped unused reads. > - Moved call to disable bridge to before registering device. > - Switch from using regs to using a syscon regmap. <<< IN PROGRESS > - Updated the commit message. <<< TODO > - Updated the bit flipped for SCU180_ENP2A > - Dropped boolean region_specified variable. > - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. > - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire > - Updated commit message. > --- > drivers/misc/Kconfig | 8 + > drivers/misc/Makefile| 1 + > drivers/misc/aspeed-p2a-ctrl.c | 454 +++ > include/uapi/linux/aspeed-p2a-ctrl.h | 46 +++ > 4 files changed, 509 insertions(+) > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > index f417b06e11c5..9de1bafe5606 100644 > --- a/drivers/misc/Kconfig > +++ b/drivers/misc/Kconfig > @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG > bus. System Configuration interface is one of the possible means > of generating transactions on this bus. > > +config ASPEED_P2A_CTRL > + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" > + help > + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings > through > + ioctl()s, the driver also provides an interface for userspace > mappings to > + a pre-defined region. > + > config ASPEED_LPC_CTRL > depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" > diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile > index e39ccbbc1b3a..57577aee354f 100644 > --- a/drivers/misc/Makefile > +++ b/drivers/misc/Makefile > @@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o > obj-$(CONFIG_CXL_BASE) += cxl/ > obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o > obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o > +obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o > obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o > obj-$(CONFIG_OCXL) += ocxl/ > obj-y += cardreader/ > diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c > new file mode 100644 > index ..7be36fccb662 > --- /dev/null > +++ b/drivers/misc/aspeed-p2a-ctrl.c > @@ -0,0 +1,454 @@ > +/* > + * Copyright 2019 Google Inc > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * as published by the Free Software Foundation; either version > + * 2 of the License, or (at your option) any later ver
[PATCH v2 2/2] drivers/misc: Add Aspeed P2A control driver
The ASPEED AST2400, and AST2500 in some configurations include a PCI-to-AHB MMIO bridge. This bridge allows a server to read and write in the BMC's physical address space. This feature is especially useful when using this bridge to send large files to the BMC. The host may use this to send down a firmware image by staging data at a specific memory address, and in a coordinated effort with the BMC's software stack and kernel, transmit the bytes. This driver enables the BMC to unlock the PCI bridge on demand, and configure it via ioctl to allow the host to write bytes to an agreed upon location. In the primary use-case, the region to use is known apriori on the BMC, and the host requests this information. Once this request is received, the BMC's software stack will enable the bridge and the region and then using some software flow control (possibly via IPMI packets), copy the bytes down. Once the process is complete, the BMC will disable the bridge and unset any region involved. The default behavior of this bridge when present is: enabled and all regions marked read-write. This driver will fix the regions to be read-only and then disable the bridge entirely. The memory regions protected are: * BMC flash MMIO window * System flash MMIO windows * SOC IO (peripheral MMIO) * DRAM The DRAM region itself is all of DRAM and cannot be further specified. Once the PCI bridge is enabled, the host can read all of DRAM, and if the DRAM section is write-enabled, then it can write to all of it. Signed-off-by: Patrick Venture Change-Id: I56da837e061556bb1e57d0aca0678d1cab0561f2 --- Changes for v2: - Dropped unused reads. - Moved call to disable bridge to before registering device. - Switch from using regs to using a syscon regmap. <<< IN PROGRESS - Updated the commit message. <<< TODO - Updated the bit flipped for SCU180_ENP2A - Dropped boolean region_specified variable. - Renamed p2a_ctrl in _probe to misc_ctrl per suggestion. - Renamed aspeed_p2a_region_search to aspeed_p2a_region_acquire - Updated commit message. --- drivers/misc/Kconfig | 8 + drivers/misc/Makefile| 1 + drivers/misc/aspeed-p2a-ctrl.c | 454 +++ include/uapi/linux/aspeed-p2a-ctrl.h | 46 +++ 4 files changed, 509 insertions(+) create mode 100644 drivers/misc/aspeed-p2a-ctrl.c create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index f417b06e11c5..9de1bafe5606 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG bus. System Configuration interface is one of the possible means of generating transactions on this bus. +config ASPEED_P2A_CTRL + depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" + help + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through + ioctl()s, the driver also provides an interface for userspace mappings to + a pre-defined region. + config ASPEED_LPC_CTRL depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index e39ccbbc1b3a..57577aee354f 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o +obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c new file mode 100644 index ..7be36fccb662 --- /dev/null +++ b/drivers/misc/aspeed-p2a-ctrl.c @@ -0,0 +1,454 @@ +/* + * Copyright 2019 Google Inc + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * Provides a simple driver to control the ASPEED P2A interface which allows + * the host to read and write to various regions of the BMC's memory. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define DEVICE_NAME"aspeed-p2a-ctrl" + +/* SCU2C is a Misc. Control Register. */ +#define SCU2C 0x2c +/* SCU180 is the PCIe Configuration Setting Control Register. */ +#define SCU180 0x180 +/* Bit 1 controls the P2A b
[PATCH v2 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture
Change-Id: Ic89a2df0f555dee10598f87537ee004e82d13acd
---
Changes for v2:
- Added comment about syscon required parameter.
---
.../bindings/misc/aspeed-p2a-ctrl.txt | 32 +++
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
new file mode 100644
index ..1092d62d1c92
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -0,0 +1,32 @@
+==
+Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
Driver
+==
+
+The bridge is available on platforms with the VGA enabled on the Aspeed device.
+In this case, the host has access to a 64KiB window into all of the BMC's
+memory. The BMC can disable this bridge. If the bridge is enabled, the host
+has read access to all the regions of memory, however the host only has read
+and write access depending on a register controlled by the BMC.
+
+Required properties:
+===
+
+ - compatible: must be one of:
+ - "aspeed,ast2400-p2a-ctrl"
+ - "aspeed,ast2500-p2a-ctrl"
+
+ - syscon: handle to syscon device node controlling PCI.
+
+Optional properties:
+===
+
+- memory-region: A phandle to a reserved_memory region to be used for the PCI
+ to AHB mapping
+
+Example:
+
+p2a: p2a-control@1e6e2000 {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ memory-region = <&reserved_memory>;
+ syscon = <&syscon>;
+};
--
2.21.0.rc2.261.ga7da99ff1b-goog
Re: [PATCH 2/2] drivers/misc: Add Aspeed P2A control driver
On Tue, Feb 26, 2019 at 2:20 PM Andrew Jeffery wrote: > > > > On Wed, 27 Feb 2019, at 08:26, Patrick Venture wrote: > > On Tue, Feb 26, 2019 at 1:42 PM Patrick Venture wrote: > > > > > > On Sun, Feb 24, 2019 at 5:26 PM Andrew Jeffery wrote: > > > > > > > > > > > > > > > > + > > > > > + /* Access to these needs to be locked, held via probe, mapping > > > > > ioctl, > > > > > + * and release, remove. > > > > > + */ > > > > > + struct mutex tracking; > > > > > + u32 readers; > > > > > + u32 readerwriters[P2A_REGION_COUNT]; > > > > > > > > Might be better to use refcount_t here instead of u32? > > > > > > Ack > > > > refcount requires atomic, is that something we have with the ast2400, 2500? > > Ah, we do on the 2500 (armv6) but not the 2400 (armv5) Ok, so to avoid that complexity I'm not going to swap in refcounts. but good to know for future reference since it's basically what I was doing manually.
Re: [PATCH 2/2] drivers/misc: Add Aspeed P2A control driver
On Tue, Feb 26, 2019 at 1:42 PM Patrick Venture wrote: > > On Sun, Feb 24, 2019 at 5:26 PM Andrew Jeffery wrote: > > > > On Fri, 22 Feb 2019, at 08:55, Patrick Venture wrote: > > > The ASPEED AST2400, and AST2500 in some configurations include a > > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > > > in the BMC's memory space. > > > > Bit of a nit, but I think s/memory space/physical address space/ makes > > the power of the interface a bit clearer. > > > > > This feature is especially useful when using > > > this bridge to send large files to the BMC. > > > > > > The host may use this to send down a firmware image by staging data at a > > > specific memory address, and in a coordinated effort with the BMC's > > > software stack and kernel, transmit the bytes. > > > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > > configure it via ioctl to allow the host to write bytes to an agreed > > > upon location. In the primary use-case, the region to use is known > > > apriori on the BMC, and the host requests this information. Once this > > > request is received, the BMC's software stack will enable the bridge and > > > the region and then using some software flow control (possibly via IPMI > > > packets), copy the bytes down. Once the process is complete, the BMC > > > will disable the bridge and unset any region involved. > > > > I feel the description is a little subtle. You mention locations and regions > > without really defining their relationship. We have the means to prevent > > writes via the P2A to following regions in the BMC's physical address space: > > > > * BMC flash MMIO window > > * System flash MMIO windows > > * SOC IO (peripheral MMIO) > > * DRAM > > > > So what I think should be made clear is once we allow the host to write > > to e.g. DRAM, it can write to *all* of DRAM, regardless of what location the > > BMC recommended, i.e. the BMC is at the mercy of the host wrt > > confidentiality once the P2A is enabled (host can always read anywhere) > > and integrity when the DRAM write filter is disabled. > > Ok, I can try to work that phrasing in. > > > > > There is no way to specify and constrain P2A writes to specific locations > > in DRAM. > > > > > > > > The default behavior of this bridge when present is: enabled and all > > > regions marked read-write. This driver will fix the regions to be > > > read-only and then disable the bridge entirely. > > > > > > Signed-off-by: Patrick Venture > > > --- > > > drivers/misc/Kconfig | 8 + > > > drivers/misc/Makefile| 1 + > > > drivers/misc/aspeed-p2a-ctrl.c | 498 +++ > > > include/uapi/linux/aspeed-p2a-ctrl.h | 46 +++ > > > 4 files changed, 553 insertions(+) > > > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > > > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > > > > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > > > index f417b06e11c5..54ed265a26f0 100644 > > > --- a/drivers/misc/Kconfig > > > +++ b/drivers/misc/Kconfig > > > @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG > > > bus. System Configuration interface is one of the possible means > > > of generating transactions on this bus. > > > > > > +config ASPEED_P2A_CTRL > > > + depends on (ARCH_ASPEED || COMPILE_TEST) > > > + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge > > > control" > > > + help > > > + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings > > > through > > > + ioctl()s, the driver also provides an interface for userspace > > > mappings to > > > + a pre-defined region. > > > + > > > config ASPEED_LPC_CTRL > > > depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > > > tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" > > > diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile > > > index e39ccbbc1b3a..57577aee354f 100644 > > > --- a/drivers/misc/Makefile > > > +++ b/drivers/misc/Makefile > > > @@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o > > > obj-$(CONFIG_CXL_BASE) += cxl/ > > > obj-$(CONFIG
Re: [PATCH 2/2] drivers/misc: Add Aspeed P2A control driver
On Sun, Feb 24, 2019 at 5:26 PM Andrew Jeffery wrote: > > On Fri, 22 Feb 2019, at 08:55, Patrick Venture wrote: > > The ASPEED AST2400, and AST2500 in some configurations include a > > PCI-to-AHB MMIO bridge. This bridge allows a server to read and write > > in the BMC's memory space. > > Bit of a nit, but I think s/memory space/physical address space/ makes > the power of the interface a bit clearer. > > > This feature is especially useful when using > > this bridge to send large files to the BMC. > > > > The host may use this to send down a firmware image by staging data at a > > specific memory address, and in a coordinated effort with the BMC's > > software stack and kernel, transmit the bytes. > > > > This driver enables the BMC to unlock the PCI bridge on demand, and > > configure it via ioctl to allow the host to write bytes to an agreed > > upon location. In the primary use-case, the region to use is known > > apriori on the BMC, and the host requests this information. Once this > > request is received, the BMC's software stack will enable the bridge and > > the region and then using some software flow control (possibly via IPMI > > packets), copy the bytes down. Once the process is complete, the BMC > > will disable the bridge and unset any region involved. > > I feel the description is a little subtle. You mention locations and regions > without really defining their relationship. We have the means to prevent > writes via the P2A to following regions in the BMC's physical address space: > > * BMC flash MMIO window > * System flash MMIO windows > * SOC IO (peripheral MMIO) > * DRAM > > So what I think should be made clear is once we allow the host to write > to e.g. DRAM, it can write to *all* of DRAM, regardless of what location the > BMC recommended, i.e. the BMC is at the mercy of the host wrt > confidentiality once the P2A is enabled (host can always read anywhere) > and integrity when the DRAM write filter is disabled. Ok, I can try to work that phrasing in. > > There is no way to specify and constrain P2A writes to specific locations > in DRAM. > > > > > The default behavior of this bridge when present is: enabled and all > > regions marked read-write. This driver will fix the regions to be > > read-only and then disable the bridge entirely. > > > > Signed-off-by: Patrick Venture > > --- > > drivers/misc/Kconfig | 8 + > > drivers/misc/Makefile| 1 + > > drivers/misc/aspeed-p2a-ctrl.c | 498 +++ > > include/uapi/linux/aspeed-p2a-ctrl.h | 46 +++ > > 4 files changed, 553 insertions(+) > > create mode 100644 drivers/misc/aspeed-p2a-ctrl.c > > create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h > > > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > > index f417b06e11c5..54ed265a26f0 100644 > > --- a/drivers/misc/Kconfig > > +++ b/drivers/misc/Kconfig > > @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG > > bus. System Configuration interface is one of the possible means > > of generating transactions on this bus. > > > > +config ASPEED_P2A_CTRL > > + depends on (ARCH_ASPEED || COMPILE_TEST) > > + tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" > > + help > > + Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings > > through > > + ioctl()s, the driver also provides an interface for userspace > > mappings to > > + a pre-defined region. > > + > > config ASPEED_LPC_CTRL > > depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON > > tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" > > diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile > > index e39ccbbc1b3a..57577aee354f 100644 > > --- a/drivers/misc/Makefile > > +++ b/drivers/misc/Makefile > > @@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o > > obj-$(CONFIG_CXL_BASE) += cxl/ > > obj-$(CONFIG_ASPEED_LPC_CTRL)+= aspeed-lpc-ctrl.o > > obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o > > +obj-$(CONFIG_ASPEED_P2A_CTRL)+= aspeed-p2a-ctrl.o > > obj-$(CONFIG_PCI_ENDPOINT_TEST) += pci_endpoint_test.o > > obj-$(CONFIG_OCXL) += ocxl/ > > obj-y+= cardreader/ > > diff --git a/drivers/misc/aspeed-p2a-ctrl.c > > b/drivers/misc/aspeed-p2a-ctrl.c > > new file mode 100644 > > index 00
[PATCH 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture
---
.../bindings/misc/aspeed-p2a-ctrl.txt | 33 +++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
new file mode 100644
index ..9c4d036ad5f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -0,0 +1,33 @@
+==
+Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control
Driver
+==
+
+The bridge is available on platforms with the VGA enabled on the Aspeed device.
+In this case, the host has access to a 64KiB window into all of the BMC's
+memory. The BMC can disable this bridge. If the bridge is enabled, the host
+has read access to all the regions of memory, however the host only has read
+and write access depending on a register controlled by the BMC.
+
+Required properties:
+===
+
+ - compatible: must be one of:
+ - "aspeed,ast2400-p2a-ctrl"
+ - "aspeed,ast2500-p2a-ctrl"
+
+ - reg: physical address of SCU2C followed by SCU180
+
+Optional properties:
+===
+
+- memory-region: A phandle to a reserved_memory region to be used for the PCI
+ to AHB mapping
+
+Example:
+
+p2a: p2a-control@1e6e2000 {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ reg = <0x1e6e202C 4
+ 0x1e6e2180 4>;
+ memory-region = <&reserved_memory>;
+};
--
2.21.0.rc0.258.g878e2cd30e-goog
[PATCH 2/2] drivers/misc: Add Aspeed P2A control driver
The ASPEED AST2400, and AST2500 in some configurations include a
PCI-to-AHB MMIO bridge. This bridge allows a server to read and write
in the BMC's memory space. This feature is especially useful when using
this bridge to send large files to the BMC.
The host may use this to send down a firmware image by staging data at a
specific memory address, and in a coordinated effort with the BMC's
software stack and kernel, transmit the bytes.
This driver enables the BMC to unlock the PCI bridge on demand, and
configure it via ioctl to allow the host to write bytes to an agreed
upon location. In the primary use-case, the region to use is known
apriori on the BMC, and the host requests this information. Once this
request is received, the BMC's software stack will enable the bridge and
the region and then using some software flow control (possibly via IPMI
packets), copy the bytes down. Once the process is complete, the BMC
will disable the bridge and unset any region involved.
The default behavior of this bridge when present is: enabled and all
regions marked read-write. This driver will fix the regions to be
read-only and then disable the bridge entirely.
Signed-off-by: Patrick Venture
---
drivers/misc/Kconfig | 8 +
drivers/misc/Makefile| 1 +
drivers/misc/aspeed-p2a-ctrl.c | 498 +++
include/uapi/linux/aspeed-p2a-ctrl.h | 46 +++
4 files changed, 553 insertions(+)
create mode 100644 drivers/misc/aspeed-p2a-ctrl.c
create mode 100644 include/uapi/linux/aspeed-p2a-ctrl.h
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index f417b06e11c5..54ed265a26f0 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG
bus. System Configuration interface is one of the possible means
of generating transactions on this bus.
+config ASPEED_P2A_CTRL
+ depends on (ARCH_ASPEED || COMPILE_TEST)
+ tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control"
+ help
+ Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through
+ ioctl()s, the driver also provides an interface for userspace
mappings to
+ a pre-defined region.
+
config ASPEED_LPC_CTRL
depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index e39ccbbc1b3a..57577aee354f 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
obj-$(CONFIG_CXL_BASE) += cxl/
obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o
obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o
+obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o
obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
obj-$(CONFIG_OCXL) += ocxl/
obj-y += cardreader/
diff --git a/drivers/misc/aspeed-p2a-ctrl.c b/drivers/misc/aspeed-p2a-ctrl.c
new file mode 100644
index ..a3cf00de9038
--- /dev/null
+++ b/drivers/misc/aspeed-p2a-ctrl.c
@@ -0,0 +1,498 @@
+/*
+ * Copyright 2019 Google Inc
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Provides a simple driver to control the ASPEED P2A interface which allows
+ * the host to read and write to various regions of the BMC's memory.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#define DEVICE_NAME"aspeed-p2a-ctrl"
+
+#define SCU180_ENP2A BIT(0)
+
+/* The ast2400/2500 both have six ranges. */
+#define P2A_REGION_COUNT 6
+
+struct region {
+ u32 min;
+ u32 max;
+ u32 bit;
+};
+
+struct aspeed_p2a_model_data {
+ /* min, max, bit */
+ struct region regions[P2A_REGION_COUNT];
+};
+
+struct aspeed_p2a_ctrl {
+ struct miscdevice miscdev;
+
+ /* Lock access to the registers so they're is consistent. */
+ struct mutex lo_mutex;
+ void __iomem *loregs;
+ struct mutex hi_mutex;
+ void __iomem *hiregs;
+
+ const struct aspeed_p2a_model_data *config;
+
+ /* Access to these needs to be locked, held via probe, mapping ioctl,
+* and release, remove.
+*/
+ struct mutex tracking;
+ u32 readers;
+ u32 readerwriters[P2A_REGION_COUNT];
+
+ phys_addr_t mem_base;
+ resource_size_t mem_size;
+ /* Because the memory_region is optional, this tracks whether it was
+* set.
+*/
+ bool region_specified;
+};
+
+static inline u32 aspeed_p2a_read(void __iomem *base)
+{
+
[PATCH v4] drivers/misc: (aspeed-lpc-snoop): Add ast2400 to compat
This driver can be used on the aspeed ast2400 with minor
modifications.
Tested: ast2400 on quanta-q71l
Signed-off-by: Patrick Venture
---
v4: fix the 2400/2500 data as they were backwards.
v3: added .data object to determine behavior difference between ast2400 and
ast2500.
v2: added aspeed-g5 area because ast2400 doesn't use those bits.
also updated commit message.
---
drivers/misc/aspeed-lpc-snoop.c | 34 +-
1 file changed, 29 insertions(+), 5 deletions(-)
diff --git a/drivers/misc/aspeed-lpc-snoop.c b/drivers/misc/aspeed-lpc-snoop.c
index 593905565b74..cb78c98bc78d 100644
--- a/drivers/misc/aspeed-lpc-snoop.c
+++ b/drivers/misc/aspeed-lpc-snoop.c
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
#include
@@ -51,6 +52,13 @@
#define HICRB_ENSNP0D BIT(14)
#define HICRB_ENSNP1D BIT(15)
+struct aspeed_lpc_snoop_model_data {
+ /* The ast2400 has bits 14 and 15 as reserved, whereas the ast2500
+* can use them.
+*/
+ unsigned int has_hicrb_ensnp;
+};
+
struct aspeed_lpc_snoop {
struct regmap *regmap;
int irq;
@@ -123,10 +131,13 @@ static int aspeed_lpc_snoop_config_irq(struct
aspeed_lpc_snoop *lpc_snoop,
}
static int aspeed_lpc_enable_snoop(struct aspeed_lpc_snoop *lpc_snoop,
- int channel, u16 lpc_port)
+ struct device *dev,
+ int channel, u16 lpc_port)
{
int rc = 0;
u32 hicr5_en, snpwadr_mask, snpwadr_shift, hicrb_en;
+ const struct aspeed_lpc_snoop_model_data *model_data =
+ of_device_get_match_data(dev);
/* Create FIFO datastructure */
rc = kfifo_alloc(&lpc_snoop->snoop_fifo[channel],
@@ -155,7 +166,9 @@ static int aspeed_lpc_enable_snoop(struct aspeed_lpc_snoop
*lpc_snoop,
regmap_update_bits(lpc_snoop->regmap, HICR5, hicr5_en, hicr5_en);
regmap_update_bits(lpc_snoop->regmap, SNPWADR, snpwadr_mask,
lpc_port << snpwadr_shift);
- regmap_update_bits(lpc_snoop->regmap, HICRB, hicrb_en, hicrb_en);
+ if (model_data->has_hicrb_ensnp)
+ regmap_update_bits(lpc_snoop->regmap, HICRB,
+ hicrb_en, hicrb_en);
return rc;
}
@@ -213,14 +226,14 @@ static int aspeed_lpc_snoop_probe(struct platform_device
*pdev)
if (rc)
return rc;
- rc = aspeed_lpc_enable_snoop(lpc_snoop, 0, port);
+ rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 0, port);
if (rc)
return rc;
/* Configuration of 2nd snoop channel port is optional */
if (of_property_read_u32_index(dev->of_node, "snoop-ports",
1, &port) == 0) {
- rc = aspeed_lpc_enable_snoop(lpc_snoop, 1, port);
+ rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 1, port);
if (rc)
aspeed_lpc_disable_snoop(lpc_snoop, 0);
}
@@ -239,8 +252,19 @@ static int aspeed_lpc_snoop_remove(struct platform_device
*pdev)
return 0;
}
+static const struct aspeed_lpc_snoop_model_data ast2400_model_data = {
+ .has_hicrb_ensnp = 0,
+};
+
+static const struct aspeed_lpc_snoop_model_data ast2500_model_data = {
+ .has_hicrb_ensnp = 1,
+};
+
static const struct of_device_id aspeed_lpc_snoop_match[] = {
- { .compatible = "aspeed,ast2500-lpc-snoop" },
+ { .compatible = "aspeed,ast2400-lpc-snoop",
+ .data = &ast2400_model_data },
+ { .compatible = "aspeed,ast2500-lpc-snoop",
+ .data = &ast2500_model_data },
{ },
};
--
2.13.2.725.g09c95d1e9-goog
Re: [PATCH v3] drivers/misc: (aspeed-lpc-snoop): Add ast2400 to compat
On Thu, Jul 6, 2017 at 10:00 AM, Patrick Venture wrote:
> On Wed, Jul 5, 2017 at 2:51 PM, Patrick Venture wrote:
>> This driver can be used on the aspeed ast2400 with minor
>> modifications.
>>
>> Tested: ast2400 on quanta-q71l
>>
>> Signed-off-by: Patrick Venture
>> ---
>> v3: added .data object to determine behavior difference between ast2400 and
>> ast2500.
>> v2: added aspeed-g5 area because ast2400 doesn't use those bits.
>> also updated commit message.
>> ---
>> drivers/misc/aspeed-lpc-snoop.c | 34 +-
>> 1 file changed, 29 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/misc/aspeed-lpc-snoop.c
>> b/drivers/misc/aspeed-lpc-snoop.c
>> index 593905565b74..696ad20d8f46 100644
>> --- a/drivers/misc/aspeed-lpc-snoop.c
>> +++ b/drivers/misc/aspeed-lpc-snoop.c
>> @@ -20,6 +20,7 @@
>> #include
>> #include
>> #include
>> +#include
>> #include
>> #include
>>
>> @@ -51,6 +52,13 @@
>> #define HICRB_ENSNP0D BIT(14)
>> #define HICRB_ENSNP1D BIT(15)
>>
>> +struct aspeed_lpc_snoop_model_data {
>> + /* The ast2400 has bits 14 and 15 as reserved, whereas the ast2500
>> +* can use them.
>> +*/
>> + unsigned int has_hicrb_ensnp;
>> +};
>> +
>> struct aspeed_lpc_snoop {
>> struct regmap *regmap;
>> int irq;
>> @@ -123,10 +131,13 @@ static int aspeed_lpc_snoop_config_irq(struct
>> aspeed_lpc_snoop *lpc_snoop,
>> }
>>
>> static int aspeed_lpc_enable_snoop(struct aspeed_lpc_snoop *lpc_snoop,
>> - int channel, u16 lpc_port)
>> + struct device *dev,
>> + int channel, u16 lpc_port)
>> {
>> int rc = 0;
>> u32 hicr5_en, snpwadr_mask, snpwadr_shift, hicrb_en;
>> + const struct aspeed_lpc_snoop_model_data *model_data =
>> + of_device_get_match_data(dev);
>>
>> /* Create FIFO datastructure */
>> rc = kfifo_alloc(&lpc_snoop->snoop_fifo[channel],
>> @@ -155,7 +166,9 @@ static int aspeed_lpc_enable_snoop(struct
>> aspeed_lpc_snoop *lpc_snoop,
>> regmap_update_bits(lpc_snoop->regmap, HICR5, hicr5_en, hicr5_en);
>> regmap_update_bits(lpc_snoop->regmap, SNPWADR, snpwadr_mask,
>>lpc_port << snpwadr_shift);
>> - regmap_update_bits(lpc_snoop->regmap, HICRB, hicrb_en, hicrb_en);
>> + if (model_data->has_hicrb_ensnp)
>> + regmap_update_bits(lpc_snoop->regmap, HICRB,
>> + hicrb_en, hicrb_en);
>>
>> return rc;
>> }
>> @@ -213,14 +226,14 @@ static int aspeed_lpc_snoop_probe(struct
>> platform_device *pdev)
>> if (rc)
>> return rc;
>>
>> - rc = aspeed_lpc_enable_snoop(lpc_snoop, 0, port);
>> + rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 0, port);
>> if (rc)
>> return rc;
>>
>> /* Configuration of 2nd snoop channel port is optional */
>> if (of_property_read_u32_index(dev->of_node, "snoop-ports",
>>1, &port) == 0) {
>> - rc = aspeed_lpc_enable_snoop(lpc_snoop, 1, port);
>> + rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 1, port);
>> if (rc)
>> aspeed_lpc_disable_snoop(lpc_snoop, 0);
>> }
>> @@ -239,8 +252,19 @@ static int aspeed_lpc_snoop_remove(struct
>> platform_device *pdev)
>> return 0;
>> }
>>
>> +static const struct aspeed_lpc_snoop_model_data ast2400_model_data = {
>> + .has_hicrb_ensnp = 0,
>> +};
>> +
>> +static const struct aspeed_lpc_snoop_model_data ast2500_model_data = {
>> + .has_hicrb_ensnp = 1,
>> +};
>> +
>> static const struct of_device_id aspeed_lpc_snoop_match[] = {
>> - { .compatible = "aspeed,ast2500-lpc-snoop" },
>> + { .compatible = "aspeed,ast2500-lpc-snoop",
>> + .data = &ast2400_model_data },
>> + { .compatible = "aspeed,ast2400-lpc-snoop",
>> + .data = &ast2500_model_data },
>> { },
>
> This looks backwards. Let me check in a non-diff and then resubmit.
>
Since the register setting is harmless on the ast2400, it had a null
effect for my testing, but ast2500 would have an issue. :D
>> };
>>
>> --
>> 2.13.2.725.g09c95d1e9-goog
>>
Re: [PATCH v3] drivers/misc: (aspeed-lpc-snoop): Add ast2400 to compat
On Wed, Jul 5, 2017 at 2:51 PM, Patrick Venture wrote:
> This driver can be used on the aspeed ast2400 with minor
> modifications.
>
> Tested: ast2400 on quanta-q71l
>
> Signed-off-by: Patrick Venture
> ---
> v3: added .data object to determine behavior difference between ast2400 and
> ast2500.
> v2: added aspeed-g5 area because ast2400 doesn't use those bits.
> also updated commit message.
> ---
> drivers/misc/aspeed-lpc-snoop.c | 34 +-
> 1 file changed, 29 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/misc/aspeed-lpc-snoop.c b/drivers/misc/aspeed-lpc-snoop.c
> index 593905565b74..696ad20d8f46 100644
> --- a/drivers/misc/aspeed-lpc-snoop.c
> +++ b/drivers/misc/aspeed-lpc-snoop.c
> @@ -20,6 +20,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
>
> @@ -51,6 +52,13 @@
> #define HICRB_ENSNP0D BIT(14)
> #define HICRB_ENSNP1D BIT(15)
>
> +struct aspeed_lpc_snoop_model_data {
> + /* The ast2400 has bits 14 and 15 as reserved, whereas the ast2500
> +* can use them.
> +*/
> + unsigned int has_hicrb_ensnp;
> +};
> +
> struct aspeed_lpc_snoop {
> struct regmap *regmap;
> int irq;
> @@ -123,10 +131,13 @@ static int aspeed_lpc_snoop_config_irq(struct
> aspeed_lpc_snoop *lpc_snoop,
> }
>
> static int aspeed_lpc_enable_snoop(struct aspeed_lpc_snoop *lpc_snoop,
> - int channel, u16 lpc_port)
> + struct device *dev,
> + int channel, u16 lpc_port)
> {
> int rc = 0;
> u32 hicr5_en, snpwadr_mask, snpwadr_shift, hicrb_en;
> + const struct aspeed_lpc_snoop_model_data *model_data =
> + of_device_get_match_data(dev);
>
> /* Create FIFO datastructure */
> rc = kfifo_alloc(&lpc_snoop->snoop_fifo[channel],
> @@ -155,7 +166,9 @@ static int aspeed_lpc_enable_snoop(struct
> aspeed_lpc_snoop *lpc_snoop,
> regmap_update_bits(lpc_snoop->regmap, HICR5, hicr5_en, hicr5_en);
> regmap_update_bits(lpc_snoop->regmap, SNPWADR, snpwadr_mask,
>lpc_port << snpwadr_shift);
> - regmap_update_bits(lpc_snoop->regmap, HICRB, hicrb_en, hicrb_en);
> + if (model_data->has_hicrb_ensnp)
> + regmap_update_bits(lpc_snoop->regmap, HICRB,
> + hicrb_en, hicrb_en);
>
> return rc;
> }
> @@ -213,14 +226,14 @@ static int aspeed_lpc_snoop_probe(struct
> platform_device *pdev)
> if (rc)
> return rc;
>
> - rc = aspeed_lpc_enable_snoop(lpc_snoop, 0, port);
> + rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 0, port);
> if (rc)
> return rc;
>
> /* Configuration of 2nd snoop channel port is optional */
> if (of_property_read_u32_index(dev->of_node, "snoop-ports",
>1, &port) == 0) {
> - rc = aspeed_lpc_enable_snoop(lpc_snoop, 1, port);
> + rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 1, port);
> if (rc)
> aspeed_lpc_disable_snoop(lpc_snoop, 0);
> }
> @@ -239,8 +252,19 @@ static int aspeed_lpc_snoop_remove(struct
> platform_device *pdev)
> return 0;
> }
>
> +static const struct aspeed_lpc_snoop_model_data ast2400_model_data = {
> + .has_hicrb_ensnp = 0,
> +};
> +
> +static const struct aspeed_lpc_snoop_model_data ast2500_model_data = {
> + .has_hicrb_ensnp = 1,
> +};
> +
> static const struct of_device_id aspeed_lpc_snoop_match[] = {
> - { .compatible = "aspeed,ast2500-lpc-snoop" },
> + { .compatible = "aspeed,ast2500-lpc-snoop",
> + .data = &ast2400_model_data },
> + { .compatible = "aspeed,ast2400-lpc-snoop",
> + .data = &ast2500_model_data },
> { },
This looks backwards. Let me check in a non-diff and then resubmit.
> };
>
> --
> 2.13.2.725.g09c95d1e9-goog
>
[PATCH v3] drivers/misc: (aspeed-lpc-snoop): Add ast2400 to compat
This driver can be used on the aspeed ast2400 with minor
modifications.
Tested: ast2400 on quanta-q71l
Signed-off-by: Patrick Venture
---
v3: added .data object to determine behavior difference between ast2400 and
ast2500.
v2: added aspeed-g5 area because ast2400 doesn't use those bits.
also updated commit message.
---
drivers/misc/aspeed-lpc-snoop.c | 34 +-
1 file changed, 29 insertions(+), 5 deletions(-)
diff --git a/drivers/misc/aspeed-lpc-snoop.c b/drivers/misc/aspeed-lpc-snoop.c
index 593905565b74..696ad20d8f46 100644
--- a/drivers/misc/aspeed-lpc-snoop.c
+++ b/drivers/misc/aspeed-lpc-snoop.c
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
#include
@@ -51,6 +52,13 @@
#define HICRB_ENSNP0D BIT(14)
#define HICRB_ENSNP1D BIT(15)
+struct aspeed_lpc_snoop_model_data {
+ /* The ast2400 has bits 14 and 15 as reserved, whereas the ast2500
+* can use them.
+*/
+ unsigned int has_hicrb_ensnp;
+};
+
struct aspeed_lpc_snoop {
struct regmap *regmap;
int irq;
@@ -123,10 +131,13 @@ static int aspeed_lpc_snoop_config_irq(struct
aspeed_lpc_snoop *lpc_snoop,
}
static int aspeed_lpc_enable_snoop(struct aspeed_lpc_snoop *lpc_snoop,
- int channel, u16 lpc_port)
+ struct device *dev,
+ int channel, u16 lpc_port)
{
int rc = 0;
u32 hicr5_en, snpwadr_mask, snpwadr_shift, hicrb_en;
+ const struct aspeed_lpc_snoop_model_data *model_data =
+ of_device_get_match_data(dev);
/* Create FIFO datastructure */
rc = kfifo_alloc(&lpc_snoop->snoop_fifo[channel],
@@ -155,7 +166,9 @@ static int aspeed_lpc_enable_snoop(struct aspeed_lpc_snoop
*lpc_snoop,
regmap_update_bits(lpc_snoop->regmap, HICR5, hicr5_en, hicr5_en);
regmap_update_bits(lpc_snoop->regmap, SNPWADR, snpwadr_mask,
lpc_port << snpwadr_shift);
- regmap_update_bits(lpc_snoop->regmap, HICRB, hicrb_en, hicrb_en);
+ if (model_data->has_hicrb_ensnp)
+ regmap_update_bits(lpc_snoop->regmap, HICRB,
+ hicrb_en, hicrb_en);
return rc;
}
@@ -213,14 +226,14 @@ static int aspeed_lpc_snoop_probe(struct platform_device
*pdev)
if (rc)
return rc;
- rc = aspeed_lpc_enable_snoop(lpc_snoop, 0, port);
+ rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 0, port);
if (rc)
return rc;
/* Configuration of 2nd snoop channel port is optional */
if (of_property_read_u32_index(dev->of_node, "snoop-ports",
1, &port) == 0) {
- rc = aspeed_lpc_enable_snoop(lpc_snoop, 1, port);
+ rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 1, port);
if (rc)
aspeed_lpc_disable_snoop(lpc_snoop, 0);
}
@@ -239,8 +252,19 @@ static int aspeed_lpc_snoop_remove(struct platform_device
*pdev)
return 0;
}
+static const struct aspeed_lpc_snoop_model_data ast2400_model_data = {
+ .has_hicrb_ensnp = 0,
+};
+
+static const struct aspeed_lpc_snoop_model_data ast2500_model_data = {
+ .has_hicrb_ensnp = 1,
+};
+
static const struct of_device_id aspeed_lpc_snoop_match[] = {
- { .compatible = "aspeed,ast2500-lpc-snoop" },
+ { .compatible = "aspeed,ast2500-lpc-snoop",
+ .data = &ast2400_model_data },
+ { .compatible = "aspeed,ast2400-lpc-snoop",
+ .data = &ast2500_model_data },
{ },
};
--
2.13.2.725.g09c95d1e9-goog
Re: [PATCH v2] drivers/misc: (aspeed-lpc-snoop): Add ast2400 to compat
On Wed, Jul 5, 2017 at 12:43 PM, Arnd Bergmann wrote: > On Wed, Jul 5, 2017 at 9:04 PM, Patrick Venture wrote: >> This driver can be used on the aspeed ast2400 with minor >> modifications. >> >> Tested: ast2400 on quanta-q71l >> >> Signed-off-by: Patrick Venture >> --- >> v2: added aspeed-g5 area because ast2400 doesn't use those bits. >> also updated commit message. >> --- >> drivers/misc/aspeed-lpc-snoop.c | 4 +++- >> 1 file changed, 3 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/misc/aspeed-lpc-snoop.c >> b/drivers/misc/aspeed-lpc-snoop.c >> index 593905565b74..83f9a9e5a7cf 100644 >> --- a/drivers/misc/aspeed-lpc-snoop.c >> +++ b/drivers/misc/aspeed-lpc-snoop.c >> @@ -155,8 +155,9 @@ static int aspeed_lpc_enable_snoop(struct >> aspeed_lpc_snoop *lpc_snoop, >> regmap_update_bits(lpc_snoop->regmap, HICR5, hicr5_en, hicr5_en); >> regmap_update_bits(lpc_snoop->regmap, SNPWADR, snpwadr_mask, >>lpc_port << snpwadr_shift); >> +#ifdef CONFIG_MACH_ASPEED_G5 >> regmap_update_bits(lpc_snoop->regmap, HICRB, hicrb_en, hicrb_en); >> - >> +#endif >> return rc; >> } > > Hi Patrick, > > Sorry for bringing up yet another point on a fairly trivial patch, but > in general, > I'd recommend making this a runtime check rather than compile-time. > > At the moment, your version is safe because CONFIG_MACH_ASPEED_G5 > and CONFIG_MACH_ASPEED_G4 are mutually exclusive and there is > always one of them set, but once we get support for G6, G7 etc, > the driver might silently break when it behaves differently depending > on a configuration option that may or may not be set on a particular > kernel build. > > You can use the .data field in the of_device_id to add a trigger for the > behavior change. > >Arnd No problem whatsoever. You're quite right. I forgot about future aspeed platforms. I'm going to dig around a few drivers and see what the right way is to handle this at run-time. Presumably something like: #ifdef CONFIG_MACH_ASPEED_G4 .data = G4, #else .data = G5, #endif Since we're holding that maybe the future should default to this behaviour. Is it linux standard to do something like #(error) in the #else so that it fails if they didn't update this driver instead of defaulting to the G5 setting? Thanks, Patrick
[PATCH v2] drivers/misc: (aspeed-lpc-snoop): Add ast2400 to compat
This driver can be used on the aspeed ast2400 with minor
modifications.
Tested: ast2400 on quanta-q71l
Signed-off-by: Patrick Venture
---
v2: added aspeed-g5 area because ast2400 doesn't use those bits.
also updated commit message.
---
drivers/misc/aspeed-lpc-snoop.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/aspeed-lpc-snoop.c b/drivers/misc/aspeed-lpc-snoop.c
index 593905565b74..83f9a9e5a7cf 100644
--- a/drivers/misc/aspeed-lpc-snoop.c
+++ b/drivers/misc/aspeed-lpc-snoop.c
@@ -155,8 +155,9 @@ static int aspeed_lpc_enable_snoop(struct aspeed_lpc_snoop
*lpc_snoop,
regmap_update_bits(lpc_snoop->regmap, HICR5, hicr5_en, hicr5_en);
regmap_update_bits(lpc_snoop->regmap, SNPWADR, snpwadr_mask,
lpc_port << snpwadr_shift);
+#ifdef CONFIG_MACH_ASPEED_G5
regmap_update_bits(lpc_snoop->regmap, HICRB, hicrb_en, hicrb_en);
-
+#endif
return rc;
}
@@ -241,6 +242,7 @@ static int aspeed_lpc_snoop_remove(struct platform_device
*pdev)
static const struct of_device_id aspeed_lpc_snoop_match[] = {
{ .compatible = "aspeed,ast2500-lpc-snoop" },
+ { .compatible = "aspeed,ast2400-lpc-snoop" },
{ },
};
--
2.13.2.725.g09c95d1e9-goog
Re: [PATCH linux dev-4.10] drivers/misc: (aspeed-lpc-snoop): Add ast2400 to compat
On Wed, Jul 5, 2017 at 10:52 AM, Rob Lippert wrote:
> On Wed, Jul 5, 2017 at 10:48 AM, Patrick Venture wrote:
>> On Wed, Jul 5, 2017 at 10:33 AM, Rob Lippert wrote:
>>> I checked the datasheets when I wrote this and ast2400 does not have
>>> the (undocumented) HICRB register bits 14,15 that enables the BMC to
>>> actually respond to the snoop'ed address.
>>
>> You're right, it is marked as "reserved" in the datasheet for the ast2400.
>>
>>>
>>> Without setting that bit in the ast2500 the transactions to that I/O
>>> port would timeout on the host side (although the BMC snoop logic
>>> would still see it and log it).
>>> Probably not an issue for x86 systems that don't have any LPC I/O
>>> error handling anyways but LPC timeouts causes issues with POWER
>>> systems since it sets a hardware FIR bit which can cause boot
>>> failures.
>>
>> Interesting. I've been running experiments on x86 and I haven't seen
>> any errors, so that adds more credence to your point. If a device
>> doesn't respond within X time, three times in a row, you get a triple
>> fault. But, on x86, I don't think I've seen any mechanism with an
>> expectation that a port IO write will have a guaranteed response.
>>
>> For the use-case I'm chasing, my goal being to snoop PoST codes from
>> the host, there is in the datasheet a post-code control register set,
>> but I haven't explored configuring them or whether someone has written
>> the fifo driver for them.
>>
>>>
>>> -Rob
>>>
>>> On Tue, Jul 4, 2017 at 8:45 AM, Patrick Venture wrote:
>>>> This driver can be used on the aspeed ast2400.
>>>>
>>>> Tested: ast2400 on quanta-q71l
>>>>
>>>> Signed-off-by: Patrick Venture
>>>> ---
>>>> drivers/misc/aspeed-lpc-snoop.c | 1 +
>>>> 1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/drivers/misc/aspeed-lpc-snoop.c
>>>> b/drivers/misc/aspeed-lpc-snoop.c
>>>> index 593905565b74..0647cff6280a 100644
>>>> --- a/drivers/misc/aspeed-lpc-snoop.c
>>>> +++ b/drivers/misc/aspeed-lpc-snoop.c
>>>> @@ -241,6 +241,7 @@ static int aspeed_lpc_snoop_remove(struct
>>>> platform_device *pdev)
>>>>
>>>> static const struct of_device_id aspeed_lpc_snoop_match[] = {
>>>> { .compatible = "aspeed,ast2500-lpc-snoop" },
>>>> + { .compatible = "aspeed,ast2400-lpc-snoop" },
>>>> { },
>>
>> An approach would be to ditch this change and instead refer to the
>> ast2500-lpc-snoop in my device-tree to avoid anyone non-x86 from
>> running this configuration and hitting issues.
>
> This change is probably fine since the driver does still work but you
> should also guard the setting of the HICRB bits with #ifdef
> MACH_ASPEED_G5 or similar to avoid setting reserved bits on the G4
> hardware.
Will update patch forthwith.
>
> -Rob
Re: [PATCH linux dev-4.10] drivers/misc: (aspeed-lpc-snoop): Add ast2400 to compat
On Wed, Jul 5, 2017 at 10:33 AM, Rob Lippert wrote:
> I checked the datasheets when I wrote this and ast2400 does not have
> the (undocumented) HICRB register bits 14,15 that enables the BMC to
> actually respond to the snoop'ed address.
You're right, it is marked as "reserved" in the datasheet for the ast2400.
>
> Without setting that bit in the ast2500 the transactions to that I/O
> port would timeout on the host side (although the BMC snoop logic
> would still see it and log it).
> Probably not an issue for x86 systems that don't have any LPC I/O
> error handling anyways but LPC timeouts causes issues with POWER
> systems since it sets a hardware FIR bit which can cause boot
> failures.
Interesting. I've been running experiments on x86 and I haven't seen
any errors, so that adds more credence to your point. If a device
doesn't respond within X time, three times in a row, you get a triple
fault. But, on x86, I don't think I've seen any mechanism with an
expectation that a port IO write will have a guaranteed response.
For the use-case I'm chasing, my goal being to snoop PoST codes from
the host, there is in the datasheet a post-code control register set,
but I haven't explored configuring them or whether someone has written
the fifo driver for them.
>
> -Rob
>
> On Tue, Jul 4, 2017 at 8:45 AM, Patrick Venture wrote:
>> This driver can be used on the aspeed ast2400.
>>
>> Tested: ast2400 on quanta-q71l
>>
>> Signed-off-by: Patrick Venture
>> ---
>> drivers/misc/aspeed-lpc-snoop.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/misc/aspeed-lpc-snoop.c
>> b/drivers/misc/aspeed-lpc-snoop.c
>> index 593905565b74..0647cff6280a 100644
>> --- a/drivers/misc/aspeed-lpc-snoop.c
>> +++ b/drivers/misc/aspeed-lpc-snoop.c
>> @@ -241,6 +241,7 @@ static int aspeed_lpc_snoop_remove(struct
>> platform_device *pdev)
>>
>> static const struct of_device_id aspeed_lpc_snoop_match[] = {
>> { .compatible = "aspeed,ast2500-lpc-snoop" },
>> + { .compatible = "aspeed,ast2400-lpc-snoop" },
>> { },
An approach would be to ditch this change and instead refer to the
ast2500-lpc-snoop in my device-tree to avoid anyone non-x86 from
running this configuration and hitting issues.
>> };
>>
>> --
>> 2.13.2.725.g09c95d1e9-goog
>>
[PATCH] drivers/misc: (aspeed-lpc-snoop): Add ast2400 to compat
This driver can be used on the aspeed ast2400.
Tested: ast2400 on quanta-q71l
Signed-off-by: Patrick Venture
---
drivers/misc/aspeed-lpc-snoop.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/misc/aspeed-lpc-snoop.c b/drivers/misc/aspeed-lpc-snoop.c
index 593905565b74..0647cff6280a 100644
--- a/drivers/misc/aspeed-lpc-snoop.c
+++ b/drivers/misc/aspeed-lpc-snoop.c
@@ -241,6 +241,7 @@ static int aspeed_lpc_snoop_remove(struct platform_device
*pdev)
static const struct of_device_id aspeed_lpc_snoop_match[] = {
{ .compatible = "aspeed,ast2500-lpc-snoop" },
+ { .compatible = "aspeed,ast2400-lpc-snoop" },
{ },
};
--
2.13.2.725.g09c95d1e9-goog
Re: [PATCH linux dev-4.10] drivers/misc: (aspeed-lpc-snoop): Add ast2400 to compat
On Tue, Jul 4, 2017 at 8:50 AM, Greg KH wrote: > On Tue, Jul 04, 2017 at 08:45:03AM -0700, Patrick Venture wrote: >> This driver can be used on the aspeed ast2400. >> >> Tested: ast2400 on quanta-q71l >> >> Signed-off-by: Patrick Venture >> --- >> drivers/misc/aspeed-lpc-snoop.c | 1 + >> 1 file changed, 1 insertion(+) > > How can we go back in time and apply something to the 4.10 kernel tree? > > confused, > > greg k-h Ooops. Bad subject line. I originally submitted this to a downstream 4.10. Let me fix that.
[PATCH linux dev-4.10] drivers/misc: (aspeed-lpc-snoop): Add ast2400 to compat
This driver can be used on the aspeed ast2400.
Tested: ast2400 on quanta-q71l
Signed-off-by: Patrick Venture
---
drivers/misc/aspeed-lpc-snoop.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/misc/aspeed-lpc-snoop.c b/drivers/misc/aspeed-lpc-snoop.c
index 593905565b74..0647cff6280a 100644
--- a/drivers/misc/aspeed-lpc-snoop.c
+++ b/drivers/misc/aspeed-lpc-snoop.c
@@ -241,6 +241,7 @@ static int aspeed_lpc_snoop_remove(struct platform_device
*pdev)
static const struct of_device_id aspeed_lpc_snoop_match[] = {
{ .compatible = "aspeed,ast2500-lpc-snoop" },
+ { .compatible = "aspeed,ast2400-lpc-snoop" },
{ },
};
--
2.13.2.725.g09c95d1e9-goog
[PATCH] ARM: aspeed: select GPIOLIB
Signed-off-by: Patrick Venture --- arch/arm/mach-aspeed/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig index f3f8c5c658db..b71ab9f37eb1 100644 --- a/arch/arm/mach-aspeed/Kconfig +++ b/arch/arm/mach-aspeed/Kconfig @@ -7,6 +7,7 @@ menuconfig ARCH_ASPEED select MOXART_TIMER select MFD_SYSCON select PINCTRL + select GPIOLIB help Say Y here if you want to run your kernel on an ASpeed BMC SoC. -- 2.13.2.725.g09c95d1e9-goog
