[PATCH] MAINTAINERS: Update E-mail address

[Peter Senna Tschudin]

Update my E-mail address on MAINTAINERS file.

Signed-off-by: Peter Senna Tschudin 
---
 MAINTAINERS | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index a29d10f25e27..3204ea8c2a8f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9133,7 +9133,7 @@ S:Maintained
 F: drivers/usb/mtu3/
 
 MEGACHIPS STDP-GE-B850V3-FW LVDS/DP++ BRIDGES
-M: Peter Senna Tschudin 
+M: Peter Senna Tschudin 
 M: Martin Donnelly 
 M: Martyn Welch 
 S: Maintained
-- 
2.17.1

[PATCH] MAINTAINERS: Update E-mail address

[Peter Senna Tschudin]

Update my E-mail address on MAINTAINERS file.

Signed-off-by: Peter Senna Tschudin 
---
 MAINTAINERS | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index a29d10f25e27..3204ea8c2a8f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9133,7 +9133,7 @@ S:Maintained
 F: drivers/usb/mtu3/
 
 MEGACHIPS STDP-GE-B850V3-FW LVDS/DP++ BRIDGES
-M: Peter Senna Tschudin 
+M: Peter Senna Tschudin 
 M: Martin Donnelly 
 M: Martyn Welch 
 S: Maintained
-- 
2.17.1

Re: [RFC, PATCH] imx: serial: Take tty->files_lock opportunistically

[Peter Senna Tschudin]

On Tue, May 30, 2017 at 02:42:13PM +0100, Alan Cox wrote:

I sent a second patch recently:

https://patchwork.kernel.org/patch/9725625/

> > > Fixes: 18a4208826dd0a13eb06de724c86bba2c225f943 ("imx-serial: Reduce
> > > RX DMA startup latency when opening for reading")
> > >
> > > Cc: cphe...@gmail.com
> > > Cc: Peter Senna Tschudin <peter.se...@collabora.com>
> > > Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
> > > Cc: Jiri Slaby <jsl...@suse.com>
> > > Cc: linux-kernel@vger.kernel.org
> > > Signed-off-by: Andrey Smirnov <andrew.smir...@gmail.com>
> > > ---
> > >
> > > Not sure if this is the best way to solve the problem (hence the RFC
> > > tag). If anyone has a better idea, or if there's a better fix for this
> > > already, please let me know.  
> > 
> > IMO, the low level serial drivers shouldn't be accessing
> > tty->tty_files in the first place. Is being opened for write-only that
> > common and is skipping the DMA setup really necessary?
> 
> Seconded - the Reduce RX DMA startup latency patch should just be
> reverted (and shouldn't ever IMHO have gotten in).
> 
> Not all readers and writers to a tty have a file handle any more anyway,
> so it's not only icky and layer violating it's fundamentally broken
> beyond the locking.
> 
> Alan

Re: [RFC, PATCH] imx: serial: Take tty->files_lock opportunistically

[Peter Senna Tschudin]

On Tue, May 30, 2017 at 02:42:13PM +0100, Alan Cox wrote:

I sent a second patch recently:

https://patchwork.kernel.org/patch/9725625/

> > > Fixes: 18a4208826dd0a13eb06de724c86bba2c225f943 ("imx-serial: Reduce
> > > RX DMA startup latency when opening for reading")
> > >
> > > Cc: cphe...@gmail.com
> > > Cc: Peter Senna Tschudin 
> > > Cc: Greg Kroah-Hartman 
> > > Cc: Jiri Slaby 
> > > Cc: linux-kernel@vger.kernel.org
> > > Signed-off-by: Andrey Smirnov 
> > > ---
> > >
> > > Not sure if this is the best way to solve the problem (hence the RFC
> > > tag). If anyone has a better idea, or if there's a better fix for this
> > > already, please let me know.  
> > 
> > IMO, the low level serial drivers shouldn't be accessing
> > tty->tty_files in the first place. Is being opened for write-only that
> > common and is skipping the DMA setup really necessary?
> 
> Seconded - the Reduce RX DMA startup latency patch should just be
> reverted (and shouldn't ever IMHO have gotten in).
> 
> Not all readers and writers to a tty have a file handle any more anyway,
> so it's not only icky and layer violating it's fundamentally broken
> beyond the locking.
> 
> Alan

[PATCH] imx-serial: RX DMA startup latency

[Peter Senna Tschudin]

18a4208 introduced a change to reduce the RX DMA latency on the first reception
when the serial port was opened for reading. However it was claiming a hardirq
unsafe lock after a hardirq safe lock which is not allowed and causes lockdep
to complain verbosely.

This patch changes the code to always start RX DMA earlier, instead of
relying on the flags used to open the serial port removing the code that
was looking for the serial file flags.

CC: Sascha Hauer <s.ha...@pengutronix.de>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---
Tested on iMX53.

 drivers/tty/serial/imx.c | 26 +-
 1 file changed, 5 insertions(+), 21 deletions(-)

diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 33509b4..64e16b3 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -1340,29 +1340,13 @@ static int imx_startup(struct uart_port *port)
imx_enable_ms(>port);
 
/*
-* If the serial port is opened for reading start RX DMA immediately
-* instead of waiting for RX FIFO interrupts. In our iMX53 the average
-* delay for the first reception dropped from approximately 35000
-* microseconds to 1000 microseconds.
+* Start RX DMA immediately instead of waiting for RX FIFO interrupts.
+* In our iMX53 the average delay for the first reception dropped from
+* approximately 35000 microseconds to 1000 microseconds.
 */
if (sport->dma_is_enabled) {
-   struct tty_struct *tty = sport->port.state->port.tty;
-   struct tty_file_private *file_priv;
-   int readcnt = 0;
-
-   spin_lock(>files_lock);
-
-   if (!list_empty(>tty_files))
-   list_for_each_entry(file_priv, >tty_files, list)
-   if (!(file_priv->file->f_flags & O_WRONLY))
-   readcnt++;
-
-   spin_unlock(>files_lock);
-
-   if (readcnt > 0) {
-   imx_disable_rx_int(sport);
-   start_rx_dma(sport);
-   }
+   imx_disable_rx_int(sport);
+   start_rx_dma(sport);
}
 
spin_unlock_irqrestore(>port.lock, flags);
-- 
2.9.3

[PATCH] imx-serial: RX DMA startup latency

[Peter Senna Tschudin]

18a4208 introduced a change to reduce the RX DMA latency on the first reception
when the serial port was opened for reading. However it was claiming a hardirq
unsafe lock after a hardirq safe lock which is not allowed and causes lockdep
to complain verbosely.

This patch changes the code to always start RX DMA earlier, instead of
relying on the flags used to open the serial port removing the code that
was looking for the serial file flags.

CC: Sascha Hauer 
Signed-off-by: Peter Senna Tschudin 
---
Tested on iMX53.

 drivers/tty/serial/imx.c | 26 +-
 1 file changed, 5 insertions(+), 21 deletions(-)

diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 33509b4..64e16b3 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -1340,29 +1340,13 @@ static int imx_startup(struct uart_port *port)
imx_enable_ms(>port);
 
/*
-* If the serial port is opened for reading start RX DMA immediately
-* instead of waiting for RX FIFO interrupts. In our iMX53 the average
-* delay for the first reception dropped from approximately 35000
-* microseconds to 1000 microseconds.
+* Start RX DMA immediately instead of waiting for RX FIFO interrupts.
+* In our iMX53 the average delay for the first reception dropped from
+* approximately 35000 microseconds to 1000 microseconds.
 */
if (sport->dma_is_enabled) {
-   struct tty_struct *tty = sport->port.state->port.tty;
-   struct tty_file_private *file_priv;
-   int readcnt = 0;
-
-   spin_lock(>files_lock);
-
-   if (!list_empty(>tty_files))
-   list_for_each_entry(file_priv, >tty_files, list)
-   if (!(file_priv->file->f_flags & O_WRONLY))
-   readcnt++;
-
-   spin_unlock(>files_lock);
-
-   if (readcnt > 0) {
-   imx_disable_rx_int(sport);
-   start_rx_dma(sport);
-   }
+   imx_disable_rx_int(sport);
+   start_rx_dma(sport);
}
 
spin_unlock_irqrestore(>port.lock, flags);
-- 
2.9.3

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Wed, May 10, 2017 at 03:32:19PM +0200, Lucas Stach wrote:
> Am Mittwoch, den 10.05.2017, 10:27 -0300 schrieb Fabio Estevam:
> > On Wed, May 10, 2017 at 10:17 AM, Peter Senna Tschudin
> > <peter.se...@collabora.com> wrote:
> > > On Tue, May 09, 2017 at 07:21:24AM -0300, Fabio Estevam wrote:
> > >> Hi Peter,
> > >>
> > >> On Tue, May 9, 2017 at 3:34 AM, Peter Senna Tschudin
> > >> <peter.se...@collabora.com> wrote:
> > >>
> > >> > Something that ocurred to me is that u-boot is initializing the PCI, 
> > >> > and
> > >> > the PCI networkd cards.  Ideally this should not affect anything, but
> > >> > can this be related to the issue?
> > >>
> > >> Yes, in order to narrow things down: please boot 4.11 without PCI
> > >> support in U-Boot.
> > >
> > > Yes, removing the PCI code from u-boot makes 4.11 to boot. But latest
> > > next still hangs.
> > 
> > Ok, good. At least we see the same behaviour now.
> > 
> > We still need a fix for the mx6q hang on systems with PCI switch for
> > linux/next or 4.12-rc1.
> 
> I will take a look at this today.

I'll be more than happy to help. Let me know if you need testing or any
other thing.

> 
> > 
> > >> The problem is that mx6q does not have a way to properly reset the PCI 
> > >> block.
> > >>
> > >> On the board I tested there is no PCI support in U-Boot.
> > >>
> > >> Maybe we need the following approach in U-Boot as Lucas did for Barebox:
> > >> https://git.pengutronix.de/cgit/barebox/commit/?id=f1da98da2760c21487bbba8f7fb957c843a22896
> > >
> > > Maybe we do need, but the kernel is working on v4.10 for our use case,
> > > and it is not working any longer on v4.11. What is the way to continue
> > > from here?
> > 
> > There is no other way other than fixing U-Boot on this case.
> 
> You could also revert the change in the kernel if you are absolutely
> sure that this won't cause issues on your system (you are not using the
> internal watchdog etc.).
> 
> But for the long run and to make sure that _all_ use-cases work
> properly, there is no way around fixing your bootloader to behave
> correctly.

Thanks!

> 
> Regards,
> Lucas
> 

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Wed, May 10, 2017 at 03:32:19PM +0200, Lucas Stach wrote:
> Am Mittwoch, den 10.05.2017, 10:27 -0300 schrieb Fabio Estevam:
> > On Wed, May 10, 2017 at 10:17 AM, Peter Senna Tschudin
> >  wrote:
> > > On Tue, May 09, 2017 at 07:21:24AM -0300, Fabio Estevam wrote:
> > >> Hi Peter,
> > >>
> > >> On Tue, May 9, 2017 at 3:34 AM, Peter Senna Tschudin
> > >>  wrote:
> > >>
> > >> > Something that ocurred to me is that u-boot is initializing the PCI, 
> > >> > and
> > >> > the PCI networkd cards.  Ideally this should not affect anything, but
> > >> > can this be related to the issue?
> > >>
> > >> Yes, in order to narrow things down: please boot 4.11 without PCI
> > >> support in U-Boot.
> > >
> > > Yes, removing the PCI code from u-boot makes 4.11 to boot. But latest
> > > next still hangs.
> > 
> > Ok, good. At least we see the same behaviour now.
> > 
> > We still need a fix for the mx6q hang on systems with PCI switch for
> > linux/next or 4.12-rc1.
> 
> I will take a look at this today.

I'll be more than happy to help. Let me know if you need testing or any
other thing.

> 
> > 
> > >> The problem is that mx6q does not have a way to properly reset the PCI 
> > >> block.
> > >>
> > >> On the board I tested there is no PCI support in U-Boot.
> > >>
> > >> Maybe we need the following approach in U-Boot as Lucas did for Barebox:
> > >> https://git.pengutronix.de/cgit/barebox/commit/?id=f1da98da2760c21487bbba8f7fb957c843a22896
> > >
> > > Maybe we do need, but the kernel is working on v4.10 for our use case,
> > > and it is not working any longer on v4.11. What is the way to continue
> > > from here?
> > 
> > There is no other way other than fixing U-Boot on this case.
> 
> You could also revert the change in the kernel if you are absolutely
> sure that this won't cause issues on your system (you are not using the
> internal watchdog etc.).
> 
> But for the long run and to make sure that _all_ use-cases work
> properly, there is no way around fixing your bootloader to behave
> correctly.

Thanks!

> 
> Regards,
> Lucas
> 

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Tue, May 09, 2017 at 07:21:24AM -0300, Fabio Estevam wrote:
> Hi Peter,
> 
> On Tue, May 9, 2017 at 3:34 AM, Peter Senna Tschudin
> <peter.se...@collabora.com> wrote:
> 
> > Something that ocurred to me is that u-boot is initializing the PCI, and
> > the PCI networkd cards.  Ideally this should not affect anything, but
> > can this be related to the issue?
> 
> Yes, in order to narrow things down: please boot 4.11 without PCI
> support in U-Boot.

Yes, removing the PCI code from u-boot makes 4.11 to boot. But latest
next still hangs.

> 
> The problem is that mx6q does not have a way to properly reset the PCI block.
> 
> On the board I tested there is no PCI support in U-Boot.
> 
> Maybe we need the following approach in U-Boot as Lucas did for Barebox:
> https://git.pengutronix.de/cgit/barebox/commit/?id=f1da98da2760c21487bbba8f7fb957c843a22896

Maybe we do need, but the kernel is working on v4.10 for our use case,
and it is not working any longer on v4.11. What is the way to continue
from here?

> 
> According to this patch that went into 4.11 the bootloader must put
> PCI back in a safe state:
> https://patchwork.kernel.org/patch/9528911

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Tue, May 09, 2017 at 07:21:24AM -0300, Fabio Estevam wrote:
> Hi Peter,
> 
> On Tue, May 9, 2017 at 3:34 AM, Peter Senna Tschudin
>  wrote:
> 
> > Something that ocurred to me is that u-boot is initializing the PCI, and
> > the PCI networkd cards.  Ideally this should not affect anything, but
> > can this be related to the issue?
> 
> Yes, in order to narrow things down: please boot 4.11 without PCI
> support in U-Boot.

Yes, removing the PCI code from u-boot makes 4.11 to boot. But latest
next still hangs.

> 
> The problem is that mx6q does not have a way to properly reset the PCI block.
> 
> On the board I tested there is no PCI support in U-Boot.
> 
> Maybe we need the following approach in U-Boot as Lucas did for Barebox:
> https://git.pengutronix.de/cgit/barebox/commit/?id=f1da98da2760c21487bbba8f7fb957c843a22896

Maybe we do need, but the kernel is working on v4.10 for our use case,
and it is not working any longer on v4.11. What is the way to continue
from here?

> 
> According to this patch that went into 4.11 the bootloader must put
> PCI back in a safe state:
> https://patchwork.kernel.org/patch/9528911

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 10:30:13PM -0300, Fabio Estevam wrote:
> Hi Peter,
> 
> On Mon, May 8, 2017 at 12:02 PM, Peter Senna Tschudin
> <peter.se...@collabora.com> wrote:
> > Hello Kishon,
> >
> > Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
> > linux-next and I could bisect until:
> >
> > commit 442ec4c04d1235f8c664a74004dae54a7a574d18
> > Author: Kishon Vijay Abraham I <kis...@ti.com>
> > Date:   Wed Feb 15 18:48:14 2017 +0530
> >
> > PCI: dwc: all: Split struct pcie_port into host-only and core structures
> 
> I can reproduce the same problem on a custom imx6q board with a PCI bridge 
> chip.
> 
> Other mx6 boards without PCI bridge boot fine.
> 
> I haven't bisected it, but the problem for me does not happen on 4.11.
> It happens only in linux-next.
> 
> The commit you mentioned above is from 4.11 and does not cause the
> problem on my tests.
> 
> Can you double check if you really have issues with 4.11?

Something that ocurred to me is that u-boot is initializing the PCI, and
the PCI networkd cards.  Ideally this should not affect anything, but
can this be related to the issue?

U-Boot 2017.01 (Mar 29 2017 - 13:13:19 +0100)

CPU:   Freescale i.MX6D rev1.5 at 792 MHz
Reset cause: POR
BOARD: General Electric B850v3
I2C:   ready
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
SF: Detected n25q32 with page size 256 Bytes, erase size 4 KiB, total 4 
MiB
PCI:
  00:01.0 - 16c3:abcd - Bridge device
   01:00.0- 10b5:8605 - Bridge device
02:01.0   - 10b5:8605 - Bridge device
 03:00.0  - 8086:1533 - Network controller
02:02.0   - 10b5:8605 - Bridge device
 04:00.0  - 8086:1533 - Network controller
02:03.0   - 10b5:8605 - Bridge device
In:serial
Out:   serial
Err:   serial
Net:   e1000: 00:a0:c9:00:00:00
   e1000: 00:40:97:29:04:44
   e1000#0, e1000#1, FEC [PRIME]


It works fine with v4.10, but I have a similar problem on v4.11
(a351e9b9fc24e982ec2f0e76379a49826036da12), but it is not the same.
Similar as that system freezes on PCI initialization:

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
[0.00] Booting Linux on physical CPU 0x0
[0.00] Linux version 4.11.0-dirty (pe...@lenovo-peter.home) 
(gcc version 6.1.1 20160621 (Red Hat Cross 6.1.1-2) (GCC) ) #1
...
[0.437377] PCI: CLS 0 bytes, default 64
[0.442000] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 
7 counters available
[0.450394] audit: initializing netlink subsys (disabled)
[0.454974] audit: type=2000 audit(0.420:1): state=initialized 
audit_enabled=0 res=1
[0.455546] workingset: timestamp_bits=30 max_order=19 bucket_order=0
[0.474842] bounce: pool size: 64 pages
[0.475825] io scheduler noop registered
[0.479762] io scheduler deadline registered
[0.484151] io scheduler cfq registered (default)
[0.488699] io scheduler mq-deadline registered
[0.494867] OF: PCI: host bridge /soc/pcie@0x0100 ranges:
[0.498969] OF: PCI:   No bus range found for /soc/pcie@0x0100, 
using [bus 00-ff]
[0.506847] OF: PCI:IO 0x01f8..0x01f8 -> 0x
[0.512737] OF: PCI:   MEM 0x0100..0x01ef -> 0x0100

It freezes here...

But is different as this patch makes the the system to boot:

diff --git a/drivers/pci/dwc/pci-imx6.c b/drivers/pci/dwc/pci-imx6.c
index 801e46c..a562c14 100644
--- a/drivers/pci/dwc/pci-imx6.c
+++ b/drivers/pci/dwc/pci-imx6.c
@@ -523,6 +523,7 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
 {
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
+   printk(KERN_ERR "DEBUG: %s\n", __func__);

imx6_pcie_assert_core_reset(imx6_pcie);
imx6_pcie_init_phy(imx6_pcie);

I'm using CONFIG_EARLY_PRINTK (and a few others that are needed on iMX6
in order to enable early_printk), and the patch only makes my system
boot if 'earlycon loglevel=15' is passed to kernel. Here is full output
with v4.11 with the patch applied, and with 'earlycon loglevel=15'
passed to kernel, with the "[0.520080] DEBUG: imx6_pcie_host_init "
message:

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
[0.00] Booting Linux on physical CPU 0x0
[0.00] Linux version 4.11.0-dirty (pe...@lenovo-peter.home) (gcc 
version 6.1.1 20160621 (Red Hat Cross 6.1.1-2) (GCC) ) #137 SMP Tue7
[0.00] CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c5387d
[0.00] CPU: PIPT / VIPT nona

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 10:30:13PM -0300, Fabio Estevam wrote:
> Hi Peter,
> 
> On Mon, May 8, 2017 at 12:02 PM, Peter Senna Tschudin
>  wrote:
> > Hello Kishon,
> >
> > Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
> > linux-next and I could bisect until:
> >
> > commit 442ec4c04d1235f8c664a74004dae54a7a574d18
> > Author: Kishon Vijay Abraham I 
> > Date:   Wed Feb 15 18:48:14 2017 +0530
> >
> > PCI: dwc: all: Split struct pcie_port into host-only and core structures
> 
> I can reproduce the same problem on a custom imx6q board with a PCI bridge 
> chip.
> 
> Other mx6 boards without PCI bridge boot fine.
> 
> I haven't bisected it, but the problem for me does not happen on 4.11.
> It happens only in linux-next.
> 
> The commit you mentioned above is from 4.11 and does not cause the
> problem on my tests.
> 
> Can you double check if you really have issues with 4.11?

Something that ocurred to me is that u-boot is initializing the PCI, and
the PCI networkd cards.  Ideally this should not affect anything, but
can this be related to the issue?

U-Boot 2017.01 (Mar 29 2017 - 13:13:19 +0100)

CPU:   Freescale i.MX6D rev1.5 at 792 MHz
Reset cause: POR
BOARD: General Electric B850v3
I2C:   ready
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
SF: Detected n25q32 with page size 256 Bytes, erase size 4 KiB, total 4 
MiB
PCI:
  00:01.0 - 16c3:abcd - Bridge device
   01:00.0- 10b5:8605 - Bridge device
02:01.0   - 10b5:8605 - Bridge device
 03:00.0  - 8086:1533 - Network controller
02:02.0   - 10b5:8605 - Bridge device
 04:00.0  - 8086:1533 - Network controller
02:03.0   - 10b5:8605 - Bridge device
In:serial
Out:   serial
Err:   serial
Net:   e1000: 00:a0:c9:00:00:00
   e1000: 00:40:97:29:04:44
   e1000#0, e1000#1, FEC [PRIME]


It works fine with v4.10, but I have a similar problem on v4.11
(a351e9b9fc24e982ec2f0e76379a49826036da12), but it is not the same.
Similar as that system freezes on PCI initialization:

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
[0.00] Booting Linux on physical CPU 0x0
[0.00] Linux version 4.11.0-dirty (pe...@lenovo-peter.home) 
(gcc version 6.1.1 20160621 (Red Hat Cross 6.1.1-2) (GCC) ) #1
...
[0.437377] PCI: CLS 0 bytes, default 64
[0.442000] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 
7 counters available
[0.450394] audit: initializing netlink subsys (disabled)
[0.454974] audit: type=2000 audit(0.420:1): state=initialized 
audit_enabled=0 res=1
[0.455546] workingset: timestamp_bits=30 max_order=19 bucket_order=0
[0.474842] bounce: pool size: 64 pages
[0.475825] io scheduler noop registered
[0.479762] io scheduler deadline registered
[0.484151] io scheduler cfq registered (default)
[0.488699] io scheduler mq-deadline registered
[0.494867] OF: PCI: host bridge /soc/pcie@0x0100 ranges:
[0.498969] OF: PCI:   No bus range found for /soc/pcie@0x0100, 
using [bus 00-ff]
[0.506847] OF: PCI:IO 0x01f8..0x01f8 -> 0x
[0.512737] OF: PCI:   MEM 0x0100..0x01ef -> 0x0100

It freezes here...

But is different as this patch makes the the system to boot:

diff --git a/drivers/pci/dwc/pci-imx6.c b/drivers/pci/dwc/pci-imx6.c
index 801e46c..a562c14 100644
--- a/drivers/pci/dwc/pci-imx6.c
+++ b/drivers/pci/dwc/pci-imx6.c
@@ -523,6 +523,7 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
 {
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
+   printk(KERN_ERR "DEBUG: %s\n", __func__);

imx6_pcie_assert_core_reset(imx6_pcie);
imx6_pcie_init_phy(imx6_pcie);

I'm using CONFIG_EARLY_PRINTK (and a few others that are needed on iMX6
in order to enable early_printk), and the patch only makes my system
boot if 'earlycon loglevel=15' is passed to kernel. Here is full output
with v4.11 with the patch applied, and with 'earlycon loglevel=15'
passed to kernel, with the "[0.520080] DEBUG: imx6_pcie_host_init "
message:

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
[0.00] Booting Linux on physical CPU 0x0
[0.00] Linux version 4.11.0-dirty (pe...@lenovo-peter.home) (gcc 
version 6.1.1 20160621 (Red Hat Cross 6.1.1-2) (GCC) ) #137 SMP Tue7
[0.00] CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c5387d
[0.00] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing 
instruction cache
[

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 06:55:36PM +0100, Lorenzo Pieralisi wrote:
> On Mon, May 08, 2017 at 06:34:08PM +0200, Lucas Stach wrote:
> > Am Montag, den 08.05.2017, 17:02 +0200 schrieb Peter Senna Tschudin:
> > > Hello Kishon,
> > > 
> > > Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
> > > linux-next and I could bisect until:
> > > 
> > > commit 442ec4c04d1235f8c664a74004dae54a7a574d18
> > > Author: Kishon Vijay Abraham I <kis...@ti.com>
> > > Date:   Wed Feb 15 18:48:14 2017 +0530
> > > 
> > > PCI: dwc: all: Split struct pcie_port into host-only and core 
> > > structures
> > > 
> > > Which seem to be causing our issues. Our device (imx6q-b850v3.dts) boots
> > > fine with 4.10, and also boots if we disable pcie with:
> > 
> > Are you sure about this bisect? It seems more likely that the secondary
> > bus scanning goes wrong. It seems Lorenzo Pieralisi's cfg space
> > non-posting patches landed in next, so the root cause of this might just
> > be the driver hooking the wrong fault code now.
> > 
> > Async and synchronous aborts are different fault codes on ARM. Can you
> > see of removing the "16 +" in hook_fault_code() in
> > drivers/pci/dwc/pci-imx6.c fixes this issue?
> 
> You can also s/pci_remap_cfgspace/ioremap in pcie-designware-host.c
> to see if my patches are the issue, it is quite a mechanical change.

No change. Exactly same issue, but I noticed that
devm_pci_remap_cfgspace() is called twice for the same device, can this
be a problem?

...
[0.505069] OF: PCI: host bridge /soc/pcie@1ffc000 ranges:
[0.510586] OF: PCI:IO 0x01f8..0x01f8 -> 0x
[0.516474] OF: PCI:   MEM 0x0100..0x01ef -> 0x0100
[0.522420] imx6q-pcie 1ffc000.pcie: devm_pci_remap_cfgspace()
[0.528656] imx6q-pcie 1ffc000.pcie: devm_pci_remap_cfgspace()
...

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 06:55:36PM +0100, Lorenzo Pieralisi wrote:
> On Mon, May 08, 2017 at 06:34:08PM +0200, Lucas Stach wrote:
> > Am Montag, den 08.05.2017, 17:02 +0200 schrieb Peter Senna Tschudin:
> > > Hello Kishon,
> > > 
> > > Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
> > > linux-next and I could bisect until:
> > > 
> > > commit 442ec4c04d1235f8c664a74004dae54a7a574d18
> > > Author: Kishon Vijay Abraham I 
> > > Date:   Wed Feb 15 18:48:14 2017 +0530
> > > 
> > > PCI: dwc: all: Split struct pcie_port into host-only and core 
> > > structures
> > > 
> > > Which seem to be causing our issues. Our device (imx6q-b850v3.dts) boots
> > > fine with 4.10, and also boots if we disable pcie with:
> > 
> > Are you sure about this bisect? It seems more likely that the secondary
> > bus scanning goes wrong. It seems Lorenzo Pieralisi's cfg space
> > non-posting patches landed in next, so the root cause of this might just
> > be the driver hooking the wrong fault code now.
> > 
> > Async and synchronous aborts are different fault codes on ARM. Can you
> > see of removing the "16 +" in hook_fault_code() in
> > drivers/pci/dwc/pci-imx6.c fixes this issue?
> 
> You can also s/pci_remap_cfgspace/ioremap in pcie-designware-host.c
> to see if my patches are the issue, it is quite a mechanical change.

No change. Exactly same issue, but I noticed that
devm_pci_remap_cfgspace() is called twice for the same device, can this
be a problem?

...
[0.505069] OF: PCI: host bridge /soc/pcie@1ffc000 ranges:
[0.510586] OF: PCI:IO 0x01f8..0x01f8 -> 0x
[0.516474] OF: PCI:   MEM 0x0100..0x01ef -> 0x0100
[0.522420] imx6q-pcie 1ffc000.pcie: devm_pci_remap_cfgspace()
[0.528656] imx6q-pcie 1ffc000.pcie: devm_pci_remap_cfgspace()
...

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 09:20:36PM +0530, Kishon Vijay Abraham I wrote:
> Hi,
> 
> On Monday 08 May 2017 09:09 PM, Kishon Vijay Abraham I wrote:
> > Hi,
> > 
> > On Monday 08 May 2017 08:32 PM, Peter Senna Tschudin wrote:
> >> Hello Kishon,
> >>
> >> Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
> >> linux-next and I could bisect until:
> >>
> >> commit 442ec4c04d1235f8c664a74004dae54a7a574d18
> >> Author: Kishon Vijay Abraham I <kis...@ti.com>
> >> Date:   Wed Feb 15 18:48:14 2017 +0530
> >>
> >> PCI: dwc: all: Split struct pcie_port into host-only and core 
> >> structures
> >>
> >> Which seem to be causing our issues. Our device (imx6q-b850v3.dts) boots
> >> fine with 4.10, and also boots if we disable pcie with:
> >>
> >> diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
> >> b/arch/arm/boot/dts/imx6q-b850v3.dts
> >> index 2c1e98e..e655fd7 100644
> >> --- a/arch/arm/boot/dts/imx6q-b850v3.dts
> >> +++ b/arch/arm/boot/dts/imx6q-b850v3.dts
> >> @@ -212,3 +212,8 @@
> >> };
> >> };
> >>  };
> >> +
> >> + {
> >> +status = "disabled";
> >> +};
> >>
> >> But otherwise our system freezes while initializing PCI, see dmesg with
> >> some more information. Is this something specific of our system/dt or
> >> can this be a bug that is affecting others as well?
> > 
> > Haven't seen this in dra7xx. I've tried with few ethernet PCIe cards and 
> > also a
> > PCIe-to-PCI bridge.
> 
> Can you enable PCI_DEBUG and share the logs?

Enabling CONFIG_PCI_DEBUG did not change anything on the output on the
scenario that does not work, suggestions? And unfortuantely the
parameter pci=earlydump seems to be x86 only...

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 09:20:36PM +0530, Kishon Vijay Abraham I wrote:
> Hi,
> 
> On Monday 08 May 2017 09:09 PM, Kishon Vijay Abraham I wrote:
> > Hi,
> > 
> > On Monday 08 May 2017 08:32 PM, Peter Senna Tschudin wrote:
> >> Hello Kishon,
> >>
> >> Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
> >> linux-next and I could bisect until:
> >>
> >> commit 442ec4c04d1235f8c664a74004dae54a7a574d18
> >> Author: Kishon Vijay Abraham I 
> >> Date:   Wed Feb 15 18:48:14 2017 +0530
> >>
> >> PCI: dwc: all: Split struct pcie_port into host-only and core 
> >> structures
> >>
> >> Which seem to be causing our issues. Our device (imx6q-b850v3.dts) boots
> >> fine with 4.10, and also boots if we disable pcie with:
> >>
> >> diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
> >> b/arch/arm/boot/dts/imx6q-b850v3.dts
> >> index 2c1e98e..e655fd7 100644
> >> --- a/arch/arm/boot/dts/imx6q-b850v3.dts
> >> +++ b/arch/arm/boot/dts/imx6q-b850v3.dts
> >> @@ -212,3 +212,8 @@
> >> };
> >> };
> >>  };
> >> +
> >> + {
> >> +status = "disabled";
> >> +};
> >>
> >> But otherwise our system freezes while initializing PCI, see dmesg with
> >> some more information. Is this something specific of our system/dt or
> >> can this be a bug that is affecting others as well?
> > 
> > Haven't seen this in dra7xx. I've tried with few ethernet PCIe cards and 
> > also a
> > PCIe-to-PCI bridge.
> 
> Can you enable PCI_DEBUG and share the logs?

Enabling CONFIG_PCI_DEBUG did not change anything on the output on the
scenario that does not work, suggestions? And unfortuantely the
parameter pci=earlydump seems to be x86 only...

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 06:48:48PM +0200, Lucas Stach wrote:
> Am Montag, den 08.05.2017, 18:44 +0200 schrieb Peter Senna Tschudin:
> > On Mon, May 08, 2017 at 06:34:08PM +0200, Lucas Stach wrote:
> > > Am Montag, den 08.05.2017, 17:02 +0200 schrieb Peter Senna Tschudin:
> > > > Hello Kishon,
> > > > 
> > > > Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
> > > > linux-next and I could bisect until:
> > > > 
> > > > commit 442ec4c04d1235f8c664a74004dae54a7a574d18
> > > > Author: Kishon Vijay Abraham I <kis...@ti.com>
> > > > Date:   Wed Feb 15 18:48:14 2017 +0530
> > > > 
> > > > PCI: dwc: all: Split struct pcie_port into host-only and core 
> > > > structures
> > > > 
> > > > Which seem to be causing our issues. Our device (imx6q-b850v3.dts) boots
> > > > fine with 4.10, and also boots if we disable pcie with:
> > > 
> > > Are you sure about this bisect? It seems more likely that the secondary
> > > bus scanning goes wrong. It seems Lorenzo Pieralisi's cfg space
> > > non-posting patches landed in next, so the root cause of this might just
> > > be the driver hooking the wrong fault code now.
> > > 
> > > Async and synchronous aborts are different fault codes on ARM. Can you
> > > see of removing the "16 +" in hook_fault_code() in
> > > drivers/pci/dwc/pci-imx6.c fixes this issue?
> > 
> > changing it to:
> > 
> > hook_fault_code(6, imx6q_pcie_abort_handler, SIGBUS, 0,
> > "imprecise external abort");
> > 
> > made no difference, problem persists...
> 
> Can you test if 8 or 10 works?

Also fails with 8 and with 10...
> 
> Regards,
> Lucas
> 
> 

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 06:48:48PM +0200, Lucas Stach wrote:
> Am Montag, den 08.05.2017, 18:44 +0200 schrieb Peter Senna Tschudin:
> > On Mon, May 08, 2017 at 06:34:08PM +0200, Lucas Stach wrote:
> > > Am Montag, den 08.05.2017, 17:02 +0200 schrieb Peter Senna Tschudin:
> > > > Hello Kishon,
> > > > 
> > > > Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
> > > > linux-next and I could bisect until:
> > > > 
> > > > commit 442ec4c04d1235f8c664a74004dae54a7a574d18
> > > > Author: Kishon Vijay Abraham I 
> > > > Date:   Wed Feb 15 18:48:14 2017 +0530
> > > > 
> > > > PCI: dwc: all: Split struct pcie_port into host-only and core 
> > > > structures
> > > > 
> > > > Which seem to be causing our issues. Our device (imx6q-b850v3.dts) boots
> > > > fine with 4.10, and also boots if we disable pcie with:
> > > 
> > > Are you sure about this bisect? It seems more likely that the secondary
> > > bus scanning goes wrong. It seems Lorenzo Pieralisi's cfg space
> > > non-posting patches landed in next, so the root cause of this might just
> > > be the driver hooking the wrong fault code now.
> > > 
> > > Async and synchronous aborts are different fault codes on ARM. Can you
> > > see of removing the "16 +" in hook_fault_code() in
> > > drivers/pci/dwc/pci-imx6.c fixes this issue?
> > 
> > changing it to:
> > 
> > hook_fault_code(6, imx6q_pcie_abort_handler, SIGBUS, 0,
> > "imprecise external abort");
> > 
> > made no difference, problem persists...
> 
> Can you test if 8 or 10 works?

Also fails with 8 and with 10...
> 
> Regards,
> Lucas
> 
> 

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 06:34:08PM +0200, Lucas Stach wrote:
> Am Montag, den 08.05.2017, 17:02 +0200 schrieb Peter Senna Tschudin:
> > Hello Kishon,
> > 
> > Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
> > linux-next and I could bisect until:
> > 
> > commit 442ec4c04d1235f8c664a74004dae54a7a574d18
> > Author: Kishon Vijay Abraham I <kis...@ti.com>
> > Date:   Wed Feb 15 18:48:14 2017 +0530
> > 
> > PCI: dwc: all: Split struct pcie_port into host-only and core structures
> > 
> > Which seem to be causing our issues. Our device (imx6q-b850v3.dts) boots
> > fine with 4.10, and also boots if we disable pcie with:
> 
> Are you sure about this bisect? It seems more likely that the secondary
> bus scanning goes wrong. It seems Lorenzo Pieralisi's cfg space
> non-posting patches landed in next, so the root cause of this might just
> be the driver hooking the wrong fault code now.
> 
> Async and synchronous aborts are different fault codes on ARM. Can you
> see of removing the "16 +" in hook_fault_code() in
> drivers/pci/dwc/pci-imx6.c fixes this issue?

changing it to:

hook_fault_code(6, imx6q_pcie_abort_handler, SIGBUS, 0,
"imprecise external abort");

made no difference, problem persists...

> 
> Regards,
> Lucas
> 

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 06:34:08PM +0200, Lucas Stach wrote:
> Am Montag, den 08.05.2017, 17:02 +0200 schrieb Peter Senna Tschudin:
> > Hello Kishon,
> > 
> > Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
> > linux-next and I could bisect until:
> > 
> > commit 442ec4c04d1235f8c664a74004dae54a7a574d18
> > Author: Kishon Vijay Abraham I 
> > Date:   Wed Feb 15 18:48:14 2017 +0530
> > 
> > PCI: dwc: all: Split struct pcie_port into host-only and core structures
> > 
> > Which seem to be causing our issues. Our device (imx6q-b850v3.dts) boots
> > fine with 4.10, and also boots if we disable pcie with:
> 
> Are you sure about this bisect? It seems more likely that the secondary
> bus scanning goes wrong. It seems Lorenzo Pieralisi's cfg space
> non-posting patches landed in next, so the root cause of this might just
> be the driver hooking the wrong fault code now.
> 
> Async and synchronous aborts are different fault codes on ARM. Can you
> see of removing the "16 +" in hook_fault_code() in
> drivers/pci/dwc/pci-imx6.c fixes this issue?

changing it to:

hook_fault_code(6, imx6q_pcie_abort_handler, SIGBUS, 0,
"imprecise external abort");

made no difference, problem persists...

> 
> Regards,
> Lucas
> 

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 09:09:32PM +0530, Kishon Vijay Abraham I wrote:
.
.

.
.
> > [0.501998] OF: PCI: host bridge /soc/pcie@1ffc000 ranges:
> > [0.507275] OF: PCI:IO 0x01f8..0x01f8 -> 0x
> > [0.513202] OF: PCI:   MEM 0x0100..0x01ef -> 0x0100
> > [0.739697] imx6q-pcie 1ffc000.pcie: link up
> > [0.741115] imx6q-pcie 1ffc000.pcie: Link: Gen2 disabled
> > [0.746421] imx6q-pcie 1ffc000.pcie: Link up, Gen1
> > [0.751343] imx6q-pcie 1ffc000.pcie: PCI host bridge to bus :00
> > [0.757475] pci_bus :00: root bus resource [bus 00-ff]
> > [0.762974] pci_bus :00: root bus resource [io  0x-0x]
> > [0.769128] pci_bus :00: root bus resource [mem 
> > 0x0100-0x01ef]
> > [0.776052] pci :00:00.0: [16c3:abcd] type 01 class 0x060400
> > [0.782044] pci :00:00.0: reg 0x10: [mem 0x-0x000f]
> > [0.788279] pci :00:00.0: reg 0x38: [mem 0x-0x pref]
> > [0.795041] pci :00:00.0: supports D1
> > [0.798971] pci :00:00.0: PME# supported from D0 D1 D3hot D3cold
> > [0.805503] PCI: bus0: Fast back to back transfers disabled
> > [0.811079] pci :01:00.0: [10b5:8605] type 01 class 0x060400
> 
> I could see a couple of device detected [16c3:abcd and [10b5:8605]. What other
> devices are connected?

$ lspci -v

00:00.0 PCI bridge: Synopsys, Inc. Device abcd (rev 01) (prog-if 00 [Normal 
decode])
Flags: bus master, fast devsel, latency 0, IRQ 301
Memory at 0100 (32-bit, non-prefetchable) [size=1M]
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 1000-2fff
Memory behind bridge: 0110-014f
Prefetchable memory behind bridge: 0150-016f
[virtual] Expansion ROM at 0170 [disabled] [size=64K]
Capabilities: [40] Power Management version 3
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable+ 64bit+
Capabilities: [70] Express Root Port (Slot-), MSI 00
Capabilities: [100] Advanced Error Reporting
Capabilities: [140] Virtual Channel
Kernel driver in use: pcieport

01:00.0 PCI bridge: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 
Switch (rev ab) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 302
Memory at 0140 (32-bit, non-prefetchable) [size=16K]
Bus: primary=01, secondary=02, subordinate=05, sec-latency=0
I/O behind bridge: 1000-2fff
Memory behind bridge: 0110-013f
Prefetchable memory behind bridge: 0150-016f
Capabilities: [40] Power Management version 3
Capabilities: [48] MSI: Enable+ Count=1/4 Maskable+ 64bit+
Capabilities: [68] Express Upstream Port, MSI 00
Capabilities: [a4] Subsystem: PLX Technology, Inc. PEX 8605 PCI Express 
4-port Gen2 Switch
Capabilities: [100] Device Serial Number ab-86-02-10-b5-df-0e-00
Capabilities: [fb4] Advanced Error Reporting
Capabilities: [138] Power Budgeting 
Capabilities: [148] Virtual Channel
Capabilities: [950] Vendor Specific Information: ID=0001 Rev=0 Len=028 

Kernel driver in use: pcieport

02:01.0 PCI bridge: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 
Switch (rev ab) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 303
Bus: primary=02, secondary=03, subordinate=03, sec-latency=0
I/O behind bridge: 1000-1fff
Memory behind bridge: 0110-012f
Prefetchable memory behind bridge: 0150-016f
Capabilities: [40] Power Management version 3
Capabilities: [48] MSI: Enable+ Count=1/4 Maskable+ 64bit+
Capabilities: [68] Express Downstream Port (Slot+), MSI 00
Capabilities: [a4] Subsystem: PLX Technology, Inc. PEX 8605 PCI Express 
4-port Gen2 Switch
Capabilities: [100] Device Serial Number ab-86-02-10-b5-df-0e-00
Capabilities: [fb4] Advanced Error Reporting
Capabilities: [148] Virtual Channel
Capabilities: [520] Access Control Services
Capabilities: [950] Vendor Specific Information: ID=0001 Rev=0 Len=028 

Kernel driver in use: pcieport

02:02.0 PCI bridge: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 
Switch (rev ab) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 304
Bus: primary=02, secondary=04, subordinate=04, sec-latency=0
I/O behind bridge: 2000-2fff
Memory behind bridge: 0130-013f
Capabilities: [40] Power Management version 3
Capabilities: [48] MSI: Enable+ Count=1/4 Maskable+ 64bit+
Capabilities: [68] Express Downstream Port (Slot+), MSI 00
Capabilities: [a4] Subsystem: PLX Technology, Inc. PEX 8605 PCI Express 
4-port Gen2 Switch
Capabilities: [100] 

Re: Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

On Mon, May 08, 2017 at 09:09:32PM +0530, Kishon Vijay Abraham I wrote:
.
.

.
.
> > [0.501998] OF: PCI: host bridge /soc/pcie@1ffc000 ranges:
> > [0.507275] OF: PCI:IO 0x01f8..0x01f8 -> 0x
> > [0.513202] OF: PCI:   MEM 0x0100..0x01ef -> 0x0100
> > [0.739697] imx6q-pcie 1ffc000.pcie: link up
> > [0.741115] imx6q-pcie 1ffc000.pcie: Link: Gen2 disabled
> > [0.746421] imx6q-pcie 1ffc000.pcie: Link up, Gen1
> > [0.751343] imx6q-pcie 1ffc000.pcie: PCI host bridge to bus :00
> > [0.757475] pci_bus :00: root bus resource [bus 00-ff]
> > [0.762974] pci_bus :00: root bus resource [io  0x-0x]
> > [0.769128] pci_bus :00: root bus resource [mem 
> > 0x0100-0x01ef]
> > [0.776052] pci :00:00.0: [16c3:abcd] type 01 class 0x060400
> > [0.782044] pci :00:00.0: reg 0x10: [mem 0x-0x000f]
> > [0.788279] pci :00:00.0: reg 0x38: [mem 0x-0x pref]
> > [0.795041] pci :00:00.0: supports D1
> > [0.798971] pci :00:00.0: PME# supported from D0 D1 D3hot D3cold
> > [0.805503] PCI: bus0: Fast back to back transfers disabled
> > [0.811079] pci :01:00.0: [10b5:8605] type 01 class 0x060400
> 
> I could see a couple of device detected [16c3:abcd and [10b5:8605]. What other
> devices are connected?

$ lspci -v

00:00.0 PCI bridge: Synopsys, Inc. Device abcd (rev 01) (prog-if 00 [Normal 
decode])
Flags: bus master, fast devsel, latency 0, IRQ 301
Memory at 0100 (32-bit, non-prefetchable) [size=1M]
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 1000-2fff
Memory behind bridge: 0110-014f
Prefetchable memory behind bridge: 0150-016f
[virtual] Expansion ROM at 0170 [disabled] [size=64K]
Capabilities: [40] Power Management version 3
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable+ 64bit+
Capabilities: [70] Express Root Port (Slot-), MSI 00
Capabilities: [100] Advanced Error Reporting
Capabilities: [140] Virtual Channel
Kernel driver in use: pcieport

01:00.0 PCI bridge: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 
Switch (rev ab) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 302
Memory at 0140 (32-bit, non-prefetchable) [size=16K]
Bus: primary=01, secondary=02, subordinate=05, sec-latency=0
I/O behind bridge: 1000-2fff
Memory behind bridge: 0110-013f
Prefetchable memory behind bridge: 0150-016f
Capabilities: [40] Power Management version 3
Capabilities: [48] MSI: Enable+ Count=1/4 Maskable+ 64bit+
Capabilities: [68] Express Upstream Port, MSI 00
Capabilities: [a4] Subsystem: PLX Technology, Inc. PEX 8605 PCI Express 
4-port Gen2 Switch
Capabilities: [100] Device Serial Number ab-86-02-10-b5-df-0e-00
Capabilities: [fb4] Advanced Error Reporting
Capabilities: [138] Power Budgeting 
Capabilities: [148] Virtual Channel
Capabilities: [950] Vendor Specific Information: ID=0001 Rev=0 Len=028 

Kernel driver in use: pcieport

02:01.0 PCI bridge: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 
Switch (rev ab) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 303
Bus: primary=02, secondary=03, subordinate=03, sec-latency=0
I/O behind bridge: 1000-1fff
Memory behind bridge: 0110-012f
Prefetchable memory behind bridge: 0150-016f
Capabilities: [40] Power Management version 3
Capabilities: [48] MSI: Enable+ Count=1/4 Maskable+ 64bit+
Capabilities: [68] Express Downstream Port (Slot+), MSI 00
Capabilities: [a4] Subsystem: PLX Technology, Inc. PEX 8605 PCI Express 
4-port Gen2 Switch
Capabilities: [100] Device Serial Number ab-86-02-10-b5-df-0e-00
Capabilities: [fb4] Advanced Error Reporting
Capabilities: [148] Virtual Channel
Capabilities: [520] Access Control Services
Capabilities: [950] Vendor Specific Information: ID=0001 Rev=0 Len=028 

Kernel driver in use: pcieport

02:02.0 PCI bridge: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 
Switch (rev ab) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 304
Bus: primary=02, secondary=04, subordinate=04, sec-latency=0
I/O behind bridge: 2000-2fff
Memory behind bridge: 0130-013f
Capabilities: [40] Power Management version 3
Capabilities: [48] MSI: Enable+ Count=1/4 Maskable+ 64bit+
Capabilities: [68] Express Downstream Port (Slot+), MSI 00
Capabilities: [a4] Subsystem: PLX Technology, Inc. PEX 8605 PCI Express 
4-port Gen2 Switch
Capabilities: [100] 

Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

Hello Kishon,

Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
linux-next and I could bisect until:

commit 442ec4c04d1235f8c664a74004dae54a7a574d18
Author: Kishon Vijay Abraham I 
Date:   Wed Feb 15 18:48:14 2017 +0530

PCI: dwc: all: Split struct pcie_port into host-only and core structures

Which seem to be causing our issues. Our device (imx6q-b850v3.dts) boots
fine with 4.10, and also boots if we disable pcie with:

diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
b/arch/arm/boot/dts/imx6q-b850v3.dts
index 2c1e98e..e655fd7 100644
--- a/arch/arm/boot/dts/imx6q-b850v3.dts
+++ b/arch/arm/boot/dts/imx6q-b850v3.dts
@@ -212,3 +212,8 @@
};
};
 };
+
+ {
+status = "disabled";
+};

But otherwise our system freezes while initializing PCI, see dmesg with
some more information. Is this something specific of our system/dt or
can this be a bug that is affecting others as well?

Kind Regards,

Peter

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
[0.00] Booting Linux on physical CPU 0x0
[0.00] Linux version 4.11.0-next-20170508-dirty 
(pe...@lenovo-peter.home) (gcc version 6.1.1 20160621 (Red Hat Cross 6.1.1-2) 
(GCC) 7
[0.00] CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c5387d
[0.00] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing 
instruction cache
[0.00] OF: fdt: Machine model: General Electric B850v3
[0.00] earlycon: ec_imx21 at MMIO 0x021ec000 (options '')
[0.00] bootconsole [ec_imx21] enabled
[0.00] Memory policy: Data cache writealloc
[0.00] cma: Reserved 128 MiB at 0x8800
[0.00] On node 0 totalpages: 524288
[0.00] free_area_init_node: node 0, pgdat 80d74fc0, node_mem_map 
eeff7000
[0.00]   Normal zone: 3584 pages used for memmap
[0.00]   Normal zone: 0 pages reserved
[0.00]   Normal zone: 458752 pages, LIFO batch:31
[0.00]   HighMem zone: 65536 pages, LIFO batch:15
[0.00] percpu: Embedded 17 pages/cpu @eefb3000 s37900 r8192 d23540 
u69632
[0.00] pcpu-alloc: s37900 r8192 d23540 u69632 alloc=17*4096
[0.00] pcpu-alloc: [0] 0 [0] 1
[0.00] Built 1 zonelists in Zone order, mobility grouping on.  Total 
pages: 520704
[0.00] Kernel command line: root=/dev/mmcblk0p2 ro rootwait cma=128M 
video=DP-1:1024x768@60 video=HDMI-A-1:1024x768@60 earlycon logl0
[0.00] PID hash table entries: 4096 (order: 2, 16384 bytes)
[0.00] Dentry cache hash table entries: 262144 (order: 8, 1048576 bytes)
[0.00] Inode-cache hash table entries: 131072 (order: 7, 524288 bytes)
[0.00] Memory: 1934676K/2097152K available (8192K kernel code, 502K 
rwdata, 2220K rodata, 1024K init, 309K bss, 31404K reserved, 131)
[0.00] Virtual kernel memory layout:
[0.00] vector  : 0x - 0x1000   (   4 kB)
[0.00] fixmap  : 0xffc0 - 0xfff0   (3072 kB)
[0.00] vmalloc : 0xf080 - 0xff80   ( 240 MB)
[0.00] lowmem  : 0x8000 - 0xf000   (1792 MB)
[0.00] pkmap   : 0x7fe0 - 0x8000   (   2 MB)
[0.00] modules : 0x7f00 - 0x7fe0   (  14 MB)
[0.00]   .text : 0x80008000 - 0x8090   (9184 kB)
[0.00]   .init : 0x80c0 - 0x80d0   (1024 kB)
[0.00]   .data : 0x80d0 - 0x80d7d874   ( 503 kB)
[0.00].bss : 0x80d7f000 - 0x80dcc6c0   ( 310 kB)
[0.00] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[0.00] ftrace: allocating 28081 entries in 83 pages
[0.00] Hierarchical RCU implementation.
[0.00]  RCU debugfs-based tracing is enabled.
[0.00]  RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
[0.00] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[0.00] NR_IRQS:16 nr_irqs:16 16
[0.00] L2C-310 errata 752271 769419 enabled
[0.00] L2C-310 enabling early BRESP for Cortex-A9
[0.00] L2C-310 full line of zeros enabled for Cortex-A9
[0.00] L2C-310 ID prefetch enabled, offset 16 lines
[0.00] L2C-310 dynamic clock gating enabled, standby mode enabled
[0.00] L2C-310 cache controller enabled, 16 ways, 1024 kB
[0.00] L2C-310: CACHE_ID 0x41c7, AUX_CTRL 0x76470001
[0.00] Switching to timer-based delay loop, resolution 333ns
[0.07] sched_clock: 32 bits at 3000kHz, resolution 333ns, wraps every 
715827882841ns
[0.008183] clocksource: mxc_timer1: mask: 0x max_cycles: 
0x, max_idle_ns: 637086815595 ns
[0.019149] Console: colour dummy device 80x30
[0.022277] Calibrating delay loop (skipped), value calculated using timer 
frequency.. 6.00 BogoMIPS (lpj=3)
[0.032459] pid_max: default: 32768 minimum: 301
[0.037145] Mount-cache hash table entries: 4096 (order: 2, 16384 bytes)
[0.043765] Mountpoint-cache hash table entries: 

Regression: 442ec4c04d1: PCI: dwc: all: Split struct pcie_port into host-only and core structures

[Peter Senna Tschudin]

Hello Kishon,

Our iMX6 hardware (imx6q-b850v3.dts) is not booting with latest
linux-next and I could bisect until:

commit 442ec4c04d1235f8c664a74004dae54a7a574d18
Author: Kishon Vijay Abraham I 
Date:   Wed Feb 15 18:48:14 2017 +0530

PCI: dwc: all: Split struct pcie_port into host-only and core structures

Which seem to be causing our issues. Our device (imx6q-b850v3.dts) boots
fine with 4.10, and also boots if we disable pcie with:

diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
b/arch/arm/boot/dts/imx6q-b850v3.dts
index 2c1e98e..e655fd7 100644
--- a/arch/arm/boot/dts/imx6q-b850v3.dts
+++ b/arch/arm/boot/dts/imx6q-b850v3.dts
@@ -212,3 +212,8 @@
};
};
 };
+
+ {
+status = "disabled";
+};

But otherwise our system freezes while initializing PCI, see dmesg with
some more information. Is this something specific of our system/dt or
can this be a bug that is affecting others as well?

Kind Regards,

Peter

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
[0.00] Booting Linux on physical CPU 0x0
[0.00] Linux version 4.11.0-next-20170508-dirty 
(pe...@lenovo-peter.home) (gcc version 6.1.1 20160621 (Red Hat Cross 6.1.1-2) 
(GCC) 7
[0.00] CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c5387d
[0.00] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing 
instruction cache
[0.00] OF: fdt: Machine model: General Electric B850v3
[0.00] earlycon: ec_imx21 at MMIO 0x021ec000 (options '')
[0.00] bootconsole [ec_imx21] enabled
[0.00] Memory policy: Data cache writealloc
[0.00] cma: Reserved 128 MiB at 0x8800
[0.00] On node 0 totalpages: 524288
[0.00] free_area_init_node: node 0, pgdat 80d74fc0, node_mem_map 
eeff7000
[0.00]   Normal zone: 3584 pages used for memmap
[0.00]   Normal zone: 0 pages reserved
[0.00]   Normal zone: 458752 pages, LIFO batch:31
[0.00]   HighMem zone: 65536 pages, LIFO batch:15
[0.00] percpu: Embedded 17 pages/cpu @eefb3000 s37900 r8192 d23540 
u69632
[0.00] pcpu-alloc: s37900 r8192 d23540 u69632 alloc=17*4096
[0.00] pcpu-alloc: [0] 0 [0] 1
[0.00] Built 1 zonelists in Zone order, mobility grouping on.  Total 
pages: 520704
[0.00] Kernel command line: root=/dev/mmcblk0p2 ro rootwait cma=128M 
video=DP-1:1024x768@60 video=HDMI-A-1:1024x768@60 earlycon logl0
[0.00] PID hash table entries: 4096 (order: 2, 16384 bytes)
[0.00] Dentry cache hash table entries: 262144 (order: 8, 1048576 bytes)
[0.00] Inode-cache hash table entries: 131072 (order: 7, 524288 bytes)
[0.00] Memory: 1934676K/2097152K available (8192K kernel code, 502K 
rwdata, 2220K rodata, 1024K init, 309K bss, 31404K reserved, 131)
[0.00] Virtual kernel memory layout:
[0.00] vector  : 0x - 0x1000   (   4 kB)
[0.00] fixmap  : 0xffc0 - 0xfff0   (3072 kB)
[0.00] vmalloc : 0xf080 - 0xff80   ( 240 MB)
[0.00] lowmem  : 0x8000 - 0xf000   (1792 MB)
[0.00] pkmap   : 0x7fe0 - 0x8000   (   2 MB)
[0.00] modules : 0x7f00 - 0x7fe0   (  14 MB)
[0.00]   .text : 0x80008000 - 0x8090   (9184 kB)
[0.00]   .init : 0x80c0 - 0x80d0   (1024 kB)
[0.00]   .data : 0x80d0 - 0x80d7d874   ( 503 kB)
[0.00].bss : 0x80d7f000 - 0x80dcc6c0   ( 310 kB)
[0.00] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[0.00] ftrace: allocating 28081 entries in 83 pages
[0.00] Hierarchical RCU implementation.
[0.00]  RCU debugfs-based tracing is enabled.
[0.00]  RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
[0.00] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[0.00] NR_IRQS:16 nr_irqs:16 16
[0.00] L2C-310 errata 752271 769419 enabled
[0.00] L2C-310 enabling early BRESP for Cortex-A9
[0.00] L2C-310 full line of zeros enabled for Cortex-A9
[0.00] L2C-310 ID prefetch enabled, offset 16 lines
[0.00] L2C-310 dynamic clock gating enabled, standby mode enabled
[0.00] L2C-310 cache controller enabled, 16 ways, 1024 kB
[0.00] L2C-310: CACHE_ID 0x41c7, AUX_CTRL 0x76470001
[0.00] Switching to timer-based delay loop, resolution 333ns
[0.07] sched_clock: 32 bits at 3000kHz, resolution 333ns, wraps every 
715827882841ns
[0.008183] clocksource: mxc_timer1: mask: 0x max_cycles: 
0x, max_idle_ns: 637086815595 ns
[0.019149] Console: colour dummy device 80x30
[0.022277] Calibrating delay loop (skipped), value calculated using timer 
frequency.. 6.00 BogoMIPS (lpj=3)
[0.032459] pid_max: default: 32768 minimum: 301
[0.037145] Mount-cache hash table entries: 4096 (order: 2, 16384 bytes)
[0.043765] Mountpoint-cache hash table entries: 4096 (order: 

Re: [RFC] usb-phy-generic: Add support to SMSC USB3315

[Peter Senna Tschudin]

On Wed, Apr 19, 2017 at 01:03:23PM +0300, Sergei Shtylyov wrote:
> Hello!
> 
> On 4/19/2017 9:14 AM, Peter Senna Tschudin wrote:
> 
> > We need the SMSC USB3315 clock and regulator to always be initialized.
> > We also need the PHY driver to take the PHY out of reset. This patch
> > extends the existing USB generic nop phy driver to include a new
> > initialization path.
> > 
> > A new compatible string "smsc,usb3315" is used to decide which
> > initialization path to use.
> > 
> > CC: Peter Chen <peter.c...@nxp.com>
> > CC: Stephen Boyd <sb...@codeaurora.org>
> > CC: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
> > Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
> > ---
> > 
> > This is a follow-up of previous discussion:
> >   https://www.spinics.net/lists/linux-usb/msg146680.html
> > 
> >  drivers/usb/phy/phy-generic.c | 33 +
> >  drivers/usb/phy/phy-generic.h |  1 +
> >  2 files changed, 30 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/usb/phy/phy-generic.c b/drivers/usb/phy/phy-generic.c
> > index 89d6e7a..6ea9ce4 100644
> > --- a/drivers/usb/phy/phy-generic.c
> > +++ b/drivers/usb/phy/phy-generic.c
> [...]
> > @@ -216,18 +221,29 @@ static int nop_set_host(struct usb_otg *otg, struct 
> > usb_bus *host)
> > otg->host = host;
> > return 0;
> >  }
> 
>Need empty line here.
> 
> > +int smsc_usb3315_init(struct usb_phy_generic *nop)
> > +{
> > +   /*
> > +* If the gpio for controlling reset state is not available, try again
> > +* later
> > +*/
> > +   if(!nop->gpiod_reset)
> 
>You hadn't run the patch thru scripts/checkpatch.pl before posting --
> need space between *if* and (.
> 
> [...]
> > @@ -304,6 +320,12 @@ int usb_phy_gen_create_phy(struct device *dev, struct 
> > usb_phy_generic *nop,
> > nop->phy.otg->set_host  = nop_set_host;
> > nop->phy.otg->set_peripheral= nop_set_peripheral;
> > 
> > +   if(node && of_device_is_compatible(node, "smsc,usb3315")) {
> 
>Same here.
> 
> [...]
> 
> MBR, Sergei

Thank you for the review Sergei! Should I send V2 of this RFC fixing
these issues or wait for comments on the validity of this approach?


> 

Re: [RFC] usb-phy-generic: Add support to SMSC USB3315

[Peter Senna Tschudin]

On Wed, Apr 19, 2017 at 01:03:23PM +0300, Sergei Shtylyov wrote:
> Hello!
> 
> On 4/19/2017 9:14 AM, Peter Senna Tschudin wrote:
> 
> > We need the SMSC USB3315 clock and regulator to always be initialized.
> > We also need the PHY driver to take the PHY out of reset. This patch
> > extends the existing USB generic nop phy driver to include a new
> > initialization path.
> > 
> > A new compatible string "smsc,usb3315" is used to decide which
> > initialization path to use.
> > 
> > CC: Peter Chen 
> > CC: Stephen Boyd 
> > CC: Fabien Lahoudere 
> > Signed-off-by: Peter Senna Tschudin 
> > ---
> > 
> > This is a follow-up of previous discussion:
> >   https://www.spinics.net/lists/linux-usb/msg146680.html
> > 
> >  drivers/usb/phy/phy-generic.c | 33 +
> >  drivers/usb/phy/phy-generic.h |  1 +
> >  2 files changed, 30 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/usb/phy/phy-generic.c b/drivers/usb/phy/phy-generic.c
> > index 89d6e7a..6ea9ce4 100644
> > --- a/drivers/usb/phy/phy-generic.c
> > +++ b/drivers/usb/phy/phy-generic.c
> [...]
> > @@ -216,18 +221,29 @@ static int nop_set_host(struct usb_otg *otg, struct 
> > usb_bus *host)
> > otg->host = host;
> > return 0;
> >  }
> 
>Need empty line here.
> 
> > +int smsc_usb3315_init(struct usb_phy_generic *nop)
> > +{
> > +   /*
> > +* If the gpio for controlling reset state is not available, try again
> > +* later
> > +*/
> > +   if(!nop->gpiod_reset)
> 
>You hadn't run the patch thru scripts/checkpatch.pl before posting --
> need space between *if* and (.
> 
> [...]
> > @@ -304,6 +320,12 @@ int usb_phy_gen_create_phy(struct device *dev, struct 
> > usb_phy_generic *nop,
> > nop->phy.otg->set_host  = nop_set_host;
> > nop->phy.otg->set_peripheral= nop_set_peripheral;
> > 
> > +   if(node && of_device_is_compatible(node, "smsc,usb3315")) {
> 
>Same here.
> 
> [...]
> 
> MBR, Sergei

Thank you for the review Sergei! Should I send V2 of this RFC fixing
these issues or wait for comments on the validity of this approach?


> 

[RFC] usb-phy-generic: Add support to SMSC USB3315

[Peter Senna Tschudin]

We need the SMSC USB3315 clock and regulator to always be initialized.
We also need the PHY driver to take the PHY out of reset. This patch
extends the existing USB generic nop phy driver to include a new
initialization path.

A new compatible string "smsc,usb3315" is used to decide which
initialization path to use.

CC: Peter Chen <peter.c...@nxp.com>
CC: Stephen Boyd <sb...@codeaurora.org>
CC: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---

This is a follow-up of previous discussion:
  https://www.spinics.net/lists/linux-usb/msg146680.html

 drivers/usb/phy/phy-generic.c | 33 +
 drivers/usb/phy/phy-generic.h |  1 +
 2 files changed, 30 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/phy/phy-generic.c b/drivers/usb/phy/phy-generic.c
index 89d6e7a..6ea9ce4 100644
--- a/drivers/usb/phy/phy-generic.c
+++ b/drivers/usb/phy/phy-generic.c
@@ -151,6 +151,9 @@ int usb_gen_phy_init(struct usb_phy *phy)
struct usb_phy_generic *nop = dev_get_drvdata(phy->dev);
int ret;
 
+   if (nop->init_done)
+   return 0;
+
if (!IS_ERR(nop->vcc)) {
if (regulator_enable(nop->vcc))
dev_err(phy->dev, "Failed to enable power\n");
@@ -164,6 +167,8 @@ int usb_gen_phy_init(struct usb_phy *phy)
 
nop_reset(nop);
 
+   nop->init_done = true;
+
return 0;
 }
 EXPORT_SYMBOL_GPL(usb_gen_phy_init);
@@ -216,18 +221,29 @@ static int nop_set_host(struct usb_otg *otg, struct 
usb_bus *host)
otg->host = host;
return 0;
 }
+int smsc_usb3315_init(struct usb_phy_generic *nop)
+{
+   /*
+* If the gpio for controlling reset state is not available, try again
+* later
+*/
+   if(!nop->gpiod_reset)
+   return -EPROBE_DEFER;
+
+   return usb_gen_phy_init(>phy);
+}
 
 int usb_phy_gen_create_phy(struct device *dev, struct usb_phy_generic *nop,
struct usb_phy_generic_platform_data *pdata)
 {
+   struct device_node *node = NULL;
enum usb_phy_type type = USB_PHY_TYPE_USB2;
int err = 0;
-
u32 clk_rate = 0;
bool needs_vcc = false;
 
if (dev->of_node) {
-   struct device_node *node = dev->of_node;
+   node = dev->of_node;
 
if (of_property_read_u32(node, "clock-frequency", _rate))
clk_rate = 0;
@@ -304,6 +320,12 @@ int usb_phy_gen_create_phy(struct device *dev, struct 
usb_phy_generic *nop,
nop->phy.otg->set_host  = nop_set_host;
nop->phy.otg->set_peripheral= nop_set_peripheral;
 
+   if(node && of_device_is_compatible(node, "smsc,usb3315")) {
+   err = smsc_usb3315_init(nop);
+   if (err)
+   return err;
+   }
+
return 0;
 }
 EXPORT_SYMBOL_GPL(usb_phy_gen_create_phy);
@@ -318,6 +340,10 @@ static int usb_phy_generic_probe(struct platform_device 
*pdev)
if (!nop)
return -ENOMEM;
 
+   platform_set_drvdata(pdev, nop);
+
+   nop->init_done = false;
+
err = usb_phy_gen_create_phy(dev, nop, dev_get_platdata(>dev));
if (err)
return err;
@@ -346,8 +372,6 @@ static int usb_phy_generic_probe(struct platform_device 
*pdev)
return err;
}
 
-   platform_set_drvdata(pdev, nop);
-
return 0;
 }
 
@@ -362,6 +386,7 @@ static int usb_phy_generic_remove(struct platform_device 
*pdev)
 
 static const struct of_device_id nop_xceiv_dt_ids[] = {
{ .compatible = "usb-nop-xceiv" },
+   { .compatible = "smsc,usb3315" },
{ }
 };
 
diff --git a/drivers/usb/phy/phy-generic.h b/drivers/usb/phy/phy-generic.h
index 0d0eadd..db4ade6 100644
--- a/drivers/usb/phy/phy-generic.h
+++ b/drivers/usb/phy/phy-generic.h
@@ -14,6 +14,7 @@ struct usb_phy_generic {
struct gpio_desc *gpiod_vbus;
struct regulator *vbus_draw;
bool vbus_draw_enabled;
+   bool init_done;
unsigned long mA;
unsigned int vbus;
 };
-- 
2.9.3

[RFC] usb-phy-generic: Add support to SMSC USB3315

[Peter Senna Tschudin]

We need the SMSC USB3315 clock and regulator to always be initialized.
We also need the PHY driver to take the PHY out of reset. This patch
extends the existing USB generic nop phy driver to include a new
initialization path.

A new compatible string "smsc,usb3315" is used to decide which
initialization path to use.

CC: Peter Chen 
CC: Stephen Boyd 
CC: Fabien Lahoudere 
Signed-off-by: Peter Senna Tschudin 
---

This is a follow-up of previous discussion:
  https://www.spinics.net/lists/linux-usb/msg146680.html

 drivers/usb/phy/phy-generic.c | 33 +
 drivers/usb/phy/phy-generic.h |  1 +
 2 files changed, 30 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/phy/phy-generic.c b/drivers/usb/phy/phy-generic.c
index 89d6e7a..6ea9ce4 100644
--- a/drivers/usb/phy/phy-generic.c
+++ b/drivers/usb/phy/phy-generic.c
@@ -151,6 +151,9 @@ int usb_gen_phy_init(struct usb_phy *phy)
struct usb_phy_generic *nop = dev_get_drvdata(phy->dev);
int ret;
 
+   if (nop->init_done)
+   return 0;
+
if (!IS_ERR(nop->vcc)) {
if (regulator_enable(nop->vcc))
dev_err(phy->dev, "Failed to enable power\n");
@@ -164,6 +167,8 @@ int usb_gen_phy_init(struct usb_phy *phy)
 
nop_reset(nop);
 
+   nop->init_done = true;
+
return 0;
 }
 EXPORT_SYMBOL_GPL(usb_gen_phy_init);
@@ -216,18 +221,29 @@ static int nop_set_host(struct usb_otg *otg, struct 
usb_bus *host)
otg->host = host;
return 0;
 }
+int smsc_usb3315_init(struct usb_phy_generic *nop)
+{
+   /*
+* If the gpio for controlling reset state is not available, try again
+* later
+*/
+   if(!nop->gpiod_reset)
+   return -EPROBE_DEFER;
+
+   return usb_gen_phy_init(>phy);
+}
 
 int usb_phy_gen_create_phy(struct device *dev, struct usb_phy_generic *nop,
struct usb_phy_generic_platform_data *pdata)
 {
+   struct device_node *node = NULL;
enum usb_phy_type type = USB_PHY_TYPE_USB2;
int err = 0;
-
u32 clk_rate = 0;
bool needs_vcc = false;
 
if (dev->of_node) {
-   struct device_node *node = dev->of_node;
+   node = dev->of_node;
 
if (of_property_read_u32(node, "clock-frequency", _rate))
clk_rate = 0;
@@ -304,6 +320,12 @@ int usb_phy_gen_create_phy(struct device *dev, struct 
usb_phy_generic *nop,
nop->phy.otg->set_host  = nop_set_host;
nop->phy.otg->set_peripheral= nop_set_peripheral;
 
+   if(node && of_device_is_compatible(node, "smsc,usb3315")) {
+   err = smsc_usb3315_init(nop);
+   if (err)
+   return err;
+   }
+
return 0;
 }
 EXPORT_SYMBOL_GPL(usb_phy_gen_create_phy);
@@ -318,6 +340,10 @@ static int usb_phy_generic_probe(struct platform_device 
*pdev)
if (!nop)
return -ENOMEM;
 
+   platform_set_drvdata(pdev, nop);
+
+   nop->init_done = false;
+
err = usb_phy_gen_create_phy(dev, nop, dev_get_platdata(>dev));
if (err)
return err;
@@ -346,8 +372,6 @@ static int usb_phy_generic_probe(struct platform_device 
*pdev)
return err;
}
 
-   platform_set_drvdata(pdev, nop);
-
return 0;
 }
 
@@ -362,6 +386,7 @@ static int usb_phy_generic_remove(struct platform_device 
*pdev)
 
 static const struct of_device_id nop_xceiv_dt_ids[] = {
{ .compatible = "usb-nop-xceiv" },
+   { .compatible = "smsc,usb3315" },
{ }
 };
 
diff --git a/drivers/usb/phy/phy-generic.h b/drivers/usb/phy/phy-generic.h
index 0d0eadd..db4ade6 100644
--- a/drivers/usb/phy/phy-generic.h
+++ b/drivers/usb/phy/phy-generic.h
@@ -14,6 +14,7 @@ struct usb_phy_generic {
struct gpio_desc *gpiod_vbus;
struct regulator *vbus_draw;
bool vbus_draw_enabled;
+   bool init_done;
unsigned long mA;
unsigned int vbus;
 };
-- 
2.9.3

[PATCH] imx-serial: Reduce RX DMA startup latency when opening for reading

[Peter Senna Tschudin]

Reduce RX DMA start latency for the first reception when port is opened
for reading. Instead of waiting for an interrupt signaling data on RX
FIFO or data too old on RX FIFO, start RX DMA immediately when the
serial port is opened for reading.

Before this patch, the average RX DMA latency for the first reception
was 42489 microseconds with a standard deviation of 25721 microseconds
in 36 samples.

After the patch the average RX DMA latency for the first reception, when
the serial port is opened for reading, is 653 microseconds with a
standard deviation of 294 microseconds in 36 samples.

Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---

RX DMA latency for the first reception was calculated as the time
difference between the call to imx_startup() and the completion of
start_rx_dma(). I used this patch for the measurement:
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -238,6 +238,7 @@ struct imx_port {
wait_queue_head_t   dma_wait;
unsigned intsaved_reg[10];
boolcontext_saved;
+   struct timespec ts;
 };

 struct imx_port_ucrs {
@@ -1059,6 +1060,7 @@ static int start_rx_dma(struct imx_port *sport)
struct dma_chan *chan = sport->dma_chan_rx;
struct device *dev = sport->port.dev;
struct dma_async_tx_descriptor *desc;
+   struct timespec te;
int ret;

sport->rx_ring.head = 0;
@@ -1087,6 +1089,10 @@ static int start_rx_dma(struct imx_port *sport)
sport->dma_is_rxing = 1;
sport->rx_cookie = dmaengine_submit(desc);
dma_async_issue_pending(chan);
+
+   getnstimeofday();
+   dev_err(sport->port.dev, "DMA delay(microseconds): %lu\n", 
(te.tv_nsec - sport->ts.tv_nsec)/1000);
+
return 0;
 }

@@ -1286,6 +1292,8 @@ static int imx_startup(struct uart_port *port)
int retval, i, readcnt = 0;
unsigned long flags, temp;

+   getnstimeofday(>ts);
+
retval = clk_prepare_enable(sport->clk_per);
if (retval)
return retval;

 drivers/tty/serial/imx.c | 63 +---
 1 file changed, 49 insertions(+), 14 deletions(-)

diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index e3e152c..b4340b5 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -719,6 +719,27 @@ static irqreturn_t imx_rxint(int irq, void *dev_id)
return IRQ_HANDLED;
 }
 
+static void imx_disable_rx_int(struct imx_port *sport)
+{
+   unsigned long temp;
+
+   sport->dma_is_rxing = 1;
+
+   /* disable the receiver ready and aging timer interrupts */
+   temp = readl(sport->port.membase + UCR1);
+   temp &= ~(UCR1_RRDYEN);
+   writel(temp, sport->port.membase + UCR1);
+
+   temp = readl(sport->port.membase + UCR2);
+   temp &= ~(UCR2_ATEN);
+   writel(temp, sport->port.membase + UCR2);
+
+   /* disable the rx errors interrupts */
+   temp = readl(sport->port.membase + UCR4);
+   temp &= ~UCR4_OREN;
+   writel(temp, sport->port.membase + UCR4);
+}
+
 static void clear_rx_errors(struct imx_port *sport);
 static int start_rx_dma(struct imx_port *sport);
 /*
@@ -734,21 +755,8 @@ static void imx_dma_rxint(struct imx_port *sport)
 
temp = readl(sport->port.membase + USR2);
if ((temp & USR2_RDR) && !sport->dma_is_rxing) {
-   sport->dma_is_rxing = 1;
 
-   /* disable the receiver ready and aging timer interrupts */
-   temp = readl(sport->port.membase + UCR1);
-   temp &= ~(UCR1_RRDYEN);
-   writel(temp, sport->port.membase + UCR1);
-
-   temp = readl(sport->port.membase + UCR2);
-   temp &= ~(UCR2_ATEN);
-   writel(temp, sport->port.membase + UCR2);
-
-   /* disable the rx errors interrupts */
-   temp = readl(sport->port.membase + UCR4);
-   temp &= ~UCR4_OREN;
-   writel(temp, sport->port.membase + UCR4);
+   imx_disable_rx_int(sport);
 
/* tell the DMA to receive the data. */
start_rx_dma(sport);
@@ -1339,6 +1347,33 @@ static int imx_startup(struct uart_port *port)
 * Enable modem status interrupts
 */
imx_enable_ms(>port);
+
+   /*
+* If the serial port is opened for reading start RX DMA immediately
+* instead of waiting for RX FIFO interrupts. In our iMX53 the average
+* delay for the first reception dropped from approximately 35000
+* 

[PATCH] imx-serial: Reduce RX DMA startup latency when opening for reading

[Peter Senna Tschudin]

Reduce RX DMA start latency for the first reception when port is opened
for reading. Instead of waiting for an interrupt signaling data on RX
FIFO or data too old on RX FIFO, start RX DMA immediately when the
serial port is opened for reading.

Before this patch, the average RX DMA latency for the first reception
was 42489 microseconds with a standard deviation of 25721 microseconds
in 36 samples.

After the patch the average RX DMA latency for the first reception, when
the serial port is opened for reading, is 653 microseconds with a
standard deviation of 294 microseconds in 36 samples.

Signed-off-by: Peter Senna Tschudin 
---

RX DMA latency for the first reception was calculated as the time
difference between the call to imx_startup() and the completion of
start_rx_dma(). I used this patch for the measurement:
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -238,6 +238,7 @@ struct imx_port {
wait_queue_head_t   dma_wait;
unsigned intsaved_reg[10];
boolcontext_saved;
+   struct timespec ts;
 };

 struct imx_port_ucrs {
@@ -1059,6 +1060,7 @@ static int start_rx_dma(struct imx_port *sport)
struct dma_chan *chan = sport->dma_chan_rx;
struct device *dev = sport->port.dev;
struct dma_async_tx_descriptor *desc;
+   struct timespec te;
int ret;

sport->rx_ring.head = 0;
@@ -1087,6 +1089,10 @@ static int start_rx_dma(struct imx_port *sport)
sport->dma_is_rxing = 1;
sport->rx_cookie = dmaengine_submit(desc);
dma_async_issue_pending(chan);
+
+   getnstimeofday();
+   dev_err(sport->port.dev, "DMA delay(microseconds): %lu\n", 
(te.tv_nsec - sport->ts.tv_nsec)/1000);
+
return 0;
 }

@@ -1286,6 +1292,8 @@ static int imx_startup(struct uart_port *port)
int retval, i, readcnt = 0;
unsigned long flags, temp;

+   getnstimeofday(>ts);
+
retval = clk_prepare_enable(sport->clk_per);
if (retval)
return retval;

 drivers/tty/serial/imx.c | 63 +---
 1 file changed, 49 insertions(+), 14 deletions(-)

diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index e3e152c..b4340b5 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -719,6 +719,27 @@ static irqreturn_t imx_rxint(int irq, void *dev_id)
return IRQ_HANDLED;
 }
 
+static void imx_disable_rx_int(struct imx_port *sport)
+{
+   unsigned long temp;
+
+   sport->dma_is_rxing = 1;
+
+   /* disable the receiver ready and aging timer interrupts */
+   temp = readl(sport->port.membase + UCR1);
+   temp &= ~(UCR1_RRDYEN);
+   writel(temp, sport->port.membase + UCR1);
+
+   temp = readl(sport->port.membase + UCR2);
+   temp &= ~(UCR2_ATEN);
+   writel(temp, sport->port.membase + UCR2);
+
+   /* disable the rx errors interrupts */
+   temp = readl(sport->port.membase + UCR4);
+   temp &= ~UCR4_OREN;
+   writel(temp, sport->port.membase + UCR4);
+}
+
 static void clear_rx_errors(struct imx_port *sport);
 static int start_rx_dma(struct imx_port *sport);
 /*
@@ -734,21 +755,8 @@ static void imx_dma_rxint(struct imx_port *sport)
 
temp = readl(sport->port.membase + USR2);
if ((temp & USR2_RDR) && !sport->dma_is_rxing) {
-   sport->dma_is_rxing = 1;
 
-   /* disable the receiver ready and aging timer interrupts */
-   temp = readl(sport->port.membase + UCR1);
-   temp &= ~(UCR1_RRDYEN);
-   writel(temp, sport->port.membase + UCR1);
-
-   temp = readl(sport->port.membase + UCR2);
-   temp &= ~(UCR2_ATEN);
-   writel(temp, sport->port.membase + UCR2);
-
-   /* disable the rx errors interrupts */
-   temp = readl(sport->port.membase + UCR4);
-   temp &= ~UCR4_OREN;
-   writel(temp, sport->port.membase + UCR4);
+   imx_disable_rx_int(sport);
 
/* tell the DMA to receive the data. */
start_rx_dma(sport);
@@ -1339,6 +1347,33 @@ static int imx_startup(struct uart_port *port)
 * Enable modem status interrupts
 */
imx_enable_ms(>port);
+
+   /*
+* If the serial port is opened for reading start RX DMA immediately
+* instead of waiting for RX FIFO interrupts. In our iMX53 the average
+* delay for the first reception dropped from approximately 35000
+* microseconds to 1000 microse

[PATCH] megachips-stdpxxxx-ge-b850v3-fw: Fix drm bridge initialization

[Peter Senna Tschudin]

Reordering of the device nodes based on unit address resulted in
ge_b850v3_lvds_attach() being called before
ge_b850v3_lvds_ptr->stdp4028_i2c was populated.

This patch moves the drm bridge initialization from
ge_b850v3_lvds_init() to stdp4028_ge_b850v3_fw_probe() ensuring that
ge_b850v3_lvds_ptr->stdp4028_i2c is properly populated.

Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---
 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c 
b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
index e53c243..b9f32e8 100644
--- a/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
+++ b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
@@ -279,10 +279,6 @@ static int ge_b850v3_lvds_init(struct device *dev)
return -ENOMEM;
}
 
-   ge_b850v3_lvds_ptr->bridge.funcs = _b850v3_lvds_funcs;
-   ge_b850v3_lvds_ptr->bridge.of_node = dev->of_node;
-   drm_bridge_add(_b850v3_lvds_ptr->bridge);
-
 success:
mutex_unlock(_b850v3_lvds_dev_mutex);
return 0;
@@ -317,6 +313,11 @@ static int stdp4028_ge_b850v3_fw_probe(struct i2c_client 
*stdp4028_i2c,
ge_b850v3_lvds_ptr->stdp4028_i2c = stdp4028_i2c;
i2c_set_clientdata(stdp4028_i2c, ge_b850v3_lvds_ptr);
 
+   /* drm bridge initialization */
+   ge_b850v3_lvds_ptr->bridge.funcs = _b850v3_lvds_funcs;
+   ge_b850v3_lvds_ptr->bridge.of_node = dev->of_node;
+   drm_bridge_add(_b850v3_lvds_ptr->bridge);
+
/* Clear pending interrupts since power up. */
i2c_smbus_write_word_data(stdp4028_i2c,
  STDP4028_DPTX_IRQ_STS_REG,
-- 
2.9.3

[PATCH] megachips-stdpxxxx-ge-b850v3-fw: Fix drm bridge initialization

[Peter Senna Tschudin]

Reordering of the device nodes based on unit address resulted in
ge_b850v3_lvds_attach() being called before
ge_b850v3_lvds_ptr->stdp4028_i2c was populated.

This patch moves the drm bridge initialization from
ge_b850v3_lvds_init() to stdp4028_ge_b850v3_fw_probe() ensuring that
ge_b850v3_lvds_ptr->stdp4028_i2c is properly populated.

Signed-off-by: Peter Senna Tschudin 
---
 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c 
b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
index e53c243..b9f32e8 100644
--- a/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
+++ b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
@@ -279,10 +279,6 @@ static int ge_b850v3_lvds_init(struct device *dev)
return -ENOMEM;
}
 
-   ge_b850v3_lvds_ptr->bridge.funcs = _b850v3_lvds_funcs;
-   ge_b850v3_lvds_ptr->bridge.of_node = dev->of_node;
-   drm_bridge_add(_b850v3_lvds_ptr->bridge);
-
 success:
mutex_unlock(_b850v3_lvds_dev_mutex);
return 0;
@@ -317,6 +313,11 @@ static int stdp4028_ge_b850v3_fw_probe(struct i2c_client 
*stdp4028_i2c,
ge_b850v3_lvds_ptr->stdp4028_i2c = stdp4028_i2c;
i2c_set_clientdata(stdp4028_i2c, ge_b850v3_lvds_ptr);
 
+   /* drm bridge initialization */
+   ge_b850v3_lvds_ptr->bridge.funcs = _b850v3_lvds_funcs;
+   ge_b850v3_lvds_ptr->bridge.of_node = dev->of_node;
+   drm_bridge_add(_b850v3_lvds_ptr->bridge);
+
/* Clear pending interrupts since power up. */
i2c_smbus_write_word_data(stdp4028_i2c,
  STDP4028_DPTX_IRQ_STS_REG,
-- 
2.9.3

Re: [PATCH V4] dts/imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)

[Peter Senna Tschudin]

On Thu, Mar 16, 2017 at 09:41:03AM +0100, Daniel Vetter wrote:
> On Thu, Mar 16, 2017 at 10:34:59AM +0800, Shawn Guo wrote:
> > I fixed up all of them and applied patch.
> 
> +1 on doing review like this. And for committers you can do "with all that
> fixed r-b: me" and let them fix it up & push themselves, even less work
> :-)

Thank you Shawn!

[...]

Re: [PATCH V4] dts/imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)

[Peter Senna Tschudin]

On Thu, Mar 16, 2017 at 09:41:03AM +0100, Daniel Vetter wrote:
> On Thu, Mar 16, 2017 at 10:34:59AM +0800, Shawn Guo wrote:
> > I fixed up all of them and applied patch.
> 
> +1 on doing review like this. And for committers you can do "with all that
> fixed r-b: me" and let them fix it up & push themselves, even less work
> :-)

Thank you Shawn!

[...]

[PATCH V4] dts/imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)

[Peter Senna Tschudin]

Configures the megachips-stdp-ge-b850v3-fw bridges on the GE
B850v3 dts file.

Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Cc: Martyn Welch <martyn.we...@collabora.co.uk>
Cc: Martin Donnelly <martin.donne...@ge.com>
Cc: Javier Martinez Canillas <jav...@dowhile0.org>
Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
Cc: Philipp Zabel <p.za...@pengutronix.de>
Cc: Rob Herring <r...@kernel.org>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---
Subject was [PATCH V4 4/4] ...
But patches 1, 2, and 3 are already upstream and were not resent.

Changes from V3:
 - Newline fixes
 - Removed 'status = "okay";' from '_i2c2'
 - Sorted device nodes in order of unit address

Unchanged since V1.
 arch/arm/boot/dts/imx6q-b850v3.dts | 66 ++
 1 file changed, 66 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
b/arch/arm/boot/dts/imx6q-b850v3.dts
index d78514c..ef67b47 100644
--- a/arch/arm/boot/dts/imx6q-b850v3.dts
+++ b/arch/arm/boot/dts/imx6q-b850v3.dts
@@ -72,6 +72,14 @@
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
+
+   port@4 {
+   reg = <4>;
+
+   lvds0_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
};
 };
 
@@ -142,3 +150,61 @@
reg = <0x4a>;
};
 };
+
+_i2c2 {
+   clock-frequency = <10>;
+
+   stdp2690@72 {
+   compatible = "megachips,stdp2690-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x72>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp2690_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   stdp2690_out: endpoint {
+   /* Connector for external display */
+   };
+   };
+   };
+   };
+
+   stdp4028@73 {
+   compatible = "megachips,stdp4028-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x73>;
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp4028_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   stdp4028_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
+};
-- 
2.9.3

[PATCH V4] dts/imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)

[Peter Senna Tschudin]

Configures the megachips-stdp-ge-b850v3-fw bridges on the GE
B850v3 dts file.

Cc: Laurent Pinchart 
Cc: Martyn Welch 
Cc: Martin Donnelly 
Cc: Javier Martinez Canillas 
Cc: Enric Balletbo i Serra 
Cc: Philipp Zabel 
Cc: Rob Herring 
Cc: Fabio Estevam 
Signed-off-by: Peter Senna Tschudin 
---
Subject was [PATCH V4 4/4] ...
But patches 1, 2, and 3 are already upstream and were not resent.

Changes from V3:
 - Newline fixes
 - Removed 'status = "okay";' from '_i2c2'
 - Sorted device nodes in order of unit address

Unchanged since V1.
 arch/arm/boot/dts/imx6q-b850v3.dts | 66 ++
 1 file changed, 66 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
b/arch/arm/boot/dts/imx6q-b850v3.dts
index d78514c..ef67b47 100644
--- a/arch/arm/boot/dts/imx6q-b850v3.dts
+++ b/arch/arm/boot/dts/imx6q-b850v3.dts
@@ -72,6 +72,14 @@
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
+
+   port@4 {
+   reg = <4>;
+
+   lvds0_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
};
 };
 
@@ -142,3 +150,61 @@
reg = <0x4a>;
};
 };
+
+_i2c2 {
+   clock-frequency = <10>;
+
+   stdp2690@72 {
+   compatible = "megachips,stdp2690-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x72>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp2690_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   stdp2690_out: endpoint {
+   /* Connector for external display */
+   };
+   };
+   };
+   };
+
+   stdp4028@73 {
+   compatible = "megachips,stdp4028-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x73>;
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp4028_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   stdp4028_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
+};
-- 
2.9.3

Re: [PATCH v5 04/19] net: e100: Replace PCI pool old API

[Peter Senna Tschudin]

On Wed, Mar 08, 2017 at 02:40:25PM -0800, Jeff Kirsher wrote:
> On Wed, 2017-03-08 at 17:19 +0100, Romain Perier wrote:
> > The PCI pool API is deprecated. This commit replaces the PCI pool old
> > API by the appropriate function with the DMA pool API.
> > 
> > Signed-off-by: Romain Perier <romain.per...@collabora.com>
> > Acked-by: Peter Senna Tschudin <peter.se...@collabora.com>
> > Tested-by: Peter Senna Tschudin <peter.se...@collabora.com>
> > ---
> >  drivers/net/ethernet/intel/e100.c | 12 ++--
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> Acked-by: Jeff Kirsher <jeffrey.t.kirs...@intel.com>
> 
> My only concern is:
> - what hardware did this get tested with?  Since this affects all e100
> parts, it would be hard to believe that all the affected hardware was
> used in testing.

This was tested by compilation only(See
https://lkml.org/lkml/2017/2/8/661). However this series removes macro
definitions of the old pci_pool interface and replace call sites by what
the macra was calling.

Here are the macros that this series removes from include/pci.h:

#define pci_pool dma_pool
#define pci_pool_create(name, pdev, size, align, allocation) \
dma_pool_create(name, >dev, size, align, allocation)
#define pci_pool_destroy(pool) dma_pool_destroy(pool)
#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
#define pci_pool_zalloc(pool, flags, handle) \
dma_pool_zalloc(pool, flags, handle)
#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, add

So this should not affect run time.

Re: [PATCH v5 04/19] net: e100: Replace PCI pool old API

[Peter Senna Tschudin]

On Wed, Mar 08, 2017 at 02:40:25PM -0800, Jeff Kirsher wrote:
> On Wed, 2017-03-08 at 17:19 +0100, Romain Perier wrote:
> > The PCI pool API is deprecated. This commit replaces the PCI pool old
> > API by the appropriate function with the DMA pool API.
> > 
> > Signed-off-by: Romain Perier 
> > Acked-by: Peter Senna Tschudin 
> > Tested-by: Peter Senna Tschudin 
> > ---
> >  drivers/net/ethernet/intel/e100.c | 12 ++--
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> Acked-by: Jeff Kirsher 
> 
> My only concern is:
> - what hardware did this get tested with?  Since this affects all e100
> parts, it would be hard to believe that all the affected hardware was
> used in testing.

This was tested by compilation only(See
https://lkml.org/lkml/2017/2/8/661). However this series removes macro
definitions of the old pci_pool interface and replace call sites by what
the macra was calling.

Here are the macros that this series removes from include/pci.h:

#define pci_pool dma_pool
#define pci_pool_create(name, pdev, size, align, allocation) \
dma_pool_create(name, >dev, size, align, allocation)
#define pci_pool_destroy(pool) dma_pool_destroy(pool)
#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
#define pci_pool_zalloc(pool, flags, handle) \
dma_pool_zalloc(pool, flags, handle)
#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, add

So this should not affect run time.

Re: [PATCH V3 4/4] dts/imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)

[Peter Senna Tschudin]

On Fri, Mar 03, 2017 at 04:57:10PM +0100, Peter Senna Tschudin wrote:

Hi Shawn Guo,

Now that the driver and binding are in, can you pick this up?

Thank you!

> Configures the megachips-stdp-ge-b850v3-fw bridges on the GE
> B850v3 dts file.
> 
> Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
> Cc: Martyn Welch <martyn.we...@collabora.co.uk>
> Cc: Martin Donnelly <martin.donne...@ge.com>
> Cc: Javier Martinez Canillas <jav...@dowhile0.org>
> Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
> Cc: Philipp Zabel <p.za...@pengutronix.de>
> Cc: Rob Herring <r...@kernel.org>
> Cc: Fabio Estevam <fabio.este...@nxp.com>
> Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
> ---
> Unchanged since V1.
> 
>  arch/arm/boot/dts/imx6q-b850v3.dts | 68 
> ++
>  1 file changed, 68 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
> b/arch/arm/boot/dts/imx6q-b850v3.dts
> index b237429..3ec54da 100644
> --- a/arch/arm/boot/dts/imx6q-b850v3.dts
> +++ b/arch/arm/boot/dts/imx6q-b850v3.dts
> @@ -72,6 +72,13 @@
>   fsl,data-mapping = "spwg";
>   fsl,data-width = <24>;
>   status = "okay";
> +
> + port@4 {
> + reg = <4>;
> + lvds0_out: endpoint {
> + remote-endpoint = <_in>;
> + };
> + };
>   };
>  };
>  
> @@ -146,3 +153,64 @@
>   {
>   status = "disabled";
>  };
> +
> +_i2c2 {
> + status = "okay";
> + clock-frequency = <10>;
> +
> + stdp4028@73 {
> + compatible = "megachips,stdp4028-ge-b850v3-fw";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + reg = <0x73>;
> +
> + interrupt-parent = <>;
> + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + stdp4028_in: endpoint {
> + remote-endpoint = <_out>;
> + };
> + };
> + port@1 {
> + reg = <1>;
> + stdp4028_out: endpoint {
> + remote-endpoint = <_in>;
> + };
> + };
> + };
> + };
> +
> + stdp2690@72 {
> + compatible = "megachips,stdp2690-ge-b850v3-fw";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + reg = <0x72>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + stdp2690_in: endpoint {
> + remote-endpoint = <_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + stdp2690_out: endpoint {
> + /* Connector for external display */
> + };
> + };
> + };
> + };
> +};
> -- 
> 2.9.3
> 

Re: [PATCH V3 4/4] dts/imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)

[Peter Senna Tschudin]

On Fri, Mar 03, 2017 at 04:57:10PM +0100, Peter Senna Tschudin wrote:

Hi Shawn Guo,

Now that the driver and binding are in, can you pick this up?

Thank you!

> Configures the megachips-stdp-ge-b850v3-fw bridges on the GE
> B850v3 dts file.
> 
> Cc: Laurent Pinchart 
> Cc: Martyn Welch 
> Cc: Martin Donnelly 
> Cc: Javier Martinez Canillas 
> Cc: Enric Balletbo i Serra 
> Cc: Philipp Zabel 
> Cc: Rob Herring 
> Cc: Fabio Estevam 
> Signed-off-by: Peter Senna Tschudin 
> ---
> Unchanged since V1.
> 
>  arch/arm/boot/dts/imx6q-b850v3.dts | 68 
> ++
>  1 file changed, 68 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
> b/arch/arm/boot/dts/imx6q-b850v3.dts
> index b237429..3ec54da 100644
> --- a/arch/arm/boot/dts/imx6q-b850v3.dts
> +++ b/arch/arm/boot/dts/imx6q-b850v3.dts
> @@ -72,6 +72,13 @@
>   fsl,data-mapping = "spwg";
>   fsl,data-width = <24>;
>   status = "okay";
> +
> + port@4 {
> + reg = <4>;
> + lvds0_out: endpoint {
> + remote-endpoint = <_in>;
> + };
> + };
>   };
>  };
>  
> @@ -146,3 +153,64 @@
>   {
>   status = "disabled";
>  };
> +
> +_i2c2 {
> + status = "okay";
> + clock-frequency = <10>;
> +
> + stdp4028@73 {
> + compatible = "megachips,stdp4028-ge-b850v3-fw";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + reg = <0x73>;
> +
> + interrupt-parent = <>;
> + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + stdp4028_in: endpoint {
> + remote-endpoint = <_out>;
> + };
> + };
> + port@1 {
> + reg = <1>;
> + stdp4028_out: endpoint {
> + remote-endpoint = <_in>;
> + };
> + };
> + };
> + };
> +
> + stdp2690@72 {
> + compatible = "megachips,stdp2690-ge-b850v3-fw";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + reg = <0x72>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + stdp2690_in: endpoint {
> + remote-endpoint = <_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + stdp2690_out: endpoint {
> + /* Connector for external display */
> + };
> + };
> + };
> + };
> +};
> -- 
> 2.9.3
> 

Re: [PATCH V3 0/4] megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

On Mon, Mar 06, 2017 at 03:27:16PM +0530, Archit Taneja wrote:
Hi Archit,

> Hi,
> 
> On 3/3/2017 9:27 PM, Peter Senna Tschudin wrote:
> > The video processing pipeline on the second output on the GE B850v3:
> > 
> >   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
> > 
> > Each bridge has a dedicated flash containing firmware for supporting the
> > custom design. The result is that in this design neither the STDP4028
> > nor the STDP2690 behave as the stock bridges would. The compatible
> > strings include the suffix "-ge-b850v3-fw" to make it clear that the
> > driver is for the bridges with the firmware which is specific for the GE
> > B850v3.
> > 
> > The driver is powerless to control the video processing pipeline, as the
> > two bridges behaves as a single one. The driver is only needed for
> > telling the host about EDID / HPD, and for giving the host powers to ack
> > interrupts.
> 
> queued Patches 1,2 and 3 to drm-misc-next. Made stdp2690_get_edid static
> in Patch #3 to fix a sparse warning.

What about 4/4, aka the dt change? Do I need an ack from Rob Herring?

Thanks a lot!

[...]

Re: [PATCH V3 0/4] megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

On Mon, Mar 06, 2017 at 03:27:16PM +0530, Archit Taneja wrote:
Hi Archit,

> Hi,
> 
> On 3/3/2017 9:27 PM, Peter Senna Tschudin wrote:
> > The video processing pipeline on the second output on the GE B850v3:
> > 
> >   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
> > 
> > Each bridge has a dedicated flash containing firmware for supporting the
> > custom design. The result is that in this design neither the STDP4028
> > nor the STDP2690 behave as the stock bridges would. The compatible
> > strings include the suffix "-ge-b850v3-fw" to make it clear that the
> > driver is for the bridges with the firmware which is specific for the GE
> > B850v3.
> > 
> > The driver is powerless to control the video processing pipeline, as the
> > two bridges behaves as a single one. The driver is only needed for
> > telling the host about EDID / HPD, and for giving the host powers to ack
> > interrupts.
> 
> queued Patches 1,2 and 3 to drm-misc-next. Made stdp2690_get_edid static
> in Patch #3 to fix a sparse warning.

What about 4/4, aka the dt change? Do I need an ack from Rob Herring?

Thanks a lot!

[...]

[PATCH V3 4/4] dts/imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)

[Peter Senna Tschudin]

Configures the megachips-stdp-ge-b850v3-fw bridges on the GE
B850v3 dts file.

Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Cc: Martyn Welch <martyn.we...@collabora.co.uk>
Cc: Martin Donnelly <martin.donne...@ge.com>
Cc: Javier Martinez Canillas <jav...@dowhile0.org>
Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
Cc: Philipp Zabel <p.za...@pengutronix.de>
Cc: Rob Herring <r...@kernel.org>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---
Unchanged since V1.

 arch/arm/boot/dts/imx6q-b850v3.dts | 68 ++
 1 file changed, 68 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
b/arch/arm/boot/dts/imx6q-b850v3.dts
index b237429..3ec54da 100644
--- a/arch/arm/boot/dts/imx6q-b850v3.dts
+++ b/arch/arm/boot/dts/imx6q-b850v3.dts
@@ -72,6 +72,13 @@
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
+
+   port@4 {
+   reg = <4>;
+   lvds0_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
};
 };
 
@@ -146,3 +153,64 @@
  {
status = "disabled";
 };
+
+_i2c2 {
+   status = "okay";
+   clock-frequency = <10>;
+
+   stdp4028@73 {
+   compatible = "megachips,stdp4028-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x73>;
+
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp4028_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   stdp4028_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
+
+   stdp2690@72 {
+   compatible = "megachips,stdp2690-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x72>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp2690_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   stdp2690_out: endpoint {
+   /* Connector for external display */
+   };
+   };
+   };
+   };
+};
-- 
2.9.3

[PATCH V3 4/4] dts/imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)

[Peter Senna Tschudin]

Configures the megachips-stdp-ge-b850v3-fw bridges on the GE
B850v3 dts file.

Cc: Laurent Pinchart 
Cc: Martyn Welch 
Cc: Martin Donnelly 
Cc: Javier Martinez Canillas 
Cc: Enric Balletbo i Serra 
Cc: Philipp Zabel 
Cc: Rob Herring 
Cc: Fabio Estevam 
Signed-off-by: Peter Senna Tschudin 
---
Unchanged since V1.

 arch/arm/boot/dts/imx6q-b850v3.dts | 68 ++
 1 file changed, 68 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
b/arch/arm/boot/dts/imx6q-b850v3.dts
index b237429..3ec54da 100644
--- a/arch/arm/boot/dts/imx6q-b850v3.dts
+++ b/arch/arm/boot/dts/imx6q-b850v3.dts
@@ -72,6 +72,13 @@
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
+
+   port@4 {
+   reg = <4>;
+   lvds0_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
};
 };
 
@@ -146,3 +153,64 @@
  {
status = "disabled";
 };
+
+_i2c2 {
+   status = "okay";
+   clock-frequency = <10>;
+
+   stdp4028@73 {
+   compatible = "megachips,stdp4028-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x73>;
+
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp4028_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   stdp4028_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
+
+   stdp2690@72 {
+   compatible = "megachips,stdp2690-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x72>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp2690_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   stdp2690_out: endpoint {
+   /* Connector for external display */
+   };
+   };
+   };
+   };
+};
-- 
2.9.3

[PATCH V3 2/4] MAINTAINERS: Add entry for megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

Add MAINTAINERS entry for the second video output of the GE B850v3:
   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
   STDP2690-ge-b850v3-fw bridges (DP-DP++)

Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Cc: Martyn Welch <martyn.we...@collabora.co.uk>
Cc: Martin Donnelly <martin.donne...@ge.com>
Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
Cc: Philipp Zabel <p.za...@pengutronix.de>
Cc: Rob Herring <r...@kernel.org>
Cc: Fabio Estevam <fabio.este...@nxp.com>
CC: David Airlie <airl...@linux.ie>
CC: Thierry Reding <tred...@nvidia.com>
CC: Thierry Reding <thierry.red...@gmail.com>
CC: Archit Taneja <arch...@codeaurora.org>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---
Unchanged since V1

 MAINTAINERS | 8 
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index bc12716..d8c841a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8127,6 +8127,14 @@ L:   linux-wirel...@vger.kernel.org
 S: Maintained
 F: drivers/net/wireless/mediatek/mt7601u/
 
+MEGACHIPS STDP-GE-B850V3-FW LVDS/DP++ BRIDGES
+M: Peter Senna Tschudin <peter.se...@collabora.com>
+M: Martin Donnelly <martin.donne...@ge.com>
+M: Martyn Welch <martyn.we...@collabora.co.uk>
+S: Maintained
+F: drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
+F: 
Documentation/devicetree/bindings/video/bridge/megachips-stdp-ge-b850v3-fw.txt
+
 MEGARAID SCSI/SAS DRIVERS
 M: Kashyap Desai <kashyap.de...@broadcom.com>
 M: Sumit Saxena <sumit.sax...@broadcom.com>
-- 
2.9.3

[PATCH V3 2/4] MAINTAINERS: Add entry for megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

Add MAINTAINERS entry for the second video output of the GE B850v3:
   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
   STDP2690-ge-b850v3-fw bridges (DP-DP++)

Cc: Laurent Pinchart 
Cc: Martyn Welch 
Cc: Martin Donnelly 
Cc: Daniel Vetter 
Cc: Enric Balletbo i Serra 
Cc: Philipp Zabel 
Cc: Rob Herring 
Cc: Fabio Estevam 
CC: David Airlie 
CC: Thierry Reding 
CC: Thierry Reding 
CC: Archit Taneja 
Signed-off-by: Peter Senna Tschudin 
---
Unchanged since V1

 MAINTAINERS | 8 
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index bc12716..d8c841a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8127,6 +8127,14 @@ L:   linux-wirel...@vger.kernel.org
 S: Maintained
 F: drivers/net/wireless/mediatek/mt7601u/
 
+MEGACHIPS STDP-GE-B850V3-FW LVDS/DP++ BRIDGES
+M: Peter Senna Tschudin 
+M: Martin Donnelly 
+M: Martyn Welch 
+S: Maintained
+F: drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
+F: 
Documentation/devicetree/bindings/video/bridge/megachips-stdp-ge-b850v3-fw.txt
+
 MEGARAID SCSI/SAS DRIVERS
 M: Kashyap Desai 
 M: Sumit Saxena 
-- 
2.9.3

[PATCH V3 0/4] megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

The video processing pipeline on the second output on the GE B850v3:

  Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output

Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the STDP2690 behave as the stock bridges would. The compatible
strings include the suffix "-ge-b850v3-fw" to make it clear that the
driver is for the bridges with the firmware which is specific for the GE
B850v3.

The driver is powerless to control the video processing pipeline, as the
two bridges behaves as a single one. The driver is only needed for
telling the host about EDID / HPD, and for giving the host powers to ack
interrupts.

Changes from V2:
 - Added Acked-by: Rob Herring <r...@kernel.org> on patch 1/4
 - Fixed the driver to allow it to be compiled as a module

Changes from V1:
 - Fix bindings documentation
 - Fix white space issues on the driver
 - Improved ge_b850v3_lvds_remove() to not rely on ge_b850v3_lvds_ptr->edid

Changes from V7(was GE B850v3 LVDS/DP++ Bridge):
 - New devicetree binding with one node per bridge, and two ports per bridge
 - Two i2c_devices, one per bridge
 - Removed uneeded mutexes
 - Moved documentation to bindings/display/bridge
 - Included test for EDID extension blocks
 - Renamed bridge pointer to ge_b850v3_lvds_ptr
 - Removed the call to drm_helper_hpd_irq_event()
 - Removed assignments to bridge.driver_private

Changes from V6:
 - Removed check for pixel clock as the bridge supports up to 330Mhz while the
   host is limited to 264 MHz in very specific conditions.
 - Added a second mutex to avoid concurrency issues while acking interrupts
   from threaded interrupt handlers.
 - Renamed the edid mutex to be more descriptive.
 - Added a .detach() function that disables the interrupts.
 - Adopted i2c_new_secondary_device() and updated the dts and documentation to
   match the new method.
 - Removed useless test to drm_bridge_add()
 - Did some refactoring around devm_request_threaded_irq()
 - Added a missing call to i2c_unregister_device() on the i2c_driver.remove()
   function.

Changes from V5:
 - Change to MAINTAINERS in a separate patch
 - Reworked interrupt handler initialization
 - Removed useless calls to: drm_connector_register(),
   drm_helper_hpd_irq_event(), and drm_bridge_enable()

Changes from V4:
 - Renamed the i2c_driver.name from "ge,b850v3-lvds-dp" to "b850v3-lvds-dp" to
   remove the comma from the driver name

Changes from V3:
 - Removed the patch that was configuring the mapping between IPUs and external
   displays on the dts file

Peter Senna Tschudin (4):
  dt-bindings: display: megachips-stdp-ge-b850v3-fw
  MAINTAINERS: Add entry for megachips-stdp-ge-b850v3-fw
  drm/bridge: Drivers for megachips-stdp-ge-b850v3-fw (LVDS-DP++)
  dts/imx6q-b850v3: Use megachips-stdp-ge-b850v3-fw bridges
(LVDS-DP++)

 .../bridge/megachips-stdp-ge-b850v3-fw.txt |  94 +
 .../devicetree/bindings/vendor-prefixes.txt|   1 +
 MAINTAINERS|   8 +
 arch/arm/boot/dts/imx6q-b850v3.dts |  68 
 drivers/gpu/drm/bridge/Kconfig |  11 +
 drivers/gpu/drm/bridge/Makefile|   1 +
 .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 428 +
 7 files changed, 611 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
 create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c

-- 
2.9.3

[PATCH V3 0/4] megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

The video processing pipeline on the second output on the GE B850v3:

  Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output

Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the STDP2690 behave as the stock bridges would. The compatible
strings include the suffix "-ge-b850v3-fw" to make it clear that the
driver is for the bridges with the firmware which is specific for the GE
B850v3.

The driver is powerless to control the video processing pipeline, as the
two bridges behaves as a single one. The driver is only needed for
telling the host about EDID / HPD, and for giving the host powers to ack
interrupts.

Changes from V2:
 - Added Acked-by: Rob Herring  on patch 1/4
 - Fixed the driver to allow it to be compiled as a module

Changes from V1:
 - Fix bindings documentation
 - Fix white space issues on the driver
 - Improved ge_b850v3_lvds_remove() to not rely on ge_b850v3_lvds_ptr->edid

Changes from V7(was GE B850v3 LVDS/DP++ Bridge):
 - New devicetree binding with one node per bridge, and two ports per bridge
 - Two i2c_devices, one per bridge
 - Removed uneeded mutexes
 - Moved documentation to bindings/display/bridge
 - Included test for EDID extension blocks
 - Renamed bridge pointer to ge_b850v3_lvds_ptr
 - Removed the call to drm_helper_hpd_irq_event()
 - Removed assignments to bridge.driver_private

Changes from V6:
 - Removed check for pixel clock as the bridge supports up to 330Mhz while the
   host is limited to 264 MHz in very specific conditions.
 - Added a second mutex to avoid concurrency issues while acking interrupts
   from threaded interrupt handlers.
 - Renamed the edid mutex to be more descriptive.
 - Added a .detach() function that disables the interrupts.
 - Adopted i2c_new_secondary_device() and updated the dts and documentation to
   match the new method.
 - Removed useless test to drm_bridge_add()
 - Did some refactoring around devm_request_threaded_irq()
 - Added a missing call to i2c_unregister_device() on the i2c_driver.remove()
   function.

Changes from V5:
 - Change to MAINTAINERS in a separate patch
 - Reworked interrupt handler initialization
 - Removed useless calls to: drm_connector_register(),
   drm_helper_hpd_irq_event(), and drm_bridge_enable()

Changes from V4:
 - Renamed the i2c_driver.name from "ge,b850v3-lvds-dp" to "b850v3-lvds-dp" to
   remove the comma from the driver name

Changes from V3:
 - Removed the patch that was configuring the mapping between IPUs and external
   displays on the dts file

Peter Senna Tschudin (4):
  dt-bindings: display: megachips-stdp-ge-b850v3-fw
  MAINTAINERS: Add entry for megachips-stdp-ge-b850v3-fw
  drm/bridge: Drivers for megachips-stdp-ge-b850v3-fw (LVDS-DP++)
  dts/imx6q-b850v3: Use megachips-stdp-ge-b850v3-fw bridges
(LVDS-DP++)

 .../bridge/megachips-stdp-ge-b850v3-fw.txt |  94 +
 .../devicetree/bindings/vendor-prefixes.txt|   1 +
 MAINTAINERS|   8 +
 arch/arm/boot/dts/imx6q-b850v3.dts |  68 
 drivers/gpu/drm/bridge/Kconfig |  11 +
 drivers/gpu/drm/bridge/Makefile|   1 +
 .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 428 +
 7 files changed, 611 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
 create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c

-- 
2.9.3

[PATCH V3 1/4] dt-bindings: display: megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

Devicetree binding documentation for the second video output
of the GE B850v3:
   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
   STDP2690-ge-b850v3-fw bridges (DP-DP++)

Added entry for MegaChips at:
 Documentation/devicetree/bindings/vendor-prefixes.txt

Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Cc: Martyn Welch <martyn.we...@collabora.co.uk>
Cc: Martin Donnelly <martin.donne...@ge.com>
Cc: Javier Martinez Canillas <jav...@dowhile0.org>
Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
Cc: Philipp Zabel <p.za...@pengutronix.de>
Cc: Rob Herring <r...@kernel.org>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---
Changes from V3:
 Added Acked-by: Rob Herring <r...@kernel.org>

Changes from V1:
 - New subject
 - Moved binding documentation from bindings/video/ to bindings/display/bridge/
 - Reworded to describe hardware instead of the driver
 - Reformated the bindings to have one set of required properties per device
 - Updated reg description
 - Defined number of ports and what they are for

 .../bridge/megachips-stdp-ge-b850v3-fw.txt | 94 ++
 .../devicetree/bindings/vendor-prefixes.txt|  1 +
 2 files changed, 95 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt

diff --git 
a/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
 
b/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
new file mode 100644
index 000..7baa658
--- /dev/null
+++ 
b/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
@@ -0,0 +1,94 @@
+Drivers for the second video output of the GE B850v3:
+   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
+   STDP2690-ge-b850v3-fw bridges (DP-DP++)
+
+The video processing pipeline on the second output on the GE B850v3:
+
+   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
+
+Each bridge has a dedicated flash containing firmware for supporting the custom
+design. The result is that, in this design, neither the STDP4028 nor the
+STDP2690 behave as the stock bridges would. The compatible strings include the
+suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with
+the firmware specific for the GE B850v3.
+
+The hardware do not provide control over the video processing pipeline, as the
+two bridges behaves as a single one. The only interfaces exposed by the
+hardware are EDID, HPD, and interrupts.
+
+stdp4028-ge-b850v3-fw required properties:
+  - compatible : "megachips,stdp4028-ge-b850v3-fw"
+  - reg : I2C bus address
+  - interrupt-parent : phandle of the interrupt controller that services
+interrupts to the device
+  - interrupts : one interrupt should be described here, as in
+<0 IRQ_TYPE_LEVEL_HIGH>
+  - ports : One input port(reg = <0>) and one output port(reg = <1>)
+
+stdp2690-ge-b850v3-fw required properties:
+compatible : "megachips,stdp2690-ge-b850v3-fw"
+  - reg : I2C bus address
+  - ports : One input port(reg = <0>) and one output port(reg = <1>)
+
+Example:
+
+_i2c2 {
+   status = "okay";
+   clock-frequency = <10>;
+
+   stdp4028@73 {
+   compatible = "megachips,stdp4028-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x73>;
+
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp4028_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   stdp4028_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
+
+   stdp2690@72 {
+   compatible = "megachips,stdp2690-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x72>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp2690_in: endpoint {
+   re

[PATCH V3 3/4] drm/bridge: Drivers for megachips-stdpxxxx-ge-b850v3-fw (LVDS-DP++)

[Peter Senna Tschudin]

The video processing pipeline on the second output on the GE B850v3:

  Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output

Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the STDP2690 behave as the stock bridges would. The compatible
strings include the suffix "-ge-b850v3-fw" to make it clear that the
driver is for the bridges with the firmware which is specific for the GE
B850v3.

The driver is powerless to control the video processing pipeline, as the
two bridges behaves as a single one. The driver is only needed for
telling the host about EDID / HPD, and for giving the host powers to ack
interrupts.

This driver adds one i2c_device for each bridge, but only one
drm_bridge. This design allows the creation of a functional connector
that is capable of reading EDID from the STDP2690 while handling
interrupts on the STDP4028.

Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Cc: Martyn Welch <martyn.we...@collabora.co.uk>
Cc: Martin Donnelly <martin.donne...@ge.com>
Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
Cc: Philipp Zabel <p.za...@pengutronix.de>
Cc: Rob Herring <r...@kernel.org>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Cc: David Airlie <airl...@linux.ie>
Cc: Thierry Reding <tred...@nvidia.com>
Cc: Thierry Reding <thierry.red...@gmail.com>
Cc: Archit Taneja <arch...@codeaurora.org>
Cc: Enric Balletbo <enric.balle...@collabora.com>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---
Changes from V2:
 - Fix the code to allow it be compiled as a module

Changes from V1:
 - Updated copyright year
 - Fixed blank line issues
 - Updated ge_b850v3_lvds_remove() to not rely on ge_b850v3_lvds_ptr->edid and
   added a comment to explain the test.
 - Fixed checkpatch strict warnings about continuation lines. In one case
   fixing the warning would cause the continuation line to be over 80 chars and
   that strict warning remains.

 drivers/gpu/drm/bridge/Kconfig |  11 +
 drivers/gpu/drm/bridge/Makefile|   1 +
 .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 428 +
 3 files changed, 440 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index eb8688e..4a937f1 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -48,6 +48,17 @@ config DRM_DW_HDMI_I2S_AUDIO
  Support the I2S Audio interface which is part of the Synopsis
  Designware HDMI block.
 
+config DRM_MEGACHIPS_STDP_GE_B850V3_FW
+   tristate "MegaChips stdp4028-ge-b850v3-fw and stdp2690-ge-b850v3-fw"
+   depends on OF
+   select DRM_KMS_HELPER
+   select DRM_PANEL
+   ---help---
+  This is a driver for the display bridges of
+  GE B850v3 that convert dual channel LVDS
+  to DP++. This is used with the i.MX6 imx-ldb
+  driver. You are likely to say N here.
+
 config DRM_NXP_PTN3460
tristate "NXP PTN3460 DP/LVDS bridge"
depends on OF
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 2e83a785..af0b7cc 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
 obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
 obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
+obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
megachips-stdp-ge-b850v3-fw.o
 obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
 obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
 obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
diff --git a/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c 
b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
new file mode 100644
index 000..e53c243
--- /dev/null
+++ b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
@@ -0,0 +1,428 @@
+/*
+ * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
+ * Driver for MegaChips STDP2690 with GE B850v3 firmware (DP-DP++)
+
+ * Copyright (c) 2017, Collabora Ltd.
+ * Copyright (c) 2017, General Electric Company
+
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+
+ * You should have received a copy

[PATCH V3 1/4] dt-bindings: display: megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

Devicetree binding documentation for the second video output
of the GE B850v3:
   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
   STDP2690-ge-b850v3-fw bridges (DP-DP++)

Added entry for MegaChips at:
 Documentation/devicetree/bindings/vendor-prefixes.txt

Cc: Laurent Pinchart 
Cc: Martyn Welch 
Cc: Martin Donnelly 
Cc: Javier Martinez Canillas 
Cc: Enric Balletbo i Serra 
Cc: Philipp Zabel 
Cc: Rob Herring 
Cc: Fabio Estevam 
Acked-by: Rob Herring 
Signed-off-by: Peter Senna Tschudin 
---
Changes from V3:
 Added Acked-by: Rob Herring 

Changes from V1:
 - New subject
 - Moved binding documentation from bindings/video/ to bindings/display/bridge/
 - Reworded to describe hardware instead of the driver
 - Reformated the bindings to have one set of required properties per device
 - Updated reg description
 - Defined number of ports and what they are for

 .../bridge/megachips-stdp-ge-b850v3-fw.txt | 94 ++
 .../devicetree/bindings/vendor-prefixes.txt|  1 +
 2 files changed, 95 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt

diff --git 
a/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
 
b/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
new file mode 100644
index 000..7baa658
--- /dev/null
+++ 
b/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
@@ -0,0 +1,94 @@
+Drivers for the second video output of the GE B850v3:
+   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
+   STDP2690-ge-b850v3-fw bridges (DP-DP++)
+
+The video processing pipeline on the second output on the GE B850v3:
+
+   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
+
+Each bridge has a dedicated flash containing firmware for supporting the custom
+design. The result is that, in this design, neither the STDP4028 nor the
+STDP2690 behave as the stock bridges would. The compatible strings include the
+suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with
+the firmware specific for the GE B850v3.
+
+The hardware do not provide control over the video processing pipeline, as the
+two bridges behaves as a single one. The only interfaces exposed by the
+hardware are EDID, HPD, and interrupts.
+
+stdp4028-ge-b850v3-fw required properties:
+  - compatible : "megachips,stdp4028-ge-b850v3-fw"
+  - reg : I2C bus address
+  - interrupt-parent : phandle of the interrupt controller that services
+interrupts to the device
+  - interrupts : one interrupt should be described here, as in
+<0 IRQ_TYPE_LEVEL_HIGH>
+  - ports : One input port(reg = <0>) and one output port(reg = <1>)
+
+stdp2690-ge-b850v3-fw required properties:
+compatible : "megachips,stdp2690-ge-b850v3-fw"
+  - reg : I2C bus address
+  - ports : One input port(reg = <0>) and one output port(reg = <1>)
+
+Example:
+
+_i2c2 {
+   status = "okay";
+   clock-frequency = <10>;
+
+   stdp4028@73 {
+   compatible = "megachips,stdp4028-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x73>;
+
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp4028_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   stdp4028_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
+
+   stdp2690@72 {
+   compatible = "megachips,stdp2690-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x72>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp2690_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   stdp2690_out: endpoint {
+   /* Connector for external display */
+  

[PATCH V3 3/4] drm/bridge: Drivers for megachips-stdpxxxx-ge-b850v3-fw (LVDS-DP++)

[Peter Senna Tschudin]

The video processing pipeline on the second output on the GE B850v3:

  Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output

Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the STDP2690 behave as the stock bridges would. The compatible
strings include the suffix "-ge-b850v3-fw" to make it clear that the
driver is for the bridges with the firmware which is specific for the GE
B850v3.

The driver is powerless to control the video processing pipeline, as the
two bridges behaves as a single one. The driver is only needed for
telling the host about EDID / HPD, and for giving the host powers to ack
interrupts.

This driver adds one i2c_device for each bridge, but only one
drm_bridge. This design allows the creation of a functional connector
that is capable of reading EDID from the STDP2690 while handling
interrupts on the STDP4028.

Cc: Laurent Pinchart 
Cc: Martyn Welch 
Cc: Martin Donnelly 
Cc: Daniel Vetter 
Cc: Enric Balletbo i Serra 
Cc: Philipp Zabel 
Cc: Rob Herring 
Cc: Fabio Estevam 
Cc: David Airlie 
Cc: Thierry Reding 
Cc: Thierry Reding 
Cc: Archit Taneja 
Cc: Enric Balletbo 
Signed-off-by: Peter Senna Tschudin 
---
Changes from V2:
 - Fix the code to allow it be compiled as a module

Changes from V1:
 - Updated copyright year
 - Fixed blank line issues
 - Updated ge_b850v3_lvds_remove() to not rely on ge_b850v3_lvds_ptr->edid and
   added a comment to explain the test.
 - Fixed checkpatch strict warnings about continuation lines. In one case
   fixing the warning would cause the continuation line to be over 80 chars and
   that strict warning remains.

 drivers/gpu/drm/bridge/Kconfig |  11 +
 drivers/gpu/drm/bridge/Makefile|   1 +
 .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 428 +
 3 files changed, 440 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index eb8688e..4a937f1 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -48,6 +48,17 @@ config DRM_DW_HDMI_I2S_AUDIO
  Support the I2S Audio interface which is part of the Synopsis
  Designware HDMI block.
 
+config DRM_MEGACHIPS_STDP_GE_B850V3_FW
+   tristate "MegaChips stdp4028-ge-b850v3-fw and stdp2690-ge-b850v3-fw"
+   depends on OF
+   select DRM_KMS_HELPER
+   select DRM_PANEL
+   ---help---
+  This is a driver for the display bridges of
+  GE B850v3 that convert dual channel LVDS
+  to DP++. This is used with the i.MX6 imx-ldb
+  driver. You are likely to say N here.
+
 config DRM_NXP_PTN3460
tristate "NXP PTN3460 DP/LVDS bridge"
depends on OF
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 2e83a785..af0b7cc 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
 obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
 obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
+obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
megachips-stdp-ge-b850v3-fw.o
 obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
 obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
 obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
diff --git a/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c 
b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
new file mode 100644
index 000..e53c243
--- /dev/null
+++ b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
@@ -0,0 +1,428 @@
+/*
+ * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
+ * Driver for MegaChips STDP2690 with GE B850v3 firmware (DP-DP++)
+
+ * Copyright (c) 2017, Collabora Ltd.
+ * Copyright (c) 2017, General Electric Company
+
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+ * This driver creates a drm_bridge and a drm_connector for the LVDS to DP++
+ * display bridge of the GE B850v3. There are two physical bridges on the video
+ * signal pipeline: a STDP4028(LVDS to DP) and a STDP2690(DP to DP++). The
+ * physical bridges are automatically configured by the input video signal, and
+ * 

Re: [PATCH V2 3/4] drm/bridge: Drivers for megachips-stdpxxxx-ge-b850v3-fw (LVDS-DP++)

[Peter Senna Tschudin]

On Wed, Mar 01, 2017 at 09:38:48AM +0530, Archit Taneja wrote:
[...]
> > +static const struct i2c_device_id stdp2690_ge_b850v3_fw_i2c_table[] = {
> > +   {"stdp2690_ge_fw", 0},
> > +   {},
> > +};
> > +MODULE_DEVICE_TABLE(i2c, stdp2690_ge_b850v3_fw_i2c_table);
> > +
> > +static const struct of_device_id stdp2690_ge_b850v3_fw_match[] = {
> > +   { .compatible = "megachips,stdp2690-ge-b850v3-fw" },
> > +   {},
> > +};
> > +MODULE_DEVICE_TABLE(of, stdp2690_ge_b850v3_fw_match);
> > +
> > +static struct i2c_driver stdp2690_ge_b850v3_fw_driver = {
> > +   .id_table   = stdp2690_ge_b850v3_fw_i2c_table,
> > +   .probe  = stdp2690_ge_b850v3_fw_probe,
> > +   .remove = stdp2690_ge_b850v3_fw_remove,
> > +   .driver = {
> > +   .name   = "stdp2690-ge-b850v3-fw",
> > +   .of_match_table = stdp2690_ge_b850v3_fw_match,
> > +   },
> > +};
> > +module_i2c_driver(stdp2690_ge_b850v3_fw_driver);
> 
> Didn't catch this in the last series, but there can only be one
> module_init call per module. This breaks compilation when the
> driver is built as a module.
> 
> You could do something like:
> 
> static int __init stdp_ge_b850v3_init(void)
> {
>   int ret;
> 
>   ret = i2c_add_driver(_ge_b850v3_fw_driver);
>   if (ret)
>   return ret;
> 
>   return i2c_add_driver(_ge_b850v3_fw_driver);
> }
> module_init(stdp_ge_b850v3_init);
> 
> static void __exit stdp_ge_b850v3_exit(void)
> {
>   i2c_del_driver(_ge_b850v3_fw_driver);
>   i2c_del_driver(_ge_b850v3_fw_driver);
> }
> module_exit(stdp_ge_b850v3_exit);
> 
> Thanks,
> Archit

This has the init and exit functions merged and no need for the mutex
anymore. Compiled and run as a module and works fine. What do you think?

commit 15f8bf1b50d69454adeb32b5ff86c953124279fd
Author: Peter Senna Tschudin <peter.se...@collabora.com>
Date:   Wed May 25 00:59:17 2016 +0200

drm/bridge: Drivers for megachips-stdp-ge-b850v3-fw (LVDS-DP++)

The video processing pipeline on the second output on the GE B850v3:

  Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output

Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the STDP2690 behave as the stock bridges would. The compatible
strings include the suffix "-ge-b850v3-fw" to make it clear that the
driver is for the bridges with the firmware which is specific for the GE
B850v3.

The driver is powerless to control the video processing pipeline, as the
two bridges behaves as a single one. The driver is only needed for
telling the host about EDID / HPD, and for giving the host powers to ack
interrupts.

This driver adds one i2c_device for each bridge, but only one
drm_bridge. This design allows the creation of a functional connector
that is capable of reading EDID from the STDP2690 while handling
interrupts on the STDP4028.

Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Cc: Martyn Welch <martyn.we...@collabora.co.uk>
Cc: Martin Donnelly <martin.donne...@ge.com>
Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
Cc: Philipp Zabel <p.za...@pengutronix.de>
Cc: Rob Herring <r...@kernel.org>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Cc: David Airlie <airl...@linux.ie>
Cc: Thierry Reding <tred...@nvidia.com>
Cc: Thierry Reding <thierry.red...@gmail.com>
Cc: Archit Taneja <arch...@codeaurora.org>
Cc: Enric Balletbo <enric.balle...@collabora.com>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index eb8688e..4a937f1 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -48,6 +48,17 @@ config DRM_DW_HDMI_I2S_AUDIO
  Support the I2S Audio interface which is part of the Synopsis
  Designware HDMI block.
 
+config DRM_MEGACHIPS_STDP_GE_B850V3_FW
+   tristate "MegaChips stdp4028-ge-b850v3-fw and stdp2690-ge-b850v3-fw"
+   depends on OF
+   select DRM_KMS_HELPER
+   select DRM_PANEL
+   ---help---
+  This is a driver for the display bridges of
+  GE B850v3 that convert dual channel LVDS
+  to DP++. This is used with the i.MX6 imx-ldb
+  driver. You are likely to say N here.
+
 config DRM_NXP_PTN3460
tristate "NXP PTN3460 DP/LVDS bridge"
depends on OF
diff --git a/drive

Re: [PATCH V2 3/4] drm/bridge: Drivers for megachips-stdpxxxx-ge-b850v3-fw (LVDS-DP++)

[Peter Senna Tschudin]

On Wed, Mar 01, 2017 at 09:38:48AM +0530, Archit Taneja wrote:
[...]
> > +static const struct i2c_device_id stdp2690_ge_b850v3_fw_i2c_table[] = {
> > +   {"stdp2690_ge_fw", 0},
> > +   {},
> > +};
> > +MODULE_DEVICE_TABLE(i2c, stdp2690_ge_b850v3_fw_i2c_table);
> > +
> > +static const struct of_device_id stdp2690_ge_b850v3_fw_match[] = {
> > +   { .compatible = "megachips,stdp2690-ge-b850v3-fw" },
> > +   {},
> > +};
> > +MODULE_DEVICE_TABLE(of, stdp2690_ge_b850v3_fw_match);
> > +
> > +static struct i2c_driver stdp2690_ge_b850v3_fw_driver = {
> > +   .id_table   = stdp2690_ge_b850v3_fw_i2c_table,
> > +   .probe  = stdp2690_ge_b850v3_fw_probe,
> > +   .remove = stdp2690_ge_b850v3_fw_remove,
> > +   .driver = {
> > +   .name   = "stdp2690-ge-b850v3-fw",
> > +   .of_match_table = stdp2690_ge_b850v3_fw_match,
> > +   },
> > +};
> > +module_i2c_driver(stdp2690_ge_b850v3_fw_driver);
> 
> Didn't catch this in the last series, but there can only be one
> module_init call per module. This breaks compilation when the
> driver is built as a module.
> 
> You could do something like:
> 
> static int __init stdp_ge_b850v3_init(void)
> {
>   int ret;
> 
>   ret = i2c_add_driver(_ge_b850v3_fw_driver);
>   if (ret)
>   return ret;
> 
>   return i2c_add_driver(_ge_b850v3_fw_driver);
> }
> module_init(stdp_ge_b850v3_init);
> 
> static void __exit stdp_ge_b850v3_exit(void)
> {
>   i2c_del_driver(_ge_b850v3_fw_driver);
>   i2c_del_driver(_ge_b850v3_fw_driver);
> }
> module_exit(stdp_ge_b850v3_exit);
> 
> Thanks,
> Archit

This has the init and exit functions merged and no need for the mutex
anymore. Compiled and run as a module and works fine. What do you think?

commit 15f8bf1b50d69454adeb32b5ff86c953124279fd
Author: Peter Senna Tschudin 
Date:   Wed May 25 00:59:17 2016 +0200

drm/bridge: Drivers for megachips-stdp-ge-b850v3-fw (LVDS-DP++)

The video processing pipeline on the second output on the GE B850v3:

  Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output

Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the STDP2690 behave as the stock bridges would. The compatible
strings include the suffix "-ge-b850v3-fw" to make it clear that the
driver is for the bridges with the firmware which is specific for the GE
B850v3.

The driver is powerless to control the video processing pipeline, as the
two bridges behaves as a single one. The driver is only needed for
telling the host about EDID / HPD, and for giving the host powers to ack
interrupts.

This driver adds one i2c_device for each bridge, but only one
drm_bridge. This design allows the creation of a functional connector
that is capable of reading EDID from the STDP2690 while handling
interrupts on the STDP4028.

Cc: Laurent Pinchart 
Cc: Martyn Welch 
Cc: Martin Donnelly 
Cc: Daniel Vetter 
Cc: Enric Balletbo i Serra 
Cc: Philipp Zabel 
Cc: Rob Herring 
Cc: Fabio Estevam 
Cc: David Airlie 
Cc: Thierry Reding 
Cc: Thierry Reding 
Cc: Archit Taneja 
Cc: Enric Balletbo 
Signed-off-by: Peter Senna Tschudin 

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index eb8688e..4a937f1 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -48,6 +48,17 @@ config DRM_DW_HDMI_I2S_AUDIO
  Support the I2S Audio interface which is part of the Synopsis
  Designware HDMI block.
 
+config DRM_MEGACHIPS_STDP_GE_B850V3_FW
+   tristate "MegaChips stdp4028-ge-b850v3-fw and stdp2690-ge-b850v3-fw"
+   depends on OF
+   select DRM_KMS_HELPER
+   select DRM_PANEL
+   ---help---
+  This is a driver for the display bridges of
+  GE B850v3 that convert dual channel LVDS
+  to DP++. This is used with the i.MX6 imx-ldb
+  driver. You are likely to say N here.
+
 config DRM_NXP_PTN3460
tristate "NXP PTN3460 DP/LVDS bridge"
depends on OF
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 2e83a785..af0b7cc 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
 obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
 obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
+obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
megachips-stdp-ge

Re: [PATCH V2 3/4] drm/bridge: Drivers for megachips-stdpxxxx-ge-b850v3-fw (LVDS-DP++)

[Peter Senna Tschudin]

Hi Archit,

Thank you for the review!

On Wed, Mar 01, 2017 at 09:38:48AM +0530, Archit Taneja wrote:
> 
> 
> On 02/28/2017 07:58 PM, Peter Senna Tschudin wrote:
> > The video processing pipeline on the second output on the GE B850v3:
> > 
> >   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
> > 
> > Each bridge has a dedicated flash containing firmware for supporting the
> > custom design. The result is that in this design neither the STDP4028
> > nor the STDP2690 behave as the stock bridges would. The compatible
> > strings include the suffix "-ge-b850v3-fw" to make it clear that the
> > driver is for the bridges with the firmware which is specific for the GE
> > B850v3.
> > 
> > The driver is powerless to control the video processing pipeline, as the
> > two bridges behaves as a single one. The driver is only needed for
> > telling the host about EDID / HPD, and for giving the host powers to ack
> > interrupts.
> > 
> > This driver adds one i2c_device for each bridge, but only one
> > drm_bridge. This design allows the creation of a functional connector
> > that is capable of reading EDID from the STDP2690 while handling
> > interrupts on the STDP4028.
> > 
> > Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
> > Cc: Martyn Welch <martyn.we...@collabora.co.uk>
> > Cc: Martin Donnelly <martin.donne...@ge.com>
> > Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
> > Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
> > Cc: Philipp Zabel <p.za...@pengutronix.de>
> > Cc: Rob Herring <r...@kernel.org>
> > Cc: Fabio Estevam <fabio.este...@nxp.com>
> > Cc: David Airlie <airl...@linux.ie>
> > Cc: Thierry Reding <tred...@nvidia.com>
> > Cc: Thierry Reding <thierry.red...@gmail.com>
> > Cc: Archit Taneja <arch...@codeaurora.org>
> > Cc: Enric Balletbo <enric.balle...@collabora.com>
> > Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
> > ---
> > Changes from V1:
> >  - Updated copyright year
> >  - Fixed blank line issues
> >  - Updated ge_b850v3_lvds_remove() to not rely on ge_b850v3_lvds_ptr->edid 
> > and
> >added a comment to explain the test.
> >  - Fixed checkpatch strict warnings about continuation lines. In one case
> >fixing the warning would cause the continuation line to be over 80 chars 
> > and
> >that strict warning remains.
> > 
> >  drivers/gpu/drm/bridge/Kconfig |  11 +
> >  drivers/gpu/drm/bridge/Makefile|   1 +
> >  .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 411 
> > +
> >  3 files changed, 423 insertions(+)
> >  create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
> > 
> > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > index eb8688e..4a937f1 100644
> > --- a/drivers/gpu/drm/bridge/Kconfig
> > +++ b/drivers/gpu/drm/bridge/Kconfig
> > @@ -48,6 +48,17 @@ config DRM_DW_HDMI_I2S_AUDIO
> >   Support the I2S Audio interface which is part of the Synopsis
> >   Designware HDMI block.
> > 
> > +config DRM_MEGACHIPS_STDP_GE_B850V3_FW
> > +   tristate "MegaChips stdp4028-ge-b850v3-fw and stdp2690-ge-b850v3-fw"
> > +   depends on OF
> > +   select DRM_KMS_HELPER
> > +   select DRM_PANEL
> > +   ---help---
> > +  This is a driver for the display bridges of
> > +  GE B850v3 that convert dual channel LVDS
> > +  to DP++. This is used with the i.MX6 imx-ldb
> > +  driver. You are likely to say N here.
> > +
> >  config DRM_NXP_PTN3460
> > tristate "NXP PTN3460 DP/LVDS bridge"
> > depends on OF
> > diff --git a/drivers/gpu/drm/bridge/Makefile 
> > b/drivers/gpu/drm/bridge/Makefile
> > index 2e83a785..af0b7cc 100644
> > --- a/drivers/gpu/drm/bridge/Makefile
> > +++ b/drivers/gpu/drm/bridge/Makefile
> > @@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> >  obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
> >  obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
> >  obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
> > +obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
> > megachips-stdp-ge-b850v3-fw.o
> >  obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
> >  obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
> >  obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
> > diff --gi

Re: [PATCH V2 3/4] drm/bridge: Drivers for megachips-stdpxxxx-ge-b850v3-fw (LVDS-DP++)

[Peter Senna Tschudin]

Hi Archit,

Thank you for the review!

On Wed, Mar 01, 2017 at 09:38:48AM +0530, Archit Taneja wrote:
> 
> 
> On 02/28/2017 07:58 PM, Peter Senna Tschudin wrote:
> > The video processing pipeline on the second output on the GE B850v3:
> > 
> >   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
> > 
> > Each bridge has a dedicated flash containing firmware for supporting the
> > custom design. The result is that in this design neither the STDP4028
> > nor the STDP2690 behave as the stock bridges would. The compatible
> > strings include the suffix "-ge-b850v3-fw" to make it clear that the
> > driver is for the bridges with the firmware which is specific for the GE
> > B850v3.
> > 
> > The driver is powerless to control the video processing pipeline, as the
> > two bridges behaves as a single one. The driver is only needed for
> > telling the host about EDID / HPD, and for giving the host powers to ack
> > interrupts.
> > 
> > This driver adds one i2c_device for each bridge, but only one
> > drm_bridge. This design allows the creation of a functional connector
> > that is capable of reading EDID from the STDP2690 while handling
> > interrupts on the STDP4028.
> > 
> > Cc: Laurent Pinchart 
> > Cc: Martyn Welch 
> > Cc: Martin Donnelly 
> > Cc: Daniel Vetter 
> > Cc: Enric Balletbo i Serra 
> > Cc: Philipp Zabel 
> > Cc: Rob Herring 
> > Cc: Fabio Estevam 
> > Cc: David Airlie 
> > Cc: Thierry Reding 
> > Cc: Thierry Reding 
> > Cc: Archit Taneja 
> > Cc: Enric Balletbo 
> > Signed-off-by: Peter Senna Tschudin 
> > ---
> > Changes from V1:
> >  - Updated copyright year
> >  - Fixed blank line issues
> >  - Updated ge_b850v3_lvds_remove() to not rely on ge_b850v3_lvds_ptr->edid 
> > and
> >added a comment to explain the test.
> >  - Fixed checkpatch strict warnings about continuation lines. In one case
> >fixing the warning would cause the continuation line to be over 80 chars 
> > and
> >that strict warning remains.
> > 
> >  drivers/gpu/drm/bridge/Kconfig |  11 +
> >  drivers/gpu/drm/bridge/Makefile|   1 +
> >  .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 411 
> > +
> >  3 files changed, 423 insertions(+)
> >  create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
> > 
> > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > index eb8688e..4a937f1 100644
> > --- a/drivers/gpu/drm/bridge/Kconfig
> > +++ b/drivers/gpu/drm/bridge/Kconfig
> > @@ -48,6 +48,17 @@ config DRM_DW_HDMI_I2S_AUDIO
> >   Support the I2S Audio interface which is part of the Synopsis
> >   Designware HDMI block.
> > 
> > +config DRM_MEGACHIPS_STDP_GE_B850V3_FW
> > +   tristate "MegaChips stdp4028-ge-b850v3-fw and stdp2690-ge-b850v3-fw"
> > +   depends on OF
> > +   select DRM_KMS_HELPER
> > +   select DRM_PANEL
> > +   ---help---
> > +  This is a driver for the display bridges of
> > +  GE B850v3 that convert dual channel LVDS
> > +  to DP++. This is used with the i.MX6 imx-ldb
> > +  driver. You are likely to say N here.
> > +
> >  config DRM_NXP_PTN3460
> > tristate "NXP PTN3460 DP/LVDS bridge"
> > depends on OF
> > diff --git a/drivers/gpu/drm/bridge/Makefile 
> > b/drivers/gpu/drm/bridge/Makefile
> > index 2e83a785..af0b7cc 100644
> > --- a/drivers/gpu/drm/bridge/Makefile
> > +++ b/drivers/gpu/drm/bridge/Makefile
> > @@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> >  obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
> >  obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
> >  obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
> > +obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
> > megachips-stdp-ge-b850v3-fw.o
> >  obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
> >  obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
> >  obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
> > diff --git a/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c 
> > b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
> > new file mode 100644
> > index 000..6f82a44
> > --- /dev/null
> > +++ b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
> > @@ -0,0 +1,411 @@
> > +/*
> > + * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
> > + * Driver for

[PATCH V2 2/4] MAINTAINERS: Add entry for megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

Add MAINTAINERS entry for the second video output of the GE B850v3:
   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
   STDP2690-ge-b850v3-fw bridges (DP-DP++)

Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Cc: Martyn Welch <martyn.we...@collabora.co.uk>
Cc: Martin Donnelly <martin.donne...@ge.com>
Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
Cc: Philipp Zabel <p.za...@pengutronix.de>
Cc: Rob Herring <r...@kernel.org>
Cc: Fabio Estevam <fabio.este...@nxp.com>
CC: David Airlie <airl...@linux.ie>
CC: Thierry Reding <tred...@nvidia.com>
CC: Thierry Reding <thierry.red...@gmail.com>
CC: Archit Taneja <arch...@codeaurora.org>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---
Unchanged from V1

 MAINTAINERS | 8 
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 8d97b1d..5f30b17 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8129,6 +8129,14 @@ L:   linux-wirel...@vger.kernel.org
 S: Maintained
 F: drivers/net/wireless/mediatek/mt7601u/
 
+MEGACHIPS STDP-GE-B850V3-FW LVDS/DP++ BRIDGES
+M: Peter Senna Tschudin <peter.se...@collabora.com>
+M: Martin Donnelly <martin.donne...@ge.com>
+M: Martyn Welch <martyn.we...@collabora.co.uk>
+S: Maintained
+F: drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
+F: 
Documentation/devicetree/bindings/video/bridge/megachips-stdp-ge-b850v3-fw.txt
+
 MEGARAID SCSI/SAS DRIVERS
 M: Kashyap Desai <kashyap.de...@broadcom.com>
 M: Sumit Saxena <sumit.sax...@broadcom.com>
-- 
2.9.3

[PATCH V2 2/4] MAINTAINERS: Add entry for megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

Add MAINTAINERS entry for the second video output of the GE B850v3:
   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
   STDP2690-ge-b850v3-fw bridges (DP-DP++)

Cc: Laurent Pinchart 
Cc: Martyn Welch 
Cc: Martin Donnelly 
Cc: Daniel Vetter 
Cc: Enric Balletbo i Serra 
Cc: Philipp Zabel 
Cc: Rob Herring 
Cc: Fabio Estevam 
CC: David Airlie 
CC: Thierry Reding 
CC: Thierry Reding 
CC: Archit Taneja 
Signed-off-by: Peter Senna Tschudin 
---
Unchanged from V1

 MAINTAINERS | 8 
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 8d97b1d..5f30b17 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8129,6 +8129,14 @@ L:   linux-wirel...@vger.kernel.org
 S: Maintained
 F: drivers/net/wireless/mediatek/mt7601u/
 
+MEGACHIPS STDP-GE-B850V3-FW LVDS/DP++ BRIDGES
+M: Peter Senna Tschudin 
+M: Martin Donnelly 
+M: Martyn Welch 
+S: Maintained
+F: drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
+F: 
Documentation/devicetree/bindings/video/bridge/megachips-stdp-ge-b850v3-fw.txt
+
 MEGARAID SCSI/SAS DRIVERS
 M: Kashyap Desai 
 M: Sumit Saxena 
-- 
2.9.3

[PATCH V2 3/4] drm/bridge: Drivers for megachips-stdpxxxx-ge-b850v3-fw (LVDS-DP++)

[Peter Senna Tschudin]

The video processing pipeline on the second output on the GE B850v3:

  Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output

Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the STDP2690 behave as the stock bridges would. The compatible
strings include the suffix "-ge-b850v3-fw" to make it clear that the
driver is for the bridges with the firmware which is specific for the GE
B850v3.

The driver is powerless to control the video processing pipeline, as the
two bridges behaves as a single one. The driver is only needed for
telling the host about EDID / HPD, and for giving the host powers to ack
interrupts.

This driver adds one i2c_device for each bridge, but only one
drm_bridge. This design allows the creation of a functional connector
that is capable of reading EDID from the STDP2690 while handling
interrupts on the STDP4028.

Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Cc: Martyn Welch <martyn.we...@collabora.co.uk>
Cc: Martin Donnelly <martin.donne...@ge.com>
Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
Cc: Philipp Zabel <p.za...@pengutronix.de>
Cc: Rob Herring <r...@kernel.org>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Cc: David Airlie <airl...@linux.ie>
Cc: Thierry Reding <tred...@nvidia.com>
Cc: Thierry Reding <thierry.red...@gmail.com>
Cc: Archit Taneja <arch...@codeaurora.org>
Cc: Enric Balletbo <enric.balle...@collabora.com>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---
Changes from V1:
 - Updated copyright year
 - Fixed blank line issues
 - Updated ge_b850v3_lvds_remove() to not rely on ge_b850v3_lvds_ptr->edid and
   added a comment to explain the test.
 - Fixed checkpatch strict warnings about continuation lines. In one case
   fixing the warning would cause the continuation line to be over 80 chars and
   that strict warning remains.

 drivers/gpu/drm/bridge/Kconfig |  11 +
 drivers/gpu/drm/bridge/Makefile|   1 +
 .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 411 +
 3 files changed, 423 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index eb8688e..4a937f1 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -48,6 +48,17 @@ config DRM_DW_HDMI_I2S_AUDIO
  Support the I2S Audio interface which is part of the Synopsis
  Designware HDMI block.
 
+config DRM_MEGACHIPS_STDP_GE_B850V3_FW
+   tristate "MegaChips stdp4028-ge-b850v3-fw and stdp2690-ge-b850v3-fw"
+   depends on OF
+   select DRM_KMS_HELPER
+   select DRM_PANEL
+   ---help---
+  This is a driver for the display bridges of
+  GE B850v3 that convert dual channel LVDS
+  to DP++. This is used with the i.MX6 imx-ldb
+  driver. You are likely to say N here.
+
 config DRM_NXP_PTN3460
tristate "NXP PTN3460 DP/LVDS bridge"
depends on OF
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 2e83a785..af0b7cc 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
 obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
 obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
+obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
megachips-stdp-ge-b850v3-fw.o
 obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
 obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
 obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
diff --git a/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c 
b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
new file mode 100644
index 000..6f82a44
--- /dev/null
+++ b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
@@ -0,0 +1,411 @@
+/*
+ * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
+ * Driver for MegaChips STDP2690 with GE B850v3 firmware (DP-DP++)
+
+ * Copyright (c) 2017, Collabora Ltd.
+ * Copyright (c) 2017, General Electric Company
+
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this progr

[PATCH V2 3/4] drm/bridge: Drivers for megachips-stdpxxxx-ge-b850v3-fw (LVDS-DP++)

[Peter Senna Tschudin]

The video processing pipeline on the second output on the GE B850v3:

  Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output

Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the STDP2690 behave as the stock bridges would. The compatible
strings include the suffix "-ge-b850v3-fw" to make it clear that the
driver is for the bridges with the firmware which is specific for the GE
B850v3.

The driver is powerless to control the video processing pipeline, as the
two bridges behaves as a single one. The driver is only needed for
telling the host about EDID / HPD, and for giving the host powers to ack
interrupts.

This driver adds one i2c_device for each bridge, but only one
drm_bridge. This design allows the creation of a functional connector
that is capable of reading EDID from the STDP2690 while handling
interrupts on the STDP4028.

Cc: Laurent Pinchart 
Cc: Martyn Welch 
Cc: Martin Donnelly 
Cc: Daniel Vetter 
Cc: Enric Balletbo i Serra 
Cc: Philipp Zabel 
Cc: Rob Herring 
Cc: Fabio Estevam 
Cc: David Airlie 
Cc: Thierry Reding 
Cc: Thierry Reding 
Cc: Archit Taneja 
Cc: Enric Balletbo 
Signed-off-by: Peter Senna Tschudin 
---
Changes from V1:
 - Updated copyright year
 - Fixed blank line issues
 - Updated ge_b850v3_lvds_remove() to not rely on ge_b850v3_lvds_ptr->edid and
   added a comment to explain the test.
 - Fixed checkpatch strict warnings about continuation lines. In one case
   fixing the warning would cause the continuation line to be over 80 chars and
   that strict warning remains.

 drivers/gpu/drm/bridge/Kconfig |  11 +
 drivers/gpu/drm/bridge/Makefile|   1 +
 .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 411 +
 3 files changed, 423 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index eb8688e..4a937f1 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -48,6 +48,17 @@ config DRM_DW_HDMI_I2S_AUDIO
  Support the I2S Audio interface which is part of the Synopsis
  Designware HDMI block.
 
+config DRM_MEGACHIPS_STDP_GE_B850V3_FW
+   tristate "MegaChips stdp4028-ge-b850v3-fw and stdp2690-ge-b850v3-fw"
+   depends on OF
+   select DRM_KMS_HELPER
+   select DRM_PANEL
+   ---help---
+  This is a driver for the display bridges of
+  GE B850v3 that convert dual channel LVDS
+  to DP++. This is used with the i.MX6 imx-ldb
+  driver. You are likely to say N here.
+
 config DRM_NXP_PTN3460
tristate "NXP PTN3460 DP/LVDS bridge"
depends on OF
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 2e83a785..af0b7cc 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
 obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
 obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
+obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
megachips-stdp-ge-b850v3-fw.o
 obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
 obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
 obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
diff --git a/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c 
b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
new file mode 100644
index 000..6f82a44
--- /dev/null
+++ b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
@@ -0,0 +1,411 @@
+/*
+ * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
+ * Driver for MegaChips STDP2690 with GE B850v3 firmware (DP-DP++)
+
+ * Copyright (c) 2017, Collabora Ltd.
+ * Copyright (c) 2017, General Electric Company
+
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+ * This driver creates a drm_bridge and a drm_connector for the LVDS to DP++
+ * display bridge of the GE B850v3. There are two physical bridges on the video
+ * signal pipeline: a STDP4028(LVDS to DP) and a STDP2690(DP to DP++). The
+ * physical bridges are automatically configured by the input video signal, and
+ * the driver has no access to the video processing pipeline.

[PATCH V2 4/4] dts/imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)

[Peter Senna Tschudin]

Configures the megachips-stdp-ge-b850v3-fw bridges on the GE
B850v3 dts file.

Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Cc: Martyn Welch <martyn.we...@collabora.co.uk>
Cc: Martin Donnelly <martin.donne...@ge.com>
Cc: Javier Martinez Canillas <jav...@dowhile0.org>
Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
Cc: Philipp Zabel <p.za...@pengutronix.de>
Cc: Rob Herring <r...@kernel.org>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---
Unchanged from V1.

 arch/arm/boot/dts/imx6q-b850v3.dts | 68 ++
 1 file changed, 68 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
b/arch/arm/boot/dts/imx6q-b850v3.dts
index b237429..3ec54da 100644
--- a/arch/arm/boot/dts/imx6q-b850v3.dts
+++ b/arch/arm/boot/dts/imx6q-b850v3.dts
@@ -72,6 +72,13 @@
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
+
+   port@4 {
+   reg = <4>;
+   lvds0_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
};
 };
 
@@ -146,3 +153,64 @@
  {
status = "disabled";
 };
+
+_i2c2 {
+   status = "okay";
+   clock-frequency = <10>;
+
+   stdp4028@73 {
+   compatible = "megachips,stdp4028-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x73>;
+
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp4028_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   stdp4028_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
+
+   stdp2690@72 {
+   compatible = "megachips,stdp2690-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x72>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp2690_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   stdp2690_out: endpoint {
+   /* Connector for external display */
+   };
+   };
+   };
+   };
+};
-- 
2.9.3

[PATCH V2 4/4] dts/imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)

[Peter Senna Tschudin]

Configures the megachips-stdp-ge-b850v3-fw bridges on the GE
B850v3 dts file.

Cc: Laurent Pinchart 
Cc: Martyn Welch 
Cc: Martin Donnelly 
Cc: Javier Martinez Canillas 
Cc: Enric Balletbo i Serra 
Cc: Philipp Zabel 
Cc: Rob Herring 
Cc: Fabio Estevam 
Signed-off-by: Peter Senna Tschudin 
---
Unchanged from V1.

 arch/arm/boot/dts/imx6q-b850v3.dts | 68 ++
 1 file changed, 68 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts 
b/arch/arm/boot/dts/imx6q-b850v3.dts
index b237429..3ec54da 100644
--- a/arch/arm/boot/dts/imx6q-b850v3.dts
+++ b/arch/arm/boot/dts/imx6q-b850v3.dts
@@ -72,6 +72,13 @@
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
+
+   port@4 {
+   reg = <4>;
+   lvds0_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
};
 };
 
@@ -146,3 +153,64 @@
  {
status = "disabled";
 };
+
+_i2c2 {
+   status = "okay";
+   clock-frequency = <10>;
+
+   stdp4028@73 {
+   compatible = "megachips,stdp4028-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x73>;
+
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp4028_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   stdp4028_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
+
+   stdp2690@72 {
+   compatible = "megachips,stdp2690-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x72>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp2690_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   stdp2690_out: endpoint {
+   /* Connector for external display */
+   };
+   };
+   };
+   };
+};
-- 
2.9.3

[PATCH V2 0/4] megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

The video processing pipeline on the second output on the GE B850v3:

  Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output

Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the STDP2690 behave as the stock bridges would. The compatible
strings include the suffix "-ge-b850v3-fw" to make it clear that the
driver is for the bridges with the firmware which is specific for the GE
B850v3.

The driver is powerless to control the video processing pipeline, as the
two bridges behaves as a single one. The driver is only needed for
telling the host about EDID / HPD, and for giving the host powers to ack
interrupts.

Changes from V1:
 - Fix bindings documentation
 - Fix white space issues on the driver
 - Improved ge_b850v3_lvds_remove() to not rely on ge_b850v3_lvds_ptr->edid

Changes from V7(was GE B850v3 LVDS/DP++ Bridge):
 - New devicetree binding with one node per bridge, and two ports per bridge
 - Two i2c_devices, one per bridge
 - Removed uneeded mutexes
 - Moved documentation to bindings/display/bridge
 - Included test for EDID extension blocks
 - Renamed bridge pointer to ge_b850v3_lvds_ptr
 - Removed the call to drm_helper_hpd_irq_event()
 - Removed assignments to bridge.driver_private

Changes from V6:
 - Removed check for pixel clock as the bridge supports up to 330Mhz while the
   host is limited to 264 MHz in very specific conditions.
 - Added a second mutex to avoid concurrency issues while acking interrupts
   from threaded interrupt handlers.
 - Renamed the edid mutex to be more descriptive.
 - Added a .detach() function that disables the interrupts.
 - Adopted i2c_new_secondary_device() and updated the dts and documentation to
   match the new method.
 - Removed useless test to drm_bridge_add()
 - Did some refactoring around devm_request_threaded_irq()
 - Added a missing call to i2c_unregister_device() on the i2c_driver.remove()
   function.

Changes from V5:
 - Change to MAINTAINERS in a separate patch
 - Reworked interrupt handler initialization
 - Removed useless calls to: drm_connector_register(),
   drm_helper_hpd_irq_event(), and drm_bridge_enable()

Changes from V4:
 - Renamed the i2c_driver.name from "ge,b850v3-lvds-dp" to "b850v3-lvds-dp" to
   remove the comma from the driver name

Changes from V3:
 - Removed the patch that was configuring the mapping between IPUs and external
   displays on the dts file

Peter Senna Tschudin (4):
  dt-bindings: display: megachips-stdp-ge-b850v3-fw
  MAINTAINERS: Add entry for megachips-stdp-ge-b850v3-fw
  drm/bridge: Drivers for megachips-stdp-ge-b850v3-fw (LVDS-DP++)
  dts/imx6q-b850v3: Use megachips-stdp-ge-b850v3-fw bridges
(LVDS-DP++)

 .../bridge/megachips-stdp-ge-b850v3-fw.txt |  94 +
 .../devicetree/bindings/vendor-prefixes.txt|   1 +
 MAINTAINERS|   8 +
 arch/arm/boot/dts/imx6q-b850v3.dts |  68 
 drivers/gpu/drm/bridge/Kconfig |  11 +
 drivers/gpu/drm/bridge/Makefile|   1 +
 .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 411 +
 7 files changed, 594 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
 create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c

-- 
2.9.3

[PATCH V2 1/4] dt-bindings: display: megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

Devicetree binding documentation for the second video output
of the GE B850v3:
   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
   STDP2690-ge-b850v3-fw bridges (DP-DP++)

Added entry for MegaChips at:
 Documentation/devicetree/bindings/vendor-prefixes.txt

Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Cc: Martyn Welch <martyn.we...@collabora.co.uk>
Cc: Martin Donnelly <martin.donne...@ge.com>
Cc: Javier Martinez Canillas <jav...@dowhile0.org>
Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
Cc: Philipp Zabel <p.za...@pengutronix.de>
Cc: Rob Herring <r...@kernel.org>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
---
Changes from V1:
 - New subject
 - Moved binding documentation from bindings/video/ to bindings/display/bridge/
 - Reworded to describe hardware instead of the driver
 - Reformated the bindings to have one set of required properties per device
 - Updated reg description
 - Defined number of ports and what they are for

 .../bridge/megachips-stdp-ge-b850v3-fw.txt | 94 ++
 .../devicetree/bindings/vendor-prefixes.txt|  1 +
 2 files changed, 95 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt

diff --git 
a/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
 
b/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
new file mode 100644
index 000..7baa658
--- /dev/null
+++ 
b/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
@@ -0,0 +1,94 @@
+Drivers for the second video output of the GE B850v3:
+   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
+   STDP2690-ge-b850v3-fw bridges (DP-DP++)
+
+The video processing pipeline on the second output on the GE B850v3:
+
+   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
+
+Each bridge has a dedicated flash containing firmware for supporting the custom
+design. The result is that, in this design, neither the STDP4028 nor the
+STDP2690 behave as the stock bridges would. The compatible strings include the
+suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with
+the firmware specific for the GE B850v3.
+
+The hardware do not provide control over the video processing pipeline, as the
+two bridges behaves as a single one. The only interfaces exposed by the
+hardware are EDID, HPD, and interrupts.
+
+stdp4028-ge-b850v3-fw required properties:
+  - compatible : "megachips,stdp4028-ge-b850v3-fw"
+  - reg : I2C bus address
+  - interrupt-parent : phandle of the interrupt controller that services
+interrupts to the device
+  - interrupts : one interrupt should be described here, as in
+<0 IRQ_TYPE_LEVEL_HIGH>
+  - ports : One input port(reg = <0>) and one output port(reg = <1>)
+
+stdp2690-ge-b850v3-fw required properties:
+compatible : "megachips,stdp2690-ge-b850v3-fw"
+  - reg : I2C bus address
+  - ports : One input port(reg = <0>) and one output port(reg = <1>)
+
+Example:
+
+_i2c2 {
+   status = "okay";
+   clock-frequency = <10>;
+
+   stdp4028@73 {
+   compatible = "megachips,stdp4028-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x73>;
+
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp4028_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   stdp4028_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
+
+   stdp2690@72 {
+   compatible = "megachips,stdp2690-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x72>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp2690_in: endpoint {
+   remote-endpoint = <_out>;
+  

[PATCH V2 0/4] megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

The video processing pipeline on the second output on the GE B850v3:

  Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output

Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the STDP2690 behave as the stock bridges would. The compatible
strings include the suffix "-ge-b850v3-fw" to make it clear that the
driver is for the bridges with the firmware which is specific for the GE
B850v3.

The driver is powerless to control the video processing pipeline, as the
two bridges behaves as a single one. The driver is only needed for
telling the host about EDID / HPD, and for giving the host powers to ack
interrupts.

Changes from V1:
 - Fix bindings documentation
 - Fix white space issues on the driver
 - Improved ge_b850v3_lvds_remove() to not rely on ge_b850v3_lvds_ptr->edid

Changes from V7(was GE B850v3 LVDS/DP++ Bridge):
 - New devicetree binding with one node per bridge, and two ports per bridge
 - Two i2c_devices, one per bridge
 - Removed uneeded mutexes
 - Moved documentation to bindings/display/bridge
 - Included test for EDID extension blocks
 - Renamed bridge pointer to ge_b850v3_lvds_ptr
 - Removed the call to drm_helper_hpd_irq_event()
 - Removed assignments to bridge.driver_private

Changes from V6:
 - Removed check for pixel clock as the bridge supports up to 330Mhz while the
   host is limited to 264 MHz in very specific conditions.
 - Added a second mutex to avoid concurrency issues while acking interrupts
   from threaded interrupt handlers.
 - Renamed the edid mutex to be more descriptive.
 - Added a .detach() function that disables the interrupts.
 - Adopted i2c_new_secondary_device() and updated the dts and documentation to
   match the new method.
 - Removed useless test to drm_bridge_add()
 - Did some refactoring around devm_request_threaded_irq()
 - Added a missing call to i2c_unregister_device() on the i2c_driver.remove()
   function.

Changes from V5:
 - Change to MAINTAINERS in a separate patch
 - Reworked interrupt handler initialization
 - Removed useless calls to: drm_connector_register(),
   drm_helper_hpd_irq_event(), and drm_bridge_enable()

Changes from V4:
 - Renamed the i2c_driver.name from "ge,b850v3-lvds-dp" to "b850v3-lvds-dp" to
   remove the comma from the driver name

Changes from V3:
 - Removed the patch that was configuring the mapping between IPUs and external
   displays on the dts file

Peter Senna Tschudin (4):
  dt-bindings: display: megachips-stdp-ge-b850v3-fw
  MAINTAINERS: Add entry for megachips-stdp-ge-b850v3-fw
  drm/bridge: Drivers for megachips-stdp-ge-b850v3-fw (LVDS-DP++)
  dts/imx6q-b850v3: Use megachips-stdp-ge-b850v3-fw bridges
(LVDS-DP++)

 .../bridge/megachips-stdp-ge-b850v3-fw.txt |  94 +
 .../devicetree/bindings/vendor-prefixes.txt|   1 +
 MAINTAINERS|   8 +
 arch/arm/boot/dts/imx6q-b850v3.dts |  68 
 drivers/gpu/drm/bridge/Kconfig |  11 +
 drivers/gpu/drm/bridge/Makefile|   1 +
 .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 411 +
 7 files changed, 594 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
 create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c

-- 
2.9.3

[PATCH V2 1/4] dt-bindings: display: megachips-stdpxxxx-ge-b850v3-fw

[Peter Senna Tschudin]

Devicetree binding documentation for the second video output
of the GE B850v3:
   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
   STDP2690-ge-b850v3-fw bridges (DP-DP++)

Added entry for MegaChips at:
 Documentation/devicetree/bindings/vendor-prefixes.txt

Cc: Laurent Pinchart 
Cc: Martyn Welch 
Cc: Martin Donnelly 
Cc: Javier Martinez Canillas 
Cc: Enric Balletbo i Serra 
Cc: Philipp Zabel 
Cc: Rob Herring 
Cc: Fabio Estevam 
Signed-off-by: Peter Senna Tschudin 
---
Changes from V1:
 - New subject
 - Moved binding documentation from bindings/video/ to bindings/display/bridge/
 - Reworded to describe hardware instead of the driver
 - Reformated the bindings to have one set of required properties per device
 - Updated reg description
 - Defined number of ports and what they are for

 .../bridge/megachips-stdp-ge-b850v3-fw.txt | 94 ++
 .../devicetree/bindings/vendor-prefixes.txt|  1 +
 2 files changed, 95 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt

diff --git 
a/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
 
b/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
new file mode 100644
index 000..7baa658
--- /dev/null
+++ 
b/Documentation/devicetree/bindings/display/bridge/megachips-stdp-ge-b850v3-fw.txt
@@ -0,0 +1,94 @@
+Drivers for the second video output of the GE B850v3:
+   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
+   STDP2690-ge-b850v3-fw bridges (DP-DP++)
+
+The video processing pipeline on the second output on the GE B850v3:
+
+   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
+
+Each bridge has a dedicated flash containing firmware for supporting the custom
+design. The result is that, in this design, neither the STDP4028 nor the
+STDP2690 behave as the stock bridges would. The compatible strings include the
+suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with
+the firmware specific for the GE B850v3.
+
+The hardware do not provide control over the video processing pipeline, as the
+two bridges behaves as a single one. The only interfaces exposed by the
+hardware are EDID, HPD, and interrupts.
+
+stdp4028-ge-b850v3-fw required properties:
+  - compatible : "megachips,stdp4028-ge-b850v3-fw"
+  - reg : I2C bus address
+  - interrupt-parent : phandle of the interrupt controller that services
+interrupts to the device
+  - interrupts : one interrupt should be described here, as in
+<0 IRQ_TYPE_LEVEL_HIGH>
+  - ports : One input port(reg = <0>) and one output port(reg = <1>)
+
+stdp2690-ge-b850v3-fw required properties:
+compatible : "megachips,stdp2690-ge-b850v3-fw"
+  - reg : I2C bus address
+  - ports : One input port(reg = <0>) and one output port(reg = <1>)
+
+Example:
+
+_i2c2 {
+   status = "okay";
+   clock-frequency = <10>;
+
+   stdp4028@73 {
+   compatible = "megachips,stdp4028-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x73>;
+
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp4028_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   stdp4028_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
+
+   stdp2690@72 {
+   compatible = "megachips,stdp2690-ge-b850v3-fw";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0x72>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   stdp2690_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   stdp2690_out: endpoint {
+   /* Connector for external display */
+   };
+   };
+   };
+   };
+};

Re: [PATCH 3/4] drm/bridge: Drivers for megachips-stdpxxxx-ge-b850v3-fw (LVDS-DP++)

[Peter Senna Tschudin]

On Wed, Feb 01, 2017 at 04:17:21PM +0530, Archit Taneja wrote:
Hi Archit,

> Hi,
> 
> Some minor comments:

Thank you for the review!

> 
> On 01/28/2017 07:51 PM, Peter Senna Tschudin wrote:
> > The video processing pipeline on the second output on the GE B850v3:
> > 
> >   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
> > 
> > Each bridge has a dedicated flash containing firmware for supporting the
> > custom design. The result is that in this design neither the STDP4028
> > nor the STDP2690 behave as the stock bridges would. The compatible
> > strings include the suffix "-ge-b850v3-fw" to make it clear that the
> > driver is for the bridges with the firmware which is specific for the GE
> > B850v3.
> > 
> > The driver is powerless to control the video processing pipeline, as the
> > two bridges behaves as a single one. The driver is only needed for
> > telling the host about EDID / HPD, and for giving the host powers to ack
> > interrupts.
> > 
> > This driver adds one i2c_device for each bridge, but only one
> > drm_bridge. This design allows the creation of a functional connector
> > that is capable of reading EDID from the STDP2690 while handling
> > interrupts on the STDP4028.
> > 
> > Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
> > Cc: Martyn Welch <martyn.we...@collabora.co.uk>
> > Cc: Martin Donnelly <martin.donne...@ge.com>
> > Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
> > Cc: Enric Balletbo i Serra <enric.balle...@collabora.com>
> > Cc: Philipp Zabel <p.za...@pengutronix.de>
> > Cc: Rob Herring <r...@kernel.org>
> > Cc: Fabio Estevam <fabio.este...@nxp.com>
> > Cc: David Airlie <airl...@linux.ie>
> > Cc: Thierry Reding <tred...@nvidia.com>
> > Cc: Thierry Reding <thierry.red...@gmail.com>
> > Cc: Archit Taneja <arch...@codeaurora.org>
> > Cc: Enric Balletbo <enric.balle...@collabora.com>
> > Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
> > ---
> >  drivers/gpu/drm/bridge/Kconfig |  11 +
> >  drivers/gpu/drm/bridge/Makefile|   1 +
> >  .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 408 
> > +
> >  3 files changed, 420 insertions(+)
> >  create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
> > 
> > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > index eb8688e..4a937f1 100644
> > --- a/drivers/gpu/drm/bridge/Kconfig
> > +++ b/drivers/gpu/drm/bridge/Kconfig
> > @@ -48,6 +48,17 @@ config DRM_DW_HDMI_I2S_AUDIO
> >   Support the I2S Audio interface which is part of the Synopsis
> >   Designware HDMI block.
> > 
> > +config DRM_MEGACHIPS_STDP_GE_B850V3_FW
> > +   tristate "MegaChips stdp4028-ge-b850v3-fw and stdp2690-ge-b850v3-fw"
> > +   depends on OF
> > +   select DRM_KMS_HELPER
> > +   select DRM_PANEL
> > +   ---help---
> > +  This is a driver for the display bridges of
> > +  GE B850v3 that convert dual channel LVDS
> > +  to DP++. This is used with the i.MX6 imx-ldb
> > +  driver. You are likely to say N here.
> > +
> >  config DRM_NXP_PTN3460
> > tristate "NXP PTN3460 DP/LVDS bridge"
> > depends on OF
> > diff --git a/drivers/gpu/drm/bridge/Makefile 
> > b/drivers/gpu/drm/bridge/Makefile
> > index 2e83a785..af0b7cc 100644
> > --- a/drivers/gpu/drm/bridge/Makefile
> > +++ b/drivers/gpu/drm/bridge/Makefile
> > @@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> >  obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
> >  obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
> >  obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
> > +obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
> > megachips-stdp-ge-b850v3-fw.o
> >  obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
> >  obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
> >  obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
> > diff --git a/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c 
> > b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
> > new file mode 100644
> > index 000..13de03cf
> > --- /dev/null
> > +++ b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
> > @@ -0,0 +1,408 @@
> > +/*
> > + * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
> > + * Driver for MegaChips STDP2690 w

Re: [PATCH 3/4] drm/bridge: Drivers for megachips-stdpxxxx-ge-b850v3-fw (LVDS-DP++)

[Peter Senna Tschudin]

On Wed, Feb 01, 2017 at 04:17:21PM +0530, Archit Taneja wrote:
Hi Archit,

> Hi,
> 
> Some minor comments:

Thank you for the review!

> 
> On 01/28/2017 07:51 PM, Peter Senna Tschudin wrote:
> > The video processing pipeline on the second output on the GE B850v3:
> > 
> >   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
> > 
> > Each bridge has a dedicated flash containing firmware for supporting the
> > custom design. The result is that in this design neither the STDP4028
> > nor the STDP2690 behave as the stock bridges would. The compatible
> > strings include the suffix "-ge-b850v3-fw" to make it clear that the
> > driver is for the bridges with the firmware which is specific for the GE
> > B850v3.
> > 
> > The driver is powerless to control the video processing pipeline, as the
> > two bridges behaves as a single one. The driver is only needed for
> > telling the host about EDID / HPD, and for giving the host powers to ack
> > interrupts.
> > 
> > This driver adds one i2c_device for each bridge, but only one
> > drm_bridge. This design allows the creation of a functional connector
> > that is capable of reading EDID from the STDP2690 while handling
> > interrupts on the STDP4028.
> > 
> > Cc: Laurent Pinchart 
> > Cc: Martyn Welch 
> > Cc: Martin Donnelly 
> > Cc: Daniel Vetter 
> > Cc: Enric Balletbo i Serra 
> > Cc: Philipp Zabel 
> > Cc: Rob Herring 
> > Cc: Fabio Estevam 
> > Cc: David Airlie 
> > Cc: Thierry Reding 
> > Cc: Thierry Reding 
> > Cc: Archit Taneja 
> > Cc: Enric Balletbo 
> > Signed-off-by: Peter Senna Tschudin 
> > ---
> >  drivers/gpu/drm/bridge/Kconfig |  11 +
> >  drivers/gpu/drm/bridge/Makefile|   1 +
> >  .../drm/bridge/megachips-stdp-ge-b850v3-fw.c   | 408 
> > +
> >  3 files changed, 420 insertions(+)
> >  create mode 100644 drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
> > 
> > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > index eb8688e..4a937f1 100644
> > --- a/drivers/gpu/drm/bridge/Kconfig
> > +++ b/drivers/gpu/drm/bridge/Kconfig
> > @@ -48,6 +48,17 @@ config DRM_DW_HDMI_I2S_AUDIO
> >   Support the I2S Audio interface which is part of the Synopsis
> >   Designware HDMI block.
> > 
> > +config DRM_MEGACHIPS_STDP_GE_B850V3_FW
> > +   tristate "MegaChips stdp4028-ge-b850v3-fw and stdp2690-ge-b850v3-fw"
> > +   depends on OF
> > +   select DRM_KMS_HELPER
> > +   select DRM_PANEL
> > +   ---help---
> > +  This is a driver for the display bridges of
> > +  GE B850v3 that convert dual channel LVDS
> > +  to DP++. This is used with the i.MX6 imx-ldb
> > +  driver. You are likely to say N here.
> > +
> >  config DRM_NXP_PTN3460
> > tristate "NXP PTN3460 DP/LVDS bridge"
> > depends on OF
> > diff --git a/drivers/gpu/drm/bridge/Makefile 
> > b/drivers/gpu/drm/bridge/Makefile
> > index 2e83a785..af0b7cc 100644
> > --- a/drivers/gpu/drm/bridge/Makefile
> > +++ b/drivers/gpu/drm/bridge/Makefile
> > @@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> >  obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
> >  obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
> >  obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
> > +obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
> > megachips-stdp-ge-b850v3-fw.o
> >  obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
> >  obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
> >  obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
> > diff --git a/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c 
> > b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
> > new file mode 100644
> > index 000..13de03cf
> > --- /dev/null
> > +++ b/drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c
> > @@ -0,0 +1,408 @@
> > +/*
> > + * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
> > + * Driver for MegaChips STDP2690 with GE B850v3 firmware (DP-DP++)
> > +
> > + * Copyright (c) 2016, Collabora Ltd.
> > + * Copyright (c) 2016, General Electric Company
> 
> 2017?

Fixed.

> 
> > +
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms and conditions of the GNU General Public License,
> > + * version 2, as published by the Free Software Foundatio

Re: [PATCH v3 18/20] usb: host: Remove remaining pci_pool in comments

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:23PM +0100, Romain Perier wrote:
> This replaces remaining occurences of pci_pool by dma_pool, as
> this is the new API that could be used for that purpose.
> 
Reviewed-by: Peter Senna Tschudin <peter.se...@collabora.com>
> Signed-off-by: Romain Perier <romain.per...@collabora.com>
> ---
>  drivers/usb/host/ehci-hcd.c | 2 +-
>  drivers/usb/host/fotg210-hcd.c  | 2 +-
>  drivers/usb/host/oxu210hp-hcd.c | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
> index ac2c4ea..6e834b83 100644
> --- a/drivers/usb/host/ehci-hcd.c
> +++ b/drivers/usb/host/ehci-hcd.c
> @@ -597,7 +597,7 @@ static int ehci_run (struct usb_hcd *hcd)
>   /*
>* hcc_params controls whether ehci->regs->segment must (!!!)
>* be used; it constrains QH/ITD/SITD and QTD locations.
> -  * pci_pool consistent memory always uses segment zero.
> +  * dma_pool consistent memory always uses segment zero.
>* streaming mappings for I/O buffers, like pci_map_single(),
>* can return segments above 4GB, if the device allows.
>*
> diff --git a/drivers/usb/host/fotg210-hcd.c b/drivers/usb/host/fotg210-hcd.c
> index 1c5b34b..ced08dc 100644
> --- a/drivers/usb/host/fotg210-hcd.c
> +++ b/drivers/usb/host/fotg210-hcd.c
> @@ -5047,7 +5047,7 @@ static int fotg210_run(struct usb_hcd *hcd)
>   /*
>* hcc_params controls whether fotg210->regs->segment must (!!!)
>* be used; it constrains QH/ITD/SITD and QTD locations.
> -  * pci_pool consistent memory always uses segment zero.
> +  * dma_pool consistent memory always uses segment zero.
>* streaming mappings for I/O buffers, like pci_map_single(),
>* can return segments above 4GB, if the device allows.
>*
> diff --git a/drivers/usb/host/oxu210hp-hcd.c b/drivers/usb/host/oxu210hp-hcd.c
> index bcf531c..ed20fb3 100644
> --- a/drivers/usb/host/oxu210hp-hcd.c
> +++ b/drivers/usb/host/oxu210hp-hcd.c
> @@ -2708,7 +2708,7 @@ static int oxu_run(struct usb_hcd *hcd)
>  
>   /* hcc_params controls whether oxu->regs->segment must (!!!)
>* be used; it constrains QH/ITD/SITD and QTD locations.
> -  * pci_pool consistent memory always uses segment zero.
> +  * dma_pool consistent memory always uses segment zero.
>* streaming mappings for I/O buffers, like pci_map_single(),
>* can return segments above 4GB, if the device allows.
>*
> -- 
> 2.9.3
> 

Re: [PATCH v3 18/20] usb: host: Remove remaining pci_pool in comments

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:23PM +0100, Romain Perier wrote:
> This replaces remaining occurences of pci_pool by dma_pool, as
> this is the new API that could be used for that purpose.
> 
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Romain Perier 
> ---
>  drivers/usb/host/ehci-hcd.c | 2 +-
>  drivers/usb/host/fotg210-hcd.c  | 2 +-
>  drivers/usb/host/oxu210hp-hcd.c | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
> index ac2c4ea..6e834b83 100644
> --- a/drivers/usb/host/ehci-hcd.c
> +++ b/drivers/usb/host/ehci-hcd.c
> @@ -597,7 +597,7 @@ static int ehci_run (struct usb_hcd *hcd)
>   /*
>* hcc_params controls whether ehci->regs->segment must (!!!)
>* be used; it constrains QH/ITD/SITD and QTD locations.
> -  * pci_pool consistent memory always uses segment zero.
> +  * dma_pool consistent memory always uses segment zero.
>* streaming mappings for I/O buffers, like pci_map_single(),
>* can return segments above 4GB, if the device allows.
>*
> diff --git a/drivers/usb/host/fotg210-hcd.c b/drivers/usb/host/fotg210-hcd.c
> index 1c5b34b..ced08dc 100644
> --- a/drivers/usb/host/fotg210-hcd.c
> +++ b/drivers/usb/host/fotg210-hcd.c
> @@ -5047,7 +5047,7 @@ static int fotg210_run(struct usb_hcd *hcd)
>   /*
>* hcc_params controls whether fotg210->regs->segment must (!!!)
>* be used; it constrains QH/ITD/SITD and QTD locations.
> -  * pci_pool consistent memory always uses segment zero.
> +  * dma_pool consistent memory always uses segment zero.
>* streaming mappings for I/O buffers, like pci_map_single(),
>* can return segments above 4GB, if the device allows.
>*
> diff --git a/drivers/usb/host/oxu210hp-hcd.c b/drivers/usb/host/oxu210hp-hcd.c
> index bcf531c..ed20fb3 100644
> --- a/drivers/usb/host/oxu210hp-hcd.c
> +++ b/drivers/usb/host/oxu210hp-hcd.c
> @@ -2708,7 +2708,7 @@ static int oxu_run(struct usb_hcd *hcd)
>  
>   /* hcc_params controls whether oxu->regs->segment must (!!!)
>* be used; it constrains QH/ITD/SITD and QTD locations.
> -  * pci_pool consistent memory always uses segment zero.
> +  * dma_pool consistent memory always uses segment zero.
>* streaming mappings for I/O buffers, like pci_map_single(),
>* can return segments above 4GB, if the device allows.
>*
> -- 
> 2.9.3
> 

Re: [PATCH v3 19/20] PCI: Remove PCI pool macro functions

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:24PM +0100, Romain Perier wrote:
> Now that all the drivers use dma pool API, we can remove the macro
> functions for PCI pool.
> 
Reviewed-by: Peter Senna Tschudin <peter.se...@collabora.com>
> Signed-off-by: Romain Perier <romain.per...@collabora.com>
> ---
>  include/linux/pci.h | 9 -
>  1 file changed, 9 deletions(-)
> 
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 282ed32..d206ba4 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -1281,15 +1281,6 @@ int pci_set_vga_state(struct pci_dev *pdev, bool 
> decode,
>  #include 
>  #include 
>  
> -#define  pci_pool dma_pool
> -#define pci_pool_create(name, pdev, size, align, allocation) \
> - dma_pool_create(name, >dev, size, align, allocation)
> -#define  pci_pool_destroy(pool) dma_pool_destroy(pool)
> -#define  pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, 
> handle)
> -#define  pci_pool_zalloc(pool, flags, handle) \
> - dma_pool_zalloc(pool, flags, handle)
> -#define  pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, 
> addr)
> -
>  struct msix_entry {
>   u32 vector; /* kernel uses to write allocated vector */
>   u16 entry;  /* driver uses to specify entry, OS writes */
> -- 
> 2.9.3
> 

Re: [PATCH v3 19/20] PCI: Remove PCI pool macro functions

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:24PM +0100, Romain Perier wrote:
> Now that all the drivers use dma pool API, we can remove the macro
> functions for PCI pool.
> 
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Romain Perier 
> ---
>  include/linux/pci.h | 9 -
>  1 file changed, 9 deletions(-)
> 
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 282ed32..d206ba4 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -1281,15 +1281,6 @@ int pci_set_vga_state(struct pci_dev *pdev, bool 
> decode,
>  #include 
>  #include 
>  
> -#define  pci_pool dma_pool
> -#define pci_pool_create(name, pdev, size, align, allocation) \
> - dma_pool_create(name, >dev, size, align, allocation)
> -#define  pci_pool_destroy(pool) dma_pool_destroy(pool)
> -#define  pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, 
> handle)
> -#define  pci_pool_zalloc(pool, flags, handle) \
> - dma_pool_zalloc(pool, flags, handle)
> -#define  pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, 
> addr)
> -
>  struct msix_entry {
>   u32 vector; /* kernel uses to write allocated vector */
>   u16 entry;  /* driver uses to specify entry, OS writes */
> -- 
> 2.9.3
> 

Re: [PATCH v3 12/20] scsi: mpt3sas: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:17PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin <peter.se...@collabora.com>
> Signed-off-by: Romain Perier <romain.per...@collabora.com>
> ---
>  drivers/scsi/mpt3sas/mpt3sas_base.c | 73 
> +
>  1 file changed, 34 insertions(+), 39 deletions(-)
> 
> diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c 
> b/drivers/scsi/mpt3sas/mpt3sas_base.c
> index 5b7aec5..5ae1c23 100644
> --- a/drivers/scsi/mpt3sas/mpt3sas_base.c
> +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c
> @@ -3200,9 +3200,8 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
>   }
>  
>   if (ioc->sense) {
> - pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
> - if (ioc->sense_dma_pool)
> - pci_pool_destroy(ioc->sense_dma_pool);
> + dma_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
> + dma_pool_destroy(ioc->sense_dma_pool);
>   dexitprintk(ioc, pr_info(MPT3SAS_FMT
>   "sense_pool(0x%p): free\n",
>   ioc->name, ioc->sense));
> @@ -3210,9 +3209,8 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
>   }
>  
>   if (ioc->reply) {
> - pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
> - if (ioc->reply_dma_pool)
> - pci_pool_destroy(ioc->reply_dma_pool);
> + dma_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
> + dma_pool_destroy(ioc->reply_dma_pool);
>   dexitprintk(ioc, pr_info(MPT3SAS_FMT
>   "reply_pool(0x%p): free\n",
>   ioc->name, ioc->reply));
> @@ -3220,10 +3218,9 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
>   }
>  
>   if (ioc->reply_free) {
> - pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
> + dma_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
>   ioc->reply_free_dma);
> - if (ioc->reply_free_dma_pool)
> - pci_pool_destroy(ioc->reply_free_dma_pool);
> + dma_pool_destroy(ioc->reply_free_dma_pool);
>   dexitprintk(ioc, pr_info(MPT3SAS_FMT
>   "reply_free_pool(0x%p): free\n",
>   ioc->name, ioc->reply_free));
> @@ -3234,7 +3231,7 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
>   do {
>   rps = >reply_post[i];
>   if (rps->reply_post_free) {
> - pci_pool_free(
> + dma_pool_free(
>   ioc->reply_post_free_dma_pool,
>   rps->reply_post_free,
>   rps->reply_post_free_dma);
> @@ -3246,8 +3243,7 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
>   } while (ioc->rdpq_array_enable &&
>  (++i < ioc->reply_queue_count));
>  
> - if (ioc->reply_post_free_dma_pool)
> - pci_pool_destroy(ioc->reply_post_free_dma_pool);
> + dma_pool_destroy(ioc->reply_post_free_dma_pool);
>   kfree(ioc->reply_post);
>   }
>  
> @@ -3268,12 +3264,11 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER 
> *ioc)
>   if (ioc->chain_lookup) {
>   for (i = 0; i < ioc->chain_depth; i++) {
>   if (ioc->chain_lookup[i].chain_buffer)
> - pci_pool_free(ioc->chain_dma_pool,
> + dma_pool_free(ioc->chain_dma_pool,
>   ioc->chain_lookup[i].chain_buffer,
>   ioc->chain_lookup[i].chain_buffer_dma);
>   }
> - if (ioc->chain_dma_pool)
> - pci_pool_destroy(ioc->chain_dma_pool);
> + dma_pool_destroy(ioc->chain_dma_pool);
>   free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
>   ioc->chain_lookup = NULL;
>   }
> @@ -3448,23 +3443,23 @@ _base_allocate_memory_pools(struct MPT3SAS_ADAPTER 
> *ioc)
>   ioc->name);
>   goto out;
>   }
> - ioc->reply_post_free_dma_pool = pci_pool_create(&

Re: [PATCH v3 12/20] scsi: mpt3sas: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:17PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Romain Perier 
> ---
>  drivers/scsi/mpt3sas/mpt3sas_base.c | 73 
> +
>  1 file changed, 34 insertions(+), 39 deletions(-)
> 
> diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c 
> b/drivers/scsi/mpt3sas/mpt3sas_base.c
> index 5b7aec5..5ae1c23 100644
> --- a/drivers/scsi/mpt3sas/mpt3sas_base.c
> +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c
> @@ -3200,9 +3200,8 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
>   }
>  
>   if (ioc->sense) {
> - pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
> - if (ioc->sense_dma_pool)
> - pci_pool_destroy(ioc->sense_dma_pool);
> + dma_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
> + dma_pool_destroy(ioc->sense_dma_pool);
>   dexitprintk(ioc, pr_info(MPT3SAS_FMT
>   "sense_pool(0x%p): free\n",
>   ioc->name, ioc->sense));
> @@ -3210,9 +3209,8 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
>   }
>  
>   if (ioc->reply) {
> - pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
> - if (ioc->reply_dma_pool)
> - pci_pool_destroy(ioc->reply_dma_pool);
> + dma_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
> + dma_pool_destroy(ioc->reply_dma_pool);
>   dexitprintk(ioc, pr_info(MPT3SAS_FMT
>   "reply_pool(0x%p): free\n",
>   ioc->name, ioc->reply));
> @@ -3220,10 +3218,9 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
>   }
>  
>   if (ioc->reply_free) {
> - pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
> + dma_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
>   ioc->reply_free_dma);
> - if (ioc->reply_free_dma_pool)
> - pci_pool_destroy(ioc->reply_free_dma_pool);
> + dma_pool_destroy(ioc->reply_free_dma_pool);
>   dexitprintk(ioc, pr_info(MPT3SAS_FMT
>   "reply_free_pool(0x%p): free\n",
>   ioc->name, ioc->reply_free));
> @@ -3234,7 +3231,7 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
>   do {
>   rps = >reply_post[i];
>   if (rps->reply_post_free) {
> - pci_pool_free(
> + dma_pool_free(
>   ioc->reply_post_free_dma_pool,
>   rps->reply_post_free,
>   rps->reply_post_free_dma);
> @@ -3246,8 +3243,7 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
>   } while (ioc->rdpq_array_enable &&
>  (++i < ioc->reply_queue_count));
>  
> - if (ioc->reply_post_free_dma_pool)
> - pci_pool_destroy(ioc->reply_post_free_dma_pool);
> + dma_pool_destroy(ioc->reply_post_free_dma_pool);
>   kfree(ioc->reply_post);
>   }
>  
> @@ -3268,12 +3264,11 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER 
> *ioc)
>   if (ioc->chain_lookup) {
>   for (i = 0; i < ioc->chain_depth; i++) {
>   if (ioc->chain_lookup[i].chain_buffer)
> - pci_pool_free(ioc->chain_dma_pool,
> + dma_pool_free(ioc->chain_dma_pool,
>   ioc->chain_lookup[i].chain_buffer,
>   ioc->chain_lookup[i].chain_buffer_dma);
>   }
> - if (ioc->chain_dma_pool)
> - pci_pool_destroy(ioc->chain_dma_pool);
> + dma_pool_destroy(ioc->chain_dma_pool);
>   free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
>   ioc->chain_lookup = NULL;
>   }
> @@ -3448,23 +3443,23 @@ _base_allocate_memory_pools(struct MPT3SAS_ADAPTER 
> *ioc)
>   ioc->name);
>   goto out;
>   }
> - ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
> - ioc->pdev, sz, 16, 

Re: [PATCH v3 10/20] scsi: lpfc: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:15PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API. It also updates
> some comments, accordingly.
> 
Reviewed-by: Peter Senna Tschudin <peter.se...@collabora.com>
> Signed-off-by: Romain Perier <romain.per...@collabora.com>
> ---
>  drivers/scsi/lpfc/lpfc.h   |  12 ++---
>  drivers/scsi/lpfc/lpfc_init.c  |  16 +++
>  drivers/scsi/lpfc/lpfc_mem.c   | 105 
> -
>  drivers/scsi/lpfc/lpfc_nvme.c  |   6 +--
>  drivers/scsi/lpfc/lpfc_nvmet.c |   4 +-
>  drivers/scsi/lpfc/lpfc_scsi.c  |  12 ++---
>  6 files changed, 76 insertions(+), 79 deletions(-)
> 
> diff --git a/drivers/scsi/lpfc/lpfc.h b/drivers/scsi/lpfc/lpfc.h
> index 0bba2e3..29492bc 100644
> --- a/drivers/scsi/lpfc/lpfc.h
> +++ b/drivers/scsi/lpfc/lpfc.h
> @@ -934,12 +934,12 @@ struct lpfc_hba {
>   spinlock_t hbalock;
>  
>   /* pci_mem_pools */
> - struct pci_pool *lpfc_sg_dma_buf_pool;
> - struct pci_pool *lpfc_mbuf_pool;
> - struct pci_pool *lpfc_hrb_pool; /* header receive buffer pool */
> - struct pci_pool *lpfc_drb_pool; /* data receive buffer pool */
> - struct pci_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
> - struct pci_pool *txrdy_payload_pool;
> + struct dma_pool *lpfc_sg_dma_buf_pool;
> + struct dma_pool *lpfc_mbuf_pool;
> + struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
> + struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
> + struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
> + struct dma_pool *txrdy_payload_pool;
>   struct lpfc_dma_pool lpfc_mbuf_safety_pool;
>  
>   mempool_t *mbox_mem_pool;
> diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
> index 0ee429d..b856457 100644
> --- a/drivers/scsi/lpfc/lpfc_init.c
> +++ b/drivers/scsi/lpfc/lpfc_init.c
> @@ -3151,7 +3151,7 @@ lpfc_scsi_free(struct lpfc_hba *phba)
>   list_for_each_entry_safe(sb, sb_next, >lpfc_scsi_buf_list_put,
>list) {
>   list_del(>list);
> - pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
> + dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
> sb->dma_handle);
>   kfree(sb);
>   phba->total_scsi_bufs--;
> @@ -3162,7 +3162,7 @@ lpfc_scsi_free(struct lpfc_hba *phba)
>   list_for_each_entry_safe(sb, sb_next, >lpfc_scsi_buf_list_get,
>list) {
>   list_del(>list);
> - pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
> + dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
> sb->dma_handle);
>   kfree(sb);
>   phba->total_scsi_bufs--;
> @@ -3193,7 +3193,7 @@ lpfc_nvme_free(struct lpfc_hba *phba)
>   list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
>>lpfc_nvme_buf_list_put, list) {
>   list_del(_ncmd->list);
> - pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
> + dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
> lpfc_ncmd->dma_handle);
>   kfree(lpfc_ncmd);
>   phba->total_nvme_bufs--;
> @@ -3204,7 +3204,7 @@ lpfc_nvme_free(struct lpfc_hba *phba)
>   list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
>>lpfc_nvme_buf_list_get, list) {
>   list_del(_ncmd->list);
> - pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
> + dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
> lpfc_ncmd->dma_handle);
>   kfree(lpfc_ncmd);
>   phba->total_nvme_bufs--;
> @@ -3517,7 +3517,7 @@ lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
>   list_remove_head(_sgl_list, psb,
>struct lpfc_scsi_buf, list);
>   if (psb) {
> - pci_pool_free(phba->lpfc_sg_dma_buf_pool,
> + dma_pool_free(phba->lpfc_sg_dma_buf_pool,
> psb->data, psb->dma_handle);
>   kfree(psb);
>   }
> @@ -3614,7 +3614,7 @@ lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
>   list_remove_head(_sgl_list, lpfc_ncmd,
>  

Re: [PATCH v3 10/20] scsi: lpfc: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:15PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API. It also updates
> some comments, accordingly.
> 
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Romain Perier 
> ---
>  drivers/scsi/lpfc/lpfc.h   |  12 ++---
>  drivers/scsi/lpfc/lpfc_init.c  |  16 +++
>  drivers/scsi/lpfc/lpfc_mem.c   | 105 
> -
>  drivers/scsi/lpfc/lpfc_nvme.c  |   6 +--
>  drivers/scsi/lpfc/lpfc_nvmet.c |   4 +-
>  drivers/scsi/lpfc/lpfc_scsi.c  |  12 ++---
>  6 files changed, 76 insertions(+), 79 deletions(-)
> 
> diff --git a/drivers/scsi/lpfc/lpfc.h b/drivers/scsi/lpfc/lpfc.h
> index 0bba2e3..29492bc 100644
> --- a/drivers/scsi/lpfc/lpfc.h
> +++ b/drivers/scsi/lpfc/lpfc.h
> @@ -934,12 +934,12 @@ struct lpfc_hba {
>   spinlock_t hbalock;
>  
>   /* pci_mem_pools */
> - struct pci_pool *lpfc_sg_dma_buf_pool;
> - struct pci_pool *lpfc_mbuf_pool;
> - struct pci_pool *lpfc_hrb_pool; /* header receive buffer pool */
> - struct pci_pool *lpfc_drb_pool; /* data receive buffer pool */
> - struct pci_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
> - struct pci_pool *txrdy_payload_pool;
> + struct dma_pool *lpfc_sg_dma_buf_pool;
> + struct dma_pool *lpfc_mbuf_pool;
> + struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
> + struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
> + struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
> + struct dma_pool *txrdy_payload_pool;
>   struct lpfc_dma_pool lpfc_mbuf_safety_pool;
>  
>   mempool_t *mbox_mem_pool;
> diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
> index 0ee429d..b856457 100644
> --- a/drivers/scsi/lpfc/lpfc_init.c
> +++ b/drivers/scsi/lpfc/lpfc_init.c
> @@ -3151,7 +3151,7 @@ lpfc_scsi_free(struct lpfc_hba *phba)
>   list_for_each_entry_safe(sb, sb_next, >lpfc_scsi_buf_list_put,
>list) {
>   list_del(>list);
> - pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
> + dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
> sb->dma_handle);
>   kfree(sb);
>   phba->total_scsi_bufs--;
> @@ -3162,7 +3162,7 @@ lpfc_scsi_free(struct lpfc_hba *phba)
>   list_for_each_entry_safe(sb, sb_next, >lpfc_scsi_buf_list_get,
>list) {
>   list_del(>list);
> - pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
> + dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
> sb->dma_handle);
>   kfree(sb);
>   phba->total_scsi_bufs--;
> @@ -3193,7 +3193,7 @@ lpfc_nvme_free(struct lpfc_hba *phba)
>   list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
>>lpfc_nvme_buf_list_put, list) {
>   list_del(_ncmd->list);
> - pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
> + dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
> lpfc_ncmd->dma_handle);
>   kfree(lpfc_ncmd);
>   phba->total_nvme_bufs--;
> @@ -3204,7 +3204,7 @@ lpfc_nvme_free(struct lpfc_hba *phba)
>   list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
>>lpfc_nvme_buf_list_get, list) {
>   list_del(_ncmd->list);
> - pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
> + dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
> lpfc_ncmd->dma_handle);
>   kfree(lpfc_ncmd);
>   phba->total_nvme_bufs--;
> @@ -3517,7 +3517,7 @@ lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
>   list_remove_head(_sgl_list, psb,
>struct lpfc_scsi_buf, list);
>   if (psb) {
> - pci_pool_free(phba->lpfc_sg_dma_buf_pool,
> + dma_pool_free(phba->lpfc_sg_dma_buf_pool,
> psb->data, psb->dma_handle);
>   kfree(psb);
>   }
> @@ -3614,7 +3614,7 @@ lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
>   list_remove_head(_sgl_list, lpfc_ncmd,
>struct lpfc_nvme_buf, list);
>   if (lpfc_ncmd) 

Re: [PATCH v3 13/20] scsi: mvsas: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:18PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin <peter.se...@collabora.com>
> Signed-off-by: Romain Perier <romain.per...@collabora.com>
> ---
>  drivers/scsi/mvsas/mv_init.c | 6 +++---
>  drivers/scsi/mvsas/mv_sas.c  | 6 +++---
>  2 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/scsi/mvsas/mv_init.c b/drivers/scsi/mvsas/mv_init.c
> index 8280046..41d2276 100644
> --- a/drivers/scsi/mvsas/mv_init.c
> +++ b/drivers/scsi/mvsas/mv_init.c
> @@ -125,8 +125,7 @@ static void mvs_free(struct mvs_info *mvi)
>   else
>   slot_nr = MVS_CHIP_SLOT_SZ;
>  
> - if (mvi->dma_pool)
> - pci_pool_destroy(mvi->dma_pool);
> + dma_pool_destroy(mvi->dma_pool);
>  
>   if (mvi->tx)
>   dma_free_coherent(mvi->dev,
> @@ -296,7 +295,8 @@ static int mvs_alloc(struct mvs_info *mvi, struct 
> Scsi_Host *shost)
>   goto err_out;
>  
>   sprintf(pool_name, "%s%d", "mvs_dma_pool", mvi->id);
> - mvi->dma_pool = pci_pool_create(pool_name, mvi->pdev, MVS_SLOT_BUF_SZ, 
> 16, 0);
> + mvi->dma_pool = dma_pool_create(pool_name, >pdev->dev,
> + MVS_SLOT_BUF_SZ, 16, 0);
>   if (!mvi->dma_pool) {
>   printk(KERN_DEBUG "failed to create dma pool %s.\n", 
> pool_name);
>   goto err_out;
> diff --git a/drivers/scsi/mvsas/mv_sas.c b/drivers/scsi/mvsas/mv_sas.c
> index c7cc803..ee81d10 100644
> --- a/drivers/scsi/mvsas/mv_sas.c
> +++ b/drivers/scsi/mvsas/mv_sas.c
> @@ -790,7 +790,7 @@ static int mvs_task_prep(struct sas_task *task, struct 
> mvs_info *mvi, int is_tmf
>   slot->n_elem = n_elem;
>   slot->slot_tag = tag;
>  
> - slot->buf = pci_pool_alloc(mvi->dma_pool, GFP_ATOMIC, >buf_dma);
> + slot->buf = dma_pool_alloc(mvi->dma_pool, GFP_ATOMIC, >buf_dma);
>   if (!slot->buf) {
>   rc = -ENOMEM;
>   goto err_out_tag;
> @@ -840,7 +840,7 @@ static int mvs_task_prep(struct sas_task *task, struct 
> mvs_info *mvi, int is_tmf
>   return rc;
>  
>  err_out_slot_buf:
> - pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
> + dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
>  err_out_tag:
>   mvs_tag_free(mvi, tag);
>  err_out:
> @@ -918,7 +918,7 @@ static void mvs_slot_task_free(struct mvs_info *mvi, 
> struct sas_task *task,
>   }
>  
>   if (slot->buf) {
> - pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
> + dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
>   slot->buf = NULL;
>   }
>   list_del_init(>entry);
> -- 
> 2.9.3
> 

Re: [PATCH v3 13/20] scsi: mvsas: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:18PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Romain Perier 
> ---
>  drivers/scsi/mvsas/mv_init.c | 6 +++---
>  drivers/scsi/mvsas/mv_sas.c  | 6 +++---
>  2 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/scsi/mvsas/mv_init.c b/drivers/scsi/mvsas/mv_init.c
> index 8280046..41d2276 100644
> --- a/drivers/scsi/mvsas/mv_init.c
> +++ b/drivers/scsi/mvsas/mv_init.c
> @@ -125,8 +125,7 @@ static void mvs_free(struct mvs_info *mvi)
>   else
>   slot_nr = MVS_CHIP_SLOT_SZ;
>  
> - if (mvi->dma_pool)
> - pci_pool_destroy(mvi->dma_pool);
> + dma_pool_destroy(mvi->dma_pool);
>  
>   if (mvi->tx)
>   dma_free_coherent(mvi->dev,
> @@ -296,7 +295,8 @@ static int mvs_alloc(struct mvs_info *mvi, struct 
> Scsi_Host *shost)
>   goto err_out;
>  
>   sprintf(pool_name, "%s%d", "mvs_dma_pool", mvi->id);
> - mvi->dma_pool = pci_pool_create(pool_name, mvi->pdev, MVS_SLOT_BUF_SZ, 
> 16, 0);
> + mvi->dma_pool = dma_pool_create(pool_name, >pdev->dev,
> + MVS_SLOT_BUF_SZ, 16, 0);
>   if (!mvi->dma_pool) {
>   printk(KERN_DEBUG "failed to create dma pool %s.\n", 
> pool_name);
>   goto err_out;
> diff --git a/drivers/scsi/mvsas/mv_sas.c b/drivers/scsi/mvsas/mv_sas.c
> index c7cc803..ee81d10 100644
> --- a/drivers/scsi/mvsas/mv_sas.c
> +++ b/drivers/scsi/mvsas/mv_sas.c
> @@ -790,7 +790,7 @@ static int mvs_task_prep(struct sas_task *task, struct 
> mvs_info *mvi, int is_tmf
>   slot->n_elem = n_elem;
>   slot->slot_tag = tag;
>  
> - slot->buf = pci_pool_alloc(mvi->dma_pool, GFP_ATOMIC, >buf_dma);
> + slot->buf = dma_pool_alloc(mvi->dma_pool, GFP_ATOMIC, >buf_dma);
>   if (!slot->buf) {
>   rc = -ENOMEM;
>   goto err_out_tag;
> @@ -840,7 +840,7 @@ static int mvs_task_prep(struct sas_task *task, struct 
> mvs_info *mvi, int is_tmf
>   return rc;
>  
>  err_out_slot_buf:
> - pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
> + dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
>  err_out_tag:
>   mvs_tag_free(mvi, tag);
>  err_out:
> @@ -918,7 +918,7 @@ static void mvs_slot_task_free(struct mvs_info *mvi, 
> struct sas_task *task,
>   }
>  
>   if (slot->buf) {
> - pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
> + dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
>   slot->buf = NULL;
>   }
>   list_del_init(>entry);
> -- 
> 2.9.3
> 

Re: [PATCH v3 17/20] usb: gadget: pch_udc: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:22PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin <peter.se...@collabora.com>
> Signed-off-by: Romain Perier <romain.per...@collabora.com>
> ---
>  drivers/usb/gadget/udc/pch_udc.c | 31 +++
>  1 file changed, 15 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/usb/gadget/udc/pch_udc.c 
> b/drivers/usb/gadget/udc/pch_udc.c
> index a97da64..84dcbcd 100644
> --- a/drivers/usb/gadget/udc/pch_udc.c
> +++ b/drivers/usb/gadget/udc/pch_udc.c
> @@ -355,8 +355,8 @@ struct pch_udc_dev {
>   vbus_session:1,
>   set_cfg_not_acked:1,
>   waiting_zlp_ack:1;
> - struct pci_pool *data_requests;
> - struct pci_pool *stp_requests;
> + struct dma_pool *data_requests;
> + struct dma_pool *stp_requests;
>   dma_addr_t  dma_addr;
>   struct usb_ctrlrequest  setup_data;
>   void __iomem*base_addr;
> @@ -1522,7 +1522,7 @@ static void pch_udc_free_dma_chain(struct pch_udc_dev 
> *dev,
>   /* do not free first desc., will be done by free for request */
>   td = phys_to_virt(addr);
>   addr2 = (dma_addr_t)td->next;
> - pci_pool_free(dev->data_requests, td, addr);
> + dma_pool_free(dev->data_requests, td, addr);
>   td->next = 0x00;
>   addr = addr2;
>   }
> @@ -1539,7 +1539,7 @@ static void pch_udc_free_dma_chain(struct pch_udc_dev 
> *dev,
>   *
>   * Return codes:
>   *   0:  success,
> - *   -ENOMEM:pci_pool_alloc invocation fails
> + *   -ENOMEM:dma_pool_alloc invocation fails
>   */
>  static int pch_udc_create_dma_chain(struct pch_udc_ep *ep,
>   struct pch_udc_request *req,
> @@ -1565,7 +1565,7 @@ static int pch_udc_create_dma_chain(struct pch_udc_ep 
> *ep,
>   if (bytes <= buf_len)
>   break;
>   last = td;
> - td = pci_pool_alloc(ep->dev->data_requests, gfp_flags,
> + td = dma_pool_alloc(ep->dev->data_requests, gfp_flags,
>   _addr);
>   if (!td)
>   goto nomem;
> @@ -1770,7 +1770,7 @@ static struct usb_request *pch_udc_alloc_request(struct 
> usb_ep *usbep,
>   if (!ep->dev->dma_addr)
>   return >req;
>   /* ep0 in requests are allocated from data pool here */
> - dma_desc = pci_pool_alloc(ep->dev->data_requests, gfp,
> + dma_desc = dma_pool_alloc(ep->dev->data_requests, gfp,
> >td_data_phys);
>   if (NULL == dma_desc) {
>   kfree(req);
> @@ -1809,7 +1809,7 @@ static void pch_udc_free_request(struct usb_ep *usbep,
>   if (req->td_data != NULL) {
>   if (req->chain_len > 1)
>   pch_udc_free_dma_chain(ep->dev, req);
> - pci_pool_free(ep->dev->data_requests, req->td_data,
> + dma_pool_free(ep->dev->data_requests, req->td_data,
> req->td_data_phys);
>   }
>   kfree(req);
> @@ -2914,7 +2914,7 @@ static int init_dma_pools(struct pch_udc_dev *dev)
>   void*ep0out_buf;
>  
>   /* DMA setup */
> - dev->data_requests = pci_pool_create("data_requests", dev->pdev,
> + dev->data_requests = dma_pool_create("data_requests", >pdev->dev,
>   sizeof(struct pch_udc_data_dma_desc), 0, 0);
>   if (!dev->data_requests) {
>   dev_err(>pdev->dev, "%s: can't get request data pool\n",
> @@ -2923,7 +2923,7 @@ static int init_dma_pools(struct pch_udc_dev *dev)
>   }
>  
>   /* dma desc for setup data */
> - dev->stp_requests = pci_pool_create("setup requests", dev->pdev,
> + dev->stp_requests = dma_pool_create("setup requests", >pdev->dev,
>   sizeof(struct pch_udc_stp_dma_desc), 0, 0);
>   if (!dev->stp_requests) {
>   dev_err(>pdev->dev, "%s: can't get setup request pool\n",
> @@ -2931,7 +2931,7 @@ static int init_dma_pools(struct pch_udc_dev *dev)
>   return -ENOMEM;
>   }
>   /* setup */
> - td_stp = pci_pool_alloc(dev->stp_requests, GFP_KERNEL,
> + td_stp = dma_pool_alloc(dev->stp_r

Re: [PATCH v3 17/20] usb: gadget: pch_udc: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:22PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Romain Perier 
> ---
>  drivers/usb/gadget/udc/pch_udc.c | 31 +++
>  1 file changed, 15 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/usb/gadget/udc/pch_udc.c 
> b/drivers/usb/gadget/udc/pch_udc.c
> index a97da64..84dcbcd 100644
> --- a/drivers/usb/gadget/udc/pch_udc.c
> +++ b/drivers/usb/gadget/udc/pch_udc.c
> @@ -355,8 +355,8 @@ struct pch_udc_dev {
>   vbus_session:1,
>   set_cfg_not_acked:1,
>   waiting_zlp_ack:1;
> - struct pci_pool *data_requests;
> - struct pci_pool *stp_requests;
> + struct dma_pool *data_requests;
> + struct dma_pool *stp_requests;
>   dma_addr_t  dma_addr;
>   struct usb_ctrlrequest  setup_data;
>   void __iomem*base_addr;
> @@ -1522,7 +1522,7 @@ static void pch_udc_free_dma_chain(struct pch_udc_dev 
> *dev,
>   /* do not free first desc., will be done by free for request */
>   td = phys_to_virt(addr);
>   addr2 = (dma_addr_t)td->next;
> - pci_pool_free(dev->data_requests, td, addr);
> + dma_pool_free(dev->data_requests, td, addr);
>   td->next = 0x00;
>   addr = addr2;
>   }
> @@ -1539,7 +1539,7 @@ static void pch_udc_free_dma_chain(struct pch_udc_dev 
> *dev,
>   *
>   * Return codes:
>   *   0:  success,
> - *   -ENOMEM:pci_pool_alloc invocation fails
> + *   -ENOMEM:dma_pool_alloc invocation fails
>   */
>  static int pch_udc_create_dma_chain(struct pch_udc_ep *ep,
>   struct pch_udc_request *req,
> @@ -1565,7 +1565,7 @@ static int pch_udc_create_dma_chain(struct pch_udc_ep 
> *ep,
>   if (bytes <= buf_len)
>   break;
>   last = td;
> - td = pci_pool_alloc(ep->dev->data_requests, gfp_flags,
> + td = dma_pool_alloc(ep->dev->data_requests, gfp_flags,
>   _addr);
>   if (!td)
>   goto nomem;
> @@ -1770,7 +1770,7 @@ static struct usb_request *pch_udc_alloc_request(struct 
> usb_ep *usbep,
>   if (!ep->dev->dma_addr)
>   return >req;
>   /* ep0 in requests are allocated from data pool here */
> - dma_desc = pci_pool_alloc(ep->dev->data_requests, gfp,
> + dma_desc = dma_pool_alloc(ep->dev->data_requests, gfp,
> >td_data_phys);
>   if (NULL == dma_desc) {
>   kfree(req);
> @@ -1809,7 +1809,7 @@ static void pch_udc_free_request(struct usb_ep *usbep,
>   if (req->td_data != NULL) {
>   if (req->chain_len > 1)
>   pch_udc_free_dma_chain(ep->dev, req);
> - pci_pool_free(ep->dev->data_requests, req->td_data,
> + dma_pool_free(ep->dev->data_requests, req->td_data,
> req->td_data_phys);
>   }
>   kfree(req);
> @@ -2914,7 +2914,7 @@ static int init_dma_pools(struct pch_udc_dev *dev)
>   void*ep0out_buf;
>  
>   /* DMA setup */
> - dev->data_requests = pci_pool_create("data_requests", dev->pdev,
> + dev->data_requests = dma_pool_create("data_requests", >pdev->dev,
>   sizeof(struct pch_udc_data_dma_desc), 0, 0);
>   if (!dev->data_requests) {
>   dev_err(>pdev->dev, "%s: can't get request data pool\n",
> @@ -2923,7 +2923,7 @@ static int init_dma_pools(struct pch_udc_dev *dev)
>   }
>  
>   /* dma desc for setup data */
> - dev->stp_requests = pci_pool_create("setup requests", dev->pdev,
> + dev->stp_requests = dma_pool_create("setup requests", >pdev->dev,
>   sizeof(struct pch_udc_stp_dma_desc), 0, 0);
>   if (!dev->stp_requests) {
>   dev_err(>pdev->dev, "%s: can't get setup request pool\n",
> @@ -2931,7 +2931,7 @@ static int init_dma_pools(struct pch_udc_dev *dev)
>   return -ENOMEM;
>   }
>   /* setup */
> - td_stp = pci_pool_alloc(dev->stp_requests, GFP_KERNEL,
> + td_stp = dma_pool_alloc(dev->stp_requests, GFP_KERNEL,
>   >ep[UDC_EP0OUT

Re: [PATCH v3 11/20] scsi: megaraid: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:16PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin <peter.se...@collabora.com>
> Signed-off-by: Romain Perier <romain.per...@collabora.com>
> ---
>  drivers/scsi/megaraid/megaraid_mbox.c   | 33 +++
>  drivers/scsi/megaraid/megaraid_mm.c | 32 +++---
>  drivers/scsi/megaraid/megaraid_sas_base.c   | 29 +++--
>  drivers/scsi/megaraid/megaraid_sas_fusion.c | 66 
> +
>  4 files changed, 77 insertions(+), 83 deletions(-)
> 
> diff --git a/drivers/scsi/megaraid/megaraid_mbox.c 
> b/drivers/scsi/megaraid/megaraid_mbox.c
> index f0987f2..7dfc2e2 100644
> --- a/drivers/scsi/megaraid/megaraid_mbox.c
> +++ b/drivers/scsi/megaraid/megaraid_mbox.c
> @@ -1153,8 +1153,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>  
>   // Allocate memory for 16-bytes aligned mailboxes
> - raid_dev->mbox_pool_handle = pci_pool_create("megaraid mbox pool",
> - adapter->pdev,
> + raid_dev->mbox_pool_handle = dma_pool_create("megaraid mbox pool",
> + >pdev->dev,
>   sizeof(mbox64_t) + 16,
>   16, 0);
>  
> @@ -1164,7 +1164,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   mbox_pci_blk = raid_dev->mbox_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - mbox_pci_blk[i].vaddr = pci_pool_alloc(
> + mbox_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->mbox_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1181,8 +1181,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>* share common memory pool. Passthru structures piggyback on memory
>* allocted to extended passthru since passthru is smaller of the two
>*/
> - raid_dev->epthru_pool_handle = pci_pool_create("megaraid mbox pthru",
> - adapter->pdev, sizeof(mraid_epassthru_t), 128, 0);
> + raid_dev->epthru_pool_handle = dma_pool_create("megaraid mbox pthru",
> + >pdev->dev, sizeof(mraid_epassthru_t), 128, 0);
>  
>   if (raid_dev->epthru_pool_handle == NULL) {
>   goto fail_setup_dma_pool;
> @@ -1190,7 +1190,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   epthru_pci_blk = raid_dev->epthru_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - epthru_pci_blk[i].vaddr = pci_pool_alloc(
> + epthru_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->epthru_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1202,8 +1202,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   // Allocate memory for each scatter-gather list. Request for 512 bytes
>   // alignment for each sg list
> - raid_dev->sg_pool_handle = pci_pool_create("megaraid mbox sg",
> - adapter->pdev,
> + raid_dev->sg_pool_handle = dma_pool_create("megaraid mbox sg",
> + >pdev->dev,
>   sizeof(mbox_sgl64) * MBOX_MAX_SG_SIZE,
>   512, 0);
>  
> @@ -1213,7 +1213,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   sg_pci_blk = raid_dev->sg_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - sg_pci_blk[i].vaddr = pci_pool_alloc(
> + sg_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->sg_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1249,29 +1249,26 @@ megaraid_mbox_teardown_dma_pools(adapter_t *adapter)
>  
>   sg_pci_blk = raid_dev->sg_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS && sg_pci_blk[i].vaddr; i++) {
> - pci_pool_free(raid_dev->sg_pool_handle, sg_pci_blk[i].vaddr,
> + dma_pool_free(raid_dev->sg_pool_handle, sg_pci_blk[i].vaddr,
>   sg_pci_blk[i].dma_addr);
>   }
> - if (raid_dev->s

Re: [PATCH v3 11/20] scsi: megaraid: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:16PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Romain Perier 
> ---
>  drivers/scsi/megaraid/megaraid_mbox.c   | 33 +++
>  drivers/scsi/megaraid/megaraid_mm.c | 32 +++---
>  drivers/scsi/megaraid/megaraid_sas_base.c   | 29 +++--
>  drivers/scsi/megaraid/megaraid_sas_fusion.c | 66 
> +
>  4 files changed, 77 insertions(+), 83 deletions(-)
> 
> diff --git a/drivers/scsi/megaraid/megaraid_mbox.c 
> b/drivers/scsi/megaraid/megaraid_mbox.c
> index f0987f2..7dfc2e2 100644
> --- a/drivers/scsi/megaraid/megaraid_mbox.c
> +++ b/drivers/scsi/megaraid/megaraid_mbox.c
> @@ -1153,8 +1153,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>  
>   // Allocate memory for 16-bytes aligned mailboxes
> - raid_dev->mbox_pool_handle = pci_pool_create("megaraid mbox pool",
> - adapter->pdev,
> + raid_dev->mbox_pool_handle = dma_pool_create("megaraid mbox pool",
> + >pdev->dev,
>   sizeof(mbox64_t) + 16,
>   16, 0);
>  
> @@ -1164,7 +1164,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   mbox_pci_blk = raid_dev->mbox_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - mbox_pci_blk[i].vaddr = pci_pool_alloc(
> + mbox_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->mbox_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1181,8 +1181,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>* share common memory pool. Passthru structures piggyback on memory
>* allocted to extended passthru since passthru is smaller of the two
>*/
> - raid_dev->epthru_pool_handle = pci_pool_create("megaraid mbox pthru",
> - adapter->pdev, sizeof(mraid_epassthru_t), 128, 0);
> + raid_dev->epthru_pool_handle = dma_pool_create("megaraid mbox pthru",
> + >pdev->dev, sizeof(mraid_epassthru_t), 128, 0);
>  
>   if (raid_dev->epthru_pool_handle == NULL) {
>   goto fail_setup_dma_pool;
> @@ -1190,7 +1190,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   epthru_pci_blk = raid_dev->epthru_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - epthru_pci_blk[i].vaddr = pci_pool_alloc(
> + epthru_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->epthru_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1202,8 +1202,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   // Allocate memory for each scatter-gather list. Request for 512 bytes
>   // alignment for each sg list
> - raid_dev->sg_pool_handle = pci_pool_create("megaraid mbox sg",
> - adapter->pdev,
> + raid_dev->sg_pool_handle = dma_pool_create("megaraid mbox sg",
> + >pdev->dev,
>   sizeof(mbox_sgl64) * MBOX_MAX_SG_SIZE,
>   512, 0);
>  
> @@ -1213,7 +1213,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   sg_pci_blk = raid_dev->sg_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - sg_pci_blk[i].vaddr = pci_pool_alloc(
> + sg_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->sg_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1249,29 +1249,26 @@ megaraid_mbox_teardown_dma_pools(adapter_t *adapter)
>  
>   sg_pci_blk = raid_dev->sg_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS && sg_pci_blk[i].vaddr; i++) {
> - pci_pool_free(raid_dev->sg_pool_handle, sg_pci_blk[i].vaddr,
> + dma_pool_free(raid_dev->sg_pool_handle, sg_pci_blk[i].vaddr,
>   sg_pci_blk[i].dma_addr);
>   }
> - if (raid_dev->sg_pool_handle)
> - pci_pool_destroy(raid_dev->sg_pool_h

Re: [PATCH v3 20/20] checkpatch: warn for use of old PCI pool API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:25PM +0100, Romain Perier wrote:
> pci_pool_*() functions should be replaced by the corresponding functions
> in the DMA pool API. This adds support to check for use of these pci
> functions and display a warning when it is the case.
>

I guess Joe Perches did sent some comments for this one, did you address
them?

Reviewed-by: Peter Senna Tschudin <peter.se...@collabora.com>
> Signed-off-by: Romain Perier <romain.per...@collabora.com>
> ---
>  scripts/checkpatch.pl | 9 -
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
> index baa3c7b..f2c775c 100755
> --- a/scripts/checkpatch.pl
> +++ b/scripts/checkpatch.pl
> @@ -6064,7 +6064,14 @@ sub process {
>   WARN("USE_DEVICE_INITCALL",
>"please use device_initcall() or more appropriate 
> function instead of __initcall() (see include/linux/init.h)\n" . $herecurr);
>   }
> -
> +# check for old PCI api pci_pool_*(), use dma_pool_*() instead
> + if ($line =~ 
> /\bpci_pool(?:_(?:create|destroy|alloc|zalloc|free)|)\b/) {
> + if (WARN("USE_DMA_POOL",
> +  "please use the dma pool api or more 
> appropriate function instead of the old pci pool api\n" . $herecurr) &&
> + $fix) {
> + while ($fixed[$fixlinenr] =~ 
> s/\bpci_pool(_(?:create|destroy|alloc|zalloc|free)|)\b/dma_pool$1/) {}
> + }
> + }
>  # check for various structs that are normally const (ops, kgdb, device_tree)
>   if ($line !~ /\bconst\b/ &&
>   $line =~ /\bstruct\s+($const_structs)\b/) {
> -- 
> 2.9.3
> 

Re: [PATCH v3 20/20] checkpatch: warn for use of old PCI pool API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:25PM +0100, Romain Perier wrote:
> pci_pool_*() functions should be replaced by the corresponding functions
> in the DMA pool API. This adds support to check for use of these pci
> functions and display a warning when it is the case.
>

I guess Joe Perches did sent some comments for this one, did you address
them?

Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Romain Perier 
> ---
>  scripts/checkpatch.pl | 9 -
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
> index baa3c7b..f2c775c 100755
> --- a/scripts/checkpatch.pl
> +++ b/scripts/checkpatch.pl
> @@ -6064,7 +6064,14 @@ sub process {
>   WARN("USE_DEVICE_INITCALL",
>"please use device_initcall() or more appropriate 
> function instead of __initcall() (see include/linux/init.h)\n" . $herecurr);
>   }
> -
> +# check for old PCI api pci_pool_*(), use dma_pool_*() instead
> + if ($line =~ 
> /\bpci_pool(?:_(?:create|destroy|alloc|zalloc|free)|)\b/) {
> + if (WARN("USE_DMA_POOL",
> +  "please use the dma pool api or more 
> appropriate function instead of the old pci pool api\n" . $herecurr) &&
> + $fix) {
> + while ($fixed[$fixlinenr] =~ 
> s/\bpci_pool(_(?:create|destroy|alloc|zalloc|free)|)\b/dma_pool$1/) {}
> + }
> + }
>  # check for various structs that are normally const (ops, kgdb, device_tree)
>   if ($line !~ /\bconst\b/ &&
>   $line =~ /\bstruct\s+($const_structs)\b/) {
> -- 
> 2.9.3
> 

Re: [PATCH v3 00/20] Replace PCI pool by DMA pool API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:05PM +0100, Romain Perier wrote:
> The current PCI pool API are simple macro functions direct expanded to
> the appropriated dma pool functions. The prototypes are almost the same
> and semantically, they are very similar. I propose to use the DMA pool
> API directly and get rid of the old API.
> 
> This set of patches, replaces the old API by the dma pool API, adds
> support to warn about this old API in checkpath.pl and remove the
> defines.
> 
> Changes in v3:
> - Rebased series onto next-20170224
> - Fix checkpath.pl reports for patch 11/20 and patch 12/20
> - Remove prefix RFC
> Changes in v2:
> - Introduced patch 18/20
> - Fixed cosmetic changes: spaces before brace, live over 80 characters
> - Removed some of the check for NULL pointers before calling dma_pool_destroy
> - Improved the regexp in checkpatch for pci_pool, thanks to Joe Perches
> - Added Tested-by and Acked-by tags

Tested the series with checkpatch and compiling with allyesconfig.

> 
> Romain Perier (20):
>   block: DAC960: Replace PCI pool old API
>   dmaengine: pch_dma: Replace PCI pool old API
>   IB/mthca: Replace PCI pool old API
>   net: e100: Replace PCI pool old API
>   mlx4: Replace PCI pool old API
>   mlx5: Replace PCI pool old API
>   wireless: ipw2200: Replace PCI pool old API
>   scsi: be2iscsi: Replace PCI pool old API
>   scsi: csiostor: Replace PCI pool old API
>   scsi: lpfc: Replace PCI pool old API
>   scsi: megaraid: Replace PCI pool old API
>   scsi: mpt3sas: Replace PCI pool old API
>   scsi: mvsas: Replace PCI pool old API
>   scsi: pmcraid: Replace PCI pool old API
>   usb: gadget: amd5536udc: Replace PCI pool old API
>   usb: gadget: net2280: Replace PCI pool old API
>   usb: gadget: pch_udc: Replace PCI pool old API
>   usb: host: Remove remaining pci_pool in comments
>   PCI: Remove PCI pool macro functions
>   checkpatch: warn for use of old PCI pool API
> 
>  drivers/block/DAC960.c|  36 -
>  drivers/block/DAC960.h|   4 +-
>  drivers/dma/pch_dma.c |  12 +--
>  drivers/infiniband/hw/mthca/mthca_av.c|  10 +--
>  drivers/infiniband/hw/mthca/mthca_cmd.c   |   8 +-
>  drivers/infiniband/hw/mthca/mthca_dev.h   |   4 +-
>  drivers/net/ethernet/intel/e100.c |  12 +--
>  drivers/net/ethernet/mellanox/mlx4/cmd.c  |  10 +--
>  drivers/net/ethernet/mellanox/mlx4/mlx4.h |   2 +-
>  drivers/net/ethernet/mellanox/mlx5/core/cmd.c |  11 +--
>  drivers/net/wireless/intel/ipw2x00/ipw2200.c  |  13 ++--
>  drivers/scsi/be2iscsi/be_iscsi.c  |   6 +-
>  drivers/scsi/be2iscsi/be_main.c   |   6 +-
>  drivers/scsi/be2iscsi/be_main.h   |   2 +-
>  drivers/scsi/csiostor/csio_hw.h   |   2 +-
>  drivers/scsi/csiostor/csio_init.c |  11 +--
>  drivers/scsi/csiostor/csio_scsi.c |   6 +-
>  drivers/scsi/lpfc/lpfc.h  |  12 +--
>  drivers/scsi/lpfc/lpfc_init.c |  16 ++--
>  drivers/scsi/lpfc/lpfc_mem.c  | 105 
> +-
>  drivers/scsi/lpfc/lpfc_nvme.c |   6 +-
>  drivers/scsi/lpfc/lpfc_nvmet.c|   4 +-
>  drivers/scsi/lpfc/lpfc_scsi.c |  12 +--
>  drivers/scsi/megaraid/megaraid_mbox.c |  33 
>  drivers/scsi/megaraid/megaraid_mm.c   |  32 
>  drivers/scsi/megaraid/megaraid_sas_base.c |  29 +++
>  drivers/scsi/megaraid/megaraid_sas_fusion.c   |  66 
>  drivers/scsi/mpt3sas/mpt3sas_base.c   |  73 +-
>  drivers/scsi/mvsas/mv_init.c  |   6 +-
>  drivers/scsi/mvsas/mv_sas.c   |   6 +-
>  drivers/scsi/pmcraid.c|  10 +--
>  drivers/scsi/pmcraid.h|   2 +-
>  drivers/usb/gadget/udc/amd5536udc.c   |   8 +-
>  drivers/usb/gadget/udc/amd5536udc.h   |   4 +-
>  drivers/usb/gadget/udc/net2280.c  |  12 +--
>  drivers/usb/gadget/udc/net2280.h  |   2 +-
>  drivers/usb/gadget/udc/pch_udc.c  |  31 
>  drivers/usb/host/ehci-hcd.c   |   2 +-
>  drivers/usb/host/fotg210-hcd.c|   2 +-
>  drivers/usb/host/oxu210hp-hcd.c   |   2 +-
>  include/linux/mlx5/driver.h   |   2 +-
>  include/linux/pci.h   |   9 ---
>  scripts/checkpatch.pl |   9 ++-
>  43 files changed, 318 insertions(+), 332 deletions(-)
> 
> -- 
> 2.9.3
> 

Re: [PATCH v3 00/20] Replace PCI pool by DMA pool API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:05PM +0100, Romain Perier wrote:
> The current PCI pool API are simple macro functions direct expanded to
> the appropriated dma pool functions. The prototypes are almost the same
> and semantically, they are very similar. I propose to use the DMA pool
> API directly and get rid of the old API.
> 
> This set of patches, replaces the old API by the dma pool API, adds
> support to warn about this old API in checkpath.pl and remove the
> defines.
> 
> Changes in v3:
> - Rebased series onto next-20170224
> - Fix checkpath.pl reports for patch 11/20 and patch 12/20
> - Remove prefix RFC
> Changes in v2:
> - Introduced patch 18/20
> - Fixed cosmetic changes: spaces before brace, live over 80 characters
> - Removed some of the check for NULL pointers before calling dma_pool_destroy
> - Improved the regexp in checkpatch for pci_pool, thanks to Joe Perches
> - Added Tested-by and Acked-by tags

Tested the series with checkpatch and compiling with allyesconfig.

> 
> Romain Perier (20):
>   block: DAC960: Replace PCI pool old API
>   dmaengine: pch_dma: Replace PCI pool old API
>   IB/mthca: Replace PCI pool old API
>   net: e100: Replace PCI pool old API
>   mlx4: Replace PCI pool old API
>   mlx5: Replace PCI pool old API
>   wireless: ipw2200: Replace PCI pool old API
>   scsi: be2iscsi: Replace PCI pool old API
>   scsi: csiostor: Replace PCI pool old API
>   scsi: lpfc: Replace PCI pool old API
>   scsi: megaraid: Replace PCI pool old API
>   scsi: mpt3sas: Replace PCI pool old API
>   scsi: mvsas: Replace PCI pool old API
>   scsi: pmcraid: Replace PCI pool old API
>   usb: gadget: amd5536udc: Replace PCI pool old API
>   usb: gadget: net2280: Replace PCI pool old API
>   usb: gadget: pch_udc: Replace PCI pool old API
>   usb: host: Remove remaining pci_pool in comments
>   PCI: Remove PCI pool macro functions
>   checkpatch: warn for use of old PCI pool API
> 
>  drivers/block/DAC960.c|  36 -
>  drivers/block/DAC960.h|   4 +-
>  drivers/dma/pch_dma.c |  12 +--
>  drivers/infiniband/hw/mthca/mthca_av.c|  10 +--
>  drivers/infiniband/hw/mthca/mthca_cmd.c   |   8 +-
>  drivers/infiniband/hw/mthca/mthca_dev.h   |   4 +-
>  drivers/net/ethernet/intel/e100.c |  12 +--
>  drivers/net/ethernet/mellanox/mlx4/cmd.c  |  10 +--
>  drivers/net/ethernet/mellanox/mlx4/mlx4.h |   2 +-
>  drivers/net/ethernet/mellanox/mlx5/core/cmd.c |  11 +--
>  drivers/net/wireless/intel/ipw2x00/ipw2200.c  |  13 ++--
>  drivers/scsi/be2iscsi/be_iscsi.c  |   6 +-
>  drivers/scsi/be2iscsi/be_main.c   |   6 +-
>  drivers/scsi/be2iscsi/be_main.h   |   2 +-
>  drivers/scsi/csiostor/csio_hw.h   |   2 +-
>  drivers/scsi/csiostor/csio_init.c |  11 +--
>  drivers/scsi/csiostor/csio_scsi.c |   6 +-
>  drivers/scsi/lpfc/lpfc.h  |  12 +--
>  drivers/scsi/lpfc/lpfc_init.c |  16 ++--
>  drivers/scsi/lpfc/lpfc_mem.c  | 105 
> +-
>  drivers/scsi/lpfc/lpfc_nvme.c |   6 +-
>  drivers/scsi/lpfc/lpfc_nvmet.c|   4 +-
>  drivers/scsi/lpfc/lpfc_scsi.c |  12 +--
>  drivers/scsi/megaraid/megaraid_mbox.c |  33 
>  drivers/scsi/megaraid/megaraid_mm.c   |  32 
>  drivers/scsi/megaraid/megaraid_sas_base.c |  29 +++
>  drivers/scsi/megaraid/megaraid_sas_fusion.c   |  66 
>  drivers/scsi/mpt3sas/mpt3sas_base.c   |  73 +-
>  drivers/scsi/mvsas/mv_init.c  |   6 +-
>  drivers/scsi/mvsas/mv_sas.c   |   6 +-
>  drivers/scsi/pmcraid.c|  10 +--
>  drivers/scsi/pmcraid.h|   2 +-
>  drivers/usb/gadget/udc/amd5536udc.c   |   8 +-
>  drivers/usb/gadget/udc/amd5536udc.h   |   4 +-
>  drivers/usb/gadget/udc/net2280.c  |  12 +--
>  drivers/usb/gadget/udc/net2280.h  |   2 +-
>  drivers/usb/gadget/udc/pch_udc.c  |  31 
>  drivers/usb/host/ehci-hcd.c   |   2 +-
>  drivers/usb/host/fotg210-hcd.c|   2 +-
>  drivers/usb/host/oxu210hp-hcd.c   |   2 +-
>  include/linux/mlx5/driver.h   |   2 +-
>  include/linux/pci.h   |   9 ---
>  scripts/checkpatch.pl |   9 ++-
>  43 files changed, 318 insertions(+), 332 deletions(-)
> 
> -- 
> 2.9.3
> 

Re: [PATCH v3 09/20] scsi: csiostor: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:14PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API. It also updates
> the name of some variables and the content of comments, accordingly.
> 
Reviewed-by: Peter Senna Tschudin <peter.se...@collabora.com>
> Signed-off-by: Romain Perier <romain.per...@collabora.com>
> ---
>  drivers/scsi/csiostor/csio_hw.h   |  2 +-
>  drivers/scsi/csiostor/csio_init.c | 11 ++-
>  drivers/scsi/csiostor/csio_scsi.c |  6 +++---
>  3 files changed, 10 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/scsi/csiostor/csio_hw.h b/drivers/scsi/csiostor/csio_hw.h
> index 029bef8..55b04fc 100644
> --- a/drivers/scsi/csiostor/csio_hw.h
> +++ b/drivers/scsi/csiostor/csio_hw.h
> @@ -465,7 +465,7 @@ struct csio_hw {
>   struct csio_pport   pport[CSIO_MAX_PPORTS]; /* Ports (XGMACs) */
>   struct csio_hw_params   params; /* Hw parameters */
>  
> - struct pci_pool *scsi_pci_pool; /* PCI pool for SCSI */
> + struct dma_pool *scsi_dma_pool; /* DMA pool for SCSI */
>   mempool_t   *mb_mempool;/* Mailbox memory pool*/
>   mempool_t   *rnode_mempool; /* rnode memory pool */
>  
> diff --git a/drivers/scsi/csiostor/csio_init.c 
> b/drivers/scsi/csiostor/csio_init.c
> index dbe416f..292964c 100644
> --- a/drivers/scsi/csiostor/csio_init.c
> +++ b/drivers/scsi/csiostor/csio_init.c
> @@ -485,9 +485,10 @@ csio_resource_alloc(struct csio_hw *hw)
>   if (!hw->rnode_mempool)
>   goto err_free_mb_mempool;
>  
> - hw->scsi_pci_pool = pci_pool_create("csio_scsi_pci_pool", hw->pdev,
> - CSIO_SCSI_RSP_LEN, 8, 0);
> - if (!hw->scsi_pci_pool)
> + hw->scsi_dma_pool = dma_pool_create("csio_scsi_dma_pool",
> + >pdev->dev, CSIO_SCSI_RSP_LEN,
> + 8, 0);
> + if (!hw->scsi_dma_pool)
>   goto err_free_rn_pool;
>  
>   return 0;
> @@ -505,8 +506,8 @@ csio_resource_alloc(struct csio_hw *hw)
>  static void
>  csio_resource_free(struct csio_hw *hw)
>  {
> - pci_pool_destroy(hw->scsi_pci_pool);
> - hw->scsi_pci_pool = NULL;
> + dma_pool_destroy(hw->scsi_dma_pool);
> + hw->scsi_dma_pool = NULL;
>   mempool_destroy(hw->rnode_mempool);
>   hw->rnode_mempool = NULL;
>   mempool_destroy(hw->mb_mempool);
> diff --git a/drivers/scsi/csiostor/csio_scsi.c 
> b/drivers/scsi/csiostor/csio_scsi.c
> index a1ff75f..dab0d3f 100644
> --- a/drivers/scsi/csiostor/csio_scsi.c
> +++ b/drivers/scsi/csiostor/csio_scsi.c
> @@ -2445,7 +2445,7 @@ csio_scsim_init(struct csio_scsim *scm, struct csio_hw 
> *hw)
>  
>   /* Allocate Dma buffers for Response Payload */
>   dma_buf = >dma_buf;
> - dma_buf->vaddr = pci_pool_alloc(hw->scsi_pci_pool, GFP_KERNEL,
> + dma_buf->vaddr = dma_pool_alloc(hw->scsi_dma_pool, GFP_KERNEL,
>   _buf->paddr);
>   if (!dma_buf->vaddr) {
>   csio_err(hw,
> @@ -2485,7 +2485,7 @@ csio_scsim_init(struct csio_scsim *scm, struct csio_hw 
> *hw)
>   ioreq = (struct csio_ioreq *)tmp;
>  
>   dma_buf = >dma_buf;
> - pci_pool_free(hw->scsi_pci_pool, dma_buf->vaddr,
> + dma_pool_free(hw->scsi_dma_pool, dma_buf->vaddr,
> dma_buf->paddr);
>  
>   kfree(ioreq);
> @@ -2516,7 +2516,7 @@ csio_scsim_exit(struct csio_scsim *scm)
>   ioreq = (struct csio_ioreq *)tmp;
>  
>   dma_buf = >dma_buf;
> - pci_pool_free(scm->hw->scsi_pci_pool, dma_buf->vaddr,
> + dma_pool_free(scm->hw->scsi_dma_pool, dma_buf->vaddr,
> dma_buf->paddr);
>  
>   kfree(ioreq);
> -- 
> 2.9.3
> 

Re: [PATCH v3 07/20] wireless: ipw2200: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:12PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin <peter.se...@collabora.com>
> Signed-off-by: Romain Perier <romain.per...@collabora.com>
> ---
>  drivers/net/wireless/intel/ipw2x00/ipw2200.c | 13 +++--
>  1 file changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/net/wireless/intel/ipw2x00/ipw2200.c 
> b/drivers/net/wireless/intel/ipw2x00/ipw2200.c
> index 5ef3c5c..93dfe47 100644
> --- a/drivers/net/wireless/intel/ipw2x00/ipw2200.c
> +++ b/drivers/net/wireless/intel/ipw2x00/ipw2200.c
> @@ -3211,7 +3211,7 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 
> * data, size_t len)
>   struct fw_chunk *chunk;
>   int total_nr = 0;
>   int i;
> - struct pci_pool *pool;
> + struct dma_pool *pool;
>   void **virts;
>   dma_addr_t *phys;
>  
> @@ -3228,9 +3228,10 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 
> * data, size_t len)
>   kfree(virts);
>   return -ENOMEM;
>   }
> - pool = pci_pool_create("ipw2200", priv->pci_dev, CB_MAX_LENGTH, 0, 0);
> + pool = dma_pool_create("ipw2200", >pci_dev->dev, CB_MAX_LENGTH, 0,
> +0);
>   if (!pool) {
> - IPW_ERROR("pci_pool_create failed\n");
> + IPW_ERROR("dma_pool_create failed\n");
>   kfree(phys);
>   kfree(virts);
>   return -ENOMEM;
> @@ -3255,7 +3256,7 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 
> * data, size_t len)
>  
>   nr = (chunk_len + CB_MAX_LENGTH - 1) / CB_MAX_LENGTH;
>   for (i = 0; i < nr; i++) {
> - virts[total_nr] = pci_pool_alloc(pool, GFP_KERNEL,
> + virts[total_nr] = dma_pool_alloc(pool, GFP_KERNEL,
>[total_nr]);
>   if (!virts[total_nr]) {
>   ret = -ENOMEM;
> @@ -3299,9 +3300,9 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 
> * data, size_t len)
>   }
>   out:
>   for (i = 0; i < total_nr; i++)
> - pci_pool_free(pool, virts[i], phys[i]);
> + dma_pool_free(pool, virts[i], phys[i]);
>  
> - pci_pool_destroy(pool);
> + dma_pool_destroy(pool);
>   kfree(phys);
>   kfree(virts);
>  
> -- 
> 2.9.3
> 

Re: [PATCH v3 09/20] scsi: csiostor: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:14PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API. It also updates
> the name of some variables and the content of comments, accordingly.
> 
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Romain Perier 
> ---
>  drivers/scsi/csiostor/csio_hw.h   |  2 +-
>  drivers/scsi/csiostor/csio_init.c | 11 ++-
>  drivers/scsi/csiostor/csio_scsi.c |  6 +++---
>  3 files changed, 10 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/scsi/csiostor/csio_hw.h b/drivers/scsi/csiostor/csio_hw.h
> index 029bef8..55b04fc 100644
> --- a/drivers/scsi/csiostor/csio_hw.h
> +++ b/drivers/scsi/csiostor/csio_hw.h
> @@ -465,7 +465,7 @@ struct csio_hw {
>   struct csio_pport   pport[CSIO_MAX_PPORTS]; /* Ports (XGMACs) */
>   struct csio_hw_params   params; /* Hw parameters */
>  
> - struct pci_pool *scsi_pci_pool; /* PCI pool for SCSI */
> + struct dma_pool *scsi_dma_pool; /* DMA pool for SCSI */
>   mempool_t   *mb_mempool;/* Mailbox memory pool*/
>   mempool_t   *rnode_mempool; /* rnode memory pool */
>  
> diff --git a/drivers/scsi/csiostor/csio_init.c 
> b/drivers/scsi/csiostor/csio_init.c
> index dbe416f..292964c 100644
> --- a/drivers/scsi/csiostor/csio_init.c
> +++ b/drivers/scsi/csiostor/csio_init.c
> @@ -485,9 +485,10 @@ csio_resource_alloc(struct csio_hw *hw)
>   if (!hw->rnode_mempool)
>   goto err_free_mb_mempool;
>  
> - hw->scsi_pci_pool = pci_pool_create("csio_scsi_pci_pool", hw->pdev,
> - CSIO_SCSI_RSP_LEN, 8, 0);
> - if (!hw->scsi_pci_pool)
> + hw->scsi_dma_pool = dma_pool_create("csio_scsi_dma_pool",
> + >pdev->dev, CSIO_SCSI_RSP_LEN,
> + 8, 0);
> + if (!hw->scsi_dma_pool)
>   goto err_free_rn_pool;
>  
>   return 0;
> @@ -505,8 +506,8 @@ csio_resource_alloc(struct csio_hw *hw)
>  static void
>  csio_resource_free(struct csio_hw *hw)
>  {
> - pci_pool_destroy(hw->scsi_pci_pool);
> - hw->scsi_pci_pool = NULL;
> + dma_pool_destroy(hw->scsi_dma_pool);
> + hw->scsi_dma_pool = NULL;
>   mempool_destroy(hw->rnode_mempool);
>   hw->rnode_mempool = NULL;
>   mempool_destroy(hw->mb_mempool);
> diff --git a/drivers/scsi/csiostor/csio_scsi.c 
> b/drivers/scsi/csiostor/csio_scsi.c
> index a1ff75f..dab0d3f 100644
> --- a/drivers/scsi/csiostor/csio_scsi.c
> +++ b/drivers/scsi/csiostor/csio_scsi.c
> @@ -2445,7 +2445,7 @@ csio_scsim_init(struct csio_scsim *scm, struct csio_hw 
> *hw)
>  
>   /* Allocate Dma buffers for Response Payload */
>   dma_buf = >dma_buf;
> - dma_buf->vaddr = pci_pool_alloc(hw->scsi_pci_pool, GFP_KERNEL,
> + dma_buf->vaddr = dma_pool_alloc(hw->scsi_dma_pool, GFP_KERNEL,
>   _buf->paddr);
>   if (!dma_buf->vaddr) {
>   csio_err(hw,
> @@ -2485,7 +2485,7 @@ csio_scsim_init(struct csio_scsim *scm, struct csio_hw 
> *hw)
>   ioreq = (struct csio_ioreq *)tmp;
>  
>   dma_buf = >dma_buf;
> - pci_pool_free(hw->scsi_pci_pool, dma_buf->vaddr,
> + dma_pool_free(hw->scsi_dma_pool, dma_buf->vaddr,
> dma_buf->paddr);
>  
>   kfree(ioreq);
> @@ -2516,7 +2516,7 @@ csio_scsim_exit(struct csio_scsim *scm)
>   ioreq = (struct csio_ioreq *)tmp;
>  
>   dma_buf = >dma_buf;
> - pci_pool_free(scm->hw->scsi_pci_pool, dma_buf->vaddr,
> + dma_pool_free(scm->hw->scsi_dma_pool, dma_buf->vaddr,
> dma_buf->paddr);
>  
>   kfree(ioreq);
> -- 
> 2.9.3
> 

Re: [PATCH v3 07/20] wireless: ipw2200: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:12PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Romain Perier 
> ---
>  drivers/net/wireless/intel/ipw2x00/ipw2200.c | 13 +++--
>  1 file changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/net/wireless/intel/ipw2x00/ipw2200.c 
> b/drivers/net/wireless/intel/ipw2x00/ipw2200.c
> index 5ef3c5c..93dfe47 100644
> --- a/drivers/net/wireless/intel/ipw2x00/ipw2200.c
> +++ b/drivers/net/wireless/intel/ipw2x00/ipw2200.c
> @@ -3211,7 +3211,7 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 
> * data, size_t len)
>   struct fw_chunk *chunk;
>   int total_nr = 0;
>   int i;
> - struct pci_pool *pool;
> + struct dma_pool *pool;
>   void **virts;
>   dma_addr_t *phys;
>  
> @@ -3228,9 +3228,10 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 
> * data, size_t len)
>   kfree(virts);
>   return -ENOMEM;
>   }
> - pool = pci_pool_create("ipw2200", priv->pci_dev, CB_MAX_LENGTH, 0, 0);
> + pool = dma_pool_create("ipw2200", >pci_dev->dev, CB_MAX_LENGTH, 0,
> +0);
>   if (!pool) {
> - IPW_ERROR("pci_pool_create failed\n");
> + IPW_ERROR("dma_pool_create failed\n");
>   kfree(phys);
>   kfree(virts);
>   return -ENOMEM;
> @@ -3255,7 +3256,7 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 
> * data, size_t len)
>  
>   nr = (chunk_len + CB_MAX_LENGTH - 1) / CB_MAX_LENGTH;
>   for (i = 0; i < nr; i++) {
> - virts[total_nr] = pci_pool_alloc(pool, GFP_KERNEL,
> + virts[total_nr] = dma_pool_alloc(pool, GFP_KERNEL,
>[total_nr]);
>   if (!virts[total_nr]) {
>   ret = -ENOMEM;
> @@ -3299,9 +3300,9 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 
> * data, size_t len)
>   }
>   out:
>   for (i = 0; i < total_nr; i++)
> - pci_pool_free(pool, virts[i], phys[i]);
> + dma_pool_free(pool, virts[i], phys[i]);
>  
> - pci_pool_destroy(pool);
> + dma_pool_destroy(pool);
>   kfree(phys);
>   kfree(virts);
>  
> -- 
> 2.9.3
> 

Re: [PATCH v3 06/20] mlx5: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:11PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin <peter.se...@collabora.com>
> Signed-off-by: Romain Perier <romain.per...@collabora.com>
> ---
>  drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 11 ++-
>  include/linux/mlx5/driver.h   |  2 +-
>  2 files changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c 
> b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
> index caa837e..6eef344 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
> @@ -1061,7 +1061,7 @@ static struct mlx5_cmd_mailbox *alloc_cmd_box(struct 
> mlx5_core_dev *dev,
>   if (!mailbox)
>   return ERR_PTR(-ENOMEM);
>  
> - mailbox->buf = pci_pool_zalloc(dev->cmd.pool, flags,
> + mailbox->buf = dma_pool_zalloc(dev->cmd.pool, flags,
>  >dma);
>   if (!mailbox->buf) {
>   mlx5_core_dbg(dev, "failed allocation\n");
> @@ -1076,7 +1076,7 @@ static struct mlx5_cmd_mailbox *alloc_cmd_box(struct 
> mlx5_core_dev *dev,
>  static void free_cmd_box(struct mlx5_core_dev *dev,
>struct mlx5_cmd_mailbox *mailbox)
>  {
> - pci_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
> + dma_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
>   kfree(mailbox);
>  }
>  
> @@ -1696,7 +1696,8 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
>   return -EINVAL;
>   }
>  
> - cmd->pool = pci_pool_create("mlx5_cmd", dev->pdev, size, align, 0);
> + cmd->pool = dma_pool_create("mlx5_cmd", >pdev->dev, size, align,
> + 0);
>   if (!cmd->pool)
>   return -ENOMEM;
>  
> @@ -1786,7 +1787,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
>   free_cmd_page(dev, cmd);
>  
>  err_free_pool:
> - pci_pool_destroy(cmd->pool);
> + dma_pool_destroy(cmd->pool);
>  
>   return err;
>  }
> @@ -1800,6 +1801,6 @@ void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
>   destroy_workqueue(cmd->wq);
>   destroy_msg_cache(dev);
>   free_cmd_page(dev, cmd);
> - pci_pool_destroy(cmd->pool);
> + dma_pool_destroy(cmd->pool);
>  }
>  EXPORT_SYMBOL(mlx5_cmd_cleanup);
> diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
> index 2fcff6b..13a267c 100644
> --- a/include/linux/mlx5/driver.h
> +++ b/include/linux/mlx5/driver.h
> @@ -284,7 +284,7 @@ struct mlx5_cmd {
>   struct semaphore pages_sem;
>   int mode;
>   struct mlx5_cmd_work_ent *ent_arr[MLX5_MAX_COMMANDS];
> - struct pci_pool *pool;
> + struct dma_pool *pool;
>   struct mlx5_cmd_debug dbg;
>   struct cmd_msg_cache cache[MLX5_NUM_COMMAND_CACHES];
>   int checksum_disabled;
> -- 
> 2.9.3
> 

Re: [PATCH v3 06/20] mlx5: Replace PCI pool old API

[Peter Senna Tschudin]

On Sun, Feb 26, 2017 at 08:24:11PM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.
> 
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Romain Perier 
> ---
>  drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 11 ++-
>  include/linux/mlx5/driver.h   |  2 +-
>  2 files changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c 
> b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
> index caa837e..6eef344 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
> @@ -1061,7 +1061,7 @@ static struct mlx5_cmd_mailbox *alloc_cmd_box(struct 
> mlx5_core_dev *dev,
>   if (!mailbox)
>   return ERR_PTR(-ENOMEM);
>  
> - mailbox->buf = pci_pool_zalloc(dev->cmd.pool, flags,
> + mailbox->buf = dma_pool_zalloc(dev->cmd.pool, flags,
>  >dma);
>   if (!mailbox->buf) {
>   mlx5_core_dbg(dev, "failed allocation\n");
> @@ -1076,7 +1076,7 @@ static struct mlx5_cmd_mailbox *alloc_cmd_box(struct 
> mlx5_core_dev *dev,
>  static void free_cmd_box(struct mlx5_core_dev *dev,
>struct mlx5_cmd_mailbox *mailbox)
>  {
> - pci_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
> + dma_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
>   kfree(mailbox);
>  }
>  
> @@ -1696,7 +1696,8 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
>   return -EINVAL;
>   }
>  
> - cmd->pool = pci_pool_create("mlx5_cmd", dev->pdev, size, align, 0);
> + cmd->pool = dma_pool_create("mlx5_cmd", >pdev->dev, size, align,
> + 0);
>   if (!cmd->pool)
>   return -ENOMEM;
>  
> @@ -1786,7 +1787,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
>   free_cmd_page(dev, cmd);
>  
>  err_free_pool:
> - pci_pool_destroy(cmd->pool);
> + dma_pool_destroy(cmd->pool);
>  
>   return err;
>  }
> @@ -1800,6 +1801,6 @@ void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
>   destroy_workqueue(cmd->wq);
>   destroy_msg_cache(dev);
>   free_cmd_page(dev, cmd);
> - pci_pool_destroy(cmd->pool);
> + dma_pool_destroy(cmd->pool);
>  }
>  EXPORT_SYMBOL(mlx5_cmd_cleanup);
> diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
> index 2fcff6b..13a267c 100644
> --- a/include/linux/mlx5/driver.h
> +++ b/include/linux/mlx5/driver.h
> @@ -284,7 +284,7 @@ struct mlx5_cmd {
>   struct semaphore pages_sem;
>   int mode;
>   struct mlx5_cmd_work_ent *ent_arr[MLX5_MAX_COMMANDS];
> - struct pci_pool *pool;
> + struct dma_pool *pool;
>   struct mlx5_cmd_debug dbg;
>   struct cmd_msg_cache cache[MLX5_NUM_COMMAND_CACHES];
>   int checksum_disabled;
> -- 
> 2.9.3
> 

Re: [PATCH] usb: misc: remove unnecessary code

[Peter Senna Tschudin]

On Mon, Feb 20, 2017 at 05:28:46PM -0600, Gustavo A. R. Silva wrote:
> 'val' is an unsigned variable, and less-than-zero comparison of an unsigned
> variable is never true.

I would add that val is set by kstrtoul() that converts a string to an
unsigned long.

> 
> Addresses-Coverity-ID: 1230257
Reviewed-by: Peter Senna Tschudin <peter.se...@gmail.com>
> Signed-off-by: Gustavo A. R. Silva <garsi...@embeddedor.com>
> ---
>  drivers/usb/misc/lvstest.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/usb/misc/lvstest.c b/drivers/usb/misc/lvstest.c
> index c7c2104..6f37610 100644
> --- a/drivers/usb/misc/lvstest.c
> +++ b/drivers/usb/misc/lvstest.c
> @@ -193,7 +193,7 @@ static ssize_t u2_timeout_store(struct device *dev,
>   return ret;
>   }
>  
> - if (val < 0 || val > 127)
> + if (val > 127)
>   return -EINVAL;
>  
>   ret = lvs_rh_set_port_feature(hdev, lvs->portnum | (val << 8),
> -- 
> 2.5.0
> 

Re: [PATCH] usb: misc: remove unnecessary code

[Peter Senna Tschudin]

On Mon, Feb 20, 2017 at 05:28:46PM -0600, Gustavo A. R. Silva wrote:
> 'val' is an unsigned variable, and less-than-zero comparison of an unsigned
> variable is never true.

I would add that val is set by kstrtoul() that converts a string to an
unsigned long.

> 
> Addresses-Coverity-ID: 1230257
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Gustavo A. R. Silva 
> ---
>  drivers/usb/misc/lvstest.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/usb/misc/lvstest.c b/drivers/usb/misc/lvstest.c
> index c7c2104..6f37610 100644
> --- a/drivers/usb/misc/lvstest.c
> +++ b/drivers/usb/misc/lvstest.c
> @@ -193,7 +193,7 @@ static ssize_t u2_timeout_store(struct device *dev,
>   return ret;
>   }
>  
> - if (val < 0 || val > 127)
> + if (val > 127)
>   return -EINVAL;
>  
>   ret = lvs_rh_set_port_feature(hdev, lvs->portnum | (val << 8),
> -- 
> 2.5.0
> 

Re: [PATCH 1/2] media: pci: saa7164: remove unnecessary code

[Peter Senna Tschudin]

On Mon, Feb 20, 2017 at 09:46:58PM -0600, Gustavo A. R. Silva wrote:
> Remove unnecessary variable 'loop'.
> 
Reviewed-by: Peter Senna Tschudin <peter.se...@gmail.com>
> Signed-off-by: Gustavo A. R. Silva <garsi...@embeddedor.com>
> ---
>  drivers/media/pci/saa7164/saa7164-cmd.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/media/pci/saa7164/saa7164-cmd.c 
> b/drivers/media/pci/saa7164/saa7164-cmd.c
> index 45951b3..169c90a 100644
> --- a/drivers/media/pci/saa7164/saa7164-cmd.c
> +++ b/drivers/media/pci/saa7164/saa7164-cmd.c
> @@ -134,14 +134,13 @@ int saa7164_irq_dequeue(struct saa7164_dev *dev)
>   * -bus/c running buffer. */
>  static int saa7164_cmd_dequeue(struct saa7164_dev *dev)
>  {
> - int loop = 1;
>   int ret;
>   u32 timeout;
>   wait_queue_head_t *q = NULL;
>   u8 tmp[512];
>   dprintk(DBGLVL_CMD, "%s()\n", __func__);
>  
> - while (loop) {
> + while (true) {
>  
>   struct tmComResInfo tRsp = { 0, 0, 0, 0, 0, 0 };
>   ret = saa7164_bus_get(dev, , NULL, 1);
> -- 
> 2.5.0
> 

Re: [PATCH 1/2] media: pci: saa7164: remove unnecessary code

[Peter Senna Tschudin]

On Mon, Feb 20, 2017 at 09:46:58PM -0600, Gustavo A. R. Silva wrote:
> Remove unnecessary variable 'loop'.
> 
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Gustavo A. R. Silva 
> ---
>  drivers/media/pci/saa7164/saa7164-cmd.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/media/pci/saa7164/saa7164-cmd.c 
> b/drivers/media/pci/saa7164/saa7164-cmd.c
> index 45951b3..169c90a 100644
> --- a/drivers/media/pci/saa7164/saa7164-cmd.c
> +++ b/drivers/media/pci/saa7164/saa7164-cmd.c
> @@ -134,14 +134,13 @@ int saa7164_irq_dequeue(struct saa7164_dev *dev)
>   * -bus/c running buffer. */
>  static int saa7164_cmd_dequeue(struct saa7164_dev *dev)
>  {
> - int loop = 1;
>   int ret;
>   u32 timeout;
>   wait_queue_head_t *q = NULL;
>   u8 tmp[512];
>   dprintk(DBGLVL_CMD, "%s()\n", __func__);
>  
> - while (loop) {
> + while (true) {
>  
>   struct tmComResInfo tRsp = { 0, 0, 0, 0, 0, 0 };
>   ret = saa7164_bus_get(dev, , NULL, 1);
> -- 
> 2.5.0
> 

Re: [PATCH 2/2] media: pci: saa7164: remove dead code

[Peter Senna Tschudin]

On Mon, Feb 20, 2017 at 09:49:59PM -0600, Gustavo A. R. Silva wrote:
> Remove dead code. The following line of code is never reached:
> return SAA_OK;
> 
> Addresses-Coverity-ID: 114283
Reviewed-by: Peter Senna Tschudin <peter.se...@gmail.com>
> Signed-off-by: Gustavo A. R. Silva <garsi...@embeddedor.com>
> ---
>  drivers/media/pci/saa7164/saa7164-cmd.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/media/pci/saa7164/saa7164-cmd.c 
> b/drivers/media/pci/saa7164/saa7164-cmd.c
> index 169c90a..fb19498 100644
> --- a/drivers/media/pci/saa7164/saa7164-cmd.c
> +++ b/drivers/media/pci/saa7164/saa7164-cmd.c
> @@ -181,8 +181,6 @@ static int saa7164_cmd_dequeue(struct saa7164_dev *dev)
>   wake_up(q);
>   return SAA_OK;
>   }
> -
> - return SAA_OK;
>  }
>  
>  static int saa7164_cmd_set(struct saa7164_dev *dev, struct tmComResInfo *msg,
> -- 
> 2.5.0
> 

Re: [PATCH 2/2] media: pci: saa7164: remove dead code

[Peter Senna Tschudin]

On Mon, Feb 20, 2017 at 09:49:59PM -0600, Gustavo A. R. Silva wrote:
> Remove dead code. The following line of code is never reached:
> return SAA_OK;
> 
> Addresses-Coverity-ID: 114283
Reviewed-by: Peter Senna Tschudin 
> Signed-off-by: Gustavo A. R. Silva 
> ---
>  drivers/media/pci/saa7164/saa7164-cmd.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/media/pci/saa7164/saa7164-cmd.c 
> b/drivers/media/pci/saa7164/saa7164-cmd.c
> index 169c90a..fb19498 100644
> --- a/drivers/media/pci/saa7164/saa7164-cmd.c
> +++ b/drivers/media/pci/saa7164/saa7164-cmd.c
> @@ -181,8 +181,6 @@ static int saa7164_cmd_dequeue(struct saa7164_dev *dev)
>   wake_up(q);
>   return SAA_OK;
>   }
> -
> - return SAA_OK;
>  }
>  
>  static int saa7164_cmd_set(struct saa7164_dev *dev, struct tmComResInfo *msg,
> -- 
> 2.5.0
> 

Re: [RFC v2 11/20] scsi: megaraid: Replace PCI pool old API

[Peter Senna Tschudin]

On Sat, Feb 18, 2017 at 09:35:47AM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.

Did not apply on linux-next-20170217


> 
> Signed-off-by: Romain Perier 
> ---
>  drivers/scsi/megaraid/megaraid_mbox.c   | 30 -
>  drivers/scsi/megaraid/megaraid_mm.c | 29 
>  drivers/scsi/megaraid/megaraid_sas_base.c   | 25 +++---
>  drivers/scsi/megaraid/megaraid_sas_fusion.c | 51 
> +++--
>  4 files changed, 70 insertions(+), 65 deletions(-)
> 
> diff --git a/drivers/scsi/megaraid/megaraid_mbox.c 
> b/drivers/scsi/megaraid/megaraid_mbox.c
> index f0987f2..6d0bd3a 100644
> --- a/drivers/scsi/megaraid/megaraid_mbox.c
> +++ b/drivers/scsi/megaraid/megaraid_mbox.c
> @@ -1153,8 +1153,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>  
>   // Allocate memory for 16-bytes aligned mailboxes
> - raid_dev->mbox_pool_handle = pci_pool_create("megaraid mbox pool",
> - adapter->pdev,
> + raid_dev->mbox_pool_handle = dma_pool_create("megaraid mbox pool",
> + >pdev->dev,
>   sizeof(mbox64_t) + 16,
>   16, 0);
>  
> @@ -1164,7 +1164,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   mbox_pci_blk = raid_dev->mbox_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - mbox_pci_blk[i].vaddr = pci_pool_alloc(
> + mbox_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->mbox_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1181,8 +1181,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>* share common memory pool. Passthru structures piggyback on memory
>* allocted to extended passthru since passthru is smaller of the two
>*/
> - raid_dev->epthru_pool_handle = pci_pool_create("megaraid mbox pthru",
> - adapter->pdev, sizeof(mraid_epassthru_t), 128, 0);
> + raid_dev->epthru_pool_handle = dma_pool_create("megaraid mbox pthru",
> + >pdev->dev, sizeof(mraid_epassthru_t), 128, 0);
>  
>   if (raid_dev->epthru_pool_handle == NULL) {
>   goto fail_setup_dma_pool;
> @@ -1190,7 +1190,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   epthru_pci_blk = raid_dev->epthru_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - epthru_pci_blk[i].vaddr = pci_pool_alloc(
> + epthru_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->epthru_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1202,8 +1202,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   // Allocate memory for each scatter-gather list. Request for 512 bytes
>   // alignment for each sg list
> - raid_dev->sg_pool_handle = pci_pool_create("megaraid mbox sg",
> - adapter->pdev,
> + raid_dev->sg_pool_handle = dma_pool_create("megaraid mbox sg",
> + >pdev->dev,
>   sizeof(mbox_sgl64) * MBOX_MAX_SG_SIZE,
>   512, 0);
>  
> @@ -1213,7 +1213,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   sg_pci_blk = raid_dev->sg_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - sg_pci_blk[i].vaddr = pci_pool_alloc(
> + sg_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->sg_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1249,29 +1249,29 @@ megaraid_mbox_teardown_dma_pools(adapter_t *adapter)
>  
>   sg_pci_blk = raid_dev->sg_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS && sg_pci_blk[i].vaddr; i++) {
> - pci_pool_free(raid_dev->sg_pool_handle, sg_pci_blk[i].vaddr,
> + dma_pool_free(raid_dev->sg_pool_handle, sg_pci_blk[i].vaddr,
>   sg_pci_blk[i].dma_addr);
>   }
>   if (raid_dev->sg_pool_handle)
> - pci_pool_destroy(raid_dev->sg_pool_handle);
> + dma_pool_destroy(raid_dev->sg_pool_handle);
>  
>  
>   epthru_pci_blk = raid_dev->epthru_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS && epthru_pci_blk[i].vaddr; i++) {
> - pci_pool_free(raid_dev->epthru_pool_handle,
> + dma_pool_free(raid_dev->epthru_pool_handle,
>   epthru_pci_blk[i].vaddr, 

Re: [RFC v2 11/20] scsi: megaraid: Replace PCI pool old API

[Peter Senna Tschudin]

On Sat, Feb 18, 2017 at 09:35:47AM +0100, Romain Perier wrote:
> The PCI pool API is deprecated. This commits replaces the PCI pool old
> API by the appropriated function with the DMA pool API.

Did not apply on linux-next-20170217


> 
> Signed-off-by: Romain Perier 
> ---
>  drivers/scsi/megaraid/megaraid_mbox.c   | 30 -
>  drivers/scsi/megaraid/megaraid_mm.c | 29 
>  drivers/scsi/megaraid/megaraid_sas_base.c   | 25 +++---
>  drivers/scsi/megaraid/megaraid_sas_fusion.c | 51 
> +++--
>  4 files changed, 70 insertions(+), 65 deletions(-)
> 
> diff --git a/drivers/scsi/megaraid/megaraid_mbox.c 
> b/drivers/scsi/megaraid/megaraid_mbox.c
> index f0987f2..6d0bd3a 100644
> --- a/drivers/scsi/megaraid/megaraid_mbox.c
> +++ b/drivers/scsi/megaraid/megaraid_mbox.c
> @@ -1153,8 +1153,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>  
>   // Allocate memory for 16-bytes aligned mailboxes
> - raid_dev->mbox_pool_handle = pci_pool_create("megaraid mbox pool",
> - adapter->pdev,
> + raid_dev->mbox_pool_handle = dma_pool_create("megaraid mbox pool",
> + >pdev->dev,
>   sizeof(mbox64_t) + 16,
>   16, 0);
>  
> @@ -1164,7 +1164,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   mbox_pci_blk = raid_dev->mbox_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - mbox_pci_blk[i].vaddr = pci_pool_alloc(
> + mbox_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->mbox_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1181,8 +1181,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>* share common memory pool. Passthru structures piggyback on memory
>* allocted to extended passthru since passthru is smaller of the two
>*/
> - raid_dev->epthru_pool_handle = pci_pool_create("megaraid mbox pthru",
> - adapter->pdev, sizeof(mraid_epassthru_t), 128, 0);
> + raid_dev->epthru_pool_handle = dma_pool_create("megaraid mbox pthru",
> + >pdev->dev, sizeof(mraid_epassthru_t), 128, 0);
>  
>   if (raid_dev->epthru_pool_handle == NULL) {
>   goto fail_setup_dma_pool;
> @@ -1190,7 +1190,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   epthru_pci_blk = raid_dev->epthru_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - epthru_pci_blk[i].vaddr = pci_pool_alloc(
> + epthru_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->epthru_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1202,8 +1202,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   // Allocate memory for each scatter-gather list. Request for 512 bytes
>   // alignment for each sg list
> - raid_dev->sg_pool_handle = pci_pool_create("megaraid mbox sg",
> - adapter->pdev,
> + raid_dev->sg_pool_handle = dma_pool_create("megaraid mbox sg",
> + >pdev->dev,
>   sizeof(mbox_sgl64) * MBOX_MAX_SG_SIZE,
>   512, 0);
>  
> @@ -1213,7 +1213,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
>  
>   sg_pci_blk = raid_dev->sg_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
> - sg_pci_blk[i].vaddr = pci_pool_alloc(
> + sg_pci_blk[i].vaddr = dma_pool_alloc(
>   raid_dev->sg_pool_handle,
>   GFP_KERNEL,
>   _pci_blk[i].dma_addr);
> @@ -1249,29 +1249,29 @@ megaraid_mbox_teardown_dma_pools(adapter_t *adapter)
>  
>   sg_pci_blk = raid_dev->sg_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS && sg_pci_blk[i].vaddr; i++) {
> - pci_pool_free(raid_dev->sg_pool_handle, sg_pci_blk[i].vaddr,
> + dma_pool_free(raid_dev->sg_pool_handle, sg_pci_blk[i].vaddr,
>   sg_pci_blk[i].dma_addr);
>   }
>   if (raid_dev->sg_pool_handle)
> - pci_pool_destroy(raid_dev->sg_pool_handle);
> + dma_pool_destroy(raid_dev->sg_pool_handle);
>  
>  
>   epthru_pci_blk = raid_dev->epthru_pool;
>   for (i = 0; i < MBOX_MAX_SCSI_CMDS && epthru_pci_blk[i].vaddr; i++) {
> - pci_pool_free(raid_dev->epthru_pool_handle,
> + dma_pool_free(raid_dev->epthru_pool_handle,
>   epthru_pci_blk[i].vaddr, epthru_pci_blk[i].dma_addr);
>   }
>