[PATCH] tick/broadcast: set next event of bc to KTIME_MAX

[Qiao Zhou]

In tick_handle_oneshot_broadcast, it doesn't reprogram tick-broadcast
when no more event to set. In hardware it's true, but the next event
value on broadcast device is expired, which will be used in idle
broadcast enter. It may cause no more timer set in system in below case.

nte_l: next_timer_event on local timer 
nte_b: next_timer_event on broadcast timer
time: in ms, assume HZ = 128

 core0core1 broadcast timer
990: nte_l = 1004 nte_l = 1004  nte_b = 1000
 enter idle   enter idlente_b = 1000 
---
 996: non-timer interrupt wake up both core0 & core1   
---
996: core0/1 exit idle, clear broadcast oneshot mask, set
 local timer next event(nte_l = 996 + 8 = 1004)
1000:broadcast interrupt comes, one shot mask is 0. do not
 program broadcast next time event.(nte_b = 1000)
1002:core0/1 enter idle, shut down local timer. since nte_l
 is larger than nte_b, do not program broadcast timer.
1004:no more timer interrupt, not report rcu quiescent state
 completion. no new timer is set in tick_nohz_idle_enter
 when core0/1 enter/exit idle. at last system will crash.

tick_program_event(dev->next_event, 1) is not guaranteed to generate
local timer interrupt when exiting idle. When local timer is shutdown,
we need to compare local next event to updated broadcast next event.
So when there is no broadcast next event to set on hardware, we need
to set software next_event to KTIME_MAX.

Signed-off-by: Qiao Zhou 
---
 kernel/time/tick-broadcast.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/kernel/time/tick-broadcast.c b/kernel/time/tick-broadcast.c
index b398c2e..7648326 100644
--- a/kernel/time/tick-broadcast.c
+++ b/kernel/time/tick-broadcast.c
@@ -661,6 +661,14 @@ static void tick_handle_oneshot_broadcast(struct 
clock_event_device *dev)
 */
if (next_event != KTIME_MAX)
tick_broadcast_set_event(dev, next_cpu, next_event);
+   else
+   /*
+* not program broadcast timer, but set the value to show that
+* the next event is not set, which is used in
+* __tick_broadcast_oneshot_control in idle tick_broadcast
+* enter/exit control flow.
+*/
+   dev->next_event.tv64 = KTIME_MAX;
 
raw_spin_unlock(&tick_broadcast_lock);
 
-- 
2.7.4

[PATCH V2] arm64: traps: disable irq in die()

[Qiao Zhou]

In current die(), the irq is disabled for __die() handle, not
including the possible panic() handling. Since the log in __die()
can take several hundreds ms, new irq might come and interrupt
current die().

If the process calling die() holds some critical resource, and some
other process scheduled later also needs it, then it would deadlock.
The first panic will not be executed.

So here disable irq for the whole flow of die().

Signed-off-by: Qiao Zhou 
---
 arch/arm64/kernel/traps.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index 0805b44..2e2ff88 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -274,10 +274,12 @@ static DEFINE_RAW_SPINLOCK(die_lock);
 void die(const char *str, struct pt_regs *regs, int err)
 {
int ret;
+   unsigned long flags;
+
+   raw_spin_lock_irqsave(&die_lock, flags);
 
oops_enter();
 
-   raw_spin_lock_irq(&die_lock);
console_verbose();
bust_spinlocks(1);
ret = __die(str, err, regs);
@@ -287,13 +289,15 @@ void die(const char *str, struct pt_regs *regs, int err)
 
bust_spinlocks(0);
add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
-   raw_spin_unlock_irq(&die_lock);
oops_exit();
 
if (in_interrupt())
panic("Fatal exception in interrupt");
if (panic_on_oops)
panic("Fatal exception");
+
+   raw_spin_unlock_irqrestore(&die_lock, flags);
+
if (ret != NOTIFY_STOP)
do_exit(SIGSEGV);
 }
-- 
2.7.4

[PATCH] *** arm64: traps: disable irq in die() ***

[Qiao Zhou]

I met several cases that die() is interrupted once irq is unlocked, on
our platform which has multiple cpus, and enables panic_on_oops. It deadlock
in some schedule related code, and hard-lockup is triggered. So the first
criminal field is gone.

So I want to protect the whole flow of die() from irq, and let the panic
flow execute correctly. Not sure this patch is suitable or there is better
way to solve it. Please help to give some comments. Thanks in advance.

Qiao Zhou (1):
  arm64: traps: disable irq in die()

 arch/arm64/kernel/traps.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

-- 
2.7.4

[PATCH] arm64: traps: disable irq in die()

[Qiao Zhou]

In current die(), the irq is disabled for __die() handle, not
including the possible panic() handling. Since the log in __die()
can take several hundreds ms, new irq might come and interrupt
current die().

If the process calling die() holds some critical resource, and some
other process scheduled later also needs it, then it would deadlock.
The first panic will not be executed.

So here disable irq for the whole flow of die().

Signed-off-by: Qiao Zhou 
---
 arch/arm64/kernel/traps.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index 0805b44..b12bf0f 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -274,10 +274,13 @@ static DEFINE_RAW_SPINLOCK(die_lock);
 void die(const char *str, struct pt_regs *regs, int err)
 {
int ret;
+   unsigned long flags;
+
+   local_irq_save(flags);
 
oops_enter();
 
-   raw_spin_lock_irq(&die_lock);
+   raw_spin_lock(&die_lock);
console_verbose();
bust_spinlocks(1);
ret = __die(str, err, regs);
@@ -287,13 +290,16 @@ void die(const char *str, struct pt_regs *regs, int err)
 
bust_spinlocks(0);
add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
-   raw_spin_unlock_irq(&die_lock);
+   raw_spin_unlock(&die_lock);
oops_exit();
 
if (in_interrupt())
panic("Fatal exception in interrupt");
if (panic_on_oops)
panic("Fatal exception");
+
+   local_irq_restore(flags);
+
if (ret != NOTIFY_STOP)
do_exit(SIGSEGV);
 }
-- 
2.7.4

Re: [PATCH] dma: mmp-tdma: refine dma disable and dma-pos update

[Qiao Zhou]

On 03/03/2015 12:56 AM, Vinod Koul wrote:

And that is why people use git-send email and don't copy patches. Pls resend
again, as your MUA has wrapped this so cant apply
Thanks for correcting and I'll pay attention to it in future. The patch 
is re-sent via git-send email.


--

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Qiao
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[PATCH v2] dma: mmp-tdma: refine dma disable and dma-pos update

[Qiao Zhou]

Below are the refinements.
1. Set DMA abort bit when disabling dma channel. This will clear
the remaining data in dma FIFO, to fix channel-swap issue.
2. Read DMA HW pointer when updating DMA status. Previously dma
position is calculated by adding one period size in dma interrupt.
This is inaccurate/insufficient for some high-quality audio APP.
Since interrupt bottom half handler has variable schedule delay,
it causes big error when calculating sample delay. Read the actual
HW pointer and feedback can improve the accuracy.
3. Do some minor code clean.

Signed-off-by: Qiao Zhou 
---
 drivers/dma/mmp_tdma.c |   31 +--
 1 files changed, 25 insertions(+), 6 deletions(-)

diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index 70c2fa9..b6f4e1f 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -110,7 +110,7 @@ struct mmp_tdma_chan {
struct tasklet_struct   tasklet;
 
struct mmp_tdma_desc*desc_arr;
-   phys_addr_t desc_arr_phys;
+   dma_addr_t  desc_arr_phys;
int desc_num;
enum dma_transfer_direction dir;
dma_addr_t  dev_addr;
@@ -166,9 +166,12 @@ static void mmp_tdma_enable_chan(struct mmp_tdma_chan 
*tdmac)
 static int mmp_tdma_disable_chan(struct dma_chan *chan)
 {
struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+   u32 tdcr;
 
-   writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
-   tdmac->reg_base + TDCR);
+   tdcr = readl(tdmac->reg_base + TDCR);
+   tdcr |= TDCR_ABR;
+   tdcr &= ~TDCR_CHANEN;
+   writel(tdcr, tdmac->reg_base + TDCR);
 
tdmac->status = DMA_COMPLETE;
 
@@ -296,12 +299,27 @@ static int mmp_tdma_clear_chan_irq(struct mmp_tdma_chan 
*tdmac)
return -EAGAIN;
 }
 
+static size_t mmp_tdma_get_pos(struct mmp_tdma_chan *tdmac)
+{
+   size_t reg;
+
+   if (tdmac->idx == 0) {
+   reg = __raw_readl(tdmac->reg_base + TDSAR);
+   reg -= tdmac->desc_arr[0].src_addr;
+   } else if (tdmac->idx == 1) {
+   reg = __raw_readl(tdmac->reg_base + TDDAR);
+   reg -= tdmac->desc_arr[0].dst_addr;
+   } else
+   return -EINVAL;
+
+   return reg;
+}
+
 static irqreturn_t mmp_tdma_chan_handler(int irq, void *dev_id)
 {
struct mmp_tdma_chan *tdmac = dev_id;
 
if (mmp_tdma_clear_chan_irq(tdmac) == 0) {
-   tdmac->pos = (tdmac->pos + tdmac->period_len) % tdmac->buf_len;
tasklet_schedule(&tdmac->tasklet);
return IRQ_HANDLED;
} else
@@ -343,7 +361,7 @@ static void mmp_tdma_free_descriptor(struct mmp_tdma_chan 
*tdmac)
int size = tdmac->desc_num * sizeof(struct mmp_tdma_desc);
 
gpool = tdmac->pool;
-   if (tdmac->desc_arr)
+   if (gpool && tdmac->desc_arr)
gen_pool_free(gpool, (unsigned long)tdmac->desc_arr,
size);
tdmac->desc_arr = NULL;
@@ -499,6 +517,7 @@ static enum dma_status mmp_tdma_tx_status(struct dma_chan 
*chan,
 {
struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
 
+   tdmac->pos = mmp_tdma_get_pos(tdmac);
dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie,
 tdmac->buf_len - tdmac->pos);
 
@@ -610,7 +629,7 @@ static int mmp_tdma_probe(struct platform_device *pdev)
int i, ret;
int irq = 0, irq_num = 0;
int chan_num = TDMA_CHANNEL_NUM;
-   struct gen_pool *pool;
+   struct gen_pool *pool = NULL;
 
of_id = of_match_device(mmp_tdma_dt_ids, &pdev->dev);
if (of_id)
-- 
1.7.0.4

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Re: [PATCH] dma: mmp-tdma: refine dma disable and dma-pos update

[Qiao Zhou]

On 02/23/2015 07:23 PM, Vinod Koul wrote:

On Thu, Feb 05, 2015 at 08:54:19PM +0800, Qiao Zhou wrote:

Below are the refinements.
1. Set DMA abort bit when disabling dma channel. This will clear
the remaining data in dma FIFO, to fix channel-swap issue.
2. Read DMA HW pointer when updating DMA status. Previously dma
position is calculated by adding one period size in dma interrupt.
This is inaccurate/insufficient for some high-quality audio APP.
Since interrupt bottom half handler has variable schedule delay,
it causes big error when calculating sample delay. Read the actual
HW pointer and feedback can improve the accuracy.
3. Do some minor code clean.

This fails to apply for me, care to rebase pls


Rebased. Thanks.

From b9cd9aca9c7700423276ba7fb49f267e00e63792 Mon Sep 17 00:00:00 2001
From: Qiao Zhou 
Date: Sat, 28 Feb 2015 17:05:21 +0800
Subject: [PATCH v2] dma: mmp-tdma: refine dma disable and dma-pos update

Below are the refinements.
1. Set DMA abort bit when disabling dma channel. This will clear
the remaining data in dma FIFO, to fix channel-swap issue.
2. Read DMA HW pointer when updating DMA status. Previously dma
position is calculated by adding one period size in dma interrupt.
This is inaccurate/insufficient for some high-quality audio APP.
Since interrupt bottom half handler has variable schedule delay,
it causes big error when calculating sample delay. Read the actual
HW pointer and feedback can improve the accuracy.
3. Do some minor code clean.

Signed-off-by: Qiao Zhou 
---
 drivers/dma/mmp_tdma.c |   31 +--
 1 files changed, 25 insertions(+), 6 deletions(-)

diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index 70c2fa9..b6f4e1f 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -110,7 +110,7 @@ struct mmp_tdma_chan {
struct tasklet_struct   tasklet;

struct mmp_tdma_desc*desc_arr;
-   phys_addr_t desc_arr_phys;
+   dma_addr_t  desc_arr_phys;
int desc_num;
enum dma_transfer_direction dir;
dma_addr_t  dev_addr;
@@ -166,9 +166,12 @@ static void mmp_tdma_enable_chan(struct 
mmp_tdma_chan *tdmac)

 static int mmp_tdma_disable_chan(struct dma_chan *chan)
 {
struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+   u32 tdcr;

-   writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
-   tdmac->reg_base + TDCR);
+   tdcr = readl(tdmac->reg_base + TDCR);
+   tdcr |= TDCR_ABR;
+   tdcr &= ~TDCR_CHANEN;
+   writel(tdcr, tdmac->reg_base + TDCR);

tdmac->status = DMA_COMPLETE;

@@ -296,12 +299,27 @@ static int mmp_tdma_clear_chan_irq(struct 
mmp_tdma_chan *tdmac)

return -EAGAIN;
 }

+static size_t mmp_tdma_get_pos(struct mmp_tdma_chan *tdmac)
+{
+   size_t reg;
+
+   if (tdmac->idx == 0) {
+   reg = __raw_readl(tdmac->reg_base + TDSAR);
+   reg -= tdmac->desc_arr[0].src_addr;
+   } else if (tdmac->idx == 1) {
+   reg = __raw_readl(tdmac->reg_base + TDDAR);
+   reg -= tdmac->desc_arr[0].dst_addr;
+   } else
+   return -EINVAL;
+
+   return reg;
+}
+
 static irqreturn_t mmp_tdma_chan_handler(int irq, void *dev_id)
 {
struct mmp_tdma_chan *tdmac = dev_id;

if (mmp_tdma_clear_chan_irq(tdmac) == 0) {
-   tdmac->pos = (tdmac->pos + tdmac->period_len) % tdmac->buf_len;
tasklet_schedule(&tdmac->tasklet);
return IRQ_HANDLED;
} else
@@ -343,7 +361,7 @@ static void mmp_tdma_free_descriptor(struct 
mmp_tdma_chan *tdmac)

int size = tdmac->desc_num * sizeof(struct mmp_tdma_desc);

gpool = tdmac->pool;
-   if (tdmac->desc_arr)
+   if (gpool && tdmac->desc_arr)
gen_pool_free(gpool, (unsigned long)tdmac->desc_arr,
size);
tdmac->desc_arr = NULL;
@@ -499,6 +517,7 @@ static enum dma_status mmp_tdma_tx_status(struct 
dma_chan *chan,

 {
struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);

+   tdmac->pos = mmp_tdma_get_pos(tdmac);
dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie,
 tdmac->buf_len - tdmac->pos);

@@ -610,7 +629,7 @@ static int mmp_tdma_probe(struct platform_device *pdev)
int i, ret;
int irq = 0, irq_num = 0;
int chan_num = TDMA_CHANNEL_NUM;
-   struct gen_pool *pool;
+   struct gen_pool *pool = NULL;

of_id = of_match_device(mmp_tdma_dt_ids, &pdev->dev);
if (of_id)
--
1.7.0.4


--

Best Regards
Qiao
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[PATCH] dma: mmp-tdma: refine dma disable and dma-pos update

[Qiao Zhou]

Below are the refinements.
1. Set DMA abort bit when disabling dma channel. This will clear
the remaining data in dma FIFO, to fix channel-swap issue.
2. Read DMA HW pointer when updating DMA status. Previously dma
position is calculated by adding one period size in dma interrupt.
This is inaccurate/insufficient for some high-quality audio APP.
Since interrupt bottom half handler has variable schedule delay,
it causes big error when calculating sample delay. Read the actual
HW pointer and feedback can improve the accuracy.
3. Do some minor code clean.

Signed-off-by: Qiao Zhou 
---
 drivers/dma/mmp_tdma.c |   33 ++---
 1 file changed, 26 insertions(+), 7 deletions(-)

diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index bfb4695..b3c1a9c 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -19,7 +19,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -111,7 +110,7 @@ struct mmp_tdma_chan {
struct tasklet_struct   tasklet;
 
struct mmp_tdma_desc*desc_arr;
-   phys_addr_t desc_arr_phys;
+   dma_addr_t  desc_arr_phys;
int desc_num;
enum dma_transfer_direction dir;
dma_addr_t  dev_addr;
@@ -166,8 +165,12 @@ static void mmp_tdma_enable_chan(struct mmp_tdma_chan 
*tdmac)
 
 static void mmp_tdma_disable_chan(struct mmp_tdma_chan *tdmac)
 {
-   writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
-   tdmac->reg_base + TDCR);
+   u32 tdcr;
+
+   tdcr = readl(tdmac->reg_base + TDCR);
+   tdcr |= TDCR_ABR;
+   tdcr &= ~TDCR_CHANEN;
+   writel(tdcr, tdmac->reg_base + TDCR);
 
tdmac->status = DMA_COMPLETE;
 }
@@ -284,12 +287,27 @@ static int mmp_tdma_clear_chan_irq(struct mmp_tdma_chan 
*tdmac)
return -EAGAIN;
 }
 
+static size_t mmp_tdma_get_pos(struct mmp_tdma_chan *tdmac)
+{
+   size_t reg;
+
+   if (tdmac->idx == 0) {
+   reg = __raw_readl(tdmac->reg_base + TDSAR);
+   reg -= tdmac->desc_arr[0].src_addr;
+   } else if (tdmac->idx == 1) {
+   reg = __raw_readl(tdmac->reg_base + TDDAR);
+   reg -= tdmac->desc_arr[0].dst_addr;
+   } else
+   return -EINVAL;
+
+   return reg;
+}
+
 static irqreturn_t mmp_tdma_chan_handler(int irq, void *dev_id)
 {
struct mmp_tdma_chan *tdmac = dev_id;
 
if (mmp_tdma_clear_chan_irq(tdmac) == 0) {
-   tdmac->pos = (tdmac->pos + tdmac->period_len) % tdmac->buf_len;
tasklet_schedule(&tdmac->tasklet);
return IRQ_HANDLED;
} else
@@ -331,7 +349,7 @@ static void mmp_tdma_free_descriptor(struct mmp_tdma_chan 
*tdmac)
int size = tdmac->desc_num * sizeof(struct mmp_tdma_desc);
 
gpool = tdmac->pool;
-   if (tdmac->desc_arr)
+   if (gpool && tdmac->desc_arr)
gen_pool_free(gpool, (unsigned long)tdmac->desc_arr,
size);
tdmac->desc_arr = NULL;
@@ -495,6 +513,7 @@ static enum dma_status mmp_tdma_tx_status(struct dma_chan 
*chan,
 {
struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
 
+   tdmac->pos = mmp_tdma_get_pos(tdmac);
dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie,
 tdmac->buf_len - tdmac->pos);
 
@@ -606,7 +625,7 @@ static int mmp_tdma_probe(struct platform_device *pdev)
int i, ret;
int irq = 0, irq_num = 0;
int chan_num = TDMA_CHANNEL_NUM;
-   struct gen_pool *pool;
+   struct gen_pool *pool = NULL;
 
of_id = of_match_device(mmp_tdma_dt_ids, &pdev->dev);
if (of_id)
-- 
1.7.9.5

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[PATCH] dma: mmp-pdma: fix irq handler overwrite physical chan issue

[Qiao Zhou]

Some dma channels may be reserved for other purpose in other layer,
like secure driver in EL2/EL3. PDMA driver can see the interrupt
status, but it should not try to handle related interrupt, since it
doesn't belong to PDMA driver in kernel. These interrupts should be
handled by corresponding client/module.Otherwise, it will overwrite
illegal memory and cause unexpected issues, since pdma driver only
requests resources for pdma channels.

In PDMA driver, the reserved channels are at the end of total 32
channels. If we find interrupt bit index is not smaller than total
dma channels, we should ignore it.

Signed-off-by: Qiao Zhou 
---
 drivers/dma/mmp_pdma.c |3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/dma/mmp_pdma.c b/drivers/dma/mmp_pdma.c
index 8b8952f..68ab55f 100644
--- a/drivers/dma/mmp_pdma.c
+++ b/drivers/dma/mmp_pdma.c
@@ -219,6 +219,9 @@ static irqreturn_t mmp_pdma_int_handler(int irq, void 
*dev_id)
 
while (dint) {
i = __ffs(dint);
+   /* only handle interrupts belonging to pdma driver*/
+   if (i >= pdev->dma_channels)
+   break;
dint &= (dint - 1);
phy = &pdev->phy[i];
ret = mmp_pdma_chan_handler(irq, phy);
-- 
1.7.9.5

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[PATCH] ssp/pxa2xx: add ssp support for mach-mmp

[Qiao Zhou]

mach-mmp also uses ssp request/free APIs. Add mach-mmp support.
Otherwise there will be redefinition error.

Signed-off-by: Qiao Zhou 
---
 include/linux/pxa2xx_ssp.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h
index 4944420..8a2b87e 100644
--- a/include/linux/pxa2xx_ssp.h
+++ b/include/linux/pxa2xx_ssp.h
@@ -219,7 +219,7 @@ static inline u32 pxa_ssp_read_reg(struct ssp_device *dev, 
u32 reg)
return __raw_readl(dev->mmio_base + reg);
 }
 
-#ifdef CONFIG_ARCH_PXA
+#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
 struct ssp_device *pxa_ssp_request(int port, const char *label);
 void pxa_ssp_free(struct ssp_device *);
 struct ssp_device *pxa_ssp_request_of(const struct device_node *of_node,
-- 
1.7.0.4

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Re: [PATCH 0/2 V1] arm-mmp-build-sram-driver-alone

[Qiao Zhou]

On 12/05/2013 03:17 AM, Dan Williams wrote:

On Wed, Dec 4, 2013 at 3:24 AM, Qiao Zhou  wrote:

On 12/04/2013 07:17 PM, Haojian Zhuang wrote:


Dan indicated that you could pack these two patches into one. Whatever
it's also OK to use two patches.


Misunderstood it... Thanks for correcting.



Please combine the patches for two reasons:
1/ patch1 by itself makes the problem worse it prevents the mmp_tdma
driver from building even if CPU_MMP2 is selected.
2/ patch2 does not have a changelog and is the only user of the
enabling in patch1

Dan, I updated the patch according to your suggestions. please help take 
a look again. Thanks.


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Qiao
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[PATCH V2] arm-mmp-build-sram-driver-alone

[Qiao Zhou]

V2 -> V1:
combine the two patches together according to Dan's suggestion below.

>Please combine the patches for two reasons:
>1/ patch1 by itself makes the problem worse it prevents the mmp_tdma
>driver from building even if CPU_MMP2 is selected.
>2/ patch2 does not have a changelog and is the only user of the
>enabling in patch1

V1 -> V0:
No need for help text for MMP_SRAM in Kconfig and move it into MMP_TDMA
text in Kconfig.


Qiao Zhou (1):
  arm: mmp: build sram driver alone

 arch/arm/mach-mmp/Kconfig  |3 +++
 arch/arm/mach-mmp/Makefile |3 ++-
 drivers/dma/Kconfig|2 ++
 3 files changed, 7 insertions(+), 1 deletions(-)

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[PATCH V2] arm: mmp: build sram driver alone

[Qiao Zhou]

sram driver can be used by many chips besides CPU_MMP2, and so build
it alone. Also need to select MMP_SRAM for MMP_TDMA driver.

Reported-by: Dan Williams 
Signed-off-by: Qiao Zhou 
---
 arch/arm/mach-mmp/Kconfig  |3 +++
 arch/arm/mach-mmp/Makefile |3 ++-
 drivers/dma/Kconfig|2 ++
 3 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index ebdda83..ebdba87 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -136,4 +136,7 @@ config USB_EHCI_MV_U2O
help
  Enables support for OTG controller which can be switched to host mode.
 
+config MMP_SRAM
+   bool
+
 endif
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 9b702a1..98f0f63 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -7,7 +7,8 @@ obj-y   += common.o devices.o time.o
 # SoC support
 obj-$(CONFIG_CPU_PXA168)   += pxa168.o
 obj-$(CONFIG_CPU_PXA910)   += pxa910.o
-obj-$(CONFIG_CPU_MMP2) += mmp2.o sram.o
+obj-$(CONFIG_CPU_MMP2) += mmp2.o
+obj-$(CONFIG_MMP_SRAM) += sram.o
 
 ifeq ($(CONFIG_COMMON_CLK), )
 obj-y  += clock.o
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index dd2874e..599f0ae 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -288,9 +288,11 @@ config MMP_TDMA
bool "MMP Two-Channel DMA support"
depends on ARCH_MMP
select DMA_ENGINE
+   select MMP_SRAM
help
  Support the MMP Two-Channel DMA engine.
  This engine used for MMP Audio DMA and pxa910 SQU.
+ It needs sram driver under mach-mmp.
 
  Say Y here if you enabled MMP ADMA, otherwise say N.
 
-- 
1.7.0.4

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Re: [PATCH 0/2 V1] arm-mmp-build-sram-driver-alone

[Qiao Zhou]

On 12/04/2013 07:17 PM, Haojian Zhuang wrote:

Dan indicated that you could pack these two patches into one. Whatever
it's also OK to use two patches.

Misunderstood it... Thanks for correcting.

--

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Qiao
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[PATCH 2/2] dma: mmp-tdma: select sram driver

[Qiao Zhou]

Reported-by: Dan Williams 
Signed-off-by: Qiao Zhou 
---
 drivers/dma/Kconfig |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index dd2874e..599f0ae 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -288,9 +288,11 @@ config MMP_TDMA
bool "MMP Two-Channel DMA support"
depends on ARCH_MMP
select DMA_ENGINE
+   select MMP_SRAM
help
  Support the MMP Two-Channel DMA engine.
  This engine used for MMP Audio DMA and pxa910 SQU.
+ It needs sram driver under mach-mmp.
 
  Say Y here if you enabled MMP ADMA, otherwise say N.
 
-- 
1.7.0.4

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[PATCH 1/2] arm: mmp: build sram driver alone

[Qiao Zhou]

sram driver can be used by many chips besides CPU_MMP2, and so build
it alone.

Reported-by: Dan Williams 
Signed-off-by: Qiao Zhou 
---
 arch/arm/mach-mmp/Kconfig  |3 +++
 arch/arm/mach-mmp/Makefile |3 ++-
 2 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index ebdda83..ebdba87 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -136,4 +136,7 @@ config USB_EHCI_MV_U2O
help
  Enables support for OTG controller which can be switched to host mode.
 
+config MMP_SRAM
+   bool
+
 endif
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 9b702a1..98f0f63 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -7,7 +7,8 @@ obj-y   += common.o devices.o time.o
 # SoC support
 obj-$(CONFIG_CPU_PXA168)   += pxa168.o
 obj-$(CONFIG_CPU_PXA910)   += pxa910.o
-obj-$(CONFIG_CPU_MMP2) += mmp2.o sram.o
+obj-$(CONFIG_CPU_MMP2) += mmp2.o
+obj-$(CONFIG_MMP_SRAM) += sram.o
 
 ifeq ($(CONFIG_COMMON_CLK), )
 obj-y  += clock.o
-- 
1.7.0.4

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[PATCH 0/2 V1] arm-mmp-build-sram-driver-alone

[Qiao Zhou]

V1 -> V0:
No need for help text for MMP_SRAM in Kconfig and move it into MMP_TDMA
text in Kconfig.

Qiao Zhou (2):
  arm: mmp: build sram driver alone
  dma: mmp-tdma: select sram driver

 arch/arm/mach-mmp/Kconfig  |3 +++
 arch/arm/mach-mmp/Makefile |3 ++-
 drivers/dma/Kconfig|2 ++
 3 files changed, 7 insertions(+), 1 deletions(-)

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Re: [PATCH 1/2] arm: mmp: build sram driver alone

[Qiao Zhou]

On 12/04/2013 03:56 PM, Dan Williams wrote:

On Tue, Dec 3, 2013 at 11:05 PM, Qiao Zhou  wrote:

sram driver can be used by many chips besides CPU_MMP2, and so build
it alone.

Reported-by: Dan Williams 
Signed-off-by: Qiao Zhou 
---
  arch/arm/mach-mmp/Kconfig  |5 +
  arch/arm/mach-mmp/Makefile |3 ++-
  2 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index ebdda83..6a6597c 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -136,4 +136,9 @@ config USB_EHCI_MV_U2O
 help
   Enables support for OTG controller which can be switched to host 
mode.

+config MMP_SRAM
+   bool
+   help
+ Select code specific to sram.
+


No need for help text for something that is selected, and might as
well squash this with patch 2.


Dan, thanks. I'll update it.

--

Best Regards
Qiao
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[PATCH 1/2] arm: mmp: build sram driver alone

[Qiao Zhou]

sram driver can be used by many chips besides CPU_MMP2, and so build
it alone.

Reported-by: Dan Williams 
Signed-off-by: Qiao Zhou 
---
 arch/arm/mach-mmp/Kconfig  |5 +
 arch/arm/mach-mmp/Makefile |3 ++-
 2 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index ebdda83..6a6597c 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -136,4 +136,9 @@ config USB_EHCI_MV_U2O
help
  Enables support for OTG controller which can be switched to host mode.
 
+config MMP_SRAM
+   bool
+   help
+ Select code specific to sram.
+
 endif
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 9b702a1..98f0f63 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -7,7 +7,8 @@ obj-y   += common.o devices.o time.o
 # SoC support
 obj-$(CONFIG_CPU_PXA168)   += pxa168.o
 obj-$(CONFIG_CPU_PXA910)   += pxa910.o
-obj-$(CONFIG_CPU_MMP2) += mmp2.o sram.o
+obj-$(CONFIG_CPU_MMP2) += mmp2.o
+obj-$(CONFIG_MMP_SRAM) += sram.o
 
 ifeq ($(CONFIG_COMMON_CLK), )
 obj-y  += clock.o
-- 
1.7.0.4

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[PATCH 2/2] dma: mmp-tdma: select sram driver

[Qiao Zhou]

Reported-by: Dan Williams 
Signed-off-by: Qiao Zhou 
---
 drivers/dma/Kconfig |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index dd2874e..4e41b69 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -288,6 +288,7 @@ config MMP_TDMA
bool "MMP Two-Channel DMA support"
depends on ARCH_MMP
select DMA_ENGINE
+   select MMP_SRAM
help
  Support the MMP Two-Channel DMA engine.
  This engine used for MMP Audio DMA and pxa910 SQU.
-- 
1.7.0.4

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Re: [PATCH] dma: mmp_tdma: add multiple burst size support for 910-squ

[Qiao Zhou]

On 10/10/2013 09:54 PM, zhangfei gao wrote:

On Wed, Oct 9, 2013 at 1:40 PM, Qiao Zhou  wrote:

add multiple burst size support for 910-squ.

Signed-off-by: Qiao Zhou 
---
  drivers/dma/mmp_tdma.c |   25 -
  1 files changed, 24 insertions(+), 1 deletions(-)

diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index 38cb517..d84354b 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -228,8 +228,31 @@ static int mmp_tdma_config_chan(struct mmp_tdma_chan 
*tdmac)
 return -EINVAL;
 }
 } else if (tdmac->type == PXA910_SQU) {
-   tdcr |= TDCR_BURSTSZ_SQU_32B;
 tdcr |= TDCR_SSPMOD;
+
+   switch (tdmac->burst_sz) {
+   case 1:
+   tdcr |= TDCR_BURSTSZ_SQU_1B;
+   break;
+   case 2:
+   tdcr |= TDCR_BURSTSZ_SQU_2B;
+   break;
+   case 4:
+   tdcr |= TDCR_BURSTSZ_SQU_4B;
+   break;
+   case 8:
+   tdcr |= TDCR_BURSTSZ_SQU_8B;
+   break;
+   case 16:
+   tdcr |= TDCR_BURSTSZ_SQU_16B;
+   break;
+   case 32:
+   tdcr |= TDCR_BURSTSZ_SQU_32B;
+   break;
+   default:
+   dev_err(tdmac->dev, "mmp_tdma: unknown burst size.\n");
+   return -EINVAL;
+   }


Sorry, do I make mistake,
Not find definition TDCR_BURSTSZ_SQU_16B ~
Only find
#define TDCR_BURSTSZ_SQU_32B(0x7 << 6)
uploaded the wrong version. sorry. I have already submitted the v2 
patch. thanks.


Thanks




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Qiao
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[PATCH v2] dma: mmp_tdma: add multiple burst size support for 910-squ

[Qiao Zhou]

add multiple burst size support for 910-squ.

Signed-off-by: Qiao Zhou 
---
 drivers/dma/mmp_tdma.c |   30 +-
 1 files changed, 29 insertions(+), 1 deletions(-)

diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index 38cb517..f6b9ec7 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -62,6 +62,11 @@
 #define TDCR_BURSTSZ_16B   (0x3 << 6)
 #define TDCR_BURSTSZ_32B   (0x6 << 6)
 #define TDCR_BURSTSZ_64B   (0x7 << 6)
+#define TDCR_BURSTSZ_SQU_1B(0x5 << 6)
+#define TDCR_BURSTSZ_SQU_2B(0x6 << 6)
+#define TDCR_BURSTSZ_SQU_4B(0x0 << 6)
+#define TDCR_BURSTSZ_SQU_8B(0x1 << 6)
+#define TDCR_BURSTSZ_SQU_16B   (0x3 << 6)
 #define TDCR_BURSTSZ_SQU_32B   (0x7 << 6)
 #define TDCR_BURSTSZ_128B  (0x5 << 6)
 #define TDCR_DSTDIR_MSK(0x3 << 4)  /* Dst Direction */
@@ -228,8 +233,31 @@ static int mmp_tdma_config_chan(struct mmp_tdma_chan 
*tdmac)
return -EINVAL;
}
} else if (tdmac->type == PXA910_SQU) {
-   tdcr |= TDCR_BURSTSZ_SQU_32B;
tdcr |= TDCR_SSPMOD;
+
+   switch (tdmac->burst_sz) {
+   case 1:
+   tdcr |= TDCR_BURSTSZ_SQU_1B;
+   break;
+   case 2:
+   tdcr |= TDCR_BURSTSZ_SQU_2B;
+   break;
+   case 4:
+   tdcr |= TDCR_BURSTSZ_SQU_4B;
+   break;
+   case 8:
+   tdcr |= TDCR_BURSTSZ_SQU_8B;
+   break;
+   case 16:
+   tdcr |= TDCR_BURSTSZ_SQU_16B;
+   break;
+   case 32:
+   tdcr |= TDCR_BURSTSZ_SQU_32B;
+   break;
+   default:
+   dev_err(tdmac->dev, "mmp_tdma: unknown burst size.\n");
+   return -EINVAL;
+   }
}
 
writel(tdcr, tdmac->reg_base + TDCR);
-- 
1.7.0.4

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[PATCH v2] dma: mmp-tdma: add multiple burst size support for 910-squ

[Qiao Zhou]

v1: add multiple burst size support. remove previous fixed 32-byte setting.
v2: correct some missing definition.

Qiao Zhou (1):
  dma: mmp_tdma: add multiple burst size support for 910-squ

 drivers/dma/mmp_tdma.c |   25 -
 1 files changed, 24 insertions(+), 1 deletions(-)

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[PATCH] dma: mmp_tdma: add multiple burst size support for 910-squ

[Qiao Zhou]

add multiple burst size support for 910-squ.

Signed-off-by: Qiao Zhou 
---
 drivers/dma/mmp_tdma.c |   25 -
 1 files changed, 24 insertions(+), 1 deletions(-)

diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index 38cb517..d84354b 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -228,8 +228,31 @@ static int mmp_tdma_config_chan(struct mmp_tdma_chan 
*tdmac)
return -EINVAL;
}
} else if (tdmac->type == PXA910_SQU) {
-   tdcr |= TDCR_BURSTSZ_SQU_32B;
tdcr |= TDCR_SSPMOD;
+
+   switch (tdmac->burst_sz) {
+   case 1:
+   tdcr |= TDCR_BURSTSZ_SQU_1B;
+   break;
+   case 2:
+   tdcr |= TDCR_BURSTSZ_SQU_2B;
+   break;
+   case 4:
+   tdcr |= TDCR_BURSTSZ_SQU_4B;
+   break;
+   case 8:
+   tdcr |= TDCR_BURSTSZ_SQU_8B;
+   break;
+   case 16:
+   tdcr |= TDCR_BURSTSZ_SQU_16B;
+   break;
+   case 32:
+   tdcr |= TDCR_BURSTSZ_SQU_32B;
+   break;
+   default:
+   dev_err(tdmac->dev, "mmp_tdma: unknown burst size.\n");
+   return -EINVAL;
+   }
}
 
writel(tdcr, tdmac->reg_base + TDCR);
-- 
1.7.0.4

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[PATCH v1] dma: mmp-tdma: add multiple burst size support for 910-squ

[Qiao Zhou]

v1: add multiple burst size support. remove previous fixed 32-byte setting.

Qiao Zhou (1):
  dma: mmp_tdma: add multiple burst size support for 910-squ

 drivers/dma/mmp_tdma.c |   25 -
 1 files changed, 24 insertions(+), 1 deletions(-)

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[PATCH V2] dma: mmp_tdma: disable irq when disabling dma channel

[Qiao Zhou]

mask dma irq when disabling dma channel, so that interrupt status
will not be set and interrupt won't come again.

Signed-off-by: Qiao Zhou 
---
 drivers/dma/mmp_tdma.c |4 
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index 43d5a6c..9b93665 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -154,6 +154,10 @@ static void mmp_tdma_disable_chan(struct mmp_tdma_chan 
*tdmac)
 {
writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
tdmac->reg_base + TDCR);
+
+   /* disable irq */
+   writel(0, tdmac->reg_base + TDIMR);
+
tdmac->status = DMA_SUCCESS;
 }
 
-- 
1.7.0.4

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[PATCH V2] dma: mmp_tdma: disable irq when disabling dma channel

[Qiao Zhou]

V2 -> V1:
1, mask dma interrupt when disable DMA channel.
2, remove patch v1.

if the dma channel is disabled without interrupt masked, the interrupt
status may still be set. next time when dma channel is enabled again,
the old interrupt status may trigger the interrupt wrongly. we need to
mask the interrupt when dma channel is disabled.

Qiao Zhou (1):
  dma: mmp_tdma: disable irq when disabling dma channel

 drivers/dma/mmp_tdma.c |4 
 1 files changed, 4 insertions(+), 0 deletions(-)

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[PATCH] dma: mmp_tdma: kill tasklet when free dma channel

[Qiao Zhou]

kill tasklet task when free dam channel, otherwise the task may
run after related resource is released, then unknown things may
happen.

Signed-off-by: Qiao Zhou 
---
 drivers/dma/mmp_tdma.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index 43d5a6c..2622b2a 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -333,6 +333,9 @@ static void mmp_tdma_free_chan_resources(struct dma_chan 
*chan)
 
if (tdmac->irq)
devm_free_irq(tdmac->dev, tdmac->irq, tdmac);
+
+   tasklet_kill(&tdmac->tasklet);
+
mmp_tdma_free_descriptor(tdmac);
return;
 }
-- 
1.7.0.4

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Re: [PATCH] mfd: Remove __devexit annotation for pm80x_deinit

[Qiao Zhou]

On 07/11/2012 09:48 AM, Axel Lin wrote:

This fixes below section mismatch warning:

   LD  drivers/mfd/built-in.o
WARNING: drivers/mfd/built-in.o(.devinit.text+0x46c): Section mismatch in 
reference from the function pm800_probe() to the function 
.devexit.text:pm80x_deinit()
The function __devinit pm800_probe() references
a function __devexit pm80x_deinit().
This is often seen when error handling in the init function
uses functionality in the exit path.
The fix is often to remove the __devexit annotation of
pm80x_deinit() so it may be used outside an exit section.

Signed-off-by: Axel Lin 
---
  drivers/mfd/88pm80x.c |2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mfd/88pm80x.c b/drivers/mfd/88pm80x.c
index 62da342..cd0bf52 100644
--- a/drivers/mfd/88pm80x.c
+++ b/drivers/mfd/88pm80x.c
@@ -91,7 +91,7 @@ err_regmap_init:
  }
  EXPORT_SYMBOL_GPL(pm80x_init);

-int __devexit pm80x_deinit(struct i2c_client *client)
+int pm80x_deinit(struct i2c_client *client)
  {
struct pm80x_chip *chip = i2c_get_clientdata(client);



Alex,

thanks again for the fixing, and would try to avoid such warning in future.

--

Best Regards
Qiao


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Re: [PATCH] mfd: Fix checking return value of regmap_read()

[Qiao Zhou]

On 07/11/2012 09:27 AM, Axel Lin wrote:

Check the return value of regmap_read() rather than the read value.

Signed-off-by: Axel Lin 
---
  drivers/mfd/88pm800.c |   16 +---
  drivers/mfd/88pm805.c |5 +++--
  2 files changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/mfd/88pm800.c b/drivers/mfd/88pm800.c
index ec7d9b8..b67a301 100644
--- a/drivers/mfd/88pm800.c
+++ b/drivers/mfd/88pm800.c
@@ -419,22 +419,24 @@ static int __devinit device_800_init(struct pm80x_chip 
*chip,
 struct pm80x_platform_data *pdata)
  {
int ret, pmic_id;
+   unsigned int val;

-   regmap_read(chip->regmap, PM800_CHIP_ID, &ret);
+   ret = regmap_read(chip->regmap, PM800_CHIP_ID, &val);
if (ret < 0) {
dev_err(chip->dev, "Failed to read CHIP ID: %d\n", ret);
goto out;
}

-   pmic_id = ret & PM80X_VERSION_MASK;
+   pmic_id = val & PM80X_VERSION_MASK;

if ((pmic_id >= PM800_CHIP_A0) && (pmic_id <= PM800_CHIP_END)) {
-   chip->version = ret;
+   chip->version = val;
dev_info(chip->dev,
-"88PM80x:Marvell 88PM800 (ID:0x%x) detected\n", ret);
+"88PM80x:Marvell 88PM800 (ID:0x%x) detected\n", val);
} else {
dev_err(chip->dev,
-   "Failed to detect Marvell 88PM800:ChipID[0x%x]\n", ret);
+   "Failed to detect Marvell 88PM800:ChipID[0x%x]\n", val);
+   ret = -EINVAL;
goto out;
}

@@ -442,12 +444,12 @@ static int __devinit device_800_init(struct pm80x_chip 
*chip,
 * alarm wake up bit will be clear in device_irq_init(),
 * read before that
 */
-   regmap_read(chip->regmap, PM800_RTC_CONTROL, &ret);
+   ret = regmap_read(chip->regmap, PM800_RTC_CONTROL, &val);
if (ret < 0) {
dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
goto out;
}
-   if (ret & PM800_ALARM_WAKEUP) {
+   if (val & PM800_ALARM_WAKEUP) {
if (pdata && pdata->rtc)
pdata->rtc->rtc_wakeup = 1;
}
diff --git a/drivers/mfd/88pm805.c b/drivers/mfd/88pm805.c
index d59ca6b..6146583 100644
--- a/drivers/mfd/88pm805.c
+++ b/drivers/mfd/88pm805.c
@@ -192,6 +192,7 @@ static struct regmap_irq_chip pm805_irq_chip = {
  static int __devinit device_805_init(struct pm80x_chip *chip)
  {
int ret = 0;
+   unsigned int val;
struct regmap *map = chip->regmap;

if (!map) {
@@ -199,12 +200,12 @@ static int __devinit device_805_init(struct pm80x_chip 
*chip)
return -EINVAL;
}

-   regmap_read(map, PM805_CHIP_ID, &ret);
+   ret = regmap_read(map, PM805_CHIP_ID, &val);
if (ret < 0) {
dev_err(chip->dev, "Failed to read CHIP ID: %d\n", ret);
goto out_irq_init;
}
-   chip->version = ret;
+   chip->version = val;

chip->regmap_irq_chip = &pm805_irq_chip;



Axel,

thanks for the fixing.

--

Best Regards
Qiao


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