Re: [PATCH 1/2] pinctrl: move strict option to pinmux_ops

2015-05-07 Thread Sonic Zhang
Hi Walleij,

Acked-by: Sonic Zhang 


Sonic

On Thu, May 7, 2015 at 5:53 PM, Linus Walleij  wrote:
> While the pinmux_ops are ideally just a vtable for pin mux
> calls, the "strict" setting belongs so intuitively with the
> pin multiplexing that we should move it here anyway. Putting
> it in the top pinctrl_desc makes no sense.
>
> Cc: Sonic Zhang 
> Signed-off-by: Linus Walleij 
> ---
>  Documentation/pinctrl.txt   | 2 +-
>  drivers/pinctrl/pinctrl-adi2.c  | 2 +-
>  drivers/pinctrl/pinmux.c| 4 ++--
>  include/linux/pinctrl/pinctrl.h | 3 ---
>  include/linux/pinctrl/pinmux.h  | 4 
>  5 files changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
> index d6b2bed94c43..4976389e432d 100644
> --- a/Documentation/pinctrl.txt
> +++ b/Documentation/pinctrl.txt
> @@ -73,7 +73,6 @@ static struct pinctrl_desc foo_desc = {
> .pins = foo_pins,
> .npins = ARRAY_SIZE(foo_pins),
> .owner = THIS_MODULE,
> -   .strict = true,
>  };
>
>  int __init foo_probe(void)
> @@ -715,6 +714,7 @@ static struct pinmux_ops foo_pmxops = {
> .get_function_name = foo_get_fname,
> .get_function_groups = foo_get_groups,
> .set_mux = foo_set_mux,
> +   .strict = true,
>  };
>
>  /* Pinmux operations are handled by some pin controller */
> diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
> index fbd492668da1..49df9037b41e 100644
> --- a/drivers/pinctrl/pinctrl-adi2.c
> +++ b/drivers/pinctrl/pinctrl-adi2.c
> @@ -703,6 +703,7 @@ static struct pinmux_ops adi_pinmux_ops = {
> .get_function_name = adi_pinmux_get_func_name,
> .get_function_groups = adi_pinmux_get_groups,
> .gpio_request_enable = adi_pinmux_request_gpio,
> +   .strict = true,
>  };
>
>
> @@ -710,7 +711,6 @@ static struct pinctrl_desc adi_pinmux_desc = {
> .name = DRIVER_NAME,
> .pctlops = _pctrl_ops,
> .pmxops = _pinmux_ops,
> -   .strict = true,
> .owner = THIS_MODULE,
>  };
>
> diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
> index 2546fa783464..c58c168b06c2 100644
> --- a/drivers/pinctrl/pinmux.c
> +++ b/drivers/pinctrl/pinmux.c
> @@ -107,7 +107,7 @@ static int pin_request(struct pinctrl_dev *pctldev,
> desc->name, desc->gpio_owner, owner);
> goto out;
> }
> -   if (pctldev->desc->strict && desc->mux_usecount &&
> +   if (ops->strict && desc->mux_usecount &&
> strcmp(desc->mux_owner, owner)) {
> dev_err(pctldev->dev,
> "pin %s already requested by %s; cannot claim 
> for %s\n",
> @@ -123,7 +123,7 @@ static int pin_request(struct pinctrl_dev *pctldev,
> desc->name, desc->mux_owner, owner);
> goto out;
> }
> -   if (pctldev->desc->strict && desc->gpio_owner) {
> +   if (ops->strict && desc->gpio_owner) {
> dev_err(pctldev->dev,
> "pin %s already requested by %s; cannot claim 
> for %s\n",
> desc->name, desc->gpio_owner, owner);
> diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h
> index fc6b0348c375..66e4697516de 100644
> --- a/include/linux/pinctrl/pinctrl.h
> +++ b/include/linux/pinctrl/pinctrl.h
> @@ -114,8 +114,6 @@ struct pinctrl_ops {
>   * of the pins field above
>   * @pctlops: pin control operation vtable, to support global concepts like
>   * grouping of pins, this is optional.
> - * @strict: check both gpio_owner and mux_owner strictly before approving
> -   the pin request
>   * @pmxops: pinmux operations vtable, if you support pinmuxing in your driver
>   * @confops: pin config operations vtable, if you support pin configuration 
> in
>   * your driver
> @@ -134,7 +132,6 @@ struct pinctrl_desc {
> const struct pinctrl_ops *pctlops;
> const struct pinmux_ops *pmxops;
> const struct pinconf_ops *confops;
> -   bool strict;
> struct module *owner;
>  #ifdef CONFIG_GENERIC_PINCONF
> unsigned int num_custom_params;
> diff --git a/include/linux/pinctrl/pinmux.h b/include/linux/pinctrl/pinmux.h
> index 511bda9ed4bf..d3740fa7073f 100644
> --- a/include/linux/pinctrl/pinmux.h
> +++ b/include/linux/pinctrl/pinmux.h
> @@ -56,6 +56,9 @@ struct pinctrl_dev;
>   *

Re: [PATCH 1/2] pinctrl: move strict option to pinmux_ops

2015-05-07 Thread Sonic Zhang
Hi Walleij,

Acked-by: Sonic Zhang sonic.zh...@analog.com


Sonic

On Thu, May 7, 2015 at 5:53 PM, Linus Walleij linus.wall...@linaro.org wrote:
 While the pinmux_ops are ideally just a vtable for pin mux
 calls, the strict setting belongs so intuitively with the
 pin multiplexing that we should move it here anyway. Putting
 it in the top pinctrl_desc makes no sense.

 Cc: Sonic Zhang sonic.zh...@analog.com
 Signed-off-by: Linus Walleij linus.wall...@linaro.org
 ---
  Documentation/pinctrl.txt   | 2 +-
  drivers/pinctrl/pinctrl-adi2.c  | 2 +-
  drivers/pinctrl/pinmux.c| 4 ++--
  include/linux/pinctrl/pinctrl.h | 3 ---
  include/linux/pinctrl/pinmux.h  | 4 
  5 files changed, 8 insertions(+), 7 deletions(-)

 diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
 index d6b2bed94c43..4976389e432d 100644
 --- a/Documentation/pinctrl.txt
 +++ b/Documentation/pinctrl.txt
 @@ -73,7 +73,6 @@ static struct pinctrl_desc foo_desc = {
 .pins = foo_pins,
 .npins = ARRAY_SIZE(foo_pins),
 .owner = THIS_MODULE,
 -   .strict = true,
  };

  int __init foo_probe(void)
 @@ -715,6 +714,7 @@ static struct pinmux_ops foo_pmxops = {
 .get_function_name = foo_get_fname,
 .get_function_groups = foo_get_groups,
 .set_mux = foo_set_mux,
 +   .strict = true,
  };

  /* Pinmux operations are handled by some pin controller */
 diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
 index fbd492668da1..49df9037b41e 100644
 --- a/drivers/pinctrl/pinctrl-adi2.c
 +++ b/drivers/pinctrl/pinctrl-adi2.c
 @@ -703,6 +703,7 @@ static struct pinmux_ops adi_pinmux_ops = {
 .get_function_name = adi_pinmux_get_func_name,
 .get_function_groups = adi_pinmux_get_groups,
 .gpio_request_enable = adi_pinmux_request_gpio,
 +   .strict = true,
  };


 @@ -710,7 +711,6 @@ static struct pinctrl_desc adi_pinmux_desc = {
 .name = DRIVER_NAME,
 .pctlops = adi_pctrl_ops,
 .pmxops = adi_pinmux_ops,
 -   .strict = true,
 .owner = THIS_MODULE,
  };

 diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
 index 2546fa783464..c58c168b06c2 100644
 --- a/drivers/pinctrl/pinmux.c
 +++ b/drivers/pinctrl/pinmux.c
 @@ -107,7 +107,7 @@ static int pin_request(struct pinctrl_dev *pctldev,
 desc-name, desc-gpio_owner, owner);
 goto out;
 }
 -   if (pctldev-desc-strict  desc-mux_usecount 
 +   if (ops-strict  desc-mux_usecount 
 strcmp(desc-mux_owner, owner)) {
 dev_err(pctldev-dev,
 pin %s already requested by %s; cannot claim 
 for %s\n,
 @@ -123,7 +123,7 @@ static int pin_request(struct pinctrl_dev *pctldev,
 desc-name, desc-mux_owner, owner);
 goto out;
 }
 -   if (pctldev-desc-strict  desc-gpio_owner) {
 +   if (ops-strict  desc-gpio_owner) {
 dev_err(pctldev-dev,
 pin %s already requested by %s; cannot claim 
 for %s\n,
 desc-name, desc-gpio_owner, owner);
 diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h
 index fc6b0348c375..66e4697516de 100644
 --- a/include/linux/pinctrl/pinctrl.h
 +++ b/include/linux/pinctrl/pinctrl.h
 @@ -114,8 +114,6 @@ struct pinctrl_ops {
   * of the pins field above
   * @pctlops: pin control operation vtable, to support global concepts like
   * grouping of pins, this is optional.
 - * @strict: check both gpio_owner and mux_owner strictly before approving
 -   the pin request
   * @pmxops: pinmux operations vtable, if you support pinmuxing in your driver
   * @confops: pin config operations vtable, if you support pin configuration 
 in
   * your driver
 @@ -134,7 +132,6 @@ struct pinctrl_desc {
 const struct pinctrl_ops *pctlops;
 const struct pinmux_ops *pmxops;
 const struct pinconf_ops *confops;
 -   bool strict;
 struct module *owner;
  #ifdef CONFIG_GENERIC_PINCONF
 unsigned int num_custom_params;
 diff --git a/include/linux/pinctrl/pinmux.h b/include/linux/pinctrl/pinmux.h
 index 511bda9ed4bf..d3740fa7073f 100644
 --- a/include/linux/pinctrl/pinmux.h
 +++ b/include/linux/pinctrl/pinmux.h
 @@ -56,6 +56,9 @@ struct pinctrl_dev;
   * depending on whether the GPIO is configured as input or output,
   * a direction selector function may be implemented as a backing
   * to the GPIO controllers that need pin muxing.
 + * @strict: do not allow simultaneous use of the same pin for GPIO and 
 another
 + * function. Check both gpio_owner and mux_owner strictly before 
 approving
 + * the pin request.
   */
  struct pinmux_ops {
 int (*request) (struct pinctrl_dev *pctldev, unsigned offset);
 @@ -79,6 +82,7

Re: [PATCH] serial: bfin: ctsrts: enfore Kconfig naming convention

2015-04-13 Thread Sonic Zhang
Acked-by: Sonic Zhang 

On Sun, Apr 12, 2015 at 11:54 PM, Valentin Rothberg
 wrote:
> The CONFIG_ prefix is reserved for Kconfig options in Make and CPP
> syntax; static analysis tools rely on this convention.  This patch
> enforces this behavior for SERIAL_BFIN_{HARD_}CTSRTS.
>
> Signed-off-by: Valentin Rothberg 
> ---
> I found this issue with ./scripts/checkkconfigsymbols.py
> ---
>  arch/blackfin/include/asm/bfin_serial.h |  8 
>  drivers/tty/serial/bfin_uart.c  | 24 
>  2 files changed, 16 insertions(+), 16 deletions(-)
>
> diff --git a/arch/blackfin/include/asm/bfin_serial.h 
> b/arch/blackfin/include/asm/bfin_serial.h
> index d00d732784b1..b550ada7321b 100644
> --- a/arch/blackfin/include/asm/bfin_serial.h
> +++ b/arch/blackfin/include/asm/bfin_serial.h
> @@ -22,9 +22,9 @@
>  defined(CONFIG_BFIN_UART2_CTSRTS) || \
>  defined(CONFIG_BFIN_UART3_CTSRTS)
>  # if defined(BFIN_UART_BF54X_STYLE) || defined(BFIN_UART_BF60X_STYLE)
> -#  define CONFIG_SERIAL_BFIN_HARD_CTSRTS
> +#  define SERIAL_BFIN_HARD_CTSRTS
>  # else
> -#  define CONFIG_SERIAL_BFIN_CTSRTS
> +#  define SERIAL_BFIN_CTSRTS
>  # endif
>  #endif
>
> @@ -50,8 +50,8 @@ struct bfin_serial_port {
>  #elif ANOMALY_05000363
> unsigned int anomaly_threshold;
>  #endif
> -#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
> -   defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
> +#if defined(SERIAL_BFIN_CTSRTS) || \
> +   defined(SERIAL_BFIN_HARD_CTSRTS)
> int cts_pin;
> int rts_pin;
>  #endif
> diff --git a/drivers/tty/serial/bfin_uart.c b/drivers/tty/serial/bfin_uart.c
> index 155781ece050..ae3cf94b146b 100644
> --- a/drivers/tty/serial/bfin_uart.c
> +++ b/drivers/tty/serial/bfin_uart.c
> @@ -74,8 +74,8 @@ static void bfin_serial_tx_chars(struct bfin_serial_port 
> *uart);
>
>  static void bfin_serial_reset_irda(struct uart_port *port);
>
> -#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
> -   defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
> +#if defined(SERIAL_BFIN_CTSRTS) || \
> +   defined(SERIAL_BFIN_HARD_CTSRTS)
>  static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
>  {
> struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
> @@ -110,7 +110,7 @@ static irqreturn_t bfin_serial_mctrl_cts_int(int irq, 
> void *dev_id)
> struct bfin_serial_port *uart = dev_id;
> struct uart_port *uport = >port;
> unsigned int status = bfin_serial_get_mctrl(uport);
> -#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
> +#ifdef SERIAL_BFIN_HARD_CTSRTS
>
> UART_CLEAR_SCTS(uart);
> if (uport->hw_stopped) {
> @@ -700,7 +700,7 @@ static int bfin_serial_startup(struct uart_port *port)
>  # endif
>  #endif
>
> -#ifdef CONFIG_SERIAL_BFIN_CTSRTS
> +#ifdef SERIAL_BFIN_CTSRTS
> if (uart->cts_pin >= 0) {
> if (request_irq(gpio_to_irq(uart->cts_pin),
> bfin_serial_mctrl_cts_int,
> @@ -718,7 +718,7 @@ static int bfin_serial_startup(struct uart_port *port)
> gpio_direction_output(uart->rts_pin, 0);
> }
>  #endif
> -#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
> +#ifdef SERIAL_BFIN_HARD_CTSRTS
> if (uart->cts_pin >= 0) {
> if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
> 0, "BFIN_UART_MODEM_STATUS", uart)) {
> @@ -766,13 +766,13 @@ static void bfin_serial_shutdown(struct uart_port *port)
> free_irq(uart->tx_irq, uart);
>  #endif
>
> -#ifdef CONFIG_SERIAL_BFIN_CTSRTS
> +#ifdef SERIAL_BFIN_CTSRTS
> if (uart->cts_pin >= 0)
> free_irq(gpio_to_irq(uart->cts_pin), uart);
> if (uart->rts_pin >= 0)
> gpio_free(uart->rts_pin);
>  #endif
> -#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
> +#ifdef SERIAL_BFIN_HARD_CTSRTS
> if (uart->cts_pin >= 0)
> free_irq(uart->status_irq, uart);
>  #endif
> @@ -788,7 +788,7 @@ bfin_serial_set_termios(struct uart_port *port, struct 
> ktermios *termios,
> unsigned int ier, lcr = 0;
> unsigned long timeout;
>
> -#ifdef CONFIG_SERIAL_BFIN_CTSRTS
> +#ifdef SERIAL_BFIN_CTSRTS
> if (old == NULL && uart->cts_pin != -1)
> termios->c_cflag |= CRTSCTS;
> else if (uart->cts_pin == -1)
> @@ -1110,8 +1110,8 @@ bfin_serial_console_setup(struct console *co, char 
> *options)
> int baud = 57600;
> int bits = 8;
> int parity = 'n';
> -# if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
> -   defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
> +# if defin

Re: [PATCH] serial: bfin: ctsrts: enfore Kconfig naming convention

2015-04-13 Thread Sonic Zhang
Acked-by: Sonic Zhang sonic.zh...@analog.com

On Sun, Apr 12, 2015 at 11:54 PM, Valentin Rothberg
valentinrothb...@gmail.com wrote:
 The CONFIG_ prefix is reserved for Kconfig options in Make and CPP
 syntax; static analysis tools rely on this convention.  This patch
 enforces this behavior for SERIAL_BFIN_{HARD_}CTSRTS.

 Signed-off-by: Valentin Rothberg valentinrothb...@gmail.com
 ---
 I found this issue with ./scripts/checkkconfigsymbols.py
 ---
  arch/blackfin/include/asm/bfin_serial.h |  8 
  drivers/tty/serial/bfin_uart.c  | 24 
  2 files changed, 16 insertions(+), 16 deletions(-)

 diff --git a/arch/blackfin/include/asm/bfin_serial.h 
 b/arch/blackfin/include/asm/bfin_serial.h
 index d00d732784b1..b550ada7321b 100644
 --- a/arch/blackfin/include/asm/bfin_serial.h
 +++ b/arch/blackfin/include/asm/bfin_serial.h
 @@ -22,9 +22,9 @@
  defined(CONFIG_BFIN_UART2_CTSRTS) || \
  defined(CONFIG_BFIN_UART3_CTSRTS)
  # if defined(BFIN_UART_BF54X_STYLE) || defined(BFIN_UART_BF60X_STYLE)
 -#  define CONFIG_SERIAL_BFIN_HARD_CTSRTS
 +#  define SERIAL_BFIN_HARD_CTSRTS
  # else
 -#  define CONFIG_SERIAL_BFIN_CTSRTS
 +#  define SERIAL_BFIN_CTSRTS
  # endif
  #endif

 @@ -50,8 +50,8 @@ struct bfin_serial_port {
  #elif ANOMALY_05000363
 unsigned int anomaly_threshold;
  #endif
 -#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
 -   defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
 +#if defined(SERIAL_BFIN_CTSRTS) || \
 +   defined(SERIAL_BFIN_HARD_CTSRTS)
 int cts_pin;
 int rts_pin;
  #endif
 diff --git a/drivers/tty/serial/bfin_uart.c b/drivers/tty/serial/bfin_uart.c
 index 155781ece050..ae3cf94b146b 100644
 --- a/drivers/tty/serial/bfin_uart.c
 +++ b/drivers/tty/serial/bfin_uart.c
 @@ -74,8 +74,8 @@ static void bfin_serial_tx_chars(struct bfin_serial_port 
 *uart);

  static void bfin_serial_reset_irda(struct uart_port *port);

 -#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
 -   defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
 +#if defined(SERIAL_BFIN_CTSRTS) || \
 +   defined(SERIAL_BFIN_HARD_CTSRTS)
  static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  {
 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 @@ -110,7 +110,7 @@ static irqreturn_t bfin_serial_mctrl_cts_int(int irq, 
 void *dev_id)
 struct bfin_serial_port *uart = dev_id;
 struct uart_port *uport = uart-port;
 unsigned int status = bfin_serial_get_mctrl(uport);
 -#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 +#ifdef SERIAL_BFIN_HARD_CTSRTS

 UART_CLEAR_SCTS(uart);
 if (uport-hw_stopped) {
 @@ -700,7 +700,7 @@ static int bfin_serial_startup(struct uart_port *port)
  # endif
  #endif

 -#ifdef CONFIG_SERIAL_BFIN_CTSRTS
 +#ifdef SERIAL_BFIN_CTSRTS
 if (uart-cts_pin = 0) {
 if (request_irq(gpio_to_irq(uart-cts_pin),
 bfin_serial_mctrl_cts_int,
 @@ -718,7 +718,7 @@ static int bfin_serial_startup(struct uart_port *port)
 gpio_direction_output(uart-rts_pin, 0);
 }
  #endif
 -#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 +#ifdef SERIAL_BFIN_HARD_CTSRTS
 if (uart-cts_pin = 0) {
 if (request_irq(uart-status_irq, bfin_serial_mctrl_cts_int,
 0, BFIN_UART_MODEM_STATUS, uart)) {
 @@ -766,13 +766,13 @@ static void bfin_serial_shutdown(struct uart_port *port)
 free_irq(uart-tx_irq, uart);
  #endif

 -#ifdef CONFIG_SERIAL_BFIN_CTSRTS
 +#ifdef SERIAL_BFIN_CTSRTS
 if (uart-cts_pin = 0)
 free_irq(gpio_to_irq(uart-cts_pin), uart);
 if (uart-rts_pin = 0)
 gpio_free(uart-rts_pin);
  #endif
 -#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 +#ifdef SERIAL_BFIN_HARD_CTSRTS
 if (uart-cts_pin = 0)
 free_irq(uart-status_irq, uart);
  #endif
 @@ -788,7 +788,7 @@ bfin_serial_set_termios(struct uart_port *port, struct 
 ktermios *termios,
 unsigned int ier, lcr = 0;
 unsigned long timeout;

 -#ifdef CONFIG_SERIAL_BFIN_CTSRTS
 +#ifdef SERIAL_BFIN_CTSRTS
 if (old == NULL  uart-cts_pin != -1)
 termios-c_cflag |= CRTSCTS;
 else if (uart-cts_pin == -1)
 @@ -1110,8 +1110,8 @@ bfin_serial_console_setup(struct console *co, char 
 *options)
 int baud = 57600;
 int bits = 8;
 int parity = 'n';
 -# if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
 -   defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
 +# if defined(SERIAL_BFIN_CTSRTS) || \
 +   defined(SERIAL_BFIN_HARD_CTSRTS)
 int flow = 'r';
  # else
 int flow = 'n';
 @@ -1322,8 +1322,8 @@ static int bfin_serial_probe(struct platform_device 
 *pdev)
 init_timer((uart-rx_dma_timer));
  #endif

 -#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
 -   defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
 +#if defined(SERIAL_BFIN_CTSRTS) || \
 +   defined(SERIAL_BFIN_HARD_CTSRTS)
 res = platform_get_resource(pdev

Re: [PATCH] pinmux: allow exlusive pin allocation among GPIO and peripheral funtions via flag strict in struct pinctrl_desc

2015-03-19 Thread Sonic Zhang
Hi Linus,

On Wed, Mar 18, 2015 at 6:21 PM, Linus Walleij  wrote:
> On Thu, Mar 12, 2015 at 10:56 AM, Sonic Zhang  wrote:
>
>> From: Sonic Zhang 
>>
>> The blackfin pinmux and gpio controller doesn't allow user to set up 1 pin
>> for both GPIO and peripheral function. So, add flag strict in struct pinctrl
>> to check both gpio_owner and mux_owner before approving the pin request.
>>
>> Signed-off-by: Sonic Zhang 
>
> Nice!
>
> But mention in the commit that ADI2 is also patched to use
> this.
OK

>
> Do we have other candidates for strict GPIO/mux separation?
> What do people on the lists say?
>
>> +++ b/drivers/pinctrl/pinmux.c
>> @@ -99,24 +99,25 @@ static int pin_request(struct pinctrl_dev *pctldev,
>> dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n",
>> pin, desc->name, owner);
>>
>> +   if ((gpio_range || pctldev->desc->strict) && desc->gpio_owner) {
>
> So either we find a range map or we are strict and there is also a
> previous owner of the pin.
>
> Is this correct? I think we should *always* find a range to request
> a pin.
When requesting regular muxing from function pinmux_enable_setting(),
pin_request() is invoked with gpio_range = NULL. But, when requesting
GPIO, function pinmux_request_gpio() always passes a valid range. So,
if gpio_owner is set, it is correct to fail a request either the
request is for this GPIO or the request is for regular muxing of this
GPIO pin and the strict bit is set.

>
> I think you should just leave this if()-statement alone and insert
> some new stuff inside the lower else()-clause.
>
>
>> +   dev_err(pctldev->dev,
>> +   "pin %s already requested by %s; cannot claim for 
>> %s\n",
>> +   desc->name, desc->gpio_owner, owner);
>> +   goto out;
>> +   }
>> +
>> +   if ((!gpio_range || pctldev->desc->strict) &&
>> +   desc->mux_usecount && strcmp(desc->mux_owner, owner)) {
>> +   dev_err(pctldev->dev,
>> +   "pin %s already requested by %s; cannot claim for 
>> %s\n",
>> +   desc->name, desc->mux_owner, owner);
>> +   goto out;
>> +   }
>
> This is wrong.
>
> If the function is entered with gpio_range != NULL it is a request
> for a single GPIO line, else it is regular muxing.

Why this is wrong? If gpio_range != NULL, the request of a GPIO is
already checked in the first if clause.

In strict case:
Both mux_owner and gpio_owner are checked no matter whether GPIO or
regular muxing is requested.
If both checking pass, muxing_owner or gpio_owner is set according to
the request type.

In non strict case:
Request of GPIO is checked in the first if clause against gpio_owner,
while request of regular muxing is checked in the second if clause
against mux_owner.
If either checking passes, its owner is set which doesn't affect the
checking of the other request type.

>
> Keep the else() clause, just also include an explicit check
> to see if desc->gpio_owner is set, and in that case, if we
> are also strict, bail out.

Anyway, if you think doing the explicit check in both if() and else()
clauses is better, I am fine to send a new patch.

>
> else { /* No gpio_range */
>if (pctldev->desc->strict && desc->gpio_owner) {
>   err "already used for GPIO..."
>}
>
>> +
>> if (gpio_range) {
>
> So just keep the whole thing inside if (gpio_range).
>
>> desc->mux_usecount++;
>> if (desc->mux_usecount > 1)
>> return 0;
>> diff --git a/include/linux/pinctrl/pinctrl.h 
>> b/include/linux/pinctrl/pinctrl.h
>> index 66e4697..ca6c99c0 100644
>> --- a/include/linux/pinctrl/pinctrl.h
>> +++ b/include/linux/pinctrl/pinctrl.h
>> @@ -132,6 +132,7 @@ struct pinctrl_desc {
>> const struct pinctrl_ops *pctlops;
>> const struct pinmux_ops *pmxops;
>> const struct pinconf_ops *confops;
>> +   bool strict;
>
> Also update the kerneldoc above this struct.
>
> Also update examples and text in
> Documentation/pinctrl.txt
> so it is clear when to use this option and what it means.

OK

Regards,

Sonic
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Re: [PATCH] pinmux: allow exlusive pin allocation among GPIO and peripheral funtions via flag strict in struct pinctrl_desc

2015-03-19 Thread Sonic Zhang
Hi Linus,

On Wed, Mar 18, 2015 at 6:21 PM, Linus Walleij linus.wall...@linaro.org wrote:
 On Thu, Mar 12, 2015 at 10:56 AM, Sonic Zhang sonic@gmail.com wrote:

 From: Sonic Zhang sonic.zh...@analog.com

 The blackfin pinmux and gpio controller doesn't allow user to set up 1 pin
 for both GPIO and peripheral function. So, add flag strict in struct pinctrl
 to check both gpio_owner and mux_owner before approving the pin request.

 Signed-off-by: Sonic Zhang sonic.zh...@analog.com

 Nice!

 But mention in the commit that ADI2 is also patched to use
 this.
OK


 Do we have other candidates for strict GPIO/mux separation?
 What do people on the lists say?

 +++ b/drivers/pinctrl/pinmux.c
 @@ -99,24 +99,25 @@ static int pin_request(struct pinctrl_dev *pctldev,
 dev_dbg(pctldev-dev, request pin %d (%s) for %s\n,
 pin, desc-name, owner);

 +   if ((gpio_range || pctldev-desc-strict)  desc-gpio_owner) {

 So either we find a range map or we are strict and there is also a
 previous owner of the pin.

 Is this correct? I think we should *always* find a range to request
 a pin.
When requesting regular muxing from function pinmux_enable_setting(),
pin_request() is invoked with gpio_range = NULL. But, when requesting
GPIO, function pinmux_request_gpio() always passes a valid range. So,
if gpio_owner is set, it is correct to fail a request either the
request is for this GPIO or the request is for regular muxing of this
GPIO pin and the strict bit is set.


 I think you should just leave this if()-statement alone and insert
 some new stuff inside the lower else()-clause.


 +   dev_err(pctldev-dev,
 +   pin %s already requested by %s; cannot claim for 
 %s\n,
 +   desc-name, desc-gpio_owner, owner);
 +   goto out;
 +   }
 +
 +   if ((!gpio_range || pctldev-desc-strict) 
 +   desc-mux_usecount  strcmp(desc-mux_owner, owner)) {
 +   dev_err(pctldev-dev,
 +   pin %s already requested by %s; cannot claim for 
 %s\n,
 +   desc-name, desc-mux_owner, owner);
 +   goto out;
 +   }

 This is wrong.

 If the function is entered with gpio_range != NULL it is a request
 for a single GPIO line, else it is regular muxing.

Why this is wrong? If gpio_range != NULL, the request of a GPIO is
already checked in the first if clause.

In strict case:
Both mux_owner and gpio_owner are checked no matter whether GPIO or
regular muxing is requested.
If both checking pass, muxing_owner or gpio_owner is set according to
the request type.

In non strict case:
Request of GPIO is checked in the first if clause against gpio_owner,
while request of regular muxing is checked in the second if clause
against mux_owner.
If either checking passes, its owner is set which doesn't affect the
checking of the other request type.


 Keep the else() clause, just also include an explicit check
 to see if desc-gpio_owner is set, and in that case, if we
 are also strict, bail out.

Anyway, if you think doing the explicit check in both if() and else()
clauses is better, I am fine to send a new patch.


 else { /* No gpio_range */
if (pctldev-desc-strict  desc-gpio_owner) {
   err already used for GPIO...
}

 +
 if (gpio_range) {

 So just keep the whole thing inside if (gpio_range).

 desc-mux_usecount++;
 if (desc-mux_usecount  1)
 return 0;
 diff --git a/include/linux/pinctrl/pinctrl.h 
 b/include/linux/pinctrl/pinctrl.h
 index 66e4697..ca6c99c0 100644
 --- a/include/linux/pinctrl/pinctrl.h
 +++ b/include/linux/pinctrl/pinctrl.h
 @@ -132,6 +132,7 @@ struct pinctrl_desc {
 const struct pinctrl_ops *pctlops;
 const struct pinmux_ops *pmxops;
 const struct pinconf_ops *confops;
 +   bool strict;

 Also update the kerneldoc above this struct.

 Also update examples and text in
 Documentation/pinctrl.txt
 so it is clear when to use this option and what it means.

OK

Regards,

Sonic
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Re: [RFT/PATCH] Input: bfin_rotary - introduce open and close methods

2015-02-12 Thread Sonic Zhang
Acked-by: Sonic Zhang 

On Thu, Feb 12, 2015 at 3:54 PM, Dmitry Torokhov
 wrote:
> Hi Sonic,
>
> On Fri, Feb 06, 2015 at 05:37:29PM +0800, Sonic Zhang wrote:
>> Hi Dmitry,
>>
>> After apply your patch manually to my blackfin kernel tree, I got
>> kernel panic when probe the rotary.
>
> Hmm, I found one potential issue that might cause panic, but it was
> preexisting Anyway, I uploaded all bfin_rotary patches on top of
> 3.19 into bfin_rotary branch of my tree on kernel.org, can you please
> grab them from there and try again?
>
> Thanks!
>
>>
>> NULL pointer access
>> Kernel OOPS in progress
>> Deferred Exception context
>> CURRENT PROCESS:
>> COMM=swapper PID=1  CPU=0
>> invalid mm
>> return address: [0x00167648]; contents of:
>> 0x00167620:  f000  b068  0a08  1807  3038  3007  e801  
>> 0x00167630:  05b3  0010  3044  6001  e3fc  da5a  b0a8  0c80
>> 0x00167640:  191b    6802  6000 [e511] 0075  ac4a  9710
>> 0x00167650:  ac4a  6c22  9710  a3a2  a0a9  0c02  18ec  cc00
>>
>> CPU: 0 PID: 1 Comm: swapper Not tainted
>> 3.17.0-ADI-2014R1-pre-00455-ga5d060e-dirty #5
>> task: 04025a20 ti: 04026000 task.ti: 04026000
>> Compiled for cpu family 0x27fe (Rev 0), but running on:0x (Rev 0)
>> ADSP-BF609-0.0 500(MHz CCLK) 125(MHz SCLK) (mpu off)
>> Linux version 3.17.0-ADI-2014R1-pre-00455-ga5d060e-dirty (sonic@nine)
>> (gcc version 4.3.5 (ADI-mast5
>>
>> SEQUENCER STATUS:   Not tainted
>>  SEQSTAT: 0027  IPEND: 8008  IMASK:   SYSCFG: 2806
>>   EXCAUSE   : 0x27
>>   physical IVG3 asserted : <0xffa00744> { _trap + 0x0 }
>>   physical IVG15 asserted : <0xffa00d68> { _evt_system_call + 0x0 }
>>   logical irq   6 mapped  : <0xffa003bc> { _bfin_coretmr_interrupt + 0x0 }
>>   logical irq   7 mapped  : <0x8858> { _bfin_fault_routine + 0x0 }
>>   logical irq  11 mapped  : <0x7754> { _l2_ecc_err + 0x0 }
>>   logical irq  13 mapped  : <0x8858> { _bfin_fault_routine + 0x0 }
>>   logical irq  39 mapped  : <0x0016a350> { _bfin_twi_interrupt_entry + 0x0 }
>>   logical irq  40 mapped  : <0x0016a350> { _bfin_twi_interrupt_entry + 0x0 }
>>   logical irq  62 mapped  : <0x00132438> { _adi_spi_tx_dma_isr + 0x0 }
>>   logical irq  63 mapped  : <0x00132784> { _adi_spi_rx_dma_isr + 0x0 }
>>   logical irq  64 mapped  : <0x0013282c> { _spi_irq_err + 0x0 }
>>   logical irq  65 mapped  : <0x00132438> { _adi_spi_tx_dma_isr + 0x0 }
>>   logical irq  66 mapped  : <0x00132784> { _adi_spi_rx_dma_isr + 0x0 }
>>   logical irq  67 mapped  : <0x0013282c> { _spi_irq_err + 0x0 }
>>  RETE: <0x> /* Maybe null pointer? */
>>  RETN: <0x04027cf4> /* kernel dynamic memory (maybe user-space) */
>>  RETX: <0x0480> /* Maybe fixed code section */
>>  RETS: <0x0016763c> { _bfin_rotary_probe + 0x54 }
>>  PC  : <0x00167648> { _bfin_rotary_probe + 0x60 }
>> DCPLB_FAULT_ADDR: <0x01d4> /* Maybe null pointer? */
>> ICPLB_FAULT_ADDR: <0x00167648> { _bfin_rotary_probe + 0x60 }
>> PROCESSOR STATE:
>>  R0 : R1 : R2 : 0400R3 : 0001
>>  R4 : 0030c310R5 : 002d6680R6 : 002e7bd8R7 : 
>>  P0 : 0002P1 : 002e86acP2 : P3 : 002e8690
>>  P4 : 002e7bccP5 : 0409930cFP : 04027d10SP : 04027c18
>>  LB0: ffa015b8LT0: ffa015b8LC0: 
>>  LB1: 00094072LT1: 00094062LC1: 
>>  B0 : 001fL0 : M0 : 0402a400I0 : 04027c44
>>  B1 : 000eL1 : M1 : 002fa814I1 : 0407846c
>>  B2 : 0020L2 : M2 : I2 : 04028ac8
>>  B3 : 0022aa6cL3 : M3 : I3 : 001a
>> A0.w:    A0.x:    A1.w:    A1.x: 
>> USP :   ASTAT: 02003004
>>
>> Hardware Trace:
>>0 Target : <0x3fe8> { _trap_c + 0x0 }
>>  Source : <0xffa006d8> { _exception_to_level5 + 0xa0 } JUMP.L
>>1 Target : <0xffa00638> { _exception_to_level5 + 0x0 }
>>  Source : <0xffa004f2> { _bfin_return_from_exception + 0x6 } RTX
>>2 Target : <0xffa004ec> { _bfin_return_from_exception + 0x0 }
>>  Source : <0xffa00590> { _ex_trap_c + 0x70 } JUMP.S
>>3 Target : <0xffa00520> { _ex_trap_c + 0x0 }
>>  Source : <0xffa0076e> { _trap + 0x2a } JUMP (P4)
>>4 Target : <0xffa00744> { _trap + 0x0 }
>>   FAULT : <0x00167648> { _bfin_rotary_probe + 0x60 } P1 = 

Re: [RFT/PATCH] Input: bfin_rotary - introduce open and close methods

2015-02-12 Thread Sonic Zhang
Acked-by: Sonic Zhang sonic.zh...@analog.com

On Thu, Feb 12, 2015 at 3:54 PM, Dmitry Torokhov
dmitry.torok...@gmail.com wrote:
 Hi Sonic,

 On Fri, Feb 06, 2015 at 05:37:29PM +0800, Sonic Zhang wrote:
 Hi Dmitry,

 After apply your patch manually to my blackfin kernel tree, I got
 kernel panic when probe the rotary.

 Hmm, I found one potential issue that might cause panic, but it was
 preexisting Anyway, I uploaded all bfin_rotary patches on top of
 3.19 into bfin_rotary branch of my tree on kernel.org, can you please
 grab them from there and try again?

 Thanks!


 NULL pointer access
 Kernel OOPS in progress
 Deferred Exception context
 CURRENT PROCESS:
 COMM=swapper PID=1  CPU=0
 invalid mm
 return address: [0x00167648]; contents of:
 0x00167620:  f000  b068  0a08  1807  3038  3007  e801  
 0x00167630:  05b3  0010  3044  6001  e3fc  da5a  b0a8  0c80
 0x00167640:  191b    6802  6000 [e511] 0075  ac4a  9710
 0x00167650:  ac4a  6c22  9710  a3a2  a0a9  0c02  18ec  cc00

 CPU: 0 PID: 1 Comm: swapper Not tainted
 3.17.0-ADI-2014R1-pre-00455-ga5d060e-dirty #5
 task: 04025a20 ti: 04026000 task.ti: 04026000
 Compiled for cpu family 0x27fe (Rev 0), but running on:0x (Rev 0)
 ADSP-BF609-0.0 500(MHz CCLK) 125(MHz SCLK) (mpu off)
 Linux version 3.17.0-ADI-2014R1-pre-00455-ga5d060e-dirty (sonic@nine)
 (gcc version 4.3.5 (ADI-mast5

 SEQUENCER STATUS:   Not tainted
  SEQSTAT: 0027  IPEND: 8008  IMASK:   SYSCFG: 2806
   EXCAUSE   : 0x27
   physical IVG3 asserted : 0xffa00744 { _trap + 0x0 }
   physical IVG15 asserted : 0xffa00d68 { _evt_system_call + 0x0 }
   logical irq   6 mapped  : 0xffa003bc { _bfin_coretmr_interrupt + 0x0 }
   logical irq   7 mapped  : 0x8858 { _bfin_fault_routine + 0x0 }
   logical irq  11 mapped  : 0x7754 { _l2_ecc_err + 0x0 }
   logical irq  13 mapped  : 0x8858 { _bfin_fault_routine + 0x0 }
   logical irq  39 mapped  : 0x0016a350 { _bfin_twi_interrupt_entry + 0x0 }
   logical irq  40 mapped  : 0x0016a350 { _bfin_twi_interrupt_entry + 0x0 }
   logical irq  62 mapped  : 0x00132438 { _adi_spi_tx_dma_isr + 0x0 }
   logical irq  63 mapped  : 0x00132784 { _adi_spi_rx_dma_isr + 0x0 }
   logical irq  64 mapped  : 0x0013282c { _spi_irq_err + 0x0 }
   logical irq  65 mapped  : 0x00132438 { _adi_spi_tx_dma_isr + 0x0 }
   logical irq  66 mapped  : 0x00132784 { _adi_spi_rx_dma_isr + 0x0 }
   logical irq  67 mapped  : 0x0013282c { _spi_irq_err + 0x0 }
  RETE: 0x /* Maybe null pointer? */
  RETN: 0x04027cf4 /* kernel dynamic memory (maybe user-space) */
  RETX: 0x0480 /* Maybe fixed code section */
  RETS: 0x0016763c { _bfin_rotary_probe + 0x54 }
  PC  : 0x00167648 { _bfin_rotary_probe + 0x60 }
 DCPLB_FAULT_ADDR: 0x01d4 /* Maybe null pointer? */
 ICPLB_FAULT_ADDR: 0x00167648 { _bfin_rotary_probe + 0x60 }
 PROCESSOR STATE:
  R0 : R1 : R2 : 0400R3 : 0001
  R4 : 0030c310R5 : 002d6680R6 : 002e7bd8R7 : 
  P0 : 0002P1 : 002e86acP2 : P3 : 002e8690
  P4 : 002e7bccP5 : 0409930cFP : 04027d10SP : 04027c18
  LB0: ffa015b8LT0: ffa015b8LC0: 
  LB1: 00094072LT1: 00094062LC1: 
  B0 : 001fL0 : M0 : 0402a400I0 : 04027c44
  B1 : 000eL1 : M1 : 002fa814I1 : 0407846c
  B2 : 0020L2 : M2 : I2 : 04028ac8
  B3 : 0022aa6cL3 : M3 : I3 : 001a
 A0.w:    A0.x:    A1.w:    A1.x: 
 USP :   ASTAT: 02003004

 Hardware Trace:
0 Target : 0x3fe8 { _trap_c + 0x0 }
  Source : 0xffa006d8 { _exception_to_level5 + 0xa0 } JUMP.L
1 Target : 0xffa00638 { _exception_to_level5 + 0x0 }
  Source : 0xffa004f2 { _bfin_return_from_exception + 0x6 } RTX
2 Target : 0xffa004ec { _bfin_return_from_exception + 0x0 }
  Source : 0xffa00590 { _ex_trap_c + 0x70 } JUMP.S
3 Target : 0xffa00520 { _ex_trap_c + 0x0 }
  Source : 0xffa0076e { _trap + 0x2a } JUMP (P4)
4 Target : 0xffa00744 { _trap + 0x0 }
   FAULT : 0x00167648 { _bfin_rotary_probe + 0x60 } P1 = [P2 + -0x54]
  Source : 0x00167646 { _bfin_rotary_probe + 0x5e } 0x6000
5 Target : 0x0016763c { _bfin_rotary_probe + 0x54 }
  Source : 0x00102b50 { _platform_get_irq + 0x64 } RTS
6 Target : 0x00102b44 { _platform_get_irq + 0x58 }
  Source : 0x00102b2c { _platform_get_irq + 0x40 } IF CC JUMP pcrel
7 Target : 0x00102b0a { _platform_get_irq + 0x1e }
  Source : 0x00102b28 { _platform_get_irq + 0x3c } IF !CC JUMP pcrel 
 (BP)
8 Target : 0x00102b14 { _platform_get_irq + 0x28 }
  Source : 0x00102b08 { _platform_get_irq + 0x1c } JUMP.S
9 Target : 0x00102aec { _platform_get_irq + 0x0 }
  Source : 0x00167638 { _bfin_rotary_probe + 0x50 } JUMP.L
   10 Target : 0x00167634 { _bfin_rotary_probe + 0x4c }
  Source : 0x00167626 { _bfin_rotary_probe + 0x3e } IF CC JUMP pcrel
   11 Target : 0x0016761e

Re: [PATCH] Input: bfin_rotary - mark suspend and resume code as __maybe_unused

2015-02-09 Thread Sonic Zhang
Hi Dmitry,

Since the line I mentioned was removed in v3.19-rc1, I am fine with this patch.

Acked-by: Sonic Zhang 

On Fri, Feb 6, 2015 at 2:09 PM, Dmitry Torokhov
 wrote:
> Instead of using #ifdef to guard potentially unused suspend and resume code
> let's mark them as __maybe_unused so they still get discarded if they are
> not used but we do not get warning. This allows for better compile coverage.
>
> Signed-off-by: Dmitry Torokhov 
> ---
>  drivers/input/misc/bfin_rotary.c | 14 --
>  1 file changed, 4 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/input/misc/bfin_rotary.c 
> b/drivers/input/misc/bfin_rotary.c
> index a39793c..09d7612 100644
> --- a/drivers/input/misc/bfin_rotary.c
> +++ b/drivers/input/misc/bfin_rotary.c
> @@ -232,8 +232,7 @@ static int bfin_rotary_remove(struct platform_device 
> *pdev)
> return 0;
>  }
>
> -#ifdef CONFIG_PM
> -static int bfin_rotary_suspend(struct device *dev)
> +static int __maybe_unused bfin_rotary_suspend(struct device *dev)
>  {
> struct platform_device *pdev = to_platform_device(dev);
> struct bfin_rot *rotary = platform_get_drvdata(pdev);
> @@ -248,7 +247,7 @@ static int bfin_rotary_suspend(struct device *dev)
> return 0;
>  }
>
> -static int bfin_rotary_resume(struct device *dev)
> +static int __maybe_unused bfin_rotary_resume(struct device *dev)
>  {
> struct platform_device *pdev = to_platform_device(dev);
> struct bfin_rot *rotary = platform_get_drvdata(pdev);
> @@ -266,20 +265,15 @@ static int bfin_rotary_resume(struct device *dev)
> return 0;
>  }
>
> -static const struct dev_pm_ops bfin_rotary_pm_ops = {
> -   .suspend= bfin_rotary_suspend,
> -   .resume = bfin_rotary_resume,
> -};
> -#endif
> +static SIMPLE_DEV_PM_OPS(bfin_rotary_pm_ops,
> +bfin_rotary_suspend, bfin_rotary_resume);
>
>  static struct platform_driver bfin_rotary_device_driver = {
> .probe  = bfin_rotary_probe,
> .remove = bfin_rotary_remove,
> .driver = {
> .name   = "bfin-rotary",
> -#ifdef CONFIG_PM
> .pm = _rotary_pm_ops,
> -#endif
> },
>  };
>  module_platform_driver(bfin_rotary_device_driver);
> --
> 2.2.0.rc0.207.ga3a616c
>
>
> --
> Dmitry
> --
> To unsubscribe from this list: send the line "unsubscribe linux-input" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
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Re: [PATCH] Input: bfin_rotary - mark suspend and resume code as __maybe_unused

2015-02-09 Thread Sonic Zhang
Hi Dmitry,

Since the line I mentioned was removed in v3.19-rc1, I am fine with this patch.

Acked-by: Sonic Zhang sonic.zh...@analog.com

On Fri, Feb 6, 2015 at 2:09 PM, Dmitry Torokhov
dmitry.torok...@gmail.com wrote:
 Instead of using #ifdef to guard potentially unused suspend and resume code
 let's mark them as __maybe_unused so they still get discarded if they are
 not used but we do not get warning. This allows for better compile coverage.

 Signed-off-by: Dmitry Torokhov dmitry.torok...@gmail.com
 ---
  drivers/input/misc/bfin_rotary.c | 14 --
  1 file changed, 4 insertions(+), 10 deletions(-)

 diff --git a/drivers/input/misc/bfin_rotary.c 
 b/drivers/input/misc/bfin_rotary.c
 index a39793c..09d7612 100644
 --- a/drivers/input/misc/bfin_rotary.c
 +++ b/drivers/input/misc/bfin_rotary.c
 @@ -232,8 +232,7 @@ static int bfin_rotary_remove(struct platform_device 
 *pdev)
 return 0;
  }

 -#ifdef CONFIG_PM
 -static int bfin_rotary_suspend(struct device *dev)
 +static int __maybe_unused bfin_rotary_suspend(struct device *dev)
  {
 struct platform_device *pdev = to_platform_device(dev);
 struct bfin_rot *rotary = platform_get_drvdata(pdev);
 @@ -248,7 +247,7 @@ static int bfin_rotary_suspend(struct device *dev)
 return 0;
  }

 -static int bfin_rotary_resume(struct device *dev)
 +static int __maybe_unused bfin_rotary_resume(struct device *dev)
  {
 struct platform_device *pdev = to_platform_device(dev);
 struct bfin_rot *rotary = platform_get_drvdata(pdev);
 @@ -266,20 +265,15 @@ static int bfin_rotary_resume(struct device *dev)
 return 0;
  }

 -static const struct dev_pm_ops bfin_rotary_pm_ops = {
 -   .suspend= bfin_rotary_suspend,
 -   .resume = bfin_rotary_resume,
 -};
 -#endif
 +static SIMPLE_DEV_PM_OPS(bfin_rotary_pm_ops,
 +bfin_rotary_suspend, bfin_rotary_resume);

  static struct platform_driver bfin_rotary_device_driver = {
 .probe  = bfin_rotary_probe,
 .remove = bfin_rotary_remove,
 .driver = {
 .name   = bfin-rotary,
 -#ifdef CONFIG_PM
 .pm = bfin_rotary_pm_ops,
 -#endif
 },
  };
  module_platform_driver(bfin_rotary_device_driver);
 --
 2.2.0.rc0.207.ga3a616c


 --
 Dmitry
 --
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Re: [RFT/PATCH] Input: bfin_rotary - introduce open and close methods

2015-02-06 Thread Sonic Zhang
6> { _devm_ioremap_resource + 0x7a } IF !CC
JUMP pcrel (BP)
  13 Target : <0x000d9c44> { _devm_ioremap_resource + 0x78 }
 Source : <0x000d9b58> { _devm_ioremap_nocache + 0x3c } RTS
  14 Target : <0x000d9b50> { _devm_ioremap_nocache + 0x34 }
 Source : <0x00103bc8> { _devres_add + 0x48 } RTS
  15 Target : <0x00103b9c> { _devres_add + 0x1c }
 Source : <0x00103b96> { _devres_add + 0x16 } IF CC JUMP pcrel
Kernel Stack
Stack info:
 SP: [0x04027d58] <0x04027d58> /* kernel dynamic memory (maybe user-space) */
 Memory from 0x04027d50 to 04028000
04027d50: 000cda8c  0447f160 [04027d84] 00101cb4  002e7bd8  00301794
002fab6c  002e7c0c
04027d70: 04027da4  00301794  0030c310  04027da8  000cddc0  04027dac
<00100950> 00101c4c
04027d90: 00301794        04027dec  040225ac
04070af0  04027dd4
04027db0: 0010199a  0447f160  048a7d80  002c6018    04027df0
04027dec  04027df0
04027dd0: 00101c4c  04027df0  00100f50  04027dfc  001020d8  00301794
002788e0  00271bb8
04027df0: 04027e14  001021ba  00301794  002e5234  00319710  048a7d80
04027e54  00273210
04027e10: 048a7d80  04027e30  00102f8e  002e5234  048a7d80  000d4b8a
04027ea0  105a
04027e30: 04027e44  00319722  00319710  048a7d80  002c6018  04027ea0
<106e><00100100>
04027e50: 00200200  00319710    04027e94  04027e00  0030c322
04027e98  00026130
04027e70: 00325c64  04027e9c <0001bcde> 0063  0081453f  002ea330
00216528  
04027e90:   0006  0006  04027edc  04027edc  0030c28e
00325ef0  0031fc48
04027eb0: 0031fc28  0007  002c6018  0063  00291fb0  a8824141
002c56e0  0063
04027ed0: 0006  0006  0030c310  04027f0c  0021402e  00216528
04025a20  040256e0
04027ef0: 040258c8  002ea284  002ea330  00216528  ffa6  00216528
040258c8  0402feb0
04027f10: 00216528  28060484  00214024    
8000  
04027f30:           
  
04027f50:           
  
04027f70:           
  
04027f90:           
  
04027fb0:           
  
04027fd0:           
  
04027ff0:       2806
Return addresses in stack:
address : <0x00100950> { _bus_for_each_dev + 0x5c }
address : <0x106e> { _do_one_initcall + 0x6e }
address : <0x00100100> { _device_add + 0x3b4 }
address : <0x0001bcde> { _parse_args + 0x12e }
address : <0xffa00014> { _ret_from_fork + 0x14 }
Modules linked in:
Kernel panic - not syncing: Kernel exception
---[ end Kernel panic - not syncing: Kernel exception


Regards,

Sonic Zhang
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Re: [RFT/PATCH] Input: bfin_rotary - introduce open and close methods

2015-02-06 Thread Sonic Zhang
Hi Dmitry,

On Fri, Feb 6, 2015 at 2:56 PM, Dmitry Torokhov
 wrote:
> Introduce open and close methods for the input device to postpone enabling
> the device until it is needed.
>
> Signed-off-by: Dmitry Torokhov 
> ---
>
> Hi Sonic,
>
> Could you please tell me if the driver still works with this parch?
>
> Thanks!
>
>  drivers/input/misc/bfin_rotary.c | 70 
> 
>  1 file changed, 42 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/input/misc/bfin_rotary.c 
> b/drivers/input/misc/bfin_rotary.c
> index 09d7612..1bc9409 100644
> --- a/drivers/input/misc/bfin_rotary.c
> +++ b/drivers/input/misc/bfin_rotary.c
> @@ -35,6 +35,10 @@ struct bfin_rot {
> unsigned int down_key;
> unsigned int button_key;
> unsigned int rel_code;
> +
> +   unsigned short mode;
> +   unsigned short debounce;
> +
> unsigned short cnt_config;
> unsigned short cnt_imask;
> unsigned short cnt_debounce;
> @@ -94,6 +98,35 @@ static irqreturn_t bfin_rotary_isr(int irq, void *dev_id)
> return IRQ_HANDLED;
>  }
>
> +static int bfin_rotary_open(struct input_dev *input)
> +{
> +   struct bfin_rot *rotary = input_get_drvdata(input);
> +   unsigned short val;
> +
> +   if (rotary->mode & ROT_DEBE)
> +   writew(rotary->debounce & DPRESCALE,
> +   rotary->base + CNT_DEBOUNCE_OFF);
> +
> +   writew(rotary->mode & ~CNTE, rotary->base + CNT_CONFIG_OFF);
> +
> +   val = UCIE | DCIE;
> +   if (rotary->button_key)
> +   val |= CZMIE;
> +   writew(val, rotary->base + CNT_IMASK_OFF);
> +
> +   writew(rotary->mode | CNTE, rotary->base + CNT_CONFIG_OFF);
> +
> +   return 0;
> +}
> +
> +static void bfin_rotary_close(struct input_dev *input)
> +{
> +   struct bfin_rot *rotary = input_get_drvdata(input);
> +
> +   writew(0, rotary->base + CNT_CONFIG_OFF);
> +   writew(0, rotary->base + CNT_IMASK_OFF);
> +}
> +
>  static void bfin_rotary_free_action(void *data)
>  {
> peripheral_free_list(data);
> @@ -154,6 +187,9 @@ static int bfin_rotary_probe(struct platform_device *pdev)
> rotary->button_key = pdata->rotary_button_key;
> rotary->rel_code = pdata->rotary_rel_code;
>
> +   rotary->mode = pdata->mode;
> +   rotary->debounce = pdata->debounce;
> +
> input->name = pdev->name;
> input->phys = "bfin-rotary/input0";
> input->dev.parent = >dev;
> @@ -165,6 +201,9 @@ static int bfin_rotary_probe(struct platform_device *pdev)
> input->id.product = 0x0001;
> input->id.version = 0x0100;
>
> +   input->open = bfin_rotary_open;
> +   input->close = bfin_rotary_close;
> +
> if (rotary->up_key) {
> __set_bit(EV_KEY, input->evbit);
> __set_bit(rotary->up_key, input->keybit);
> @@ -179,6 +218,9 @@ static int bfin_rotary_probe(struct platform_device *pdev)
> __set_bit(rotary->button_key, input->keybit);
> }
>
> +   /* Quiesce the device before requesting irq */
> +   bfin_rotary_close(input);
> +
> rotary->irq = platform_get_irq(pdev, 0);
> if (rotary->irq < 0) {
> dev_err(dev, "No rotary IRQ specified\n");

Could you generate the patch after applying patch "bfin_rotary:
convert to use managed resources"?
Your code base is different from mine. The above 3 lines doesn't exist
with the managed resources patch.

Thanks,

Sonic


> @@ -199,39 +241,12 @@ static int bfin_rotary_probe(struct platform_device 
> *pdev)
> return error;
> }
>
> -   if (pdata->rotary_button_key)
> -   writew(CZMIE, rotary->base + CNT_IMASK_OFF);
> -
> -   if (pdata->mode & ROT_DEBE)
> -   writew(pdata->debounce & DPRESCALE,
> -   rotary->base + CNT_DEBOUNCE_OFF);
> -
> -   if (pdata->mode)
> -   writew(readw(rotary->base + CNT_CONFIG_OFF) |
> -   (pdata->mode & ~CNTE),
> -   rotary->base + CNT_CONFIG_OFF);
> -
> -   writew(readw(rotary->base + CNT_IMASK_OFF) | UCIE | DCIE,
> -   rotary->base + CNT_IMASK_OFF);
> -   writew(readw(rotary->base + CNT_CONFIG_OFF) | CNTE,
> -   rotary->base + CNT_CONFIG_OFF);
> -
> platform_set_drvdata(pdev, rotary);
> device_init_wakeup(>dev, 1);
>
> return 0;
>  }
>
> -static int bfin_rotary_remove(struct platform_device *pdev)
> -{
> -   struct bfin_rot *rotary = platform_get_drvdata(pdev);
> -
> -   writew(0, rotary->base + CNT_CONFIG_OFF);
> -   writew(0, rotary->base + CNT_IMASK_OFF);
> -
> -   return 0;
> -}
> -
>  static int __maybe_unused bfin_rotary_suspend(struct device *dev)
>  {
> struct platform_device *pdev = to_platform_device(dev);
> @@ -270,7 +285,6 @@ static SIMPLE_DEV_PM_OPS(bfin_rotary_pm_ops,
>
>  static struct platform_driver bfin_rotary_device_driver = {
> 

Re: [PATCH] Input: bfin_rotary - mark suspend and resume code as __maybe_unused

2015-02-06 Thread Sonic Zhang
Hi Dmitry,

On Fri, Feb 6, 2015 at 2:09 PM, Dmitry Torokhov
 wrote:
> Instead of using #ifdef to guard potentially unused suspend and resume code
> let's mark them as __maybe_unused so they still get discarded if they are
> not used but we do not get warning. This allows for better compile coverage.
>
> Signed-off-by: Dmitry Torokhov 
> ---
>  drivers/input/misc/bfin_rotary.c | 14 --
>  1 file changed, 4 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/input/misc/bfin_rotary.c 
> b/drivers/input/misc/bfin_rotary.c
> index a39793c..09d7612 100644
> --- a/drivers/input/misc/bfin_rotary.c
> +++ b/drivers/input/misc/bfin_rotary.c
> @@ -232,8 +232,7 @@ static int bfin_rotary_remove(struct platform_device 
> *pdev)
> return 0;
>  }
>
> -#ifdef CONFIG_PM
> -static int bfin_rotary_suspend(struct device *dev)
> +static int __maybe_unused bfin_rotary_suspend(struct device *dev)
>  {
> struct platform_device *pdev = to_platform_device(dev);
> struct bfin_rot *rotary = platform_get_drvdata(pdev);
> @@ -248,7 +247,7 @@ static int bfin_rotary_suspend(struct device *dev)
> return 0;
>  }
>
> -static int bfin_rotary_resume(struct device *dev)
> +static int __maybe_unused bfin_rotary_resume(struct device *dev)
>  {
> struct platform_device *pdev = to_platform_device(dev);
> struct bfin_rot *rotary = platform_get_drvdata(pdev);
> @@ -266,20 +265,15 @@ static int bfin_rotary_resume(struct device *dev)
> return 0;
>  }
>
> -static const struct dev_pm_ops bfin_rotary_pm_ops = {
> -   .suspend= bfin_rotary_suspend,
> -   .resume = bfin_rotary_resume,
> -};
> -#endif
> +static SIMPLE_DEV_PM_OPS(bfin_rotary_pm_ops,
> +bfin_rotary_suspend, bfin_rotary_resume);
>
>  static struct platform_driver bfin_rotary_device_driver = {
> .probe  = bfin_rotary_probe,
> .remove = bfin_rotary_remove,
> .driver = {
> .name   = "bfin-rotary",

You missed
   .owner  = THIS_MODULE,
here.


> -#ifdef CONFIG_PM
> .pm = _rotary_pm_ops,
> -#endif
> },
>  };
>  module_platform_driver(bfin_rotary_device_driver);
> --
> 2.2.0.rc0.207.ga3a616c
>
>

Regards,

Sonic
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Re: [PATCH] Input: bfin_rotary - mark suspend and resume code as __maybe_unused

2015-02-06 Thread Sonic Zhang
Hi Dmitry,

On Fri, Feb 6, 2015 at 2:09 PM, Dmitry Torokhov
dmitry.torok...@gmail.com wrote:
 Instead of using #ifdef to guard potentially unused suspend and resume code
 let's mark them as __maybe_unused so they still get discarded if they are
 not used but we do not get warning. This allows for better compile coverage.

 Signed-off-by: Dmitry Torokhov dmitry.torok...@gmail.com
 ---
  drivers/input/misc/bfin_rotary.c | 14 --
  1 file changed, 4 insertions(+), 10 deletions(-)

 diff --git a/drivers/input/misc/bfin_rotary.c 
 b/drivers/input/misc/bfin_rotary.c
 index a39793c..09d7612 100644
 --- a/drivers/input/misc/bfin_rotary.c
 +++ b/drivers/input/misc/bfin_rotary.c
 @@ -232,8 +232,7 @@ static int bfin_rotary_remove(struct platform_device 
 *pdev)
 return 0;
  }

 -#ifdef CONFIG_PM
 -static int bfin_rotary_suspend(struct device *dev)
 +static int __maybe_unused bfin_rotary_suspend(struct device *dev)
  {
 struct platform_device *pdev = to_platform_device(dev);
 struct bfin_rot *rotary = platform_get_drvdata(pdev);
 @@ -248,7 +247,7 @@ static int bfin_rotary_suspend(struct device *dev)
 return 0;
  }

 -static int bfin_rotary_resume(struct device *dev)
 +static int __maybe_unused bfin_rotary_resume(struct device *dev)
  {
 struct platform_device *pdev = to_platform_device(dev);
 struct bfin_rot *rotary = platform_get_drvdata(pdev);
 @@ -266,20 +265,15 @@ static int bfin_rotary_resume(struct device *dev)
 return 0;
  }

 -static const struct dev_pm_ops bfin_rotary_pm_ops = {
 -   .suspend= bfin_rotary_suspend,
 -   .resume = bfin_rotary_resume,
 -};
 -#endif
 +static SIMPLE_DEV_PM_OPS(bfin_rotary_pm_ops,
 +bfin_rotary_suspend, bfin_rotary_resume);

  static struct platform_driver bfin_rotary_device_driver = {
 .probe  = bfin_rotary_probe,
 .remove = bfin_rotary_remove,
 .driver = {
 .name   = bfin-rotary,

You missed
   .owner  = THIS_MODULE,
here.


 -#ifdef CONFIG_PM
 .pm = bfin_rotary_pm_ops,
 -#endif
 },
  };
  module_platform_driver(bfin_rotary_device_driver);
 --
 2.2.0.rc0.207.ga3a616c



Regards,

Sonic
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Please read the FAQ at  http://www.tux.org/lkml/


Re: [RFT/PATCH] Input: bfin_rotary - introduce open and close methods

2015-02-06 Thread Sonic Zhang
Hi Dmitry,

On Fri, Feb 6, 2015 at 2:56 PM, Dmitry Torokhov
dmitry.torok...@gmail.com wrote:
 Introduce open and close methods for the input device to postpone enabling
 the device until it is needed.

 Signed-off-by: Dmitry Torokhov dmitry.torok...@gmail.com
 ---

 Hi Sonic,

 Could you please tell me if the driver still works with this parch?

 Thanks!

  drivers/input/misc/bfin_rotary.c | 70 
 
  1 file changed, 42 insertions(+), 28 deletions(-)

 diff --git a/drivers/input/misc/bfin_rotary.c 
 b/drivers/input/misc/bfin_rotary.c
 index 09d7612..1bc9409 100644
 --- a/drivers/input/misc/bfin_rotary.c
 +++ b/drivers/input/misc/bfin_rotary.c
 @@ -35,6 +35,10 @@ struct bfin_rot {
 unsigned int down_key;
 unsigned int button_key;
 unsigned int rel_code;
 +
 +   unsigned short mode;
 +   unsigned short debounce;
 +
 unsigned short cnt_config;
 unsigned short cnt_imask;
 unsigned short cnt_debounce;
 @@ -94,6 +98,35 @@ static irqreturn_t bfin_rotary_isr(int irq, void *dev_id)
 return IRQ_HANDLED;
  }

 +static int bfin_rotary_open(struct input_dev *input)
 +{
 +   struct bfin_rot *rotary = input_get_drvdata(input);
 +   unsigned short val;
 +
 +   if (rotary-mode  ROT_DEBE)
 +   writew(rotary-debounce  DPRESCALE,
 +   rotary-base + CNT_DEBOUNCE_OFF);
 +
 +   writew(rotary-mode  ~CNTE, rotary-base + CNT_CONFIG_OFF);
 +
 +   val = UCIE | DCIE;
 +   if (rotary-button_key)
 +   val |= CZMIE;
 +   writew(val, rotary-base + CNT_IMASK_OFF);
 +
 +   writew(rotary-mode | CNTE, rotary-base + CNT_CONFIG_OFF);
 +
 +   return 0;
 +}
 +
 +static void bfin_rotary_close(struct input_dev *input)
 +{
 +   struct bfin_rot *rotary = input_get_drvdata(input);
 +
 +   writew(0, rotary-base + CNT_CONFIG_OFF);
 +   writew(0, rotary-base + CNT_IMASK_OFF);
 +}
 +
  static void bfin_rotary_free_action(void *data)
  {
 peripheral_free_list(data);
 @@ -154,6 +187,9 @@ static int bfin_rotary_probe(struct platform_device *pdev)
 rotary-button_key = pdata-rotary_button_key;
 rotary-rel_code = pdata-rotary_rel_code;

 +   rotary-mode = pdata-mode;
 +   rotary-debounce = pdata-debounce;
 +
 input-name = pdev-name;
 input-phys = bfin-rotary/input0;
 input-dev.parent = pdev-dev;
 @@ -165,6 +201,9 @@ static int bfin_rotary_probe(struct platform_device *pdev)
 input-id.product = 0x0001;
 input-id.version = 0x0100;

 +   input-open = bfin_rotary_open;
 +   input-close = bfin_rotary_close;
 +
 if (rotary-up_key) {
 __set_bit(EV_KEY, input-evbit);
 __set_bit(rotary-up_key, input-keybit);
 @@ -179,6 +218,9 @@ static int bfin_rotary_probe(struct platform_device *pdev)
 __set_bit(rotary-button_key, input-keybit);
 }

 +   /* Quiesce the device before requesting irq */
 +   bfin_rotary_close(input);
 +
 rotary-irq = platform_get_irq(pdev, 0);
 if (rotary-irq  0) {
 dev_err(dev, No rotary IRQ specified\n);

Could you generate the patch after applying patch bfin_rotary:
convert to use managed resources?
Your code base is different from mine. The above 3 lines doesn't exist
with the managed resources patch.

Thanks,

Sonic


 @@ -199,39 +241,12 @@ static int bfin_rotary_probe(struct platform_device 
 *pdev)
 return error;
 }

 -   if (pdata-rotary_button_key)
 -   writew(CZMIE, rotary-base + CNT_IMASK_OFF);
 -
 -   if (pdata-mode  ROT_DEBE)
 -   writew(pdata-debounce  DPRESCALE,
 -   rotary-base + CNT_DEBOUNCE_OFF);
 -
 -   if (pdata-mode)
 -   writew(readw(rotary-base + CNT_CONFIG_OFF) |
 -   (pdata-mode  ~CNTE),
 -   rotary-base + CNT_CONFIG_OFF);
 -
 -   writew(readw(rotary-base + CNT_IMASK_OFF) | UCIE | DCIE,
 -   rotary-base + CNT_IMASK_OFF);
 -   writew(readw(rotary-base + CNT_CONFIG_OFF) | CNTE,
 -   rotary-base + CNT_CONFIG_OFF);
 -
 platform_set_drvdata(pdev, rotary);
 device_init_wakeup(pdev-dev, 1);

 return 0;
  }

 -static int bfin_rotary_remove(struct platform_device *pdev)
 -{
 -   struct bfin_rot *rotary = platform_get_drvdata(pdev);
 -
 -   writew(0, rotary-base + CNT_CONFIG_OFF);
 -   writew(0, rotary-base + CNT_IMASK_OFF);
 -
 -   return 0;
 -}
 -
  static int __maybe_unused bfin_rotary_suspend(struct device *dev)
  {
 struct platform_device *pdev = to_platform_device(dev);
 @@ -270,7 +285,6 @@ static SIMPLE_DEV_PM_OPS(bfin_rotary_pm_ops,

  static struct platform_driver bfin_rotary_device_driver = {
 .probe  = bfin_rotary_probe,
 -   .remove = bfin_rotary_remove,
 .driver = {
 .name   = 

Re: [RFT/PATCH] Input: bfin_rotary - introduce open and close methods

2015-02-06 Thread Sonic Zhang
 + 0x16 } IF CC JUMP pcrel
Kernel Stack
Stack info:
 SP: [0x04027d58] 0x04027d58 /* kernel dynamic memory (maybe user-space) */
 Memory from 0x04027d50 to 04028000
04027d50: 000cda8c  0447f160 [04027d84] 00101cb4  002e7bd8  00301794
002fab6c  002e7c0c
04027d70: 04027da4  00301794  0030c310  04027da8  000cddc0  04027dac
00100950 00101c4c
04027d90: 00301794        04027dec  040225ac
04070af0  04027dd4
04027db0: 0010199a  0447f160  048a7d80  002c6018    04027df0
04027dec  04027df0
04027dd0: 00101c4c  04027df0  00100f50  04027dfc  001020d8  00301794
002788e0  00271bb8
04027df0: 04027e14  001021ba  00301794  002e5234  00319710  048a7d80
04027e54  00273210
04027e10: 048a7d80  04027e30  00102f8e  002e5234  048a7d80  000d4b8a
04027ea0  105a
04027e30: 04027e44  00319722  00319710  048a7d80  002c6018  04027ea0
106e00100100
04027e50: 00200200  00319710    04027e94  04027e00  0030c322
04027e98  00026130
04027e70: 00325c64  04027e9c 0001bcde 0063  0081453f  002ea330
00216528  
04027e90:   0006  0006  04027edc  04027edc  0030c28e
00325ef0  0031fc48
04027eb0: 0031fc28  0007  002c6018  0063  00291fb0  a8824141
002c56e0  0063
04027ed0: 0006  0006  0030c310  04027f0c  0021402e  00216528
04025a20  040256e0
04027ef0: 040258c8  002ea284  002ea330  00216528  ffa6  00216528
040258c8  0402feb0
04027f10:ffa00014 00216528  28060484  00214024    
8000  
04027f30:           
  
04027f50:           
  
04027f70:           
  
04027f90:           
  
04027fb0:           
  
04027fd0:           
  
04027ff0:       2806
Return addresses in stack:
address : 0x00100950 { _bus_for_each_dev + 0x5c }
address : 0x106e { _do_one_initcall + 0x6e }
address : 0x00100100 { _device_add + 0x3b4 }
address : 0x0001bcde { _parse_args + 0x12e }
address : 0xffa00014 { _ret_from_fork + 0x14 }
Modules linked in:
Kernel panic - not syncing: Kernel exception
---[ end Kernel panic - not syncing: Kernel exception


Regards,

Sonic Zhang
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[PATCH] blackfin: Remove non-existed Kconfig symbol VIDEO_MT9M114

2014-02-14 Thread Sonic Zhang
From: Sonic Zhang 

Bind different groups of one pinmux function to respective state names.
Add all states at once, no need to exclude each other by Kconfig symbol.

Signed-off-by: Sonic Zhang 
---
 arch/blackfin/mach-bf548/boards/ezkit.c |  6 --
 arch/blackfin/mach-bf609/boards/ezkit.c | 17 -
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c 
b/arch/blackfin/mach-bf548/boards/ezkit.c
index d495000..b5a8c87 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -2124,7 +2124,7 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] = {
PIN_MAP_MUX_GROUP_DEFAULT("bfin-rotary",  "pinctrl-adi2.0", NULL, 
"rotary"),
PIN_MAP_MUX_GROUP_DEFAULT("bfin_can.0",  "pinctrl-adi2.0", NULL, 
"can0"),
PIN_MAP_MUX_GROUP_DEFAULT("bfin_can.1",  "pinctrl-adi2.0", NULL, 
"can1"),
-   PIN_MAP_MUX_GROUP_DEFAULT("bf54x-lq043",  "pinctrl-adi2.0", NULL, 
"ppi0_24b"),
+   PIN_MAP_MUX_GROUP_DEFAULT("bf54x-lq043",  "pinctrl-adi2.0", 
"ppi0_24bgrp", "ppi0"),
PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.0",  "pinctrl-adi2.0", NULL, 
"sport0"),
PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.0",  "pinctrl-adi2.0", NULL, 
"sport0"),
PIN_MAP_MUX_GROUP_DEFAULT("bfin-ac97.0",  "pinctrl-adi2.0", NULL, 
"sport0"),
@@ -2146,7 +2146,9 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] = {
PIN_MAP_MUX_GROUP_DEFAULT("pata-bf54x",  "pinctrl-adi2.0", NULL, 
"atapi_alter"),
 #endif
PIN_MAP_MUX_GROUP_DEFAULT("bf5xx-nand.0",  "pinctrl-adi2.0", NULL, 
"nfc0"),
-   PIN_MAP_MUX_GROUP_DEFAULT("bf54x-keys",  "pinctrl-adi2.0", NULL, 
"keys_4x4"),
+   PIN_MAP_MUX_GROUP_DEFAULT("bf54x-keys",  "pinctrl-adi2.0", 
"keys_4x4grp", "keys"),
+   PIN_MAP_MUX_GROUP("bf54x-keys", "4bit",  "pinctrl-adi2.0", 
"keys_4x4grp", "keys"),
+   PIN_MAP_MUX_GROUP("bf54x-keys", "8bit",  "pinctrl-adi2.0", 
"keys_8x8grp", "keys"),
 };
 
 static int __init ezkit_init(void)
diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c 
b/arch/blackfin/mach-bf609/boards/ezkit.c
index 8de8bc6..b3147f0 100644
--- a/arch/blackfin/mach-bf609/boards/ezkit.c
+++ b/arch/blackfin/mach-bf609/boards/ezkit.c
@@ -2073,15 +2073,14 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] 
= {
PIN_MAP_MUX_GROUP_DEFAULT("bfin-rotary",  "pinctrl-adi2.0", NULL, 
"rotary"),
PIN_MAP_MUX_GROUP_DEFAULT("bfin_can.0",  "pinctrl-adi2.0", NULL, 
"can0"),
PIN_MAP_MUX_GROUP_DEFAULT("physmap-flash.0",  "pinctrl-adi2.0", NULL, 
"smc0"),
-   PIN_MAP_MUX_GROUP_DEFAULT("bf609_nl8048.2",  "pinctrl-adi2.0", NULL, 
"ppi2_16b"),
-   PIN_MAP_MUX_GROUP_DEFAULT("bfin_display.0",  "pinctrl-adi2.0", NULL, 
"ppi0_16b"),
-#if defined(CONFIG_VIDEO_MT9M114) || defined(CONFIG_VIDEO_MT9M114_MODULE)
-   PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0",  "pinctrl-adi2.0", NULL, 
"ppi0_8b"),
-#elif defined(CONFIG_VIDEO_VS6624) || defined(CONFIG_VIDEO_VS6624_MODULE)
-   PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0",  "pinctrl-adi2.0", NULL, 
"ppi0_16b"),
-#else
-   PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0",  "pinctrl-adi2.0", NULL, 
"ppi0_24b"),
-#endif
+   PIN_MAP_MUX_GROUP_DEFAULT("bf609_nl8048.2",  "pinctrl-adi2.0", 
"ppi2_16bgrp", "ppi2"),
+   PIN_MAP_MUX_GROUP("bfin_display.0", "8bit",  "pinctrl-adi2.0", 
"ppi2_8bgrp", "ppi2"),
+   PIN_MAP_MUX_GROUP_DEFAULT("bfin_display.0",  "pinctrl-adi2.0", 
"ppi2_16bgrp", "ppi2"),
+   PIN_MAP_MUX_GROUP("bfin_display.0", "16bit",  "pinctrl-adi2.0", 
"ppi2_16bgrp", "ppi2"),
+   PIN_MAP_MUX_GROUP("bfin_capture.0", "8bit",  "pinctrl-adi2.0", 
"ppi0_8bgrp", "ppi0"),
+   PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0",  "pinctrl-adi2.0", 
"ppi0_16bgrp", "ppi0"),
+   PIN_MAP_MUX_GROUP("bfin_capture.0", "16bit",  "pinctrl-adi2.0", 
"ppi0_16bgrp", "ppi0"),
+   PIN_MAP_MUX_GROUP("bfin_capture.0", "24bit",  "pinctrl-adi2.0", 
"ppi0_24bgrp", "ppi0"),
PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.0",  "pinctrl-adi2.0", NULL, 
"sport0"),
PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.0",  "pinctrl-adi2.0", NULL, 
"sport0"),
PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.1",  "pinctrl-adi2.0", NULL, 
"sport1"),
-- 
1.8.2.3


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[PATCH] pinctrl: pinctrl-adi: combine multiple groups of one function together

2014-02-14 Thread Sonic Zhang
From: Sonic Zhang 

The data pins of some peripheral are different if connecting to different
devices in one pinmux function. In the PPI case, data pins can be used
in 8, 16 and 24 pin groups individually. Add these groups into one ppi
function.

Signed-off-by: Sonic Zhang 
---
 drivers/pinctrl/pinctrl-adi2-bf54x.c | 138 +--
 drivers/pinctrl/pinctrl-adi2-bf60x.c | 128 
 drivers/pinctrl/pinctrl-adi2.c   |  12 +--
 drivers/pinctrl/pinctrl-adi2.h   |   8 +-
 4 files changed, 139 insertions(+), 147 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-adi2-bf54x.c 
b/drivers/pinctrl/pinctrl-adi2-bf54x.c
index ea9d9ab..008a29e 100644
--- a/drivers/pinctrl/pinctrl-adi2-bf54x.c
+++ b/drivers/pinctrl/pinctrl-adi2-bf54x.c
@@ -309,39 +309,6 @@ static const unsigned keys_8x8_pins[] = {
GPIO_PE4, GPIO_PE5, GPIO_PE6, GPIO_PE7,
 };
 
-static const struct adi_pin_group adi_pin_groups[] = {
-   ADI_PIN_GROUP("uart0grp", uart0_pins),
-   ADI_PIN_GROUP("uart1grp", uart1_pins),
-   ADI_PIN_GROUP("uart1ctsrtsgrp", uart1_ctsrts_pins),
-   ADI_PIN_GROUP("uart2grp", uart2_pins),
-   ADI_PIN_GROUP("uart3grp", uart3_pins),
-   ADI_PIN_GROUP("uart3ctsrtsgrp", uart3_ctsrts_pins),
-   ADI_PIN_GROUP("rsi0grp", rsi0_pins),
-   ADI_PIN_GROUP("spi0grp", spi0_pins),
-   ADI_PIN_GROUP("spi1grp", spi1_pins),
-   ADI_PIN_GROUP("twi0grp", twi0_pins),
-   ADI_PIN_GROUP("twi1grp", twi1_pins),
-   ADI_PIN_GROUP("rotarygrp", rotary_pins),
-   ADI_PIN_GROUP("can0grp", can0_pins),
-   ADI_PIN_GROUP("can1grp", can1_pins),
-   ADI_PIN_GROUP("smc0grp", smc0_pins),
-   ADI_PIN_GROUP("sport0grp", sport0_pins),
-   ADI_PIN_GROUP("sport1grp", sport1_pins),
-   ADI_PIN_GROUP("sport2grp", sport2_pins),
-   ADI_PIN_GROUP("sport3grp", sport3_pins),
-   ADI_PIN_GROUP("ppi0_8bgrp", ppi0_8b_pins),
-   ADI_PIN_GROUP("ppi0_16bgrp", ppi0_16b_pins),
-   ADI_PIN_GROUP("ppi0_24bgrp", ppi0_24b_pins),
-   ADI_PIN_GROUP("ppi1_8bgrp", ppi1_8b_pins),
-   ADI_PIN_GROUP("ppi1_16bgrp", ppi1_16b_pins),
-   ADI_PIN_GROUP("ppi2_8bgrp", ppi2_8b_pins),
-   ADI_PIN_GROUP("atapigrp", atapi_pins),
-   ADI_PIN_GROUP("atapialtergrp", atapi_alter_pins),
-   ADI_PIN_GROUP("nfc0grp", nfc0_pins),
-   ADI_PIN_GROUP("keys_4x4grp", keys_4x4_pins),
-   ADI_PIN_GROUP("keys_8x8grp", keys_8x8_pins),
-};
-
 static const unsigned short uart0_mux[] = {
P_UART0_TX, P_UART0_RX,
0
@@ -513,6 +480,39 @@ static const unsigned short keys_8x8_mux[] = {
0
 };
 
+static const struct adi_pin_group adi_pin_groups[] = {
+   ADI_PIN_GROUP("uart0grp", uart0_pins, uart0_mux),
+   ADI_PIN_GROUP("uart1grp", uart1_pins, uart1_mux),
+   ADI_PIN_GROUP("uart1ctsrtsgrp", uart1_ctsrts_pins, uart1_ctsrts_mux),
+   ADI_PIN_GROUP("uart2grp", uart2_pins, uart2_mux),
+   ADI_PIN_GROUP("uart3grp", uart3_pins, uart3_mux),
+   ADI_PIN_GROUP("uart3ctsrtsgrp", uart3_ctsrts_pins, uart3_ctsrts_mux),
+   ADI_PIN_GROUP("rsi0grp", rsi0_pins, rsi0_mux),
+   ADI_PIN_GROUP("spi0grp", spi0_pins, spi0_mux),
+   ADI_PIN_GROUP("spi1grp", spi1_pins, spi1_mux),
+   ADI_PIN_GROUP("twi0grp", twi0_pins, twi0_mux),
+   ADI_PIN_GROUP("twi1grp", twi1_pins, twi1_mux),
+   ADI_PIN_GROUP("rotarygrp", rotary_pins, rotary_mux),
+   ADI_PIN_GROUP("can0grp", can0_pins, can0_mux),
+   ADI_PIN_GROUP("can1grp", can1_pins, can1_mux),
+   ADI_PIN_GROUP("smc0grp", smc0_pins, smc0_mux),
+   ADI_PIN_GROUP("sport0grp", sport0_pins, sport0_mux),
+   ADI_PIN_GROUP("sport1grp", sport1_pins, sport1_mux),
+   ADI_PIN_GROUP("sport2grp", sport2_pins, sport2_mux),
+   ADI_PIN_GROUP("sport3grp", sport3_pins, sport3_mux),
+   ADI_PIN_GROUP("ppi0_8bgrp", ppi0_8b_pins, ppi0_8b_mux),
+   ADI_PIN_GROUP("ppi0_16bgrp", ppi0_16b_pins, ppi0_16b_mux),
+   ADI_PIN_GROUP("ppi0_24bgrp", ppi0_24b_pins, ppi0_24b_mux),
+   ADI_PIN_GROUP("ppi1_8bgrp", ppi1_8b_pins, ppi1_8b_mux),
+   ADI_PIN_GROUP("ppi1_16bgrp", ppi1_16b_pins, ppi1_16b_mux),
+   ADI_PIN_GROUP("ppi2_8bgrp", ppi2_8b_pins, ppi2_8b_mux),
+   ADI_PIN_GROUP("atapigrp", atapi_pins, atapi_mux),
+   ADI_PIN_GROUP("atapialtergrp", atapi_alter_pins, atapi_alter_mux),
+   ADI_PIN_GROUP("nfc0grp", nfc0_pins, nfc0_mux),
+   ADI_PIN_GRO

[PATCH] pinctrl: pinctrl-adi: combine multiple groups of one function together

2014-02-14 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

The data pins of some peripheral are different if connecting to different
devices in one pinmux function. In the PPI case, data pins can be used
in 8, 16 and 24 pin groups individually. Add these groups into one ppi
function.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 drivers/pinctrl/pinctrl-adi2-bf54x.c | 138 +--
 drivers/pinctrl/pinctrl-adi2-bf60x.c | 128 
 drivers/pinctrl/pinctrl-adi2.c   |  12 +--
 drivers/pinctrl/pinctrl-adi2.h   |   8 +-
 4 files changed, 139 insertions(+), 147 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-adi2-bf54x.c 
b/drivers/pinctrl/pinctrl-adi2-bf54x.c
index ea9d9ab..008a29e 100644
--- a/drivers/pinctrl/pinctrl-adi2-bf54x.c
+++ b/drivers/pinctrl/pinctrl-adi2-bf54x.c
@@ -309,39 +309,6 @@ static const unsigned keys_8x8_pins[] = {
GPIO_PE4, GPIO_PE5, GPIO_PE6, GPIO_PE7,
 };
 
-static const struct adi_pin_group adi_pin_groups[] = {
-   ADI_PIN_GROUP(uart0grp, uart0_pins),
-   ADI_PIN_GROUP(uart1grp, uart1_pins),
-   ADI_PIN_GROUP(uart1ctsrtsgrp, uart1_ctsrts_pins),
-   ADI_PIN_GROUP(uart2grp, uart2_pins),
-   ADI_PIN_GROUP(uart3grp, uart3_pins),
-   ADI_PIN_GROUP(uart3ctsrtsgrp, uart3_ctsrts_pins),
-   ADI_PIN_GROUP(rsi0grp, rsi0_pins),
-   ADI_PIN_GROUP(spi0grp, spi0_pins),
-   ADI_PIN_GROUP(spi1grp, spi1_pins),
-   ADI_PIN_GROUP(twi0grp, twi0_pins),
-   ADI_PIN_GROUP(twi1grp, twi1_pins),
-   ADI_PIN_GROUP(rotarygrp, rotary_pins),
-   ADI_PIN_GROUP(can0grp, can0_pins),
-   ADI_PIN_GROUP(can1grp, can1_pins),
-   ADI_PIN_GROUP(smc0grp, smc0_pins),
-   ADI_PIN_GROUP(sport0grp, sport0_pins),
-   ADI_PIN_GROUP(sport1grp, sport1_pins),
-   ADI_PIN_GROUP(sport2grp, sport2_pins),
-   ADI_PIN_GROUP(sport3grp, sport3_pins),
-   ADI_PIN_GROUP(ppi0_8bgrp, ppi0_8b_pins),
-   ADI_PIN_GROUP(ppi0_16bgrp, ppi0_16b_pins),
-   ADI_PIN_GROUP(ppi0_24bgrp, ppi0_24b_pins),
-   ADI_PIN_GROUP(ppi1_8bgrp, ppi1_8b_pins),
-   ADI_PIN_GROUP(ppi1_16bgrp, ppi1_16b_pins),
-   ADI_PIN_GROUP(ppi2_8bgrp, ppi2_8b_pins),
-   ADI_PIN_GROUP(atapigrp, atapi_pins),
-   ADI_PIN_GROUP(atapialtergrp, atapi_alter_pins),
-   ADI_PIN_GROUP(nfc0grp, nfc0_pins),
-   ADI_PIN_GROUP(keys_4x4grp, keys_4x4_pins),
-   ADI_PIN_GROUP(keys_8x8grp, keys_8x8_pins),
-};
-
 static const unsigned short uart0_mux[] = {
P_UART0_TX, P_UART0_RX,
0
@@ -513,6 +480,39 @@ static const unsigned short keys_8x8_mux[] = {
0
 };
 
+static const struct adi_pin_group adi_pin_groups[] = {
+   ADI_PIN_GROUP(uart0grp, uart0_pins, uart0_mux),
+   ADI_PIN_GROUP(uart1grp, uart1_pins, uart1_mux),
+   ADI_PIN_GROUP(uart1ctsrtsgrp, uart1_ctsrts_pins, uart1_ctsrts_mux),
+   ADI_PIN_GROUP(uart2grp, uart2_pins, uart2_mux),
+   ADI_PIN_GROUP(uart3grp, uart3_pins, uart3_mux),
+   ADI_PIN_GROUP(uart3ctsrtsgrp, uart3_ctsrts_pins, uart3_ctsrts_mux),
+   ADI_PIN_GROUP(rsi0grp, rsi0_pins, rsi0_mux),
+   ADI_PIN_GROUP(spi0grp, spi0_pins, spi0_mux),
+   ADI_PIN_GROUP(spi1grp, spi1_pins, spi1_mux),
+   ADI_PIN_GROUP(twi0grp, twi0_pins, twi0_mux),
+   ADI_PIN_GROUP(twi1grp, twi1_pins, twi1_mux),
+   ADI_PIN_GROUP(rotarygrp, rotary_pins, rotary_mux),
+   ADI_PIN_GROUP(can0grp, can0_pins, can0_mux),
+   ADI_PIN_GROUP(can1grp, can1_pins, can1_mux),
+   ADI_PIN_GROUP(smc0grp, smc0_pins, smc0_mux),
+   ADI_PIN_GROUP(sport0grp, sport0_pins, sport0_mux),
+   ADI_PIN_GROUP(sport1grp, sport1_pins, sport1_mux),
+   ADI_PIN_GROUP(sport2grp, sport2_pins, sport2_mux),
+   ADI_PIN_GROUP(sport3grp, sport3_pins, sport3_mux),
+   ADI_PIN_GROUP(ppi0_8bgrp, ppi0_8b_pins, ppi0_8b_mux),
+   ADI_PIN_GROUP(ppi0_16bgrp, ppi0_16b_pins, ppi0_16b_mux),
+   ADI_PIN_GROUP(ppi0_24bgrp, ppi0_24b_pins, ppi0_24b_mux),
+   ADI_PIN_GROUP(ppi1_8bgrp, ppi1_8b_pins, ppi1_8b_mux),
+   ADI_PIN_GROUP(ppi1_16bgrp, ppi1_16b_pins, ppi1_16b_mux),
+   ADI_PIN_GROUP(ppi2_8bgrp, ppi2_8b_pins, ppi2_8b_mux),
+   ADI_PIN_GROUP(atapigrp, atapi_pins, atapi_mux),
+   ADI_PIN_GROUP(atapialtergrp, atapi_alter_pins, atapi_alter_mux),
+   ADI_PIN_GROUP(nfc0grp, nfc0_pins, nfc0_mux),
+   ADI_PIN_GROUP(keys_4x4grp, keys_4x4_pins, keys_4x4_mux),
+   ADI_PIN_GROUP(keys_8x8grp, keys_8x8_pins, keys_8x8_mux),
+};
+
 static const char * const uart0grp[] = { uart0grp };
 static const char * const uart1grp[] = { uart1grp };
 static const char * const uart1ctsrtsgrp[] = { uart1ctsrtsgrp };
@@ -532,49 +532,45 @@ static const char * const sport0grp[] = { sport0grp };
 static const char * const sport1grp[] = { sport1grp };
 static const char * const sport2grp[] = { sport2grp };
 static const char * const sport3grp[] = { sport3grp };
-static const char * const ppi0_8bgrp[] = { ppi0_8bgrp };
-static const char * const ppi0_16bgrp[] = { ppi0_16bgrp

[PATCH] blackfin: Remove non-existed Kconfig symbol VIDEO_MT9M114

2014-02-14 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Bind different groups of one pinmux function to respective state names.
Add all states at once, no need to exclude each other by Kconfig symbol.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 arch/blackfin/mach-bf548/boards/ezkit.c |  6 --
 arch/blackfin/mach-bf609/boards/ezkit.c | 17 -
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c 
b/arch/blackfin/mach-bf548/boards/ezkit.c
index d495000..b5a8c87 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -2124,7 +2124,7 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] = {
PIN_MAP_MUX_GROUP_DEFAULT(bfin-rotary,  pinctrl-adi2.0, NULL, 
rotary),
PIN_MAP_MUX_GROUP_DEFAULT(bfin_can.0,  pinctrl-adi2.0, NULL, 
can0),
PIN_MAP_MUX_GROUP_DEFAULT(bfin_can.1,  pinctrl-adi2.0, NULL, 
can1),
-   PIN_MAP_MUX_GROUP_DEFAULT(bf54x-lq043,  pinctrl-adi2.0, NULL, 
ppi0_24b),
+   PIN_MAP_MUX_GROUP_DEFAULT(bf54x-lq043,  pinctrl-adi2.0, 
ppi0_24bgrp, ppi0),
PIN_MAP_MUX_GROUP_DEFAULT(bfin-i2s.0,  pinctrl-adi2.0, NULL, 
sport0),
PIN_MAP_MUX_GROUP_DEFAULT(bfin-tdm.0,  pinctrl-adi2.0, NULL, 
sport0),
PIN_MAP_MUX_GROUP_DEFAULT(bfin-ac97.0,  pinctrl-adi2.0, NULL, 
sport0),
@@ -2146,7 +2146,9 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] = {
PIN_MAP_MUX_GROUP_DEFAULT(pata-bf54x,  pinctrl-adi2.0, NULL, 
atapi_alter),
 #endif
PIN_MAP_MUX_GROUP_DEFAULT(bf5xx-nand.0,  pinctrl-adi2.0, NULL, 
nfc0),
-   PIN_MAP_MUX_GROUP_DEFAULT(bf54x-keys,  pinctrl-adi2.0, NULL, 
keys_4x4),
+   PIN_MAP_MUX_GROUP_DEFAULT(bf54x-keys,  pinctrl-adi2.0, 
keys_4x4grp, keys),
+   PIN_MAP_MUX_GROUP(bf54x-keys, 4bit,  pinctrl-adi2.0, 
keys_4x4grp, keys),
+   PIN_MAP_MUX_GROUP(bf54x-keys, 8bit,  pinctrl-adi2.0, 
keys_8x8grp, keys),
 };
 
 static int __init ezkit_init(void)
diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c 
b/arch/blackfin/mach-bf609/boards/ezkit.c
index 8de8bc6..b3147f0 100644
--- a/arch/blackfin/mach-bf609/boards/ezkit.c
+++ b/arch/blackfin/mach-bf609/boards/ezkit.c
@@ -2073,15 +2073,14 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] 
= {
PIN_MAP_MUX_GROUP_DEFAULT(bfin-rotary,  pinctrl-adi2.0, NULL, 
rotary),
PIN_MAP_MUX_GROUP_DEFAULT(bfin_can.0,  pinctrl-adi2.0, NULL, 
can0),
PIN_MAP_MUX_GROUP_DEFAULT(physmap-flash.0,  pinctrl-adi2.0, NULL, 
smc0),
-   PIN_MAP_MUX_GROUP_DEFAULT(bf609_nl8048.2,  pinctrl-adi2.0, NULL, 
ppi2_16b),
-   PIN_MAP_MUX_GROUP_DEFAULT(bfin_display.0,  pinctrl-adi2.0, NULL, 
ppi0_16b),
-#if defined(CONFIG_VIDEO_MT9M114) || defined(CONFIG_VIDEO_MT9M114_MODULE)
-   PIN_MAP_MUX_GROUP_DEFAULT(bfin_capture.0,  pinctrl-adi2.0, NULL, 
ppi0_8b),
-#elif defined(CONFIG_VIDEO_VS6624) || defined(CONFIG_VIDEO_VS6624_MODULE)
-   PIN_MAP_MUX_GROUP_DEFAULT(bfin_capture.0,  pinctrl-adi2.0, NULL, 
ppi0_16b),
-#else
-   PIN_MAP_MUX_GROUP_DEFAULT(bfin_capture.0,  pinctrl-adi2.0, NULL, 
ppi0_24b),
-#endif
+   PIN_MAP_MUX_GROUP_DEFAULT(bf609_nl8048.2,  pinctrl-adi2.0, 
ppi2_16bgrp, ppi2),
+   PIN_MAP_MUX_GROUP(bfin_display.0, 8bit,  pinctrl-adi2.0, 
ppi2_8bgrp, ppi2),
+   PIN_MAP_MUX_GROUP_DEFAULT(bfin_display.0,  pinctrl-adi2.0, 
ppi2_16bgrp, ppi2),
+   PIN_MAP_MUX_GROUP(bfin_display.0, 16bit,  pinctrl-adi2.0, 
ppi2_16bgrp, ppi2),
+   PIN_MAP_MUX_GROUP(bfin_capture.0, 8bit,  pinctrl-adi2.0, 
ppi0_8bgrp, ppi0),
+   PIN_MAP_MUX_GROUP_DEFAULT(bfin_capture.0,  pinctrl-adi2.0, 
ppi0_16bgrp, ppi0),
+   PIN_MAP_MUX_GROUP(bfin_capture.0, 16bit,  pinctrl-adi2.0, 
ppi0_16bgrp, ppi0),
+   PIN_MAP_MUX_GROUP(bfin_capture.0, 24bit,  pinctrl-adi2.0, 
ppi0_24bgrp, ppi0),
PIN_MAP_MUX_GROUP_DEFAULT(bfin-i2s.0,  pinctrl-adi2.0, NULL, 
sport0),
PIN_MAP_MUX_GROUP_DEFAULT(bfin-tdm.0,  pinctrl-adi2.0, NULL, 
sport0),
PIN_MAP_MUX_GROUP_DEFAULT(bfin-i2s.1,  pinctrl-adi2.0, NULL, 
sport1),
-- 
1.8.2.3


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Re: [PATCH 06/17] i2c: i2c-bfin-twi: deprecate class based instantiation

2014-02-11 Thread Sonic Zhang
Acked-by: Sonic Zhang 

On Mon, Feb 10, 2014 at 6:04 PM, Wolfram Sang  wrote:
> Warn users that class based instantiation is going away soon in favour
> of more robust probing and faster bootup times.
>
> Signed-off-by: Wolfram Sang 
> Cc: Sonic Zhang 
> ---
>
> This patch is a suggestion. Looking for an ack by someone who actually uses
> the driver.
>
>  drivers/i2c/busses/i2c-bfin-twi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/busses/i2c-bfin-twi.c 
> b/drivers/i2c/busses/i2c-bfin-twi.c
> index 3b9bd9a..c75f0e9 100644
> --- a/drivers/i2c/busses/i2c-bfin-twi.c
> +++ b/drivers/i2c/busses/i2c-bfin-twi.c
> @@ -669,7 +669,7 @@ static int i2c_bfin_twi_probe(struct platform_device 
> *pdev)
> strlcpy(p_adap->name, pdev->name, sizeof(p_adap->name));
> p_adap->algo = _twi_algorithm;
> p_adap->algo_data = iface;
> -   p_adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
> +   p_adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD | 
> I2C_CLASS_DEPRECATED;
> p_adap->dev.parent = >dev;
> p_adap->timeout = 5 * HZ;
> p_adap->retries = 3;
> --
> 1.8.5.1
>
> --
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Re: [PATCH 06/17] i2c: i2c-bfin-twi: deprecate class based instantiation

2014-02-11 Thread Sonic Zhang
Acked-by: Sonic Zhang sonic.zh...@analog.com

On Mon, Feb 10, 2014 at 6:04 PM, Wolfram Sang w...@the-dreams.de wrote:
 Warn users that class based instantiation is going away soon in favour
 of more robust probing and faster bootup times.

 Signed-off-by: Wolfram Sang w...@the-dreams.de
 Cc: Sonic Zhang sonic.zh...@analog.com
 ---

 This patch is a suggestion. Looking for an ack by someone who actually uses
 the driver.

  drivers/i2c/busses/i2c-bfin-twi.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/drivers/i2c/busses/i2c-bfin-twi.c 
 b/drivers/i2c/busses/i2c-bfin-twi.c
 index 3b9bd9a..c75f0e9 100644
 --- a/drivers/i2c/busses/i2c-bfin-twi.c
 +++ b/drivers/i2c/busses/i2c-bfin-twi.c
 @@ -669,7 +669,7 @@ static int i2c_bfin_twi_probe(struct platform_device 
 *pdev)
 strlcpy(p_adap-name, pdev-name, sizeof(p_adap-name));
 p_adap-algo = bfin_twi_algorithm;
 p_adap-algo_data = iface;
 -   p_adap-class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 +   p_adap-class = I2C_CLASS_HWMON | I2C_CLASS_SPD | 
 I2C_CLASS_DEPRECATED;
 p_adap-dev.parent = pdev-dev;
 p_adap-timeout = 5 * HZ;
 p_adap-retries = 3;
 --
 1.8.5.1

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[PATCH] MAINTAINERS: ADI Linux development mailing lists change to the new server.

2014-01-27 Thread Sonic Zhang
From: Sonic Zhang 

Update Blackfin arch branch maintainer's email as well.

Signed-off-by: Sonic Zhang 
---
 MAINTAINERS | 42 --
 1 file changed, 20 insertions(+), 22 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7cacc88..bd49e70 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -288,36 +288,36 @@ F:sound/pci/ad1889.*
 
 AD525X ANALOG DEVICES DIGITAL POTENTIOMETERS DRIVER
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5254
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/misc/ad525x_dpot.c
 
 AD5398 CURRENT REGULATOR DRIVER (AD5398/AD5821)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5398
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/regulator/ad5398.c
 
 AD714X CAPACITANCE TOUCH SENSOR DRIVER (AD7142/3/7/8/7A)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7142
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/ad714x.c
 
 AD7877 TOUCHSCREEN DRIVER
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7877
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7877.c
 
 AD7879 TOUCHSCREEN DRIVER (AD7879/AD7889)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7879
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7879.c
 
@@ -353,8 +353,8 @@ F:  include/media/adp1653.h
 
 ADP5520 BACKLIGHT DRIVER WITH IO EXPANDER (ADP5520/ADP5501)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5520
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/mfd/adp5520.c
 F: drivers/video/backlight/adp5520_bl.c
@@ -364,16 +364,16 @@ F:drivers/input/keyboard/adp5520-keys.c
 
 ADP5588 QWERTY KEYPAD AND IO EXPANDER DRIVER (ADP5588/ADP5587)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5588
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/keyboard/adp5588-keys.c
 F: drivers/gpio/gpio-adp5588.c
 
 ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP8860
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/video/backlight/adp8860_bl.c
 
@@ -399,8 +399,8 @@ F:  drivers/hwmon/adt7475.c
 
 ADXL34X THREE-AXIS DIGITAL ACCELEROMETER DRIVER (ADXL345/ADXL346)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADXL345
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/adxl34x.c
 
@@ -588,9 +588,9 @@ F:  drivers/media/i2c/adv7604*
 
 ANALOG DEVICES INC ASOC CODEC DRIVERS
 M: Lars-Peter Clausen 
-L: device-drivers-de...@blackfin.uclinux.org
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://wiki.analog.com/
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: sound/soc/codecs/adau*
 F: sound/soc/codecs/adav*
@@ -599,7 +599,7 @@ F:  sound/soc/codecs/ssm*
 F: sound/soc/codecs/sigmadsp.*
 
 ANALOG DEVICES INC ASOC DRIVERS
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://blackfin.uclinux.org/
 S: Supported
@@ -1666,56 +1666,54 @@ F:  fs/bfs/
 F: include/uapi/linux/bfs_fs.h
 
 BLACKFIN ARCHITECTURE
-M: Mike Frysinger 
-L: uclinux-dist-de...@blackfin.uclinux.org
+M: Steven Miao 
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: arch/blackfin/
 
 BLACKFIN EMAC DRIVER
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/net/ethernet/adi/
 
 BLACKFIN RTC DRIVER
-M: Mike Frysinger 
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/rtc/rtc-bfin.c
 
 BLACKFIN SDH DRIVER
 M: Sonic Zhang 
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/mmc/host/bfin_sdh.c
 
 BLACKFIN SERIAL DRIVER
 M: Sonic

[PATCH 2/3 v2] pinctrl-adi2: change irq_base from usigned int to int

2014-01-27 Thread Sonic Zhang
From: Sonic Zhang 

Negative irq_base means there is no fixed Linux irq mappings are created from 
the platform data.
The driver calls irq_create_mapping to allocate a virtual Linux irq.

Signed-off-by: Sonic Zhang 
---
v2-changes:
 - reword the patch description

 drivers/pinctrl/pinctrl-adi2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index e8120fa..9fb53c9 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -173,7 +173,7 @@ struct adi_pinctrl {
 struct gpio_port {
struct list_head node;
void __iomem *base;
-   unsigned int irq_base;
+   int irq_base;
unsigned int width;
struct gpio_port_t *regs;
struct gpio_port_saved saved_data;
-- 
1.8.2.3


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[PATCH 3/3] pinctrl-adi2: fix coding style issue

2014-01-27 Thread Sonic Zhang
From: Sonic Zhang 

Signed-off-by: Sonic Zhang 
---
 drivers/pinctrl/pinctrl-adi2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index 9fb53c9..72450a1 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -641,7 +641,7 @@ static int adi_pinmux_enable(struct pinctrl_dev *pctldev, 
unsigned selector,
spin_lock_irqsave(>lock, flags);
 
portmux_setup(port, pin_to_offset(range, pin),
-P_FUNCT2MUX(*mux));
+   P_FUNCT2MUX(*mux));
port_setup(port, pin_to_offset(range, pin), false);
mux++;
 
-- 
1.8.2.3


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[PATCH 1/3] pinctrl: Move pint PM storage structure out of blackfin architecture.

2014-01-27 Thread Sonic Zhang
From: Sonic Zhang 

It is better to keep this structure in the pinctrl-adi2 driver.

Signed-off-by: Sonic Zhang 
---
 arch/blackfin/include/asm/irq.h |  9 -
 drivers/pinctrl/pinctrl-adi2.c  | 15 ++-
 2 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index 2fd04f1..89de539 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
@@ -20,15 +20,6 @@
 /* SYS_IRQS and NR_IRQS are defined in  */
 #include 
 
-/*
- * pm save bfin pint registers
- */
-struct adi_pm_pint_save {
-   u32 assign;
-   u32 edge_set;
-   u32 invert_set;
-};
-
 #if ANOMALY_05000244 && defined(CONFIG_BFIN_ICACHE)
 # define NOP_PAD_ANOMALY_05000244 "nop; nop;"
 #else
diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index 7a39562..e8120fa 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -89,6 +89,19 @@ struct gpio_port_saved {
u32 mux;
 };
 
+/*
+ * struct gpio_pint_saved - PINT registers saved in PM operations
+ *
+ * @assign: ASSIGN register
+ * @edge_set: EDGE_SET register
+ * @invert_set: INVERT_SET register
+ */
+struct gpio_pint_saved {
+   u32 assign;
+   u32 edge_set;
+   u32 invert_set;
+};
+
 /**
  * struct gpio_pint - Pin interrupt controller device. Multiple ADI GPIO
  * banks can be mapped into one Pin interrupt controller.
@@ -114,7 +127,7 @@ struct gpio_pint {
int irq;
struct irq_domain *domain[2];
struct gpio_pint_regs *regs;
-   struct adi_pm_pint_save saved_data;
+   struct gpio_pint_saved saved_data;
int map_count;
spinlock_t lock;
 
-- 
1.8.2.3


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[PATCH 2/3] pinctrl-adi2: change irq_base from usigned int to int

2014-01-27 Thread Sonic Zhang
From: Sonic Zhang 

Negative irq_base means this gpio port doens't support interrupts.

Signed-off-by: Sonic Zhang 
---
 drivers/pinctrl/pinctrl-adi2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index e8120fa..9fb53c9 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -173,7 +173,7 @@ struct adi_pinctrl {
 struct gpio_port {
struct list_head node;
void __iomem *base;
-   unsigned int irq_base;
+   int irq_base;
unsigned int width;
struct gpio_port_t *regs;
struct gpio_port_saved saved_data;
-- 
1.8.2.3


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[PATCH 2/3] pinctrl-adi2: change irq_base from usigned int to int

2014-01-27 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Negative irq_base means this gpio port doens't support interrupts.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 drivers/pinctrl/pinctrl-adi2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index e8120fa..9fb53c9 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -173,7 +173,7 @@ struct adi_pinctrl {
 struct gpio_port {
struct list_head node;
void __iomem *base;
-   unsigned int irq_base;
+   int irq_base;
unsigned int width;
struct gpio_port_t *regs;
struct gpio_port_saved saved_data;
-- 
1.8.2.3


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[PATCH 1/3] pinctrl: Move pint PM storage structure out of blackfin architecture.

2014-01-27 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

It is better to keep this structure in the pinctrl-adi2 driver.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 arch/blackfin/include/asm/irq.h |  9 -
 drivers/pinctrl/pinctrl-adi2.c  | 15 ++-
 2 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index 2fd04f1..89de539 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
@@ -20,15 +20,6 @@
 /* SYS_IRQS and NR_IRQS are defined in mach-bf5xx/irq.h */
 #include mach/irq.h
 
-/*
- * pm save bfin pint registers
- */
-struct adi_pm_pint_save {
-   u32 assign;
-   u32 edge_set;
-   u32 invert_set;
-};
-
 #if ANOMALY_05000244  defined(CONFIG_BFIN_ICACHE)
 # define NOP_PAD_ANOMALY_05000244 nop; nop;
 #else
diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index 7a39562..e8120fa 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -89,6 +89,19 @@ struct gpio_port_saved {
u32 mux;
 };
 
+/*
+ * struct gpio_pint_saved - PINT registers saved in PM operations
+ *
+ * @assign: ASSIGN register
+ * @edge_set: EDGE_SET register
+ * @invert_set: INVERT_SET register
+ */
+struct gpio_pint_saved {
+   u32 assign;
+   u32 edge_set;
+   u32 invert_set;
+};
+
 /**
  * struct gpio_pint - Pin interrupt controller device. Multiple ADI GPIO
  * banks can be mapped into one Pin interrupt controller.
@@ -114,7 +127,7 @@ struct gpio_pint {
int irq;
struct irq_domain *domain[2];
struct gpio_pint_regs *regs;
-   struct adi_pm_pint_save saved_data;
+   struct gpio_pint_saved saved_data;
int map_count;
spinlock_t lock;
 
-- 
1.8.2.3


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[PATCH 3/3] pinctrl-adi2: fix coding style issue

2014-01-27 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 drivers/pinctrl/pinctrl-adi2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index 9fb53c9..72450a1 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -641,7 +641,7 @@ static int adi_pinmux_enable(struct pinctrl_dev *pctldev, 
unsigned selector,
spin_lock_irqsave(port-lock, flags);
 
portmux_setup(port, pin_to_offset(range, pin),
-P_FUNCT2MUX(*mux));
+   P_FUNCT2MUX(*mux));
port_setup(port, pin_to_offset(range, pin), false);
mux++;
 
-- 
1.8.2.3


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[PATCH 2/3 v2] pinctrl-adi2: change irq_base from usigned int to int

2014-01-27 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Negative irq_base means there is no fixed Linux irq mappings are created from 
the platform data.
The driver calls irq_create_mapping to allocate a virtual Linux irq.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
v2-changes:
 - reword the patch description

 drivers/pinctrl/pinctrl-adi2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index e8120fa..9fb53c9 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -173,7 +173,7 @@ struct adi_pinctrl {
 struct gpio_port {
struct list_head node;
void __iomem *base;
-   unsigned int irq_base;
+   int irq_base;
unsigned int width;
struct gpio_port_t *regs;
struct gpio_port_saved saved_data;
-- 
1.8.2.3


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[PATCH] MAINTAINERS: ADI Linux development mailing lists change to the new server.

2014-01-27 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Update Blackfin arch branch maintainer's email as well.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 MAINTAINERS | 42 --
 1 file changed, 20 insertions(+), 22 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7cacc88..bd49e70 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -288,36 +288,36 @@ F:sound/pci/ad1889.*
 
 AD525X ANALOG DEVICES DIGITAL POTENTIOMETERS DRIVER
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5254
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/misc/ad525x_dpot.c
 
 AD5398 CURRENT REGULATOR DRIVER (AD5398/AD5821)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5398
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/regulator/ad5398.c
 
 AD714X CAPACITANCE TOUCH SENSOR DRIVER (AD7142/3/7/8/7A)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7142
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/ad714x.c
 
 AD7877 TOUCHSCREEN DRIVER
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7877
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7877.c
 
 AD7879 TOUCHSCREEN DRIVER (AD7879/AD7889)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7879
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7879.c
 
@@ -353,8 +353,8 @@ F:  include/media/adp1653.h
 
 ADP5520 BACKLIGHT DRIVER WITH IO EXPANDER (ADP5520/ADP5501)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5520
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/mfd/adp5520.c
 F: drivers/video/backlight/adp5520_bl.c
@@ -364,16 +364,16 @@ F:drivers/input/keyboard/adp5520-keys.c
 
 ADP5588 QWERTY KEYPAD AND IO EXPANDER DRIVER (ADP5588/ADP5587)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5588
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/keyboard/adp5588-keys.c
 F: drivers/gpio/gpio-adp5588.c
 
 ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP8860
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/video/backlight/adp8860_bl.c
 
@@ -399,8 +399,8 @@ F:  drivers/hwmon/adt7475.c
 
 ADXL34X THREE-AXIS DIGITAL ACCELEROMETER DRIVER (ADXL345/ADXL346)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADXL345
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/adxl34x.c
 
@@ -588,9 +588,9 @@ F:  drivers/media/i2c/adv7604*
 
 ANALOG DEVICES INC ASOC CODEC DRIVERS
 M: Lars-Peter Clausen l...@metafoo.de
-L: device-drivers-de...@blackfin.uclinux.org
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://wiki.analog.com/
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: sound/soc/codecs/adau*
 F: sound/soc/codecs/adav*
@@ -599,7 +599,7 @@ F:  sound/soc/codecs/ssm*
 F: sound/soc/codecs/sigmadsp.*
 
 ANALOG DEVICES INC ASOC DRIVERS
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://blackfin.uclinux.org/
 S: Supported
@@ -1666,56 +1666,54 @@ F:  fs/bfs/
 F: include/uapi/linux/bfs_fs.h
 
 BLACKFIN ARCHITECTURE
-M: Mike Frysinger vap...@gentoo.org
-L: uclinux-dist-de...@blackfin.uclinux.org
+M: Steven Miao real...@gmail.com
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: arch/blackfin/
 
 BLACKFIN EMAC DRIVER
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/net/ethernet/adi/
 
 BLACKFIN RTC DRIVER
-M: Mike Frysinger vapier@gmail.com
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de

[PATCH] MAINTAINERS: ADI Linux development mailing lists change to the new server.

2014-01-25 Thread Sonic Zhang
From: Sonic Zhang 

Update Blackfin arch branch maintainer's email as well.

Signed-off-by: Sonic Zhang 
---
 MAINTAINERS | 42 --
 1 file changed, 20 insertions(+), 22 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7cacc88..bd49e70 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -288,36 +288,36 @@ F:sound/pci/ad1889.*
 
 AD525X ANALOG DEVICES DIGITAL POTENTIOMETERS DRIVER
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5254
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/misc/ad525x_dpot.c
 
 AD5398 CURRENT REGULATOR DRIVER (AD5398/AD5821)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5398
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/regulator/ad5398.c
 
 AD714X CAPACITANCE TOUCH SENSOR DRIVER (AD7142/3/7/8/7A)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7142
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/ad714x.c
 
 AD7877 TOUCHSCREEN DRIVER
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7877
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7877.c
 
 AD7879 TOUCHSCREEN DRIVER (AD7879/AD7889)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7879
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7879.c
 
@@ -353,8 +353,8 @@ F:  include/media/adp1653.h
 
 ADP5520 BACKLIGHT DRIVER WITH IO EXPANDER (ADP5520/ADP5501)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5520
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/mfd/adp5520.c
 F: drivers/video/backlight/adp5520_bl.c
@@ -364,16 +364,16 @@ F:drivers/input/keyboard/adp5520-keys.c
 
 ADP5588 QWERTY KEYPAD AND IO EXPANDER DRIVER (ADP5588/ADP5587)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5588
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/keyboard/adp5588-keys.c
 F: drivers/gpio/gpio-adp5588.c
 
 ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP8860
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/video/backlight/adp8860_bl.c
 
@@ -399,8 +399,8 @@ F:  drivers/hwmon/adt7475.c
 
 ADXL34X THREE-AXIS DIGITAL ACCELEROMETER DRIVER (ADXL345/ADXL346)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADXL345
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/adxl34x.c
 
@@ -588,9 +588,9 @@ F:  drivers/media/i2c/adv7604*
 
 ANALOG DEVICES INC ASOC CODEC DRIVERS
 M: Lars-Peter Clausen 
-L: device-drivers-de...@blackfin.uclinux.org
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://wiki.analog.com/
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: sound/soc/codecs/adau*
 F: sound/soc/codecs/adav*
@@ -599,7 +599,7 @@ F:  sound/soc/codecs/ssm*
 F: sound/soc/codecs/sigmadsp.*
 
 ANALOG DEVICES INC ASOC DRIVERS
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://blackfin.uclinux.org/
 S: Supported
@@ -1666,56 +1666,54 @@ F:  fs/bfs/
 F: include/uapi/linux/bfs_fs.h
 
 BLACKFIN ARCHITECTURE
-M: Mike Frysinger 
-L: uclinux-dist-de...@blackfin.uclinux.org
+M: Steven Miao 
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: arch/blackfin/
 
 BLACKFIN EMAC DRIVER
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/net/ethernet/adi/
 
 BLACKFIN RTC DRIVER
-M: Mike Frysinger 
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/rtc/rtc-bfin.c
 
 BLACKFIN SDH DRIVER
 M: Sonic Zhang 
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/mmc/host/bfin_sdh.c
 
 BLACKFIN SERIAL DRIVER
 M: Sonic

[PATCH] MAINTAINERS: ADI Linux development mailing lists change to the new server.

2014-01-25 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Update Blackfin arch branch maintainer's email as well.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 MAINTAINERS | 42 --
 1 file changed, 20 insertions(+), 22 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7cacc88..bd49e70 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -288,36 +288,36 @@ F:sound/pci/ad1889.*
 
 AD525X ANALOG DEVICES DIGITAL POTENTIOMETERS DRIVER
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5254
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/misc/ad525x_dpot.c
 
 AD5398 CURRENT REGULATOR DRIVER (AD5398/AD5821)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5398
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/regulator/ad5398.c
 
 AD714X CAPACITANCE TOUCH SENSOR DRIVER (AD7142/3/7/8/7A)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7142
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/ad714x.c
 
 AD7877 TOUCHSCREEN DRIVER
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7877
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7877.c
 
 AD7879 TOUCHSCREEN DRIVER (AD7879/AD7889)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7879
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7879.c
 
@@ -353,8 +353,8 @@ F:  include/media/adp1653.h
 
 ADP5520 BACKLIGHT DRIVER WITH IO EXPANDER (ADP5520/ADP5501)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5520
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/mfd/adp5520.c
 F: drivers/video/backlight/adp5520_bl.c
@@ -364,16 +364,16 @@ F:drivers/input/keyboard/adp5520-keys.c
 
 ADP5588 QWERTY KEYPAD AND IO EXPANDER DRIVER (ADP5588/ADP5587)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5588
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/keyboard/adp5588-keys.c
 F: drivers/gpio/gpio-adp5588.c
 
 ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP8860
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/video/backlight/adp8860_bl.c
 
@@ -399,8 +399,8 @@ F:  drivers/hwmon/adt7475.c
 
 ADXL34X THREE-AXIS DIGITAL ACCELEROMETER DRIVER (ADXL345/ADXL346)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADXL345
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/adxl34x.c
 
@@ -588,9 +588,9 @@ F:  drivers/media/i2c/adv7604*
 
 ANALOG DEVICES INC ASOC CODEC DRIVERS
 M: Lars-Peter Clausen l...@metafoo.de
-L: device-drivers-de...@blackfin.uclinux.org
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://wiki.analog.com/
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: sound/soc/codecs/adau*
 F: sound/soc/codecs/adav*
@@ -599,7 +599,7 @@ F:  sound/soc/codecs/ssm*
 F: sound/soc/codecs/sigmadsp.*
 
 ANALOG DEVICES INC ASOC DRIVERS
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://blackfin.uclinux.org/
 S: Supported
@@ -1666,56 +1666,54 @@ F:  fs/bfs/
 F: include/uapi/linux/bfs_fs.h
 
 BLACKFIN ARCHITECTURE
-M: Mike Frysinger vap...@gentoo.org
-L: uclinux-dist-de...@blackfin.uclinux.org
+M: Steven Miao real...@gmail.com
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: arch/blackfin/
 
 BLACKFIN EMAC DRIVER
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/net/ethernet/adi/
 
 BLACKFIN RTC DRIVER
-M: Mike Frysinger vapier@gmail.com
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de

Re: [PATCH] pinctrl: pinctrl-adi2: GPIO output value should be set after the GPIO interrupt is disabled.

2013-10-08 Thread Sonic Zhang
Hi Axel,

On Tue, Oct 8, 2013 at 3:48 PM, Axel Lin  wrote:
> 2013/10/8 Sonic Zhang :
>> From: Sonic Zhang 
>>
>> Use BIT macro as well.
>>
>> Signed-off-by: Sonic Zhang 
>> ---
>>  drivers/pinctrl/pinctrl-adi2.c | 14 --
>>  1 file changed, 8 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
>> index a74e6f4..7a39562 100644
>> --- a/drivers/pinctrl/pinctrl-adi2.c
>> +++ b/drivers/pinctrl/pinctrl-adi2.c
>> @@ -766,9 +766,9 @@ static void adi_gpio_set_value(struct gpio_chip *chip, 
>> unsigned offset,
>> spin_lock_irqsave(>lock, flags);
>>
>> if (value)
>> -   writew(1 << offset, >data_set);
>> +   writew(BIT(offset), >data_set);
>> else
>> -   writew(1 << offset, >data_clear);
>> +   writew(BIT(offset), >data_clear);
>>
>> spin_unlock_irqrestore(>lock, flags);
>>  }
>> @@ -780,12 +780,14 @@ static int adi_gpio_direction_output(struct gpio_chip 
>> *chip, unsigned offset,
>> struct gpio_port_t *regs = port->regs;
>> unsigned long flags;
>>
>> -   adi_gpio_set_value(chip, offset, value);
>> -
>> spin_lock_irqsave(>lock, flags);
>>
>> -   writew(readw(>inen) & ~(1 << offset), >inen);
>> -   writew(1 << offset, >dir_set);
>> +   writew(readw(>inen) & ~BIT(offset), >inen);
>> +   if (value)
>> +   writew(BIT(offset), >data_set);
>> +   else
>> +   writew(BIT(offset), >data_clear);
>
> I think we can add an unlocked version of adi_gpio_set_value() to
> avoid duplicated code.

That may be over engineering for such a simple code.

Regards,

Sonic
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCH] pinctrl: pinctrl-adi2: GPIO output value should be set after the GPIO interrupt is disabled.

2013-10-08 Thread Sonic Zhang
From: Sonic Zhang 

Use BIT macro as well.

Signed-off-by: Sonic Zhang 
---
 drivers/pinctrl/pinctrl-adi2.c | 14 --
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index a74e6f4..7a39562 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -766,9 +766,9 @@ static void adi_gpio_set_value(struct gpio_chip *chip, 
unsigned offset,
spin_lock_irqsave(>lock, flags);
 
if (value)
-   writew(1 << offset, >data_set);
+   writew(BIT(offset), >data_set);
else
-   writew(1 << offset, >data_clear);
+   writew(BIT(offset), >data_clear);
 
spin_unlock_irqrestore(>lock, flags);
 }
@@ -780,12 +780,14 @@ static int adi_gpio_direction_output(struct gpio_chip 
*chip, unsigned offset,
struct gpio_port_t *regs = port->regs;
unsigned long flags;
 
-   adi_gpio_set_value(chip, offset, value);
-
spin_lock_irqsave(>lock, flags);
 
-   writew(readw(>inen) & ~(1 << offset), >inen);
-   writew(1 << offset, >dir_set);
+   writew(readw(>inen) & ~BIT(offset), >inen);
+   if (value)
+   writew(BIT(offset), >data_set);
+   else
+   writew(BIT(offset), >data_clear);
+   writew(BIT(offset), >dir_set);
 
spin_unlock_irqrestore(>lock, flags);
 
-- 
1.8.2.3


--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCH v2] pinctrl: pinctrl-adi2: Remove nested lock+irqsave that resue flags.

2013-10-08 Thread Sonic Zhang
From: Sonic Zhang 

Also avoid use NULL pointer in error message.

v2-changes:
- use port pinter only after checking

Signed-off-by: Sonic Zhang 
---
 drivers/pinctrl/pinctrl-adi2.c | 40 ++--
 1 file changed, 22 insertions(+), 18 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index 7a24e59..157d4af 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -247,7 +247,7 @@ static void adi_gpio_ack_irq(struct irq_data *d)
unsigned pintbit = hwirq_to_pintbit(port, d->hwirq);
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
if (readl(>invert_set) & pintbit)
@@ -258,7 +258,7 @@ static void adi_gpio_ack_irq(struct irq_data *d)
 
writel(pintbit, >request);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -270,7 +270,7 @@ static void adi_gpio_mask_ack_irq(struct irq_data *d)
unsigned pintbit = hwirq_to_pintbit(port, d->hwirq);
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
if (readl(>invert_set) & pintbit)
@@ -282,7 +282,7 @@ static void adi_gpio_mask_ack_irq(struct irq_data *d)
writel(pintbit, >request);
writel(pintbit, >mask_clear);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -293,11 +293,11 @@ static void adi_gpio_mask_irq(struct irq_data *d)
struct gpio_pint_regs *regs = port->pint->regs;
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
writel(hwirq_to_pintbit(port, d->hwirq), >mask_clear);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -308,11 +308,11 @@ static void adi_gpio_unmask_irq(struct irq_data *d)
struct gpio_pint_regs *regs = port->pint->regs;
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
writel(hwirq_to_pintbit(port, d->hwirq), >mask_set);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -320,15 +320,17 @@ static unsigned int adi_gpio_irq_startup(struct irq_data 
*d)
 {
unsigned long flags;
struct gpio_port *port = irq_data_get_irq_chip_data(d);
-   struct gpio_pint_regs *regs = port->pint->regs;
+   struct gpio_pint_regs *regs;
 
if (!port) {
-   dev_err(port->dev, "GPIO IRQ %d :Not exist\n", d->irq);
+   pr_err("GPIO IRQ %d :Not exist\n", d->irq);
return -ENODEV;
}
 
+   regs = port->pint->regs;
+
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
port_setup(port, d->hwirq, true);
writew(BIT(d->hwirq), >regs->dir_clear);
@@ -336,7 +338,7 @@ static unsigned int adi_gpio_irq_startup(struct irq_data *d)
 
writel(hwirq_to_pintbit(port, d->hwirq), >mask_set);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 
return 0;
@@ -349,11 +351,11 @@ static void adi_gpio_irq_shutdown(struct irq_data *d)
struct gpio_pint_regs *regs = port->pint->regs;
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
writel(hwirq_to_pintbit(port, d->hwirq), >mask_clear);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -361,21 +363,23 @@ static int adi_gpio_irq_type(struct irq_data *d, unsigned 
int type)
 {
unsigned long flags;
struct gpio_port *port = irq_data_get_irq_chip_data(d);
-   struct gpio_pint_regs *pint_regs = port->pint->regs;
+   struct gpio_pint_regs *pint_regs;
unsigned pintmask;
unsigned int irq = d->irq;
int ret = 0;
char buf[16];
 
if (!port) {
-   dev_err(port->dev, "GPIO IRQ %d :Not exist\n", irq);
+   pr_err("GPIO IRQ %d :Not exist\n", d->ir

[PATCH v2] pinctrl: pinctrl-adi2: Remove nested lock+irqsave that resue flags.

2013-10-08 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Also avoid use NULL pointer in error message.

v2-changes:
- use port pinter only after checking

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 drivers/pinctrl/pinctrl-adi2.c | 40 ++--
 1 file changed, 22 insertions(+), 18 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index 7a24e59..157d4af 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -247,7 +247,7 @@ static void adi_gpio_ack_irq(struct irq_data *d)
unsigned pintbit = hwirq_to_pintbit(port, d-hwirq);
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
if (readl(regs-invert_set)  pintbit)
@@ -258,7 +258,7 @@ static void adi_gpio_ack_irq(struct irq_data *d)
 
writel(pintbit, regs-request);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 }
 
@@ -270,7 +270,7 @@ static void adi_gpio_mask_ack_irq(struct irq_data *d)
unsigned pintbit = hwirq_to_pintbit(port, d-hwirq);
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
if (readl(regs-invert_set)  pintbit)
@@ -282,7 +282,7 @@ static void adi_gpio_mask_ack_irq(struct irq_data *d)
writel(pintbit, regs-request);
writel(pintbit, regs-mask_clear);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 }
 
@@ -293,11 +293,11 @@ static void adi_gpio_mask_irq(struct irq_data *d)
struct gpio_pint_regs *regs = port-pint-regs;
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
writel(hwirq_to_pintbit(port, d-hwirq), regs-mask_clear);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 }
 
@@ -308,11 +308,11 @@ static void adi_gpio_unmask_irq(struct irq_data *d)
struct gpio_pint_regs *regs = port-pint-regs;
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
writel(hwirq_to_pintbit(port, d-hwirq), regs-mask_set);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 }
 
@@ -320,15 +320,17 @@ static unsigned int adi_gpio_irq_startup(struct irq_data 
*d)
 {
unsigned long flags;
struct gpio_port *port = irq_data_get_irq_chip_data(d);
-   struct gpio_pint_regs *regs = port-pint-regs;
+   struct gpio_pint_regs *regs;
 
if (!port) {
-   dev_err(port-dev, GPIO IRQ %d :Not exist\n, d-irq);
+   pr_err(GPIO IRQ %d :Not exist\n, d-irq);
return -ENODEV;
}
 
+   regs = port-pint-regs;
+
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
port_setup(port, d-hwirq, true);
writew(BIT(d-hwirq), port-regs-dir_clear);
@@ -336,7 +338,7 @@ static unsigned int adi_gpio_irq_startup(struct irq_data *d)
 
writel(hwirq_to_pintbit(port, d-hwirq), regs-mask_set);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 
return 0;
@@ -349,11 +351,11 @@ static void adi_gpio_irq_shutdown(struct irq_data *d)
struct gpio_pint_regs *regs = port-pint-regs;
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
writel(hwirq_to_pintbit(port, d-hwirq), regs-mask_clear);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 }
 
@@ -361,21 +363,23 @@ static int adi_gpio_irq_type(struct irq_data *d, unsigned 
int type)
 {
unsigned long flags;
struct gpio_port *port = irq_data_get_irq_chip_data(d);
-   struct gpio_pint_regs *pint_regs = port-pint-regs;
+   struct gpio_pint_regs *pint_regs;
unsigned pintmask;
unsigned int irq = d-irq;
int ret = 0;
char buf[16];
 
if (!port) {
-   dev_err(port-dev, GPIO IRQ %d :Not exist\n, irq);
+   pr_err(GPIO IRQ %d :Not exist\n, d-irq);
return -ENODEV;
}
 
+   pint_regs = port-pint-regs;
+
pintmask = hwirq_to_pintbit(port, d-hwirq);
 
spin_lock_irqsave(port-lock

[PATCH] pinctrl: pinctrl-adi2: GPIO output value should be set after the GPIO interrupt is disabled.

2013-10-08 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Use BIT macro as well.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 drivers/pinctrl/pinctrl-adi2.c | 14 --
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index a74e6f4..7a39562 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -766,9 +766,9 @@ static void adi_gpio_set_value(struct gpio_chip *chip, 
unsigned offset,
spin_lock_irqsave(port-lock, flags);
 
if (value)
-   writew(1  offset, regs-data_set);
+   writew(BIT(offset), regs-data_set);
else
-   writew(1  offset, regs-data_clear);
+   writew(BIT(offset), regs-data_clear);
 
spin_unlock_irqrestore(port-lock, flags);
 }
@@ -780,12 +780,14 @@ static int adi_gpio_direction_output(struct gpio_chip 
*chip, unsigned offset,
struct gpio_port_t *regs = port-regs;
unsigned long flags;
 
-   adi_gpio_set_value(chip, offset, value);
-
spin_lock_irqsave(port-lock, flags);
 
-   writew(readw(regs-inen)  ~(1  offset), regs-inen);
-   writew(1  offset, regs-dir_set);
+   writew(readw(regs-inen)  ~BIT(offset), regs-inen);
+   if (value)
+   writew(BIT(offset), regs-data_set);
+   else
+   writew(BIT(offset), regs-data_clear);
+   writew(BIT(offset), regs-dir_set);
 
spin_unlock_irqrestore(port-lock, flags);
 
-- 
1.8.2.3


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Re: [PATCH] pinctrl: pinctrl-adi2: GPIO output value should be set after the GPIO interrupt is disabled.

2013-10-08 Thread Sonic Zhang
Hi Axel,

On Tue, Oct 8, 2013 at 3:48 PM, Axel Lin axel@ingics.com wrote:
 2013/10/8 Sonic Zhang sonic@gmail.com:
 From: Sonic Zhang sonic.zh...@analog.com

 Use BIT macro as well.

 Signed-off-by: Sonic Zhang sonic.zh...@analog.com
 ---
  drivers/pinctrl/pinctrl-adi2.c | 14 --
  1 file changed, 8 insertions(+), 6 deletions(-)

 diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
 index a74e6f4..7a39562 100644
 --- a/drivers/pinctrl/pinctrl-adi2.c
 +++ b/drivers/pinctrl/pinctrl-adi2.c
 @@ -766,9 +766,9 @@ static void adi_gpio_set_value(struct gpio_chip *chip, 
 unsigned offset,
 spin_lock_irqsave(port-lock, flags);

 if (value)
 -   writew(1  offset, regs-data_set);
 +   writew(BIT(offset), regs-data_set);
 else
 -   writew(1  offset, regs-data_clear);
 +   writew(BIT(offset), regs-data_clear);

 spin_unlock_irqrestore(port-lock, flags);
  }
 @@ -780,12 +780,14 @@ static int adi_gpio_direction_output(struct gpio_chip 
 *chip, unsigned offset,
 struct gpio_port_t *regs = port-regs;
 unsigned long flags;

 -   adi_gpio_set_value(chip, offset, value);
 -
 spin_lock_irqsave(port-lock, flags);

 -   writew(readw(regs-inen)  ~(1  offset), regs-inen);
 -   writew(1  offset, regs-dir_set);
 +   writew(readw(regs-inen)  ~BIT(offset), regs-inen);
 +   if (value)
 +   writew(BIT(offset), regs-data_set);
 +   else
 +   writew(BIT(offset), regs-data_clear);

 I think we can add an unlocked version of adi_gpio_set_value() to
 avoid duplicated code.

That may be over engineering for such a simple code.

Regards,

Sonic
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Re: [PATCH 03/27] mmc: bfin_sdh: Move away from using deprecated APIs

2013-10-07 Thread Sonic Zhang
Acked-by: Sonic Zhang 

On Thu, Sep 26, 2013 at 10:54 PM, Ulf Hansson  wrote:
> Suspend and resume of cards are being handled from the protocol layer
> and consequently the mmc_suspend|resume_host APIs are deprecated.
>
> This means we can simplify the suspend|resume callbacks by removing the
> use of the deprecated APIs.
>
> Cc: Sonic Zhang 
> Cc: uclinux-dist-de...@blackfin.uclinux.org
> Signed-off-by: Ulf Hansson 
> ---
>  drivers/mmc/host/bfin_sdh.c |   12 +---
>  1 file changed, 1 insertion(+), 11 deletions(-)
>
> diff --git a/drivers/mmc/host/bfin_sdh.c b/drivers/mmc/host/bfin_sdh.c
> index 94fae2f..bc9110f 100644
> --- a/drivers/mmc/host/bfin_sdh.c
> +++ b/drivers/mmc/host/bfin_sdh.c
> @@ -640,21 +640,15 @@ static int sdh_remove(struct platform_device *pdev)
>  #ifdef CONFIG_PM
>  static int sdh_suspend(struct platform_device *dev, pm_message_t state)
>  {
> -   struct mmc_host *mmc = platform_get_drvdata(dev);
> struct bfin_sd_host *drv_data = get_sdh_data(dev);
> -   int ret = 0;
> -
> -   if (mmc)
> -   ret = mmc_suspend_host(mmc);
>
> peripheral_free_list(drv_data->pin_req);
>
> -   return ret;
> +   return 0;
>  }
>
>  static int sdh_resume(struct platform_device *dev)
>  {
> -   struct mmc_host *mmc = platform_get_drvdata(dev);
> struct bfin_sd_host *drv_data = get_sdh_data(dev);
> int ret = 0;
>
> @@ -665,10 +659,6 @@ static int sdh_resume(struct platform_device *dev)
> }
>
> sdh_reset();
> -
> -   if (mmc)
> -   ret = mmc_resume_host(mmc);
> -
> return ret;
>  }
>  #else
> --
> 1.7.9.5
>
> --
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Re: [PATCH] serial: bfin_uart: remove deprecated IRQF_DISABLED

2013-10-07 Thread Sonic Zhang
Acked-by: Sonic Zhang 

On Sun, Oct 6, 2013 at 2:27 PM, Michael Opdenacker
 wrote:
> This patch proposes to remove the use of the IRQF_DISABLED flag
>
> It's a NOOP since 2.6.35 and it will be removed one day.
>
> Signed-off-by: Michael Opdenacker 
> ---
>  drivers/tty/serial/bfin_uart.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/tty/serial/bfin_uart.c b/drivers/tty/serial/bfin_uart.c
> index 3c75e8e..5e85f35 100644
> --- a/drivers/tty/serial/bfin_uart.c
> +++ b/drivers/tty/serial/bfin_uart.c
> @@ -726,7 +726,7 @@ static int bfin_serial_startup(struct uart_port *port)
>  #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
> if (uart->cts_pin >= 0) {
> if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
> -   IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
> +   0, "BFIN_UART_MODEM_STATUS", uart)) {
> uart->cts_pin = -1;
> dev_info(port->dev, "Unable to attach BlackFin UART 
> Modem Status interrupt.\n");
> }
> --
> 1.8.1.2
>
> --
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Re: [PATCH 2/2] pinctrl: adi2: Fix dead lock in adi_gpio_direction_output

2013-10-07 Thread Sonic Zhang
Hi Linus,

On Fri, Sep 27, 2013 at 8:20 PM, Linus Walleij  wrote:
> On Tue, Sep 24, 2013 at 9:47 AM, Axel Lin  wrote:
>
>> Current code hold port->lock spinlock and then try to grab the lock again
>> in adi_gpio_set_value(). Fix it.
>>
>> Signed-off-by: Axel Lin 
>
> Patch applied, thanks Axel.
>
> Sonic, when you see patches like this please look at and ACK
> them.

Sorry, I am on vacation since Sep. 24.
I will do it in future.

Regards,

Sonic
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Re: [PATCH 2/2] pinctrl: adi2: Fix dead lock in adi_gpio_direction_output

2013-10-07 Thread Sonic Zhang
Hi Linus,

On Fri, Sep 27, 2013 at 8:20 PM, Linus Walleij linus.wall...@linaro.org wrote:
 On Tue, Sep 24, 2013 at 9:47 AM, Axel Lin axel@ingics.com wrote:

 Current code hold port-lock spinlock and then try to grab the lock again
 in adi_gpio_set_value(). Fix it.

 Signed-off-by: Axel Lin axel@ingics.com

 Patch applied, thanks Axel.

 Sonic, when you see patches like this please look at and ACK
 them.

Sorry, I am on vacation since Sep. 24.
I will do it in future.

Regards,

Sonic
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Re: [PATCH] serial: bfin_uart: remove deprecated IRQF_DISABLED

2013-10-07 Thread Sonic Zhang
Acked-by: Sonic Zhang sonc.zh...@analog.com

On Sun, Oct 6, 2013 at 2:27 PM, Michael Opdenacker
michael.opdenac...@free-electrons.com wrote:
 This patch proposes to remove the use of the IRQF_DISABLED flag

 It's a NOOP since 2.6.35 and it will be removed one day.

 Signed-off-by: Michael Opdenacker michael.opdenac...@free-electrons.com
 ---
  drivers/tty/serial/bfin_uart.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/drivers/tty/serial/bfin_uart.c b/drivers/tty/serial/bfin_uart.c
 index 3c75e8e..5e85f35 100644
 --- a/drivers/tty/serial/bfin_uart.c
 +++ b/drivers/tty/serial/bfin_uart.c
 @@ -726,7 +726,7 @@ static int bfin_serial_startup(struct uart_port *port)
  #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 if (uart-cts_pin = 0) {
 if (request_irq(uart-status_irq, bfin_serial_mctrl_cts_int,
 -   IRQF_DISABLED, BFIN_UART_MODEM_STATUS, uart)) {
 +   0, BFIN_UART_MODEM_STATUS, uart)) {
 uart-cts_pin = -1;
 dev_info(port-dev, Unable to attach BlackFin UART 
 Modem Status interrupt.\n);
 }
 --
 1.8.1.2

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Re: [PATCH 03/27] mmc: bfin_sdh: Move away from using deprecated APIs

2013-10-07 Thread Sonic Zhang
Acked-by: Sonic Zhang sonic.zh...@analog.com

On Thu, Sep 26, 2013 at 10:54 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
 Suspend and resume of cards are being handled from the protocol layer
 and consequently the mmc_suspend|resume_host APIs are deprecated.

 This means we can simplify the suspend|resume callbacks by removing the
 use of the deprecated APIs.

 Cc: Sonic Zhang sonic.zh...@analog.com
 Cc: uclinux-dist-de...@blackfin.uclinux.org
 Signed-off-by: Ulf Hansson ulf.hans...@linaro.org
 ---
  drivers/mmc/host/bfin_sdh.c |   12 +---
  1 file changed, 1 insertion(+), 11 deletions(-)

 diff --git a/drivers/mmc/host/bfin_sdh.c b/drivers/mmc/host/bfin_sdh.c
 index 94fae2f..bc9110f 100644
 --- a/drivers/mmc/host/bfin_sdh.c
 +++ b/drivers/mmc/host/bfin_sdh.c
 @@ -640,21 +640,15 @@ static int sdh_remove(struct platform_device *pdev)
  #ifdef CONFIG_PM
  static int sdh_suspend(struct platform_device *dev, pm_message_t state)
  {
 -   struct mmc_host *mmc = platform_get_drvdata(dev);
 struct bfin_sd_host *drv_data = get_sdh_data(dev);
 -   int ret = 0;
 -
 -   if (mmc)
 -   ret = mmc_suspend_host(mmc);

 peripheral_free_list(drv_data-pin_req);

 -   return ret;
 +   return 0;
  }

  static int sdh_resume(struct platform_device *dev)
  {
 -   struct mmc_host *mmc = platform_get_drvdata(dev);
 struct bfin_sd_host *drv_data = get_sdh_data(dev);
 int ret = 0;

 @@ -665,10 +659,6 @@ static int sdh_resume(struct platform_device *dev)
 }

 sdh_reset();
 -
 -   if (mmc)
 -   ret = mmc_resume_host(mmc);
 -
 return ret;
  }
  #else
 --
 1.7.9.5

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[PATCH] pinctrl: pinctrl-adi2: Remove nested lock+irqsave that resue flags.

2013-09-23 Thread Sonic Zhang
From: Sonic Zhang 

Also avoid use NULL pointer in error message.

Signed-off-by: Sonic Zhang 
---
 drivers/pinctrl/pinctrl-adi2.c | 32 
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index 7a24e59..6940612 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -247,7 +247,7 @@ static void adi_gpio_ack_irq(struct irq_data *d)
unsigned pintbit = hwirq_to_pintbit(port, d->hwirq);
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
if (readl(>invert_set) & pintbit)
@@ -258,7 +258,7 @@ static void adi_gpio_ack_irq(struct irq_data *d)
 
writel(pintbit, >request);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -270,7 +270,7 @@ static void adi_gpio_mask_ack_irq(struct irq_data *d)
unsigned pintbit = hwirq_to_pintbit(port, d->hwirq);
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
if (readl(>invert_set) & pintbit)
@@ -282,7 +282,7 @@ static void adi_gpio_mask_ack_irq(struct irq_data *d)
writel(pintbit, >request);
writel(pintbit, >mask_clear);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -293,11 +293,11 @@ static void adi_gpio_mask_irq(struct irq_data *d)
struct gpio_pint_regs *regs = port->pint->regs;
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
writel(hwirq_to_pintbit(port, d->hwirq), >mask_clear);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -308,11 +308,11 @@ static void adi_gpio_unmask_irq(struct irq_data *d)
struct gpio_pint_regs *regs = port->pint->regs;
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
writel(hwirq_to_pintbit(port, d->hwirq), >mask_set);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -323,12 +323,12 @@ static unsigned int adi_gpio_irq_startup(struct irq_data 
*d)
struct gpio_pint_regs *regs = port->pint->regs;
 
if (!port) {
-   dev_err(port->dev, "GPIO IRQ %d :Not exist\n", d->irq);
+   pr_err("GPIO IRQ %d :Not exist\n", d->irq);
return -ENODEV;
}
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
port_setup(port, d->hwirq, true);
writew(BIT(d->hwirq), >regs->dir_clear);
@@ -336,7 +336,7 @@ static unsigned int adi_gpio_irq_startup(struct irq_data *d)
 
writel(hwirq_to_pintbit(port, d->hwirq), >mask_set);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 
return 0;
@@ -349,11 +349,11 @@ static void adi_gpio_irq_shutdown(struct irq_data *d)
struct gpio_pint_regs *regs = port->pint->regs;
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
writel(hwirq_to_pintbit(port, d->hwirq), >mask_clear);
 
-   spin_unlock_irqrestore(>pint->lock, flags);
+   spin_unlock(>pint->lock);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -368,14 +368,14 @@ static int adi_gpio_irq_type(struct irq_data *d, unsigned 
int type)
char buf[16];
 
if (!port) {
-   dev_err(port->dev, "GPIO IRQ %d :Not exist\n", irq);
+   pr_err("GPIO IRQ %d :Not exist\n", d->irq);
return -ENODEV;
}
 
pintmask = hwirq_to_pintbit(port, d->hwirq);
 
spin_lock_irqsave(>lock, flags);
-   spin_lock_irqsave(>pint->lock, flags);
+   spin_lock(>pint->lock);
 
/* In case of interrupt autodetect, set irq type to edge sensitive. */
if (type == IRQ_TYPE_PROBE)
@@ -416,7 +416,7 @@ static int adi_gpio_irq_type(struct irq_data *d, unsigned 
int type)
}
 
 out:
-   spin_unlock_irqrestore(>pint->lock, 

Re: [PATCH 2/3 v4] blackfin: gpio: Remove none gpio lib code.

2013-09-23 Thread Sonic Zhang
Hi Linus,

On Mon, Sep 23, 2013 at 3:48 PM, Linus Walleij  wrote:
> On Tue, Sep 3, 2013 at 10:29 AM, Sonic Zhang  wrote:
>
>> From: Sonic Zhang 
>>
>> - Remove non gpio lib code from blackfin architecture.
>> - Limit the lagecy blackfin gpio driver to bf5xx processors only.
>> - Remove unused definition of the pint power functions.
>>
>> Signed-off-by: Sonic Zhang 
>> Acked-by: Linus Walleij 
>
> Hi Sonic, I tried to apply this but it doesn't apply cleanly on
> my pinctrl "devel" branch based off v3.12-rc1.
>
> Can you rebase patch 2+3 and resend?

The patch 2 is already in your "devel" branch of kernel v3.12-rc1.
Please apply patch 3 only.

Thanks

Sonic
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Re: [PATCH 2/3 v4] blackfin: gpio: Remove none gpio lib code.

2013-09-23 Thread Sonic Zhang
Hi Linus,

On Mon, Sep 23, 2013 at 3:48 PM, Linus Walleij linus.wall...@linaro.org wrote:
 On Tue, Sep 3, 2013 at 10:29 AM, Sonic Zhang sonic@gmail.com wrote:

 From: Sonic Zhang sonic.zh...@analog.com

 - Remove non gpio lib code from blackfin architecture.
 - Limit the lagecy blackfin gpio driver to bf5xx processors only.
 - Remove unused definition of the pint power functions.

 Signed-off-by: Sonic Zhang sonic.zh...@analog.com
 Acked-by: Linus Walleij linus.wall...@linaro.org

 Hi Sonic, I tried to apply this but it doesn't apply cleanly on
 my pinctrl devel branch based off v3.12-rc1.

 Can you rebase patch 2+3 and resend?

The patch 2 is already in your devel branch of kernel v3.12-rc1.
Please apply patch 3 only.

Thanks

Sonic
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[PATCH] pinctrl: pinctrl-adi2: Remove nested lock+irqsave that resue flags.

2013-09-23 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Also avoid use NULL pointer in error message.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 drivers/pinctrl/pinctrl-adi2.c | 32 
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index 7a24e59..6940612 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -247,7 +247,7 @@ static void adi_gpio_ack_irq(struct irq_data *d)
unsigned pintbit = hwirq_to_pintbit(port, d-hwirq);
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
if (readl(regs-invert_set)  pintbit)
@@ -258,7 +258,7 @@ static void adi_gpio_ack_irq(struct irq_data *d)
 
writel(pintbit, regs-request);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 }
 
@@ -270,7 +270,7 @@ static void adi_gpio_mask_ack_irq(struct irq_data *d)
unsigned pintbit = hwirq_to_pintbit(port, d-hwirq);
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
if (readl(regs-invert_set)  pintbit)
@@ -282,7 +282,7 @@ static void adi_gpio_mask_ack_irq(struct irq_data *d)
writel(pintbit, regs-request);
writel(pintbit, regs-mask_clear);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 }
 
@@ -293,11 +293,11 @@ static void adi_gpio_mask_irq(struct irq_data *d)
struct gpio_pint_regs *regs = port-pint-regs;
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
writel(hwirq_to_pintbit(port, d-hwirq), regs-mask_clear);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 }
 
@@ -308,11 +308,11 @@ static void adi_gpio_unmask_irq(struct irq_data *d)
struct gpio_pint_regs *regs = port-pint-regs;
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
writel(hwirq_to_pintbit(port, d-hwirq), regs-mask_set);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 }
 
@@ -323,12 +323,12 @@ static unsigned int adi_gpio_irq_startup(struct irq_data 
*d)
struct gpio_pint_regs *regs = port-pint-regs;
 
if (!port) {
-   dev_err(port-dev, GPIO IRQ %d :Not exist\n, d-irq);
+   pr_err(GPIO IRQ %d :Not exist\n, d-irq);
return -ENODEV;
}
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
port_setup(port, d-hwirq, true);
writew(BIT(d-hwirq), port-regs-dir_clear);
@@ -336,7 +336,7 @@ static unsigned int adi_gpio_irq_startup(struct irq_data *d)
 
writel(hwirq_to_pintbit(port, d-hwirq), regs-mask_set);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 
return 0;
@@ -349,11 +349,11 @@ static void adi_gpio_irq_shutdown(struct irq_data *d)
struct gpio_pint_regs *regs = port-pint-regs;
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
writel(hwirq_to_pintbit(port, d-hwirq), regs-mask_clear);
 
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 }
 
@@ -368,14 +368,14 @@ static int adi_gpio_irq_type(struct irq_data *d, unsigned 
int type)
char buf[16];
 
if (!port) {
-   dev_err(port-dev, GPIO IRQ %d :Not exist\n, irq);
+   pr_err(GPIO IRQ %d :Not exist\n, d-irq);
return -ENODEV;
}
 
pintmask = hwirq_to_pintbit(port, d-hwirq);
 
spin_lock_irqsave(port-lock, flags);
-   spin_lock_irqsave(port-pint-lock, flags);
+   spin_lock(port-pint-lock);
 
/* In case of interrupt autodetect, set irq type to edge sensitive. */
if (type == IRQ_TYPE_PROBE)
@@ -416,7 +416,7 @@ static int adi_gpio_irq_type(struct irq_data *d, unsigned 
int type)
}
 
 out:
-   spin_unlock_irqrestore(port-pint-lock, flags);
+   spin_unlock(port-pint-lock);
spin_unlock_irqrestore(port-lock, flags);
 
return ret;
-- 
1.8.2.3


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[PATCH] pinctrl: pinctrl-adi2-bf60x: remove useless and duplicated GPIO definition for PPI2.

2013-09-22 Thread Sonic Zhang
From: Sonic Zhang 

Signed-off-by: Sonic Zhang 
---
 drivers/pinctrl/pinctrl-adi2-bf60x.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-adi2-bf60x.c 
b/drivers/pinctrl/pinctrl-adi2-bf60x.c
index e90cb80..bf57aea 100644
--- a/drivers/pinctrl/pinctrl-adi2-bf60x.c
+++ b/drivers/pinctrl/pinctrl-adi2-bf60x.c
@@ -236,8 +236,7 @@ static const unsigned ppi2_8b_pins[] = {
 static const unsigned ppi2_16b_pins[] = {
GPIO_PA0, GPIO_PA1, GPIO_PA2, GPIO_PA3, GPIO_PA4, GPIO_PA5, GPIO_PA6,
GPIO_PA7, GPIO_PA8, GPIO_PA9, GPIO_PA10, GPIO_PA11, GPIO_PA12,
-   GPIO_PA13, GPIO_PA14, GPIO_PA15,
-   GPIO_PA7, GPIO_PB0, GPIO_PB1, GPIO_PB2, GPIO_PB3,
+   GPIO_PA13, GPIO_PA14, GPIO_PA15, GPIO_PB0, GPIO_PB1, GPIO_PB2,
 };
 
 static const unsigned lp0_pins[] = {
-- 
1.8.2.3


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[PATCH] pinctrl: pinctrl-adi2: Add dependency to arch BLACKFIN in Kconfig.

2013-09-22 Thread Sonic Zhang
From: Sonic Zhang 

Signed-off-by: Sonic Zhang 
---
 drivers/pinctrl/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 08b8337..9bb6efb 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -51,6 +51,7 @@ config PINCTRL_AB8505
 
 config PINCTRL_ADI2
bool "ADI pin controller driver"
+   depends on BLACKFIN
select PINMUX
select IRQ_DOMAIN
help
-- 
1.8.2.3


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[PATCH] pinctrl: pinctrl-adi2: Add dependency to arch BLACKFIN in Kconfig.

2013-09-22 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 drivers/pinctrl/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 08b8337..9bb6efb 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -51,6 +51,7 @@ config PINCTRL_AB8505
 
 config PINCTRL_ADI2
bool ADI pin controller driver
+   depends on BLACKFIN
select PINMUX
select IRQ_DOMAIN
help
-- 
1.8.2.3


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[PATCH] pinctrl: pinctrl-adi2-bf60x: remove useless and duplicated GPIO definition for PPI2.

2013-09-22 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 drivers/pinctrl/pinctrl-adi2-bf60x.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-adi2-bf60x.c 
b/drivers/pinctrl/pinctrl-adi2-bf60x.c
index e90cb80..bf57aea 100644
--- a/drivers/pinctrl/pinctrl-adi2-bf60x.c
+++ b/drivers/pinctrl/pinctrl-adi2-bf60x.c
@@ -236,8 +236,7 @@ static const unsigned ppi2_8b_pins[] = {
 static const unsigned ppi2_16b_pins[] = {
GPIO_PA0, GPIO_PA1, GPIO_PA2, GPIO_PA3, GPIO_PA4, GPIO_PA5, GPIO_PA6,
GPIO_PA7, GPIO_PA8, GPIO_PA9, GPIO_PA10, GPIO_PA11, GPIO_PA12,
-   GPIO_PA13, GPIO_PA14, GPIO_PA15,
-   GPIO_PA7, GPIO_PB0, GPIO_PB1, GPIO_PB2, GPIO_PB3,
+   GPIO_PA13, GPIO_PA14, GPIO_PA15, GPIO_PB0, GPIO_PB1, GPIO_PB2,
 };
 
 static const unsigned lp0_pins[] = {
-- 
1.8.2.3


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Re: [uclinux-dist-devel] [GIT PULL] Blackfin updates for 3.12

2013-09-15 Thread Sonic Zhang
Hi Linus,

On Fri, Sep 13, 2013 at 10:29 PM, Linus Torvalds
 wrote:
> On Thu, Sep 12, 2013 at 10:12 PM, Steven Miao  wrote:
>>  arch/blackfin/mach-bf609/Kconfig   | 1655 
>> 
>
> WTF? This is getting crazy. The blackfin board Kconfig files are being
> used as a DT replacement. This can't go on.
>

I am sorry to put many config options into the Blackfin Kconfig file.
In the case this is not preferred, we will make sure no more device
config options are put into the Kconfig files.

Thanks for your guide.


Sonic
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Re: [uclinux-dist-devel] [GIT PULL] Blackfin updates for 3.12

2013-09-15 Thread Sonic Zhang
Hi Linus,

On Fri, Sep 13, 2013 at 10:29 PM, Linus Torvalds
torva...@linux-foundation.org wrote:
 On Thu, Sep 12, 2013 at 10:12 PM, Steven Miao real...@kernel.org wrote:
  arch/blackfin/mach-bf609/Kconfig   | 1655 
 

 WTF? This is getting crazy. The blackfin board Kconfig files are being
 used as a DT replacement. This can't go on.


I am sorry to put many config options into the Blackfin Kconfig file.
In the case this is not preferred, we will make sure no more device
config options are put into the Kconfig files.

Thanks for your guide.


Sonic
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[PATCH 3/3 v4] blackfin: pinctrl-adi2: Enable PINCTRL framework for BF54x and BF60x.

2013-09-03 Thread Sonic Zhang
From: Sonic Zhang 

- Remove unused macro MAX_RESOURCES
- Override blackfin legacy peripheral pinmux request and free APIs by
devm_pinctrl_get_select_default() to init the peripheral portmux setting.

v3-chagnes:
- Move pinctrl soc data out of blackfin arch folder.

Signed-off-by: Sonic Zhang 
---
 arch/blackfin/Kconfig   |  4 
 arch/blackfin/include/asm/portmux.h | 19 +--
 arch/blackfin/mach-bf548/include/mach/portmux.h |  2 --
 arch/blackfin/mach-bf609/include/mach/portmux.h |  2 --
 4 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 9eff25b..ed7157f 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -324,6 +324,10 @@ config GPIO_ADI
def_bool y
depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
 
+config PINCTRL
+   def_bool y
+   depends on BF54x || BF60x
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/portmux.h 
b/arch/blackfin/include/asm/portmux.h
index 9b1e2c3..7aa2043 100644
--- a/arch/blackfin/include/asm/portmux.h
+++ b/arch/blackfin/include/asm/portmux.h
@@ -17,14 +17,29 @@
 #define P_MAYSHARE 0x2000
 #define P_DONTCARE 0x1000
 
-
+#ifdef CONFIG_PINCTRL
+#include 
+
+#define gpio_pint_regs bfin_pint_regs
+#define adi_internal_set_wake bfin_internal_set_wake
+
+#define peripheral_request(per, label) 0
+#define peripheral_free(per)
+#define peripheral_request_list(per, label) \
+   (pdev ? (IS_ERR(devm_pinctrl_get_select_default(>dev)) \
+   ? -EINVAL : 0) : 0)
+#define peripheral_free_list(per)
+#else
 int peripheral_request(unsigned short per, const char *label);
 void peripheral_free(unsigned short per);
 int peripheral_request_list(const unsigned short per[], const char *label);
 void peripheral_free_list(const unsigned short per[]);
+#endif
 
-#include 
+#include 
+#include 
 #include 
+#include 
 
 #ifndef P_SPORT2_TFS
 #define P_SPORT2_TFS P_UNDEF
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h 
b/arch/blackfin/mach-bf548/include/mach/portmux.h
index e222462..d9f8632 100644
--- a/arch/blackfin/mach-bf548/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf548/include/mach/portmux.h
@@ -7,8 +7,6 @@
 #ifndef _MACH_PORTMUX_H_
 #define _MACH_PORTMUX_H_
 
-#define MAX_RESOURCES  MAX_BLACKFIN_GPIOS
-
 #define P_SPORT2_TFS   (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
 #define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
 #define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
diff --git a/arch/blackfin/mach-bf609/include/mach/portmux.h 
b/arch/blackfin/mach-bf609/include/mach/portmux.h
index 2e1a51c..fe34191 100644
--- a/arch/blackfin/mach-bf609/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf609/include/mach/portmux.h
@@ -7,8 +7,6 @@
 #ifndef _MACH_PORTMUX_H_
 #define _MACH_PORTMUX_H_
 
-#define MAX_RESOURCES  MAX_BLACKFIN_GPIOS
-
 /* EMAC RMII Port Mux */
 #define P_MII0_MDC (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0))
 #define P_MII0_MDIO(P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0))
-- 
1.8.2.3


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[PATCH 2/3 v4] blackfin: gpio: Remove none gpio lib code.

2013-09-03 Thread Sonic Zhang
From: Sonic Zhang 

- Remove non gpio lib code from blackfin architecture.
- Limit the lagecy blackfin gpio driver to bf5xx processors only.
- Remove unused definition of the pint power functions.

Signed-off-by: Sonic Zhang 
Acked-by: Linus Walleij 
---
 arch/blackfin/Kconfig|   7 ++
 arch/blackfin/include/asm/gpio.h | 157 +--
 arch/blackfin/kernel/Makefile|   3 +-
 3 files changed, 29 insertions(+), 138 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index a117652..9eff25b 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -52,6 +52,9 @@ config GENERIC_BUG
 config ZONE_DMA
def_bool y
 
+config GENERIC_GPIO
+   def_bool y
+
 config FORCE_MAX_ZONEORDER
int
default "14"
@@ -317,6 +320,10 @@ config BF53x
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
default y
 
+config GPIO_ADI
+   def_bool y
+   depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 98d0133..99d338c 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -25,8 +25,12 @@
 
 #ifndef __ASSEMBLY__
 
+#ifndef CONFIG_PINCTRL
+
 #include 
-#include 
+#include 
+#include 
+#include 
 
 /***
 *
@@ -45,7 +49,6 @@
 * MODIFICATION HISTORY :
 **/
 
-#if !BFIN_GPIO_PINT
 void set_gpio_dir(unsigned, unsigned short);
 void set_gpio_inen(unsigned, unsigned short);
 void set_gpio_polar(unsigned, unsigned short);
@@ -115,7 +118,6 @@ struct gpio_port_t {
unsigned short dummy16;
unsigned short inen;
 };
-#endif
 
 #ifdef BFIN_SPECIAL_GPIO_BANKS
 void bfin_special_gpio_free(unsigned gpio);
@@ -127,25 +129,21 @@ void bfin_special_gpio_pm_hibernate_suspend(void);
 #endif
 
 #ifdef CONFIG_PM
-int bfin_pm_standby_ctrl(unsigned ctrl);
+void bfin_gpio_pm_hibernate_restore(void);
+void bfin_gpio_pm_hibernate_suspend(void);
+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
+int bfin_gpio_pm_standby_ctrl(unsigned ctrl);
 
 static inline int bfin_pm_standby_setup(void)
 {
-   return bfin_pm_standby_ctrl(1);
+   return bfin_gpio_pm_standby_ctrl(1);
 }
 
 static inline void bfin_pm_standby_restore(void)
 {
-   bfin_pm_standby_ctrl(0);
+   bfin_gpio_pm_standby_ctrl(0);
 }
 
-void bfin_gpio_pm_hibernate_restore(void);
-void bfin_gpio_pm_hibernate_suspend(void);
-void bfin_pint_suspend(void);
-void bfin_pint_resume(void);
-
-# if !BFIN_GPIO_PINT
-int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
 
 struct gpio_port_s {
unsigned short data;
@@ -161,7 +159,6 @@ struct gpio_port_s {
unsigned short reserved;
unsigned short mux;
 };
-# endif
 #endif /*CONFIG_PM*/
 
 /***
@@ -178,36 +175,29 @@ struct gpio_port_s {
 *
 * MODIFICATION HISTORY :
 **/
-
-int bfin_gpio_request(unsigned gpio, const char *label);
-void bfin_gpio_free(unsigned gpio);
 int bfin_gpio_irq_request(unsigned gpio, const char *label);
 void bfin_gpio_irq_free(unsigned gpio);
-int bfin_gpio_direction_input(unsigned gpio);
-int bfin_gpio_direction_output(unsigned gpio, int value);
-int bfin_gpio_get_value(unsigned gpio);
-void bfin_gpio_set_value(unsigned gpio, int value);
+void bfin_gpio_irq_prepare(unsigned gpio);
+
+static inline int irq_to_gpio(unsigned irq)
+{
+   return irq - GPIO_IRQ_BASE;
+}
+#endif /* CONFIG_PINCTRL */
 
 #include 
 #include 
 
-#ifdef CONFIG_GPIOLIB
 #include   /* cansleep wrappers */
 
 static inline int gpio_get_value(unsigned int gpio)
 {
-   if (gpio < MAX_BLACKFIN_GPIOS)
-   return bfin_gpio_get_value(gpio);
-   else
-   return __gpio_get_value(gpio);
+   return __gpio_get_value(gpio);
 }
 
 static inline void gpio_set_value(unsigned int gpio, int value)
 {
-   if (gpio < MAX_BLACKFIN_GPIOS)
-   bfin_gpio_set_value(gpio, value);
-   else
-   __gpio_set_value(gpio, value);
+   __gpio_set_value(gpio, value);
 }
 
 static inline int gpio_cansleep(unsigned int gpio)
@@ -219,113 +209,6 @@ static inline int gpio_to_irq(unsigned gpio)
 {
return __gpio_to_irq(gpio);
 }
-
-#else /* !CONFIG_GPIOLIB */
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-   return bfin_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-   return bfin_gpio_free(gpio);
-}
-
-static inline int gpio_direction_input(unsigned gpio)
-{
-   return bfin_gpio_direction_input(gpio);
-}
-
-static inline int gpio_direction_output(unsigned

[PATCH 2/3 v4] blackfin: gpio: Remove none gpio lib code.

2013-09-03 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

- Remove non gpio lib code from blackfin architecture.
- Limit the lagecy blackfin gpio driver to bf5xx processors only.
- Remove unused definition of the pint power functions.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
 arch/blackfin/Kconfig|   7 ++
 arch/blackfin/include/asm/gpio.h | 157 +--
 arch/blackfin/kernel/Makefile|   3 +-
 3 files changed, 29 insertions(+), 138 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index a117652..9eff25b 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -52,6 +52,9 @@ config GENERIC_BUG
 config ZONE_DMA
def_bool y
 
+config GENERIC_GPIO
+   def_bool y
+
 config FORCE_MAX_ZONEORDER
int
default 14
@@ -317,6 +320,10 @@ config BF53x
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
default y
 
+config GPIO_ADI
+   def_bool y
+   depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 98d0133..99d338c 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -25,8 +25,12 @@
 
 #ifndef __ASSEMBLY__
 
+#ifndef CONFIG_PINCTRL
+
 #include linux/compiler.h
-#include linux/gpio.h
+#include asm/blackfin.h
+#include asm/portmux.h
+#include asm/irq_handler.h
 
 /***
 *
@@ -45,7 +49,6 @@
 * MODIFICATION HISTORY :
 **/
 
-#if !BFIN_GPIO_PINT
 void set_gpio_dir(unsigned, unsigned short);
 void set_gpio_inen(unsigned, unsigned short);
 void set_gpio_polar(unsigned, unsigned short);
@@ -115,7 +118,6 @@ struct gpio_port_t {
unsigned short dummy16;
unsigned short inen;
 };
-#endif
 
 #ifdef BFIN_SPECIAL_GPIO_BANKS
 void bfin_special_gpio_free(unsigned gpio);
@@ -127,25 +129,21 @@ void bfin_special_gpio_pm_hibernate_suspend(void);
 #endif
 
 #ifdef CONFIG_PM
-int bfin_pm_standby_ctrl(unsigned ctrl);
+void bfin_gpio_pm_hibernate_restore(void);
+void bfin_gpio_pm_hibernate_suspend(void);
+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
+int bfin_gpio_pm_standby_ctrl(unsigned ctrl);
 
 static inline int bfin_pm_standby_setup(void)
 {
-   return bfin_pm_standby_ctrl(1);
+   return bfin_gpio_pm_standby_ctrl(1);
 }
 
 static inline void bfin_pm_standby_restore(void)
 {
-   bfin_pm_standby_ctrl(0);
+   bfin_gpio_pm_standby_ctrl(0);
 }
 
-void bfin_gpio_pm_hibernate_restore(void);
-void bfin_gpio_pm_hibernate_suspend(void);
-void bfin_pint_suspend(void);
-void bfin_pint_resume(void);
-
-# if !BFIN_GPIO_PINT
-int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
 
 struct gpio_port_s {
unsigned short data;
@@ -161,7 +159,6 @@ struct gpio_port_s {
unsigned short reserved;
unsigned short mux;
 };
-# endif
 #endif /*CONFIG_PM*/
 
 /***
@@ -178,36 +175,29 @@ struct gpio_port_s {
 *
 * MODIFICATION HISTORY :
 **/
-
-int bfin_gpio_request(unsigned gpio, const char *label);
-void bfin_gpio_free(unsigned gpio);
 int bfin_gpio_irq_request(unsigned gpio, const char *label);
 void bfin_gpio_irq_free(unsigned gpio);
-int bfin_gpio_direction_input(unsigned gpio);
-int bfin_gpio_direction_output(unsigned gpio, int value);
-int bfin_gpio_get_value(unsigned gpio);
-void bfin_gpio_set_value(unsigned gpio, int value);
+void bfin_gpio_irq_prepare(unsigned gpio);
+
+static inline int irq_to_gpio(unsigned irq)
+{
+   return irq - GPIO_IRQ_BASE;
+}
+#endif /* CONFIG_PINCTRL */
 
 #include asm/irq.h
 #include asm/errno.h
 
-#ifdef CONFIG_GPIOLIB
 #include asm-generic/gpio.h  /* cansleep wrappers */
 
 static inline int gpio_get_value(unsigned int gpio)
 {
-   if (gpio  MAX_BLACKFIN_GPIOS)
-   return bfin_gpio_get_value(gpio);
-   else
-   return __gpio_get_value(gpio);
+   return __gpio_get_value(gpio);
 }
 
 static inline void gpio_set_value(unsigned int gpio, int value)
 {
-   if (gpio  MAX_BLACKFIN_GPIOS)
-   bfin_gpio_set_value(gpio, value);
-   else
-   __gpio_set_value(gpio, value);
+   __gpio_set_value(gpio, value);
 }
 
 static inline int gpio_cansleep(unsigned int gpio)
@@ -219,113 +209,6 @@ static inline int gpio_to_irq(unsigned gpio)
 {
return __gpio_to_irq(gpio);
 }
-
-#else /* !CONFIG_GPIOLIB */
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-   return bfin_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-   return bfin_gpio_free(gpio

[PATCH 3/3 v4] blackfin: pinctrl-adi2: Enable PINCTRL framework for BF54x and BF60x.

2013-09-03 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

- Remove unused macro MAX_RESOURCES
- Override blackfin legacy peripheral pinmux request and free APIs by
devm_pinctrl_get_select_default() to init the peripheral portmux setting.

v3-chagnes:
- Move pinctrl soc data out of blackfin arch folder.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 arch/blackfin/Kconfig   |  4 
 arch/blackfin/include/asm/portmux.h | 19 +--
 arch/blackfin/mach-bf548/include/mach/portmux.h |  2 --
 arch/blackfin/mach-bf609/include/mach/portmux.h |  2 --
 4 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 9eff25b..ed7157f 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -324,6 +324,10 @@ config GPIO_ADI
def_bool y
depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
 
+config PINCTRL
+   def_bool y
+   depends on BF54x || BF60x
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/portmux.h 
b/arch/blackfin/include/asm/portmux.h
index 9b1e2c3..7aa2043 100644
--- a/arch/blackfin/include/asm/portmux.h
+++ b/arch/blackfin/include/asm/portmux.h
@@ -17,14 +17,29 @@
 #define P_MAYSHARE 0x2000
 #define P_DONTCARE 0x1000
 
-
+#ifdef CONFIG_PINCTRL
+#include asm/irq_handler.h
+
+#define gpio_pint_regs bfin_pint_regs
+#define adi_internal_set_wake bfin_internal_set_wake
+
+#define peripheral_request(per, label) 0
+#define peripheral_free(per)
+#define peripheral_request_list(per, label) \
+   (pdev ? (IS_ERR(devm_pinctrl_get_select_default(pdev-dev)) \
+   ? -EINVAL : 0) : 0)
+#define peripheral_free_list(per)
+#else
 int peripheral_request(unsigned short per, const char *label);
 void peripheral_free(unsigned short per);
 int peripheral_request_list(const unsigned short per[], const char *label);
 void peripheral_free_list(const unsigned short per[]);
+#endif
 
-#include asm/gpio.h
+#include linux/err.h
+#include linux/pinctrl/pinctrl.h
 #include mach/portmux.h
+#include linux/gpio.h
 
 #ifndef P_SPORT2_TFS
 #define P_SPORT2_TFS P_UNDEF
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h 
b/arch/blackfin/mach-bf548/include/mach/portmux.h
index e222462..d9f8632 100644
--- a/arch/blackfin/mach-bf548/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf548/include/mach/portmux.h
@@ -7,8 +7,6 @@
 #ifndef _MACH_PORTMUX_H_
 #define _MACH_PORTMUX_H_
 
-#define MAX_RESOURCES  MAX_BLACKFIN_GPIOS
-
 #define P_SPORT2_TFS   (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
 #define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
 #define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
diff --git a/arch/blackfin/mach-bf609/include/mach/portmux.h 
b/arch/blackfin/mach-bf609/include/mach/portmux.h
index 2e1a51c..fe34191 100644
--- a/arch/blackfin/mach-bf609/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf609/include/mach/portmux.h
@@ -7,8 +7,6 @@
 #ifndef _MACH_PORTMUX_H_
 #define _MACH_PORTMUX_H_
 
-#define MAX_RESOURCES  MAX_BLACKFIN_GPIOS
-
 /* EMAC RMII Port Mux */
 #define P_MII0_MDC (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0))
 #define P_MII0_MDIO(P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0))
-- 
1.8.2.3


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Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-29 Thread Sonic Zhang
Hi Linus,

On Thu, Aug 29, 2013 at 4:19 PM, Linus Walleij  wrote:
> On Thu, Aug 22, 2013 at 10:48 PM, Stephen Warren  
> wrote:
>> On 08/22/2013 01:07 AM, Sonic Zhang wrote:
>>>
>>> There are 6 to 9 GPIO HW blocks in one Blackfin SoC. Function
>>> pinmux_enable_setting() in current pinctrl framework assumes the
>>> function mux setting of one peripheral pin group is configured in one
>>> pinctrl device. But, the function mux setting of one blackfin
>>> peripheral may be done among different GPIO HW blocks. So, I have to
>>> separate the pinctrl driver from the GPIO block driver add the ranges
>>> of all GPIO blocks into one pinctrl device for Blackfin.
>>
>> I don't think you need separate device; the pin control mapping table
>> entries for a particular state simply needs to include entries for
>> multiple pin controllers.
>
> So splitting each block into a separate pin control device is definately
> one way to skin the cat.
>
> The ux500 would then have 9 pin controller instances (after a
> big fat refactoring, but whatever) instead of 9 GPIO instances
> and one pinctrl instance referencing them. Also this solves
> the problem of registering GPIO ranges from the wrong end
> of the pin controller.
>
> Hm, I should try this and see where it goes... What do you
> think about this Sonic?

As I discussed with Stephen:

To separate the pinctrl_settings of one peripheral to multiple pinctrl
devices, multiple pinctrl group arrays and function arrays should be
defined in the soc data file. This change increases the code size of
the soc data file a lot without get any real benefits.

The pin controller device can be defined as a logic device to cover
many gpio devices, which are mapped into the same pin id space without
collision. All overhead in the soc data file can be removed in this
way. GPIO devices with pin id region collision should be put into
different pin controller devices.

So, I think it is fine to either binding pinctrl device to gpio device
or leave it as a logic device.

Regards,

Sonic
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Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-29 Thread Sonic Zhang
Hi Linus,

On Thu, Aug 29, 2013 at 4:12 PM, Linus Walleij  wrote:
> On Thu, Aug 22, 2013 at 9:07 AM, Sonic Zhang  wrote:
>
>> There are 6 to 9 GPIO HW blocks in one Blackfin SoC. Function
>> pinmux_enable_setting() in current pinctrl framework assumes the
>> function mux setting of one peripheral pin group is configured in one
>> pinctrl device. But, the function mux setting of one blackfin
>> peripheral may be done among different GPIO HW blocks. So, I have to
>> separate the pinctrl driver from the GPIO block driver add the ranges
>> of all GPIO blocks into one pinctrl device for Blackfin.
>
> This is similar to the situation in the pinctrl-nomadik.c driver,
> where the pinctrl portions wait for the GPIO devices to instantiate
> before proceeding to probe "on top" of the GPIO blocks, using
> the latter to get to the registers.
>
> I am not sure we have found the best way to sort out this
> type of system, let's see what we can come up with.

In the blackfin pinctrol-adi2 driver, I probe all gpio devices
independently after all logic pinctrl devices. When one gpio device is
probed, it can get its pinctrl device name from its platform data and
add its gpio range into the pinctrl device via
gpiochip_add_pin_range(). The gpio device don't need to know anything
else about its pinctrl device.

Regards,

Sonic

>
> One way I was contemplating was to have just one fat node
> in the device tree containing all the register ranges, and one
> fat probe function, so all these ranges associated with a
> single struct device, but that does not well work with
> clocking and interrupts (the GPIO ranges needed one
> clock and interrupt each) so I gave up on that idea.
>
> My latest idea was to to to break the subsystems apart a
> bit by letting GPIO devices probe without the underlying
> pin controller being in place, so I queued up the operations
> until the pin controller arrived, but unfortunately this creates
> other problems :-(
>
> Still this creates a fuzz when trying to refactor stuff so we
> need to find a solution.
>
> Yours,
> Linus Walleij
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Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-29 Thread Sonic Zhang
Hi Stephen,

On Wed, Aug 28, 2013 at 10:23 PM, Stephen Warren  wrote:
> On 08/27/2013 09:56 PM, Sonic Zhang wrote:
>> Hi Stephen,
>>
>> On Wed, Aug 28, 2013 at 5:39 AM, Stephen Warren  
>> wrote:
>>> On 08/27/2013 03:30 AM, Sonic Zhang wrote:
>>>> Hi Stephen,
>>>>
>>>> On Fri, Aug 23, 2013 at 4:48 AM, Stephen Warren  
>>>> wrote:
>>>>> On 08/22/2013 01:07 AM, Sonic Zhang wrote:
>>>>>> Hi Stephen,
>>>>>>
>>>>>> On Thu, Aug 22, 2013 at 2:45 AM, Stephen Warren  
>>>>>> wrote:
>>>>>>> On 08/21/2013 12:30 AM, Sonic Zhang wrote:
>>>>>>>> From: Sonic Zhang 
>>>>>>>>
>>>>>>>> The new ADI GPIO2 controller was introduced since the BF548 and BF60x
>>>>>>>> processors. It differs a lot from the old one on BF5xx processors. So,
>>>>>>>> create a pinctrl driver under the pinctrl framework.
>>>
>>>>>> The
>>>>>> pinctrl_id field in platform data is to make the driver flexible for
>>>>>> future SoCs. If the later case is true, I can just fix the pinctrl
>>>>>> device name to "pinctrl-adi2.0".
>>>>>
>>>>> I was talking about pdata->port_pin_base being passed to
>>>>> gpiochip_add_pin_range(), not the device name.
>>>>>
>>>>>> The GPIO device's HW regsiter base, pin base, pin number and the
>>>>>> relationship with the PINT device are defined in the platform data.
>>>>>
>>>>> Hmmm. I suppose with a platform-data-based driver, there isn't a good
>>>>> opportunity to encode which HW the code is running on, and then derive
>>>>> those parameters from the SoC type and/or put that information into
>>>>> device tree. Perhaps platform data is the only way, although isn't there
>>>>> some kind of "device ID -> data" mapping table option, so that probe()
>>>>> can be told which SoC is in use based on the device name, and use that
>>>>> to look up SoC-specific data?
>>>>
>>>> The soc data driver is use to describe the pin group and function
>>>> information of peripherals managed by a pin controller. It is more
>>>> traditional and simpler to put the device specific parameters into the
>>>> platform data.
>>>
>>> Sure, that's the way things have been done historically. However, if
>>> there's a better way, one may as well use it.
>>>
>>>>
>>>>
>>>>>
>>>>>>>> +static struct platform_driver adi_pinctrl_driver = {
>>>>>>>> + .probe  = adi_pinctrl_probe,
>>>>>>>> + .remove = adi_pinctrl_remove,
>>>>>>>> + .driver = {
>>>>>>>> + .name   = DRIVER_NAME,
>>>>>>>> + },
>>>>>>>> +};
>>>>>>>> +
>>>>>>>> +static struct platform_driver adi_gpio_pint_driver = {
>>>>>>>> + .probe  = adi_gpio_pint_probe,
>>>>>>>> + .remove = adi_gpio_pint_remove,
>>>>>>>> + .driver = {
>>>>>>>> + .name   = "adi-gpio-pint",
>>>>>>>> + },
>>>>>>>> +};
>>>>>>>> +
>>>>>>>> +static struct platform_driver adi_gpio_driver = {
>>>>>>>> + .probe  = adi_gpio_probe,
>>>>>>>> + .remove = adi_gpio_remove,
>>>>>>>> + .driver = {
>>>>>>>> + .name   = "adi-gpio",
>>>>>>>> + },
>>>>>>>> +};
>>>>>>>
>>>>>>> Hmmm. Is there one HW block that controls GPIOs and pinctrl, or are
>>>>>>> there separate HW blocks?
>>>>>>>
>>>>>>> If there's one HW block, why not have just one driver?
>>>>>>>
>>>>>>> If there are separate HW blocks, then having separate GPIO and pinctrl
>>>>>>> drivers seems like it would make sense.
>>>>>>
>>>>>> There are 6 to 9 GPIO HW blocks in one Blackfin SoC. Function
>>&

Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-29 Thread Sonic Zhang
Hi Linus,

On Thu, Aug 29, 2013 at 4:02 PM, Linus Walleij  wrote:
> On Wed, Aug 21, 2013 at 8:30 AM, Sonic Zhang  wrote:
>
>> From: Sonic Zhang 
>>
>> The new ADI GPIO2 controller was introduced since the BF548 and BF60x
>> processors. It differs a lot from the old one on BF5xx processors. So,
>> create a pinctrl driver under the pinctrl framework.
> (...)
>
> The v3 is a huge improvement! Keep going.
>
> I will not repeat any of Stephens review comments, I just
> saw this:
>
>> +static const unsigned uart1_pins[] = {
>> +   GPIO_PH0, GPIO_PH1,
>> +#ifdef CONFIG_BFIN_UART1_CTSRTS
>> +   GPIO_PE9, GPIO_PE10,
>> +#endif
> (...)
>> +static const unsigned atapi_pins[] = {
>> +   GPIO_PH2, GPIO_PJ3, GPIO_PJ4, GPIO_PJ5, GPIO_PJ6,
>> +   GPIO_PJ7, GPIO_PJ8, GPIO_PJ9, GPIO_PJ10,
>> +   GPIO_PG5, GPIO_PG6, GPIO_PG7,
>> +#ifdef CONFIG_BF548_ATAPI_ALTERNATIVE_PORT
>> +   GPIO_PF0, GPIO_PF1, GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5, GPIO_PF6,
>> +   GPIO_PF7, GPIO_PF8, GPIO_PF9, GPIO_PF10, GPIO_PF11, GPIO_PF12,
>> +   GPIO_PF13, GPIO_PF14, GPIO_PF15, GPIO_PG2, GPIO_PG3, GPIO_PG4,
>> +#endif
>
> (...)
>> +static const struct adi_pin_group adi_pin_groups[] = {
> (...)
>> +   ADI_PIN_GROUP("uart1grp", uart1_pins),
> (...)
>> +   ADI_PIN_GROUP("atapigrp", atapi_pins),
>> +};
>
> This is not how we do it. Do not use Kconfig to spefify how the SoC
> is utilized. This shall be done at runtime.
>
> What you want to do for UART0 is specify one group for the TX/RX
> pair and another group for the CTS/RTS pair like this:
>
> static const unsigned uart1_rxtx_pins[] = {
>GPIO_PH0, GPIO_PH1,
> };
>
> static const unsigned uart1_rtscts_pins[] = {
>GPIO_PE9, GPIO_PE10,
> };
>
> static const struct adi_pin_group adi_pin_groups[] = {
> (...)
> ADI_PIN_GROUP("uart1txrxgrp", uart1_rxtx_pins),
> ADI_PIN_GROUP("uart1rtsctsgrp", uart1_ctsrts_pins),
>(...)
> };
>
> (And vice versa for the atapi pins, create two groups.)
>
> If you want to use all four pins on UART1 in a system, you
> specify this in you map (in platform data or DTS), so that
> e.g. the state "default" will be activate *both* uart1txrxgrp
> and uart1rtscts groups.
>
> This is typically done with two entries in the map.

OK. I will separate the pins into 2 groups.

Regards,

Sonic
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Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-29 Thread Sonic Zhang
Hi Linus,

On Thu, Aug 29, 2013 at 4:02 PM, Linus Walleij linus.wall...@linaro.org wrote:
 On Wed, Aug 21, 2013 at 8:30 AM, Sonic Zhang sonic@gmail.com wrote:

 From: Sonic Zhang sonic.zh...@analog.com

 The new ADI GPIO2 controller was introduced since the BF548 and BF60x
 processors. It differs a lot from the old one on BF5xx processors. So,
 create a pinctrl driver under the pinctrl framework.
 (...)

 The v3 is a huge improvement! Keep going.

 I will not repeat any of Stephens review comments, I just
 saw this:

 +static const unsigned uart1_pins[] = {
 +   GPIO_PH0, GPIO_PH1,
 +#ifdef CONFIG_BFIN_UART1_CTSRTS
 +   GPIO_PE9, GPIO_PE10,
 +#endif
 (...)
 +static const unsigned atapi_pins[] = {
 +   GPIO_PH2, GPIO_PJ3, GPIO_PJ4, GPIO_PJ5, GPIO_PJ6,
 +   GPIO_PJ7, GPIO_PJ8, GPIO_PJ9, GPIO_PJ10,
 +   GPIO_PG5, GPIO_PG6, GPIO_PG7,
 +#ifdef CONFIG_BF548_ATAPI_ALTERNATIVE_PORT
 +   GPIO_PF0, GPIO_PF1, GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5, GPIO_PF6,
 +   GPIO_PF7, GPIO_PF8, GPIO_PF9, GPIO_PF10, GPIO_PF11, GPIO_PF12,
 +   GPIO_PF13, GPIO_PF14, GPIO_PF15, GPIO_PG2, GPIO_PG3, GPIO_PG4,
 +#endif

 (...)
 +static const struct adi_pin_group adi_pin_groups[] = {
 (...)
 +   ADI_PIN_GROUP(uart1grp, uart1_pins),
 (...)
 +   ADI_PIN_GROUP(atapigrp, atapi_pins),
 +};

 This is not how we do it. Do not use Kconfig to spefify how the SoC
 is utilized. This shall be done at runtime.

 What you want to do for UART0 is specify one group for the TX/RX
 pair and another group for the CTS/RTS pair like this:

 static const unsigned uart1_rxtx_pins[] = {
GPIO_PH0, GPIO_PH1,
 };

 static const unsigned uart1_rtscts_pins[] = {
GPIO_PE9, GPIO_PE10,
 };

 static const struct adi_pin_group adi_pin_groups[] = {
 (...)
 ADI_PIN_GROUP(uart1txrxgrp, uart1_rxtx_pins),
 ADI_PIN_GROUP(uart1rtsctsgrp, uart1_ctsrts_pins),
(...)
 };

 (And vice versa for the atapi pins, create two groups.)

 If you want to use all four pins on UART1 in a system, you
 specify this in you map (in platform data or DTS), so that
 e.g. the state default will be activate *both* uart1txrxgrp
 and uart1rtscts groups.

 This is typically done with two entries in the map.

OK. I will separate the pins into 2 groups.

Regards,

Sonic
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Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-29 Thread Sonic Zhang
Hi Stephen,

On Wed, Aug 28, 2013 at 10:23 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 08/27/2013 09:56 PM, Sonic Zhang wrote:
 Hi Stephen,

 On Wed, Aug 28, 2013 at 5:39 AM, Stephen Warren swar...@wwwdotorg.org 
 wrote:
 On 08/27/2013 03:30 AM, Sonic Zhang wrote:
 Hi Stephen,

 On Fri, Aug 23, 2013 at 4:48 AM, Stephen Warren swar...@wwwdotorg.org 
 wrote:
 On 08/22/2013 01:07 AM, Sonic Zhang wrote:
 Hi Stephen,

 On Thu, Aug 22, 2013 at 2:45 AM, Stephen Warren swar...@wwwdotorg.org 
 wrote:
 On 08/21/2013 12:30 AM, Sonic Zhang wrote:
 From: Sonic Zhang sonic.zh...@analog.com

 The new ADI GPIO2 controller was introduced since the BF548 and BF60x
 processors. It differs a lot from the old one on BF5xx processors. So,
 create a pinctrl driver under the pinctrl framework.

 The
 pinctrl_id field in platform data is to make the driver flexible for
 future SoCs. If the later case is true, I can just fix the pinctrl
 device name to pinctrl-adi2.0.

 I was talking about pdata-port_pin_base being passed to
 gpiochip_add_pin_range(), not the device name.

 The GPIO device's HW regsiter base, pin base, pin number and the
 relationship with the PINT device are defined in the platform data.

 Hmmm. I suppose with a platform-data-based driver, there isn't a good
 opportunity to encode which HW the code is running on, and then derive
 those parameters from the SoC type and/or put that information into
 device tree. Perhaps platform data is the only way, although isn't there
 some kind of device ID - data mapping table option, so that probe()
 can be told which SoC is in use based on the device name, and use that
 to look up SoC-specific data?

 The soc data driver is use to describe the pin group and function
 information of peripherals managed by a pin controller. It is more
 traditional and simpler to put the device specific parameters into the
 platform data.

 Sure, that's the way things have been done historically. However, if
 there's a better way, one may as well use it.




 +static struct platform_driver adi_pinctrl_driver = {
 + .probe  = adi_pinctrl_probe,
 + .remove = adi_pinctrl_remove,
 + .driver = {
 + .name   = DRIVER_NAME,
 + },
 +};
 +
 +static struct platform_driver adi_gpio_pint_driver = {
 + .probe  = adi_gpio_pint_probe,
 + .remove = adi_gpio_pint_remove,
 + .driver = {
 + .name   = adi-gpio-pint,
 + },
 +};
 +
 +static struct platform_driver adi_gpio_driver = {
 + .probe  = adi_gpio_probe,
 + .remove = adi_gpio_remove,
 + .driver = {
 + .name   = adi-gpio,
 + },
 +};

 Hmmm. Is there one HW block that controls GPIOs and pinctrl, or are
 there separate HW blocks?

 If there's one HW block, why not have just one driver?

 If there are separate HW blocks, then having separate GPIO and pinctrl
 drivers seems like it would make sense.

 There are 6 to 9 GPIO HW blocks in one Blackfin SoC. Function
 pinmux_enable_setting() in current pinctrl framework assumes the
 function mux setting of one peripheral pin group is configured in one
 pinctrl device. But, the function mux setting of one blackfin
 peripheral may be done among different GPIO HW blocks. So, I have to
 separate the pinctrl driver from the GPIO block driver add the ranges
 of all GPIO blocks into one pinctrl device for Blackfin.

 I don't think you need separate device; the pin control mapping table
 entries for a particular state simply needs to include entries for
 multiple pin controllers.

 Calling pinctrl_select_state() multiple times with different pin
 controllers is not an atomic operation. If the second call fails, the
 pins requested successfully in the first call won't be freed
 automatically.

 Drivers should only call pinctrl_select_state() once. The state that
 gets selected can affect multiple pin controllers at once. This should
 be an atomic operation as far as the client driver is concerned. If any
 of that isn't true, it's a bug in pinctrl.

 /**
  * pinctrl_select_state() - select/activate/program a pinctrl state to HW
  * @p: the pinctrl handle for the device that requests configuration
  * @state: the state handle to select/activate/program
  */
 int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state)

 If drivers should still call pinctrl_select_state() once in case of
 multiple pin controllers, the first parameter of
 pinctrl_select_state() is wrong. Which pinctrl device among all
 affected pin controllers  should the driver use? Or whatever pinctrl
 device?

 The function prototype is not wrong. struct pinctrl *p is not a
 pinctrl device, but rather it's the result of calling pinctrl_get().
 This value encompasses all information required to program all pinctrl
 HW devices that need to be programmed.

Thanks to explain. I didn't dig into struct pinctrl much.

Regards,

Sonic


 To separate the pinctrl_settings of one peripheral

Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-29 Thread Sonic Zhang
Hi Linus,

On Thu, Aug 29, 2013 at 4:12 PM, Linus Walleij linus.wall...@linaro.org wrote:
 On Thu, Aug 22, 2013 at 9:07 AM, Sonic Zhang sonic@gmail.com wrote:

 There are 6 to 9 GPIO HW blocks in one Blackfin SoC. Function
 pinmux_enable_setting() in current pinctrl framework assumes the
 function mux setting of one peripheral pin group is configured in one
 pinctrl device. But, the function mux setting of one blackfin
 peripheral may be done among different GPIO HW blocks. So, I have to
 separate the pinctrl driver from the GPIO block driver add the ranges
 of all GPIO blocks into one pinctrl device for Blackfin.

 This is similar to the situation in the pinctrl-nomadik.c driver,
 where the pinctrl portions wait for the GPIO devices to instantiate
 before proceeding to probe on top of the GPIO blocks, using
 the latter to get to the registers.

 I am not sure we have found the best way to sort out this
 type of system, let's see what we can come up with.

In the blackfin pinctrol-adi2 driver, I probe all gpio devices
independently after all logic pinctrl devices. When one gpio device is
probed, it can get its pinctrl device name from its platform data and
add its gpio range into the pinctrl device via
gpiochip_add_pin_range(). The gpio device don't need to know anything
else about its pinctrl device.

Regards,

Sonic


 One way I was contemplating was to have just one fat node
 in the device tree containing all the register ranges, and one
 fat probe function, so all these ranges associated with a
 single struct device, but that does not well work with
 clocking and interrupts (the GPIO ranges needed one
 clock and interrupt each) so I gave up on that idea.

 My latest idea was to to to break the subsystems apart a
 bit by letting GPIO devices probe without the underlying
 pin controller being in place, so I queued up the operations
 until the pin controller arrived, but unfortunately this creates
 other problems :-(

 Still this creates a fuzz when trying to refactor stuff so we
 need to find a solution.

 Yours,
 Linus Walleij
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Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-29 Thread Sonic Zhang
Hi Linus,

On Thu, Aug 29, 2013 at 4:19 PM, Linus Walleij linus.wall...@linaro.org wrote:
 On Thu, Aug 22, 2013 at 10:48 PM, Stephen Warren swar...@wwwdotorg.org 
 wrote:
 On 08/22/2013 01:07 AM, Sonic Zhang wrote:

 There are 6 to 9 GPIO HW blocks in one Blackfin SoC. Function
 pinmux_enable_setting() in current pinctrl framework assumes the
 function mux setting of one peripheral pin group is configured in one
 pinctrl device. But, the function mux setting of one blackfin
 peripheral may be done among different GPIO HW blocks. So, I have to
 separate the pinctrl driver from the GPIO block driver add the ranges
 of all GPIO blocks into one pinctrl device for Blackfin.

 I don't think you need separate device; the pin control mapping table
 entries for a particular state simply needs to include entries for
 multiple pin controllers.

 So splitting each block into a separate pin control device is definately
 one way to skin the cat.

 The ux500 would then have 9 pin controller instances (after a
 big fat refactoring, but whatever) instead of 9 GPIO instances
 and one pinctrl instance referencing them. Also this solves
 the problem of registering GPIO ranges from the wrong end
 of the pin controller.

 Hm, I should try this and see where it goes... What do you
 think about this Sonic?

As I discussed with Stephen:

To separate the pinctrl_settings of one peripheral to multiple pinctrl
devices, multiple pinctrl group arrays and function arrays should be
defined in the soc data file. This change increases the code size of
the soc data file a lot without get any real benefits.

The pin controller device can be defined as a logic device to cover
many gpio devices, which are mapped into the same pin id space without
collision. All overhead in the soc data file can be removed in this
way. GPIO devices with pin id region collision should be put into
different pin controller devices.

So, I think it is fine to either binding pinctrl device to gpio device
or leave it as a logic device.

Regards,

Sonic
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Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-27 Thread Sonic Zhang
Hi Stephen,

On Wed, Aug 28, 2013 at 5:39 AM, Stephen Warren  wrote:
> On 08/27/2013 03:30 AM, Sonic Zhang wrote:
>> Hi Stephen,
>>
>> On Fri, Aug 23, 2013 at 4:48 AM, Stephen Warren  
>> wrote:
>>> On 08/22/2013 01:07 AM, Sonic Zhang wrote:
>>>> Hi Stephen,
>>>>
>>>> On Thu, Aug 22, 2013 at 2:45 AM, Stephen Warren  
>>>> wrote:
>>>>> On 08/21/2013 12:30 AM, Sonic Zhang wrote:
>>>>>> From: Sonic Zhang 
>>>>>>
>>>>>> The new ADI GPIO2 controller was introduced since the BF548 and BF60x
>>>>>> processors. It differs a lot from the old one on BF5xx processors. So,
>>>>>> create a pinctrl driver under the pinctrl framework.
>
>>>> The
>>>> pinctrl_id field in platform data is to make the driver flexible for
>>>> future SoCs. If the later case is true, I can just fix the pinctrl
>>>> device name to "pinctrl-adi2.0".
>>>
>>> I was talking about pdata->port_pin_base being passed to
>>> gpiochip_add_pin_range(), not the device name.
>>>
>>>> The GPIO device's HW regsiter base, pin base, pin number and the
>>>> relationship with the PINT device are defined in the platform data.
>>>
>>> Hmmm. I suppose with a platform-data-based driver, there isn't a good
>>> opportunity to encode which HW the code is running on, and then derive
>>> those parameters from the SoC type and/or put that information into
>>> device tree. Perhaps platform data is the only way, although isn't there
>>> some kind of "device ID -> data" mapping table option, so that probe()
>>> can be told which SoC is in use based on the device name, and use that
>>> to look up SoC-specific data?
>>
>> The soc data driver is use to describe the pin group and function
>> information of peripherals managed by a pin controller. It is more
>> traditional and simpler to put the device specific parameters into the
>> platform data.
>
> Sure, that's the way things have been done historically. However, if
> there's a better way, one may as well use it.
>
>>
>>
>>>
>>>>>> +static struct platform_driver adi_pinctrl_driver = {
>>>>>> + .probe  = adi_pinctrl_probe,
>>>>>> + .remove = adi_pinctrl_remove,
>>>>>> + .driver = {
>>>>>> + .name   = DRIVER_NAME,
>>>>>> + },
>>>>>> +};
>>>>>> +
>>>>>> +static struct platform_driver adi_gpio_pint_driver = {
>>>>>> + .probe  = adi_gpio_pint_probe,
>>>>>> + .remove = adi_gpio_pint_remove,
>>>>>> + .driver = {
>>>>>> + .name   = "adi-gpio-pint",
>>>>>> + },
>>>>>> +};
>>>>>> +
>>>>>> +static struct platform_driver adi_gpio_driver = {
>>>>>> + .probe  = adi_gpio_probe,
>>>>>> + .remove = adi_gpio_remove,
>>>>>> + .driver = {
>>>>>> + .name   = "adi-gpio",
>>>>>> + },
>>>>>> +};
>>>>>
>>>>> Hmmm. Is there one HW block that controls GPIOs and pinctrl, or are
>>>>> there separate HW blocks?
>>>>>
>>>>> If there's one HW block, why not have just one driver?
>>>>>
>>>>> If there are separate HW blocks, then having separate GPIO and pinctrl
>>>>> drivers seems like it would make sense.
>>>>
>>>> There are 6 to 9 GPIO HW blocks in one Blackfin SoC. Function
>>>> pinmux_enable_setting() in current pinctrl framework assumes the
>>>> function mux setting of one peripheral pin group is configured in one
>>>> pinctrl device. But, the function mux setting of one blackfin
>>>> peripheral may be done among different GPIO HW blocks. So, I have to
>>>> separate the pinctrl driver from the GPIO block driver add the ranges
>>>> of all GPIO blocks into one pinctrl device for Blackfin.
>>>
>>> I don't think you need separate device; the pin control mapping table
>>> entries for a particular state simply needs to include entries for
>>> multiple pin controllers.
>>
>> Calling pinctrl_select_state() multiple times with different pin
>> controllers is not

Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-27 Thread Sonic Zhang
Hi Stephen,

On Fri, Aug 23, 2013 at 4:48 AM, Stephen Warren  wrote:
> On 08/22/2013 01:07 AM, Sonic Zhang wrote:
>> Hi Stephen,
>>
>> On Thu, Aug 22, 2013 at 2:45 AM, Stephen Warren  
>> wrote:
>>> On 08/21/2013 12:30 AM, Sonic Zhang wrote:
>>>> From: Sonic Zhang 
>>>>
>>>> The new ADI GPIO2 controller was introduced since the BF548 and BF60x
>>>> processors. It differs a lot from the old one on BF5xx processors. So,
>>>> create a pinctrl driver under the pinctrl framework.
>>>
>>>>  drivers/pinctrl/Kconfig|   17 +
>>>>  drivers/pinctrl/Makefile   |3 +
>>>>  drivers/pinctrl/pinctrl-adi2-bf54x.c   |  572 +++
>>>>  drivers/pinctrl/pinctrl-adi2-bf60x.c   |  454 +
>>>
>>> Those files look reasonable.
>>>
>>>>  drivers/pinctrl/pinctrl-adi2.c | 1501 
>>>> 
>>>>  drivers/pinctrl/pinctrl-adi2.h |   75 ++
>>>>  include/linux/platform_data/pinctrl-adi2.h |   40 +
>>>
>>>> diff --git a/drivers/pinctrl/pinctrl-adi2.c 
>>>> b/drivers/pinctrl/pinctrl-adi2.c
>>>
>>>> +/**
>>>> + * struct gpio_reserve_map - a GPIO map structure containing the
>>>> + * reservation status of each PIN.
>>>> + *
>>>> + * @owner: who request the reservation
>>>> + * @rsv_gpio: if this pin is reserved as GPIO
>>>> + * @rsv_int: if this pin is reserved as interrupt
>>>> + * @rsv_peri: if this pin is reserved as part of a peripheral device
>>>> + */
>>>> +struct gpio_reserve_map {
>>>> + unsigned char owner[RESOURCE_LABEL_SIZE];
>>>> + bool rsv_gpio;
>>>> + bool rsv_int;
>>>> + bool rsv_peri;
>>>> +};
>>>
>>> Why is that needed; don't the pinctrl/GPIO cores already know which
>>> pinctrl pins and which GPIOs are used, and for what?
>>
>> The interrupt pin is requested and reserved in irq_chip operation
>> irq_set_type() other than gpio_request(). In Blackfin, one gpio pin is
>> allowed to be set up as both gpio interrupt and gpio input concurrently.
>> So, we need bits to differentiate them.
>
> Does the HW need to be programmed differently in those cases?
>
> If not, I still don't see why the driver cares; if the HW allows both
> usages concurrently, there's nothing to check and hence no need to
> record any state.
>
> If the HW must be programmed differently, can't you read the current
> state out of the HW?

After checking the blackfin HRM again, I think the GPIO interrupt mode
is not mutually exclusive with the peripheral mode as well as the gpio
mode. So, it is not necessary to check the reservation mode of the
requested pin in IRQ chip operation. I will remove the reservation
map.

>
>>>> +static int adi_gpio_probe(struct platform_device *pdev)
>>> ...
>>>> + /* Add gpio pin range */
>>>> + snprintf(pinctrl_devname, RESOURCE_LABEL_SIZE, "pinctrl-adi2.%d",
>>>> + pdata->pinctrl_id);
>>>> + pinctrl_devname[RESOURCE_LABEL_SIZE - 1] = 0;
>>>> + ret = gpiochip_add_pin_range(>chip, pinctrl_devname,
>>>> + 0, pdata->port_pin_base, port->width);
>>>
>>> This looks like platform data is providing the GPIO <-> pinctrl pin ID
>>> mapping, or at least part of it. Surely that mapping is fixed by the HW
>>> design, and hence isn't something platform data should influence. Do the
>>> files pinctrl-adi2-bf*.c not contain complete information about each HW
>>> configuration for some reason?
>>
>> Is it possible that 2 and more pinctrl devices are on the same SoC?
>
> Yes.
>
>> Or do we always assume there is only one pinctrl device on one SoC
>
> No.
>
>> The
>> pinctrl_id field in platform data is to make the driver flexible for
>> future SoCs. If the later case is true, I can just fix the pinctrl
>> device name to "pinctrl-adi2.0".
>
> I was talking about pdata->port_pin_base being passed to
> gpiochip_add_pin_range(), not the device name.
>
>> The GPIO device's HW regsiter base, pin base, pin number and the
>> relationship with the PINT device are defined in the platform data.
>
> Hmmm. I suppose with a platform-data-based driver, there isn't a good
> opportunity to encode which HW the code is running on, and then derive
> those parameters from the SoC type and/

Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-27 Thread Sonic Zhang
Hi Stephen,

On Fri, Aug 23, 2013 at 4:48 AM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 08/22/2013 01:07 AM, Sonic Zhang wrote:
 Hi Stephen,

 On Thu, Aug 22, 2013 at 2:45 AM, Stephen Warren swar...@wwwdotorg.org 
 wrote:
 On 08/21/2013 12:30 AM, Sonic Zhang wrote:
 From: Sonic Zhang sonic.zh...@analog.com

 The new ADI GPIO2 controller was introduced since the BF548 and BF60x
 processors. It differs a lot from the old one on BF5xx processors. So,
 create a pinctrl driver under the pinctrl framework.

  drivers/pinctrl/Kconfig|   17 +
  drivers/pinctrl/Makefile   |3 +
  drivers/pinctrl/pinctrl-adi2-bf54x.c   |  572 +++
  drivers/pinctrl/pinctrl-adi2-bf60x.c   |  454 +

 Those files look reasonable.

  drivers/pinctrl/pinctrl-adi2.c | 1501 
 
  drivers/pinctrl/pinctrl-adi2.h |   75 ++
  include/linux/platform_data/pinctrl-adi2.h |   40 +

 diff --git a/drivers/pinctrl/pinctrl-adi2.c 
 b/drivers/pinctrl/pinctrl-adi2.c

 +/**
 + * struct gpio_reserve_map - a GPIO map structure containing the
 + * reservation status of each PIN.
 + *
 + * @owner: who request the reservation
 + * @rsv_gpio: if this pin is reserved as GPIO
 + * @rsv_int: if this pin is reserved as interrupt
 + * @rsv_peri: if this pin is reserved as part of a peripheral device
 + */
 +struct gpio_reserve_map {
 + unsigned char owner[RESOURCE_LABEL_SIZE];
 + bool rsv_gpio;
 + bool rsv_int;
 + bool rsv_peri;
 +};

 Why is that needed; don't the pinctrl/GPIO cores already know which
 pinctrl pins and which GPIOs are used, and for what?

 The interrupt pin is requested and reserved in irq_chip operation
 irq_set_type() other than gpio_request(). In Blackfin, one gpio pin is
 allowed to be set up as both gpio interrupt and gpio input concurrently.
 So, we need bits to differentiate them.

 Does the HW need to be programmed differently in those cases?

 If not, I still don't see why the driver cares; if the HW allows both
 usages concurrently, there's nothing to check and hence no need to
 record any state.

 If the HW must be programmed differently, can't you read the current
 state out of the HW?

After checking the blackfin HRM again, I think the GPIO interrupt mode
is not mutually exclusive with the peripheral mode as well as the gpio
mode. So, it is not necessary to check the reservation mode of the
requested pin in IRQ chip operation. I will remove the reservation
map.


 +static int adi_gpio_probe(struct platform_device *pdev)
 ...
 + /* Add gpio pin range */
 + snprintf(pinctrl_devname, RESOURCE_LABEL_SIZE, pinctrl-adi2.%d,
 + pdata-pinctrl_id);
 + pinctrl_devname[RESOURCE_LABEL_SIZE - 1] = 0;
 + ret = gpiochip_add_pin_range(port-chip, pinctrl_devname,
 + 0, pdata-port_pin_base, port-width);

 This looks like platform data is providing the GPIO - pinctrl pin ID
 mapping, or at least part of it. Surely that mapping is fixed by the HW
 design, and hence isn't something platform data should influence. Do the
 files pinctrl-adi2-bf*.c not contain complete information about each HW
 configuration for some reason?

 Is it possible that 2 and more pinctrl devices are on the same SoC?

 Yes.

 Or do we always assume there is only one pinctrl device on one SoC

 No.

 The
 pinctrl_id field in platform data is to make the driver flexible for
 future SoCs. If the later case is true, I can just fix the pinctrl
 device name to pinctrl-adi2.0.

 I was talking about pdata-port_pin_base being passed to
 gpiochip_add_pin_range(), not the device name.

 The GPIO device's HW regsiter base, pin base, pin number and the
 relationship with the PINT device are defined in the platform data.

 Hmmm. I suppose with a platform-data-based driver, there isn't a good
 opportunity to encode which HW the code is running on, and then derive
 those parameters from the SoC type and/or put that information into
 device tree. Perhaps platform data is the only way, although isn't there
 some kind of device ID - data mapping table option, so that probe()
 can be told which SoC is in use based on the device name, and use that
 to look up SoC-specific data?

The soc data driver is use to describe the pin group and function
information of peripherals managed by a pin controller. It is more
traditional and simpler to put the device specific parameters into the
platform data.



 +static struct platform_driver adi_pinctrl_driver = {
 + .probe  = adi_pinctrl_probe,
 + .remove = adi_pinctrl_remove,
 + .driver = {
 + .name   = DRIVER_NAME,
 + },
 +};
 +
 +static struct platform_driver adi_gpio_pint_driver = {
 + .probe  = adi_gpio_pint_probe,
 + .remove = adi_gpio_pint_remove,
 + .driver = {
 + .name   = adi-gpio-pint,
 + },
 +};
 +
 +static struct platform_driver adi_gpio_driver = {
 + .probe

Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-27 Thread Sonic Zhang
Hi Stephen,

On Wed, Aug 28, 2013 at 5:39 AM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 08/27/2013 03:30 AM, Sonic Zhang wrote:
 Hi Stephen,

 On Fri, Aug 23, 2013 at 4:48 AM, Stephen Warren swar...@wwwdotorg.org 
 wrote:
 On 08/22/2013 01:07 AM, Sonic Zhang wrote:
 Hi Stephen,

 On Thu, Aug 22, 2013 at 2:45 AM, Stephen Warren swar...@wwwdotorg.org 
 wrote:
 On 08/21/2013 12:30 AM, Sonic Zhang wrote:
 From: Sonic Zhang sonic.zh...@analog.com

 The new ADI GPIO2 controller was introduced since the BF548 and BF60x
 processors. It differs a lot from the old one on BF5xx processors. So,
 create a pinctrl driver under the pinctrl framework.

 The
 pinctrl_id field in platform data is to make the driver flexible for
 future SoCs. If the later case is true, I can just fix the pinctrl
 device name to pinctrl-adi2.0.

 I was talking about pdata-port_pin_base being passed to
 gpiochip_add_pin_range(), not the device name.

 The GPIO device's HW regsiter base, pin base, pin number and the
 relationship with the PINT device are defined in the platform data.

 Hmmm. I suppose with a platform-data-based driver, there isn't a good
 opportunity to encode which HW the code is running on, and then derive
 those parameters from the SoC type and/or put that information into
 device tree. Perhaps platform data is the only way, although isn't there
 some kind of device ID - data mapping table option, so that probe()
 can be told which SoC is in use based on the device name, and use that
 to look up SoC-specific data?

 The soc data driver is use to describe the pin group and function
 information of peripherals managed by a pin controller. It is more
 traditional and simpler to put the device specific parameters into the
 platform data.

 Sure, that's the way things have been done historically. However, if
 there's a better way, one may as well use it.




 +static struct platform_driver adi_pinctrl_driver = {
 + .probe  = adi_pinctrl_probe,
 + .remove = adi_pinctrl_remove,
 + .driver = {
 + .name   = DRIVER_NAME,
 + },
 +};
 +
 +static struct platform_driver adi_gpio_pint_driver = {
 + .probe  = adi_gpio_pint_probe,
 + .remove = adi_gpio_pint_remove,
 + .driver = {
 + .name   = adi-gpio-pint,
 + },
 +};
 +
 +static struct platform_driver adi_gpio_driver = {
 + .probe  = adi_gpio_probe,
 + .remove = adi_gpio_remove,
 + .driver = {
 + .name   = adi-gpio,
 + },
 +};

 Hmmm. Is there one HW block that controls GPIOs and pinctrl, or are
 there separate HW blocks?

 If there's one HW block, why not have just one driver?

 If there are separate HW blocks, then having separate GPIO and pinctrl
 drivers seems like it would make sense.

 There are 6 to 9 GPIO HW blocks in one Blackfin SoC. Function
 pinmux_enable_setting() in current pinctrl framework assumes the
 function mux setting of one peripheral pin group is configured in one
 pinctrl device. But, the function mux setting of one blackfin
 peripheral may be done among different GPIO HW blocks. So, I have to
 separate the pinctrl driver from the GPIO block driver add the ranges
 of all GPIO blocks into one pinctrl device for Blackfin.

 I don't think you need separate device; the pin control mapping table
 entries for a particular state simply needs to include entries for
 multiple pin controllers.

 Calling pinctrl_select_state() multiple times with different pin
 controllers is not an atomic operation. If the second call fails, the
 pins requested successfully in the first call won't be freed
 automatically.

 Drivers should only call pinctrl_select_state() once. The state that
 gets selected can affect multiple pin controllers at once. This should
 be an atomic operation as far as the client driver is concerned. If any
 of that isn't true, it's a bug in pinctrl.

/**
 * pinctrl_select_state() - select/activate/program a pinctrl state to HW
 * @p: the pinctrl handle for the device that requests configuration
 * @state: the state handle to select/activate/program
 */
int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state)

If drivers should still call pinctrl_select_state() once in case of
multiple pin controllers, the first parameter of
pinctrl_select_state() is wrong. Which pinctrl device among all
affected pin controllers  should the driver use? Or whatever pinctrl
device?

To separate the pinctrl_settings of one peripheral to multiple pinctrl
devices, multiple pinctrl group arrays and function arrays should be
defined in the soc data file. This change increases the code size of
the soc data file a lot without get any real benefits. The pin
controller device can be defined as a logic device to cover all gpio
devices, which are mapped into one peripheral pin id space without
collision. All overhead in the soc data file can be removed in this
way.

GPIO devices with peripheral pin id collision have

Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-22 Thread Sonic Zhang
Hi Stephen,

On Thu, Aug 22, 2013 at 2:45 AM, Stephen Warren  wrote:
> On 08/21/2013 12:30 AM, Sonic Zhang wrote:
>> From: Sonic Zhang 
>>
>> The new ADI GPIO2 controller was introduced since the BF548 and BF60x
>> processors. It differs a lot from the old one on BF5xx processors. So,
>> create a pinctrl driver under the pinctrl framework.
>
>>  drivers/pinctrl/Kconfig|   17 +
>>  drivers/pinctrl/Makefile   |3 +
>>  drivers/pinctrl/pinctrl-adi2-bf54x.c   |  572 +++
>>  drivers/pinctrl/pinctrl-adi2-bf60x.c   |  454 +
>
> Those files look reasonable.
>
>>  drivers/pinctrl/pinctrl-adi2.c | 1501 
>> 
>>  drivers/pinctrl/pinctrl-adi2.h |   75 ++
>>  include/linux/platform_data/pinctrl-adi2.h |   40 +
>
>> diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
>
>> +/**
>> + * struct gpio_reserve_map - a GPIO map structure containing the
>> + * reservation status of each PIN.
>> + *
>> + * @owner: who request the reservation
>> + * @rsv_gpio: if this pin is reserved as GPIO
>> + * @rsv_int: if this pin is reserved as interrupt
>> + * @rsv_peri: if this pin is reserved as part of a peripheral device
>> + */
>> +struct gpio_reserve_map {
>> + unsigned char owner[RESOURCE_LABEL_SIZE];
>> + bool rsv_gpio;
>> + bool rsv_int;
>> + bool rsv_peri;
>> +};
>
> Why is that needed; don't the pinctrl/GPIO cores already know which
> pinctrl pins and which GPIOs are used, and for what?

The interrupt pin is requested and reserved in irq_chip operation
irq_set_type() other than gpio_request(). In Blackfin, one gpio pin is
allowed to be set up as both gpio interrupt and gpio input concurrently.
So, we need bits to differentiate them.


>
>> +#if defined(CONFIG_DEBUG_FS)
>> +static inline unsigned short get_gpio_dir(struct gpio_port *port,
>> ...
>
> Why aren't the existing GPIO/pinctrl subsystem debugfs files enough?
>

Yes, I do use the existing subsystem debugfs file.

port->chip.dbg_show = adi_gpio_dbg_show;

root:/> cat /sys/kernel/debug/gpio
GPIOs 0-15, adi-gpio:
GPIO_0: physmap-flash.0 Peripheral
GPIO_1: physmap-flash.0 Peripheral
GPIO_2: physmap-flash.0 Peripheral
GPIO_3: physmap-flash.0 Peripheral
GPIO_4: physmap-flash.0 Peripheral
..


>> +static int adi_pinmux_request(struct pinctrl_dev *pctldev, unsigned pin)
> ...
>> + /* If a pin can be muxed as either GPIO or peripheral, make
>> +  * sure it is not already a GPIO pin when we request it.
>> +  */
>> + if (port->rsvmap[offset].rsv_gpio) {
>> + if (system_state == SYSTEM_BOOTING)
>> + dump_stack();
>> + dev_err(pctldev->dev,
>> +"%s: Peripheral PIN %d is already reserved as GPIO by 
>> %s!\n",
>> +__func__, pin, get_label(port, offset));
>> + spin_unlock_irqrestore(>lock, flags);
>> + return -EBUSY;
>> + }
>
> Yes, this definitely warrants some more explanation. It looks odd. What
> is "system_state"?
>

The system_state checking, which is from the legacy bf5xx gpio driver,
is to warn if any peripheral pin is requested before the kernel_init
is executed. It seems this is not necessary under the pinctrl
framework. I will remove all these checking.


>> +static int adi_gpio_probe(struct platform_device *pdev)
> ...
>> + /* Add gpio pin range */
>> + snprintf(pinctrl_devname, RESOURCE_LABEL_SIZE, "pinctrl-adi2.%d",
>> + pdata->pinctrl_id);
>> + pinctrl_devname[RESOURCE_LABEL_SIZE - 1] = 0;
>> + ret = gpiochip_add_pin_range(>chip, pinctrl_devname,
>> + 0, pdata->port_pin_base, port->width);
>
> This looks like platform data is providing the GPIO <-> pinctrl pin ID
> mapping, or at least part of it. Surely that mapping is fixed by the HW
> design, and hence isn't something platform data should influence. Do the
> files pinctrl-adi2-bf*.c not contain complete information about each HW
> configuration for some reason?

Is it possible that 2 and more pinctrl devices are on the same SoC? Or
do we always assume there is only one pinctrl device on one SoC? The
pinctrl_id field in platform data is to make the driver flexible for
future SoCs. If the later case is true, I can just fix the pinctrl
device name to "pinctrl-adi2.0".

The GPIO device's HW regsiter bas

Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-22 Thread Sonic Zhang
Hi Stephen,

On Thu, Aug 22, 2013 at 2:45 AM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 08/21/2013 12:30 AM, Sonic Zhang wrote:
 From: Sonic Zhang sonic.zh...@analog.com

 The new ADI GPIO2 controller was introduced since the BF548 and BF60x
 processors. It differs a lot from the old one on BF5xx processors. So,
 create a pinctrl driver under the pinctrl framework.

  drivers/pinctrl/Kconfig|   17 +
  drivers/pinctrl/Makefile   |3 +
  drivers/pinctrl/pinctrl-adi2-bf54x.c   |  572 +++
  drivers/pinctrl/pinctrl-adi2-bf60x.c   |  454 +

 Those files look reasonable.

  drivers/pinctrl/pinctrl-adi2.c | 1501 
 
  drivers/pinctrl/pinctrl-adi2.h |   75 ++
  include/linux/platform_data/pinctrl-adi2.h |   40 +

 diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c

 +/**
 + * struct gpio_reserve_map - a GPIO map structure containing the
 + * reservation status of each PIN.
 + *
 + * @owner: who request the reservation
 + * @rsv_gpio: if this pin is reserved as GPIO
 + * @rsv_int: if this pin is reserved as interrupt
 + * @rsv_peri: if this pin is reserved as part of a peripheral device
 + */
 +struct gpio_reserve_map {
 + unsigned char owner[RESOURCE_LABEL_SIZE];
 + bool rsv_gpio;
 + bool rsv_int;
 + bool rsv_peri;
 +};

 Why is that needed; don't the pinctrl/GPIO cores already know which
 pinctrl pins and which GPIOs are used, and for what?

The interrupt pin is requested and reserved in irq_chip operation
irq_set_type() other than gpio_request(). In Blackfin, one gpio pin is
allowed to be set up as both gpio interrupt and gpio input concurrently.
So, we need bits to differentiate them.



 +#if defined(CONFIG_DEBUG_FS)
 +static inline unsigned short get_gpio_dir(struct gpio_port *port,
 ...

 Why aren't the existing GPIO/pinctrl subsystem debugfs files enough?


Yes, I do use the existing subsystem debugfs file.

port-chip.dbg_show = adi_gpio_dbg_show;

root:/ cat /sys/kernel/debug/gpio
GPIOs 0-15, adi-gpio:
GPIO_0: physmap-flash.0 Peripheral
GPIO_1: physmap-flash.0 Peripheral
GPIO_2: physmap-flash.0 Peripheral
GPIO_3: physmap-flash.0 Peripheral
GPIO_4: physmap-flash.0 Peripheral
..


 +static int adi_pinmux_request(struct pinctrl_dev *pctldev, unsigned pin)
 ...
 + /* If a pin can be muxed as either GPIO or peripheral, make
 +  * sure it is not already a GPIO pin when we request it.
 +  */
 + if (port-rsvmap[offset].rsv_gpio) {
 + if (system_state == SYSTEM_BOOTING)
 + dump_stack();
 + dev_err(pctldev-dev,
 +%s: Peripheral PIN %d is already reserved as GPIO by 
 %s!\n,
 +__func__, pin, get_label(port, offset));
 + spin_unlock_irqrestore(port-lock, flags);
 + return -EBUSY;
 + }

 Yes, this definitely warrants some more explanation. It looks odd. What
 is system_state?


The system_state checking, which is from the legacy bf5xx gpio driver,
is to warn if any peripheral pin is requested before the kernel_init
is executed. It seems this is not necessary under the pinctrl
framework. I will remove all these checking.


 +static int adi_gpio_probe(struct platform_device *pdev)
 ...
 + /* Add gpio pin range */
 + snprintf(pinctrl_devname, RESOURCE_LABEL_SIZE, pinctrl-adi2.%d,
 + pdata-pinctrl_id);
 + pinctrl_devname[RESOURCE_LABEL_SIZE - 1] = 0;
 + ret = gpiochip_add_pin_range(port-chip, pinctrl_devname,
 + 0, pdata-port_pin_base, port-width);

 This looks like platform data is providing the GPIO - pinctrl pin ID
 mapping, or at least part of it. Surely that mapping is fixed by the HW
 design, and hence isn't something platform data should influence. Do the
 files pinctrl-adi2-bf*.c not contain complete information about each HW
 configuration for some reason?

Is it possible that 2 and more pinctrl devices are on the same SoC? Or
do we always assume there is only one pinctrl device on one SoC? The
pinctrl_id field in platform data is to make the driver flexible for
future SoCs. If the later case is true, I can just fix the pinctrl
device name to pinctrl-adi2.0.

The GPIO device's HW regsiter base, pin base, pin number and the
relationship with the PINT device are defined in the platform data.


 +static struct platform_driver adi_pinctrl_driver = {
 + .probe  = adi_pinctrl_probe,
 + .remove = adi_pinctrl_remove,
 + .driver = {
 + .name   = DRIVER_NAME,
 + },
 +};
 +
 +static struct platform_driver adi_gpio_pint_driver = {
 + .probe  = adi_gpio_pint_probe,
 + .remove = adi_gpio_pint_remove,
 + .driver = {
 + .name   = adi-gpio-pint,
 + },
 +};
 +
 +static

[PATCH 2/3 v3] blackfin: gpio: Remove none gpio lib code.

2013-08-21 Thread Sonic Zhang
From: Sonic Zhang 

- Remove non gpio lib code from blackfin architecture.
- Limit the lagecy blackfin gpio driver to bf5xx processors only.
- Remove unused definition of the pint power functions.

Signed-off-by: Sonic Zhang 
Acked-by: Linus Walleij 
---
 arch/blackfin/Kconfig|   7 ++
 arch/blackfin/include/asm/gpio.h | 157 +--
 arch/blackfin/kernel/Makefile|   3 +-
 3 files changed, 29 insertions(+), 138 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index a117652..9eff25b 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -52,6 +52,9 @@ config GENERIC_BUG
 config ZONE_DMA
def_bool y
 
+config GENERIC_GPIO
+   def_bool y
+
 config FORCE_MAX_ZONEORDER
int
default "14"
@@ -317,6 +320,10 @@ config BF53x
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
default y
 
+config GPIO_ADI
+   def_bool y
+   depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 98d0133..99d338c 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -25,8 +25,12 @@
 
 #ifndef __ASSEMBLY__
 
+#ifndef CONFIG_PINCTRL
+
 #include 
-#include 
+#include 
+#include 
+#include 
 
 /***
 *
@@ -45,7 +49,6 @@
 * MODIFICATION HISTORY :
 **/
 
-#if !BFIN_GPIO_PINT
 void set_gpio_dir(unsigned, unsigned short);
 void set_gpio_inen(unsigned, unsigned short);
 void set_gpio_polar(unsigned, unsigned short);
@@ -115,7 +118,6 @@ struct gpio_port_t {
unsigned short dummy16;
unsigned short inen;
 };
-#endif
 
 #ifdef BFIN_SPECIAL_GPIO_BANKS
 void bfin_special_gpio_free(unsigned gpio);
@@ -127,25 +129,21 @@ void bfin_special_gpio_pm_hibernate_suspend(void);
 #endif
 
 #ifdef CONFIG_PM
-int bfin_pm_standby_ctrl(unsigned ctrl);
+void bfin_gpio_pm_hibernate_restore(void);
+void bfin_gpio_pm_hibernate_suspend(void);
+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
+int bfin_gpio_pm_standby_ctrl(unsigned ctrl);
 
 static inline int bfin_pm_standby_setup(void)
 {
-   return bfin_pm_standby_ctrl(1);
+   return bfin_gpio_pm_standby_ctrl(1);
 }
 
 static inline void bfin_pm_standby_restore(void)
 {
-   bfin_pm_standby_ctrl(0);
+   bfin_gpio_pm_standby_ctrl(0);
 }
 
-void bfin_gpio_pm_hibernate_restore(void);
-void bfin_gpio_pm_hibernate_suspend(void);
-void bfin_pint_suspend(void);
-void bfin_pint_resume(void);
-
-# if !BFIN_GPIO_PINT
-int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
 
 struct gpio_port_s {
unsigned short data;
@@ -161,7 +159,6 @@ struct gpio_port_s {
unsigned short reserved;
unsigned short mux;
 };
-# endif
 #endif /*CONFIG_PM*/
 
 /***
@@ -178,36 +175,29 @@ struct gpio_port_s {
 *
 * MODIFICATION HISTORY :
 **/
-
-int bfin_gpio_request(unsigned gpio, const char *label);
-void bfin_gpio_free(unsigned gpio);
 int bfin_gpio_irq_request(unsigned gpio, const char *label);
 void bfin_gpio_irq_free(unsigned gpio);
-int bfin_gpio_direction_input(unsigned gpio);
-int bfin_gpio_direction_output(unsigned gpio, int value);
-int bfin_gpio_get_value(unsigned gpio);
-void bfin_gpio_set_value(unsigned gpio, int value);
+void bfin_gpio_irq_prepare(unsigned gpio);
+
+static inline int irq_to_gpio(unsigned irq)
+{
+   return irq - GPIO_IRQ_BASE;
+}
+#endif /* CONFIG_PINCTRL */
 
 #include 
 #include 
 
-#ifdef CONFIG_GPIOLIB
 #include   /* cansleep wrappers */
 
 static inline int gpio_get_value(unsigned int gpio)
 {
-   if (gpio < MAX_BLACKFIN_GPIOS)
-   return bfin_gpio_get_value(gpio);
-   else
-   return __gpio_get_value(gpio);
+   return __gpio_get_value(gpio);
 }
 
 static inline void gpio_set_value(unsigned int gpio, int value)
 {
-   if (gpio < MAX_BLACKFIN_GPIOS)
-   bfin_gpio_set_value(gpio, value);
-   else
-   __gpio_set_value(gpio, value);
+   __gpio_set_value(gpio, value);
 }
 
 static inline int gpio_cansleep(unsigned int gpio)
@@ -219,113 +209,6 @@ static inline int gpio_to_irq(unsigned gpio)
 {
return __gpio_to_irq(gpio);
 }
-
-#else /* !CONFIG_GPIOLIB */
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-   return bfin_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-   return bfin_gpio_free(gpio);
-}
-
-static inline int gpio_direction_input(unsigned gpio)
-{
-   return bfin_gpio_direction_input(gpio);
-}
-
-static inline int gpio_direction_output(unsigned

[PATCH 3/3 v3] blackfin: pinctrl-adi2: Enable PINCTRL framework for BF54x and BF60x.

2013-08-21 Thread Sonic Zhang
From: Sonic Zhang 

- Remove unused macro MAX_RESOURCES
- Override blackfin legacy peripheral pinmux request and free APIs by
devm_pinctrl_get_select_default() to init the peripheral portmux setting.

v2-chagnes:
- Move pinctrl soc data out of blackfin arch folder.

Signed-off-by: Sonic Zhang 
---
 arch/blackfin/Kconfig   |  4 
 arch/blackfin/include/asm/portmux.h | 19 +--
 arch/blackfin/mach-bf548/include/mach/portmux.h |  2 --
 arch/blackfin/mach-bf609/include/mach/portmux.h |  2 --
 4 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 9eff25b..ed7157f 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -324,6 +324,10 @@ config GPIO_ADI
def_bool y
depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
 
+config PINCTRL
+   def_bool y
+   depends on BF54x || BF60x
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/portmux.h 
b/arch/blackfin/include/asm/portmux.h
index 9b1e2c3..7aa2043 100644
--- a/arch/blackfin/include/asm/portmux.h
+++ b/arch/blackfin/include/asm/portmux.h
@@ -17,14 +17,29 @@
 #define P_MAYSHARE 0x2000
 #define P_DONTCARE 0x1000
 
-
+#ifdef CONFIG_PINCTRL
+#include 
+
+#define gpio_pint_regs bfin_pint_regs
+#define adi_internal_set_wake bfin_internal_set_wake
+
+#define peripheral_request(per, label) 0
+#define peripheral_free(per)
+#define peripheral_request_list(per, label) \
+   (pdev ? (IS_ERR(devm_pinctrl_get_select_default(>dev)) \
+   ? -EINVAL : 0) : 0)
+#define peripheral_free_list(per)
+#else
 int peripheral_request(unsigned short per, const char *label);
 void peripheral_free(unsigned short per);
 int peripheral_request_list(const unsigned short per[], const char *label);
 void peripheral_free_list(const unsigned short per[]);
+#endif
 
-#include 
+#include 
+#include 
 #include 
+#include 
 
 #ifndef P_SPORT2_TFS
 #define P_SPORT2_TFS P_UNDEF
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h 
b/arch/blackfin/mach-bf548/include/mach/portmux.h
index e222462..d9f8632 100644
--- a/arch/blackfin/mach-bf548/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf548/include/mach/portmux.h
@@ -7,8 +7,6 @@
 #ifndef _MACH_PORTMUX_H_
 #define _MACH_PORTMUX_H_
 
-#define MAX_RESOURCES  MAX_BLACKFIN_GPIOS
-
 #define P_SPORT2_TFS   (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
 #define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
 #define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
diff --git a/arch/blackfin/mach-bf609/include/mach/portmux.h 
b/arch/blackfin/mach-bf609/include/mach/portmux.h
index 2e1a51c..fe34191 100644
--- a/arch/blackfin/mach-bf609/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf609/include/mach/portmux.h
@@ -7,8 +7,6 @@
 #ifndef _MACH_PORTMUX_H_
 #define _MACH_PORTMUX_H_
 
-#define MAX_RESOURCES  MAX_BLACKFIN_GPIOS
-
 /* EMAC RMII Port Mux */
 #define P_MII0_MDC (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0))
 #define P_MII0_MDIO(P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0))
-- 
1.8.2.3


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[PATCH 2/3 v3] blackfin: gpio: Remove none gpio lib code.

2013-08-21 Thread Sonic Zhang
From: Sonic Zhang 

- Remove non gpio lib code from blackfin architecture.
- Limit the lagecy blackfin gpio driver to bf5xx processors only.
- Remove unused definition of the pint power functions.

Signed-off-by: Sonic Zhang 
---
 arch/blackfin/Kconfig|   7 ++
 arch/blackfin/include/asm/gpio.h | 157 +--
 arch/blackfin/kernel/Makefile|   3 +-
 3 files changed, 29 insertions(+), 138 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index a117652..9eff25b 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -52,6 +52,9 @@ config GENERIC_BUG
 config ZONE_DMA
def_bool y
 
+config GENERIC_GPIO
+   def_bool y
+
 config FORCE_MAX_ZONEORDER
int
default "14"
@@ -317,6 +320,10 @@ config BF53x
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
default y
 
+config GPIO_ADI
+   def_bool y
+   depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 98d0133..99d338c 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -25,8 +25,12 @@
 
 #ifndef __ASSEMBLY__
 
+#ifndef CONFIG_PINCTRL
+
 #include 
-#include 
+#include 
+#include 
+#include 
 
 /***
 *
@@ -45,7 +49,6 @@
 * MODIFICATION HISTORY :
 **/
 
-#if !BFIN_GPIO_PINT
 void set_gpio_dir(unsigned, unsigned short);
 void set_gpio_inen(unsigned, unsigned short);
 void set_gpio_polar(unsigned, unsigned short);
@@ -115,7 +118,6 @@ struct gpio_port_t {
unsigned short dummy16;
unsigned short inen;
 };
-#endif
 
 #ifdef BFIN_SPECIAL_GPIO_BANKS
 void bfin_special_gpio_free(unsigned gpio);
@@ -127,25 +129,21 @@ void bfin_special_gpio_pm_hibernate_suspend(void);
 #endif
 
 #ifdef CONFIG_PM
-int bfin_pm_standby_ctrl(unsigned ctrl);
+void bfin_gpio_pm_hibernate_restore(void);
+void bfin_gpio_pm_hibernate_suspend(void);
+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
+int bfin_gpio_pm_standby_ctrl(unsigned ctrl);
 
 static inline int bfin_pm_standby_setup(void)
 {
-   return bfin_pm_standby_ctrl(1);
+   return bfin_gpio_pm_standby_ctrl(1);
 }
 
 static inline void bfin_pm_standby_restore(void)
 {
-   bfin_pm_standby_ctrl(0);
+   bfin_gpio_pm_standby_ctrl(0);
 }
 
-void bfin_gpio_pm_hibernate_restore(void);
-void bfin_gpio_pm_hibernate_suspend(void);
-void bfin_pint_suspend(void);
-void bfin_pint_resume(void);
-
-# if !BFIN_GPIO_PINT
-int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
 
 struct gpio_port_s {
unsigned short data;
@@ -161,7 +159,6 @@ struct gpio_port_s {
unsigned short reserved;
unsigned short mux;
 };
-# endif
 #endif /*CONFIG_PM*/
 
 /***
@@ -178,36 +175,29 @@ struct gpio_port_s {
 *
 * MODIFICATION HISTORY :
 **/
-
-int bfin_gpio_request(unsigned gpio, const char *label);
-void bfin_gpio_free(unsigned gpio);
 int bfin_gpio_irq_request(unsigned gpio, const char *label);
 void bfin_gpio_irq_free(unsigned gpio);
-int bfin_gpio_direction_input(unsigned gpio);
-int bfin_gpio_direction_output(unsigned gpio, int value);
-int bfin_gpio_get_value(unsigned gpio);
-void bfin_gpio_set_value(unsigned gpio, int value);
+void bfin_gpio_irq_prepare(unsigned gpio);
+
+static inline int irq_to_gpio(unsigned irq)
+{
+   return irq - GPIO_IRQ_BASE;
+}
+#endif /* CONFIG_PINCTRL */
 
 #include 
 #include 
 
-#ifdef CONFIG_GPIOLIB
 #include   /* cansleep wrappers */
 
 static inline int gpio_get_value(unsigned int gpio)
 {
-   if (gpio < MAX_BLACKFIN_GPIOS)
-   return bfin_gpio_get_value(gpio);
-   else
-   return __gpio_get_value(gpio);
+   return __gpio_get_value(gpio);
 }
 
 static inline void gpio_set_value(unsigned int gpio, int value)
 {
-   if (gpio < MAX_BLACKFIN_GPIOS)
-   bfin_gpio_set_value(gpio, value);
-   else
-   __gpio_set_value(gpio, value);
+   __gpio_set_value(gpio, value);
 }
 
 static inline int gpio_cansleep(unsigned int gpio)
@@ -219,113 +209,6 @@ static inline int gpio_to_irq(unsigned gpio)
 {
return __gpio_to_irq(gpio);
 }
-
-#else /* !CONFIG_GPIOLIB */
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-   return bfin_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-   return bfin_gpio_free(gpio);
-}
-
-static inline int gpio_direction_input(unsigned gpio)
-{
-   return bfin_gpio_direction_input(gpio);
-}
-
-static inline int gpio_direction_output(unsigned gpio, int value)
-

[PATCH 2/3 v3] blackfin: gpio: Remove none gpio lib code.

2013-08-21 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

- Remove non gpio lib code from blackfin architecture.
- Limit the lagecy blackfin gpio driver to bf5xx processors only.
- Remove unused definition of the pint power functions.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 arch/blackfin/Kconfig|   7 ++
 arch/blackfin/include/asm/gpio.h | 157 +--
 arch/blackfin/kernel/Makefile|   3 +-
 3 files changed, 29 insertions(+), 138 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index a117652..9eff25b 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -52,6 +52,9 @@ config GENERIC_BUG
 config ZONE_DMA
def_bool y
 
+config GENERIC_GPIO
+   def_bool y
+
 config FORCE_MAX_ZONEORDER
int
default 14
@@ -317,6 +320,10 @@ config BF53x
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
default y
 
+config GPIO_ADI
+   def_bool y
+   depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 98d0133..99d338c 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -25,8 +25,12 @@
 
 #ifndef __ASSEMBLY__
 
+#ifndef CONFIG_PINCTRL
+
 #include linux/compiler.h
-#include linux/gpio.h
+#include asm/blackfin.h
+#include asm/portmux.h
+#include asm/irq_handler.h
 
 /***
 *
@@ -45,7 +49,6 @@
 * MODIFICATION HISTORY :
 **/
 
-#if !BFIN_GPIO_PINT
 void set_gpio_dir(unsigned, unsigned short);
 void set_gpio_inen(unsigned, unsigned short);
 void set_gpio_polar(unsigned, unsigned short);
@@ -115,7 +118,6 @@ struct gpio_port_t {
unsigned short dummy16;
unsigned short inen;
 };
-#endif
 
 #ifdef BFIN_SPECIAL_GPIO_BANKS
 void bfin_special_gpio_free(unsigned gpio);
@@ -127,25 +129,21 @@ void bfin_special_gpio_pm_hibernate_suspend(void);
 #endif
 
 #ifdef CONFIG_PM
-int bfin_pm_standby_ctrl(unsigned ctrl);
+void bfin_gpio_pm_hibernate_restore(void);
+void bfin_gpio_pm_hibernate_suspend(void);
+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
+int bfin_gpio_pm_standby_ctrl(unsigned ctrl);
 
 static inline int bfin_pm_standby_setup(void)
 {
-   return bfin_pm_standby_ctrl(1);
+   return bfin_gpio_pm_standby_ctrl(1);
 }
 
 static inline void bfin_pm_standby_restore(void)
 {
-   bfin_pm_standby_ctrl(0);
+   bfin_gpio_pm_standby_ctrl(0);
 }
 
-void bfin_gpio_pm_hibernate_restore(void);
-void bfin_gpio_pm_hibernate_suspend(void);
-void bfin_pint_suspend(void);
-void bfin_pint_resume(void);
-
-# if !BFIN_GPIO_PINT
-int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
 
 struct gpio_port_s {
unsigned short data;
@@ -161,7 +159,6 @@ struct gpio_port_s {
unsigned short reserved;
unsigned short mux;
 };
-# endif
 #endif /*CONFIG_PM*/
 
 /***
@@ -178,36 +175,29 @@ struct gpio_port_s {
 *
 * MODIFICATION HISTORY :
 **/
-
-int bfin_gpio_request(unsigned gpio, const char *label);
-void bfin_gpio_free(unsigned gpio);
 int bfin_gpio_irq_request(unsigned gpio, const char *label);
 void bfin_gpio_irq_free(unsigned gpio);
-int bfin_gpio_direction_input(unsigned gpio);
-int bfin_gpio_direction_output(unsigned gpio, int value);
-int bfin_gpio_get_value(unsigned gpio);
-void bfin_gpio_set_value(unsigned gpio, int value);
+void bfin_gpio_irq_prepare(unsigned gpio);
+
+static inline int irq_to_gpio(unsigned irq)
+{
+   return irq - GPIO_IRQ_BASE;
+}
+#endif /* CONFIG_PINCTRL */
 
 #include asm/irq.h
 #include asm/errno.h
 
-#ifdef CONFIG_GPIOLIB
 #include asm-generic/gpio.h  /* cansleep wrappers */
 
 static inline int gpio_get_value(unsigned int gpio)
 {
-   if (gpio  MAX_BLACKFIN_GPIOS)
-   return bfin_gpio_get_value(gpio);
-   else
-   return __gpio_get_value(gpio);
+   return __gpio_get_value(gpio);
 }
 
 static inline void gpio_set_value(unsigned int gpio, int value)
 {
-   if (gpio  MAX_BLACKFIN_GPIOS)
-   bfin_gpio_set_value(gpio, value);
-   else
-   __gpio_set_value(gpio, value);
+   __gpio_set_value(gpio, value);
 }
 
 static inline int gpio_cansleep(unsigned int gpio)
@@ -219,113 +209,6 @@ static inline int gpio_to_irq(unsigned gpio)
 {
return __gpio_to_irq(gpio);
 }
-
-#else /* !CONFIG_GPIOLIB */
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-   return bfin_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-   return bfin_gpio_free(gpio);
-}
-
-static inline int gpio_direction_input(unsigned

[PATCH 3/3 v3] blackfin: pinctrl-adi2: Enable PINCTRL framework for BF54x and BF60x.

2013-08-21 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

- Remove unused macro MAX_RESOURCES
- Override blackfin legacy peripheral pinmux request and free APIs by
devm_pinctrl_get_select_default() to init the peripheral portmux setting.

v2-chagnes:
- Move pinctrl soc data out of blackfin arch folder.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 arch/blackfin/Kconfig   |  4 
 arch/blackfin/include/asm/portmux.h | 19 +--
 arch/blackfin/mach-bf548/include/mach/portmux.h |  2 --
 arch/blackfin/mach-bf609/include/mach/portmux.h |  2 --
 4 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 9eff25b..ed7157f 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -324,6 +324,10 @@ config GPIO_ADI
def_bool y
depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
 
+config PINCTRL
+   def_bool y
+   depends on BF54x || BF60x
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/portmux.h 
b/arch/blackfin/include/asm/portmux.h
index 9b1e2c3..7aa2043 100644
--- a/arch/blackfin/include/asm/portmux.h
+++ b/arch/blackfin/include/asm/portmux.h
@@ -17,14 +17,29 @@
 #define P_MAYSHARE 0x2000
 #define P_DONTCARE 0x1000
 
-
+#ifdef CONFIG_PINCTRL
+#include asm/irq_handler.h
+
+#define gpio_pint_regs bfin_pint_regs
+#define adi_internal_set_wake bfin_internal_set_wake
+
+#define peripheral_request(per, label) 0
+#define peripheral_free(per)
+#define peripheral_request_list(per, label) \
+   (pdev ? (IS_ERR(devm_pinctrl_get_select_default(pdev-dev)) \
+   ? -EINVAL : 0) : 0)
+#define peripheral_free_list(per)
+#else
 int peripheral_request(unsigned short per, const char *label);
 void peripheral_free(unsigned short per);
 int peripheral_request_list(const unsigned short per[], const char *label);
 void peripheral_free_list(const unsigned short per[]);
+#endif
 
-#include asm/gpio.h
+#include linux/err.h
+#include linux/pinctrl/pinctrl.h
 #include mach/portmux.h
+#include linux/gpio.h
 
 #ifndef P_SPORT2_TFS
 #define P_SPORT2_TFS P_UNDEF
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h 
b/arch/blackfin/mach-bf548/include/mach/portmux.h
index e222462..d9f8632 100644
--- a/arch/blackfin/mach-bf548/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf548/include/mach/portmux.h
@@ -7,8 +7,6 @@
 #ifndef _MACH_PORTMUX_H_
 #define _MACH_PORTMUX_H_
 
-#define MAX_RESOURCES  MAX_BLACKFIN_GPIOS
-
 #define P_SPORT2_TFS   (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
 #define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
 #define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
diff --git a/arch/blackfin/mach-bf609/include/mach/portmux.h 
b/arch/blackfin/mach-bf609/include/mach/portmux.h
index 2e1a51c..fe34191 100644
--- a/arch/blackfin/mach-bf609/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf609/include/mach/portmux.h
@@ -7,8 +7,6 @@
 #ifndef _MACH_PORTMUX_H_
 #define _MACH_PORTMUX_H_
 
-#define MAX_RESOURCES  MAX_BLACKFIN_GPIOS
-
 /* EMAC RMII Port Mux */
 #define P_MII0_MDC (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0))
 #define P_MII0_MDIO(P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0))
-- 
1.8.2.3


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[PATCH 2/3 v3] blackfin: gpio: Remove none gpio lib code.

2013-08-21 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

- Remove non gpio lib code from blackfin architecture.
- Limit the lagecy blackfin gpio driver to bf5xx processors only.
- Remove unused definition of the pint power functions.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
 arch/blackfin/Kconfig|   7 ++
 arch/blackfin/include/asm/gpio.h | 157 +--
 arch/blackfin/kernel/Makefile|   3 +-
 3 files changed, 29 insertions(+), 138 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index a117652..9eff25b 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -52,6 +52,9 @@ config GENERIC_BUG
 config ZONE_DMA
def_bool y
 
+config GENERIC_GPIO
+   def_bool y
+
 config FORCE_MAX_ZONEORDER
int
default 14
@@ -317,6 +320,10 @@ config BF53x
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
default y
 
+config GPIO_ADI
+   def_bool y
+   depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 98d0133..99d338c 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -25,8 +25,12 @@
 
 #ifndef __ASSEMBLY__
 
+#ifndef CONFIG_PINCTRL
+
 #include linux/compiler.h
-#include linux/gpio.h
+#include asm/blackfin.h
+#include asm/portmux.h
+#include asm/irq_handler.h
 
 /***
 *
@@ -45,7 +49,6 @@
 * MODIFICATION HISTORY :
 **/
 
-#if !BFIN_GPIO_PINT
 void set_gpio_dir(unsigned, unsigned short);
 void set_gpio_inen(unsigned, unsigned short);
 void set_gpio_polar(unsigned, unsigned short);
@@ -115,7 +118,6 @@ struct gpio_port_t {
unsigned short dummy16;
unsigned short inen;
 };
-#endif
 
 #ifdef BFIN_SPECIAL_GPIO_BANKS
 void bfin_special_gpio_free(unsigned gpio);
@@ -127,25 +129,21 @@ void bfin_special_gpio_pm_hibernate_suspend(void);
 #endif
 
 #ifdef CONFIG_PM
-int bfin_pm_standby_ctrl(unsigned ctrl);
+void bfin_gpio_pm_hibernate_restore(void);
+void bfin_gpio_pm_hibernate_suspend(void);
+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
+int bfin_gpio_pm_standby_ctrl(unsigned ctrl);
 
 static inline int bfin_pm_standby_setup(void)
 {
-   return bfin_pm_standby_ctrl(1);
+   return bfin_gpio_pm_standby_ctrl(1);
 }
 
 static inline void bfin_pm_standby_restore(void)
 {
-   bfin_pm_standby_ctrl(0);
+   bfin_gpio_pm_standby_ctrl(0);
 }
 
-void bfin_gpio_pm_hibernate_restore(void);
-void bfin_gpio_pm_hibernate_suspend(void);
-void bfin_pint_suspend(void);
-void bfin_pint_resume(void);
-
-# if !BFIN_GPIO_PINT
-int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
 
 struct gpio_port_s {
unsigned short data;
@@ -161,7 +159,6 @@ struct gpio_port_s {
unsigned short reserved;
unsigned short mux;
 };
-# endif
 #endif /*CONFIG_PM*/
 
 /***
@@ -178,36 +175,29 @@ struct gpio_port_s {
 *
 * MODIFICATION HISTORY :
 **/
-
-int bfin_gpio_request(unsigned gpio, const char *label);
-void bfin_gpio_free(unsigned gpio);
 int bfin_gpio_irq_request(unsigned gpio, const char *label);
 void bfin_gpio_irq_free(unsigned gpio);
-int bfin_gpio_direction_input(unsigned gpio);
-int bfin_gpio_direction_output(unsigned gpio, int value);
-int bfin_gpio_get_value(unsigned gpio);
-void bfin_gpio_set_value(unsigned gpio, int value);
+void bfin_gpio_irq_prepare(unsigned gpio);
+
+static inline int irq_to_gpio(unsigned irq)
+{
+   return irq - GPIO_IRQ_BASE;
+}
+#endif /* CONFIG_PINCTRL */
 
 #include asm/irq.h
 #include asm/errno.h
 
-#ifdef CONFIG_GPIOLIB
 #include asm-generic/gpio.h  /* cansleep wrappers */
 
 static inline int gpio_get_value(unsigned int gpio)
 {
-   if (gpio  MAX_BLACKFIN_GPIOS)
-   return bfin_gpio_get_value(gpio);
-   else
-   return __gpio_get_value(gpio);
+   return __gpio_get_value(gpio);
 }
 
 static inline void gpio_set_value(unsigned int gpio, int value)
 {
-   if (gpio  MAX_BLACKFIN_GPIOS)
-   bfin_gpio_set_value(gpio, value);
-   else
-   __gpio_set_value(gpio, value);
+   __gpio_set_value(gpio, value);
 }
 
 static inline int gpio_cansleep(unsigned int gpio)
@@ -219,113 +209,6 @@ static inline int gpio_to_irq(unsigned gpio)
 {
return __gpio_to_irq(gpio);
 }
-
-#else /* !CONFIG_GPIOLIB */
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-   return bfin_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-   return bfin_gpio_free(gpio

[PATCH v2] MAINTAINERS: ADI Linux development mailing lists change to the new server.

2013-08-15 Thread Sonic Zhang
From: Sonic Zhang 

Update Blackfin arch branch maintainer's email as well.

Signed-off-by: Sonic Zhang 
---
 MAINTAINERS | 42 --
 1 file changed, 20 insertions(+), 22 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index bf61e04..e5229d6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -288,36 +288,36 @@ F:sound/pci/ad1889.*
 
 AD525X ANALOG DEVICES DIGITAL POTENTIOMETERS DRIVER
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5254
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/misc/ad525x_dpot.c
 
 AD5398 CURRENT REGULATOR DRIVER (AD5398/AD5821)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5398
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/regulator/ad5398.c
 
 AD714X CAPACITANCE TOUCH SENSOR DRIVER (AD7142/3/7/8/7A)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7142
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/ad714x.c
 
 AD7877 TOUCHSCREEN DRIVER
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7877
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7877.c
 
 AD7879 TOUCHSCREEN DRIVER (AD7879/AD7889)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7879
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7879.c
 
@@ -353,8 +353,8 @@ F:  include/media/adp1653.h
 
 ADP5520 BACKLIGHT DRIVER WITH IO EXPANDER (ADP5520/ADP5501)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5520
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/mfd/adp5520.c
 F: drivers/video/backlight/adp5520_bl.c
@@ -364,16 +364,16 @@ F:drivers/input/keyboard/adp5520-keys.c
 
 ADP5588 QWERTY KEYPAD AND IO EXPANDER DRIVER (ADP5588/ADP5587)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5588
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/keyboard/adp5588-keys.c
 F: drivers/gpio/gpio-adp5588.c
 
 ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP8860
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/video/backlight/adp8860_bl.c
 
@@ -399,8 +399,8 @@ F:  drivers/hwmon/adt7475.c
 
 ADXL34X THREE-AXIS DIGITAL ACCELEROMETER DRIVER (ADXL345/ADXL346)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADXL345
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/adxl34x.c
 
@@ -588,9 +588,9 @@ F:  drivers/media/i2c/adv7604*
 
 ANALOG DEVICES INC ASOC CODEC DRIVERS
 M: Lars-Peter Clausen 
-L: device-drivers-de...@blackfin.uclinux.org
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://wiki.analog.com/
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: sound/soc/codecs/adau*
 F: sound/soc/codecs/adav*
@@ -599,7 +599,7 @@ F:  sound/soc/codecs/ssm*
 F: sound/soc/codecs/sigmadsp.*
 
 ANALOG DEVICES INC ASOC DRIVERS
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://blackfin.uclinux.org/
 S: Supported
@@ -1661,56 +1661,54 @@ F:  fs/bfs/
 F: include/uapi/linux/bfs_fs.h
 
 BLACKFIN ARCHITECTURE
-M: Mike Frysinger 
-L: uclinux-dist-de...@blackfin.uclinux.org
+M: Steven Miao 
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: arch/blackfin/
 
 BLACKFIN EMAC DRIVER
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/net/ethernet/adi/
 
 BLACKFIN RTC DRIVER
-M: Mike Frysinger 
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/rtc/rtc-bfin.c
 
 BLACKFIN SDH DRIVER
 M: Sonic Zhang 
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/mmc/host/bfin_sdh.c
 
 BLACKFIN SERIAL DRIVER
 M: Sonic

Re: [PATCH] MAINTAINERS: ADI Linux development mailing lists change to the new server.

2013-08-15 Thread Sonic Zhang
Hi Geert,

Thanks.

Sonic

On Thu, Aug 15, 2013 at 3:53 PM, Geert Uytterhoeven
 wrote:
> On Wed, Aug 14, 2013 at 8:20 AM, Sonic Zhang  wrote:
>>  ANALOG DEVICES INC ASOC DRIVERS
>> -L: uclinux-dist-de...@blackfin.uclinux.org
>> +L: adi-buidroot-de...@lists.sourceforge.net
>
> adi-buildroot-de...@lists.sourceforge.net, unless you really don't want to
> receive big reports and patches :-)
>
> Typo all over the place.
>
>>  L: alsa-de...@alsa-project.org (moderated for non-subscribers)
>>  W: http://blackfin.uclinux.org/
>>  S: Supported
>> @@ -1661,56 +1661,54 @@ F:  fs/bfs/
>>  F: include/uapi/linux/bfs_fs.h
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- 
> ge...@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like 
> that.
> -- Linus Torvalds
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


Re: [PATCH] MAINTAINERS: ADI Linux development mailing lists change to the new server.

2013-08-15 Thread Sonic Zhang
Hi Geert,

Thanks.

Sonic

On Thu, Aug 15, 2013 at 3:53 PM, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
 On Wed, Aug 14, 2013 at 8:20 AM, Sonic Zhang sonic@gmail.com wrote:
  ANALOG DEVICES INC ASOC DRIVERS
 -L: uclinux-dist-de...@blackfin.uclinux.org
 +L: adi-buidroot-de...@lists.sourceforge.net

 adi-buildroot-de...@lists.sourceforge.net, unless you really don't want to
 receive big reports and patches :-)

 Typo all over the place.

  L: alsa-de...@alsa-project.org (moderated for non-subscribers)
  W: http://blackfin.uclinux.org/
  S: Supported
 @@ -1661,56 +1661,54 @@ F:  fs/bfs/
  F: include/uapi/linux/bfs_fs.h

 Gr{oetje,eeting}s,

 Geert

 --
 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- 
 ge...@linux-m68k.org

 In personal conversations with technical people, I call myself a hacker. But
 when I'm talking to journalists I just say programmer or something like 
 that.
 -- Linus Torvalds
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCH v2] MAINTAINERS: ADI Linux development mailing lists change to the new server.

2013-08-15 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Update Blackfin arch branch maintainer's email as well.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 MAINTAINERS | 42 --
 1 file changed, 20 insertions(+), 22 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index bf61e04..e5229d6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -288,36 +288,36 @@ F:sound/pci/ad1889.*
 
 AD525X ANALOG DEVICES DIGITAL POTENTIOMETERS DRIVER
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5254
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/misc/ad525x_dpot.c
 
 AD5398 CURRENT REGULATOR DRIVER (AD5398/AD5821)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5398
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/regulator/ad5398.c
 
 AD714X CAPACITANCE TOUCH SENSOR DRIVER (AD7142/3/7/8/7A)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7142
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/ad714x.c
 
 AD7877 TOUCHSCREEN DRIVER
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7877
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7877.c
 
 AD7879 TOUCHSCREEN DRIVER (AD7879/AD7889)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7879
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7879.c
 
@@ -353,8 +353,8 @@ F:  include/media/adp1653.h
 
 ADP5520 BACKLIGHT DRIVER WITH IO EXPANDER (ADP5520/ADP5501)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5520
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/mfd/adp5520.c
 F: drivers/video/backlight/adp5520_bl.c
@@ -364,16 +364,16 @@ F:drivers/input/keyboard/adp5520-keys.c
 
 ADP5588 QWERTY KEYPAD AND IO EXPANDER DRIVER (ADP5588/ADP5587)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5588
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/keyboard/adp5588-keys.c
 F: drivers/gpio/gpio-adp5588.c
 
 ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP8860
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/video/backlight/adp8860_bl.c
 
@@ -399,8 +399,8 @@ F:  drivers/hwmon/adt7475.c
 
 ADXL34X THREE-AXIS DIGITAL ACCELEROMETER DRIVER (ADXL345/ADXL346)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADXL345
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/adxl34x.c
 
@@ -588,9 +588,9 @@ F:  drivers/media/i2c/adv7604*
 
 ANALOG DEVICES INC ASOC CODEC DRIVERS
 M: Lars-Peter Clausen l...@metafoo.de
-L: device-drivers-de...@blackfin.uclinux.org
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://wiki.analog.com/
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: sound/soc/codecs/adau*
 F: sound/soc/codecs/adav*
@@ -599,7 +599,7 @@ F:  sound/soc/codecs/ssm*
 F: sound/soc/codecs/sigmadsp.*
 
 ANALOG DEVICES INC ASOC DRIVERS
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://blackfin.uclinux.org/
 S: Supported
@@ -1661,56 +1661,54 @@ F:  fs/bfs/
 F: include/uapi/linux/bfs_fs.h
 
 BLACKFIN ARCHITECTURE
-M: Mike Frysinger vap...@gentoo.org
-L: uclinux-dist-de...@blackfin.uclinux.org
+M: Steven Miao real...@gmail.com
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: arch/blackfin/
 
 BLACKFIN EMAC DRIVER
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/net/ethernet/adi/
 
 BLACKFIN RTC DRIVER
-M: Mike Frysinger vapier@gmail.com
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buildroot-de

[PATCH] MAINTAINERS: ADI Linux development mailing lists change to the new server.

2013-08-14 Thread Sonic Zhang
From: Sonic Zhang 

Update Blackfin arch branch maintainer's email as well.

Signed-off-by: Sonic Zhang 
---
 MAINTAINERS | 42 --
 1 file changed, 20 insertions(+), 22 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index bf61e04..9578c2c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -288,36 +288,36 @@ F:sound/pci/ad1889.*
 
 AD525X ANALOG DEVICES DIGITAL POTENTIOMETERS DRIVER
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5254
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/misc/ad525x_dpot.c
 
 AD5398 CURRENT REGULATOR DRIVER (AD5398/AD5821)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5398
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/regulator/ad5398.c
 
 AD714X CAPACITANCE TOUCH SENSOR DRIVER (AD7142/3/7/8/7A)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7142
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/ad714x.c
 
 AD7877 TOUCHSCREEN DRIVER
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7877
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7877.c
 
 AD7879 TOUCHSCREEN DRIVER (AD7879/AD7889)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7879
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7879.c
 
@@ -353,8 +353,8 @@ F:  include/media/adp1653.h
 
 ADP5520 BACKLIGHT DRIVER WITH IO EXPANDER (ADP5520/ADP5501)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5520
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/mfd/adp5520.c
 F: drivers/video/backlight/adp5520_bl.c
@@ -364,16 +364,16 @@ F:drivers/input/keyboard/adp5520-keys.c
 
 ADP5588 QWERTY KEYPAD AND IO EXPANDER DRIVER (ADP5588/ADP5587)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5588
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/keyboard/adp5588-keys.c
 F: drivers/gpio/gpio-adp5588.c
 
 ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP8860
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/video/backlight/adp8860_bl.c
 
@@ -399,8 +399,8 @@ F:  drivers/hwmon/adt7475.c
 
 ADXL34X THREE-AXIS DIGITAL ACCELEROMETER DRIVER (ADXL345/ADXL346)
 M: Michael Hennerich 
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADXL345
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/adxl34x.c
 
@@ -588,9 +588,9 @@ F:  drivers/media/i2c/adv7604*
 
 ANALOG DEVICES INC ASOC CODEC DRIVERS
 M: Lars-Peter Clausen 
-L: device-drivers-de...@blackfin.uclinux.org
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://wiki.analog.com/
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: sound/soc/codecs/adau*
 F: sound/soc/codecs/adav*
@@ -599,7 +599,7 @@ F:  sound/soc/codecs/ssm*
 F: sound/soc/codecs/sigmadsp.*
 
 ANALOG DEVICES INC ASOC DRIVERS
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buidroot-de...@lists.sourceforge.net
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://blackfin.uclinux.org/
 S: Supported
@@ -1661,56 +1661,54 @@ F:  fs/bfs/
 F: include/uapi/linux/bfs_fs.h
 
 BLACKFIN ARCHITECTURE
-M: Mike Frysinger 
-L: uclinux-dist-de...@blackfin.uclinux.org
+M: Steven Miao 
+L: adi-buidroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: arch/blackfin/
 
 BLACKFIN EMAC DRIVER
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buidroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/net/ethernet/adi/
 
 BLACKFIN RTC DRIVER
-M: Mike Frysinger 
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buidroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/rtc/rtc-bfin.c
 
 BLACKFIN SDH DRIVER
 M: Sonic Zhang 
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buidroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/mmc/host/bfin_sdh.c
 
 BLACKFIN SERIAL DRIVER
 M: Sonic Zhang

[PATCH] MAINTAINERS: ADI Linux development mailing lists change to the new server.

2013-08-14 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Update Blackfin arch branch maintainer's email as well.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 MAINTAINERS | 42 --
 1 file changed, 20 insertions(+), 22 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index bf61e04..9578c2c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -288,36 +288,36 @@ F:sound/pci/ad1889.*
 
 AD525X ANALOG DEVICES DIGITAL POTENTIOMETERS DRIVER
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5254
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/misc/ad525x_dpot.c
 
 AD5398 CURRENT REGULATOR DRIVER (AD5398/AD5821)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD5398
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/regulator/ad5398.c
 
 AD714X CAPACITANCE TOUCH SENSOR DRIVER (AD7142/3/7/8/7A)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7142
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/ad714x.c
 
 AD7877 TOUCHSCREEN DRIVER
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7877
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7877.c
 
 AD7879 TOUCHSCREEN DRIVER (AD7879/AD7889)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/AD7879
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/touchscreen/ad7879.c
 
@@ -353,8 +353,8 @@ F:  include/media/adp1653.h
 
 ADP5520 BACKLIGHT DRIVER WITH IO EXPANDER (ADP5520/ADP5501)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5520
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/mfd/adp5520.c
 F: drivers/video/backlight/adp5520_bl.c
@@ -364,16 +364,16 @@ F:drivers/input/keyboard/adp5520-keys.c
 
 ADP5588 QWERTY KEYPAD AND IO EXPANDER DRIVER (ADP5588/ADP5587)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP5588
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/keyboard/adp5588-keys.c
 F: drivers/gpio/gpio-adp5588.c
 
 ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADP8860
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/video/backlight/adp8860_bl.c
 
@@ -399,8 +399,8 @@ F:  drivers/hwmon/adt7475.c
 
 ADXL34X THREE-AXIS DIGITAL ACCELEROMETER DRIVER (ADXL345/ADXL346)
 M: Michael Hennerich michael.henner...@analog.com
-L: device-drivers-de...@blackfin.uclinux.org
 W: http://wiki.analog.com/ADXL345
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: drivers/input/misc/adxl34x.c
 
@@ -588,9 +588,9 @@ F:  drivers/media/i2c/adv7604*
 
 ANALOG DEVICES INC ASOC CODEC DRIVERS
 M: Lars-Peter Clausen l...@metafoo.de
-L: device-drivers-de...@blackfin.uclinux.org
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://wiki.analog.com/
+W: http://ez.analog.com/community/linux-device-drivers
 S: Supported
 F: sound/soc/codecs/adau*
 F: sound/soc/codecs/adav*
@@ -599,7 +599,7 @@ F:  sound/soc/codecs/ssm*
 F: sound/soc/codecs/sigmadsp.*
 
 ANALOG DEVICES INC ASOC DRIVERS
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buidroot-de...@lists.sourceforge.net
 L: alsa-de...@alsa-project.org (moderated for non-subscribers)
 W: http://blackfin.uclinux.org/
 S: Supported
@@ -1661,56 +1661,54 @@ F:  fs/bfs/
 F: include/uapi/linux/bfs_fs.h
 
 BLACKFIN ARCHITECTURE
-M: Mike Frysinger vap...@gentoo.org
-L: uclinux-dist-de...@blackfin.uclinux.org
+M: Steven Miao real...@gmail.com
+L: adi-buidroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: arch/blackfin/
 
 BLACKFIN EMAC DRIVER
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buidroot-de...@lists.sourceforge.net
 W: http://blackfin.uclinux.org
 S: Supported
 F: drivers/net/ethernet/adi/
 
 BLACKFIN RTC DRIVER
-M: Mike Frysinger vapier@gmail.com
-L: uclinux-dist-de...@blackfin.uclinux.org
+L: adi-buidroot-de...@lists.sourceforge.net

[PATCH v4] pinctrl: pinmux: Don't free pins requested by other devices in pinmux_disable_setting.

2013-08-13 Thread Sonic Zhang
From: Sonic Zhang 

One peripheral may share part of its pins with the 2nd
peripheral and the other pins with the 3rd. If it requests all pins
when part of them has already be requested and owned by the 2nd
peripheral, this request fails and pinmux_disable_setting() is called.
The pinmux_disable_setting() frees all pins of the first peripheral
without checking if the pin is owned by itself or the 2nd, which
results in the malfunction of the 2nd peripheral driver.

Signed-off-by: Sonic Zhang 
---
 drivers/pinctrl/pinmux.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
index 88cc509..5f51588 100644
--- a/drivers/pinctrl/pinmux.c
+++ b/drivers/pinctrl/pinmux.c
@@ -482,13 +482,13 @@ void pinmux_disable_setting(struct pinctrl_setting const 
*setting)
 pins[i]);
continue;
}
-   desc->mux_setting = NULL;
+   if (desc->mux_setting == &(setting->data.mux)) {
+   desc->mux_setting = NULL;
+   /* And release the pin */
+   pin_free(pctldev, pins[i], NULL);
+   }
}
 
-   /* And release the pins */
-   for (i = 0; i < num_pins; i++)
-   pin_free(pctldev, pins[i], NULL);
-
if (ops->disable)
ops->disable(pctldev, setting->data.mux.func, 
setting->data.mux.group);
 }
-- 
1.8.2.3


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[PATCH v4] pinctrl: pinmux: Don't free pins requested by other devices in pinmux_disable_setting.

2013-08-13 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

One peripheral may share part of its pins with the 2nd
peripheral and the other pins with the 3rd. If it requests all pins
when part of them has already be requested and owned by the 2nd
peripheral, this request fails and pinmux_disable_setting() is called.
The pinmux_disable_setting() frees all pins of the first peripheral
without checking if the pin is owned by itself or the 2nd, which
results in the malfunction of the 2nd peripheral driver.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 drivers/pinctrl/pinmux.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
index 88cc509..5f51588 100644
--- a/drivers/pinctrl/pinmux.c
+++ b/drivers/pinctrl/pinmux.c
@@ -482,13 +482,13 @@ void pinmux_disable_setting(struct pinctrl_setting const 
*setting)
 pins[i]);
continue;
}
-   desc-mux_setting = NULL;
+   if (desc-mux_setting == (setting-data.mux)) {
+   desc-mux_setting = NULL;
+   /* And release the pin */
+   pin_free(pctldev, pins[i], NULL);
+   }
}
 
-   /* And release the pins */
-   for (i = 0; i  num_pins; i++)
-   pin_free(pctldev, pins[i], NULL);
-
if (ops-disable)
ops-disable(pctldev, setting-data.mux.func, 
setting-data.mux.group);
 }
-- 
1.8.2.3


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[PATCH 3/3 v2] blackfin: pinctrl-adi2: Add pin control device groups and function data.

2013-08-12 Thread Sonic Zhang
From: Sonic Zhang 

Select PINCTRL_ADI2 for bf54x and bf60x by default.

Signed-off-by: Sonic Zhang 
---
 arch/blackfin/Kconfig   |   7 +
 arch/blackfin/include/asm/portmux.h |  14 +-
 arch/blackfin/mach-bf548/include/mach/portmux.h | 595 +++-
 arch/blackfin/mach-bf609/include/mach/portmux.h | 477 ++-
 4 files changed, 1087 insertions(+), 6 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 9eff25b..ba891c2 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -324,6 +324,13 @@ config GPIO_ADI
def_bool y
depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
 
+config PINCTRL_ADI2
+   def_bool y
+   depends on (BF54x || BF60x)
+   select PINCTRL
+   select PINMUX
+   select IRQ_DOMAIN
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/portmux.h 
b/arch/blackfin/include/asm/portmux.h
index 9b1e2c3..6b3e71c 100644
--- a/arch/blackfin/include/asm/portmux.h
+++ b/arch/blackfin/include/asm/portmux.h
@@ -17,14 +17,24 @@
 #define P_MAYSHARE 0x2000
 #define P_DONTCARE 0x1000
 
-
+#ifdef CONFIG_PINCTRL
+#define peripheral_request(per, label) 0
+#define peripheral_free(per)
+#define peripheral_request_list(per, label) \
+   (pdev ? (IS_ERR(devm_pinctrl_get_select_default(>dev)) \
+   ? -EINVAL : 0) : 0);
+#define peripheral_free_list(per)
+#else
 int peripheral_request(unsigned short per, const char *label);
 void peripheral_free(unsigned short per);
 int peripheral_request_list(const unsigned short per[], const char *label);
 void peripheral_free_list(const unsigned short per[]);
+#endif
 
-#include 
+#include 
+#include 
 #include 
+#include 
 
 #ifndef P_SPORT2_TFS
 #define P_SPORT2_TFS P_UNDEF
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h 
b/arch/blackfin/mach-bf548/include/mach/portmux.h
index e222462..9fab923 100644
--- a/arch/blackfin/mach-bf548/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf548/include/mach/portmux.h
@@ -7,8 +7,6 @@
 #ifndef _MACH_PORTMUX_H_
 #define _MACH_PORTMUX_H_
 
-#define MAX_RESOURCES  MAX_BLACKFIN_GPIOS
-
 #define P_SPORT2_TFS   (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
 #define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
 #define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
@@ -317,4 +315,597 @@
 #define P_NAND_CLE (P_DONTCARE)
 #define P_NAND_ALE (P_DONTCARE)
 
+#ifdef CONFIG_PINCTRL
+
+#include 
+#include 
+#include 
+
+#define gpio_pint_regs bfin_pint_regs
+#define adi_internal_set_wake bfin_internal_set_wake
+
+static const struct pinctrl_pin_desc adi_pads[] = {
+   PINCTRL_PIN(0, "PA0"),
+   PINCTRL_PIN(1, "PA1"),
+   PINCTRL_PIN(2, "PA2"),
+   PINCTRL_PIN(3, "PG3"),
+   PINCTRL_PIN(4, "PA4"),
+   PINCTRL_PIN(5, "PA5"),
+   PINCTRL_PIN(6, "PA6"),
+   PINCTRL_PIN(7, "PA7"),
+   PINCTRL_PIN(8, "PA8"),
+   PINCTRL_PIN(9, "PA9"),
+   PINCTRL_PIN(10, "PA10"),
+   PINCTRL_PIN(11, "PA11"),
+   PINCTRL_PIN(12, "PA12"),
+   PINCTRL_PIN(13, "PA13"),
+   PINCTRL_PIN(14, "PA14"),
+   PINCTRL_PIN(15, "PA15"),
+   PINCTRL_PIN(16, "PB0"),
+   PINCTRL_PIN(17, "PB1"),
+   PINCTRL_PIN(18, "PB2"),
+   PINCTRL_PIN(19, "PB3"),
+   PINCTRL_PIN(20, "PB4"),
+   PINCTRL_PIN(21, "PB5"),
+   PINCTRL_PIN(22, "PB6"),
+   PINCTRL_PIN(23, "PB7"),
+   PINCTRL_PIN(24, "PB8"),
+   PINCTRL_PIN(25, "PB9"),
+   PINCTRL_PIN(26, "PB10"),
+   PINCTRL_PIN(27, "PB11"),
+   PINCTRL_PIN(28, "PB12"),
+   PINCTRL_PIN(29, "PB13"),
+   PINCTRL_PIN(30, "PB14"),
+   PINCTRL_PIN(32, "PC0"),
+   PINCTRL_PIN(33, "PC1"),
+   PINCTRL_PIN(34, "PC2"),
+   PINCTRL_PIN(35, "PC3"),
+   PINCTRL_PIN(36, "PC4"),
+   PINCTRL_PIN(37, "PC5"),
+   PINCTRL_PIN(38, "PC6"),
+   PINCTRL_PIN(39, "PC7"),
+   PINCTRL_PIN(40, "PC8"),
+   PINCTRL_PIN(41, "PC9"),
+   PINCTRL_PIN(42, "PC10"),
+   PINCTRL_PIN(43, "PC11"),
+   PINCTRL_PIN(44, "PC12"),
+   PINCTRL_PIN(45, "PC13"),
+   PINCTRL_PIN(48, "PD0"),
+   PINCTRL_PIN(49, "PD1"),
+   PINCTRL_PIN(50, "PD2"),
+   PINCTRL_PIN(51, "PD3"),
+   PINCTRL_PIN(52, "PD4"),
+   PINCTRL_PIN(53, "PD5"),
+   PINCTRL_PIN(54, "PD6"),
+   PINCTRL_PIN(55, "PD7"),
+   PINCT

[PATCH 2/3 v2] blackfin: gpio: Remove none gpio lib code.

2013-08-12 Thread Sonic Zhang
From: Sonic Zhang 

- Remove non gpio lib code from blackfin architecture.
- Limit the lagecy blackfin gpio driver to bf5xx processors only.
- Remove unused definition of the pint power functions.

Signed-off-by: Sonic Zhang 
---
 arch/blackfin/Kconfig|   7 ++
 arch/blackfin/include/asm/gpio.h | 157 +--
 arch/blackfin/kernel/Makefile|   3 +-
 3 files changed, 29 insertions(+), 138 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index a117652..9eff25b 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -52,6 +52,9 @@ config GENERIC_BUG
 config ZONE_DMA
def_bool y
 
+config GENERIC_GPIO
+   def_bool y
+
 config FORCE_MAX_ZONEORDER
int
default "14"
@@ -317,6 +320,10 @@ config BF53x
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
default y
 
+config GPIO_ADI
+   def_bool y
+   depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 98d0133..99d338c 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -25,8 +25,12 @@
 
 #ifndef __ASSEMBLY__
 
+#ifndef CONFIG_PINCTRL
+
 #include 
-#include 
+#include 
+#include 
+#include 
 
 /***
 *
@@ -45,7 +49,6 @@
 * MODIFICATION HISTORY :
 **/
 
-#if !BFIN_GPIO_PINT
 void set_gpio_dir(unsigned, unsigned short);
 void set_gpio_inen(unsigned, unsigned short);
 void set_gpio_polar(unsigned, unsigned short);
@@ -115,7 +118,6 @@ struct gpio_port_t {
unsigned short dummy16;
unsigned short inen;
 };
-#endif
 
 #ifdef BFIN_SPECIAL_GPIO_BANKS
 void bfin_special_gpio_free(unsigned gpio);
@@ -127,25 +129,21 @@ void bfin_special_gpio_pm_hibernate_suspend(void);
 #endif
 
 #ifdef CONFIG_PM
-int bfin_pm_standby_ctrl(unsigned ctrl);
+void bfin_gpio_pm_hibernate_restore(void);
+void bfin_gpio_pm_hibernate_suspend(void);
+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
+int bfin_gpio_pm_standby_ctrl(unsigned ctrl);
 
 static inline int bfin_pm_standby_setup(void)
 {
-   return bfin_pm_standby_ctrl(1);
+   return bfin_gpio_pm_standby_ctrl(1);
 }
 
 static inline void bfin_pm_standby_restore(void)
 {
-   bfin_pm_standby_ctrl(0);
+   bfin_gpio_pm_standby_ctrl(0);
 }
 
-void bfin_gpio_pm_hibernate_restore(void);
-void bfin_gpio_pm_hibernate_suspend(void);
-void bfin_pint_suspend(void);
-void bfin_pint_resume(void);
-
-# if !BFIN_GPIO_PINT
-int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
 
 struct gpio_port_s {
unsigned short data;
@@ -161,7 +159,6 @@ struct gpio_port_s {
unsigned short reserved;
unsigned short mux;
 };
-# endif
 #endif /*CONFIG_PM*/
 
 /***
@@ -178,36 +175,29 @@ struct gpio_port_s {
 *
 * MODIFICATION HISTORY :
 **/
-
-int bfin_gpio_request(unsigned gpio, const char *label);
-void bfin_gpio_free(unsigned gpio);
 int bfin_gpio_irq_request(unsigned gpio, const char *label);
 void bfin_gpio_irq_free(unsigned gpio);
-int bfin_gpio_direction_input(unsigned gpio);
-int bfin_gpio_direction_output(unsigned gpio, int value);
-int bfin_gpio_get_value(unsigned gpio);
-void bfin_gpio_set_value(unsigned gpio, int value);
+void bfin_gpio_irq_prepare(unsigned gpio);
+
+static inline int irq_to_gpio(unsigned irq)
+{
+   return irq - GPIO_IRQ_BASE;
+}
+#endif /* CONFIG_PINCTRL */
 
 #include 
 #include 
 
-#ifdef CONFIG_GPIOLIB
 #include   /* cansleep wrappers */
 
 static inline int gpio_get_value(unsigned int gpio)
 {
-   if (gpio < MAX_BLACKFIN_GPIOS)
-   return bfin_gpio_get_value(gpio);
-   else
-   return __gpio_get_value(gpio);
+   return __gpio_get_value(gpio);
 }
 
 static inline void gpio_set_value(unsigned int gpio, int value)
 {
-   if (gpio < MAX_BLACKFIN_GPIOS)
-   bfin_gpio_set_value(gpio, value);
-   else
-   __gpio_set_value(gpio, value);
+   __gpio_set_value(gpio, value);
 }
 
 static inline int gpio_cansleep(unsigned int gpio)
@@ -219,113 +209,6 @@ static inline int gpio_to_irq(unsigned gpio)
 {
return __gpio_to_irq(gpio);
 }
-
-#else /* !CONFIG_GPIOLIB */
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-   return bfin_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-   return bfin_gpio_free(gpio);
-}
-
-static inline int gpio_direction_input(unsigned gpio)
-{
-   return bfin_gpio_direction_input(gpio);
-}
-
-static inline int gpio_direction_output(unsigned gpio, int value)
-

[PATCH 1/3 v2] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-12 Thread Sonic Zhang
From: Sonic Zhang 

The new ADI GPIO2 controller was introduced since the BF548 and BF60x
processors. It differs a lot from the old one on BF5xx processors. So,
create a pinctrl driver under pinctrl framework.

- Define gpio ports and gpio interrupt controllers as individual platform
devices.
- Register a pinctrl driver for the whole GPIO ports and GPIO interrupt
devices.
- Probe pint devices before port devices. Put device instances into
respective gpio and pint lists.
- Define peripheral, irq and gpio reservation bit masks for each gpio
port as runtime resources.
- Save and restore gpio port and pint status MMRs in syscore PM functions.
- Add peripheral device groups and function data into machine portmux.h.
- Handle peripheral and gpio requests in pinctrl operation functions.
- Demux gpio IRQs via the irq_domain created by each GPIO port.

Signed-off-by: Sonic Zhang 

---
v2-changes:
- Remove unlinke() directive.
---
 drivers/pinctrl/Makefile   |1 +
 drivers/pinctrl/pinctrl-adi2.c | 1545 
 include/linux/platform_data/pinctrl-adi2.h |   38 +
 3 files changed, 1584 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-adi2.c
 create mode 100644 include/linux/platform_data/pinctrl-adi2.h

diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 9bdaeb8..7894c61 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_PINCTRL_AB8500)  += pinctrl-ab8500.o
 obj-$(CONFIG_PINCTRL_AB8540)   += pinctrl-ab8540.o
 obj-$(CONFIG_PINCTRL_AB9540)   += pinctrl-ab9540.o
 obj-$(CONFIG_PINCTRL_AB8505)   += pinctrl-ab8505.o
+obj-$(CONFIG_PINCTRL_ADI2) += pinctrl-adi2.o
 obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
 obj-$(CONFIG_PINCTRL_BCM2835)  += pinctrl-bcm2835.o
 obj-$(CONFIG_PINCTRL_IMX)  += pinctrl-imx.o
diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
new file mode 100644
index 000..b263cd7
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -0,0 +1,1545 @@
+/*
+ * Pinctrl Driver for ADI GPIO2 controller
+ *
+ * Copyright 2007-2013 Analog Devices Inc.
+ *
+ * Licensed under the GPLv2 or later
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "core.h"
+
+static LIST_HEAD(adi_pint_list);
+static LIST_HEAD(adi_pinctrl_list);
+
+#define PERIPHERAL_USAGE 1
+#define GPIO_USAGE 0
+
+#define DRIVER_NAME "pinctrl-adi2"
+
+#define RESOURCE_LABEL_SIZE16
+#define PINT_HI_OFFSET 16
+
+#define RSV_NONE   0
+#define RSV_GPIO   1
+#define RSV_INT2
+#define RSV_PERI   3
+
+/**
+ * struct gpio_reserve_map - a GPIO map structure containing the
+ * reservation status of each PIN.
+ *
+ * @owner: who request the reservation
+ * @rsv_gpio: if this pin is reserved as GPIO
+ * @rsv_int: if this pin is reserved as interrupt
+ * @rsv_peri: if this pin is reserved as part of a peripheral device
+ */
+struct gpio_reserve_map {
+   unsigned char owner[RESOURCE_LABEL_SIZE];
+   bool rsv_gpio;
+   bool rsv_int;
+   bool rsv_peri;
+};
+
+/**
+ * struct gpio_port_saved - GPIO port registers that should be saved between
+ * power suspend and resume operations.
+ *
+ * @fer: PORTx_FER register
+ * @data: PORTx_DATA register
+ * @dir: PORTx_DIR register
+ * @inen: PORTx_INEN register
+ * @mux: PORTx_MUX register
+ */
+struct gpio_port_saved {
+   u16 fer;
+   u16 data;
+   u16 dir;
+   u16 inen;
+   u32 mux;
+};
+
+/**
+ * struct gpio_pint - GPIO interrupt controller device. Multiple ADI GPIO
+ * banks can be mapped into one GPIO interrupt controller.
+ *
+ * @node: All gpio_pint instances are added to a global list.
+ * @base: GPIO PINT device register base address
+ * @irq: IRQ of the GPIO PINT device, it is the parent IRQ of all
+ *   GPIO IRQs mapping to this device.
+ * @domain: [0] irq domain of the gpio port, whose hardware interrupts are
+ * mapping to the low 16-bit of the pint registers.
+ *  [1] irq domain of the gpio port, whose hardware interrupts are
+ * mapping to the high 16-bit of the pint registers.
+ * @regs: address pointer to the GPIO PINT device
+ * @map_count: No more than 2 GPIO banks can be mapped to this PINT device.
+ * @lock: This lock make sure the irq_chip operations to one GPIO PINT device
+ *for different GPIO interrrupts are atomic.
+ * @pint_map_port: Set up the mapping between one GPIO PINT device and
+ * multiple GPIO banks.
+ */
+struct gpio_pint {
+   struct list_head node;
+   void __iomem *base;
+   int irq;
+   struct irq_domain *domain[2];
+   struct gpio_pint_regs *regs;
+   struct adi_pm_pint_save saved_data;
+   int map_count;
+   spinlock_t lock;
+
+   int (*pint_map_port)(struct gpio_p

[PATCH v3] pinctrl: pinmux: Don't free pins requested by other devices in pinmux_disable_setting.

2013-08-12 Thread Sonic Zhang
From: Sonic Zhang 

One peripheral may share part of its pins with the 2nd
peripheral and the other pins with the 3rd. If it requests all pins
when part of them has already be requested and owned by the 2nd
peripheral, this request fails and pinmux_disable_setting() is called.
The pinmux_disable_setting() frees all pins of the first peripheral
without checking if the pin is owned by itself or the 2nd, which
results in the malfunction of the 2nd peripheral driver.

Signed-off-by: Sonic Zhang 
---
 drivers/pinctrl/pinmux.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
index 88cc509..ab41552 100644
--- a/drivers/pinctrl/pinmux.c
+++ b/drivers/pinctrl/pinmux.c
@@ -480,15 +480,17 @@ void pinmux_disable_setting(struct pinctrl_setting const 
*setting)
dev_warn(pctldev->dev,
 "could not get pin desc for pin %d\n",
 pins[i]);
+   /* And release the pin */
+   pin_free(pctldev, pins[i], NULL);
continue;
}
-   desc->mux_setting = NULL;
+   if (desc->mux_setting == &(setting->data.mux)) {
+   desc->mux_setting = NULL;
+   /* And release the pin */
+   pin_free(pctldev, pins[i], NULL);
+   }
}
 
-   /* And release the pins */
-   for (i = 0; i < num_pins; i++)
-   pin_free(pctldev, pins[i], NULL);
-
if (ops->disable)
ops->disable(pctldev, setting->data.mux.func, 
setting->data.mux.group);
 }
-- 
1.8.2.3


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[PATCH v2] pinctrl: pinmux: Don't free pins requested by other devices in pinmux_disable_setting.

2013-08-12 Thread Sonic Zhang
From: Sonic Zhang 

One peripheral may share part of its pins with the 2nd
peripheral and the other pins with the 3rd. If it requests all pins
when part of them has already be requested and owned by the 2nd
peripheral, this request fails and pinmux_disable_setting() is called.
The pinmux_disable_setting() frees all pins of the first peripheral
without checking if the pin is owned by itself or the 2nd, which
results in the malfunction of the 2nd peripheral driver.

Signed-off-by: Sonic Zhang 
---
 drivers/pinctrl/core.h   |  1 +
 drivers/pinctrl/pinmux.c | 18 --
 2 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h
index 75476b3..a24e889 100644
--- a/drivers/pinctrl/core.h
+++ b/drivers/pinctrl/core.h
@@ -154,6 +154,7 @@ struct pin_desc {
const char *mux_owner;
const struct pinctrl_setting_mux *mux_setting;
const char *gpio_owner;
+   const struct pinctrl_setting *owning_setting
 #endif
 };
 
diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
index 88cc509..c32a77b 100644
--- a/drivers/pinctrl/pinmux.c
+++ b/drivers/pinctrl/pinmux.c
@@ -428,6 +428,7 @@ int pinmux_enable_setting(struct pinctrl_setting const 
*setting)
continue;
}
desc->mux_setting = &(setting->data.mux);
+   desc->owning_setting = setting;
}
 
ret = ops->enable(pctldev, setting->data.mux.func,
@@ -441,8 +442,10 @@ int pinmux_enable_setting(struct pinctrl_setting const 
*setting)
 err_enable:
for (i = 0; i < num_pins; i++) {
desc = pin_desc_get(pctldev, pins[i]);
-   if (desc)
+   if (desc) {
desc->mux_setting = NULL;
+   desc->owning_setting = NULL;
+   }
}
 err_pin_request:
/* On error release all taken pins */
@@ -480,15 +483,18 @@ void pinmux_disable_setting(struct pinctrl_setting const 
*setting)
dev_warn(pctldev->dev,
 "could not get pin desc for pin %d\n",
 pins[i]);
+   /* And release the pin */
+   pin_free(pctldev, pins[i], NULL);
continue;
}
-   desc->mux_setting = NULL;
+   if (desc->owning_setting == setting) {
+   desc->mux_setting = NULL;
+   desc->owning_setting = NULL;
+   /* And release the pin */
+   pin_free(pctldev, pins[i], NULL);
+   }
}
 
-   /* And release the pins */
-   for (i = 0; i < num_pins; i++)
-   pin_free(pctldev, pins[i], NULL);
-
if (ops->disable)
ops->disable(pctldev, setting->data.mux.func, 
setting->data.mux.group);
 }
-- 
1.8.2.3


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[PATCH v2] pinctrl: pinmux: Don't free pins requested by other devices in pinmux_disable_setting.

2013-08-12 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

One peripheral may share part of its pins with the 2nd
peripheral and the other pins with the 3rd. If it requests all pins
when part of them has already be requested and owned by the 2nd
peripheral, this request fails and pinmux_disable_setting() is called.
The pinmux_disable_setting() frees all pins of the first peripheral
without checking if the pin is owned by itself or the 2nd, which
results in the malfunction of the 2nd peripheral driver.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 drivers/pinctrl/core.h   |  1 +
 drivers/pinctrl/pinmux.c | 18 --
 2 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h
index 75476b3..a24e889 100644
--- a/drivers/pinctrl/core.h
+++ b/drivers/pinctrl/core.h
@@ -154,6 +154,7 @@ struct pin_desc {
const char *mux_owner;
const struct pinctrl_setting_mux *mux_setting;
const char *gpio_owner;
+   const struct pinctrl_setting *owning_setting
 #endif
 };
 
diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
index 88cc509..c32a77b 100644
--- a/drivers/pinctrl/pinmux.c
+++ b/drivers/pinctrl/pinmux.c
@@ -428,6 +428,7 @@ int pinmux_enable_setting(struct pinctrl_setting const 
*setting)
continue;
}
desc-mux_setting = (setting-data.mux);
+   desc-owning_setting = setting;
}
 
ret = ops-enable(pctldev, setting-data.mux.func,
@@ -441,8 +442,10 @@ int pinmux_enable_setting(struct pinctrl_setting const 
*setting)
 err_enable:
for (i = 0; i  num_pins; i++) {
desc = pin_desc_get(pctldev, pins[i]);
-   if (desc)
+   if (desc) {
desc-mux_setting = NULL;
+   desc-owning_setting = NULL;
+   }
}
 err_pin_request:
/* On error release all taken pins */
@@ -480,15 +483,18 @@ void pinmux_disable_setting(struct pinctrl_setting const 
*setting)
dev_warn(pctldev-dev,
 could not get pin desc for pin %d\n,
 pins[i]);
+   /* And release the pin */
+   pin_free(pctldev, pins[i], NULL);
continue;
}
-   desc-mux_setting = NULL;
+   if (desc-owning_setting == setting) {
+   desc-mux_setting = NULL;
+   desc-owning_setting = NULL;
+   /* And release the pin */
+   pin_free(pctldev, pins[i], NULL);
+   }
}
 
-   /* And release the pins */
-   for (i = 0; i  num_pins; i++)
-   pin_free(pctldev, pins[i], NULL);
-
if (ops-disable)
ops-disable(pctldev, setting-data.mux.func, 
setting-data.mux.group);
 }
-- 
1.8.2.3


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[PATCH v3] pinctrl: pinmux: Don't free pins requested by other devices in pinmux_disable_setting.

2013-08-12 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

One peripheral may share part of its pins with the 2nd
peripheral and the other pins with the 3rd. If it requests all pins
when part of them has already be requested and owned by the 2nd
peripheral, this request fails and pinmux_disable_setting() is called.
The pinmux_disable_setting() frees all pins of the first peripheral
without checking if the pin is owned by itself or the 2nd, which
results in the malfunction of the 2nd peripheral driver.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 drivers/pinctrl/pinmux.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
index 88cc509..ab41552 100644
--- a/drivers/pinctrl/pinmux.c
+++ b/drivers/pinctrl/pinmux.c
@@ -480,15 +480,17 @@ void pinmux_disable_setting(struct pinctrl_setting const 
*setting)
dev_warn(pctldev-dev,
 could not get pin desc for pin %d\n,
 pins[i]);
+   /* And release the pin */
+   pin_free(pctldev, pins[i], NULL);
continue;
}
-   desc-mux_setting = NULL;
+   if (desc-mux_setting == (setting-data.mux)) {
+   desc-mux_setting = NULL;
+   /* And release the pin */
+   pin_free(pctldev, pins[i], NULL);
+   }
}
 
-   /* And release the pins */
-   for (i = 0; i  num_pins; i++)
-   pin_free(pctldev, pins[i], NULL);
-
if (ops-disable)
ops-disable(pctldev, setting-data.mux.func, 
setting-data.mux.group);
 }
-- 
1.8.2.3


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[PATCH 1/3 v2] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-08-12 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

The new ADI GPIO2 controller was introduced since the BF548 and BF60x
processors. It differs a lot from the old one on BF5xx processors. So,
create a pinctrl driver under pinctrl framework.

- Define gpio ports and gpio interrupt controllers as individual platform
devices.
- Register a pinctrl driver for the whole GPIO ports and GPIO interrupt
devices.
- Probe pint devices before port devices. Put device instances into
respective gpio and pint lists.
- Define peripheral, irq and gpio reservation bit masks for each gpio
port as runtime resources.
- Save and restore gpio port and pint status MMRs in syscore PM functions.
- Add peripheral device groups and function data into machine portmux.h.
- Handle peripheral and gpio requests in pinctrl operation functions.
- Demux gpio IRQs via the irq_domain created by each GPIO port.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com

---
v2-changes:
- Remove unlinke() directive.
---
 drivers/pinctrl/Makefile   |1 +
 drivers/pinctrl/pinctrl-adi2.c | 1545 
 include/linux/platform_data/pinctrl-adi2.h |   38 +
 3 files changed, 1584 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-adi2.c
 create mode 100644 include/linux/platform_data/pinctrl-adi2.h

diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 9bdaeb8..7894c61 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_PINCTRL_AB8500)  += pinctrl-ab8500.o
 obj-$(CONFIG_PINCTRL_AB8540)   += pinctrl-ab8540.o
 obj-$(CONFIG_PINCTRL_AB9540)   += pinctrl-ab9540.o
 obj-$(CONFIG_PINCTRL_AB8505)   += pinctrl-ab8505.o
+obj-$(CONFIG_PINCTRL_ADI2) += pinctrl-adi2.o
 obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
 obj-$(CONFIG_PINCTRL_BCM2835)  += pinctrl-bcm2835.o
 obj-$(CONFIG_PINCTRL_IMX)  += pinctrl-imx.o
diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
new file mode 100644
index 000..b263cd7
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -0,0 +1,1545 @@
+/*
+ * Pinctrl Driver for ADI GPIO2 controller
+ *
+ * Copyright 2007-2013 Analog Devices Inc.
+ *
+ * Licensed under the GPLv2 or later
+ */
+
+#include linux/delay.h
+#include linux/module.h
+#include linux/err.h
+#include linux/proc_fs.h
+#include linux/seq_file.h
+#include linux/irq.h
+#include linux/platform_data/pinctrl-adi2.h
+#include linux/irqdomain.h
+#include linux/irqchip/chained_irq.h
+#include linux/pinctrl/pinctrl.h
+#include linux/pinctrl/pinmux.h
+#include linux/pinctrl/consumer.h
+#include linux/pinctrl/machine.h
+#include linux/syscore_ops.h
+#include linux/gpio.h
+#include asm/portmux.h
+#include core.h
+
+static LIST_HEAD(adi_pint_list);
+static LIST_HEAD(adi_pinctrl_list);
+
+#define PERIPHERAL_USAGE 1
+#define GPIO_USAGE 0
+
+#define DRIVER_NAME pinctrl-adi2
+
+#define RESOURCE_LABEL_SIZE16
+#define PINT_HI_OFFSET 16
+
+#define RSV_NONE   0
+#define RSV_GPIO   1
+#define RSV_INT2
+#define RSV_PERI   3
+
+/**
+ * struct gpio_reserve_map - a GPIO map structure containing the
+ * reservation status of each PIN.
+ *
+ * @owner: who request the reservation
+ * @rsv_gpio: if this pin is reserved as GPIO
+ * @rsv_int: if this pin is reserved as interrupt
+ * @rsv_peri: if this pin is reserved as part of a peripheral device
+ */
+struct gpio_reserve_map {
+   unsigned char owner[RESOURCE_LABEL_SIZE];
+   bool rsv_gpio;
+   bool rsv_int;
+   bool rsv_peri;
+};
+
+/**
+ * struct gpio_port_saved - GPIO port registers that should be saved between
+ * power suspend and resume operations.
+ *
+ * @fer: PORTx_FER register
+ * @data: PORTx_DATA register
+ * @dir: PORTx_DIR register
+ * @inen: PORTx_INEN register
+ * @mux: PORTx_MUX register
+ */
+struct gpio_port_saved {
+   u16 fer;
+   u16 data;
+   u16 dir;
+   u16 inen;
+   u32 mux;
+};
+
+/**
+ * struct gpio_pint - GPIO interrupt controller device. Multiple ADI GPIO
+ * banks can be mapped into one GPIO interrupt controller.
+ *
+ * @node: All gpio_pint instances are added to a global list.
+ * @base: GPIO PINT device register base address
+ * @irq: IRQ of the GPIO PINT device, it is the parent IRQ of all
+ *   GPIO IRQs mapping to this device.
+ * @domain: [0] irq domain of the gpio port, whose hardware interrupts are
+ * mapping to the low 16-bit of the pint registers.
+ *  [1] irq domain of the gpio port, whose hardware interrupts are
+ * mapping to the high 16-bit of the pint registers.
+ * @regs: address pointer to the GPIO PINT device
+ * @map_count: No more than 2 GPIO banks can be mapped to this PINT device.
+ * @lock: This lock make sure the irq_chip operations to one GPIO PINT device
+ *for different GPIO interrrupts are atomic.
+ * @pint_map_port: Set up the mapping between one GPIO PINT device and
+ * multiple GPIO banks.
+ */
+struct gpio_pint

[PATCH 2/3 v2] blackfin: gpio: Remove none gpio lib code.

2013-08-12 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

- Remove non gpio lib code from blackfin architecture.
- Limit the lagecy blackfin gpio driver to bf5xx processors only.
- Remove unused definition of the pint power functions.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 arch/blackfin/Kconfig|   7 ++
 arch/blackfin/include/asm/gpio.h | 157 +--
 arch/blackfin/kernel/Makefile|   3 +-
 3 files changed, 29 insertions(+), 138 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index a117652..9eff25b 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -52,6 +52,9 @@ config GENERIC_BUG
 config ZONE_DMA
def_bool y
 
+config GENERIC_GPIO
+   def_bool y
+
 config FORCE_MAX_ZONEORDER
int
default 14
@@ -317,6 +320,10 @@ config BF53x
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
default y
 
+config GPIO_ADI
+   def_bool y
+   depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 98d0133..99d338c 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -25,8 +25,12 @@
 
 #ifndef __ASSEMBLY__
 
+#ifndef CONFIG_PINCTRL
+
 #include linux/compiler.h
-#include linux/gpio.h
+#include asm/blackfin.h
+#include asm/portmux.h
+#include asm/irq_handler.h
 
 /***
 *
@@ -45,7 +49,6 @@
 * MODIFICATION HISTORY :
 **/
 
-#if !BFIN_GPIO_PINT
 void set_gpio_dir(unsigned, unsigned short);
 void set_gpio_inen(unsigned, unsigned short);
 void set_gpio_polar(unsigned, unsigned short);
@@ -115,7 +118,6 @@ struct gpio_port_t {
unsigned short dummy16;
unsigned short inen;
 };
-#endif
 
 #ifdef BFIN_SPECIAL_GPIO_BANKS
 void bfin_special_gpio_free(unsigned gpio);
@@ -127,25 +129,21 @@ void bfin_special_gpio_pm_hibernate_suspend(void);
 #endif
 
 #ifdef CONFIG_PM
-int bfin_pm_standby_ctrl(unsigned ctrl);
+void bfin_gpio_pm_hibernate_restore(void);
+void bfin_gpio_pm_hibernate_suspend(void);
+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
+int bfin_gpio_pm_standby_ctrl(unsigned ctrl);
 
 static inline int bfin_pm_standby_setup(void)
 {
-   return bfin_pm_standby_ctrl(1);
+   return bfin_gpio_pm_standby_ctrl(1);
 }
 
 static inline void bfin_pm_standby_restore(void)
 {
-   bfin_pm_standby_ctrl(0);
+   bfin_gpio_pm_standby_ctrl(0);
 }
 
-void bfin_gpio_pm_hibernate_restore(void);
-void bfin_gpio_pm_hibernate_suspend(void);
-void bfin_pint_suspend(void);
-void bfin_pint_resume(void);
-
-# if !BFIN_GPIO_PINT
-int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
 
 struct gpio_port_s {
unsigned short data;
@@ -161,7 +159,6 @@ struct gpio_port_s {
unsigned short reserved;
unsigned short mux;
 };
-# endif
 #endif /*CONFIG_PM*/
 
 /***
@@ -178,36 +175,29 @@ struct gpio_port_s {
 *
 * MODIFICATION HISTORY :
 **/
-
-int bfin_gpio_request(unsigned gpio, const char *label);
-void bfin_gpio_free(unsigned gpio);
 int bfin_gpio_irq_request(unsigned gpio, const char *label);
 void bfin_gpio_irq_free(unsigned gpio);
-int bfin_gpio_direction_input(unsigned gpio);
-int bfin_gpio_direction_output(unsigned gpio, int value);
-int bfin_gpio_get_value(unsigned gpio);
-void bfin_gpio_set_value(unsigned gpio, int value);
+void bfin_gpio_irq_prepare(unsigned gpio);
+
+static inline int irq_to_gpio(unsigned irq)
+{
+   return irq - GPIO_IRQ_BASE;
+}
+#endif /* CONFIG_PINCTRL */
 
 #include asm/irq.h
 #include asm/errno.h
 
-#ifdef CONFIG_GPIOLIB
 #include asm-generic/gpio.h  /* cansleep wrappers */
 
 static inline int gpio_get_value(unsigned int gpio)
 {
-   if (gpio  MAX_BLACKFIN_GPIOS)
-   return bfin_gpio_get_value(gpio);
-   else
-   return __gpio_get_value(gpio);
+   return __gpio_get_value(gpio);
 }
 
 static inline void gpio_set_value(unsigned int gpio, int value)
 {
-   if (gpio  MAX_BLACKFIN_GPIOS)
-   bfin_gpio_set_value(gpio, value);
-   else
-   __gpio_set_value(gpio, value);
+   __gpio_set_value(gpio, value);
 }
 
 static inline int gpio_cansleep(unsigned int gpio)
@@ -219,113 +209,6 @@ static inline int gpio_to_irq(unsigned gpio)
 {
return __gpio_to_irq(gpio);
 }
-
-#else /* !CONFIG_GPIOLIB */
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-   return bfin_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-   return bfin_gpio_free(gpio);
-}
-
-static inline int gpio_direction_input(unsigned

[PATCH 3/3 v2] blackfin: pinctrl-adi2: Add pin control device groups and function data.

2013-08-12 Thread Sonic Zhang
From: Sonic Zhang sonic.zh...@analog.com

Select PINCTRL_ADI2 for bf54x and bf60x by default.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
 arch/blackfin/Kconfig   |   7 +
 arch/blackfin/include/asm/portmux.h |  14 +-
 arch/blackfin/mach-bf548/include/mach/portmux.h | 595 +++-
 arch/blackfin/mach-bf609/include/mach/portmux.h | 477 ++-
 4 files changed, 1087 insertions(+), 6 deletions(-)

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 9eff25b..ba891c2 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -324,6 +324,13 @@ config GPIO_ADI
def_bool y
depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
 
+config PINCTRL_ADI2
+   def_bool y
+   depends on (BF54x || BF60x)
+   select PINCTRL
+   select PINMUX
+   select IRQ_DOMAIN
+
 config MEM_MT48LC64M4A2FB_7E
bool
depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/portmux.h 
b/arch/blackfin/include/asm/portmux.h
index 9b1e2c3..6b3e71c 100644
--- a/arch/blackfin/include/asm/portmux.h
+++ b/arch/blackfin/include/asm/portmux.h
@@ -17,14 +17,24 @@
 #define P_MAYSHARE 0x2000
 #define P_DONTCARE 0x1000
 
-
+#ifdef CONFIG_PINCTRL
+#define peripheral_request(per, label) 0
+#define peripheral_free(per)
+#define peripheral_request_list(per, label) \
+   (pdev ? (IS_ERR(devm_pinctrl_get_select_default(pdev-dev)) \
+   ? -EINVAL : 0) : 0);
+#define peripheral_free_list(per)
+#else
 int peripheral_request(unsigned short per, const char *label);
 void peripheral_free(unsigned short per);
 int peripheral_request_list(const unsigned short per[], const char *label);
 void peripheral_free_list(const unsigned short per[]);
+#endif
 
-#include asm/gpio.h
+#include linux/err.h
+#include linux/pinctrl/pinctrl.h
 #include mach/portmux.h
+#include linux/gpio.h
 
 #ifndef P_SPORT2_TFS
 #define P_SPORT2_TFS P_UNDEF
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h 
b/arch/blackfin/mach-bf548/include/mach/portmux.h
index e222462..9fab923 100644
--- a/arch/blackfin/mach-bf548/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf548/include/mach/portmux.h
@@ -7,8 +7,6 @@
 #ifndef _MACH_PORTMUX_H_
 #define _MACH_PORTMUX_H_
 
-#define MAX_RESOURCES  MAX_BLACKFIN_GPIOS
-
 #define P_SPORT2_TFS   (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
 #define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
 #define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
@@ -317,4 +315,597 @@
 #define P_NAND_CLE (P_DONTCARE)
 #define P_NAND_ALE (P_DONTCARE)
 
+#ifdef CONFIG_PINCTRL
+
+#include mach/gpio.h
+#include asm/blackfin.h
+#include asm/irq_handler.h
+
+#define gpio_pint_regs bfin_pint_regs
+#define adi_internal_set_wake bfin_internal_set_wake
+
+static const struct pinctrl_pin_desc adi_pads[] = {
+   PINCTRL_PIN(0, PA0),
+   PINCTRL_PIN(1, PA1),
+   PINCTRL_PIN(2, PA2),
+   PINCTRL_PIN(3, PG3),
+   PINCTRL_PIN(4, PA4),
+   PINCTRL_PIN(5, PA5),
+   PINCTRL_PIN(6, PA6),
+   PINCTRL_PIN(7, PA7),
+   PINCTRL_PIN(8, PA8),
+   PINCTRL_PIN(9, PA9),
+   PINCTRL_PIN(10, PA10),
+   PINCTRL_PIN(11, PA11),
+   PINCTRL_PIN(12, PA12),
+   PINCTRL_PIN(13, PA13),
+   PINCTRL_PIN(14, PA14),
+   PINCTRL_PIN(15, PA15),
+   PINCTRL_PIN(16, PB0),
+   PINCTRL_PIN(17, PB1),
+   PINCTRL_PIN(18, PB2),
+   PINCTRL_PIN(19, PB3),
+   PINCTRL_PIN(20, PB4),
+   PINCTRL_PIN(21, PB5),
+   PINCTRL_PIN(22, PB6),
+   PINCTRL_PIN(23, PB7),
+   PINCTRL_PIN(24, PB8),
+   PINCTRL_PIN(25, PB9),
+   PINCTRL_PIN(26, PB10),
+   PINCTRL_PIN(27, PB11),
+   PINCTRL_PIN(28, PB12),
+   PINCTRL_PIN(29, PB13),
+   PINCTRL_PIN(30, PB14),
+   PINCTRL_PIN(32, PC0),
+   PINCTRL_PIN(33, PC1),
+   PINCTRL_PIN(34, PC2),
+   PINCTRL_PIN(35, PC3),
+   PINCTRL_PIN(36, PC4),
+   PINCTRL_PIN(37, PC5),
+   PINCTRL_PIN(38, PC6),
+   PINCTRL_PIN(39, PC7),
+   PINCTRL_PIN(40, PC8),
+   PINCTRL_PIN(41, PC9),
+   PINCTRL_PIN(42, PC10),
+   PINCTRL_PIN(43, PC11),
+   PINCTRL_PIN(44, PC12),
+   PINCTRL_PIN(45, PC13),
+   PINCTRL_PIN(48, PD0),
+   PINCTRL_PIN(49, PD1),
+   PINCTRL_PIN(50, PD2),
+   PINCTRL_PIN(51, PD3),
+   PINCTRL_PIN(52, PD4),
+   PINCTRL_PIN(53, PD5),
+   PINCTRL_PIN(54, PD6),
+   PINCTRL_PIN(55, PD7),
+   PINCTRL_PIN(56, PD8),
+   PINCTRL_PIN(57, PD9),
+   PINCTRL_PIN(58, PD10),
+   PINCTRL_PIN(59, PD11),
+   PINCTRL_PIN(60, PD12),
+   PINCTRL_PIN(61, PD13),
+   PINCTRL_PIN(62, PD14),
+   PINCTRL_PIN(63, PD15),
+   PINCTRL_PIN(64, PE0),
+   PINCTRL_PIN(65, PE1),
+   PINCTRL_PIN(66, PE2),
+   PINCTRL_PIN(67, PE3),
+   PINCTRL_PIN(68, PE4),
+   PINCTRL_PIN(69, PE5),
+   PINCTRL_PIN(70, PE6),
+   PINCTRL_PIN(71, PE7),
+   PINCTRL_PIN(72

Re: [PATCH] pinctrl: pinmux: Don't free pins requested by other devices

2013-08-07 Thread Sonic Zhang
Hi Linus,

On Thu, Aug 8, 2013 at 12:23 AM, Linus Walleij  wrote:
> On Wed, Jul 17, 2013 at 7:31 AM, Sonic Zhang  wrote:
>
> I'd like Stephen and Axel to have a look at this as well...
>
>> From: Sonic Zhang 
>>
>> in pinmux_disable_setting after current device fails to request
>> the same pins.
>>
>> Signed-off-by: Sonic Zhang 
>
> I don't quite understand the patch. Can you provide more context?
>
>> diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
>> index 88cc509..9ebcf3b 100644
>> --- a/drivers/pinctrl/pinmux.c
>> +++ b/drivers/pinctrl/pinmux.c
>> @@ -482,13 +482,14 @@ void pinmux_disable_setting(struct pinctrl_setting 
>> const *setting)
>>  pins[i]);
>> continue;
>> }
>> +   /* And release the pins */
>> +   if (desc->mux_usecount &&
>> +   !strcmp(desc->mux_owner, setting->dev_name))
>> +   pin_free(pctldev, pins[i], NULL);
>> +
>> desc->mux_setting = NULL;
>> }
>>
>> -   /* And release the pins */
>> -   for (i = 0; i < num_pins; i++)
>> -   pin_free(pctldev, pins[i], NULL);
>> -
>
> For pinmux_disable_setting() to inspect desc->mux_usecount seems
> assymetric. This is something pin_free() should do, shouldn't it?
>
> Should not this codepath be kept and a change made inside pin_free()
> for the check above instead?
>

You can't move this codepath into pin_free(), because the pointer to
structure pinctrl_setting is not passed through pin_free(). But yes,
checking desc->mux_usecount is not necessary here, because pin_free()
has already handled that.

I will remove desc->mux_usecount checking in next patch.

Regards,

Sonic
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Re: [PATCH] pinctrl: pinmux: Don't free pins requested by other devices

2013-08-07 Thread Sonic Zhang
Hi Stephen,

On Thu, Aug 8, 2013 at 1:09 AM, Stephen Warren  wrote:
> On 08/07/2013 10:23 AM, Linus Walleij wrote:
>> On Wed, Jul 17, 2013 at 7:31 AM, Sonic Zhang  wrote:
>>
>> I'd like Stephen and Axel to have a look at this as well...
>>
>>> From: Sonic Zhang 
>>>
>>> in pinmux_disable_setting after current device fails to request
>>> the same pins.
>>>
>>> Signed-off-by: Sonic Zhang 
>>
>> I don't quite understand the patch. Can you provide more context?
>
> Yes, the commit description needs to describe the problem this solves.
>
> I'm *guessing* the issue is:
>
> Something tries to enable a new mux setting on some pins. One of those
> pins is already owned by something else. So, applying the current
> setting fails. So, pinctrl core attempts to unapply the partially
> applied setting. This ends up incorrectly over-writing the conflicting
> ownership of the pins with NULL, and hence forgetting about it.
>
> I think a better change would be something more along the lines of:
>
>   for (i = 0; i < num_pins; i++)
> +   if (this_device_owns_pin(pins[i])
> pin_free(pctldev, pins[i], NULL);
>
> ?
>
> Where this_device_owns_pin() might be someting like:
>
> desc->owning_setting == setting
>
> (which would be a new field that needed to be assigned during
> pinmux_enable_setting).
>
> Or perhaps the strcmp() is fine.
>

You are right. One peripheral may share part of its pins with the 2nd
peripheral and the other pins with the 3rd. If it requests all pins
when part of them has already be requested and owned by the 2nd
peripheral, this request fails and pinmux_disable_setting() is called.
The pinmux_disable_setting() frees all pins of the first peripheral
without checking if the pin is owned by itself or the 2nd, which
results in the malfunction of the 2nd peripheral driver.

I am fine to compare owner's pinctrl_setting structure other than name string.

Regards,

Sonic
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