RE: [PATCH v2] tty: serial: fsl_lpuart.c: prevent a bad shift operation
> -Original Message-
> From: Greg Kroah-Hartman
> Sent: Wednesday, July 29, 2020 9:34 PM
> To: B K Karthik
> Cc: Jiri Slaby ; linux-ser...@vger.kernel.org; linux-
> ker...@vger.kernel.org; Vabhav Sharma (OSS)
> ; bhuvanchandra...@toradex.com
> Subject: Re: [PATCH v2] tty: serial: fsl_lpuart.c: prevent a bad shift
> operation
>
> On Tue, Jul 21, 2020 at 11:12:29PM +0530, B K Karthik wrote:
> > prevent a bad shift operation by verifying that the argument to fls is
> > non zero.
> >
> > Reported-by: "Vabhav Sharma (OSS)"
> > Signed-off-by: B K Karthik
> > ---
> > v1 -> v2:
> > added Reported-by tag
> >
> > drivers/tty/serial/fsl_lpuart.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/tty/serial/fsl_lpuart.c
> > b/drivers/tty/serial/fsl_lpuart.c index 7ca642249224..0cc64279cd2d
> > 100644
> > --- a/drivers/tty/serial/fsl_lpuart.c
> > +++ b/drivers/tty/serial/fsl_lpuart.c
> > @@ -1168,7 +1168,8 @@ static inline int lpuart_start_rx_dma(struct
> lpuart_port *sport)
> > * 10ms at any baud rate.
> > */
> > sport->rx_dma_rng_buf_len = (DMA_RX_TIMEOUT * baud / bits /
> 1000) * 2;
> > - sport->rx_dma_rng_buf_len = (1 << (fls(sport->rx_dma_rng_buf_len)
> - 1));
> > + if (sport->rx_dma_rng_buf_len != 0)
>
> How can this variable become 0?
Condition x, taking false branch
Explicitly returning zero
static __always_inline int fls(unsigned int x)
{
return x ? sizeof(x) * 8 - __builtin_clz(x) : 0;
}
>
> thanks,
>
> greg k-h
[PATCH] arm64: dts: ls1028a: qds: enable lpuart1
From: Vabhav Sharma
LPUART nodes by default are disabled in LS1028A device
tree, Enabling LPUART1 node
Acked-by: Fugang Duan
Signed-off-by: Vabhav Sharma
---
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
index dd69c5b..045f748 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
@@ -228,6 +228,10 @@
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
--
2.7.4
[PATCH v2] tty: serial: fsl_lpuart: minimum baud rate support
From: Vabhav Sharma
The formula for the baud rate is
baud rate = "baud clock / ((OSR+1) × SBR)
Algorithm used in function lpuart32_serial_setbrg() only changes
the SBR. Even with maxmum value put in, OSR stays at 0x7 and the
lowest baud rate would be ~ 2600 bps
Update the algorithm to allow driver operation at 1200,2400 or 600 bps
Signed-off-by: Vabhav Sharma
---
V2:
- Incorporated review comment from Greg
---
drivers/tty/serial/fsl_lpuart.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index 90298c4..7ca6422 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -1925,6 +1925,9 @@ static void __lpuart32_serial_setbrg(struct uart_port
*port,
tmp_sbr++;
}
+ if (tmp_sbr > UARTBAUD_SBR_MASK)
+ continue;
+
if (tmp_diff <= baud_diff) {
baud_diff = tmp_diff;
osr = tmp_osr;
--
2.7.4
RE: [PATCH] tty: serial: fsl_lpuart: minimum baud rate support
> -Original Message-
> From: Greg KH
> Sent: Thursday, June 25, 2020 4:23 PM
> To: Vabhav Sharma (OSS)
> Cc: jsl...@suse.com; linux-ser...@vger.kernel.org; linux-
> ker...@vger.kernel.org; Varun Sethi
> Subject: Re: [PATCH] tty: serial: fsl_lpuart: minimum baud rate support
>
> On Thu, Jun 25, 2020 at 10:12:54AM +, Vabhav Sharma (OSS) wrote:
> >
> >
> > > -Original Message-
> > > From: Greg KH
> > > Sent: Thursday, June 25, 2020 3:34 PM
> > > To: Vabhav Sharma (OSS)
> > > Cc: jsl...@suse.com; linux-ser...@vger.kernel.org; linux-
> > > ker...@vger.kernel.org; Varun Sethi ; Vabhav
> Sharma
> > >
> > > Subject: Re: [PATCH] tty: serial: fsl_lpuart: minimum baud rate
> > > support
> > >
> > > On Thu, Jun 25, 2020 at 03:19:05PM +0530, Vabhav Sharma wrote:
> > > > From: Vabhav Sharma
> > > >
> > > > The formula for the baud rate is
> > > > baud rate = "baud clock / ((OSR+1) × SBR)
> > > >
> > > > Algorithm used in function lpuart32_serial_setbrg() only changes
> > > > the SBR. Even with maxmum value put in, OSR stays at 0x7 and the
> > > > lowest baud rate would be ~ 2600 bps
> > > >
> > > > Update the algorithm to allow driver operation at 1200,2400 or
> > > > 600 bps
> > > >
> > > > Signed-off-by: Vabhav Sharma
> > > > ---
> > > > drivers/tty/serial/fsl_lpuart.c | 4
> > > > 1 file changed, 4 insertions(+)
> > > >
> > > > diff --git a/drivers/tty/serial/fsl_lpuart.c
> > > > b/drivers/tty/serial/fsl_lpuart.c index 90298c4..0fd0fa5f 100644
> > > > --- a/drivers/tty/serial/fsl_lpuart.c
> > > > +++ b/drivers/tty/serial/fsl_lpuart.c
> > > > @@ -1925,6 +1925,10 @@ static void __lpuart32_serial_setbrg(struct
> > > uart_port *port,
> > > > tmp_sbr++;
> > > > }
> > > >
> > > > + if (tmp_sbr > UARTBAUD_SBR_MASK) {
> > > > + continue;
> > > > + }
> > >
> > > Always use scripts/checkpatch.pl on your patches so you do not get
> > > grumpy emails from maintainers telling you to use
> > > scripts/checkpatch.pl on your patches...
> > Indeed, I run the script before sending patch ./scripts/checkpatch.pl
> > 0001-tty-serial-fsl_lpuart-minimum-baud-rate-support.patch
> > total: 0 errors, 0 warnings, 10 lines checked
> >
> > 0001-tty-serial-fsl_lpuart-minimum-baud-rate-support.patch has no
> obvious style problems and is ready for submission.
>
> Ok, then something is wrong as there is obviously a coding style issue with
> your submission, as you can see with a manual review of it, right?
>
> greg k-h
I see, Unnecessary usage of brace for single statement.
Thank you
RE: [PATCH] tty: serial: fsl_lpuart: minimum baud rate support
> -Original Message-
> From: Greg KH
> Sent: Thursday, June 25, 2020 3:34 PM
> To: Vabhav Sharma (OSS)
> Cc: jsl...@suse.com; linux-ser...@vger.kernel.org; linux-
> ker...@vger.kernel.org; Varun Sethi ; Vabhav Sharma
>
> Subject: Re: [PATCH] tty: serial: fsl_lpuart: minimum baud rate support
>
> On Thu, Jun 25, 2020 at 03:19:05PM +0530, Vabhav Sharma wrote:
> > From: Vabhav Sharma
> >
> > The formula for the baud rate is
> > baud rate = "baud clock / ((OSR+1) × SBR)
> >
> > Algorithm used in function lpuart32_serial_setbrg() only changes the
> > SBR. Even with maxmum value put in, OSR stays at 0x7 and the lowest
> > baud rate would be ~ 2600 bps
> >
> > Update the algorithm to allow driver operation at 1200,2400 or
> > 600 bps
> >
> > Signed-off-by: Vabhav Sharma
> > ---
> > drivers/tty/serial/fsl_lpuart.c | 4
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/tty/serial/fsl_lpuart.c
> > b/drivers/tty/serial/fsl_lpuart.c index 90298c4..0fd0fa5f 100644
> > --- a/drivers/tty/serial/fsl_lpuart.c
> > +++ b/drivers/tty/serial/fsl_lpuart.c
> > @@ -1925,6 +1925,10 @@ static void __lpuart32_serial_setbrg(struct
> uart_port *port,
> > tmp_sbr++;
> > }
> >
> > + if (tmp_sbr > UARTBAUD_SBR_MASK) {
> > + continue;
> > + }
>
> Always use scripts/checkpatch.pl on your patches so you do not get grumpy
> emails from maintainers telling you to use scripts/checkpatch.pl on your
> patches...
Indeed, I run the script before sending patch
./scripts/checkpatch.pl
0001-tty-serial-fsl_lpuart-minimum-baud-rate-support.patch
total: 0 errors, 0 warnings, 10 lines checked
0001-tty-serial-fsl_lpuart-minimum-baud-rate-support.patch has no obvious style
problems and is ready for submission.
[PATCH] tty: serial: fsl_lpuart: minimum baud rate support
From: Vabhav Sharma
The formula for the baud rate is
baud rate = "baud clock / ((OSR+1) × SBR)
Algorithm used in function lpuart32_serial_setbrg() only changes
the SBR. Even with maxmum value put in, OSR stays at 0x7 and the
lowest baud rate would be ~ 2600 bps
Update the algorithm to allow driver operation at 1200,2400 or
600 bps
Signed-off-by: Vabhav Sharma
---
drivers/tty/serial/fsl_lpuart.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index 90298c4..0fd0fa5f 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -1925,6 +1925,10 @@ static void __lpuart32_serial_setbrg(struct uart_port
*port,
tmp_sbr++;
}
+ if (tmp_sbr > UARTBAUD_SBR_MASK) {
+ continue;
+ }
+
if (tmp_diff <= baud_diff) {
baud_diff = tmp_diff;
osr = tmp_osr;
--
2.7.4
RE: [PATCH v4] clk: qoriq: add support for lx2160a
> -Original Message-
> From: Vabhav Sharma
> Sent: Tuesday, May 21, 2019 11:14 AM
> To: linux-kernel@vger.kernel.org; linux-...@vger.kernel.org;
> sb...@kernel.org
> Cc: mturque...@baylibre.com; Andy Tang ; Yogesh
> Narayan Gaur
> Subject: RE: [PATCH v4] clk: qoriq: add support for lx2160a
>
> Hello Stephen,
> I have incorporated review comments from
> https://patchwork.kernel.org/patch/10917171/
Hello Maintainers,
All the comments are addressed, Can you please take the patch?
Please see this is essential for new hardware support.
Regards,
Vabhav
>
> A gentle reminder to apply the patch
> https://patchwork.kernel.org/patch/10918407/.
>
> Regards,
> Vabhav
>
> > -Original Message-
> > From: Vabhav Sharma
> > Sent: Friday, April 26, 2019 12:24 PM
> > To: linux-kernel@vger.kernel.org; linux-...@vger.kernel.org
> > Cc: sb...@kernel.org; mturque...@baylibre.com; Vabhav Sharma
> > ; Andy Tang ; Yogesh
> Narayan
> > Gaur
> > Subject: [PATCH v4] clk: qoriq: add support for lx2160a
> >
> > Add clockgen support and configuration for NXP SoC lx2160a with
> > compatible property as "fsl,lx2160a-clockgen".
> >
> > Signed-off-by: Tang Yuantian
> > Signed-off-by: Yogesh Gaur
> > Signed-off-by: Vabhav Sharma
> > Acked-by: Scott Wood
> > Acked-by: Stephen Boyd
> > Acked-by: Viresh Kumar
> > ---
> > Changes for v4:
> > - Incorporated review comments from Stephen Boyd
> >
> > Changes for v3:
> > - Incorporated review comments of Rafael J. Wysocki
> > - Updated commit message
> >
> > Changes for v2:
> > - Subject line updated
> >
> > drivers/clk/clk-qoriq.c | 12
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index
> > 3d51d7c..1a15201 100644
> > --- a/drivers/clk/clk-qoriq.c
> > +++ b/drivers/clk/clk-qoriq.c
> > @@ -570,6 +570,17 @@ static const struct clockgen_chipinfo chipinfo[] = {
> > .flags = CG_VER3 | CG_LITTLE_ENDIAN,
> > },
> > {
> > + .compat = "fsl,lx2160a-clockgen",
> > + .cmux_groups = {
> > + _cmux_cga12, _cmux_cgb
> > + },
> > + .cmux_to_group = {
> > + 0, 0, 0, 0, 1, 1, 1, 1, -1
> > + },
> > + .pll_mask = 0x37,
> > + .flags = CG_VER3 | CG_LITTLE_ENDIAN,
> > + },
> > + {
> > .compat = "fsl,p2041-clockgen",
> > .guts_compat = "fsl,qoriq-device-config-1.0",
> > .init_periph = p2041_init_periph,
> > @@ -1427,6 +1438,7 @@ CLK_OF_DECLARE(qoriq_clockgen_ls1043a,
> > "fsl,ls1043a-clockgen", clockgen_init);
> > CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen",
> > clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1088a, "fsl,ls1088a-
> > clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls2080a,
> > "fsl,ls2080a-clockgen", clockgen_init);
> > +CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen",
> > +clockgen_init);
> > CLK_OF_DECLARE(qoriq_clockgen_p2041, "fsl,p2041-clockgen",
> > clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_p3041,
> > "fsl,p3041-clockgen", clockgen_init);
> > CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen",
> > clockgen_init);
> > --
> > 2.7.4
RE: [PATCH v4] clk: qoriq: add support for lx2160a
Hello Stephen,
I have incorporated review comments from
https://patchwork.kernel.org/patch/10917171/
A gentle reminder to apply the patch
https://patchwork.kernel.org/patch/10918407/.
Regards,
Vabhav
> -Original Message-
> From: Vabhav Sharma
> Sent: Friday, April 26, 2019 12:24 PM
> To: linux-kernel@vger.kernel.org; linux-...@vger.kernel.org
> Cc: sb...@kernel.org; mturque...@baylibre.com; Vabhav Sharma
> ; Andy Tang ; Yogesh
> Narayan Gaur
> Subject: [PATCH v4] clk: qoriq: add support for lx2160a
>
> Add clockgen support and configuration for NXP SoC lx2160a with
> compatible property as "fsl,lx2160a-clockgen".
>
> Signed-off-by: Tang Yuantian
> Signed-off-by: Yogesh Gaur
> Signed-off-by: Vabhav Sharma
> Acked-by: Scott Wood
> Acked-by: Stephen Boyd
> Acked-by: Viresh Kumar
> ---
> Changes for v4:
> - Incorporated review comments from Stephen Boyd
>
> Changes for v3:
> - Incorporated review comments of Rafael J. Wysocki
> - Updated commit message
>
> Changes for v2:
> - Subject line updated
>
> drivers/clk/clk-qoriq.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index
> 3d51d7c..1a15201 100644
> --- a/drivers/clk/clk-qoriq.c
> +++ b/drivers/clk/clk-qoriq.c
> @@ -570,6 +570,17 @@ static const struct clockgen_chipinfo chipinfo[] = {
> .flags = CG_VER3 | CG_LITTLE_ENDIAN,
> },
> {
> + .compat = "fsl,lx2160a-clockgen",
> + .cmux_groups = {
> + _cmux_cga12, _cmux_cgb
> + },
> + .cmux_to_group = {
> + 0, 0, 0, 0, 1, 1, 1, 1, -1
> + },
> + .pll_mask = 0x37,
> + .flags = CG_VER3 | CG_LITTLE_ENDIAN,
> + },
> + {
> .compat = "fsl,p2041-clockgen",
> .guts_compat = "fsl,qoriq-device-config-1.0",
> .init_periph = p2041_init_periph,
> @@ -1427,6 +1438,7 @@ CLK_OF_DECLARE(qoriq_clockgen_ls1043a,
> "fsl,ls1043a-clockgen", clockgen_init);
> CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen",
> clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1088a, "fsl,ls1088a-
> clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls2080a,
> "fsl,ls2080a-clockgen", clockgen_init);
> +CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen",
> +clockgen_init);
> CLK_OF_DECLARE(qoriq_clockgen_p2041, "fsl,p2041-clockgen", clockgen_init);
> CLK_OF_DECLARE(qoriq_clockgen_p3041, "fsl,p3041-clockgen", clockgen_init);
> CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen", clockgen_init);
> --
> 2.7.4
RE: [EXT] Re: [PATCH 2/2] add dts file to enable support for ls1046afrwy board.
Hi Fabio,
> -Original Message-
> From: Fabio Estevam
> Sent: Wednesday, May 8, 2019 7:30 PM
> To: Pramod Kumar
> Cc: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org;
> manivannan.sadhasi...@linaro.org; Aisheng Dong
> ; michal.vo...@ysoft.com;
> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Vabhav Sharma
>
> Subject: [EXT] Re: [PATCH 2/2] add dts file to enable support for ls1046afrwy
> board.
>
> Caution: EXT Email
>
> Hi Pramod,
>
> On Wed, May 8, 2019 at 10:56 AM Pramod Kumar
> wrote:
>
> > + {
> > + ethernet@e {
>
> You have passed @e without a corresponfing reg entry.
>
> This causes dtc build warnings with W=1.
>
> Please make sure you don't introduce new W=1 warnings.
ethernet node is included with fsl-ls1046-post.dtsi file and no warning is
introduced.
node content can be found in
arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi:
ethernet@e {
cell-index = <0>;
compatible = "fsl,fman-memac";
reg = <0xe 0x1000>;
fsl,fman-ports = <_rx_0x08 _tx_0x28>;
ptp-timer = <_timer0>;
pcsphy-handle = <>;
};
Regards,
Vabhav
[PATCH v4] cpufreq: qoriq: add support for lx2160a
Enable support of NXP SoC lx2160a to handle the
lx2160a SoC.
Signed-off-by: Tang Yuantian
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Scott Wood
Acked-by: Stephen Boyd
Acked-by: Viresh Kumar
---
Changes for v4:
- Incorporated review comments from Stephen Boyd
Changes for v3:
- Incorporated review comments of Rafael J. Wysocki
- Updated commit message
Changes for v2:
- Subject line updated
drivers/cpufreq/qoriq-cpufreq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpufreq/qoriq-cpufreq.c b/drivers/cpufreq/qoriq-cpufreq.c
index 4295e54..81f0288 100644
--- a/drivers/cpufreq/qoriq-cpufreq.c
+++ b/drivers/cpufreq/qoriq-cpufreq.c
@@ -284,6 +284,7 @@ static const struct of_device_id node_matches[] __initconst
= {
{ .compatible = "fsl,ls1046a-clockgen", },
{ .compatible = "fsl,ls1088a-clockgen", },
{ .compatible = "fsl,ls2080a-clockgen", },
+ { .compatible = "fsl,lx2160a-clockgen", },
{ .compatible = "fsl,p4080-clockgen", },
{ .compatible = "fsl,qoriq-clockgen-1.0", },
{ .compatible = "fsl,qoriq-clockgen-2.0", },
--
2.7.4
[PATCH v4] clk: qoriq: add support for lx2160a
Add clockgen support and configuration for NXP SoC lx2160a
with compatible property as "fsl,lx2160a-clockgen".
Signed-off-by: Tang Yuantian
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Scott Wood
Acked-by: Stephen Boyd
Acked-by: Viresh Kumar
---
Changes for v4:
- Incorporated review comments from Stephen Boyd
Changes for v3:
- Incorporated review comments of Rafael J. Wysocki
- Updated commit message
Changes for v2:
- Subject line updated
drivers/clk/clk-qoriq.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 3d51d7c..1a15201 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -570,6 +570,17 @@ static const struct clockgen_chipinfo chipinfo[] = {
.flags = CG_VER3 | CG_LITTLE_ENDIAN,
},
{
+ .compat = "fsl,lx2160a-clockgen",
+ .cmux_groups = {
+ _cmux_cga12, _cmux_cgb
+ },
+ .cmux_to_group = {
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
+ },
+ .pll_mask = 0x37,
+ .flags = CG_VER3 | CG_LITTLE_ENDIAN,
+ },
+ {
.compat = "fsl,p2041-clockgen",
.guts_compat = "fsl,qoriq-device-config-1.0",
.init_periph = p2041_init_periph,
@@ -1427,6 +1438,7 @@ CLK_OF_DECLARE(qoriq_clockgen_ls1043a,
"fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1088a, "fsl,ls1088a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p2041, "fsl,p2041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p3041, "fsl,p3041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen", clockgen_init);
--
2.7.4
RE: [EXT] Re: [PATCH v3] clk: qoriq: add support for lx2160a
> -Original Message- > From: Stephen Boyd > Sent: Thursday, April 25, 2019 11:52 PM > To: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; linux- > p...@vger.kernel.org; Vabhav Sharma > Cc: mturque...@baylibre.com; r...@rjwysocki.net; viresh.ku...@linaro.org; > Yogesh Narayan Gaur ; Andy Tang > ; Vabhav Sharma > Subject: [EXT] Re: [PATCH v3] clk: qoriq: add support for lx2160a > > Caution: EXT Email > > Quoting Vabhav Sharma (2019-04-25 06:57:05) > > From: Yogesh Gaur > > > > Add clockgen support and configuration for NXP SoC lx2160a in qoriq > > clock driver with compatible property as "fsl,lx2160a-clockgen". > > > > qoriq-cpufreq driver is based on qoriq clock driver, enable support of > > NXP SoC lx2160a in qoriq cpufreq driver to handle the lx2160a SoC. > > > > Signed-off-by: Tang Yuantian > > Signed-off-by: Yogesh Gaur > > Signed-off-by: Vabhav Sharma > > Acked-by: Scott Wood > > Acked-by: Stephen Boyd > > Acked-by: Viresh Kumar > > --- > > Changes for v3: > > - Incorporated review comments of Rafael J. Wysocki > > - Updated commit message > > If you can split it into clk and cpufreq that would be preferred. Then I can > take the clk part and PM tree can take the cpufreq part. Otherwise, you have > sent other patches to drivers/clk/clk-qoriq.c and I'm worried there will be > cross tree conflicts if I take those other patches this cycle. Agree, sure. I will split the patch and sent it to clk and PM tree.
[PATCH v3] clk: qoriq: add support for lx2160a
From: Yogesh Gaur
Add clockgen support and configuration for NXP SoC lx2160a in qoriq
clock driver with compatible property as "fsl,lx2160a-clockgen".
qoriq-cpufreq driver is based on qoriq clock driver, enable support
of NXP SoC lx2160a in qoriq cpufreq driver to handle the lx2160a SoC.
Signed-off-by: Tang Yuantian
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Scott Wood
Acked-by: Stephen Boyd
Acked-by: Viresh Kumar
---
Changes for v3:
- Incorporated review comments of Rafael J. Wysocki
- Updated commit message
Changes for v2:
- Subject line updated
drivers/clk/clk-qoriq.c | 12
drivers/cpufreq/qoriq-cpufreq.c | 1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 3d51d7c..1a15201 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -570,6 +570,17 @@ static const struct clockgen_chipinfo chipinfo[] = {
.flags = CG_VER3 | CG_LITTLE_ENDIAN,
},
{
+ .compat = "fsl,lx2160a-clockgen",
+ .cmux_groups = {
+ _cmux_cga12, _cmux_cgb
+ },
+ .cmux_to_group = {
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
+ },
+ .pll_mask = 0x37,
+ .flags = CG_VER3 | CG_LITTLE_ENDIAN,
+ },
+ {
.compat = "fsl,p2041-clockgen",
.guts_compat = "fsl,qoriq-device-config-1.0",
.init_periph = p2041_init_periph,
@@ -1427,6 +1438,7 @@ CLK_OF_DECLARE(qoriq_clockgen_ls1043a,
"fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1088a, "fsl,ls1088a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p2041, "fsl,p2041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p3041, "fsl,p3041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen", clockgen_init);
diff --git a/drivers/cpufreq/qoriq-cpufreq.c b/drivers/cpufreq/qoriq-cpufreq.c
index 4295e54..81f0288 100644
--- a/drivers/cpufreq/qoriq-cpufreq.c
+++ b/drivers/cpufreq/qoriq-cpufreq.c
@@ -284,6 +284,7 @@ static const struct of_device_id node_matches[] __initconst
= {
{ .compatible = "fsl,ls1046a-clockgen", },
{ .compatible = "fsl,ls1088a-clockgen", },
{ .compatible = "fsl,ls2080a-clockgen", },
+ { .compatible = "fsl,lx2160a-clockgen", },
{ .compatible = "fsl,p4080-clockgen", },
{ .compatible = "fsl,qoriq-clockgen-1.0", },
{ .compatible = "fsl,qoriq-clockgen-2.0", },
--
2.7.4
RE: [EXT] Re: [PATCH v2] clk: qoriq: Add clockgen support for lx2160a
> -Original Message- > From: Rafael J. Wysocki > Sent: Thursday, April 25, 2019 3:59 PM > To: Andy Tang > Cc: Rafael J. Wysocki ; Vabhav Sharma > ; linux-kernel@vger.kernel.org; linux- > c...@vger.kernel.org; linux...@vger.kernel.org; sb...@kernel.org; > mturque...@baylibre.com; r...@rjwysocki.net; viresh.ku...@linaro.org; > Yogesh Narayan Gaur > Subject: Re: [EXT] Re: [PATCH v2] clk: qoriq: Add clockgen support for lx2160a > > Caution: EXT Email > > On Thu, Apr 25, 2019 at 12:15 PM Andy Tang wrote: > > > > > > > -Original Message- > > > From: Rafael J. Wysocki > > > Sent: 2019年4月25日 18:04 > > > To: Vabhav Sharma > > > Cc: linux-kernel@vger.kernel.org; linux-...@vger.kernel.org; > > > linux...@vger.kernel.org; sb...@kernel.org; mturque...@baylibre.com; > > > r...@rjwysocki.net; viresh.ku...@linaro.org; Yogesh Narayan Gaur > > > ; Andy Tang > > > Subject: [EXT] Re: [PATCH v2] clk: qoriq: Add clockgen support for > > > lx2160a > > > > > > Caution: EXT Email > > > > > > On Thu, Apr 25, 2019 at 11:48 AM Vabhav Sharma > > > > > > wrote: > > > > > > > > From: Yogesh Gaur > > > > > > > > Add clockgen support for lx2160a. > > > > Added entry for compat 'fsl,lx2160a-clockgen'. > > > > > > Well, if I'm expected to apply this, the above is a bit terse. > > > > > > It looks like the patch makes the qoriq-cpufreq driver handle some > > > new hardware, but the changelog doesn't say much about that. > > > > > > I'm guessing that the clockgen support added here makes it possible > > > for qoriq-cpufreq to handle this chip, is that correct? > > Yes, your guess is correct. The cpufreq feature is based on clock driver. > > It should had been separated to two patches and reduced the confuse. > > Do I need to update the commit message or you just take it? > > Please update the commit message. > > Thanks! Ok
[PATCH v2] clk: qoriq: Add clockgen support for lx2160a
From: Yogesh Gaur
Add clockgen support for lx2160a.
Added entry for compat 'fsl,lx2160a-clockgen'.
Signed-off-by: Tang Yuantian
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Scott Wood
Acked-by: Stephen Boyd
Acked-by: Viresh Kumar
---
Changes for v2:
- Subject line updated
drivers/clk/clk-qoriq.c | 12
drivers/cpufreq/qoriq-cpufreq.c | 1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 3d51d7c..1a15201 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -570,6 +570,17 @@ static const struct clockgen_chipinfo chipinfo[] = {
.flags = CG_VER3 | CG_LITTLE_ENDIAN,
},
{
+ .compat = "fsl,lx2160a-clockgen",
+ .cmux_groups = {
+ _cmux_cga12, _cmux_cgb
+ },
+ .cmux_to_group = {
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
+ },
+ .pll_mask = 0x37,
+ .flags = CG_VER3 | CG_LITTLE_ENDIAN,
+ },
+ {
.compat = "fsl,p2041-clockgen",
.guts_compat = "fsl,qoriq-device-config-1.0",
.init_periph = p2041_init_periph,
@@ -1427,6 +1438,7 @@ CLK_OF_DECLARE(qoriq_clockgen_ls1043a,
"fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1088a, "fsl,ls1088a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p2041, "fsl,p2041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p3041, "fsl,p3041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen", clockgen_init);
diff --git a/drivers/cpufreq/qoriq-cpufreq.c b/drivers/cpufreq/qoriq-cpufreq.c
index 4295e54..81f0288 100644
--- a/drivers/cpufreq/qoriq-cpufreq.c
+++ b/drivers/cpufreq/qoriq-cpufreq.c
@@ -284,6 +284,7 @@ static const struct of_device_id node_matches[] __initconst
= {
{ .compatible = "fsl,ls1046a-clockgen", },
{ .compatible = "fsl,ls1088a-clockgen", },
{ .compatible = "fsl,ls2080a-clockgen", },
+ { .compatible = "fsl,lx2160a-clockgen", },
{ .compatible = "fsl,p4080-clockgen", },
{ .compatible = "fsl,qoriq-clockgen-1.0", },
{ .compatible = "fsl,qoriq-clockgen-2.0", },
--
2.7.4
[PATCH v2] clk: qoriq: increase array size of cmux_to_group
From: Yogesh Gaur
Increase size of cmux_to_group array, to accomdate entry of
-1 termination.
Added -1, terminated, entry for 4080_cmux_grpX.
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Scott Wood
Acked-by: Stephen Boyd
---
Changes for v2:
- Incorporated review comments from Stephen Boyd
- Subject line modified
- Indentation update
drivers/clk/clk-qoriq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 1212a9b..3d51d7c 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -79,7 +79,7 @@ struct clockgen_chipinfo {
const struct clockgen_muxinfo *cmux_groups[2];
const struct clockgen_muxinfo *hwaccel[NUM_HWACCEL];
void (*init_periph)(struct clockgen *cg);
- int cmux_to_group[NUM_CMUX]; /* -1 terminates if fewer than NUM_CMUX */
+ int cmux_to_group[NUM_CMUX+1]; /* array should be -1 terminated */
u32 pll_mask; /* 1 << n bit set if PLL n is valid */
u32 flags; /* CG_xxx */
};
@@ -601,7 +601,7 @@ static const struct clockgen_chipinfo chipinfo[] = {
_cmux_grp1, _cmux_grp2
},
.cmux_to_group = {
- 0, 0, 0, 0, 1, 1, 1, 1
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
},
.pll_mask = 0x1f,
},
--
2.7.4
[PATCH v2] clk: qoriq: Add clockgen support for lx2160a
From: Yogesh Gaur
Add clockgen support for lx2160a.
Added entry for compat 'fsl,lx2160a-clockgen'.
Signed-off-by: Tang Yuantian
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Scott Wood
Acked-by: Stephen Boyd
Acked-by: Viresh Kumar
Changes for v2:
- Subject line updated
---
drivers/clk/clk-qoriq.c | 12
drivers/cpufreq/qoriq-cpufreq.c | 1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 3d51d7c..1a15201 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -570,6 +570,17 @@ static const struct clockgen_chipinfo chipinfo[] = {
.flags = CG_VER3 | CG_LITTLE_ENDIAN,
},
{
+ .compat = "fsl,lx2160a-clockgen",
+ .cmux_groups = {
+ _cmux_cga12, _cmux_cgb
+ },
+ .cmux_to_group = {
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
+ },
+ .pll_mask = 0x37,
+ .flags = CG_VER3 | CG_LITTLE_ENDIAN,
+ },
+ {
.compat = "fsl,p2041-clockgen",
.guts_compat = "fsl,qoriq-device-config-1.0",
.init_periph = p2041_init_periph,
@@ -1427,6 +1438,7 @@ CLK_OF_DECLARE(qoriq_clockgen_ls1043a,
"fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1088a, "fsl,ls1088a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p2041, "fsl,p2041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p3041, "fsl,p3041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen", clockgen_init);
diff --git a/drivers/cpufreq/qoriq-cpufreq.c b/drivers/cpufreq/qoriq-cpufreq.c
index 4295e54..81f0288 100644
--- a/drivers/cpufreq/qoriq-cpufreq.c
+++ b/drivers/cpufreq/qoriq-cpufreq.c
@@ -284,6 +284,7 @@ static const struct of_device_id node_matches[] __initconst
= {
{ .compatible = "fsl,ls1046a-clockgen", },
{ .compatible = "fsl,ls1088a-clockgen", },
{ .compatible = "fsl,ls2080a-clockgen", },
+ { .compatible = "fsl,lx2160a-clockgen", },
{ .compatible = "fsl,p4080-clockgen", },
{ .compatible = "fsl,qoriq-clockgen-1.0", },
{ .compatible = "fsl,qoriq-clockgen-2.0", },
--
2.7.4
[PATCH v2] clk: qoriq: increase array size of cmux_to_group
From: Yogesh Gaur
Increase size of cmux_to_group array, to accomdate entry of
-1 termination.
Added -1, terminated, entry for 4080_cmux_grpX.
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Scott Wood
Acked-by: Stephen Boyd
Changes for v2:
- Incorporated review comments from Stephen Boyd
- Subject line modified
- Indentation update
---
drivers/clk/clk-qoriq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 1212a9b..3d51d7c 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -79,7 +79,7 @@ struct clockgen_chipinfo {
const struct clockgen_muxinfo *cmux_groups[2];
const struct clockgen_muxinfo *hwaccel[NUM_HWACCEL];
void (*init_periph)(struct clockgen *cg);
- int cmux_to_group[NUM_CMUX]; /* -1 terminates if fewer than NUM_CMUX */
+ int cmux_to_group[NUM_CMUX+1]; /* array should be -1 terminated */
u32 pll_mask; /* 1 << n bit set if PLL n is valid */
u32 flags; /* CG_xxx */
};
@@ -601,7 +601,7 @@ static const struct clockgen_chipinfo chipinfo[] = {
_cmux_grp1, _cmux_grp2
},
.cmux_to_group = {
- 0, 0, 0, 0, 1, 1, 1, 1
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
},
.pll_mask = 0x1f,
},
--
2.7.4
RE: [EXT] Re: [PATCH] arm64: drivers: clk: qoriq: increase array size of cmux_to_group
> -Original Message-
> From: Stephen Boyd
> Sent: Thursday, April 25, 2019 4:51 AM
> To: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; Vabhav Sharma
>
> Cc: mturque...@baylibre.com; Yogesh Narayan Gaur
> ; Vabhav Sharma
>
> Subject: [EXT] Re: [PATCH] arm64: drivers: clk: qoriq: increase array size of
> cmux_to_group
>
> Caution: EXT Email
>
> Your subject should be "clk: qoriq: Increase array size of cmux_to_group"
Ok, I will update it
>
> Quoting Vabhav Sharma (2019-04-24 07:50:13)
> > From: Yogesh Gaur
> >
> > Increase size of cmux_to_group array, to accomdate entry of
> > -1 termination.
> >
> > Added -1, terminated, entry for 4080_cmux_grpX.
> >
> > Signed-off-by: Yogesh Gaur
> > Signed-off-by: Vabhav Sharma
> > Acked-by: Scott Wood
> > Acked-by: Stephen Boyd
> > ---
> > drivers/clk/clk-qoriq.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index
> > 1212a9b..f6606cf 100644
> > --- a/drivers/clk/clk-qoriq.c
> > +++ b/drivers/clk/clk-qoriq.c
> > @@ -79,7 +79,7 @@ struct clockgen_chipinfo {
> > const struct clockgen_muxinfo *cmux_groups[2];
> > const struct clockgen_muxinfo *hwaccel[NUM_HWACCEL];
> > void (*init_periph)(struct clockgen *cg);
> > - int cmux_to_group[NUM_CMUX]; /* -1 terminates if fewer than
> NUM_CMUX */
> > + int cmux_to_group[NUM_CMUX+1]; /* array should be -1
> > + terminated */
>
> Please put space around that +.
Ok, I will update it
>
> > u32 pll_mask; /* 1 << n bit set if PLL n is valid */
> > u32 flags; /* CG_xxx */
> > };
> > @@ -601,7 +601,7 @@ static const struct clockgen_chipinfo chipinfo[] = {
> > _cmux_grp1, _cmux_grp2
> > },
> > .cmux_to_group = {
> > - 0, 0, 0, 0, 1, 1, 1, 1
> > + 0, 0, 0, 0, 1, 1, 1, 1, -1
> > },
> > .pll_mask = 0x1f,
> > },
>
> Did you want this patch to go through clk tree? I seem to have acked it,
> which I don't remember. Usually when I ack something I assume it's going
> through some other tree.
Yes , please help to merge it
This Patch was sent earlier as a part of adding NXP LX2160A SoC support,
reviewed and acked but dropped during merge window. So I break the clock
patches into two patch to let clk maintainers merge it.
[PATCH] arm64: drivers: clk: qoriq: increase array size of cmux_to_group
From: Yogesh Gaur
Increase size of cmux_to_group array, to accomdate entry of
-1 termination.
Added -1, terminated, entry for 4080_cmux_grpX.
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Scott Wood
Acked-by: Stephen Boyd
---
drivers/clk/clk-qoriq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 1212a9b..f6606cf 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -79,7 +79,7 @@ struct clockgen_chipinfo {
const struct clockgen_muxinfo *cmux_groups[2];
const struct clockgen_muxinfo *hwaccel[NUM_HWACCEL];
void (*init_periph)(struct clockgen *cg);
- int cmux_to_group[NUM_CMUX]; /* -1 terminates if fewer than NUM_CMUX */
+ int cmux_to_group[NUM_CMUX+1]; /* array should be -1 terminated */
u32 pll_mask; /* 1 << n bit set if PLL n is valid */
u32 flags; /* CG_xxx */
};
@@ -601,7 +601,7 @@ static const struct clockgen_chipinfo chipinfo[] = {
_cmux_grp1, _cmux_grp2
},
.cmux_to_group = {
- 0, 0, 0, 0, 1, 1, 1, 1
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
},
.pll_mask = 0x1f,
},
--
2.7.4
[PATCH] arm64: drivers: clk: qoriq: Add clockgen support for lx2160a
From: Yogesh Gaur
Add clockgen support for lx2160a.
Added entry for compat 'fsl,lx2160a-clockgen'.
Signed-off-by: Tang Yuantian
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Scott Wood
Acked-by: Stephen Boyd
Acked-by: Viresh Kumar
---
drivers/clk/clk-qoriq.c | 12
drivers/cpufreq/qoriq-cpufreq.c | 1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index f6606cf..96db780 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -570,6 +570,17 @@ static const struct clockgen_chipinfo chipinfo[] = {
.flags = CG_VER3 | CG_LITTLE_ENDIAN,
},
{
+ .compat = "fsl,lx2160a-clockgen",
+ .cmux_groups = {
+ _cmux_cga12, _cmux_cgb
+ },
+ .cmux_to_group = {
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
+ },
+ .pll_mask = 0x37,
+ .flags = CG_VER3 | CG_LITTLE_ENDIAN,
+ },
+ {
.compat = "fsl,p2041-clockgen",
.guts_compat = "fsl,qoriq-device-config-1.0",
.init_periph = p2041_init_periph,
@@ -1427,6 +1438,7 @@ CLK_OF_DECLARE(qoriq_clockgen_ls1043a,
"fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1088a, "fsl,ls1088a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p2041, "fsl,p2041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p3041, "fsl,p3041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen", clockgen_init);
diff --git a/drivers/cpufreq/qoriq-cpufreq.c b/drivers/cpufreq/qoriq-cpufreq.c
index 4295e54..81f0288 100644
--- a/drivers/cpufreq/qoriq-cpufreq.c
+++ b/drivers/cpufreq/qoriq-cpufreq.c
@@ -284,6 +284,7 @@ static const struct of_device_id node_matches[] __initconst
= {
{ .compatible = "fsl,ls1046a-clockgen", },
{ .compatible = "fsl,ls1088a-clockgen", },
{ .compatible = "fsl,ls2080a-clockgen", },
+ { .compatible = "fsl,lx2160a-clockgen", },
{ .compatible = "fsl,p4080-clockgen", },
{ .compatible = "fsl,qoriq-clockgen-1.0", },
{ .compatible = "fsl,qoriq-clockgen-2.0", },
--
2.7.4
RE: [PATCH v1 4/4] clk: qoriq: Add clockgen support for lx2160a
Hello Maintainers, Please merge below patch. Regards, Vabhav > -Original Message- > From: devicetree-ow...@vger.kernel.org > On Behalf Of Scott Wood > Sent: Wednesday, February 27, 2019 3:00 AM > To: Vabhav Sharma ; sudeep.ho...@arm.com; > linux-kernel@vger.kernel.org; devicet...@vger.kernel.org; > robh...@kernel.org; mark.rutl...@arm.com; linuxppc-...@lists.ozlabs.org; > linux-arm-ker...@lists.infradead.org; mturque...@baylibre.com; > sb...@kernel.org; r...@rjwysocki.net; viresh.ku...@linaro.org; linux- > c...@vger.kernel.org; linux...@vger.kernel.org; linux-kernel- > ow...@vger.kernel.org; catalin.mari...@arm.com; will.dea...@arm.com; > gre...@linuxfoundation.org; a...@arndb.de; > kstew...@linuxfoundation.org; yamada.masah...@socionext.com; Leo Li > ; shawn...@kernel.org > Cc: li...@armlinux.org.uk; adrian.hun...@intel.com; > ulf.hans...@linaro.org; Yogesh Narayan Gaur > ; Andy Tang > Subject: Re: [PATCH v1 4/4] clk: qoriq: Add clockgen support for lx2160a > > On Tue, 2019-02-26 at 10:11 +, Vabhav Sharma wrote: > > From: Yogesh Gaur > > > > Add clockgen support for lx2160a. > > Added entry for compat 'fsl,lx2160a-clockgen'. > > > > Signed-off-by: Tang Yuantian > > Signed-off-by: Yogesh Gaur > > Signed-off-by: Vabhav Sharma > > Acked-by: Stephen Boyd > > Acked-by: Viresh Kumar > > --- > > drivers/clk/clk-qoriq.c | 12 > > drivers/cpufreq/qoriq-cpufreq.c | 1 + > > 2 files changed, 13 insertions(+) > > Acked-by: Scott Wood > > -Scott >
RE: [PATCH v1 1/4] dt-bindings: arm64: add compatible for LX2160A
Hello Maintainers, Please merge below patch. Regards, Vabhav > -Original Message- > From: Vabhav Sharma > Sent: Tuesday, February 26, 2019 3:41 PM > To: sudeep.ho...@arm.com; o...@buserror.net; linux-kernel@vger.kernel.org; > devicet...@vger.kernel.org; robh...@kernel.org; mark.rutl...@arm.com; > linuxppc-...@lists.ozlabs.org; linux-arm-ker...@lists.infradead.org; > mturque...@baylibre.com; sb...@kernel.org; r...@rjwysocki.net; > viresh.ku...@linaro.org; linux-...@vger.kernel.org; linux- > p...@vger.kernel.org; linux-kernel-ow...@vger.kernel.org; > catalin.mari...@arm.com; will.dea...@arm.com; > gre...@linuxfoundation.org; a...@arndb.de; > kstew...@linuxfoundation.org; yamada.masah...@socionext.com; Leo Li > ; shawn...@kernel.org > Cc: li...@armlinux.org.uk; adrian.hun...@intel.com; > ulf.hans...@linaro.org; Vabhav Sharma > Subject: [PATCH v1 1/4] dt-bindings: arm64: add compatible for LX2160A > > Add compatible for LX2160A SoC,QDS and RDB board Add lx2160a > compatible for clockgen and dcfg > > Signed-off-by: Vabhav Sharma > Reviewed-by: Rob Herring > --- > .../bindings/arm/freescale/fsl,layerscape-dcfg.txt | 2 +- > Documentation/devicetree/bindings/arm/fsl.txt| 12 > > Documentation/devicetree/bindings/clock/qoriq-clock.txt | 1 + > 3 files changed, 14 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape- > dcfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape- > dcfg.txt > index b5cb374..dc76046 100644 > --- a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape- > dcfg.txt > +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcf > +++ g.txt > @@ -8,7 +8,7 @@ Required properties: >- compatible: Should contain a chip-specific compatible string, > Chip-specific strings are of the form "fsl,-dcfg", > The following s are known to be supported: > - ls1012a, ls1021a, ls1043a, ls1046a, ls2080a. > + ls1012a, ls1021a, ls1043a, ls1046a, ls2080a, lx2160a. > >- reg : should contain base address and length of DCFG memory-mapped > registers > > diff --git a/Documentation/devicetree/bindings/arm/fsl.txt > b/Documentation/devicetree/bindings/arm/fsl.txt > index 7fbc424..baef162 100644 > --- a/Documentation/devicetree/bindings/arm/fsl.txt > +++ b/Documentation/devicetree/bindings/arm/fsl.txt > @@ -235,3 +235,15 @@ Required root node properties: > LS2088A ARMv8 based RDB Board > Required root node properties: > - compatible = "fsl,ls2088a-rdb", "fsl,ls2088a"; > + > +LX2160A SoC > +Required root node properties: > +- compatible = "fsl,lx2160a"; > + > +LX2160A ARMv8 based QDS Board > +Required root node properties: > +- compatible = "fsl,lx2160a-qds", "fsl,lx2160a"; > + > +LX2160A ARMv8 based RDB Board > +Required root node properties: > +- compatible = "fsl,lx2160a-rdb", "fsl,lx2160a"; > diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > index c655f28..f322989 100644 > --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > @@ -43,6 +43,7 @@ Required properties: > * "fsl,ls1046a-clockgen" > * "fsl,ls1088a-clockgen" > * "fsl,ls2080a-clockgen" > + * "fsl,lx2160a-clockgen" > Chassis-version clock strings include: > * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks > * "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks > -- > 2.7.4
RE: [PATCH v1 0/4] arm64: dts: NXP: add basic dts file for LX2160A SoC
Hello Maintainers, Please help to merge patch. > -Original Message- > From: Stephen Boyd > Sent: Thursday, February 28, 2019 5:31 AM > To: a...@arndb.de; catalin.mari...@arm.com; devicet...@vger.kernel.org; > gre...@linuxfoundation.org; kstew...@linuxfoundation.org; linux-arm- > ker...@lists.infradead.org; linux-...@vger.kernel.org; linux-kernel- > ow...@vger.kernel.org; linux-kernel@vger.kernel.org; linux- > p...@vger.kernel.org; linuxppc-...@lists.ozlabs.org; mark.rutl...@arm.com; > mturque...@baylibre.com; o...@buserror.net; r...@rjwysocki.net; > robh...@kernel.org; shawn...@kernel.org; sudeep.ho...@arm.com; > viresh.kumar@lina ro.org ; will.dea...@arm.com; > yamada.masah...@socionext.com; Leo Li ; Vabhav > Sharma > Cc: li...@armlinux.org.uk; adrian.hun...@intel.com; > ulf.hans...@linaro.org; Vabhav Sharma > Subject: Re: [PATCH v1 0/4] arm64: dts: NXP: add basic dts file for LX2160A > SoC > > Quoting Vabhav Sharma (2019-02-26 02:10:46) > > These patches were reviewed and acked but dropped during merge > window. > > Patchwork link was > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore. > kernel.org%2Fpatchwork%2Fcover%2F1004155%2Fdata=02%7C01%7Cv > abhav.sharma%40nxp.com%7C9fb978cb85834f688b5708d69d0fe556%7C686e > a1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636869088931292322s > data=QF66OQfJIrFI9tDVBDI1SKFuam53fejMfC9pJmJEZMA%3Dreserved= > 0 > > > > Changes for v1: > > - Updated lx2160a clockgen in alphabetical order > > > > Vabhav Sharma (2): > > dt-bindings: arm64: add compatible for LX2160A Rob Herring , Mark Rutland > > soc/fsl/guts: Add definition for LX2160A Leo > > > > Yogesh Gaur (2): > > clk: qoriq: increase array size of cmux_to_group Stephen Boyd , Michael Turquette , > > clk: qoriq: Add clockgen support for lx2160a Stephen Boyd , Michael Turquette ,"Rafael J. Wysocki" , Viresh Kumar > > Who do you want to apply these patches? As per maintainers script result, I have updated email
[PATCH v1 3/4] clk: qoriq: increase array size of cmux_to_group
From: Yogesh Gaur
Increase size of cmux_to_group array, to accomdate entry of
-1 termination.
Added -1, terminated, entry for 4080_cmux_grpX.
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Stephen Boyd
---
drivers/clk/clk-qoriq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 5baa9e0..e75194a 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -79,7 +79,7 @@ struct clockgen_chipinfo {
const struct clockgen_muxinfo *cmux_groups[2];
const struct clockgen_muxinfo *hwaccel[NUM_HWACCEL];
void (*init_periph)(struct clockgen *cg);
- int cmux_to_group[NUM_CMUX]; /* -1 terminates if fewer than NUM_CMUX */
+ int cmux_to_group[NUM_CMUX+1]; /* array should be -1 terminated */
u32 pll_mask; /* 1 << n bit set if PLL n is valid */
u32 flags; /* CG_xxx */
};
@@ -601,7 +601,7 @@ static const struct clockgen_chipinfo chipinfo[] = {
_cmux_grp1, _cmux_grp2
},
.cmux_to_group = {
- 0, 0, 0, 0, 1, 1, 1, 1
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
},
.pll_mask = 0x1f,
},
--
2.7.4
[PATCH v1 4/4] clk: qoriq: Add clockgen support for lx2160a
From: Yogesh Gaur
Add clockgen support for lx2160a.
Added entry for compat 'fsl,lx2160a-clockgen'.
Signed-off-by: Tang Yuantian
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Stephen Boyd
Acked-by: Viresh Kumar
---
drivers/clk/clk-qoriq.c | 12
drivers/cpufreq/qoriq-cpufreq.c | 1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index e75194a..288e8f0c 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -570,6 +570,17 @@ static const struct clockgen_chipinfo chipinfo[] = {
.flags = CG_VER3 | CG_LITTLE_ENDIAN,
},
{
+ .compat = "fsl,lx2160a-clockgen",
+ .cmux_groups = {
+ _cmux_cga12, _cmux_cgb
+ },
+ .cmux_to_group = {
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
+ },
+ .pll_mask = 0x37,
+ .flags = CG_VER3 | CG_LITTLE_ENDIAN,
+ },
+ {
.compat = "fsl,p2041-clockgen",
.guts_compat = "fsl,qoriq-device-config-1.0",
.init_periph = p2041_init_periph,
@@ -1426,6 +1437,7 @@ CLK_OF_DECLARE(qoriq_clockgen_ls1043a,
"fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1088a, "fsl,ls1088a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p2041, "fsl,p2041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p3041, "fsl,p3041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen", clockgen_init);
diff --git a/drivers/cpufreq/qoriq-cpufreq.c b/drivers/cpufreq/qoriq-cpufreq.c
index 3d773f6..83921b7 100644
--- a/drivers/cpufreq/qoriq-cpufreq.c
+++ b/drivers/cpufreq/qoriq-cpufreq.c
@@ -295,6 +295,7 @@ static const struct of_device_id node_matches[] __initconst
= {
{ .compatible = "fsl,ls1046a-clockgen", },
{ .compatible = "fsl,ls1088a-clockgen", },
{ .compatible = "fsl,ls2080a-clockgen", },
+ { .compatible = "fsl,lx2160a-clockgen", },
{ .compatible = "fsl,p4080-clockgen", },
{ .compatible = "fsl,qoriq-clockgen-1.0", },
{ .compatible = "fsl,qoriq-clockgen-2.0", },
--
2.7.4
[PATCH v1 0/4] arm64: dts: NXP: add basic dts file for LX2160A SoC
These patches were reviewed and acked but dropped during merge window. Patchwork link was https://lore.kernel.org/patchwork/cover/1004155/ Changes for v1: - Updated lx2160a clockgen in alphabetical order Vabhav Sharma (2): dt-bindings: arm64: add compatible for LX2160A soc/fsl/guts: Add definition for LX2160A Yogesh Gaur (2): clk: qoriq: increase array size of cmux_to_group clk: qoriq: Add clockgen support for lx2160a .../bindings/arm/freescale/fsl,layerscape-dcfg.txt | 2 +- Documentation/devicetree/bindings/arm/fsl.txt| 12 Documentation/devicetree/bindings/clock/qoriq-clock.txt | 1 + drivers/clk/clk-qoriq.c | 16 ++-- drivers/cpufreq/qoriq-cpufreq.c | 1 + drivers/soc/fsl/guts.c | 6 ++ 6 files changed, 35 insertions(+), 3 deletions(-) -- 2.7.4
[PATCH v1 2/4] soc/fsl/guts: Add definition for LX2160A
Adding compatible string "lx2160a-dcfg" to
initialize guts driver for lx2160 and SoC die
attribute definition for LX2160A
Signed-off-by: Vabhav Sharma
Signed-off-by: Yinbo Zhu
Acked-by: Li Yang
---
drivers/soc/fsl/guts.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c
index 302e0c8..bcab1ee 100644
--- a/drivers/soc/fsl/guts.c
+++ b/drivers/soc/fsl/guts.c
@@ -100,6 +100,11 @@ static const struct fsl_soc_die_attr fsl_soc_die[] = {
.svr = 0x8700,
.mask = 0xfff7,
},
+ /* Die: LX2160A, SoC: LX2160A/LX2120A/LX2080A */
+ { .die = "LX2160A",
+ .svr = 0x8736,
+ .mask = 0xff3f,
+ },
{ },
};
@@ -222,6 +227,7 @@ static const struct of_device_id fsl_guts_of_match[] = {
{ .compatible = "fsl,ls1088a-dcfg", },
{ .compatible = "fsl,ls1012a-dcfg", },
{ .compatible = "fsl,ls1046a-dcfg", },
+ { .compatible = "fsl,lx2160a-dcfg", },
{}
};
MODULE_DEVICE_TABLE(of, fsl_guts_of_match);
--
2.7.4
[PATCH v1 1/4] dt-bindings: arm64: add compatible for LX2160A
Add compatible for LX2160A SoC,QDS and RDB board Add lx2160a compatible for clockgen and dcfg Signed-off-by: Vabhav Sharma Reviewed-by: Rob Herring --- .../bindings/arm/freescale/fsl,layerscape-dcfg.txt | 2 +- Documentation/devicetree/bindings/arm/fsl.txt| 12 Documentation/devicetree/bindings/clock/qoriq-clock.txt | 1 + 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt index b5cb374..dc76046 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt @@ -8,7 +8,7 @@ Required properties: - compatible: Should contain a chip-specific compatible string, Chip-specific strings are of the form "fsl,-dcfg", The following s are known to be supported: - ls1012a, ls1021a, ls1043a, ls1046a, ls2080a. + ls1012a, ls1021a, ls1043a, ls1046a, ls2080a, lx2160a. - reg : should contain base address and length of DCFG memory-mapped registers diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt index 7fbc424..baef162 100644 --- a/Documentation/devicetree/bindings/arm/fsl.txt +++ b/Documentation/devicetree/bindings/arm/fsl.txt @@ -235,3 +235,15 @@ Required root node properties: LS2088A ARMv8 based RDB Board Required root node properties: - compatible = "fsl,ls2088a-rdb", "fsl,ls2088a"; + +LX2160A SoC +Required root node properties: +- compatible = "fsl,lx2160a"; + +LX2160A ARMv8 based QDS Board +Required root node properties: +- compatible = "fsl,lx2160a-qds", "fsl,lx2160a"; + +LX2160A ARMv8 based RDB Board +Required root node properties: +- compatible = "fsl,lx2160a-rdb", "fsl,lx2160a"; diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt index c655f28..f322989 100644 --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt @@ -43,6 +43,7 @@ Required properties: * "fsl,ls1046a-clockgen" * "fsl,ls1088a-clockgen" * "fsl,ls2080a-clockgen" + * "fsl,lx2160a-clockgen" Chassis-version clock strings include: * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks * "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks -- 2.7.4
RE: [PATCH 4/4] clk: qoriq: Add clockgen support for lx2160a
> -Original Message- > From: Scott Wood > Sent: Tuesday, February 26, 2019 3:15 PM > To: Vabhav Sharma ; sudeep.ho...@arm.com; > linux-kernel@vger.kernel.org; devicet...@vger.kernel.org; > robh...@kernel.org; mark.rutl...@arm.com; linuxppc-...@lists.ozlabs.org; > linux-arm-ker...@lists.infradead.org; mturque...@baylibre.com; > sb...@kernel.org; r...@rjwysocki.net; viresh.ku...@linaro.org; linux- > c...@vger.kernel.org; linux...@vger.kernel.org; linux-kernel- > ow...@vger.kernel.org; catalin.mari...@arm.com; will.dea...@arm.com; > gre...@linuxfoundation.org; a...@arndb.de; > kstew...@linuxfoundation.org; yamada.masah...@socionext.com; Leo Li > ; shawn...@kernel.org > Cc: li...@armlinux.org.uk; adrian.hun...@intel.com; > ulf.hans...@linaro.org; Yogesh Narayan Gaur > ; Andy Tang > Subject: Re: [PATCH 4/4] clk: qoriq: Add clockgen support for lx2160a > > On Tue, 2019-02-26 at 08:34 +, Vabhav Sharma wrote: > > @@ -1435,6 +1446,7 @@ CLK_OF_DECLARE(qoriq_clockgen_t1023, > "fsl,t1023- > > clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_t1040, > > "fsl,t1040-clockgen", clockgen_init); > > CLK_OF_DECLARE(qoriq_clockgen_t2080, "fsl,t2080-clockgen", > > clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_t4240, > > "fsl,t4240-clockgen", clockgen_init); > > +CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen", > > clockgen_init); > > The chips were previously in alphabetical order... Ok > > -Scott >
[PATCH 4/4] clk: qoriq: Add clockgen support for lx2160a
From: Yogesh Gaur
Add clockgen support for lx2160a.
Added entry for compat 'fsl,lx2160a-clockgen'.
Signed-off-by: Tang Yuantian
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Stephen Boyd
Acked-by: Viresh Kumar
---
drivers/clk/clk-qoriq.c | 12
drivers/cpufreq/qoriq-cpufreq.c | 1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index e75194a..cfd14ef 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -570,6 +570,17 @@ static const struct clockgen_chipinfo chipinfo[] = {
.flags = CG_VER3 | CG_LITTLE_ENDIAN,
},
{
+ .compat = "fsl,lx2160a-clockgen",
+ .cmux_groups = {
+ _cmux_cga12, _cmux_cgb
+ },
+ .cmux_to_group = {
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
+ },
+ .pll_mask = 0x37,
+ .flags = CG_VER3 | CG_LITTLE_ENDIAN,
+ },
+ {
.compat = "fsl,p2041-clockgen",
.guts_compat = "fsl,qoriq-device-config-1.0",
.init_periph = p2041_init_periph,
@@ -1435,6 +1446,7 @@ CLK_OF_DECLARE(qoriq_clockgen_t1023,
"fsl,t1023-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_t1040, "fsl,t1040-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_t2080, "fsl,t2080-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_t4240, "fsl,t4240-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen", clockgen_init);
/* Legacy nodes */
CLK_OF_DECLARE(qoriq_sysclk_1, "fsl,qoriq-sysclk-1.0", sysclk_init);
diff --git a/drivers/cpufreq/qoriq-cpufreq.c b/drivers/cpufreq/qoriq-cpufreq.c
index 3d773f6..83921b7 100644
--- a/drivers/cpufreq/qoriq-cpufreq.c
+++ b/drivers/cpufreq/qoriq-cpufreq.c
@@ -295,6 +295,7 @@ static const struct of_device_id node_matches[] __initconst
= {
{ .compatible = "fsl,ls1046a-clockgen", },
{ .compatible = "fsl,ls1088a-clockgen", },
{ .compatible = "fsl,ls2080a-clockgen", },
+ { .compatible = "fsl,lx2160a-clockgen", },
{ .compatible = "fsl,p4080-clockgen", },
{ .compatible = "fsl,qoriq-clockgen-1.0", },
{ .compatible = "fsl,qoriq-clockgen-2.0", },
--
2.7.4
[PATCH 3/4] clk: qoriq: increase array size of cmux_to_group
From: Yogesh Gaur
Increase size of cmux_to_group array, to accomdate entry of
-1 termination.
Added -1, terminated, entry for 4080_cmux_grpX.
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Stephen Boyd
---
drivers/clk/clk-qoriq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 5baa9e0..e75194a 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -79,7 +79,7 @@ struct clockgen_chipinfo {
const struct clockgen_muxinfo *cmux_groups[2];
const struct clockgen_muxinfo *hwaccel[NUM_HWACCEL];
void (*init_periph)(struct clockgen *cg);
- int cmux_to_group[NUM_CMUX]; /* -1 terminates if fewer than NUM_CMUX */
+ int cmux_to_group[NUM_CMUX+1]; /* array should be -1 terminated */
u32 pll_mask; /* 1 << n bit set if PLL n is valid */
u32 flags; /* CG_xxx */
};
@@ -601,7 +601,7 @@ static const struct clockgen_chipinfo chipinfo[] = {
_cmux_grp1, _cmux_grp2
},
.cmux_to_group = {
- 0, 0, 0, 0, 1, 1, 1, 1
+ 0, 0, 0, 0, 1, 1, 1, 1, -1
},
.pll_mask = 0x1f,
},
--
2.7.4
[PATCH 0/4] arm64: dts: NXP: add basic dts file for LX2160A SoC
These patches were reviewed and acked but dropped during merge window. Patchwork link was https://lore.kernel.org/patchwork/cover/1004155/ Vabhav Sharma (2): dt-bindings: arm64: add compatible for LX2160A soc/fsl/guts: Add definition for LX2160A Yogesh Gaur (2): clk: qoriq: increase array size of cmux_to_group clk: qoriq: Add clockgen support for lx2160a .../bindings/arm/freescale/fsl,layerscape-dcfg.txt | 2 +- Documentation/devicetree/bindings/arm/fsl.txt| 12 Documentation/devicetree/bindings/clock/qoriq-clock.txt | 1 + drivers/clk/clk-qoriq.c | 16 ++-- drivers/cpufreq/qoriq-cpufreq.c | 1 + drivers/soc/fsl/guts.c | 6 ++ 6 files changed, 35 insertions(+), 3 deletions(-) -- 2.7.4
[PATCH 2/4] soc/fsl/guts: Add definition for LX2160A
Adding compatible string "lx2160a-dcfg" to
initialize guts driver for lx2160 and SoC die
attribute definition for LX2160A
Signed-off-by: Vabhav Sharma
Signed-off-by: Yinbo Zhu
Acked-by: Li Yang
---
drivers/soc/fsl/guts.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c
index 302e0c8..bcab1ee 100644
--- a/drivers/soc/fsl/guts.c
+++ b/drivers/soc/fsl/guts.c
@@ -100,6 +100,11 @@ static const struct fsl_soc_die_attr fsl_soc_die[] = {
.svr = 0x8700,
.mask = 0xfff7,
},
+ /* Die: LX2160A, SoC: LX2160A/LX2120A/LX2080A */
+ { .die = "LX2160A",
+ .svr = 0x8736,
+ .mask = 0xff3f,
+ },
{ },
};
@@ -222,6 +227,7 @@ static const struct of_device_id fsl_guts_of_match[] = {
{ .compatible = "fsl,ls1088a-dcfg", },
{ .compatible = "fsl,ls1012a-dcfg", },
{ .compatible = "fsl,ls1046a-dcfg", },
+ { .compatible = "fsl,lx2160a-dcfg", },
{}
};
MODULE_DEVICE_TABLE(of, fsl_guts_of_match);
--
2.7.4
[PATCH 1/4] dt-bindings: arm64: add compatible for LX2160A
Add compatible for LX2160A SoC,QDS and RDB board Add lx2160a compatible for clockgen and dcfg Signed-off-by: Vabhav Sharma Reviewed-by: Rob Herring --- .../bindings/arm/freescale/fsl,layerscape-dcfg.txt | 2 +- Documentation/devicetree/bindings/arm/fsl.txt| 12 Documentation/devicetree/bindings/clock/qoriq-clock.txt | 1 + 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt index b5cb374..dc76046 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt @@ -8,7 +8,7 @@ Required properties: - compatible: Should contain a chip-specific compatible string, Chip-specific strings are of the form "fsl,-dcfg", The following s are known to be supported: - ls1012a, ls1021a, ls1043a, ls1046a, ls2080a. + ls1012a, ls1021a, ls1043a, ls1046a, ls2080a, lx2160a. - reg : should contain base address and length of DCFG memory-mapped registers diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt index 7fbc424..baef162 100644 --- a/Documentation/devicetree/bindings/arm/fsl.txt +++ b/Documentation/devicetree/bindings/arm/fsl.txt @@ -235,3 +235,15 @@ Required root node properties: LS2088A ARMv8 based RDB Board Required root node properties: - compatible = "fsl,ls2088a-rdb", "fsl,ls2088a"; + +LX2160A SoC +Required root node properties: +- compatible = "fsl,lx2160a"; + +LX2160A ARMv8 based QDS Board +Required root node properties: +- compatible = "fsl,lx2160a-qds", "fsl,lx2160a"; + +LX2160A ARMv8 based RDB Board +Required root node properties: +- compatible = "fsl,lx2160a-rdb", "fsl,lx2160a"; diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt index c655f28..f322989 100644 --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt @@ -43,6 +43,7 @@ Required properties: * "fsl,ls1046a-clockgen" * "fsl,ls1088a-clockgen" * "fsl,ls2080a-clockgen" + * "fsl,lx2160a-clockgen" Chassis-version clock strings include: * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks * "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks -- 2.7.4
[PATCH v4 0/6] arm64: dts: NXP: add basic dts file for LX2160A SoC
Changes for v4: -Updated bindings for lx2160a clockgen and dcfg -Modified commit message for lx2160a clockgen changes -Updated interrupt property with macro definition -Added required enable-method property to each core node with psci value -Removed unused node syscon in device tree -Removed blank lines in device tree fsl-lx2160a.dtsi -Updated uart node compatible sbsa-uart first -Added and defined vcc-supply property to temperature sensor node in device tree fsl-lx2160a-rdb.dts Changes for v3: -Split clockgen support patch into below two patches: - a)Updated array size of cmux_to_group[] with NUM_CMUX+1 to include -1 terminator and p4080 cmux_to_group[] array with -1 terminator - b)Add clockgen support for lx2160a Changes for v2: - Modified cmux_to_group array to include -1 terminator - Revert NUM_CMUX to original value 8 from 16 - Remove “As LX2160A is 16 core, so modified value for NUM_CMUX” in patch "[PATCH 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a" description - Populated cache properties for L1 and L2 cache in lx2160a device-tree. - Removed reboot node from lx2160a device-tree as PSCI is implemented. - Removed incorrect comment for timer node interrupt property in lx2160a device-tree. - Modified pmu node compatible property from "arm,armv8-pmuv3" to "arm,cortex-a72-pmu" in lx2160a device-tree - Non-standard aliases removed in lx2160a rdb board device-tree - Updated i2c child nodes to generic name in lx2160a rdb device-tree. Changes for v1: - Add compatible string for LX2160A clockgen support - Add compatible string to initialize LX2160A guts driver - Add compatible string for LX2160A support in dt-bindings - Add dts file to enable support for LX2160A SoC and LX2160A RDB (Reference design board) Vabhav Sharma (4): dt-bindings: arm64: add compatible for LX2160A soc/fsl/guts: Add compatible string for LX2160A arm64: dts: add QorIQ LX2160A SoC support arm64: dts: add LX2160ARDB board support Yogesh Gaur (2): clk: qoriq: increase array size of cmux_to_group clk: qoriq: Add clockgen support for lx2160a Documentation/devicetree/bindings/arm/fsl.txt | 14 +- .../devicetree/bindings/clock/qoriq-clock.txt | 1 + arch/arm64/boot/dts/freescale/Makefile | 1 + arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 100 +++ arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 702 + drivers/clk/clk-qoriq.c| 16 +- drivers/cpufreq/qoriq-cpufreq.c| 1 + drivers/soc/fsl/guts.c | 1 + 8 files changed, 833 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi -- 2.7.4
[PATCH v4 0/6] arm64: dts: NXP: add basic dts file for LX2160A SoC
Changes for v4: -Updated bindings for lx2160a clockgen and dcfg -Modified commit message for lx2160a clockgen changes -Updated interrupt property with macro definition -Added required enable-method property to each core node with psci value -Removed unused node syscon in device tree -Removed blank lines in device tree fsl-lx2160a.dtsi -Updated uart node compatible sbsa-uart first -Added and defined vcc-supply property to temperature sensor node in device tree fsl-lx2160a-rdb.dts Changes for v3: -Split clockgen support patch into below two patches: - a)Updated array size of cmux_to_group[] with NUM_CMUX+1 to include -1 terminator and p4080 cmux_to_group[] array with -1 terminator - b)Add clockgen support for lx2160a Changes for v2: - Modified cmux_to_group array to include -1 terminator - Revert NUM_CMUX to original value 8 from 16 - Remove “As LX2160A is 16 core, so modified value for NUM_CMUX” in patch "[PATCH 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a" description - Populated cache properties for L1 and L2 cache in lx2160a device-tree. - Removed reboot node from lx2160a device-tree as PSCI is implemented. - Removed incorrect comment for timer node interrupt property in lx2160a device-tree. - Modified pmu node compatible property from "arm,armv8-pmuv3" to "arm,cortex-a72-pmu" in lx2160a device-tree - Non-standard aliases removed in lx2160a rdb board device-tree - Updated i2c child nodes to generic name in lx2160a rdb device-tree. Changes for v1: - Add compatible string for LX2160A clockgen support - Add compatible string to initialize LX2160A guts driver - Add compatible string for LX2160A support in dt-bindings - Add dts file to enable support for LX2160A SoC and LX2160A RDB (Reference design board) Vabhav Sharma (4): dt-bindings: arm64: add compatible for LX2160A soc/fsl/guts: Add compatible string for LX2160A arm64: dts: add QorIQ LX2160A SoC support arm64: dts: add LX2160ARDB board support Yogesh Gaur (2): clk: qoriq: increase array size of cmux_to_group clk: qoriq: Add clockgen support for lx2160a Documentation/devicetree/bindings/arm/fsl.txt | 14 +- .../devicetree/bindings/clock/qoriq-clock.txt | 1 + arch/arm64/boot/dts/freescale/Makefile | 1 + arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 100 +++ arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 702 + drivers/clk/clk-qoriq.c| 16 +- drivers/cpufreq/qoriq-cpufreq.c| 1 + drivers/soc/fsl/guts.c | 1 + 8 files changed, 833 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi -- 2.7.4
[PATCH v3 2/6] soc/fsl/guts: Add compatible string for LX2160A
Adding compatible string "lx2160a-dcfg" to
initialize guts driver for lx2160
Signed-off-by: Vabhav Sharma
---
drivers/soc/fsl/guts.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c
index 302e0c8..5e1e633 100644
--- a/drivers/soc/fsl/guts.c
+++ b/drivers/soc/fsl/guts.c
@@ -222,6 +222,7 @@ static const struct of_device_id fsl_guts_of_match[] = {
{ .compatible = "fsl,ls1088a-dcfg", },
{ .compatible = "fsl,ls1012a-dcfg", },
{ .compatible = "fsl,ls1046a-dcfg", },
+ { .compatible = "fsl,lx2160a-dcfg", },
{}
};
MODULE_DEVICE_TABLE(of, fsl_guts_of_match);
--
2.7.4
[PATCH v3 2/6] soc/fsl/guts: Add compatible string for LX2160A
Adding compatible string "lx2160a-dcfg" to
initialize guts driver for lx2160
Signed-off-by: Vabhav Sharma
---
drivers/soc/fsl/guts.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c
index 302e0c8..5e1e633 100644
--- a/drivers/soc/fsl/guts.c
+++ b/drivers/soc/fsl/guts.c
@@ -222,6 +222,7 @@ static const struct of_device_id fsl_guts_of_match[] = {
{ .compatible = "fsl,ls1088a-dcfg", },
{ .compatible = "fsl,ls1012a-dcfg", },
{ .compatible = "fsl,ls1046a-dcfg", },
+ { .compatible = "fsl,lx2160a-dcfg", },
{}
};
MODULE_DEVICE_TABLE(of, fsl_guts_of_match);
--
2.7.4
[PATCH v3 0/6] arm64: dts: NXP: add basic dts file for LX2160A SoC
Changes for v3: -Split clockgen support patch into below two patches: - a)Updated array size of cmux_to_group[] with NUM_CMUX+1 to include -1 terminator and p4080 cmux_to_group[] array with -1 terminator - b)Add clockgen support for lx2160a Changes for v2: - Modified cmux_to_group array to include -1 terminator - Revert NUM_CMUX to original value 8 from 16 - Remove “As LX2160A is 16 core, so modified value for NUM_CMUX” in patch "[PATCH 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a" description - Populated cache properties for L1 and L2 cache in lx2160a device-tree. - Removed reboot node from lx2160a device-tree as PSCI is implemented. - Removed incorrect comment for timer node interrupt property in lx2160a device-tree. - Modified pmu node compatible property from "arm,armv8-pmuv3" to "arm,cortex-a72-pmu" in lx2160a device-tree - Non-standard aliases removed in lx2160a rdb board device-tree - Updated i2c child nodes to generic name in lx2160a rdb device-tree. Changes for v1: - Add compatible string for LX2160A clockgen support - Add compatible string to initialize LX2160A guts driver - Add compatible string for LX2160A support in dt-bindings - Add dts file to enable support for LX2160A SoC and LX2160A RDB (Reference design board) Vabhav Sharma (4): dt-bindings: arm64: add compatible for LX2160A soc/fsl/guts: Add compatible string for LX2160A arm64: dts: add QorIQ LX2160A SoC support arm64: dts: add LX2160ARDB board support Yogesh Gaur (2): drivers: clk-qoriq: increase array size of cmux_to_group drivers: clk-qoriq: Add clockgen support for lx2160a Documentation/devicetree/bindings/arm/fsl.txt | 12 + arch/arm64/boot/dts/freescale/Makefile| 1 + arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 88 +++ arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi| 693 ++ drivers/clk/clk-qoriq.c | 16 +- drivers/cpufreq/qoriq-cpufreq.c | 1 + drivers/soc/fsl/guts.c| 1 + 7 files changed, 810 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi -- 2.7.4
[PATCH v3 0/6] arm64: dts: NXP: add basic dts file for LX2160A SoC
Changes for v3: -Split clockgen support patch into below two patches: - a)Updated array size of cmux_to_group[] with NUM_CMUX+1 to include -1 terminator and p4080 cmux_to_group[] array with -1 terminator - b)Add clockgen support for lx2160a Changes for v2: - Modified cmux_to_group array to include -1 terminator - Revert NUM_CMUX to original value 8 from 16 - Remove “As LX2160A is 16 core, so modified value for NUM_CMUX” in patch "[PATCH 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a" description - Populated cache properties for L1 and L2 cache in lx2160a device-tree. - Removed reboot node from lx2160a device-tree as PSCI is implemented. - Removed incorrect comment for timer node interrupt property in lx2160a device-tree. - Modified pmu node compatible property from "arm,armv8-pmuv3" to "arm,cortex-a72-pmu" in lx2160a device-tree - Non-standard aliases removed in lx2160a rdb board device-tree - Updated i2c child nodes to generic name in lx2160a rdb device-tree. Changes for v1: - Add compatible string for LX2160A clockgen support - Add compatible string to initialize LX2160A guts driver - Add compatible string for LX2160A support in dt-bindings - Add dts file to enable support for LX2160A SoC and LX2160A RDB (Reference design board) Vabhav Sharma (4): dt-bindings: arm64: add compatible for LX2160A soc/fsl/guts: Add compatible string for LX2160A arm64: dts: add QorIQ LX2160A SoC support arm64: dts: add LX2160ARDB board support Yogesh Gaur (2): drivers: clk-qoriq: increase array size of cmux_to_group drivers: clk-qoriq: Add clockgen support for lx2160a Documentation/devicetree/bindings/arm/fsl.txt | 12 + arch/arm64/boot/dts/freescale/Makefile| 1 + arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 88 +++ arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi| 693 ++ drivers/clk/clk-qoriq.c | 16 +- drivers/cpufreq/qoriq-cpufreq.c | 1 + drivers/soc/fsl/guts.c| 1 + 7 files changed, 810 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi -- 2.7.4
RE: [PATCH v2 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a
> -Original Message-
> From: Scott Wood
> Sent: Sunday, September 16, 2018 12:54 AM
> To: Vabhav Sharma ; sudeep.ho...@arm.com; linux-
> ker...@vger.kernel.org; devicet...@vger.kernel.org; robh...@kernel.org;
> mark.rutl...@arm.com; linuxppc-...@lists.ozlabs.org; linux-arm-
> ker...@lists.infradead.org; mturque...@baylibre.com; sb...@kernel.org;
> r...@rjwysocki.net; viresh.ku...@linaro.org; linux-...@vger.kernel.org; linux-
> p...@vger.kernel.org; linux-kernel-ow...@vger.kernel.org;
> catalin.mari...@arm.com; will.dea...@arm.com;
> gre...@linuxfoundation.org; a...@arndb.de; kstew...@linuxfoundation.org;
> yamada.masah...@socionext.com
> Cc: li...@armlinux.org.uk; Varun Sethi ; Udit Kumar
> ; Yogesh Narayan Gaur
> ; Andy Tang
> Subject: Re: [PATCH v2 3/5] drivers: clk-qoriq: Add clockgen support for
> lx2160a
>
> On Fri, 2018-09-14 at 02:07 +0530, Vabhav Sharma wrote:
> > From: Yogesh Gaur
> >
> > Add clockgen support for lx2160a.
> > Added entry for compat 'fsl,lx2160a-clockgen'.
> >
> > Signed-off-by: Tang Yuantian
> > Signed-off-by: Yogesh Gaur
> > Signed-off-by: Vabhav Sharma
> > Acked-by: Stephen Boyd
> > ---
> > drivers/clk/clk-qoriq.c | 14 +-
> > drivers/cpufreq/qoriq-cpufreq.c | 1 +
> > 2 files changed, 14 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index
> > 3a1812f..e9ae70b 100644
> > --- a/drivers/clk/clk-qoriq.c
> > +++ b/drivers/clk/clk-qoriq.c
> > @@ -79,7 +79,7 @@ struct clockgen_chipinfo {
> > const struct clockgen_muxinfo *cmux_groups[2];
> > const struct clockgen_muxinfo *hwaccel[NUM_HWACCEL];
> > void (*init_periph)(struct clockgen *cg);
> > - int cmux_to_group[NUM_CMUX]; /* -1 terminates if fewer than
> > NUM_CMUX */
> > + int cmux_to_group[NUM_CMUX+1]; /* -1 terminate if fewer to
> > NUM_CMUX+1 */
>
> You need to add the -1 terminator to p4080, and remove the "if fewer"
> comment since the whole point of this is that every array gets -1 terminated.
Ok, Updated
>
> Why did you change "terminates" to "terminate" and "than" to "to"?
>
> This +1 change should be a separate patch from lx2160a support.
Sure, Sending as separate patch
>
> -Scott
RE: [PATCH v2 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a
> -Original Message-
> From: Scott Wood
> Sent: Sunday, September 16, 2018 12:54 AM
> To: Vabhav Sharma ; sudeep.ho...@arm.com; linux-
> ker...@vger.kernel.org; devicet...@vger.kernel.org; robh...@kernel.org;
> mark.rutl...@arm.com; linuxppc-...@lists.ozlabs.org; linux-arm-
> ker...@lists.infradead.org; mturque...@baylibre.com; sb...@kernel.org;
> r...@rjwysocki.net; viresh.ku...@linaro.org; linux-...@vger.kernel.org; linux-
> p...@vger.kernel.org; linux-kernel-ow...@vger.kernel.org;
> catalin.mari...@arm.com; will.dea...@arm.com;
> gre...@linuxfoundation.org; a...@arndb.de; kstew...@linuxfoundation.org;
> yamada.masah...@socionext.com
> Cc: li...@armlinux.org.uk; Varun Sethi ; Udit Kumar
> ; Yogesh Narayan Gaur
> ; Andy Tang
> Subject: Re: [PATCH v2 3/5] drivers: clk-qoriq: Add clockgen support for
> lx2160a
>
> On Fri, 2018-09-14 at 02:07 +0530, Vabhav Sharma wrote:
> > From: Yogesh Gaur
> >
> > Add clockgen support for lx2160a.
> > Added entry for compat 'fsl,lx2160a-clockgen'.
> >
> > Signed-off-by: Tang Yuantian
> > Signed-off-by: Yogesh Gaur
> > Signed-off-by: Vabhav Sharma
> > Acked-by: Stephen Boyd
> > ---
> > drivers/clk/clk-qoriq.c | 14 +-
> > drivers/cpufreq/qoriq-cpufreq.c | 1 +
> > 2 files changed, 14 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index
> > 3a1812f..e9ae70b 100644
> > --- a/drivers/clk/clk-qoriq.c
> > +++ b/drivers/clk/clk-qoriq.c
> > @@ -79,7 +79,7 @@ struct clockgen_chipinfo {
> > const struct clockgen_muxinfo *cmux_groups[2];
> > const struct clockgen_muxinfo *hwaccel[NUM_HWACCEL];
> > void (*init_periph)(struct clockgen *cg);
> > - int cmux_to_group[NUM_CMUX]; /* -1 terminates if fewer than
> > NUM_CMUX */
> > + int cmux_to_group[NUM_CMUX+1]; /* -1 terminate if fewer to
> > NUM_CMUX+1 */
>
> You need to add the -1 terminator to p4080, and remove the "if fewer"
> comment since the whole point of this is that every array gets -1 terminated.
Ok, Updated
>
> Why did you change "terminates" to "terminate" and "than" to "to"?
>
> This +1 change should be a separate patch from lx2160a support.
Sure, Sending as separate patch
>
> -Scott
