Re: [PATCH v5 06/14] irqchip: gicv3-its: platform-msi: refactor its_pmsi_init() to prepare for ACPI
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo <hanjun@linaro.org>
Introduce its_pmsi_init_one() to refactor the code to isolate
ACPI common code to prepare for ACPI later.
Signed-off-by: Hanjun Guo <hanjun@linaro.org>
Tested-by: Sinan Kaya <ok...@codeaurora.org>
Cc: Marc Zyngier <marc.zyng...@arm.com>
Cc: Tomasz Nowicki <t...@semihalf.com>
Cc: Thomas Gleixner <t...@linutronix.de>
---
drivers/irqchip/irq-gic-v3-its-platform-msi.c | 45 ---
1 file changed, 27 insertions(+), 18 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
index 16587a9..ff72704 100644
--- a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
@@ -84,34 +84,43 @@ static int its_pmsi_prepare(struct irq_domain *domain,
struct device *dev,
{},
};
-static int __init its_pmsi_init(void)
+static int __init its_pmsi_init_one(struct fwnode_handle *fwnode,
+ const char *name)
{
- struct device_node *np;
struct irq_domain *parent;
+ parent = irq_find_matching_fwnode(fwnode, DOMAIN_BUS_NEXUS);
+ if (!parent || !msi_get_domain_info(parent)) {
+ pr_err("%s: unable to locate ITS domain\n", name);
+ return -ENXIO;
+ }
+
+ if (!platform_msi_create_irq_domain(fwnode, _pmsi_domain_info,
+ parent)) {
+ pr_err("%s: unable to create platform domain\n", name);
+ return -ENXIO;
+ }
+
+ pr_info("Platform MSI: %s domain created\n", name);
+ return 0;
+}
+
+static void __init its_pmsi_of_init(void)
+{
+ struct device_node *np;
+
for (np = of_find_matching_node(NULL, its_device_id); np;
np = of_find_matching_node(np, its_device_id)) {
if (!of_property_read_bool(np, "msi-controller"))
continue;
- parent = irq_find_matching_host(np, DOMAIN_BUS_NEXUS);
- if (!parent || !msi_get_domain_info(parent)) {
- pr_err("%s: unable to locate ITS domain\n",
- np->full_name);
- continue;
- }
-
- if (!platform_msi_create_irq_domain(of_node_to_fwnode(np),
- _pmsi_domain_info,
- parent)) {
- pr_err("%s: unable to create platform domain\n",
- np->full_name);
- continue;
- }
-
- pr_info("Platform MSI: %s domain created\n", np->full_name);
+ its_pmsi_init_one(of_node_to_fwnode(np), np->full_name);
}
+}
+static int __init its_pmsi_init(void)
+{
+ its_pmsi_of_init();
return 0;
}
early_initcall(its_pmsi_init);
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 06/14] irqchip: gicv3-its: platform-msi: refactor its_pmsi_init() to prepare for ACPI
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo
Introduce its_pmsi_init_one() to refactor the code to isolate
ACPI common code to prepare for ACPI later.
Signed-off-by: Hanjun Guo
Tested-by: Sinan Kaya
Cc: Marc Zyngier
Cc: Tomasz Nowicki
Cc: Thomas Gleixner
---
drivers/irqchip/irq-gic-v3-its-platform-msi.c | 45 ---
1 file changed, 27 insertions(+), 18 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
index 16587a9..ff72704 100644
--- a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
@@ -84,34 +84,43 @@ static int its_pmsi_prepare(struct irq_domain *domain,
struct device *dev,
{},
};
-static int __init its_pmsi_init(void)
+static int __init its_pmsi_init_one(struct fwnode_handle *fwnode,
+ const char *name)
{
- struct device_node *np;
struct irq_domain *parent;
+ parent = irq_find_matching_fwnode(fwnode, DOMAIN_BUS_NEXUS);
+ if (!parent || !msi_get_domain_info(parent)) {
+ pr_err("%s: unable to locate ITS domain\n", name);
+ return -ENXIO;
+ }
+
+ if (!platform_msi_create_irq_domain(fwnode, _pmsi_domain_info,
+ parent)) {
+ pr_err("%s: unable to create platform domain\n", name);
+ return -ENXIO;
+ }
+
+ pr_info("Platform MSI: %s domain created\n", name);
+ return 0;
+}
+
+static void __init its_pmsi_of_init(void)
+{
+ struct device_node *np;
+
for (np = of_find_matching_node(NULL, its_device_id); np;
np = of_find_matching_node(np, its_device_id)) {
if (!of_property_read_bool(np, "msi-controller"))
continue;
- parent = irq_find_matching_host(np, DOMAIN_BUS_NEXUS);
- if (!parent || !msi_get_domain_info(parent)) {
- pr_err("%s: unable to locate ITS domain\n",
- np->full_name);
- continue;
- }
-
- if (!platform_msi_create_irq_domain(of_node_to_fwnode(np),
- _pmsi_domain_info,
- parent)) {
- pr_err("%s: unable to create platform domain\n",
- np->full_name);
- continue;
- }
-
- pr_info("Platform MSI: %s domain created\n", np->full_name);
+ its_pmsi_init_one(of_node_to_fwnode(np), np->full_name);
}
+}
+static int __init its_pmsi_init(void)
+{
+ its_pmsi_of_init();
return 0;
}
early_initcall(its_pmsi_init);
Tested-by: Xinwei Kong
Re: [PATCH v5 11/14] msi: platform: make platform_msi_create_device_domain() ACPI aware
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo <hanjun@linaro.org>
With the platform msi domain created for ITS, irqchip such as
mbi-gen connecting ITS, which needs ctreate its own irqdomain.
Fortunately with the platform msi support upstreamed by Marc,
we just need to add minor code to make it run properly.
platform_msi_create_device_domain() is almost ready for ACPI use
except of_node_to_fwnode() is for dt only, make it ACPI aware then
things will work in both DTS and ACPI.
Signed-off-by: Hanjun Guo <hanjun@linaro.org>
Cc: Marc Zyngier <marc.zyng...@arm.com>
Cc: Greg KH <gre...@linuxfoundation.org>
Cc: Thomas Gleixner <t...@linutronix.de>
Cc: Greg KH <gre...@linuxfoundation.org>
---
drivers/base/platform-msi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/base/platform-msi.c b/drivers/base/platform-msi.c
index be6a599..035ca3b 100644
--- a/drivers/base/platform-msi.c
+++ b/drivers/base/platform-msi.c
@@ -345,8 +345,7 @@ struct irq_domain *
data->host_data = host_data;
domain = irq_domain_create_hierarchy(dev->msi_domain, 0, nvec,
-of_node_to_fwnode(dev->of_node),
-ops, data);
+dev->fwnode, ops, data);
if (!domain)
goto free_priv;
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 11/14] msi: platform: make platform_msi_create_device_domain() ACPI aware
On 2016/12/22 13:35, Hanjun Guo wrote: From: Hanjun Guo With the platform msi domain created for ITS, irqchip such as mbi-gen connecting ITS, which needs ctreate its own irqdomain. Fortunately with the platform msi support upstreamed by Marc, we just need to add minor code to make it run properly. platform_msi_create_device_domain() is almost ready for ACPI use except of_node_to_fwnode() is for dt only, make it ACPI aware then things will work in both DTS and ACPI. Signed-off-by: Hanjun Guo Cc: Marc Zyngier Cc: Greg KH Cc: Thomas Gleixner Cc: Greg KH --- drivers/base/platform-msi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/base/platform-msi.c b/drivers/base/platform-msi.c index be6a599..035ca3b 100644 --- a/drivers/base/platform-msi.c +++ b/drivers/base/platform-msi.c @@ -345,8 +345,7 @@ struct irq_domain * data->host_data = host_data; domain = irq_domain_create_hierarchy(dev->msi_domain, 0, nvec, -of_node_to_fwnode(dev->of_node), -ops, data); +dev->fwnode, ops, data); if (!domain) goto free_priv; Tested-by: Xinwei Kong
Re: [PATCH v5 09/14] ACPI: platform: setup MSI domain for ACPI based platform device
00644
--- a/include/linux/acpi_iort.h
+++ b/include/linux/acpi_iort.h
@@ -38,6 +38,7 @@
/* IOMMU interface */
void iort_set_dma_mask(struct device *dev);
const struct iommu_ops *iort_iommu_configure(struct device *dev);
+void acpi_configure_pmsi_domain(struct device *dev);
#else
static inline void acpi_iort_init(void) { }
static inline bool iort_node_match(u8 type) { return false; }
@@ -58,6 +59,8 @@ static inline void iort_set_dma_mask(struct device *dev) { }
static inline
const struct iommu_ops *iort_iommu_configure(struct device *dev)
{ return NULL; }
+
+static inline void acpi_configure_pmsi_domain(struct device *dev) { }
#endif
#define IORT_ACPI_DECLARE(name, table_id, fn) \
diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h
index 98c2a7c..280d366fb 100644
--- a/include/linux/platform_device.h
+++ b/include/linux/platform_device.h
@@ -74,6 +74,9 @@ struct platform_device_info {
u64 dma_mask;
struct property_entry *properties;
+
+ /* preparation callback before the platform device is added */
+ void (*pre_add_cb)(struct device *);
};
extern struct platform_device *platform_device_register_full(
const struct platform_device_info *pdevinfo);
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 09/14] ACPI: platform: setup MSI domain for ACPI based platform device
ce *dev);
+void acpi_configure_pmsi_domain(struct device *dev);
#else
static inline void acpi_iort_init(void) { }
static inline bool iort_node_match(u8 type) { return false; }
@@ -58,6 +59,8 @@ static inline void iort_set_dma_mask(struct device *dev) { }
static inline
const struct iommu_ops *iort_iommu_configure(struct device *dev)
{ return NULL; }
+
+static inline void acpi_configure_pmsi_domain(struct device *dev) { }
#endif
#define IORT_ACPI_DECLARE(name, table_id, fn) \
diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h
index 98c2a7c..280d366fb 100644
--- a/include/linux/platform_device.h
+++ b/include/linux/platform_device.h
@@ -74,6 +74,9 @@ struct platform_device_info {
u64 dma_mask;
struct property_entry *properties;
+
+ /* preparation callback before the platform device is added */
+ void (*pre_add_cb)(struct device *);
};
extern struct platform_device *platform_device_register_full(
const struct platform_device_info *pdevinfo);
Tested-by: Xinwei Kong
Re: [PATCH v5 13/14] irqchip: mbigen: introduce mbigen_of_create_domain()
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Kefeng Wang <wangkefeng.w...@huawei.com>
Introduce mbigen_of_create_domain() to consolidate OF related
code and prepare for ACPI later, no funtional change.
Signed-off-by: Kefeng Wang <wangkefeng.w...@huawei.com>
Signed-off-by: Hanjun Guo <hanjun@linaro.org>
Cc: Marc Zyngier <marc.zyng...@arm.com>
Cc: Thomas Gleixner <t...@linutronix.de>
Cc: Ma Jun <majun...@huawei.com>
---
drivers/irqchip/irq-mbigen.c | 42 +++---
1 file changed, 27 insertions(+), 15 deletions(-)
diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
index c01ab41..4e11da5 100644
--- a/drivers/irqchip/irq-mbigen.c
+++ b/drivers/irqchip/irq-mbigen.c
@@ -236,27 +236,15 @@ static int mbigen_irq_domain_alloc(struct irq_domain
*domain,
.free = irq_domain_free_irqs_common,
};
-static int mbigen_device_probe(struct platform_device *pdev)
+static int mbigen_of_create_domain(struct platform_device *pdev,
+ struct mbigen_device *mgn_chip)
{
- struct mbigen_device *mgn_chip;
+ struct device *parent;
struct platform_device *child;
struct irq_domain *domain;
struct device_node *np;
- struct device *parent;
- struct resource *res;
u32 num_pins;
- mgn_chip = devm_kzalloc(>dev, sizeof(*mgn_chip), GFP_KERNEL);
- if (!mgn_chip)
- return -ENOMEM;
-
- mgn_chip->pdev = pdev;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- mgn_chip->base = devm_ioremap_resource(>dev, res);
- if (IS_ERR(mgn_chip->base))
- return PTR_ERR(mgn_chip->base);
-
for_each_child_of_node(pdev->dev.of_node, np) {
if (!of_property_read_bool(np, "interrupt-controller"))
continue;
@@ -280,6 +268,30 @@ static int mbigen_device_probe(struct platform_device
*pdev)
return -ENOMEM;
}
+ return 0;
+}
+
+static int mbigen_device_probe(struct platform_device *pdev)
+{
+ struct mbigen_device *mgn_chip;
+ struct resource *res;
+ int err;
+
+ mgn_chip = devm_kzalloc(>dev, sizeof(*mgn_chip), GFP_KERNEL);
+ if (!mgn_chip)
+ return -ENOMEM;
+
+ mgn_chip->pdev = pdev;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mgn_chip->base = devm_ioremap(>dev, res->start,
resource_size(res));
+ if (IS_ERR(mgn_chip->base))
+ return PTR_ERR(mgn_chip->base);
+
+ err = mbigen_of_create_domain(pdev, mgn_chip);
+ if (err)
+ return err;
+
platform_set_drvdata(pdev, mgn_chip);
return 0;
}
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 13/14] irqchip: mbigen: introduce mbigen_of_create_domain()
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Kefeng Wang
Introduce mbigen_of_create_domain() to consolidate OF related
code and prepare for ACPI later, no funtional change.
Signed-off-by: Kefeng Wang
Signed-off-by: Hanjun Guo
Cc: Marc Zyngier
Cc: Thomas Gleixner
Cc: Ma Jun
---
drivers/irqchip/irq-mbigen.c | 42 +++---
1 file changed, 27 insertions(+), 15 deletions(-)
diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
index c01ab41..4e11da5 100644
--- a/drivers/irqchip/irq-mbigen.c
+++ b/drivers/irqchip/irq-mbigen.c
@@ -236,27 +236,15 @@ static int mbigen_irq_domain_alloc(struct irq_domain
*domain,
.free = irq_domain_free_irqs_common,
};
-static int mbigen_device_probe(struct platform_device *pdev)
+static int mbigen_of_create_domain(struct platform_device *pdev,
+ struct mbigen_device *mgn_chip)
{
- struct mbigen_device *mgn_chip;
+ struct device *parent;
struct platform_device *child;
struct irq_domain *domain;
struct device_node *np;
- struct device *parent;
- struct resource *res;
u32 num_pins;
- mgn_chip = devm_kzalloc(>dev, sizeof(*mgn_chip), GFP_KERNEL);
- if (!mgn_chip)
- return -ENOMEM;
-
- mgn_chip->pdev = pdev;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- mgn_chip->base = devm_ioremap_resource(>dev, res);
- if (IS_ERR(mgn_chip->base))
- return PTR_ERR(mgn_chip->base);
-
for_each_child_of_node(pdev->dev.of_node, np) {
if (!of_property_read_bool(np, "interrupt-controller"))
continue;
@@ -280,6 +268,30 @@ static int mbigen_device_probe(struct platform_device
*pdev)
return -ENOMEM;
}
+ return 0;
+}
+
+static int mbigen_device_probe(struct platform_device *pdev)
+{
+ struct mbigen_device *mgn_chip;
+ struct resource *res;
+ int err;
+
+ mgn_chip = devm_kzalloc(>dev, sizeof(*mgn_chip), GFP_KERNEL);
+ if (!mgn_chip)
+ return -ENOMEM;
+
+ mgn_chip->pdev = pdev;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mgn_chip->base = devm_ioremap(>dev, res->start,
resource_size(res));
+ if (IS_ERR(mgn_chip->base))
+ return PTR_ERR(mgn_chip->base);
+
+ err = mbigen_of_create_domain(pdev, mgn_chip);
+ if (err)
+ return err;
+
platform_set_drvdata(pdev, mgn_chip);
return 0;
}
Tested-by: Xinwei Kong
Re: [PATCH v5 08/14] ACPI: ARM64: IORT: rework iort_node_get_id()
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo <hanjun@linaro.org>
iort_node_get_id() has two output, one is the mapped ids,
the other is the referenced parent node which is returned
from the function.
For now we need a API just return its parent node for
single mapping, so just update this function slightly then
reuse it later.
Signed-off-by: Hanjun Guo <hanjun@linaro.org>
Cc: Lorenzo Pieralisi <lorenzo.pieral...@arm.com>
Cc: Marc Zyngier <marc.zyng...@arm.com>
---
drivers/acpi/arm64/iort.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index ab7bae7..bc68d93 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -347,7 +347,8 @@ struct acpi_iort_node *iort_node_get_id(struct
acpi_iort_node *node,
if (map[index].flags & ACPI_IORT_ID_SINGLE_MAPPING) {
if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT ||
node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
- *id_out = map[index].output_base;
+ if (id_out)
+ *id_out = map[index].output_base;
return parent;
}
}
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 08/14] ACPI: ARM64: IORT: rework iort_node_get_id()
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo
iort_node_get_id() has two output, one is the mapped ids,
the other is the referenced parent node which is returned
from the function.
For now we need a API just return its parent node for
single mapping, so just update this function slightly then
reuse it later.
Signed-off-by: Hanjun Guo
Cc: Lorenzo Pieralisi
Cc: Marc Zyngier
---
drivers/acpi/arm64/iort.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index ab7bae7..bc68d93 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -347,7 +347,8 @@ struct acpi_iort_node *iort_node_get_id(struct
acpi_iort_node *node,
if (map[index].flags & ACPI_IORT_ID_SINGLE_MAPPING) {
if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT ||
node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
- *id_out = map[index].output_base;
+ if (id_out)
+ *id_out = map[index].output_base;
return parent;
}
}
Tested-by: Xinwei Kong
Re: [PATCH v5 02/14] irqchip: gic-v3-its: keep the head file include in alphabetic order
On 2016/12/22 13:35, Hanjun Guo wrote: From: Hanjun Guo <hanjun@linaro.org> The head file is strictly in alphabetic order now, so let's be the rule breaker. As acpi_iort.h includes acpi.h so remove the duplidate acpi.h inclusion as well. Signed-off-by: Hanjun Guo <hanjun@linaro.org> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: Tomasz Nowicki <t...@semihalf.com> --- drivers/irqchip/irq-gic-v3-its.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 69b040f..f471939 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -15,14 +15,13 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ -#include +#include #include #include #include #include #include #include -#include #include #include #include Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 02/14] irqchip: gic-v3-its: keep the head file include in alphabetic order
On 2016/12/22 13:35, Hanjun Guo wrote: From: Hanjun Guo The head file is strictly in alphabetic order now, so let's be the rule breaker. As acpi_iort.h includes acpi.h so remove the duplidate acpi.h inclusion as well. Signed-off-by: Hanjun Guo Cc: Marc Zyngier Cc: Tomasz Nowicki --- drivers/irqchip/irq-gic-v3-its.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 69b040f..f471939 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -15,14 +15,13 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ -#include +#include #include #include #include #include #include #include -#include #include #include #include Tested-by: Xinwei Kong
Re: [PATCH v5 14/14] irqchip: mbigen: Add ACPI support
h);
+
static struct platform_driver mbigen_platform_driver = {
.driver = {
.name = "Hisilicon MBIGEN-V2",
.of_match_table = mbigen_of_match,
+ .acpi_match_table = ACPI_PTR(mbigen_acpi_match),
},
.probe = mbigen_device_probe,
};
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 14/14] irqchip: mbigen: Add ACPI support
uot;, .of_match_table = mbigen_of_match, + .acpi_match_table = ACPI_PTR(mbigen_acpi_match), }, .probe = mbigen_device_probe, }; Tested-by: Xinwei Kong
Re: [PATCH v5 10/14] ACPI: ARM64: IORT: rework iort_node_get_id() for NC->SMMU->ITS case
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo <hanjun@linaro.org>
iort_node_get_id() for now only support NC(named componant)->SMMU
or NC->ITS cases, we also have other device topology such NC->
SMMU->ITS, so rework iort_node_get_id() for those cases.
Signed-off-by: Hanjun Guo <hanjun@linaro.org>
Cc: Lorenzo Pieralisi <lorenzo.pieral...@arm.com>
---
drivers/acpi/arm64/iort.c | 59 ++-
1 file changed, 33 insertions(+), 26 deletions(-)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index 6b72fcb..9b3f268 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -292,22 +292,28 @@ static acpi_status iort_match_node_callback(struct
acpi_iort_node *node,
return status;
}
-static int iort_id_map(struct acpi_iort_id_mapping *map, u8 type, u32 rid_in,
- u32 *rid_out)
+static int iort_id_single_map(struct acpi_iort_id_mapping *map, u8 type,
+ u32 *rid_out)
{
/* Single mapping does not care for input id */
if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) {
if (type == ACPI_IORT_NODE_NAMED_COMPONENT ||
type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
- *rid_out = map->output_base;
+ if (rid_out)
+ *rid_out = map->output_base;
return 0;
}
pr_warn(FW_BUG "[map %p] SINGLE MAPPING flag not allowed for node type %d, skipping ID map\n",
map, type);
- return -ENXIO;
}
+ return -ENXIO;
+}
+
+static int iort_id_map(struct acpi_iort_id_mapping *map, u8 type, u32 rid_in,
+ u32 *rid_out)
+{
if (rid_in < map->input_base ||
(rid_in >= map->input_base + map->id_count))
return -ENXIO;
@@ -324,33 +330,34 @@ struct acpi_iort_node *iort_node_get_id(struct
acpi_iort_node *node,
struct acpi_iort_node *parent;
struct acpi_iort_id_mapping *map;
- if (!node->mapping_offset || !node->mapping_count ||
-index >= node->mapping_count)
- return NULL;
-
- map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
- node->mapping_offset);
+ while (node) {
+ if (!node->mapping_offset || !node->mapping_count ||
+index >= node->mapping_count)
+ return NULL;
- /* Firmware bug! */
- if (!map->output_reference) {
- pr_err(FW_BUG "[node %p type %d] ID map has NULL parent
reference\n",
- node, node->type);
- return NULL;
- }
+ map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
+ node->mapping_offset);
- parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
- map->output_reference);
+ /* Firmware bug! */
+ if (!map->output_reference) {
+ pr_err(FW_BUG "[node %p type %d] ID map has NULL parent
reference\n",
+ node, node->type);
+ return NULL;
+ }
- if (!(IORT_TYPE_MASK(parent->type) & type_mask))
- return NULL;
+ parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
+ map->output_reference);
- if (map[index].flags & ACPI_IORT_ID_SINGLE_MAPPING) {
- if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT ||
- node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
- if (id_out)
- *id_out = map[index].output_base;
- return parent;
+ /* go upstream to find its parent */
+ if (!(IORT_TYPE_MASK(parent->type) & type_mask)) {
+ node = parent;
+ continue;
}
+
+ if (iort_id_single_map([index], node->type, id_out))
+ break;
+
+ return parent;
}
return NULL;
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 12/14] irqchip: mbigen: drop module owner
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Kefeng Wang <wangkefeng.w...@huawei.com>
Module owner will be set by driver core, so drop it.
Signed-off-by: Kefeng Wang <wangkefeng.w...@huawei.com>
Signed-off-by: Hanjun Guo <hanjun@linaro.org>
Cc: Marc Zyngier <marc.zyng...@arm.com>
Cc: Thomas Gleixner <t...@linutronix.de>
Cc: Ma Jun <majun...@huawei.com>
---
drivers/irqchip/irq-mbigen.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
index 03b79b0..c01ab41 100644
--- a/drivers/irqchip/irq-mbigen.c
+++ b/drivers/irqchip/irq-mbigen.c
@@ -293,7 +293,6 @@ static int mbigen_device_probe(struct platform_device *pdev)
static struct platform_driver mbigen_platform_driver = {
.driver = {
.name = "Hisilicon MBIGEN-V2",
- .owner = THIS_MODULE,
.of_match_table = mbigen_of_match,
},
.probe = mbigen_device_probe,
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 10/14] ACPI: ARM64: IORT: rework iort_node_get_id() for NC->SMMU->ITS case
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo
iort_node_get_id() for now only support NC(named componant)->SMMU
or NC->ITS cases, we also have other device topology such NC->
SMMU->ITS, so rework iort_node_get_id() for those cases.
Signed-off-by: Hanjun Guo
Cc: Lorenzo Pieralisi
---
drivers/acpi/arm64/iort.c | 59 ++-
1 file changed, 33 insertions(+), 26 deletions(-)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index 6b72fcb..9b3f268 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -292,22 +292,28 @@ static acpi_status iort_match_node_callback(struct
acpi_iort_node *node,
return status;
}
-static int iort_id_map(struct acpi_iort_id_mapping *map, u8 type, u32 rid_in,
- u32 *rid_out)
+static int iort_id_single_map(struct acpi_iort_id_mapping *map, u8 type,
+ u32 *rid_out)
{
/* Single mapping does not care for input id */
if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) {
if (type == ACPI_IORT_NODE_NAMED_COMPONENT ||
type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
- *rid_out = map->output_base;
+ if (rid_out)
+ *rid_out = map->output_base;
return 0;
}
pr_warn(FW_BUG "[map %p] SINGLE MAPPING flag not allowed for node type %d, skipping ID map\n",
map, type);
- return -ENXIO;
}
+ return -ENXIO;
+}
+
+static int iort_id_map(struct acpi_iort_id_mapping *map, u8 type, u32 rid_in,
+ u32 *rid_out)
+{
if (rid_in < map->input_base ||
(rid_in >= map->input_base + map->id_count))
return -ENXIO;
@@ -324,33 +330,34 @@ struct acpi_iort_node *iort_node_get_id(struct
acpi_iort_node *node,
struct acpi_iort_node *parent;
struct acpi_iort_id_mapping *map;
- if (!node->mapping_offset || !node->mapping_count ||
-index >= node->mapping_count)
- return NULL;
-
- map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
- node->mapping_offset);
+ while (node) {
+ if (!node->mapping_offset || !node->mapping_count ||
+index >= node->mapping_count)
+ return NULL;
- /* Firmware bug! */
- if (!map->output_reference) {
- pr_err(FW_BUG "[node %p type %d] ID map has NULL parent
reference\n",
- node, node->type);
- return NULL;
- }
+ map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
+ node->mapping_offset);
- parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
- map->output_reference);
+ /* Firmware bug! */
+ if (!map->output_reference) {
+ pr_err(FW_BUG "[node %p type %d] ID map has NULL parent
reference\n",
+ node, node->type);
+ return NULL;
+ }
- if (!(IORT_TYPE_MASK(parent->type) & type_mask))
- return NULL;
+ parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
+ map->output_reference);
- if (map[index].flags & ACPI_IORT_ID_SINGLE_MAPPING) {
- if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT ||
- node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
- if (id_out)
- *id_out = map[index].output_base;
- return parent;
+ /* go upstream to find its parent */
+ if (!(IORT_TYPE_MASK(parent->type) & type_mask)) {
+ node = parent;
+ continue;
}
+
+ if (iort_id_single_map([index], node->type, id_out))
+ break;
+
+ return parent;
}
return NULL;
Tested-by: Xinwei Kong
Re: [PATCH v5 12/14] irqchip: mbigen: drop module owner
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Kefeng Wang
Module owner will be set by driver core, so drop it.
Signed-off-by: Kefeng Wang
Signed-off-by: Hanjun Guo
Cc: Marc Zyngier
Cc: Thomas Gleixner
Cc: Ma Jun
---
drivers/irqchip/irq-mbigen.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
index 03b79b0..c01ab41 100644
--- a/drivers/irqchip/irq-mbigen.c
+++ b/drivers/irqchip/irq-mbigen.c
@@ -293,7 +293,6 @@ static int mbigen_device_probe(struct platform_device *pdev)
static struct platform_driver mbigen_platform_driver = {
.driver = {
.name = "Hisilicon MBIGEN-V2",
- .owner = THIS_MODULE,
.of_match_table = mbigen_of_match,
},
.probe = mbigen_device_probe,
Tested-by: Xinwei Kong
Re: [PATCH v5 07/14] irqchip: gicv3-its: platform-msi: scan MADT to create platform msi domain
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo <hanjun@linaro.org>
With the introduction of its_pmsi_init_one(), we can add some code
on top for ACPI support of platform MSI.
We are scanning the MADT table to get the ITS entry(ies), then use
the information to create the platform msi domain for devices connect
to it, just like the PCI MSI for ITS did.
Signed-off-by: Hanjun Guo <hanjun@linaro.org>
Tested-by: Sinan Kaya <ok...@codeaurora.org>
Cc: Marc Zyngier <marc.zyng...@arm.com>
Cc: Tomasz Nowicki <t...@semihalf.com>
Cc: Thomas Gleixner <t...@linutronix.de>
---
drivers/irqchip/irq-gic-v3-its-platform-msi.c | 36 +++
1 file changed, 36 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
index ff72704..0be0437 100644
--- a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
@@ -105,6 +105,41 @@ static int __init its_pmsi_init_one(struct fwnode_handle
*fwnode,
return 0;
}
+#ifdef CONFIG_ACPI
+static int __init
+its_pmsi_parse_madt(struct acpi_subtable_header *header,
+ const unsigned long end)
+{
+ struct acpi_madt_generic_translator *its_entry;
+ struct fwnode_handle *domain_handle;
+ const char *node_name;
+ int err = -ENXIO;
+
+ its_entry = (struct acpi_madt_generic_translator *)header;
+ node_name = kasprintf(GFP_KERNEL, "ITS@0x%lx",
+ (long)its_entry->base_address);
+ domain_handle = iort_find_domain_token(its_entry->translation_id);
+ if (!domain_handle) {
+ pr_err("%s: Unable to locate ITS domain handle\n", node_name);
+ goto out;
+ }
+
+ err = its_pmsi_init_one(domain_handle, node_name);
+
+out:
+ kfree(node_name);
+ return err;
+}
+
+static void __init its_acpi_pmsi_init(void)
+{
+ acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,
+ its_pmsi_parse_madt, 0);
+}
+#else
+static inline void its_acpi_pmsi_init(void) { }
+#endif
+
static void __init its_pmsi_of_init(void)
{
struct device_node *np;
@@ -121,6 +156,7 @@ static void __init its_pmsi_of_init(void)
static int __init its_pmsi_init(void)
{
its_pmsi_of_init();
+ its_acpi_pmsi_init();
return 0;
}
early_initcall(its_pmsi_init);
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 07/14] irqchip: gicv3-its: platform-msi: scan MADT to create platform msi domain
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo
With the introduction of its_pmsi_init_one(), we can add some code
on top for ACPI support of platform MSI.
We are scanning the MADT table to get the ITS entry(ies), then use
the information to create the platform msi domain for devices connect
to it, just like the PCI MSI for ITS did.
Signed-off-by: Hanjun Guo
Tested-by: Sinan Kaya
Cc: Marc Zyngier
Cc: Tomasz Nowicki
Cc: Thomas Gleixner
---
drivers/irqchip/irq-gic-v3-its-platform-msi.c | 36 +++
1 file changed, 36 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
index ff72704..0be0437 100644
--- a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
@@ -105,6 +105,41 @@ static int __init its_pmsi_init_one(struct fwnode_handle
*fwnode,
return 0;
}
+#ifdef CONFIG_ACPI
+static int __init
+its_pmsi_parse_madt(struct acpi_subtable_header *header,
+ const unsigned long end)
+{
+ struct acpi_madt_generic_translator *its_entry;
+ struct fwnode_handle *domain_handle;
+ const char *node_name;
+ int err = -ENXIO;
+
+ its_entry = (struct acpi_madt_generic_translator *)header;
+ node_name = kasprintf(GFP_KERNEL, "ITS@0x%lx",
+ (long)its_entry->base_address);
+ domain_handle = iort_find_domain_token(its_entry->translation_id);
+ if (!domain_handle) {
+ pr_err("%s: Unable to locate ITS domain handle\n", node_name);
+ goto out;
+ }
+
+ err = its_pmsi_init_one(domain_handle, node_name);
+
+out:
+ kfree(node_name);
+ return err;
+}
+
+static void __init its_acpi_pmsi_init(void)
+{
+ acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,
+ its_pmsi_parse_madt, 0);
+}
+#else
+static inline void its_acpi_pmsi_init(void) { }
+#endif
+
static void __init its_pmsi_of_init(void)
{
struct device_node *np;
@@ -121,6 +156,7 @@ static void __init its_pmsi_of_init(void)
static int __init its_pmsi_init(void)
{
its_pmsi_of_init();
+ its_acpi_pmsi_init();
return 0;
}
early_initcall(its_pmsi_init);
Tested-by: Xinwei Kong
Re: [PATCH v5 05/14] ACPI: platform-msi: retrieve dev id from IORT
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo <hanjun@linaro.org>
For devices connecting to ITS, it needs dev id to identify
itself, and this dev id is represented in the IORT table in
named componant node [1] for platform devices, so in this
patch we will scan the IORT to retrieve device's dev id.
Introduce iort_pmsi_get_dev_id() with pointer dev passed
in for that purpose.
[1]: https://static.docs.arm.com/den0049/b/DEN0049B_IO_Remapping_Table.pdf
Signed-off-by: Hanjun Guo <hanjun@linaro.org>
Tested-by: Sinan Kaya <ok...@codeaurora.org>
Cc: Marc Zyngier <marc.zyng...@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieral...@arm.com>
Cc: Tomasz Nowicki <t...@semihalf.com>
Cc: Thomas Gleixner <t...@linutronix.de>
---
drivers/acpi/arm64/iort.c | 26 ++
drivers/irqchip/irq-gic-v3-its-platform-msi.c | 4 +++-
include/linux/acpi_iort.h | 8
3 files changed, 37 insertions(+), 1 deletion(-)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index 174e983..ab7bae7 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -444,6 +444,32 @@ u32 iort_msi_map_rid(struct device *dev, u32 req_id)
}
/**
+ * iort_pmsi_get_dev_id() - Get the device id for a device
+ * @dev: The device for which the mapping is to be done.
+ * @dev_id: The device ID found.
+ *
+ * Returns: 0 for successful find a dev id, errors otherwise
+ */
+int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id)
+{
+ struct acpi_iort_node *node;
+
+ if (!iort_table)
+ return -ENODEV;
+
+ node = iort_find_dev_node(dev);
+ if (!node) {
+ dev_err(dev, "can't find related IORT node\n");
+ return -ENODEV;
+ }
+
+ if(!iort_node_get_id(node, dev_id, IORT_MSI_TYPE, 0))
+ return -ENODEV;
+
+ return 0;
+}
+
+/**
* iort_dev_find_its_id() - Find the ITS identifier for a device
* @dev: The device.
* @req_id: Device's Requster ID
diff --git a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
index 3c94278..16587a9 100644
--- a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
@@ -15,6 +15,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#include
#include
#include
#include
@@ -56,7 +57,8 @@ static int its_pmsi_prepare(struct irq_domain *domain, struct
device *dev,
msi_info = msi_get_domain_info(domain->parent);
- ret = of_pmsi_get_dev_id(domain, dev, _id);
+ ret = dev->of_node ? of_pmsi_get_dev_id(domain, dev, _id) :
+ iort_pmsi_get_dev_id(dev, _id);
if (ret)
return ret;
diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h
index 77e0809..ef99fd52 100644
--- a/include/linux/acpi_iort.h
+++ b/include/linux/acpi_iort.h
@@ -33,6 +33,7 @@
void acpi_iort_init(void);
bool iort_node_match(u8 type);
u32 iort_msi_map_rid(struct device *dev, u32 req_id);
+int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id);
struct irq_domain *iort_get_device_domain(struct device *dev, u32 req_id);
/* IOMMU interface */
void iort_set_dma_mask(struct device *dev);
@@ -42,9 +43,16 @@ static inline void acpi_iort_init(void) { }
static inline bool iort_node_match(u8 type) { return false; }
static inline u32 iort_msi_map_rid(struct device *dev, u32 req_id)
{ return req_id; }
+
static inline struct irq_domain *iort_get_device_domain(struct device *dev,
u32 req_id)
{ return NULL; }
+
+static inline int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id)
+{
+ return -ENODEV;
+}
+
/* IOMMU interface */
static inline void iort_set_dma_mask(struct device *dev) { }
static inline
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 04/14] irqchip: gicv3-its: platform-msi: refactor its_pmsi_prepare()
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo <hanjun@linaro.org>
Adding ACPI support for platform MSI, we need to retrieve the
dev id in ACPI way instead of device tree, we already have
a well formed function its_pmsi_prepare() to get the dev id
but it's OF dependent, so collect OF related code and put them
into a single function to make its_pmsi_prepare() more friendly
to ACPI later.
Signed-off-by: Hanjun Guo <hanjun@linaro.org>
Tested-by: Sinan Kaya <ok...@codeaurora.org>
Cc: Marc Zyngier <marc.zyng...@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieral...@arm.com>
Cc: Tomasz Nowicki <t...@semihalf.com>
Cc: Thomas Gleixner <t...@linutronix.de>
---
drivers/irqchip/irq-gic-v3-its-platform-msi.c | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
index 470b4aa..3c94278 100644
--- a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
@@ -24,15 +24,11 @@
.name = "ITS-pMSI",
};
-static int its_pmsi_prepare(struct irq_domain *domain, struct device *dev,
- int nvec, msi_alloc_info_t *info)
+static int of_pmsi_get_dev_id(struct irq_domain *domain, struct device *dev,
+ u32 *dev_id)
{
- struct msi_domain_info *msi_info;
- u32 dev_id;
int ret, index = 0;
- msi_info = msi_get_domain_info(domain->parent);
-
/* Suck the DeviceID out of the msi-parent property */
do {
struct of_phandle_args args;
@@ -43,11 +39,24 @@ static int its_pmsi_prepare(struct irq_domain *domain,
struct device *dev,
if (args.np == irq_domain_get_of_node(domain)) {
if (WARN_ON(args.args_count != 1))
return -EINVAL;
- dev_id = args.args[0];
+ *dev_id = args.args[0];
break;
}
} while (!ret);
+ return ret;
+}
+
+static int its_pmsi_prepare(struct irq_domain *domain, struct device *dev,
+ int nvec, msi_alloc_info_t *info)
+{
+ struct msi_domain_info *msi_info;
+ u32 dev_id;
+ int ret;
+
+ msi_info = msi_get_domain_info(domain->parent);
+
+ ret = of_pmsi_get_dev_id(domain, dev, _id);
if (ret)
return ret;
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 05/14] ACPI: platform-msi: retrieve dev id from IORT
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo
For devices connecting to ITS, it needs dev id to identify
itself, and this dev id is represented in the IORT table in
named componant node [1] for platform devices, so in this
patch we will scan the IORT to retrieve device's dev id.
Introduce iort_pmsi_get_dev_id() with pointer dev passed
in for that purpose.
[1]: https://static.docs.arm.com/den0049/b/DEN0049B_IO_Remapping_Table.pdf
Signed-off-by: Hanjun Guo
Tested-by: Sinan Kaya
Cc: Marc Zyngier
Cc: Lorenzo Pieralisi
Cc: Tomasz Nowicki
Cc: Thomas Gleixner
---
drivers/acpi/arm64/iort.c | 26 ++
drivers/irqchip/irq-gic-v3-its-platform-msi.c | 4 +++-
include/linux/acpi_iort.h | 8
3 files changed, 37 insertions(+), 1 deletion(-)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index 174e983..ab7bae7 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -444,6 +444,32 @@ u32 iort_msi_map_rid(struct device *dev, u32 req_id)
}
/**
+ * iort_pmsi_get_dev_id() - Get the device id for a device
+ * @dev: The device for which the mapping is to be done.
+ * @dev_id: The device ID found.
+ *
+ * Returns: 0 for successful find a dev id, errors otherwise
+ */
+int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id)
+{
+ struct acpi_iort_node *node;
+
+ if (!iort_table)
+ return -ENODEV;
+
+ node = iort_find_dev_node(dev);
+ if (!node) {
+ dev_err(dev, "can't find related IORT node\n");
+ return -ENODEV;
+ }
+
+ if(!iort_node_get_id(node, dev_id, IORT_MSI_TYPE, 0))
+ return -ENODEV;
+
+ return 0;
+}
+
+/**
* iort_dev_find_its_id() - Find the ITS identifier for a device
* @dev: The device.
* @req_id: Device's Requster ID
diff --git a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
index 3c94278..16587a9 100644
--- a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
@@ -15,6 +15,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#include
#include
#include
#include
@@ -56,7 +57,8 @@ static int its_pmsi_prepare(struct irq_domain *domain, struct
device *dev,
msi_info = msi_get_domain_info(domain->parent);
- ret = of_pmsi_get_dev_id(domain, dev, _id);
+ ret = dev->of_node ? of_pmsi_get_dev_id(domain, dev, _id) :
+ iort_pmsi_get_dev_id(dev, _id);
if (ret)
return ret;
diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h
index 77e0809..ef99fd52 100644
--- a/include/linux/acpi_iort.h
+++ b/include/linux/acpi_iort.h
@@ -33,6 +33,7 @@
void acpi_iort_init(void);
bool iort_node_match(u8 type);
u32 iort_msi_map_rid(struct device *dev, u32 req_id);
+int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id);
struct irq_domain *iort_get_device_domain(struct device *dev, u32 req_id);
/* IOMMU interface */
void iort_set_dma_mask(struct device *dev);
@@ -42,9 +43,16 @@ static inline void acpi_iort_init(void) { }
static inline bool iort_node_match(u8 type) { return false; }
static inline u32 iort_msi_map_rid(struct device *dev, u32 req_id)
{ return req_id; }
+
static inline struct irq_domain *iort_get_device_domain(struct device *dev,
u32 req_id)
{ return NULL; }
+
+static inline int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id)
+{
+ return -ENODEV;
+}
+
/* IOMMU interface */
static inline void iort_set_dma_mask(struct device *dev) { }
static inline
Tested-by: Xinwei Kong
Re: [PATCH v5 04/14] irqchip: gicv3-its: platform-msi: refactor its_pmsi_prepare()
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo
Adding ACPI support for platform MSI, we need to retrieve the
dev id in ACPI way instead of device tree, we already have
a well formed function its_pmsi_prepare() to get the dev id
but it's OF dependent, so collect OF related code and put them
into a single function to make its_pmsi_prepare() more friendly
to ACPI later.
Signed-off-by: Hanjun Guo
Tested-by: Sinan Kaya
Cc: Marc Zyngier
Cc: Lorenzo Pieralisi
Cc: Tomasz Nowicki
Cc: Thomas Gleixner
---
drivers/irqchip/irq-gic-v3-its-platform-msi.c | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
index 470b4aa..3c94278 100644
--- a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
@@ -24,15 +24,11 @@
.name = "ITS-pMSI",
};
-static int its_pmsi_prepare(struct irq_domain *domain, struct device *dev,
- int nvec, msi_alloc_info_t *info)
+static int of_pmsi_get_dev_id(struct irq_domain *domain, struct device *dev,
+ u32 *dev_id)
{
- struct msi_domain_info *msi_info;
- u32 dev_id;
int ret, index = 0;
- msi_info = msi_get_domain_info(domain->parent);
-
/* Suck the DeviceID out of the msi-parent property */
do {
struct of_phandle_args args;
@@ -43,11 +39,24 @@ static int its_pmsi_prepare(struct irq_domain *domain,
struct device *dev,
if (args.np == irq_domain_get_of_node(domain)) {
if (WARN_ON(args.args_count != 1))
return -EINVAL;
- dev_id = args.args[0];
+ *dev_id = args.args[0];
break;
}
} while (!ret);
+ return ret;
+}
+
+static int its_pmsi_prepare(struct irq_domain *domain, struct device *dev,
+ int nvec, msi_alloc_info_t *info)
+{
+ struct msi_domain_info *msi_info;
+ u32 dev_id;
+ int ret;
+
+ msi_info = msi_get_domain_info(domain->parent);
+
+ ret = of_pmsi_get_dev_id(domain, dev, _id);
if (ret)
return ret;
Tested-by: Xinwei Kong
Re: [PATCH v5 03/14] ACPI: ARM64: IORT: add missing comment for iort_dev_find_its_id()
On 2016/12/22 13:35, Hanjun Guo wrote: From: Hanjun Guo <hanjun@linaro.org> We are missing req_id's comment for iort_dev_find_its_id(), add it back. Signed-off-by: Hanjun Guo <hanjun@linaro.org> Cc: Lorenzo Pieralisi <lorenzo.pieral...@arm.com> Cc: Tomasz Nowicki <t...@semihalf.com> --- drivers/acpi/arm64/iort.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index 46e2d82..174e983 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -446,6 +446,7 @@ u32 iort_msi_map_rid(struct device *dev, u32 req_id) /** * iort_dev_find_its_id() - Find the ITS identifier for a device * @dev: The device. + * @req_id: Device's Requster ID * @idx: Index of the ITS identifier list. * @its_id: ITS identifier. * Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 01/14] ACPI: ARM64: IORT: minor cleanup for iort_match_node_callback()
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo <hanjun@linaro.org>
Cleanup iort_match_node_callback() a little bit to reduce
some lines of code, aslo fix the indentation in iort_scan_node().
Signed-off-by: Hanjun Guo <hanjun@linaro.org>
Cc: Lorenzo Pieralisi <lorenzo.pieral...@arm.com>
Cc: Marc Zyngier <marc.zyng...@arm.com>
Cc: Tomasz Nowicki <t...@semihalf.com>
---
drivers/acpi/arm64/iort.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index e0d2e6e..46e2d82 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -225,7 +225,7 @@ static struct acpi_iort_node *iort_scan_node(enum
acpi_iort_node_type type,
if (iort_node->type == type &&
ACPI_SUCCESS(callback(iort_node, context)))
- return iort_node;
+ return iort_node;
iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
iort_node->length);
@@ -253,17 +253,15 @@ static acpi_status iort_match_node_callback(struct
acpi_iort_node *node,
void *context)
{
struct device *dev = context;
- acpi_status status;
+ acpi_status status = AE_NOT_FOUND;
if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT) {
struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
struct acpi_device *adev = to_acpi_device_node(dev->fwnode);
struct acpi_iort_named_component *ncomp;
- if (!adev) {
- status = AE_NOT_FOUND;
+ if (!adev)
goto out;
- }
status = acpi_get_name(adev->handle, ACPI_FULL_PATHNAME, );
if (ACPI_FAILURE(status)) {
@@ -289,8 +287,6 @@ static acpi_status iort_match_node_callback(struct
acpi_iort_node *node,
*/
status = pci_rc->pci_segment_number == pci_domain_nr(bus) ?
AE_OK : AE_NOT_FOUND;
- } else {
- status = AE_NOT_FOUND;
}
out:
return status;
Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Re: [PATCH v5 03/14] ACPI: ARM64: IORT: add missing comment for iort_dev_find_its_id()
On 2016/12/22 13:35, Hanjun Guo wrote: From: Hanjun Guo We are missing req_id's comment for iort_dev_find_its_id(), add it back. Signed-off-by: Hanjun Guo Cc: Lorenzo Pieralisi Cc: Tomasz Nowicki --- drivers/acpi/arm64/iort.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index 46e2d82..174e983 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -446,6 +446,7 @@ u32 iort_msi_map_rid(struct device *dev, u32 req_id) /** * iort_dev_find_its_id() - Find the ITS identifier for a device * @dev: The device. + * @req_id: Device's Requster ID * @idx: Index of the ITS identifier list. * @its_id: ITS identifier. * Tested-by: Xinwei Kong
Re: [PATCH v5 01/14] ACPI: ARM64: IORT: minor cleanup for iort_match_node_callback()
On 2016/12/22 13:35, Hanjun Guo wrote:
From: Hanjun Guo
Cleanup iort_match_node_callback() a little bit to reduce
some lines of code, aslo fix the indentation in iort_scan_node().
Signed-off-by: Hanjun Guo
Cc: Lorenzo Pieralisi
Cc: Marc Zyngier
Cc: Tomasz Nowicki
---
drivers/acpi/arm64/iort.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index e0d2e6e..46e2d82 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -225,7 +225,7 @@ static struct acpi_iort_node *iort_scan_node(enum
acpi_iort_node_type type,
if (iort_node->type == type &&
ACPI_SUCCESS(callback(iort_node, context)))
- return iort_node;
+ return iort_node;
iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
iort_node->length);
@@ -253,17 +253,15 @@ static acpi_status iort_match_node_callback(struct
acpi_iort_node *node,
void *context)
{
struct device *dev = context;
- acpi_status status;
+ acpi_status status = AE_NOT_FOUND;
if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT) {
struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
struct acpi_device *adev = to_acpi_device_node(dev->fwnode);
struct acpi_iort_named_component *ncomp;
- if (!adev) {
- status = AE_NOT_FOUND;
+ if (!adev)
goto out;
- }
status = acpi_get_name(adev->handle, ACPI_FULL_PATHNAME, );
if (ACPI_FAILURE(status)) {
@@ -289,8 +287,6 @@ static acpi_status iort_match_node_callback(struct
acpi_iort_node *node,
*/
status = pci_rc->pci_segment_number == pci_domain_nr(bus) ?
AE_OK : AE_NOT_FOUND;
- } else {
- status = AE_NOT_FOUND;
}
out:
return status;
Tested-by: Xinwei Kong
Re: [PATCH v4] arm64: dts: add all hi6220 i2c nodes
+to xuwei
On 2015/12/29 21:15, Bintian wrote:
> On 2015/12/2 18:13, Xinwei Kong wrote:
>> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
>> use this I2C IP of Synopsys Designware for HiKey board.
>>
>> Signed-off-by: Xinwei Kong
>> Signed-off-by: Chen Feng
Reviewed-by: Shawn Guo
>> ---
>> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 34
>> +++
>> 1 file changed, 34 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> index 82d2488..8cec56a 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> @@ -208,5 +208,39 @@
>> clock-names = "uartclk", "apb_pclk";
>> status = "disabled";
>> };
>> +
>> +i2c0: i2c@f710 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf710 0x0 0x1000>;
>> +interrupts = <0 44 4>;
>> +clocks = <_ctrl HI6220_I2C0_CLK>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> +i2c1: i2c@f7101000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7101000 0x0 0x1000>;
>> +clocks = <_ctrl HI6220_I2C1_CLK>;
>> +interrupts = <0 45 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> +i2c2: i2c@f7102000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7102000 0x0 0x1000>;
>> +clocks = <_ctrl HI6220_I2C2_CLK>;
>> +interrupts = <0 46 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> };
>> };
>
> Looks good to me!
>
> Reviewed-by: Bintian Wang
>
>
>
> .
>
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Re: [PATCH v4] arm64: dts: add all hi6220 i2c nodes
+to xuwei
On 2015/12/29 21:15, Bintian wrote:
> On 2015/12/2 18:13, Xinwei Kong wrote:
>> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
>> use this I2C IP of Synopsys Designware for HiKey board.
>>
>> Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
>> Signed-off-by: Chen Feng <puck.c...@hisilicon.com>
Reviewed-by: Shawn Guo <shawn...@kernel.org>
>> ---
>> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 34
>> +++
>> 1 file changed, 34 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> index 82d2488..8cec56a 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> @@ -208,5 +208,39 @@
>> clock-names = "uartclk", "apb_pclk";
>> status = "disabled";
>> };
>> +
>> +i2c0: i2c@f710 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf710 0x0 0x1000>;
>> +interrupts = <0 44 4>;
>> +clocks = <_ctrl HI6220_I2C0_CLK>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> +i2c1: i2c@f7101000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7101000 0x0 0x1000>;
>> +clocks = <_ctrl HI6220_I2C1_CLK>;
>> +interrupts = <0 45 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> +i2c2: i2c@f7102000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7102000 0x0 0x1000>;
>> +clocks = <_ctrl HI6220_I2C2_CLK>;
>> +interrupts = <0 46 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> };
>> };
>
> Looks good to me!
>
> Reviewed-by: Bintian Wang<bintian.w...@huawei.com>
>
>
>
> .
>
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[PATCH v4] arm64: dts: add all hi6220 i2c nodes
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong
Signed-off-by: Chen Feng
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 34 +++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 82d2488..8cec56a 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -208,5 +208,39 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ i2c0: i2c@f710 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf710 0x0 0x1000>;
+ interrupts = <0 44 4>;
+ clocks = <_ctrl HI6220_I2C0_CLK>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@f7101000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7101000 0x0 0x1000>;
+ clocks = <_ctrl HI6220_I2C1_CLK>;
+ interrupts = <0 45 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@f7102000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7102000 0x0 0x1000>;
+ clocks = <_ctrl HI6220_I2C2_CLK>;
+ interrupts = <0 46 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
};
};
--
1.9.1
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Re: [PATCH v3] arm64: dts: add all hi6220 i2c nodes
On 2015/12/2 15:34, Shawn Guo wrote:
> On Wed, Dec 02, 2015 at 02:29:09PM +0800, Xinwei Kong wrote:
>> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
>> use this I2C IP of Synopsys Designware for HiKey board.
>>
>> Signed-off-by: Xinwei Kong
>> ---
>> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 31
>> +++
>> 1 file changed, 31 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> index 82d2488..6eae673 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> @@ -208,5 +208,36 @@
>> clock-names = "uartclk", "apb_pclk";
>> status = "disabled";
>> };
>> +
>> +i2c0: i2c@f710 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf710 0x0 0x1000>;
>> +interrupts = <0 44 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>
> You got me wrong. I was asking you to drop property 'clock-names' only,
> not 'clocks' together. I do not think it works if you drop property
> 'clocks', because I see that dw_i2c_plat_probe() will fail if
> devm_clk_get() fails. Did you test the patch before posting it out?
I am sorry that my Hikey board don't work well. I will fix my board and test
it.
Thank you very much.
xinwei
>
> Shawn
>
>> +};
>> +
>> +i2c1: i2c@f7101000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7101000 0x0 0x1000>;
>> +interrupts = <0 45 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> +i2c2: i2c@f7102000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7102000 0x0 0x1000>;
>> +interrupts = <0 46 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> };
>> };
>> --
>> 1.9.1
>>
>>
>>
> --
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> the body of a message to majord...@vger.kernel.org
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>
> .
>
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Re: [PATCH v3] arm64: dts: add all hi6220 i2c nodes
On 2015/12/2 15:34, Shawn Guo wrote:
> On Wed, Dec 02, 2015 at 02:29:09PM +0800, Xinwei Kong wrote:
>> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
>> use this I2C IP of Synopsys Designware for HiKey board.
>>
>> Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
>> ---
>> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 31
>> +++
>> 1 file changed, 31 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> index 82d2488..6eae673 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> @@ -208,5 +208,36 @@
>> clock-names = "uartclk", "apb_pclk";
>> status = "disabled";
>> };
>> +
>> +i2c0: i2c@f710 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf710 0x0 0x1000>;
>> +interrupts = <0 44 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>
> You got me wrong. I was asking you to drop property 'clock-names' only,
> not 'clocks' together. I do not think it works if you drop property
> 'clocks', because I see that dw_i2c_plat_probe() will fail if
> devm_clk_get() fails. Did you test the patch before posting it out?
I am sorry that my Hikey board don't work well. I will fix my board and test
it.
Thank you very much.
xinwei
>
> Shawn
>
>> +};
>> +
>> +i2c1: i2c@f7101000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7101000 0x0 0x1000>;
>> +interrupts = <0 45 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> +i2c2: i2c@f7102000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7102000 0x0 0x1000>;
>> +interrupts = <0 46 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> };
>> };
>> --
>> 1.9.1
>>
>>
>>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-i2c" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
> .
>
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[PATCH v4] arm64: dts: add all hi6220 i2c nodes
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Signed-off-by: Chen Feng <puck.c...@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 34 +++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 82d2488..8cec56a 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -208,5 +208,39 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ i2c0: i2c@f710 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf710 0x0 0x1000>;
+ interrupts = <0 44 4>;
+ clocks = <_ctrl HI6220_I2C0_CLK>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@f7101000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7101000 0x0 0x1000>;
+ clocks = <_ctrl HI6220_I2C1_CLK>;
+ interrupts = <0 45 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@f7102000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7102000 0x0 0x1000>;
+ clocks = <_ctrl HI6220_I2C2_CLK>;
+ interrupts = <0 46 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
};
};
--
1.9.1
--
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[PATCH v3] arm64: dts: add all hi6220 i2c nodes
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 82d2488..6eae673 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -208,5 +208,36 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ i2c0: i2c@f710 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf710 0x0 0x1000>;
+ interrupts = <0 44 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@f7101000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7101000 0x0 0x1000>;
+ interrupts = <0 45 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@f7102000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7102000 0x0 0x1000>;
+ interrupts = <0 46 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
};
};
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] arm64: dts: add all hi6220 i2c nodes
hi Shawn
On 2015/12/2 10:05, Shawn Guo wrote:
> On Thu, Nov 26, 2015 at 03:57:03PM +0800, Xinwei Kong wrote:
>> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
>> use this I2C IP of Synopsys Designware for HiKey board.
>>
>> Signed-off-by: Xinwei Kong
>> ---
>> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 37
>> +++
>> 1 file changed, 37 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> index 82d2488..85d4a8b 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> @@ -208,5 +208,42 @@
>> clock-names = "uartclk", "apb_pclk";
>> status = "disabled";
>> };
>> +
>> +i2c0: i2c@f710 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf710 0x0 0x1000>;
>> +interrupts = <0 44 4>;
>> +clocks = <_ctrl HI6220_I2C0_CLK>;
>> +clock-names = "clk_i2c0";
>
> Neither bindings doc i2c-designware.txt defines this property, nor
> kernel i2c-designware driver uses this property. So I think this
> clock-names property can just be dropped.
>
This property should been delete it. I will debug it in HiKey board then
send v3 patch.
Thank you
xinwei
> Otherwise, the patch looks good to me.
>
> Shawn
>
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> +i2c1: i2c@f7101000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7101000 0x0 0x1000>;
>> +interrupts = <0 45 4>;
>> +clocks = <_ctrl HI6220_I2C1_CLK>;
>> +clock-names = "clk_i2c1";
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> +i2c2: i2c@f7102000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7102000 0x0 0x1000>;
>> +interrupts = <0 46 4>;
>> +clocks = <_ctrl HI6220_I2C2_CLK>;
>> +clock-names = "clk_i2c2";
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> };
>> };
>> --
>> 1.9.1
>>
>>
>>
>
> .
>
--
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Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] arm64: dts: add all hi6220 i2c nodes
hi Shawn
On 2015/12/2 10:05, Shawn Guo wrote:
> On Thu, Nov 26, 2015 at 03:57:03PM +0800, Xinwei Kong wrote:
>> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
>> use this I2C IP of Synopsys Designware for HiKey board.
>>
>> Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
>> ---
>> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 37
>> +++
>> 1 file changed, 37 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> index 82d2488..85d4a8b 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> @@ -208,5 +208,42 @@
>> clock-names = "uartclk", "apb_pclk";
>> status = "disabled";
>> };
>> +
>> +i2c0: i2c@f710 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf710 0x0 0x1000>;
>> +interrupts = <0 44 4>;
>> +clocks = <_ctrl HI6220_I2C0_CLK>;
>> +clock-names = "clk_i2c0";
>
> Neither bindings doc i2c-designware.txt defines this property, nor
> kernel i2c-designware driver uses this property. So I think this
> clock-names property can just be dropped.
>
This property should been delete it. I will debug it in HiKey board then
send v3 patch.
Thank you
xinwei
> Otherwise, the patch looks good to me.
>
> Shawn
>
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> +i2c1: i2c@f7101000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7101000 0x0 0x1000>;
>> +interrupts = <0 45 4>;
>> +clocks = <_ctrl HI6220_I2C1_CLK>;
>> +clock-names = "clk_i2c1";
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> +i2c2: i2c@f7102000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7102000 0x0 0x1000>;
>> +interrupts = <0 46 4>;
>> +clocks = <_ctrl HI6220_I2C2_CLK>;
>> +clock-names = "clk_i2c2";
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> };
>> };
>> --
>> 1.9.1
>>
>>
>>
>
> .
>
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3] arm64: dts: add all hi6220 i2c nodes
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 82d2488..6eae673 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -208,5 +208,36 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ i2c0: i2c@f710 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf710 0x0 0x1000>;
+ interrupts = <0 44 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@f7101000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7101000 0x0 0x1000>;
+ interrupts = <0 45 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@f7102000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7102000 0x0 0x1000>;
+ interrupts = <0 46 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
};
};
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2] arm64: dts: add all hi6220 i2c nodes
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 82d2488..85d4a8b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -208,5 +208,42 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ i2c0: i2c@f710 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf710 0x0 0x1000>;
+ interrupts = <0 44 4>;
+ clocks = <_ctrl HI6220_I2C0_CLK>;
+ clock-names = "clk_i2c0";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@f7101000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7101000 0x0 0x1000>;
+ interrupts = <0 45 4>;
+ clocks = <_ctrl HI6220_I2C1_CLK>;
+ clock-names = "clk_i2c1";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@f7102000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7102000 0x0 0x1000>;
+ interrupts = <0 46 4>;
+ clocks = <_ctrl HI6220_I2C2_CLK>;
+ clock-names = "clk_i2c2";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
};
};
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/1] arm64: dts: add all hi6220 i2c nodes
hi Shawn,
On 2015/11/25 20:24, Shawn Guo wrote:
> On Wed, Nov 25, 2015 at 05:49:02PM +0800, Xinwei Kong wrote:
>> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
>> use this I2C IP of Synopsys Designware for HiKey board.
>>
>> Signed-off-by: Xinwei Kong
>> Signed-off-by: Chen Feng
>> ---
>> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 37
>> +++
>> 1 file changed, 37 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> index 82d2488..6b591a9 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> @@ -208,5 +208,42 @@
>> clock-names = "uartclk", "apb_pclk";
>> status = "disabled";
>> };
>> +
>> +i2c0: i2c@f710 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf710 0x0 0x1000>;
>> +interrupts = <0 44 4>;
>> +clocks = <_ctrl HI6220_I2C0_CLK>;
>> +clock-names = "clk_i2c0";
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "ok";
>
> Shouldn't it be set "disabled" in .dtsi and let .dts enable
> it per board design?
>
> Shawn
get it.
thank you
xinwei
>
>> +};
>> +
>> +i2c1: i2c@f7101000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7101000 0x0 0x1000>;
>> +interrupts = <0 45 4>;
>> +clocks = <_ctrl HI6220_I2C1_CLK>;
>> +clock-names = "clk_i2c1";
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "ok";
>> +};
>> +
>> +i2c2: i2c@f7102000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7102000 0x0 0x1000>;
>> +interrupts = <0 46 4>;
>> +clocks = <_ctrl HI6220_I2C2_CLK>;
>> +clock-names = "clk_i2c2";
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "ok";
>> +};
>> +
>> };
>> };
>> --
>> 1.9.1
>>
>>
>>
>> ___
>> linux-arm-kernel mailing list
>> linux-arm-ker...@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>
>
> .
>
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Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/1] arm64: dts: add all hi6220 i2c nodes
+to linux-...@vger.kernel.org
On 2015/11/25 17:49, Xinwei Kong wrote:
> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
> use this I2C IP of Synopsys Designware for HiKey board.
>
> Signed-off-by: Xinwei Kong
> Signed-off-by: Chen Feng
> ---
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 37
> +++
> 1 file changed, 37 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index 82d2488..6b591a9 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -208,5 +208,42 @@
> clock-names = "uartclk", "apb_pclk";
> status = "disabled";
> };
> +
> + i2c0: i2c@f710 {
> + compatible = "snps,designware-i2c";
> + reg = <0x0 0xf710 0x0 0x1000>;
> + interrupts = <0 44 4>;
> + clocks = <_ctrl HI6220_I2C0_CLK>;
> + clock-names = "clk_i2c0";
> + i2c-sda-hold-time-ns = <300>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmx_func _cfg_func>;
> + status = "ok";
> + };
> +
> + i2c1: i2c@f7101000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x0 0xf7101000 0x0 0x1000>;
> + interrupts = <0 45 4>;
> + clocks = <_ctrl HI6220_I2C1_CLK>;
> + clock-names = "clk_i2c1";
> + i2c-sda-hold-time-ns = <300>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmx_func _cfg_func>;
> + status = "ok";
> + };
> +
> + i2c2: i2c@f7102000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x0 0xf7102000 0x0 0x1000>;
> + interrupts = <0 46 4>;
> + clocks = <_ctrl HI6220_I2C2_CLK>;
> + clock-names = "clk_i2c2";
> + i2c-sda-hold-time-ns = <300>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmx_func _cfg_func>;
> + status = "ok";
> + };
> +
> };
> };
>
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/1] arm64: dts: add all hi6220 i2c nodes
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong
Signed-off-by: Chen Feng
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 82d2488..6b591a9 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -208,5 +208,42 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ i2c0: i2c@f710 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf710 0x0 0x1000>;
+ interrupts = <0 44 4>;
+ clocks = <_ctrl HI6220_I2C0_CLK>;
+ clock-names = "clk_i2c0";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "ok";
+ };
+
+ i2c1: i2c@f7101000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7101000 0x0 0x1000>;
+ interrupts = <0 45 4>;
+ clocks = <_ctrl HI6220_I2C1_CLK>;
+ clock-names = "clk_i2c1";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "ok";
+ };
+
+ i2c2: i2c@f7102000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7102000 0x0 0x1000>;
+ interrupts = <0 46 4>;
+ clocks = <_ctrl HI6220_I2C2_CLK>;
+ clock-names = "clk_i2c2";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "ok";
+ };
+
};
};
--
1.9.1
--
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Re: [PATCH 1/1] arm64: dts: add all hi6220 i2c nodes
hi Shawn,
On 2015/11/25 20:24, Shawn Guo wrote:
> On Wed, Nov 25, 2015 at 05:49:02PM +0800, Xinwei Kong wrote:
>> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
>> use this I2C IP of Synopsys Designware for HiKey board.
>>
>> Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
>> Signed-off-by: Chen Feng <puck.c...@hisilicon.com>
>> ---
>> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 37
>> +++
>> 1 file changed, 37 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> index 82d2488..6b591a9 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> @@ -208,5 +208,42 @@
>> clock-names = "uartclk", "apb_pclk";
>> status = "disabled";
>> };
>> +
>> +i2c0: i2c@f710 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf710 0x0 0x1000>;
>> +interrupts = <0 44 4>;
>> +clocks = <_ctrl HI6220_I2C0_CLK>;
>> +clock-names = "clk_i2c0";
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "ok";
>
> Shouldn't it be set "disabled" in .dtsi and let .dts enable
> it per board design?
>
> Shawn
get it.
thank you
xinwei
>
>> +};
>> +
>> +i2c1: i2c@f7101000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7101000 0x0 0x1000>;
>> +interrupts = <0 45 4>;
>> +clocks = <_ctrl HI6220_I2C1_CLK>;
>> +clock-names = "clk_i2c1";
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "ok";
>> +};
>> +
>> +i2c2: i2c@f7102000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7102000 0x0 0x1000>;
>> +interrupts = <0 46 4>;
>> +clocks = <_ctrl HI6220_I2C2_CLK>;
>> +clock-names = "clk_i2c2";
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "ok";
>> +};
>> +
>> };
>> };
>> --
>> 1.9.1
>>
>>
>>
>> ___
>> linux-arm-kernel mailing list
>> linux-arm-ker...@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>
>
> .
>
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/1] arm64: dts: add all hi6220 i2c nodes
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Signed-off-by: Chen Feng <puck.c...@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 82d2488..6b591a9 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -208,5 +208,42 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ i2c0: i2c@f710 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf710 0x0 0x1000>;
+ interrupts = <0 44 4>;
+ clocks = <_ctrl HI6220_I2C0_CLK>;
+ clock-names = "clk_i2c0";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "ok";
+ };
+
+ i2c1: i2c@f7101000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7101000 0x0 0x1000>;
+ interrupts = <0 45 4>;
+ clocks = <_ctrl HI6220_I2C1_CLK>;
+ clock-names = "clk_i2c1";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "ok";
+ };
+
+ i2c2: i2c@f7102000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7102000 0x0 0x1000>;
+ interrupts = <0 46 4>;
+ clocks = <_ctrl HI6220_I2C2_CLK>;
+ clock-names = "clk_i2c2";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "ok";
+ };
+
};
};
--
1.9.1
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/1] arm64: dts: add all hi6220 i2c nodes
+to linux-...@vger.kernel.org
On 2015/11/25 17:49, Xinwei Kong wrote:
> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
> use this I2C IP of Synopsys Designware for HiKey board.
>
> Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
> Signed-off-by: Chen Feng <puck.c...@hisilicon.com>
> ---
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 37
> +++
> 1 file changed, 37 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index 82d2488..6b591a9 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -208,5 +208,42 @@
> clock-names = "uartclk", "apb_pclk";
> status = "disabled";
> };
> +
> + i2c0: i2c@f710 {
> + compatible = "snps,designware-i2c";
> + reg = <0x0 0xf710 0x0 0x1000>;
> + interrupts = <0 44 4>;
> + clocks = <_ctrl HI6220_I2C0_CLK>;
> + clock-names = "clk_i2c0";
> + i2c-sda-hold-time-ns = <300>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmx_func _cfg_func>;
> + status = "ok";
> + };
> +
> + i2c1: i2c@f7101000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x0 0xf7101000 0x0 0x1000>;
> + interrupts = <0 45 4>;
> + clocks = <_ctrl HI6220_I2C1_CLK>;
> + clock-names = "clk_i2c1";
> + i2c-sda-hold-time-ns = <300>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmx_func _cfg_func>;
> + status = "ok";
> + };
> +
> + i2c2: i2c@f7102000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x0 0xf7102000 0x0 0x1000>;
> + interrupts = <0 46 4>;
> + clocks = <_ctrl HI6220_I2C2_CLK>;
> + clock-names = "clk_i2c2";
> + i2c-sda-hold-time-ns = <300>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmx_func _cfg_func>;
> + status = "ok";
> + };
> +
> };
> };
>
--
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More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2] arm64: dts: add all hi6220 i2c nodes
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 82d2488..85d4a8b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -208,5 +208,42 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ i2c0: i2c@f710 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf710 0x0 0x1000>;
+ interrupts = <0 44 4>;
+ clocks = <_ctrl HI6220_I2C0_CLK>;
+ clock-names = "clk_i2c0";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@f7101000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7101000 0x0 0x1000>;
+ interrupts = <0 45 4>;
+ clocks = <_ctrl HI6220_I2C1_CLK>;
+ clock-names = "clk_i2c1";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@f7102000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7102000 0x0 0x1000>;
+ interrupts = <0 46 4>;
+ clocks = <_ctrl HI6220_I2C2_CLK>;
+ clock-names = "clk_i2c2";
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pmx_func _cfg_func>;
+ status = "disabled";
+ };
+
};
};
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH RFC 0/8] Add New DRM Driver for Hisilicon's Hi6220 SoC
hi Daniel Stone: On 2015/9/16 23:23, Daniel Stone wrote: > Hi Xinwei, > Thanks for this contribution! We look forward to seeing support for > these devices. > > This isn't an exhaustive review, but two very high-level comments > which should result in a lot of changes ... > > On 15 September 2015 at 10:37, Xinwei Kong > wrote: >> 1. Hardware Detail >> The display subsystem of Hi6220 SoC is shown as bellow: >> +-+ +--+ +-+ +-+ >> | | | | | | | | >> | FB |-->| ADE|>| DSI |>| External| >> | | | | | | | HDMI | >> +-+ +--+ +-+ +-+ >> >> - ADE(Advanced Display Engine) is the display controller. It contains 7 >> channels or pipes, 3 overlay and a LDI. >> - A channel/pipe looks like: DMA-->clip-->scale-->ctrans/csc. >> - Overlay is response to compose planes which come from 7 channels and >> pass composed image to LDI. > > This terminology is backwards from what we usually use in DRM, where > an overlay is a special case of DRM planes, and pipes are DRM CRTCs. > >> - LDI is response to generate timings and RGB data stream. >> - DSI converts the RGB data stream from ADE to DSI packets. >> - External HDMI module is connected with DSI bus. Now Hikey use a ADI's >> ADV7533 external HDMI chip. > > So this is basically just an implementation detail of DSI? > >> 2. Software Detail >> About the software organization and implementation detail: >> We have a main drm platform driver (hisi_drm_drv.c), ade platform driver >> (hisi_ade.c) and a dsi platform driver (hisi_drm_dsi.c). Ade driver >> implements the plane and crtc driver interfaces and dsi implements the >> encoder and connector driver interfaces. We take advantage of component >> framework to initialize each driver. >> In order to support multi coming Hisilicon's SoCs, we plan to separate >> common driver code and SoC specific implemented code as possiple as we can. >> We abstract an ops for each component(crtc, plane, encoder and connector) >> to reuse the common interface implementation logic (FIXME: Not sure if we >> can achieve this target and if it is good or not). Thus, we put these >> common driver code into hisi_drm_drv/crtc/plane/encoder/connector.c files. > > Please do not do this; in general, the abstraction layers cause more > problems than they create. We have only just finished removing all the > abstraction layers from drivers/gpu/drm/exynos/, which started off > with exactly the same idea, but only created problems. The issue is > that every time the DRM core interface changes, you have to make the > exact same changes in your copies of the interface. In general, there > seems to be no benefit to having these here: you can just assign the > DRM functions directly according to generation. See current Exynos for > an example of this. > I understand that you want to let us remove the hisi_drm_crtc/plane/ encoder/connector.c files in my driver. When we plan to use abstraction layers, our purpose is that our commmon drm interface will be used in diff hisilicon soc platform such as mobile series、TV series soc , if this common interface don't use in diff soc or not take advantage of following DRM core interface changes, we will fix it. but if I will port hisi_drm_crtc/plane/.c file code into hisi_ade.c file and port hisi_drm_encoder/connector.c into hisi_drm_dsi.c file, when we add some other soc platform, we will be similar to create hardware ip *.c file, if DRM core interface will changes , we will change all refering ip.c file. I wish that you can give me some guides for this abstraction layers. Thank you xinwei > The biggest issue though, is that this driver should become an atomic > modesetting driver. Atomic modesetting, rather than sending small > individual commands (enable CRTC, change plane position, etc) is based > on validating and passing around complete sets of hardware state. > Daniel Vetter's blog has an article on how to convert your driver: > http://blog.ffwll.ch/2014/11/atomic-modeset-support-for-kms-drivers.html > > In addition, there are some drivers converted already that you can > look at: tegra (very simple), exynos (reasonably simple), fsl-dcu > (moderate), msm (quite complex), i915 (incredibly complex), rcar-du > (???). > > Once your driver is converted to atomic and the abstraction layers > removed, then it will be much easier to review the submission in > detail. > > Thanks very much! > > Cheers, > Daniel > > . > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH RFC 0/8] Add New DRM Driver for Hisilicon's Hi6220 SoC
hi Daniel Stone: On 2015/9/16 23:23, Daniel Stone wrote: > Hi Xinwei, > Thanks for this contribution! We look forward to seeing support for > these devices. > > This isn't an exhaustive review, but two very high-level comments > which should result in a lot of changes ... > > On 15 September 2015 at 10:37, Xinwei Kong > <kong.kongxin...@hisilicon.com> wrote: >> 1. Hardware Detail >> The display subsystem of Hi6220 SoC is shown as bellow: >> +-+ +--+ +-+ +-+ >> | | | | | | | | >> | FB |-->| ADE|>| DSI |>| External| >> | | | | | | | HDMI | >> +-+ +--+ +-+ +-+ >> >> - ADE(Advanced Display Engine) is the display controller. It contains 7 >> channels or pipes, 3 overlay and a LDI. >> - A channel/pipe looks like: DMA-->clip-->scale-->ctrans/csc. >> - Overlay is response to compose planes which come from 7 channels and >> pass composed image to LDI. > > This terminology is backwards from what we usually use in DRM, where > an overlay is a special case of DRM planes, and pipes are DRM CRTCs. > >> - LDI is response to generate timings and RGB data stream. >> - DSI converts the RGB data stream from ADE to DSI packets. >> - External HDMI module is connected with DSI bus. Now Hikey use a ADI's >> ADV7533 external HDMI chip. > > So this is basically just an implementation detail of DSI? > >> 2. Software Detail >> About the software organization and implementation detail: >> We have a main drm platform driver (hisi_drm_drv.c), ade platform driver >> (hisi_ade.c) and a dsi platform driver (hisi_drm_dsi.c). Ade driver >> implements the plane and crtc driver interfaces and dsi implements the >> encoder and connector driver interfaces. We take advantage of component >> framework to initialize each driver. >> In order to support multi coming Hisilicon's SoCs, we plan to separate >> common driver code and SoC specific implemented code as possiple as we can. >> We abstract an ops for each component(crtc, plane, encoder and connector) >> to reuse the common interface implementation logic (FIXME: Not sure if we >> can achieve this target and if it is good or not). Thus, we put these >> common driver code into hisi_drm_drv/crtc/plane/encoder/connector.c files. > > Please do not do this; in general, the abstraction layers cause more > problems than they create. We have only just finished removing all the > abstraction layers from drivers/gpu/drm/exynos/, which started off > with exactly the same idea, but only created problems. The issue is > that every time the DRM core interface changes, you have to make the > exact same changes in your copies of the interface. In general, there > seems to be no benefit to having these here: you can just assign the > DRM functions directly according to generation. See current Exynos for > an example of this. > I understand that you want to let us remove the hisi_drm_crtc/plane/ encoder/connector.c files in my driver. When we plan to use abstraction layers, our purpose is that our commmon drm interface will be used in diff hisilicon soc platform such as mobile series、TV series soc , if this common interface don't use in diff soc or not take advantage of following DRM core interface changes, we will fix it. but if I will port hisi_drm_crtc/plane/.c file code into hisi_ade.c file and port hisi_drm_encoder/connector.c into hisi_drm_dsi.c file, when we add some other soc platform, we will be similar to create hardware ip *.c file, if DRM core interface will changes , we will change all refering ip.c file. I wish that you can give me some guides for this abstraction layers. Thank you xinwei > The biggest issue though, is that this driver should become an atomic > modesetting driver. Atomic modesetting, rather than sending small > individual commands (enable CRTC, change plane position, etc) is based > on validating and passing around complete sets of hardware state. > Daniel Vetter's blog has an article on how to convert your driver: > http://blog.ffwll.ch/2014/11/atomic-modeset-support-for-kms-drivers.html > > In addition, there are some drivers converted already that you can > look at: tegra (very simple), exynos (reasonably simple), fsl-dcu > (moderate), msm (quite complex), i915 (incredibly complex), rcar-du > (???). > > Once your driver is converted to atomic and the abstraction layers > removed, then it will be much easier to review the submission in > detail. > > Thanks very much! > > Cheers, > Daniel > > . > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH RFC 1/8] dt-bindings: Document the hi6220 bindings for DRM driver
hi architt On 2015/9/16 17:10, Archit Taneja wrote: > Hi, > > On 09/16/2015 02:04 PM, Xinwei Kong wrote: >> hi architt >> >> On 2015/9/16 2:11, Rob Herring wrote: >>> On 09/15/2015 04:37 AM, Xinwei Kong wrote: >>>> This adds documentation of device tree bindings for the >>>> Graphics Processing Unit of hi6220 SOC. >>>> >>>> Signed-off-by: Xinliang Liu >>>> Signed-off-by: Xinwei Kong >>>> Signed-off-by: Andy Green >>>> Signed-off-by: Jiwen Qi >>>> Signed-off-by: Yu Gong >>>> --- >>>> .../devicetree/bindings/gpu/hisilicon,hi6220.txt | 69 >>>> ++ >>>> 1 file changed, 69 insertions(+) >>>> create mode 100644 >>>> Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >>>> >>>> diff --git a/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >>>> b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >>>> new file mode 100644 >>>> index 000..173ac63 >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >>>> @@ -0,0 +1,69 @@ >>>> + * Hisilicon hi6220 Graphics Processing Unit for HiKey board >>>> + >>>> + ** display-subsystem: Master device for binding DRM sub-components >>> >>> DRM is a Linuxism that doesn't belong in the binding. >>> >>>> +This master device is parent node and it will be responsible to bind >>>> all >>>> +sub-components devices node. >>> >>> Are these nodes a single block in the h/w? If not, you should describe >>> the connection of sub-nodes with of-graph instead. >>> >>>> +- Required properties : >>>> + - compatible: "hisilicon,display-subsystem". >>>> + - #address-cells, #size-cells: Must be present if the device has >>>> sub-nodes. >>>> + - ranges: to allow probing of subdevices. >>>> + - dma-coherent: Present if dma operations are coherent. >>>> + >>>> + ** ade: Graphic overlay, Graphic post-processing, display timing control. >>>> +This device is child node of display-subsystem >>>> +- Required properties : >>>> + - compatible: "hisilicon,hi6220-ade". >>>> + - reg: physical base address of the ADE register and length of >>>> memory >>>> +region. >>>> + - reg-names: Should contain the reg names "ade_base" and >>>> "media_base". >>>> + - interrupt: The interrupt number to the cpu. Defines the interrupt >>>> +by ADE. >>>> + - clocks: The clocks needed by the ADE module. >>>> + - clock-names: the name of the clocks. >>>> + >>>> + ** dsi: support mipi dsi interface >>>> +This device is child node of display-subsystem >>>> +- Required properties : >>>> + - compatible: "hisilicon,hi6220-dsi". >>>> + - reg: physical base address of the DSI register and length of >>>> memory >>>> +region. >>>> + - clocks: The clocks needed by the DSI module. >>>> + - clock-names: the name of the clocks. >>>> + -encoder-slave: phandles to a 'encoder-slave' subnode which DSI >>>> connect >>>> +ADV7533 in order to support hdmi display. >>> >>> What the ADV7533 binding looks like is still being discussed. >>> "encoder-slave" is certainly DRM specific and not how it should be done. >>> Most likely, this needs to use the of-graph ports. >>> >> I dont how to implement the encoder bridge stuff in upstream, >> you think that I will how to handle this part? > > You can use of-graph ports to link the dsi output with the adv7533 > bridge. > > An example of the binding looks like: > > Documentation/devicetree/bindings/drm/msm/dsi.txt > > The implementation of this on the dsi host side of drm/msm > can be found in dsi_host_parse_dt, in: > > drivers/gpu/drm/msm/dsi/dsi_host.c > > You can get to know more about of-graph parsing here: > > Documentation/devicetree/bindings/graph.txt > I study your patch about of-graph parsing, I know that how to parse this dts endpoint node. Then i dont kow how to use this device_node (which is get by "of_graph_get_remote_port_parent" function.) to hook adv7533 operation. can you give me some help to how to use the adv7533 interface by device_node or other way to use adv7533? > I'd started going through the drm/hisil patches. I'll > share more comments there. > > Thanks, > Archit > >> >> Thank you >> xinwei >> >>> Also, the ADV7533 connection is specific to HiKey. This binding should >>> just generically describe how any bridge or panel is connected. >>> >>> Rob >>> >>> . >>> >> >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in >> the body of a message to majord...@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html >> > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH RFC 1/8] dt-bindings: Document the hi6220 bindings for DRM driver
hi architt On 2015/9/16 17:10, Archit Taneja wrote: > Hi, > > On 09/16/2015 02:04 PM, Xinwei Kong wrote: >> hi architt >> >> On 2015/9/16 2:11, Rob Herring wrote: >>> On 09/15/2015 04:37 AM, Xinwei Kong wrote: >>>> This adds documentation of device tree bindings for the >>>> Graphics Processing Unit of hi6220 SOC. >>>> >>>> Signed-off-by: Xinliang Liu <xinliang@linaro.org> >>>> Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com> >>>> Signed-off-by: Andy Green <andy.gr...@linaro.org> >>>> Signed-off-by: Jiwen Qi <qiji...@hisilicon.com> >>>> Signed-off-by: Yu Gong <gon...@hisilicon.com> >>>> --- >>>> .../devicetree/bindings/gpu/hisilicon,hi6220.txt | 69 >>>> ++ >>>> 1 file changed, 69 insertions(+) >>>> create mode 100644 >>>> Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >>>> >>>> diff --git a/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >>>> b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >>>> new file mode 100644 >>>> index 000..173ac63 >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >>>> @@ -0,0 +1,69 @@ >>>> + * Hisilicon hi6220 Graphics Processing Unit for HiKey board >>>> + >>>> + ** display-subsystem: Master device for binding DRM sub-components >>> >>> DRM is a Linuxism that doesn't belong in the binding. >>> >>>> +This master device is parent node and it will be responsible to bind >>>> all >>>> +sub-components devices node. >>> >>> Are these nodes a single block in the h/w? If not, you should describe >>> the connection of sub-nodes with of-graph instead. >>> >>>> +- Required properties : >>>> + - compatible: "hisilicon,display-subsystem". >>>> + - #address-cells, #size-cells: Must be present if the device has >>>> sub-nodes. >>>> + - ranges: to allow probing of subdevices. >>>> + - dma-coherent: Present if dma operations are coherent. >>>> + >>>> + ** ade: Graphic overlay, Graphic post-processing, display timing control. >>>> +This device is child node of display-subsystem >>>> +- Required properties : >>>> + - compatible: "hisilicon,hi6220-ade". >>>> + - reg: physical base address of the ADE register and length of >>>> memory >>>> +region. >>>> + - reg-names: Should contain the reg names "ade_base" and >>>> "media_base". >>>> + - interrupt: The interrupt number to the cpu. Defines the interrupt >>>> +by ADE. >>>> + - clocks: The clocks needed by the ADE module. >>>> + - clock-names: the name of the clocks. >>>> + >>>> + ** dsi: support mipi dsi interface >>>> +This device is child node of display-subsystem >>>> +- Required properties : >>>> + - compatible: "hisilicon,hi6220-dsi". >>>> + - reg: physical base address of the DSI register and length of >>>> memory >>>> +region. >>>> + - clocks: The clocks needed by the DSI module. >>>> + - clock-names: the name of the clocks. >>>> + -encoder-slave: phandles to a 'encoder-slave' subnode which DSI >>>> connect >>>> +ADV7533 in order to support hdmi display. >>> >>> What the ADV7533 binding looks like is still being discussed. >>> "encoder-slave" is certainly DRM specific and not how it should be done. >>> Most likely, this needs to use the of-graph ports. >>> >> I dont how to implement the encoder bridge stuff in upstream, >> you think that I will how to handle this part? > > You can use of-graph ports to link the dsi output with the adv7533 > bridge. > > An example of the binding looks like: > > Documentation/devicetree/bindings/drm/msm/dsi.txt > > The implementation of this on the dsi host side of drm/msm > can be found in dsi_host_parse_dt, in: > > drivers/gpu/drm/msm/dsi/dsi_host.c > > You can get to know more about of-graph parsing here: > > Documentation/devicetree/bindings/graph.txt > I study your patch about of-graph parsing, I know that how to parse this dts endpoint node. Then i dont kow how to use this device_node (which is get by "of_graph_get_remote_port_parent" function.) to hook adv7533 operation. can you give me some help to how to use the adv7533 interface by device_node or other way to use adv7533? > I'd started going through the drm/hisil patches. I'll > share more comments there. > > Thanks, > Archit > >> >> Thank you >> xinwei >> >>> Also, the ADV7533 connection is specific to HiKey. This binding should >>> just generically describe how any bridge or panel is connected. >>> >>> Rob >>> >>> . >>> >> >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in >> the body of a message to majord...@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html >> > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH RFC 1/8] dt-bindings: Document the hi6220 bindings for DRM driver
hi architt On 2015/9/16 2:11, Rob Herring wrote: > On 09/15/2015 04:37 AM, Xinwei Kong wrote: >> This adds documentation of device tree bindings for the >> Graphics Processing Unit of hi6220 SOC. >> >> Signed-off-by: Xinliang Liu >> Signed-off-by: Xinwei Kong >> Signed-off-by: Andy Green >> Signed-off-by: Jiwen Qi >> Signed-off-by: Yu Gong >> --- >> .../devicetree/bindings/gpu/hisilicon,hi6220.txt | 69 >> ++ >> 1 file changed, 69 insertions(+) >> create mode 100644 >> Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >> >> diff --git a/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >> b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >> new file mode 100644 >> index 000..173ac63 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >> @@ -0,0 +1,69 @@ >> + * Hisilicon hi6220 Graphics Processing Unit for HiKey board >> + >> + ** display-subsystem: Master device for binding DRM sub-components > > DRM is a Linuxism that doesn't belong in the binding. > >> +This master device is parent node and it will be responsible to bind all >> +sub-components devices node. > > Are these nodes a single block in the h/w? If not, you should describe > the connection of sub-nodes with of-graph instead. > >> +- Required properties : >> + - compatible: "hisilicon,display-subsystem". >> + - #address-cells, #size-cells: Must be present if the device has >> sub-nodes. >> + - ranges: to allow probing of subdevices. >> + - dma-coherent: Present if dma operations are coherent. >> + >> + ** ade: Graphic overlay, Graphic post-processing, display timing control. >> +This device is child node of display-subsystem >> +- Required properties : >> + - compatible: "hisilicon,hi6220-ade". >> + - reg: physical base address of the ADE register and length of memory >> +region. >> + - reg-names: Should contain the reg names "ade_base" and "media_base". >> + - interrupt: The interrupt number to the cpu. Defines the interrupt >> +by ADE. >> + - clocks: The clocks needed by the ADE module. >> + - clock-names: the name of the clocks. >> + >> + ** dsi: support mipi dsi interface >> +This device is child node of display-subsystem >> +- Required properties : >> + - compatible: "hisilicon,hi6220-dsi". >> + - reg: physical base address of the DSI register and length of memory >> +region. >> + - clocks: The clocks needed by the DSI module. >> + - clock-names: the name of the clocks. >> + - encoder-slave: phandles to a 'encoder-slave' subnode which DSI >> connect >> +ADV7533 in order to support hdmi display. > > What the ADV7533 binding looks like is still being discussed. > "encoder-slave" is certainly DRM specific and not how it should be done. > Most likely, this needs to use the of-graph ports. > I dont how to implement the encoder bridge stuff in upstream, you think that I will how to handle this part? Thank you xinwei > Also, the ADV7533 connection is specific to HiKey. This binding should > just generically describe how any bridge or panel is connected. > > Rob > > . > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH RFC 1/8] dt-bindings: Document the hi6220 bindings for DRM driver
hi architt On 2015/9/16 2:11, Rob Herring wrote: > On 09/15/2015 04:37 AM, Xinwei Kong wrote: >> This adds documentation of device tree bindings for the >> Graphics Processing Unit of hi6220 SOC. >> >> Signed-off-by: Xinliang Liu <xinliang@linaro.org> >> Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com> >> Signed-off-by: Andy Green <andy.gr...@linaro.org> >> Signed-off-by: Jiwen Qi <qiji...@hisilicon.com> >> Signed-off-by: Yu Gong <gon...@hisilicon.com> >> --- >> .../devicetree/bindings/gpu/hisilicon,hi6220.txt | 69 >> ++ >> 1 file changed, 69 insertions(+) >> create mode 100644 >> Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >> >> diff --git a/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >> b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >> new file mode 100644 >> index 000..173ac63 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt >> @@ -0,0 +1,69 @@ >> + * Hisilicon hi6220 Graphics Processing Unit for HiKey board >> + >> + ** display-subsystem: Master device for binding DRM sub-components > > DRM is a Linuxism that doesn't belong in the binding. > >> +This master device is parent node and it will be responsible to bind all >> +sub-components devices node. > > Are these nodes a single block in the h/w? If not, you should describe > the connection of sub-nodes with of-graph instead. > >> +- Required properties : >> + - compatible: "hisilicon,display-subsystem". >> + - #address-cells, #size-cells: Must be present if the device has >> sub-nodes. >> + - ranges: to allow probing of subdevices. >> + - dma-coherent: Present if dma operations are coherent. >> + >> + ** ade: Graphic overlay, Graphic post-processing, display timing control. >> +This device is child node of display-subsystem >> +- Required properties : >> + - compatible: "hisilicon,hi6220-ade". >> + - reg: physical base address of the ADE register and length of memory >> +region. >> + - reg-names: Should contain the reg names "ade_base" and "media_base". >> + - interrupt: The interrupt number to the cpu. Defines the interrupt >> +by ADE. >> + - clocks: The clocks needed by the ADE module. >> + - clock-names: the name of the clocks. >> + >> + ** dsi: support mipi dsi interface >> +This device is child node of display-subsystem >> +- Required properties : >> + - compatible: "hisilicon,hi6220-dsi". >> + - reg: physical base address of the DSI register and length of memory >> +region. >> + - clocks: The clocks needed by the DSI module. >> + - clock-names: the name of the clocks. >> + - encoder-slave: phandles to a 'encoder-slave' subnode which DSI >> connect >> +ADV7533 in order to support hdmi display. > > What the ADV7533 binding looks like is still being discussed. > "encoder-slave" is certainly DRM specific and not how it should be done. > Most likely, this needs to use the of-graph ports. > I dont how to implement the encoder bridge stuff in upstream, you think that I will how to handle this part? Thank you xinwei > Also, the ADV7533 connection is specific to HiKey. This binding should > just generically describe how any bridge or panel is connected. > > Rob > > . > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH RFC 6/8] drm: hisilicon: Add support for fbdev
hi rob On 2015/9/16 2:25, Rob Herring wrote: > On 09/15/2015 04:37 AM, Xinwei Kong wrote: >> If you config DRM_HISI_FBDEV optional, this patch will only support fbdev >> mode while also supporting double buffer. > > This is a lot of duplicated code from CMA fbdev. Is double buffering the > only reason why CMA fbdev can't be used or are there some other > constraints? Double buffering in fbdev has always been a hack, so I'm > guessing that is not a feature that should be added here. > I will drop it. xinwei > Rob > >> Signed-off-by: Xinliang Liu >> Signed-off-by: Xinwei Kong >> Signed-off-by: Andy Green >> Signed-off-by: Jiwen Qi >> Signed-off-by: Yu Gong >> --- >> drivers/gpu/drm/hisilicon/Kconfig | 13 + >> drivers/gpu/drm/hisilicon/Makefile | 3 +- >> drivers/gpu/drm/hisilicon/hisi_drm_connector.c | 4 + >> drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 9 + >> drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 15 + >> drivers/gpu/drm/hisilicon/hisi_drm_fb.h| 5 + >> drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c | 395 >> + >> drivers/gpu/drm/hisilicon/hisi_drm_fbdev.h | 24 ++ >> 8 files changed, 467 insertions(+), 1 deletion(-) >> create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c >> create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fbdev.h > > > . > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH RFC 0/8] Add New DRM Driver for Hisilicon's Hi6220 SoC
These patch set adds a new drm driver for Hisilicon's Hi6220 SoC. Current testing and support board is Hikey board which is one of Linaro 96boards. It is an arm64 open source board. For more information about this board, please access https://www.96boards.org. 1. Hardware Detail The display subsystem of Hi6220 SoC is shown as bellow: +-+ +--+ +-+ +-+ | | | | | | | | | FB |-->| ADE|>| DSI |>| External| | | | | | | | HDMI | +-+ +--+ +-+ +-+ - ADE(Advanced Display Engine) is the display controller. It contains 7 channels or pipes, 3 overlay and a LDI. - A channel/pipe looks like: DMA-->clip-->scale-->ctrans/csc. - Overlay is response to compose planes which come from 7 channels and pass composed image to LDI. - LDI is response to generate timings and RGB data stream. - DSI converts the RGB data stream from ADE to DSI packets. - External HDMI module is connected with DSI bus. Now Hikey use a ADI's ADV7533 external HDMI chip. 2. Software Detail About the software organization and implementation detail: We have a main drm platform driver (hisi_drm_drv.c), ade platform driver (hisi_ade.c) and a dsi platform driver (hisi_drm_dsi.c). Ade driver implements the plane and crtc driver interfaces and dsi implements the encoder and connector driver interfaces. We take advantage of component framework to initialize each driver. In order to support multi coming Hisilicon's SoCs, we plan to separate common driver code and SoC specific implemented code as possiple as we can. We abstract an ops for each component(crtc, plane, encoder and connector) to reuse the common interface implementation logic (FIXME: Not sure if we can achieve this target and if it is good or not). Thus, we put these common driver code into hisi_drm_drv/crtc/plane/encoder/connector.c files. Xinwei Kong (8): dt-bindings: Document the hi6220 bindings for DRM driver drm: hisilicon: Add new DRM driver for hisilicon Soc drm: hisilicon: Add the link to DRM/KMS interface drm: hisilicon: fill interface function of plane\crtc part drm: hisilicon: fill interface function of encoder\connector part drm: hisilicon: Add support for fbdev drm: hisilicon: Add support for vblank dts: hisilicon: Add drm driver device dts config for HiKey board .../devicetree/bindings/gpu/hisilicon,hi6220.txt | 69 + arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 34 + arch/arm64/configs/defconfig |5 + drivers/gpu/drm/Kconfig|2 + drivers/gpu/drm/Makefile |1 + drivers/gpu/drm/hisilicon/Kconfig | 32 + drivers/gpu/drm/hisilicon/Makefile | 12 + drivers/gpu/drm/hisilicon/hisi_ade.c | 1360 drivers/gpu/drm/hisilicon/hisi_ade_reg.h | 208 +++ drivers/gpu/drm/hisilicon/hisi_drm_connector.c | 128 ++ drivers/gpu/drm/hisilicon/hisi_drm_connector.h | 33 + drivers/gpu/drm/hisilicon/hisi_drm_crtc.c | 315 + drivers/gpu/drm/hisilicon/hisi_drm_crtc.h | 64 + drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 220 drivers/gpu/drm/hisilicon/hisi_drm_drv.h | 36 + drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 829 drivers/gpu/drm/hisilicon/hisi_drm_encoder.c | 117 ++ drivers/gpu/drm/hisilicon/hisi_drm_encoder.h | 41 + drivers/gpu/drm/hisilicon/hisi_drm_fb.c| 175 +++ drivers/gpu/drm/hisilicon/hisi_drm_fb.h| 33 + drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c | 395 ++ drivers/gpu/drm/hisilicon/hisi_drm_fbdev.h | 24 + drivers/gpu/drm/hisilicon/hisi_drm_plane.c | 257 drivers/gpu/drm/hisilicon/hisi_drm_plane.h | 55 + drivers/gpu/drm/hisilicon/hisi_dsi_reg.h | 91 ++ 25 files changed, 4536 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt create mode 100644 drivers/gpu/drm/hisilicon/Kconfig create mode 100644 drivers/gpu/drm/hisilicon/Makefile create mode 100644 drivers/gpu/drm/hisilicon/hisi_ade.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_ade_reg.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_connector.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_connector.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_crtc.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_crtc.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_dsi.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_encoder.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_encoder.h create mode 100644 drivers/gpu/drm/hisil
[PATCH RFC 7/8] drm: hisilicon: Add support for vblank
This patch adds ldi interrupt to handle vblank.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
drivers/gpu/drm/hisilicon/hisi_ade.c | 71 +++-
drivers/gpu/drm/hisilicon/hisi_drm_crtc.c | 89 +++
drivers/gpu/drm/hisilicon/hisi_drm_crtc.h | 7 +++
drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 5 ++
4 files changed, 170 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade.c
b/drivers/gpu/drm/hisilicon/hisi_ade.c
index 2ea3f8f..44480c2 100644
--- a/drivers/gpu/drm/hisilicon/hisi_ade.c
+++ b/drivers/gpu/drm/hisilicon/hisi_ade.c
@@ -156,11 +156,12 @@ static void ade_display_commit(struct ade_crtc *acrtc)
/* set reset mode:soft or hw, and reload modules */
ade_set_reset_and_reload(acrtc);
- /* enable ade */
+ /* ade enabled */
wmb();
writel(ADE_ENABLE, base + ADE_EN);
- wmb(); /* memory barrier */
+ /* ldi enabled after ade */
+ wmb();
val = ADE_ENABLE;
val |= readl(base + LDI_CTRL);
writel(val, base + LDI_CTRL);
@@ -596,6 +597,63 @@ int ade_install_plane_properties(struct drm_device *dev,
return 0;
}
+int ade_enable_vblank(struct hisi_crtc *hcrtc)
+{
+ struct ade_hardware_context *ctx = hcrtc->ctx;
+ void __iomem *base = ctx->base;
+ u32 intr_en;
+ int ret;
+
+ if (!ctx->power_on) {
+ ret = ade_power_up(ctx);
+ if (ret) {
+ DRM_ERROR("%s: failed to power up ade\n", __func__);
+ return ret;
+ }
+ }
+
+ intr_en = readl(base + LDI_INT_EN);
+ intr_en |= LDI_ISR_FRAME_END_INT;
+ writel(intr_en, base + LDI_INT_EN);
+
+ return 0;
+}
+
+void ade_disable_vblank(struct hisi_crtc *hcrtc)
+{
+ struct ade_hardware_context *ctx = hcrtc->ctx;
+ void __iomem *base = ctx->base;
+ u32 intr_en;
+
+ if (!ctx->power_on) {
+ DRM_ERROR("power is down! vblank disable fail\n");
+ return;
+ }
+
+ intr_en = readl(base + LDI_INT_EN);
+ intr_en &= ~LDI_ISR_FRAME_END_INT;
+ writel(intr_en, base + LDI_INT_EN);
+}
+
+irqreturn_t ade_irq_handler(int irq, struct hisi_crtc *hcrtc)
+{
+ struct ade_hardware_context *ctx = hcrtc->ctx;
+ struct drm_crtc *crtc = >base;
+ struct drm_device *dev = crtc->dev;
+ void __iomem *base = ctx->base;
+ u32 status;
+
+ status = readl(base + LDI_MSK_INT);
+
+ /* vblank irq */
+ if (status & LDI_ISR_FRAME_END_INT) {
+ writel(LDI_ISR_FRAME_END_INT, base + LDI_INT_CLR);
+ drm_handle_vblank(dev, drm_crtc_index(crtc));
+ }
+
+ return IRQ_HANDLED;
+}
+
/* convert from fourcc format to ade format */
static u32 ade_get_format(u32 pixel_format)
{
@@ -1112,6 +1170,9 @@ static struct hisi_crtc_ops ade_crtc_ops = {
.mode_set_nofb = ade_crtc_mode_set_nofb,
.atomic_begin = ade_crtc_atomic_begin,
.atomic_flush = ade_crtc_atomic_flush,
+ .irq_handler = ade_irq_handler,
+ .enable_vblank = ade_enable_vblank,
+ .disable_vblank = ade_disable_vblank,
.install_properties = ade_install_crtc_properties,
};
@@ -1226,6 +1287,12 @@ static int ade_bind(struct device *dev, struct device
*master, void *data)
return ret;
}
+ /* ldi irq install */
+ ret = hisi_drm_crtc_irq_install(drm_dev, ctx->irq, DRIVER_IRQ_SHARED,
+ hcrtc);
+ if (ret)
+ return ret;
+
return 0;
}
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
b/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
index feeadc4..db64c2a 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
@@ -17,6 +17,95 @@
#include "hisi_drm_drv.h"
#include "hisi_drm_crtc.h"
+/*
+ * drm_get_crtc_from_index - find a registered CRTC from the index
+ * @dev: DRM device
+ * @index: index of a registered CRTC
+ *
+ * Given a index, return the registered CRTC within a DRM
+ * device's list of CRTCs.
+ */
+struct drm_crtc *hisi_drm_get_crtc_from_index(struct drm_device *dev,
+ unsigned int index)
+{
+ unsigned int index_tmp = 0;
+ struct drm_crtc *crtc;
+
+ list_for_each_entry(crtc, >mode_config.crtc_list, head) {
+ if (index_tmp == index)
+ return crtc;
+
+ index_tmp++;
+ }
+
+ BUG();
+}
+
+int hisi_drm_crtc_enable_vblank(struct drm_device *dev, int c)
+{
+ struct drm_crtc *crtc = hisi_drm_get_crtc_from_index(dev, c);
+ struct hisi_crtc *hcrtc = to_hisi_crtc(crtc);
+ struct hisi_crtc_ops *ops = hcrtc-&g
[PATCH RFC 3/8] drm: hisilicon: Add the link to DRM/KMS interface
This patch makes the link with DRM/KMS interface by initializing the drm
plane/crtc/encoder/connector and adding the drm plane/crtc/encoder/
connector helper.
This patch is compatible with different hisilicon platform such as Hikey
series of boards and other series of boards.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
drivers/gpu/drm/hisilicon/Makefile | 4 +
drivers/gpu/drm/hisilicon/hisi_ade.c | 44 +
drivers/gpu/drm/hisilicon/hisi_ade_reg.h | 27 +++
drivers/gpu/drm/hisilicon/hisi_drm_connector.c | 90 ++
drivers/gpu/drm/hisilicon/hisi_drm_connector.h | 25 +++
drivers/gpu/drm/hisilicon/hisi_drm_crtc.c | 179 ++
drivers/gpu/drm/hisilicon/hisi_drm_crtc.h | 45 +
drivers/gpu/drm/hisilicon/hisi_drm_drv.h | 36
drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 13 ++
drivers/gpu/drm/hisilicon/hisi_drm_encoder.c | 65 +++
drivers/gpu/drm/hisilicon/hisi_drm_encoder.h | 22 +++
drivers/gpu/drm/hisilicon/hisi_drm_plane.c | 240 +
drivers/gpu/drm/hisilicon/hisi_drm_plane.h | 51 ++
13 files changed, 841 insertions(+)
create mode 100644 drivers/gpu/drm/hisilicon/hisi_ade_reg.h
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_connector.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_connector.h
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_crtc.h
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.h
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_encoder.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_encoder.h
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_plane.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_plane.h
diff --git a/drivers/gpu/drm/hisilicon/Makefile
b/drivers/gpu/drm/hisilicon/Makefile
index 3f042fd..aa522f8 100644
--- a/drivers/gpu/drm/hisilicon/Makefile
+++ b/drivers/gpu/drm/hisilicon/Makefile
@@ -1,6 +1,10 @@
hisi-drm-y := hisi_drm_drv.o \
hisi_ade.o \
hisi_drm_dsi.o \
+ hisi_drm_plane.o \
+ hisi_drm_crtc.o \
+ hisi_drm_encoder.o \
+ hisi_drm_connector.o \
hisi_drm_fb.o \
obj-$(CONFIG_DRM_HISI) += hisi-drm.o
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade.c
b/drivers/gpu/drm/hisilicon/hisi_ade.c
index 9b58d20..148ed2f 100644
--- a/drivers/gpu/drm/hisilicon/hisi_ade.c
+++ b/drivers/gpu/drm/hisilicon/hisi_ade.c
@@ -15,6 +15,16 @@
#include
+#include "hisi_drm_plane.h"
+#include "hisi_drm_crtc.h"
+#include "hisi_ade_reg.h"
+
+#define PRIMARY_CH (ADE_CH1)
+
+struct ade_crtc {
+ struct hisi_crtc base;
+};
+
struct ade_hardware_context {
void __iomem *base;
void __iomem *media_base;
@@ -30,6 +40,8 @@ struct ade_hardware_context {
};
struct hisi_ade {
+ struct ade_crtc acrtc;
+ struct hisi_plane hplane[ADE_CH_NUM];
struct ade_hardware_context ctx;
};
@@ -99,6 +111,38 @@ static int ade_dts_parse(struct platform_device *pdev,
static int ade_bind(struct device *dev, struct device *master, void *data)
{
+ struct hisi_ade *ade = dev_get_drvdata(dev);
+ struct ade_hardware_context *ctx = >ctx;
+ struct hisi_crtc *hcrtc = >acrtc.base;
+ struct drm_device *drm_dev = (struct drm_device *)data;
+ struct hisi_plane *hplane;
+ enum drm_plane_type type;
+ int ret;
+ int i;
+
+ /*
+* plane init
+* TODO: Now only support primary plane, overlay planes
+* need to do.
+*/
+ for (i = 0; i < 1; i++) {
+ hplane = >hplane[i];
+ hplane->ch = i;
+ hplane->ctx = ctx;
+ type = i == PRIMARY_CH ? DRM_PLANE_TYPE_PRIMARY :
+ DRM_PLANE_TYPE_OVERLAY;
+
+ ret = hisi_drm_plane_init(drm_dev, hplane, type);
+ if (ret)
+ return ret;
+ }
+
+ /* crtc init */
+ hcrtc->ctx = ctx;
+ ret = hisi_drm_crtc_init(drm_dev, hcrtc, >hplane[PRIMARY_CH].base);
+ if (ret)
+ return ret;
+
return 0;
}
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
new file mode 100644
index 000..bdf3c3b
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
@@ -0,0 +1,27 @@
+/*
+ * Hisilicon Terminal SoCs drm driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Author: Xinwei Kong for hisilicon
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __HISI_ADE_REG_H__
+#define __HISI_ADE_REG_H__
+
+enum ade_chan
[PATCH RFC 2/8] drm: hisilicon: Add new DRM driver for hisilicon Soc
This patch creates this driver itself and register all the sub-components
which is from DTS inode, this driver uses components framework mechanism
to bind all the sub-components.
This patch also introduces a memory manager for hisilison drm. As cma
framebuffer helpers can no more be used.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
arch/arm64/configs/defconfig | 5 +
drivers/gpu/drm/Kconfig | 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/hisilicon/Kconfig| 9 ++
drivers/gpu/drm/hisilicon/Makefile | 7 ++
drivers/gpu/drm/hisilicon/hisi_ade.c | 166 +
drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 206 +++
drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 131
drivers/gpu/drm/hisilicon/hisi_drm_fb.c | 156 +++
drivers/gpu/drm/hisilicon/hisi_drm_fb.h | 26
10 files changed, 709 insertions(+)
create mode 100644 drivers/gpu/drm/hisilicon/Kconfig
create mode 100644 drivers/gpu/drm/hisilicon/Makefile
create mode 100644 drivers/gpu/drm/hisilicon/hisi_ade.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fb.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fb.h
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 4e17e7e..c2ea280 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -146,6 +146,8 @@ CONFIG_LEDS_CLASS=y
CONFIG_LEDS_SYSCON=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+
+
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_EFI=y
@@ -199,3 +201,6 @@ CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
+CONFIG_DRM=y
+CONFIG_DRM_HISI=y
+# CONFIG_DRM_HISI_FBDEV is not set
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index c46ca31..31ee120 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -240,3 +240,5 @@ source "drivers/gpu/drm/sti/Kconfig"
source "drivers/gpu/drm/amd/amdkfd/Kconfig"
source "drivers/gpu/drm/imx/Kconfig"
+
+source "drivers/gpu/drm/hisilicon/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 5713d05..47936d4 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -67,6 +67,7 @@ obj-$(CONFIG_DRM_MSM) += msm/
obj-$(CONFIG_DRM_TEGRA) += tegra/
obj-$(CONFIG_DRM_STI) += sti/
obj-$(CONFIG_DRM_IMX) += imx/
+obj-$(CONFIG_DRM_HISI) += hisilicon/
obj-y += i2c/
obj-y += panel/
obj-y += bridge/
diff --git a/drivers/gpu/drm/hisilicon/Kconfig
b/drivers/gpu/drm/hisilicon/Kconfig
new file mode 100644
index 000..60b42e4
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/Kconfig
@@ -0,0 +1,9 @@
+config DRM_HISI
+ tristate "DRM Support for Hisilicon Terminal SoCs Platform"
+ depends on DRM
+ select DRM_KMS_HELPER
+ select DRM_GEM_CMA_HELPER
+ help
+ Choose this option if you have a hisilicon terminal chipset.
+ If M is selected the module will be called hisi-drm.
+
diff --git a/drivers/gpu/drm/hisilicon/Makefile
b/drivers/gpu/drm/hisilicon/Makefile
new file mode 100644
index 000..3f042fd
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/Makefile
@@ -0,0 +1,7 @@
+hisi-drm-y := hisi_drm_drv.o \
+ hisi_ade.o \
+ hisi_drm_dsi.o \
+ hisi_drm_fb.o \
+
+obj-$(CONFIG_DRM_HISI) += hisi-drm.o
+
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade.c
b/drivers/gpu/drm/hisilicon/hisi_ade.c
new file mode 100644
index 000..9b58d20
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/hisi_ade.c
@@ -0,0 +1,166 @@
+/*
+ * Hisilicon Terminal SoCs drm driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Author: Xinwei Kong for hisilicon
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+#include
+
+#include
+
+struct ade_hardware_context {
+ void __iomem *base;
+ void __iomem *media_base;
+
+ int irq;
+ u32 ade_core_rate;
+ u32 media_noc_rate;
+
+ struct clk *ade_core_clk;
+ struct clk *media_noc_clk;
+ struct clk *ade_pix_clk;
+ bool power_on;
+};
+
+struct hisi_ade {
+ struct ade_hardware_context ctx;
+};
+
+static int ade_dts_parse(struct platform_device *pdev,
+struct ade_hardware_context *ctx)
+{
+ struct resource *res;
+ struct device *dev;
+ struct device_node *np;
+ int ret;
+
+ dev
[PATCH RFC 5/8] drm: hisilicon: fill interface function of encoder\connector part
This patch enables the adv7533 module which is connecting hisilicon SOC
by dsi module. while using DSI module and adv7533 module to implement the
encoder/connector interface of DRM\KMS.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
drivers/gpu/drm/hisilicon/Kconfig | 10 +
drivers/gpu/drm/hisilicon/hisi_drm_connector.c | 34 ++
drivers/gpu/drm/hisilicon/hisi_drm_connector.h | 8 +
drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 670 +
drivers/gpu/drm/hisilicon/hisi_drm_encoder.c | 52 ++
drivers/gpu/drm/hisilicon/hisi_drm_encoder.h | 19 +
drivers/gpu/drm/hisilicon/hisi_dsi_reg.h | 91
7 files changed, 884 insertions(+)
create mode 100644 drivers/gpu/drm/hisilicon/hisi_dsi_reg.h
diff --git a/drivers/gpu/drm/hisilicon/Kconfig
b/drivers/gpu/drm/hisilicon/Kconfig
index 60b42e4..105dbcb 100644
--- a/drivers/gpu/drm/hisilicon/Kconfig
+++ b/drivers/gpu/drm/hisilicon/Kconfig
@@ -7,3 +7,13 @@ config DRM_HISI
Choose this option if you have a hisilicon terminal chipset.
If M is selected the module will be called hisi-drm.
+if DRM_HISI
+
+config DRM_HISI_HAS_SLAVE_ENCODER
+ bool "Support slave encoder output"
+ default y
+ help
+ Support slave encoder output device such as DSI interface connecting
+ HDMI converter by i2c.
+
+endif
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
b/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
index 62efdc7..57ab2e8 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
@@ -23,8 +23,21 @@
int hisi_drm_connector_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
{
+ struct hisi_connector *hconnector = to_hisi_connector(connector);
+ struct drm_encoder *encoder = hconnector->encoder;
+ struct hisi_connector_funcs *ops = hconnector->ops;
+ struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
int ret = MODE_OK;
+ if (ops->modes_valid)
+ ops->modes_valid(connector);
+
+ if (sfuncs && sfuncs->mode_valid) {
+ ret = sfuncs->mode_valid(encoder, mode);
+ if (ret != MODE_OK)
+ return ret;
+ }
+
return ret;
}
@@ -39,8 +52,19 @@ hisi_drm_best_encoder(struct drm_connector *connector)
int hisi_drm_get_modes(struct drm_connector *connector)
{
+ struct hisi_connector *hconnector = to_hisi_connector(connector);
+ struct hisi_connector_funcs *ops = hconnector->ops;
+ struct drm_encoder *encoder = hconnector->encoder;
+ struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
int count = 0;
+ if (ops->get_modes) {
+ count += ops->get_modes(connector);
+ } else {
+ if (sfuncs && sfuncs->get_modes)
+ count += sfuncs->get_modes(encoder, connector);
+ }
+
return count;
}
@@ -59,8 +83,18 @@ void hisi_drm_connector_destroy(struct drm_connector
*connector)
enum drm_connector_status
hisi_drm_detect(struct drm_connector *connector, bool force)
{
+ struct hisi_connector *hconnector = to_hisi_connector(connector);
+ struct drm_encoder *encoder = hconnector->encoder;
+ struct hisi_connector_funcs *ops = hconnector->ops;
+ struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
enum drm_connector_status status = connector_status_unknown;
+ if (ops->detect)
+ ops->detect(connector);
+
+ if (sfuncs && sfuncs->detect)
+ status = sfuncs->detect(encoder, connector);
+
return status;
}
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_connector.h
b/drivers/gpu/drm/hisilicon/hisi_drm_connector.h
index 114391c..a8b8409 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_connector.h
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_connector.h
@@ -13,9 +13,17 @@
#ifndef __HISI_DRM_CONNECTOR_H__
#define __HISI_DRM_CONNECTOR_H__
+struct hisi_connector_funcs {
+ enum drm_connector_status
+ (*detect) (struct drm_connector *connector);
+ int (*get_modes)(struct drm_connector *connector);
+ int (*modes_valid)(struct drm_connector *connector);
+};
+
struct hisi_connector {
struct drm_connector connector;
struct drm_encoder *encoder;
+ void *ops;
};
void hisi_drm_connector_init(struct drm_device *dev,
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
index 046fd8e..8509ced 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
@@ -12,18 +12,72 @@
#include
#include
+#include
#include
#include
[PATCH RFC 8/8] dts: hisilicon: Add drm driver device dts config for HiKey board
This patch adds drm dts node for HiKey board using hi6220 SOC.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 34 +++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 3f03380..9ce8c62 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -4,6 +4,7 @@
* Copyright (C) 2015, Hisilicon Ltd.
*/
+#include
#include
/ {
@@ -167,5 +168,38 @@
clocks = <_ctrl 36>, <_ctrl 36>;
clock-names = "uartclk", "apb_pclk";
};
+
+ display-subsystem {
+ compatible = "hisilicon,display-subsystem";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-coherent;
+
+ ade: ade@f410 {
+ compatible = "hisilicon,hi6220-ade";
+ reg = <0x0 0xf410 0x0 0x7800>,
+ <0x0 0xf441 0x0 0x1000>;
+ reg-names = "ade_base",
+ "media_base";
+ interrupts = <0 115 4>; /* ldi interrupt */
+
+ clocks = <_ctrl HI6220_ADE_CORE>,
+<_ctrl HI6220_CODEC_JPEG>,
+<_ctrl HI6220_ADE_PIX_SRC>;
+ /*clock name*/
+ clock-names = "clk_ade_core",
+ "aclk_codec_jpeg_src",
+ "clk_ade_pix";
+ };
+
+ dsi {
+ compatible = "hisilicon,hi6220-dsi";
+ reg = <0x0 0xf4107800 0x0 0x100>;
+ clocks = <_ctrl HI6220_DSI_PCLK>;
+ clock-names = "pclk_dsi";
+ encoder-slave = <>;
+ };
+ };
};
};
--
1.9.1
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[PATCH RFC 6/8] drm: hisilicon: Add support for fbdev
If you config DRM_HISI_FBDEV optional, this patch will only support fbdev
mode while also supporting double buffer.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
drivers/gpu/drm/hisilicon/Kconfig | 13 +
drivers/gpu/drm/hisilicon/Makefile | 3 +-
drivers/gpu/drm/hisilicon/hisi_drm_connector.c | 4 +
drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 9 +
drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 15 +
drivers/gpu/drm/hisilicon/hisi_drm_fb.h| 5 +
drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c | 395 +
drivers/gpu/drm/hisilicon/hisi_drm_fbdev.h | 24 ++
8 files changed, 467 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fbdev.h
diff --git a/drivers/gpu/drm/hisilicon/Kconfig
b/drivers/gpu/drm/hisilicon/Kconfig
index 105dbcb..ddf43d5 100644
--- a/drivers/gpu/drm/hisilicon/Kconfig
+++ b/drivers/gpu/drm/hisilicon/Kconfig
@@ -16,4 +16,17 @@ config DRM_HISI_HAS_SLAVE_ENCODER
Support slave encoder output device such as DSI interface connecting
HDMI converter by i2c.
+config DRM_HISI_FBDEV
+ bool "Enable legacy fbdev support"
+ select DRM_KMS_FB_HELPER
+ select FB_SYS_FILLRECT
+ select FB_SYS_COPYAREA
+ select FB_SYS_IMAGEBLIT
+ select FB_SYS_FOPS
+ default y
+ help
+ Choose this option if you have a need for the legacy fbdev support.
+ Note that this support also provides the Linux console on top of
+ the hisi modesetting driver.
+
endif
diff --git a/drivers/gpu/drm/hisilicon/Makefile
b/drivers/gpu/drm/hisilicon/Makefile
index aa522f8..1877d36 100644
--- a/drivers/gpu/drm/hisilicon/Makefile
+++ b/drivers/gpu/drm/hisilicon/Makefile
@@ -5,7 +5,8 @@ hisi-drm-y := hisi_drm_drv.o \
hisi_drm_crtc.o \
hisi_drm_encoder.o \
hisi_drm_connector.o \
- hisi_drm_fb.o \
+ hisi_drm_fb.o
obj-$(CONFIG_DRM_HISI) += hisi-drm.o
+obj-$(CONFIG_DRM_HISI_FBDEV) += hisi_drm_fbdev.o
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
b/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
index 57ab2e8..2359ed8 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
@@ -120,5 +120,9 @@ void hisi_drm_connector_init(struct drm_device *dev,
drm_connector_register(connector);
drm_mode_connector_attach_encoder(connector, encoder);
+#ifndef CONFIG_DRM_HISI_FBDEV
+ drm_reinit_primary_mode_group(dev);
+#endif
+
drm_mode_config_reset(dev);
}
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
index 0983ad7..53f2521 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
@@ -17,6 +17,7 @@
#include
#include
+#include "hisi_drm_drv.h"
#include "hisi_drm_fb.h"
#define DRIVER_NAME"hisi-drm"
@@ -49,11 +50,19 @@ static void hisi_drm_mode_config_init(struct drm_device
*dev)
static int hisi_drm_load(struct drm_device *dev, unsigned long flags)
{
+ struct hisi_drm_private *priv;
int ret;
/* debug setting
drm_debug = DRM_UT_DRIVER|DRM_UT_KMS; */
+ priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ dev->dev_private = priv;
+ dev_set_drvdata(dev->dev, dev);
+
/* dev->mode_config initialization */
drm_mode_config_init(dev);
hisi_drm_mode_config_init(dev);
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
index 8509ced..8329734 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
@@ -16,10 +16,14 @@
#include
#include
+#include
#include "hisi_drm_encoder.h"
#include "hisi_drm_connector.h"
#include "hisi_dsi_reg.h"
+#ifdef CONFIG_DRM_HISI_FBDEV
+#include "hisi_drm_fbdev.h"
+#endif
#define encoder_to_dsi(encoder) \
container_of(encoder, struct hisi_dsi, hisi_encoder.base.base)
@@ -699,6 +703,15 @@ static int hisi_dsi_bind(struct device *dev, struct device
*master,
hisi_drm_connector_init(ctx->dev, >dsi.hisi_encoder.base.base,
>dsi.hisi_connector.connector);
+#ifdef CONFIG_DRM_HISI_FBDEV
+ /* fbdev initialization should be put at last position */
+ ret = hisi_drm_fbdev_init(ctx->dev);
+ if (ret) {
+ DRM_ERROR("failed to initialize fbdev\n");
+ return ret;
+ }
+#endif
+
return ret;
}
@@ -780,6 +793,8 @@ static int hisi_dsi_probe(struct platform_device *pdev)
[PATCH RFC 1/8] dt-bindings: Document the hi6220 bindings for DRM driver
This adds documentation of device tree bindings for the
Graphics Processing Unit of hi6220 SOC.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
.../devicetree/bindings/gpu/hisilicon,hi6220.txt | 69 ++
1 file changed, 69 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt
diff --git a/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt
b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt
new file mode 100644
index 000..173ac63
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt
@@ -0,0 +1,69 @@
+ * Hisilicon hi6220 Graphics Processing Unit for HiKey board
+
+ ** display-subsystem: Master device for binding DRM sub-components
+This master device is parent node and it will be responsible to bind all
+sub-components devices node.
+- Required properties :
+ - compatible: "hisilicon,display-subsystem".
+ - #address-cells, #size-cells: Must be present if the device has
sub-nodes.
+ - ranges: to allow probing of subdevices.
+ - dma-coherent: Present if dma operations are coherent.
+
+ ** ade: Graphic overlay, Graphic post-processing, display timing control.
+This device is child node of display-subsystem
+- Required properties :
+ - compatible: "hisilicon,hi6220-ade".
+ - reg: physical base address of the ADE register and length of memory
+ region.
+ - reg-names: Should contain the reg names "ade_base" and "media_base".
+ - interrupt: The interrupt number to the cpu. Defines the interrupt
+by ADE.
+ - clocks: The clocks needed by the ADE module.
+ - clock-names: the name of the clocks.
+
+ ** dsi: support mipi dsi interface
+This device is child node of display-subsystem
+- Required properties :
+ - compatible: "hisilicon,hi6220-dsi".
+ - reg: physical base address of the DSI register and length of memory
+ region.
+ - clocks: The clocks needed by the DSI module.
+ - clock-names: the name of the clocks.
+ -encoder-slave: phandles to a 'encoder-slave' subnode which DSI
connect
+ADV7533 in order to support hdmi display.
+
+Example:
+
+ display-subsystem {
+ compatible = "hisilicon,display-subsystem";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-coherent;
+
+ ade: ade@f410 {
+ compatible = "hisilicon,hi6220-ade";
+ reg = <0x0 0xf410 0x0 0x7800>,
+ <0x0 0xf441 0x0 0x1000>;
+ reg-names = "ade_base",
+ "media_base";
+ interrupts = <0 115 4>;
+
+ clocks = <_ctrl HI6220_ADE_CORE>,
+<_ctrl HI6220_CODEC_JPEG>,
+<_ctrl HI6220_ADE_PIX_SRC>;
+ /*clock name*/
+ clock-names = "clk_ade_core",
+ "aclk_codec_jpeg_src",
+ "clk_ade_pix";
+ };
+
+ dsi {
+ compatible = "hisilicon,hi6220-dsi";
+ reg = <0x0 0xf4107800 0x0 0x100>;
+ clocks = <_ctrl HI6220_DSI_PCLK>;
+ clock-names = "pclk_dsi";
+ encoder-slave = <>;
+ };
+ };
+
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH RFC 4/8] drm: hisilicon: fill interface function of plane\crtc part
This patch uses ADE module which is responsibe for graphic overlay, graphic
post-processing, display timing control within hi6220 SoC to implement the
plane\ctrc interface of DRM\KMS.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
drivers/gpu/drm/hisilicon/hisi_ade.c | 1087 +++-
drivers/gpu/drm/hisilicon/hisi_ade_reg.h | 181 +
drivers/gpu/drm/hisilicon/hisi_drm_crtc.c | 47 ++
drivers/gpu/drm/hisilicon/hisi_drm_crtc.h | 12 +
drivers/gpu/drm/hisilicon/hisi_drm_fb.c| 21 +-
drivers/gpu/drm/hisilicon/hisi_drm_fb.h|2 +
drivers/gpu/drm/hisilicon/hisi_drm_plane.c | 17 +
drivers/gpu/drm/hisilicon/hisi_drm_plane.h |4 +
8 files changed, 1368 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade.c
b/drivers/gpu/drm/hisilicon/hisi_ade.c
index 148ed2f..2ea3f8f 100644
--- a/drivers/gpu/drm/hisilicon/hisi_ade.c
+++ b/drivers/gpu/drm/hisilicon/hisi_ade.c
@@ -13,16 +13,29 @@
#include
#include
+#include
+#include
#include
+#include "hisi_drm_drv.h"
#include "hisi_drm_plane.h"
#include "hisi_drm_crtc.h"
+#include "hisi_drm_fb.h"
#include "hisi_ade_reg.h"
#define PRIMARY_CH (ADE_CH1)
+#define ADE_CHANNEL_SCALE_UNSUPPORT 0
+#define ADE_CHANNEL_SCALE_SUPPORT1
+
+#define to_ade_crtc(hcrtc) container_of(hcrtc, struct ade_crtc, base)
+
struct ade_crtc {
struct hisi_crtc base;
+ struct drm_display_mode *dmode;
+
+ u32 ch_mask;
+ u64 use_mask;
};
struct ade_hardware_context {
@@ -45,6 +58,1070 @@ struct hisi_ade {
struct ade_hardware_context ctx;
};
+/* ade-format info: */
+struct ade_format {
+ u32 pixel_format;
+ enum ADE_FORMAT ade_format;
+};
+
+static const struct ade_format ade_formats[] = {
+ /* 16bpp RGB: */
+ { DRM_FORMAT_RGB565, ADE_RGB_565 },
+ { DRM_FORMAT_BGR565, ADE_BGR_565 },
+ /* 24bpp RGB: */
+ { DRM_FORMAT_RGB888, ADE_RGB_888 },
+ { DRM_FORMAT_BGR888, ADE_BGR_888 },
+ /* 32bpp [A]RGB: */
+ { DRM_FORMAT_XRGB, ADE_XRGB_ },
+ { DRM_FORMAT_XBGR, ADE_XBGR_ },
+ { DRM_FORMAT_RGBA, ADE_RGBA_ },
+ { DRM_FORMAT_BGRA, ADE_BGRA_ },
+ { DRM_FORMAT_ARGB, ADE_ARGB_ },
+ { DRM_FORMAT_ABGR, ADE_ABGR_ },
+ /* packed YCbCr */
+ { DRM_FORMAT_YUYV, ADE_YUYV },
+ { DRM_FORMAT_YVYU, ADE_YVYU },
+ { DRM_FORMAT_UYVY, ADE_UYVY },
+ { DRM_FORMAT_VYUY, ADE_VYUY },
+ /* 2 plane YCbCr */
+ { DRM_FORMAT_NV12, ADE_NV12 },
+ { DRM_FORMAT_NV21, ADE_NV21 },
+ /* 3 plane YCbCr */
+ { DRM_FORMAT_YUV444, ADE_YUV444 },
+};
+
+static const u32 channel_formats1[] = {
+ /* channel 1,2,3,4 */
+ DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGR888, DRM_FORMAT_XRGB, DRM_FORMAT_XBGR,
+ DRM_FORMAT_RGBA, DRM_FORMAT_BGRA, DRM_FORMAT_ARGB,
+ DRM_FORMAT_ABGR
+};
+
+static const u32 channel_formats2[] = {
+ /* channel 5,6 */
+ DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGR888, DRM_FORMAT_XRGB, DRM_FORMAT_XBGR,
+ DRM_FORMAT_RGBA, DRM_FORMAT_BGRA, DRM_FORMAT_ARGB,
+ DRM_FORMAT_ABGR, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY, DRM_FORMAT_NV12, DRM_FORMAT_NV21, DRM_FORMAT_YUV444
+};
+
+static const u32 channel_formats3[] = {
+ /* disp channel 7 */
+ DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGR888, DRM_FORMAT_XRGB, DRM_FORMAT_XBGR,
+ DRM_FORMAT_RGBA, DRM_FORMAT_BGRA, DRM_FORMAT_ARGB,
+ DRM_FORMAT_ABGR, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY, DRM_FORMAT_YUV444
+};
+
+/*
+ * set modules' reset mode: by software or hardware
+ * set modules' reload enable/disable
+ * */
+static void ade_set_reset_and_reload(struct ade_crtc *acrtc)
+{
+ struct ade_hardware_context *ctx = acrtc->base.ctx;
+ void __iomem *base = ctx->base;
+ u32 mask0 = (u32)acrtc->use_mask;
+ u32 mask1 = (u32)(acrtc->use_mask >> 32);
+
+ writel(mask0, base + ADE_SOFT_RST_SEL0);
+ writel(mask1, base + ADE_SOFT_RST_SEL1);
+ writel(~mask0, base + ADE_RELOAD_DIS0);
+ writel(~mask1, base + ADE_RELOAD_DIS1);
+}
+
+/*
+ * commit to ldi to display
+ */
+static void ade_display_commit(struct ade_crtc *acrtc)
+{
+ struct ade_hardware_context *ctx = acrtc->base.ctx;
+ void __iomem *base = ctx->base;
+ u32 out_w = acrtc->dmode->hdisplay;
+ u32 out_h = acrtc->dmode->vdisplay;
+ u32 val;
+
+ /* display source setting */
+ writel(TOP_DISP_SRC_OVLY2, base + ADE_DISP_SRC_CFG);
+
+ /*
Re: [PATCH RFC 6/8] drm: hisilicon: Add support for fbdev
hi rob On 2015/9/16 2:25, Rob Herring wrote: > On 09/15/2015 04:37 AM, Xinwei Kong wrote: >> If you config DRM_HISI_FBDEV optional, this patch will only support fbdev >> mode while also supporting double buffer. > > This is a lot of duplicated code from CMA fbdev. Is double buffering the > only reason why CMA fbdev can't be used or are there some other > constraints? Double buffering in fbdev has always been a hack, so I'm > guessing that is not a feature that should be added here. > I will drop it. xinwei > Rob > >> Signed-off-by: Xinliang Liu <xinliang@linaro.org> >> Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com> >> Signed-off-by: Andy Green <andy.gr...@linaro.org> >> Signed-off-by: Jiwen Qi <qiji...@hisilicon.com> >> Signed-off-by: Yu Gong <gon...@hisilicon.com> >> --- >> drivers/gpu/drm/hisilicon/Kconfig | 13 + >> drivers/gpu/drm/hisilicon/Makefile | 3 +- >> drivers/gpu/drm/hisilicon/hisi_drm_connector.c | 4 + >> drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 9 + >> drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 15 + >> drivers/gpu/drm/hisilicon/hisi_drm_fb.h| 5 + >> drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c | 395 >> + >> drivers/gpu/drm/hisilicon/hisi_drm_fbdev.h | 24 ++ >> 8 files changed, 467 insertions(+), 1 deletion(-) >> create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c >> create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fbdev.h > > > . > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH RFC 1/8] dt-bindings: Document the hi6220 bindings for DRM driver
This adds documentation of device tree bindings for the
Graphics Processing Unit of hi6220 SOC.
Signed-off-by: Xinliang Liu <xinliang@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Signed-off-by: Andy Green <andy.gr...@linaro.org>
Signed-off-by: Jiwen Qi <qiji...@hisilicon.com>
Signed-off-by: Yu Gong <gon...@hisilicon.com>
---
.../devicetree/bindings/gpu/hisilicon,hi6220.txt | 69 ++
1 file changed, 69 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt
diff --git a/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt
b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt
new file mode 100644
index 000..173ac63
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt
@@ -0,0 +1,69 @@
+ * Hisilicon hi6220 Graphics Processing Unit for HiKey board
+
+ ** display-subsystem: Master device for binding DRM sub-components
+This master device is parent node and it will be responsible to bind all
+sub-components devices node.
+- Required properties :
+ - compatible: "hisilicon,display-subsystem".
+ - #address-cells, #size-cells: Must be present if the device has
sub-nodes.
+ - ranges: to allow probing of subdevices.
+ - dma-coherent: Present if dma operations are coherent.
+
+ ** ade: Graphic overlay, Graphic post-processing, display timing control.
+This device is child node of display-subsystem
+- Required properties :
+ - compatible: "hisilicon,hi6220-ade".
+ - reg: physical base address of the ADE register and length of memory
+ region.
+ - reg-names: Should contain the reg names "ade_base" and "media_base".
+ - interrupt: The interrupt number to the cpu. Defines the interrupt
+by ADE.
+ - clocks: The clocks needed by the ADE module.
+ - clock-names: the name of the clocks.
+
+ ** dsi: support mipi dsi interface
+This device is child node of display-subsystem
+- Required properties :
+ - compatible: "hisilicon,hi6220-dsi".
+ - reg: physical base address of the DSI register and length of memory
+ region.
+ - clocks: The clocks needed by the DSI module.
+ - clock-names: the name of the clocks.
+ -encoder-slave: phandles to a 'encoder-slave' subnode which DSI
connect
+ADV7533 in order to support hdmi display.
+
+Example:
+
+ display-subsystem {
+ compatible = "hisilicon,display-subsystem";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-coherent;
+
+ ade: ade@f410 {
+ compatible = "hisilicon,hi6220-ade";
+ reg = <0x0 0xf410 0x0 0x7800>,
+ <0x0 0xf441 0x0 0x1000>;
+ reg-names = "ade_base",
+ "media_base";
+ interrupts = <0 115 4>;
+
+ clocks = <_ctrl HI6220_ADE_CORE>,
+<_ctrl HI6220_CODEC_JPEG>,
+<_ctrl HI6220_ADE_PIX_SRC>;
+ /*clock name*/
+ clock-names = "clk_ade_core",
+ "aclk_codec_jpeg_src",
+ "clk_ade_pix";
+ };
+
+ dsi {
+ compatible = "hisilicon,hi6220-dsi";
+ reg = <0x0 0xf4107800 0x0 0x100>;
+ clocks = <_ctrl HI6220_DSI_PCLK>;
+ clock-names = "pclk_dsi";
+ encoder-slave = <>;
+ };
+ };
+
--
1.9.1
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH RFC 4/8] drm: hisilicon: fill interface function of plane\crtc part
This patch uses ADE module which is responsibe for graphic overlay, graphic
post-processing, display timing control within hi6220 SoC to implement the
plane\ctrc interface of DRM\KMS.
Signed-off-by: Xinliang Liu <xinliang@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Signed-off-by: Andy Green <andy.gr...@linaro.org>
Signed-off-by: Jiwen Qi <qiji...@hisilicon.com>
Signed-off-by: Yu Gong <gon...@hisilicon.com>
---
drivers/gpu/drm/hisilicon/hisi_ade.c | 1087 +++-
drivers/gpu/drm/hisilicon/hisi_ade_reg.h | 181 +
drivers/gpu/drm/hisilicon/hisi_drm_crtc.c | 47 ++
drivers/gpu/drm/hisilicon/hisi_drm_crtc.h | 12 +
drivers/gpu/drm/hisilicon/hisi_drm_fb.c| 21 +-
drivers/gpu/drm/hisilicon/hisi_drm_fb.h|2 +
drivers/gpu/drm/hisilicon/hisi_drm_plane.c | 17 +
drivers/gpu/drm/hisilicon/hisi_drm_plane.h |4 +
8 files changed, 1368 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade.c
b/drivers/gpu/drm/hisilicon/hisi_ade.c
index 148ed2f..2ea3f8f 100644
--- a/drivers/gpu/drm/hisilicon/hisi_ade.c
+++ b/drivers/gpu/drm/hisilicon/hisi_ade.c
@@ -13,16 +13,29 @@
#include
#include
+#include
+#include
#include
+#include "hisi_drm_drv.h"
#include "hisi_drm_plane.h"
#include "hisi_drm_crtc.h"
+#include "hisi_drm_fb.h"
#include "hisi_ade_reg.h"
#define PRIMARY_CH (ADE_CH1)
+#define ADE_CHANNEL_SCALE_UNSUPPORT 0
+#define ADE_CHANNEL_SCALE_SUPPORT1
+
+#define to_ade_crtc(hcrtc) container_of(hcrtc, struct ade_crtc, base)
+
struct ade_crtc {
struct hisi_crtc base;
+ struct drm_display_mode *dmode;
+
+ u32 ch_mask;
+ u64 use_mask;
};
struct ade_hardware_context {
@@ -45,6 +58,1070 @@ struct hisi_ade {
struct ade_hardware_context ctx;
};
+/* ade-format info: */
+struct ade_format {
+ u32 pixel_format;
+ enum ADE_FORMAT ade_format;
+};
+
+static const struct ade_format ade_formats[] = {
+ /* 16bpp RGB: */
+ { DRM_FORMAT_RGB565, ADE_RGB_565 },
+ { DRM_FORMAT_BGR565, ADE_BGR_565 },
+ /* 24bpp RGB: */
+ { DRM_FORMAT_RGB888, ADE_RGB_888 },
+ { DRM_FORMAT_BGR888, ADE_BGR_888 },
+ /* 32bpp [A]RGB: */
+ { DRM_FORMAT_XRGB, ADE_XRGB_ },
+ { DRM_FORMAT_XBGR, ADE_XBGR_ },
+ { DRM_FORMAT_RGBA, ADE_RGBA_ },
+ { DRM_FORMAT_BGRA, ADE_BGRA_ },
+ { DRM_FORMAT_ARGB, ADE_ARGB_ },
+ { DRM_FORMAT_ABGR, ADE_ABGR_ },
+ /* packed YCbCr */
+ { DRM_FORMAT_YUYV, ADE_YUYV },
+ { DRM_FORMAT_YVYU, ADE_YVYU },
+ { DRM_FORMAT_UYVY, ADE_UYVY },
+ { DRM_FORMAT_VYUY, ADE_VYUY },
+ /* 2 plane YCbCr */
+ { DRM_FORMAT_NV12, ADE_NV12 },
+ { DRM_FORMAT_NV21, ADE_NV21 },
+ /* 3 plane YCbCr */
+ { DRM_FORMAT_YUV444, ADE_YUV444 },
+};
+
+static const u32 channel_formats1[] = {
+ /* channel 1,2,3,4 */
+ DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGR888, DRM_FORMAT_XRGB, DRM_FORMAT_XBGR,
+ DRM_FORMAT_RGBA, DRM_FORMAT_BGRA, DRM_FORMAT_ARGB,
+ DRM_FORMAT_ABGR
+};
+
+static const u32 channel_formats2[] = {
+ /* channel 5,6 */
+ DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGR888, DRM_FORMAT_XRGB, DRM_FORMAT_XBGR,
+ DRM_FORMAT_RGBA, DRM_FORMAT_BGRA, DRM_FORMAT_ARGB,
+ DRM_FORMAT_ABGR, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY, DRM_FORMAT_NV12, DRM_FORMAT_NV21, DRM_FORMAT_YUV444
+};
+
+static const u32 channel_formats3[] = {
+ /* disp channel 7 */
+ DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGR888, DRM_FORMAT_XRGB, DRM_FORMAT_XBGR,
+ DRM_FORMAT_RGBA, DRM_FORMAT_BGRA, DRM_FORMAT_ARGB,
+ DRM_FORMAT_ABGR, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY, DRM_FORMAT_YUV444
+};
+
+/*
+ * set modules' reset mode: by software or hardware
+ * set modules' reload enable/disable
+ * */
+static void ade_set_reset_and_reload(struct ade_crtc *acrtc)
+{
+ struct ade_hardware_context *ctx = acrtc->base.ctx;
+ void __iomem *base = ctx->base;
+ u32 mask0 = (u32)acrtc->use_mask;
+ u32 mask1 = (u32)(acrtc->use_mask >> 32);
+
+ writel(mask0, base + ADE_SOFT_RST_SEL0);
+ writel(mask1, base + ADE_SOFT_RST_SEL1);
+ writel(~mask0, base + ADE_RELOAD_DIS0);
+ writel(~mask1, base + ADE_RELOAD_DIS1);
+}
+
+/*
+ * commit to ldi to display
+ */
+static void ade_display_commit(struct ade_crtc *acrtc)
+{
+ struct ade_hardware_context *ctx = acrtc->base.ctx;
+ void __iomem *base = ctx->base;
+ u32 out_w = acrtc->dmode->hdisplay;
+ u32 out_h = acr
[PATCH RFC 8/8] dts: hisilicon: Add drm driver device dts config for HiKey board
This patch adds drm dts node for HiKey board using hi6220 SOC.
Signed-off-by: Xinliang Liu <xinliang@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Signed-off-by: Andy Green <andy.gr...@linaro.org>
Signed-off-by: Jiwen Qi <qiji...@hisilicon.com>
Signed-off-by: Yu Gong <gon...@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 34 +++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 3f03380..9ce8c62 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -4,6 +4,7 @@
* Copyright (C) 2015, Hisilicon Ltd.
*/
+#include
#include
/ {
@@ -167,5 +168,38 @@
clocks = <_ctrl 36>, <_ctrl 36>;
clock-names = "uartclk", "apb_pclk";
};
+
+ display-subsystem {
+ compatible = "hisilicon,display-subsystem";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-coherent;
+
+ ade: ade@f410 {
+ compatible = "hisilicon,hi6220-ade";
+ reg = <0x0 0xf410 0x0 0x7800>,
+ <0x0 0xf441 0x0 0x1000>;
+ reg-names = "ade_base",
+ "media_base";
+ interrupts = <0 115 4>; /* ldi interrupt */
+
+ clocks = <_ctrl HI6220_ADE_CORE>,
+<_ctrl HI6220_CODEC_JPEG>,
+<_ctrl HI6220_ADE_PIX_SRC>;
+ /*clock name*/
+ clock-names = "clk_ade_core",
+ "aclk_codec_jpeg_src",
+ "clk_ade_pix";
+ };
+
+ dsi {
+ compatible = "hisilicon,hi6220-dsi";
+ reg = <0x0 0xf4107800 0x0 0x100>;
+ clocks = <_ctrl HI6220_DSI_PCLK>;
+ clock-names = "pclk_dsi";
+ encoder-slave = <>;
+ };
+ };
};
};
--
1.9.1
--
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[PATCH RFC 2/8] drm: hisilicon: Add new DRM driver for hisilicon Soc
This patch creates this driver itself and register all the sub-components
which is from DTS inode, this driver uses components framework mechanism
to bind all the sub-components.
This patch also introduces a memory manager for hisilison drm. As cma
framebuffer helpers can no more be used.
Signed-off-by: Xinliang Liu <xinliang@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Signed-off-by: Andy Green <andy.gr...@linaro.org>
Signed-off-by: Jiwen Qi <qiji...@hisilicon.com>
Signed-off-by: Yu Gong <gon...@hisilicon.com>
---
arch/arm64/configs/defconfig | 5 +
drivers/gpu/drm/Kconfig | 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/hisilicon/Kconfig| 9 ++
drivers/gpu/drm/hisilicon/Makefile | 7 ++
drivers/gpu/drm/hisilicon/hisi_ade.c | 166 +
drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 206 +++
drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 131
drivers/gpu/drm/hisilicon/hisi_drm_fb.c | 156 +++
drivers/gpu/drm/hisilicon/hisi_drm_fb.h | 26
10 files changed, 709 insertions(+)
create mode 100644 drivers/gpu/drm/hisilicon/Kconfig
create mode 100644 drivers/gpu/drm/hisilicon/Makefile
create mode 100644 drivers/gpu/drm/hisilicon/hisi_ade.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fb.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fb.h
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 4e17e7e..c2ea280 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -146,6 +146,8 @@ CONFIG_LEDS_CLASS=y
CONFIG_LEDS_SYSCON=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+
+
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_EFI=y
@@ -199,3 +201,6 @@ CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
+CONFIG_DRM=y
+CONFIG_DRM_HISI=y
+# CONFIG_DRM_HISI_FBDEV is not set
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index c46ca31..31ee120 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -240,3 +240,5 @@ source "drivers/gpu/drm/sti/Kconfig"
source "drivers/gpu/drm/amd/amdkfd/Kconfig"
source "drivers/gpu/drm/imx/Kconfig"
+
+source "drivers/gpu/drm/hisilicon/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 5713d05..47936d4 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -67,6 +67,7 @@ obj-$(CONFIG_DRM_MSM) += msm/
obj-$(CONFIG_DRM_TEGRA) += tegra/
obj-$(CONFIG_DRM_STI) += sti/
obj-$(CONFIG_DRM_IMX) += imx/
+obj-$(CONFIG_DRM_HISI) += hisilicon/
obj-y += i2c/
obj-y += panel/
obj-y += bridge/
diff --git a/drivers/gpu/drm/hisilicon/Kconfig
b/drivers/gpu/drm/hisilicon/Kconfig
new file mode 100644
index 000..60b42e4
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/Kconfig
@@ -0,0 +1,9 @@
+config DRM_HISI
+ tristate "DRM Support for Hisilicon Terminal SoCs Platform"
+ depends on DRM
+ select DRM_KMS_HELPER
+ select DRM_GEM_CMA_HELPER
+ help
+ Choose this option if you have a hisilicon terminal chipset.
+ If M is selected the module will be called hisi-drm.
+
diff --git a/drivers/gpu/drm/hisilicon/Makefile
b/drivers/gpu/drm/hisilicon/Makefile
new file mode 100644
index 000..3f042fd
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/Makefile
@@ -0,0 +1,7 @@
+hisi-drm-y := hisi_drm_drv.o \
+ hisi_ade.o \
+ hisi_drm_dsi.o \
+ hisi_drm_fb.o \
+
+obj-$(CONFIG_DRM_HISI) += hisi-drm.o
+
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade.c
b/drivers/gpu/drm/hisilicon/hisi_ade.c
new file mode 100644
index 000..9b58d20
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/hisi_ade.c
@@ -0,0 +1,166 @@
+/*
+ * Hisilicon Terminal SoCs drm driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Author: Xinwei Kong <kong.kongxin...@hisilicon.com> for hisilicon
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+#include
+
+#include
+
+struct ade_hardware_context {
+ void __iomem *base;
+ void __iomem *media_base;
+
+ int irq;
+ u32 ade_core_rate;
+ u32 media_noc_rate;
+
+ struct clk *ade_core_clk;
+ struct clk *media_noc_clk;
+ struct clk *ade_pix_clk;
+ bool power_on;
+};
+
+struct hisi_ade {
+ struct ade_hardware_context ctx;
+};
+
+static int ade_dts_parse(struct platform_device *pdev,
+
[PATCH RFC 5/8] drm: hisilicon: fill interface function of encoder\connector part
This patch enables the adv7533 module which is connecting hisilicon SOC
by dsi module. while using DSI module and adv7533 module to implement the
encoder/connector interface of DRM\KMS.
Signed-off-by: Xinliang Liu <xinliang@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Signed-off-by: Andy Green <andy.gr...@linaro.org>
Signed-off-by: Jiwen Qi <qiji...@hisilicon.com>
Signed-off-by: Yu Gong <gon...@hisilicon.com>
---
drivers/gpu/drm/hisilicon/Kconfig | 10 +
drivers/gpu/drm/hisilicon/hisi_drm_connector.c | 34 ++
drivers/gpu/drm/hisilicon/hisi_drm_connector.h | 8 +
drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 670 +
drivers/gpu/drm/hisilicon/hisi_drm_encoder.c | 52 ++
drivers/gpu/drm/hisilicon/hisi_drm_encoder.h | 19 +
drivers/gpu/drm/hisilicon/hisi_dsi_reg.h | 91
7 files changed, 884 insertions(+)
create mode 100644 drivers/gpu/drm/hisilicon/hisi_dsi_reg.h
diff --git a/drivers/gpu/drm/hisilicon/Kconfig
b/drivers/gpu/drm/hisilicon/Kconfig
index 60b42e4..105dbcb 100644
--- a/drivers/gpu/drm/hisilicon/Kconfig
+++ b/drivers/gpu/drm/hisilicon/Kconfig
@@ -7,3 +7,13 @@ config DRM_HISI
Choose this option if you have a hisilicon terminal chipset.
If M is selected the module will be called hisi-drm.
+if DRM_HISI
+
+config DRM_HISI_HAS_SLAVE_ENCODER
+ bool "Support slave encoder output"
+ default y
+ help
+ Support slave encoder output device such as DSI interface connecting
+ HDMI converter by i2c.
+
+endif
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
b/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
index 62efdc7..57ab2e8 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
@@ -23,8 +23,21 @@
int hisi_drm_connector_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
{
+ struct hisi_connector *hconnector = to_hisi_connector(connector);
+ struct drm_encoder *encoder = hconnector->encoder;
+ struct hisi_connector_funcs *ops = hconnector->ops;
+ struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
int ret = MODE_OK;
+ if (ops->modes_valid)
+ ops->modes_valid(connector);
+
+ if (sfuncs && sfuncs->mode_valid) {
+ ret = sfuncs->mode_valid(encoder, mode);
+ if (ret != MODE_OK)
+ return ret;
+ }
+
return ret;
}
@@ -39,8 +52,19 @@ hisi_drm_best_encoder(struct drm_connector *connector)
int hisi_drm_get_modes(struct drm_connector *connector)
{
+ struct hisi_connector *hconnector = to_hisi_connector(connector);
+ struct hisi_connector_funcs *ops = hconnector->ops;
+ struct drm_encoder *encoder = hconnector->encoder;
+ struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
int count = 0;
+ if (ops->get_modes) {
+ count += ops->get_modes(connector);
+ } else {
+ if (sfuncs && sfuncs->get_modes)
+ count += sfuncs->get_modes(encoder, connector);
+ }
+
return count;
}
@@ -59,8 +83,18 @@ void hisi_drm_connector_destroy(struct drm_connector
*connector)
enum drm_connector_status
hisi_drm_detect(struct drm_connector *connector, bool force)
{
+ struct hisi_connector *hconnector = to_hisi_connector(connector);
+ struct drm_encoder *encoder = hconnector->encoder;
+ struct hisi_connector_funcs *ops = hconnector->ops;
+ struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
enum drm_connector_status status = connector_status_unknown;
+ if (ops->detect)
+ ops->detect(connector);
+
+ if (sfuncs && sfuncs->detect)
+ status = sfuncs->detect(encoder, connector);
+
return status;
}
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_connector.h
b/drivers/gpu/drm/hisilicon/hisi_drm_connector.h
index 114391c..a8b8409 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_connector.h
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_connector.h
@@ -13,9 +13,17 @@
#ifndef __HISI_DRM_CONNECTOR_H__
#define __HISI_DRM_CONNECTOR_H__
+struct hisi_connector_funcs {
+ enum drm_connector_status
+ (*detect) (struct drm_connector *connector);
+ int (*get_modes)(struct drm_connector *connector);
+ int (*modes_valid)(struct drm_connector *connector);
+};
+
struct hisi_connector {
struct drm_connector connector;
struct drm_encoder *encoder;
+ void *ops;
};
void hisi_drm_connector_init(struct drm_device *dev,
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
index 046fd8e..8509ced 100644
--- a/drivers/gpu/
[PATCH RFC 7/8] drm: hisilicon: Add support for vblank
This patch adds ldi interrupt to handle vblank.
Signed-off-by: Xinliang Liu <xinliang@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Signed-off-by: Andy Green <andy.gr...@linaro.org>
Signed-off-by: Jiwen Qi <qiji...@hisilicon.com>
Signed-off-by: Yu Gong <gon...@hisilicon.com>
---
drivers/gpu/drm/hisilicon/hisi_ade.c | 71 +++-
drivers/gpu/drm/hisilicon/hisi_drm_crtc.c | 89 +++
drivers/gpu/drm/hisilicon/hisi_drm_crtc.h | 7 +++
drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 5 ++
4 files changed, 170 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade.c
b/drivers/gpu/drm/hisilicon/hisi_ade.c
index 2ea3f8f..44480c2 100644
--- a/drivers/gpu/drm/hisilicon/hisi_ade.c
+++ b/drivers/gpu/drm/hisilicon/hisi_ade.c
@@ -156,11 +156,12 @@ static void ade_display_commit(struct ade_crtc *acrtc)
/* set reset mode:soft or hw, and reload modules */
ade_set_reset_and_reload(acrtc);
- /* enable ade */
+ /* ade enabled */
wmb();
writel(ADE_ENABLE, base + ADE_EN);
- wmb(); /* memory barrier */
+ /* ldi enabled after ade */
+ wmb();
val = ADE_ENABLE;
val |= readl(base + LDI_CTRL);
writel(val, base + LDI_CTRL);
@@ -596,6 +597,63 @@ int ade_install_plane_properties(struct drm_device *dev,
return 0;
}
+int ade_enable_vblank(struct hisi_crtc *hcrtc)
+{
+ struct ade_hardware_context *ctx = hcrtc->ctx;
+ void __iomem *base = ctx->base;
+ u32 intr_en;
+ int ret;
+
+ if (!ctx->power_on) {
+ ret = ade_power_up(ctx);
+ if (ret) {
+ DRM_ERROR("%s: failed to power up ade\n", __func__);
+ return ret;
+ }
+ }
+
+ intr_en = readl(base + LDI_INT_EN);
+ intr_en |= LDI_ISR_FRAME_END_INT;
+ writel(intr_en, base + LDI_INT_EN);
+
+ return 0;
+}
+
+void ade_disable_vblank(struct hisi_crtc *hcrtc)
+{
+ struct ade_hardware_context *ctx = hcrtc->ctx;
+ void __iomem *base = ctx->base;
+ u32 intr_en;
+
+ if (!ctx->power_on) {
+ DRM_ERROR("power is down! vblank disable fail\n");
+ return;
+ }
+
+ intr_en = readl(base + LDI_INT_EN);
+ intr_en &= ~LDI_ISR_FRAME_END_INT;
+ writel(intr_en, base + LDI_INT_EN);
+}
+
+irqreturn_t ade_irq_handler(int irq, struct hisi_crtc *hcrtc)
+{
+ struct ade_hardware_context *ctx = hcrtc->ctx;
+ struct drm_crtc *crtc = >base;
+ struct drm_device *dev = crtc->dev;
+ void __iomem *base = ctx->base;
+ u32 status;
+
+ status = readl(base + LDI_MSK_INT);
+
+ /* vblank irq */
+ if (status & LDI_ISR_FRAME_END_INT) {
+ writel(LDI_ISR_FRAME_END_INT, base + LDI_INT_CLR);
+ drm_handle_vblank(dev, drm_crtc_index(crtc));
+ }
+
+ return IRQ_HANDLED;
+}
+
/* convert from fourcc format to ade format */
static u32 ade_get_format(u32 pixel_format)
{
@@ -1112,6 +1170,9 @@ static struct hisi_crtc_ops ade_crtc_ops = {
.mode_set_nofb = ade_crtc_mode_set_nofb,
.atomic_begin = ade_crtc_atomic_begin,
.atomic_flush = ade_crtc_atomic_flush,
+ .irq_handler = ade_irq_handler,
+ .enable_vblank = ade_enable_vblank,
+ .disable_vblank = ade_disable_vblank,
.install_properties = ade_install_crtc_properties,
};
@@ -1226,6 +1287,12 @@ static int ade_bind(struct device *dev, struct device
*master, void *data)
return ret;
}
+ /* ldi irq install */
+ ret = hisi_drm_crtc_irq_install(drm_dev, ctx->irq, DRIVER_IRQ_SHARED,
+ hcrtc);
+ if (ret)
+ return ret;
+
return 0;
}
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
b/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
index feeadc4..db64c2a 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
@@ -17,6 +17,95 @@
#include "hisi_drm_drv.h"
#include "hisi_drm_crtc.h"
+/*
+ * drm_get_crtc_from_index - find a registered CRTC from the index
+ * @dev: DRM device
+ * @index: index of a registered CRTC
+ *
+ * Given a index, return the registered CRTC within a DRM
+ * device's list of CRTCs.
+ */
+struct drm_crtc *hisi_drm_get_crtc_from_index(struct drm_device *dev,
+ unsigned int index)
+{
+ unsigned int index_tmp = 0;
+ struct drm_crtc *crtc;
+
+ list_for_each_entry(crtc, >mode_config.crtc_list, head) {
+ if (index_tmp == index)
+ return crtc;
+
+ index_tmp++;
+ }
+
+ BUG();
+}
+
+int hisi_drm_crtc_enable_vblank(struct drm_device *dev, int c)
+{
+
[PATCH RFC 3/8] drm: hisilicon: Add the link to DRM/KMS interface
This patch makes the link with DRM/KMS interface by initializing the drm
plane/crtc/encoder/connector and adding the drm plane/crtc/encoder/
connector helper.
This patch is compatible with different hisilicon platform such as Hikey
series of boards and other series of boards.
Signed-off-by: Xinliang Liu <xinliang@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Signed-off-by: Andy Green <andy.gr...@linaro.org>
Signed-off-by: Jiwen Qi <qiji...@hisilicon.com>
Signed-off-by: Yu Gong <gon...@hisilicon.com>
---
drivers/gpu/drm/hisilicon/Makefile | 4 +
drivers/gpu/drm/hisilicon/hisi_ade.c | 44 +
drivers/gpu/drm/hisilicon/hisi_ade_reg.h | 27 +++
drivers/gpu/drm/hisilicon/hisi_drm_connector.c | 90 ++
drivers/gpu/drm/hisilicon/hisi_drm_connector.h | 25 +++
drivers/gpu/drm/hisilicon/hisi_drm_crtc.c | 179 ++
drivers/gpu/drm/hisilicon/hisi_drm_crtc.h | 45 +
drivers/gpu/drm/hisilicon/hisi_drm_drv.h | 36
drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 13 ++
drivers/gpu/drm/hisilicon/hisi_drm_encoder.c | 65 +++
drivers/gpu/drm/hisilicon/hisi_drm_encoder.h | 22 +++
drivers/gpu/drm/hisilicon/hisi_drm_plane.c | 240 +
drivers/gpu/drm/hisilicon/hisi_drm_plane.h | 51 ++
13 files changed, 841 insertions(+)
create mode 100644 drivers/gpu/drm/hisilicon/hisi_ade_reg.h
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_connector.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_connector.h
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_crtc.h
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.h
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_encoder.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_encoder.h
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_plane.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_plane.h
diff --git a/drivers/gpu/drm/hisilicon/Makefile
b/drivers/gpu/drm/hisilicon/Makefile
index 3f042fd..aa522f8 100644
--- a/drivers/gpu/drm/hisilicon/Makefile
+++ b/drivers/gpu/drm/hisilicon/Makefile
@@ -1,6 +1,10 @@
hisi-drm-y := hisi_drm_drv.o \
hisi_ade.o \
hisi_drm_dsi.o \
+ hisi_drm_plane.o \
+ hisi_drm_crtc.o \
+ hisi_drm_encoder.o \
+ hisi_drm_connector.o \
hisi_drm_fb.o \
obj-$(CONFIG_DRM_HISI) += hisi-drm.o
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade.c
b/drivers/gpu/drm/hisilicon/hisi_ade.c
index 9b58d20..148ed2f 100644
--- a/drivers/gpu/drm/hisilicon/hisi_ade.c
+++ b/drivers/gpu/drm/hisilicon/hisi_ade.c
@@ -15,6 +15,16 @@
#include
+#include "hisi_drm_plane.h"
+#include "hisi_drm_crtc.h"
+#include "hisi_ade_reg.h"
+
+#define PRIMARY_CH (ADE_CH1)
+
+struct ade_crtc {
+ struct hisi_crtc base;
+};
+
struct ade_hardware_context {
void __iomem *base;
void __iomem *media_base;
@@ -30,6 +40,8 @@ struct ade_hardware_context {
};
struct hisi_ade {
+ struct ade_crtc acrtc;
+ struct hisi_plane hplane[ADE_CH_NUM];
struct ade_hardware_context ctx;
};
@@ -99,6 +111,38 @@ static int ade_dts_parse(struct platform_device *pdev,
static int ade_bind(struct device *dev, struct device *master, void *data)
{
+ struct hisi_ade *ade = dev_get_drvdata(dev);
+ struct ade_hardware_context *ctx = >ctx;
+ struct hisi_crtc *hcrtc = >acrtc.base;
+ struct drm_device *drm_dev = (struct drm_device *)data;
+ struct hisi_plane *hplane;
+ enum drm_plane_type type;
+ int ret;
+ int i;
+
+ /*
+* plane init
+* TODO: Now only support primary plane, overlay planes
+* need to do.
+*/
+ for (i = 0; i < 1; i++) {
+ hplane = >hplane[i];
+ hplane->ch = i;
+ hplane->ctx = ctx;
+ type = i == PRIMARY_CH ? DRM_PLANE_TYPE_PRIMARY :
+ DRM_PLANE_TYPE_OVERLAY;
+
+ ret = hisi_drm_plane_init(drm_dev, hplane, type);
+ if (ret)
+ return ret;
+ }
+
+ /* crtc init */
+ hcrtc->ctx = ctx;
+ ret = hisi_drm_crtc_init(drm_dev, hcrtc, >hplane[PRIMARY_CH].base);
+ if (ret)
+ return ret;
+
return 0;
}
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
new file mode 100644
index 000..bdf3c3b
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
@@ -0,0 +1,27 @@
+/*
+ * Hisilicon Terminal SoCs drm driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Author: Xinwei Kong <kong.kongxin...@hisilicon.com> for hisilicon
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * i
[PATCH RFC 0/8] Add New DRM Driver for Hisilicon's Hi6220 SoC
These patch set adds a new drm driver for Hisilicon's Hi6220 SoC. Current testing and support board is Hikey board which is one of Linaro 96boards. It is an arm64 open source board. For more information about this board, please access https://www.96boards.org. 1. Hardware Detail The display subsystem of Hi6220 SoC is shown as bellow: +-+ +--+ +-+ +-+ | | | | | | | | | FB |-->| ADE|>| DSI |>| External| | | | | | | | HDMI | +-+ +--+ +-+ +-+ - ADE(Advanced Display Engine) is the display controller. It contains 7 channels or pipes, 3 overlay and a LDI. - A channel/pipe looks like: DMA-->clip-->scale-->ctrans/csc. - Overlay is response to compose planes which come from 7 channels and pass composed image to LDI. - LDI is response to generate timings and RGB data stream. - DSI converts the RGB data stream from ADE to DSI packets. - External HDMI module is connected with DSI bus. Now Hikey use a ADI's ADV7533 external HDMI chip. 2. Software Detail About the software organization and implementation detail: We have a main drm platform driver (hisi_drm_drv.c), ade platform driver (hisi_ade.c) and a dsi platform driver (hisi_drm_dsi.c). Ade driver implements the plane and crtc driver interfaces and dsi implements the encoder and connector driver interfaces. We take advantage of component framework to initialize each driver. In order to support multi coming Hisilicon's SoCs, we plan to separate common driver code and SoC specific implemented code as possiple as we can. We abstract an ops for each component(crtc, plane, encoder and connector) to reuse the common interface implementation logic (FIXME: Not sure if we can achieve this target and if it is good or not). Thus, we put these common driver code into hisi_drm_drv/crtc/plane/encoder/connector.c files. Xinwei Kong (8): dt-bindings: Document the hi6220 bindings for DRM driver drm: hisilicon: Add new DRM driver for hisilicon Soc drm: hisilicon: Add the link to DRM/KMS interface drm: hisilicon: fill interface function of plane\crtc part drm: hisilicon: fill interface function of encoder\connector part drm: hisilicon: Add support for fbdev drm: hisilicon: Add support for vblank dts: hisilicon: Add drm driver device dts config for HiKey board .../devicetree/bindings/gpu/hisilicon,hi6220.txt | 69 + arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 34 + arch/arm64/configs/defconfig |5 + drivers/gpu/drm/Kconfig|2 + drivers/gpu/drm/Makefile |1 + drivers/gpu/drm/hisilicon/Kconfig | 32 + drivers/gpu/drm/hisilicon/Makefile | 12 + drivers/gpu/drm/hisilicon/hisi_ade.c | 1360 drivers/gpu/drm/hisilicon/hisi_ade_reg.h | 208 +++ drivers/gpu/drm/hisilicon/hisi_drm_connector.c | 128 ++ drivers/gpu/drm/hisilicon/hisi_drm_connector.h | 33 + drivers/gpu/drm/hisilicon/hisi_drm_crtc.c | 315 + drivers/gpu/drm/hisilicon/hisi_drm_crtc.h | 64 + drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 220 drivers/gpu/drm/hisilicon/hisi_drm_drv.h | 36 + drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 829 drivers/gpu/drm/hisilicon/hisi_drm_encoder.c | 117 ++ drivers/gpu/drm/hisilicon/hisi_drm_encoder.h | 41 + drivers/gpu/drm/hisilicon/hisi_drm_fb.c| 175 +++ drivers/gpu/drm/hisilicon/hisi_drm_fb.h| 33 + drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c | 395 ++ drivers/gpu/drm/hisilicon/hisi_drm_fbdev.h | 24 + drivers/gpu/drm/hisilicon/hisi_drm_plane.c | 257 drivers/gpu/drm/hisilicon/hisi_drm_plane.h | 55 + drivers/gpu/drm/hisilicon/hisi_dsi_reg.h | 91 ++ 25 files changed, 4536 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/hisilicon,hi6220.txt create mode 100644 drivers/gpu/drm/hisilicon/Kconfig create mode 100644 drivers/gpu/drm/hisilicon/Makefile create mode 100644 drivers/gpu/drm/hisilicon/hisi_ade.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_ade_reg.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_connector.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_connector.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_crtc.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_crtc.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_dsi.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_encoder.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_encoder.h create mode 100644 drivers/gpu/drm/hisil
[PATCH RFC 6/8] drm: hisilicon: Add support for fbdev
If you config DRM_HISI_FBDEV optional, this patch will only support fbdev
mode while also supporting double buffer.
Signed-off-by: Xinliang Liu <xinliang@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxin...@hisilicon.com>
Signed-off-by: Andy Green <andy.gr...@linaro.org>
Signed-off-by: Jiwen Qi <qiji...@hisilicon.com>
Signed-off-by: Yu Gong <gon...@hisilicon.com>
---
drivers/gpu/drm/hisilicon/Kconfig | 13 +
drivers/gpu/drm/hisilicon/Makefile | 3 +-
drivers/gpu/drm/hisilicon/hisi_drm_connector.c | 4 +
drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 9 +
drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 15 +
drivers/gpu/drm/hisilicon/hisi_drm_fb.h| 5 +
drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c | 395 +
drivers/gpu/drm/hisilicon/hisi_drm_fbdev.h | 24 ++
8 files changed, 467 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_fbdev.h
diff --git a/drivers/gpu/drm/hisilicon/Kconfig
b/drivers/gpu/drm/hisilicon/Kconfig
index 105dbcb..ddf43d5 100644
--- a/drivers/gpu/drm/hisilicon/Kconfig
+++ b/drivers/gpu/drm/hisilicon/Kconfig
@@ -16,4 +16,17 @@ config DRM_HISI_HAS_SLAVE_ENCODER
Support slave encoder output device such as DSI interface connecting
HDMI converter by i2c.
+config DRM_HISI_FBDEV
+ bool "Enable legacy fbdev support"
+ select DRM_KMS_FB_HELPER
+ select FB_SYS_FILLRECT
+ select FB_SYS_COPYAREA
+ select FB_SYS_IMAGEBLIT
+ select FB_SYS_FOPS
+ default y
+ help
+ Choose this option if you have a need for the legacy fbdev support.
+ Note that this support also provides the Linux console on top of
+ the hisi modesetting driver.
+
endif
diff --git a/drivers/gpu/drm/hisilicon/Makefile
b/drivers/gpu/drm/hisilicon/Makefile
index aa522f8..1877d36 100644
--- a/drivers/gpu/drm/hisilicon/Makefile
+++ b/drivers/gpu/drm/hisilicon/Makefile
@@ -5,7 +5,8 @@ hisi-drm-y := hisi_drm_drv.o \
hisi_drm_crtc.o \
hisi_drm_encoder.o \
hisi_drm_connector.o \
- hisi_drm_fb.o \
+ hisi_drm_fb.o
obj-$(CONFIG_DRM_HISI) += hisi-drm.o
+obj-$(CONFIG_DRM_HISI_FBDEV) += hisi_drm_fbdev.o
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
b/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
index 57ab2e8..2359ed8 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
@@ -120,5 +120,9 @@ void hisi_drm_connector_init(struct drm_device *dev,
drm_connector_register(connector);
drm_mode_connector_attach_encoder(connector, encoder);
+#ifndef CONFIG_DRM_HISI_FBDEV
+ drm_reinit_primary_mode_group(dev);
+#endif
+
drm_mode_config_reset(dev);
}
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
index 0983ad7..53f2521 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
@@ -17,6 +17,7 @@
#include
#include
+#include "hisi_drm_drv.h"
#include "hisi_drm_fb.h"
#define DRIVER_NAME"hisi-drm"
@@ -49,11 +50,19 @@ static void hisi_drm_mode_config_init(struct drm_device
*dev)
static int hisi_drm_load(struct drm_device *dev, unsigned long flags)
{
+ struct hisi_drm_private *priv;
int ret;
/* debug setting
drm_debug = DRM_UT_DRIVER|DRM_UT_KMS; */
+ priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ dev->dev_private = priv;
+ dev_set_drvdata(dev->dev, dev);
+
/* dev->mode_config initialization */
drm_mode_config_init(dev);
hisi_drm_mode_config_init(dev);
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
index 8509ced..8329734 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
@@ -16,10 +16,14 @@
#include
#include
+#include
#include "hisi_drm_encoder.h"
#include "hisi_drm_connector.h"
#include "hisi_dsi_reg.h"
+#ifdef CONFIG_DRM_HISI_FBDEV
+#include "hisi_drm_fbdev.h"
+#endif
#define encoder_to_dsi(encoder) \
container_of(encoder, struct hisi_dsi, hisi_encoder.base.base)
@@ -699,6 +703,15 @@ static int hisi_dsi_bind(struct device *dev, struct device
*master,
hisi_drm_connector_init(ctx->dev, >dsi.hisi_encoder.base.base,
>dsi.hisi_connector.connector);
+#ifdef CONFIG_DRM_HISI_FBDEV
+ /* fbdev initialization should be put at last position */
+ ret = hisi_drm_fbdev_init(ctx->dev);
+ if (ret) {
+ DRM_ERROR("failed to initialize fbdev\n");
+
[PATCH v4 2/2] thermal: hisilicon: add new hisilicon thermal sensor driver
From: kongxinwei
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.
Signed-off-by: Leo Yan
Signed-off-by: kongxinwei
---
drivers/thermal/Kconfig| 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/hisi_thermal.c | 437 +
3 files changed, 446 insertions(+)
create mode 100644 drivers/thermal/hisi_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index af40db0..81aee01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -136,6 +136,14 @@ config THERMAL_EMULATION
because userland can easily disable the thermal policy by simply
flooding this sysfs node with low temperature values.
+config HISI_THERMAL
+ tristate "Hisilicon thermal driver"
+ depends on ARCH_HISI && CPU_THERMAL && OF
+ help
+ Enable this to plug hisilicon's thermal sensor driver into the Linux
+ thermal framework. cpufreq is used as the cooling device to throttle
+ CPUs when the passive trip is crossed.
+
config IMX_THERMAL
tristate "Temperature sensor driver for Freescale i.MX SoCs"
depends on CPU_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index fa0dc48..08ae7ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL) += st/
obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
+obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c
new file mode 100644
index 000..255c71b
--- /dev/null
+++ b/drivers/thermal/hisi_thermal.c
@@ -0,0 +1,437 @@
+/*
+ * Hisilicon thermal sensor driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Copyright (c) 2014-2015 Linaro Limited.
+ *
+ * Xinwei Kong
+ * Leo Yan
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "thermal_core.h"
+
+#define TEMP0_TH (0x4)
+#define TEMP0_RST_TH (0x8)
+#define TEMP0_CFG (0xC)
+#define TEMP0_EN (0x10)
+#define TEMP0_INT_EN (0x14)
+#define TEMP0_INT_CLR (0x18)
+#define TEMP0_RST_MSK (0x1C)
+#define TEMP0_VALUE(0x28)
+
+#define HISI_TEMP_BASE (-60)
+#define HISI_TEMP_RESET(10)
+
+#define HISI_MAX_SENSORS 4
+
+struct hisi_thermal_sensor {
+ struct hisi_thermal_data *thermal;
+ struct thermal_zone_device *tzd;
+ const struct thermal_trip *trip;
+
+ uint32_t id;
+ uint32_t thres_temp;
+ uint32_t reset_temp;
+};
+
+struct hisi_thermal_data {
+ struct mutex thermal_lock;
+ struct platform_device *pdev;
+ struct clk *clk;
+
+ int irq, irq_bind_sensor;
+ bool irq_enabled;
+
+ unsigned int sensors_num;
+ long sensor_temp[HISI_MAX_SENSORS];
+ struct hisi_thermal_sensor sensors[HISI_MAX_SENSORS];
+
+ void __iomem *regs;
+};
+
+/* in millicelsius */
+static inline int _step_to_temp(int step)
+{
+ /*
+* Every step equals (1 * 200) / 255 celsius, and finally
+* need convert to millicelsius.
+*/
+ return (HISI_TEMP_BASE + (step * 200 / 255)) * 1000;
+}
+
+static inline int _temp_to_step(int temp)
+{
+ return ((temp / 1000 - HISI_TEMP_BASE) * 255 / 200);
+}
+
+static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,
+struct hisi_thermal_sensor *sensor)
+{
+ int val;
+
+ mutex_lock(>thermal_lock);
+
+ /* disable interrupt */
+ writel(0x0, data->regs + TEMP0_INT_EN);
+ writel(0x1, data->regs + TEMP0_INT_CLR);
+
+ /* disable module firstly */
+ writel(0x0, data->regs + TEMP0_EN);
+
+ /* select sensor id */
+ writel((sensor->id << 12), data->regs + TEMP0_CFG);
+
+ /* enable module */
+ writel(0x1, data->regs + TEMP0_EN);
+
+ usleep_range(3000, 5000);
+
+ val = readl(data->regs +
[PATCH v4 0/2] 96boards: add thermal senor support to hikey board
From: kongxinwei The Linaro connect introduce 96boards series in Hong Kong,The HiKey board is the first board to be certified 96Boards Consumer Edition compatible. This board is based on the HiSilicon SoC. you can get more information from https://www.96boards.org. The hisilicon SoC contains thermal module, this thermal module has 4 sensors, - sensor 0: local sensor; - sensor 1: remote sensor for ACPU cluster 1; - sensor 2: remote sensor for ACPU cluster 2; - sensor 3: remote sensor for GPU; It can obtain this device temperature by operating this hardware. The new sensor driver satisfies thermal framework and to realize the ACPU ,GPU and so on to cool function. Changes v0->v1; * Delete this hi6220 dtsi. * Fix documentation and error checks. * Modify this driver which makes use of kernel to decide how to dynamically bind the interrupt to hottest sensor. * Delete "sensor-thres-temp" property and read thermal_zone trips points replace of it. * Delete "sensor-reset-temp" property and define the fixed value replace of it. Changes v1->v2; * change patch's position between binding document and driver file * clean up some regiser for enabling thermal sensor * use mutex lock to replace the spin lock Changes v2->v3; * delete sensor id property in binding document * fix sensor driver to satisfy sensor register after deleting sensor id property Changes v3->v4; * using "usleep_range" function instead of "msleep" function * delete code detail error kongxinwei (2): dt-bindings: Document the hi6220 thermal sensor bindings thermal: hisilicon: add new hisilicon thermal sensor driver .../bindings/thermal/hisilicon-thermal.txt | 23 ++ drivers/thermal/Kconfig| 8 + drivers/thermal/Makefile | 1 + drivers/thermal/hisi_thermal.c | 437 + 4 files changed, 469 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt create mode 100644 drivers/thermal/hisi_thermal.c -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 1/2] dt-bindings: Document the hi6220 thermal sensor bindings
From: kongxinwei
This adds documentation of device tree bindings for the
thermal sensor controller of hi6220 SoC.
Signed-off-by: Leo Yan
Signed-off-by: kongxinwei
---
.../bindings/thermal/hisilicon-thermal.txt | 23 ++
1 file changed, 23 insertions(+)
create mode 100644
Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
new file mode 100644
index 000..b2a349f
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
@@ -0,0 +1,23 @@
+* Temperature Sensor on hisilicon SoCs
+
+** Required properties :
+
+- compatible: "hisilicon,tsensor".
+- reg: physical base address of thermal sensor and length of memory mapped
+ region.
+- interrupt: The interrupt number to the cpu. Defines the interrupt used
+ by SOCTHERM.
+- clock-names: Input clock name, should be 'thermal_clk'.
+- clocks: phandles for clock specified in "clock-names" property.
+- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description.
+
+Example :
+
+ tsensor: tsensor@0,f7030700 {
+ compatible = "hisilicon,tsensor";
+ reg = <0x0 0xf7030700 0x0 0x1000>;
+ interrupts = <0 7 0x4>;
+ clocks = <_sys HI6220_TSENSOR_CLK>;
+ clock-names = "thermal_clk";
+ #thermal-sensor-cells = <1>;
+ }
--
1.9.1
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 1/2] dt-bindings: Document the hi6220 thermal sensor bindings
From: kongxinwei kong.kongxin...@hisilicon.com
This adds documentation of device tree bindings for the
thermal sensor controller of hi6220 SoC.
Signed-off-by: Leo Yan leo@linaro.org
Signed-off-by: kongxinwei kong.kongxin...@hisilicon.com
---
.../bindings/thermal/hisilicon-thermal.txt | 23 ++
1 file changed, 23 insertions(+)
create mode 100644
Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
new file mode 100644
index 000..b2a349f
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
@@ -0,0 +1,23 @@
+* Temperature Sensor on hisilicon SoCs
+
+** Required properties :
+
+- compatible: hisilicon,tsensor.
+- reg: physical base address of thermal sensor and length of memory mapped
+ region.
+- interrupt: The interrupt number to the cpu. Defines the interrupt used
+ by SOCTHERM.
+- clock-names: Input clock name, should be 'thermal_clk'.
+- clocks: phandles for clock specified in clock-names property.
+- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description.
+
+Example :
+
+ tsensor: tsensor@0,f7030700 {
+ compatible = hisilicon,tsensor;
+ reg = 0x0 0xf7030700 0x0 0x1000;
+ interrupts = 0 7 0x4;
+ clocks = clock_sys HI6220_TSENSOR_CLK;
+ clock-names = thermal_clk;
+ #thermal-sensor-cells = 1;
+ }
--
1.9.1
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[PATCH v4 0/2] 96boards: add thermal senor support to hikey board
From: kongxinwei kong.kongxin...@hisilicon.com The Linaro connect introduce 96boards series in Hong Kong,The HiKey board is the first board to be certified 96Boards Consumer Edition compatible. This board is based on the HiSilicon SoC. you can get more information from https://www.96boards.org. The hisilicon SoC contains thermal module, this thermal module has 4 sensors, - sensor 0: local sensor; - sensor 1: remote sensor for ACPU cluster 1; - sensor 2: remote sensor for ACPU cluster 2; - sensor 3: remote sensor for GPU; It can obtain this device temperature by operating this hardware. The new sensor driver satisfies thermal framework and to realize the ACPU ,GPU and so on to cool function. Changes v0-v1; * Delete this hi6220 dtsi. * Fix documentation and error checks. * Modify this driver which makes use of kernel to decide how to dynamically bind the interrupt to hottest sensor. * Delete sensor-thres-temp property and read thermal_zone trips points replace of it. * Delete sensor-reset-temp property and define the fixed value replace of it. Changes v1-v2; * change patch's position between binding document and driver file * clean up some regiser for enabling thermal sensor * use mutex lock to replace the spin lock Changes v2-v3; * delete sensor id property in binding document * fix sensor driver to satisfy sensor register after deleting sensor id property Changes v3-v4; * using usleep_range function instead of msleep function * delete code detail error kongxinwei (2): dt-bindings: Document the hi6220 thermal sensor bindings thermal: hisilicon: add new hisilicon thermal sensor driver .../bindings/thermal/hisilicon-thermal.txt | 23 ++ drivers/thermal/Kconfig| 8 + drivers/thermal/Makefile | 1 + drivers/thermal/hisi_thermal.c | 437 + 4 files changed, 469 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt create mode 100644 drivers/thermal/hisi_thermal.c -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 2/2] thermal: hisilicon: add new hisilicon thermal sensor driver
From: kongxinwei kong.kongxin...@hisilicon.com
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.
Signed-off-by: Leo Yan leo@linaro.org
Signed-off-by: kongxinwei kong.kongxin...@hisilicon.com
---
drivers/thermal/Kconfig| 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/hisi_thermal.c | 437 +
3 files changed, 446 insertions(+)
create mode 100644 drivers/thermal/hisi_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index af40db0..81aee01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -136,6 +136,14 @@ config THERMAL_EMULATION
because userland can easily disable the thermal policy by simply
flooding this sysfs node with low temperature values.
+config HISI_THERMAL
+ tristate Hisilicon thermal driver
+ depends on ARCH_HISI CPU_THERMAL OF
+ help
+ Enable this to plug hisilicon's thermal sensor driver into the Linux
+ thermal framework. cpufreq is used as the cooling device to throttle
+ CPUs when the passive trip is crossed.
+
config IMX_THERMAL
tristate Temperature sensor driver for Freescale i.MX SoCs
depends on CPU_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index fa0dc48..08ae7ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL) += st/
obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
+obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c
new file mode 100644
index 000..255c71b
--- /dev/null
+++ b/drivers/thermal/hisi_thermal.c
@@ -0,0 +1,437 @@
+/*
+ * Hisilicon thermal sensor driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Copyright (c) 2014-2015 Linaro Limited.
+ *
+ * Xinwei Kong kong.kongxin...@hisilicon.com
+ * Leo Yan leo@linaro.org
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/cpufreq.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/init.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/kernel.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_device.h
+#include linux/platform_device.h
+#include linux/regmap.h
+#include linux/slab.h
+#include linux/thermal.h
+#include linux/types.h
+
+#include thermal_core.h
+
+#define TEMP0_TH (0x4)
+#define TEMP0_RST_TH (0x8)
+#define TEMP0_CFG (0xC)
+#define TEMP0_EN (0x10)
+#define TEMP0_INT_EN (0x14)
+#define TEMP0_INT_CLR (0x18)
+#define TEMP0_RST_MSK (0x1C)
+#define TEMP0_VALUE(0x28)
+
+#define HISI_TEMP_BASE (-60)
+#define HISI_TEMP_RESET(10)
+
+#define HISI_MAX_SENSORS 4
+
+struct hisi_thermal_sensor {
+ struct hisi_thermal_data *thermal;
+ struct thermal_zone_device *tzd;
+ const struct thermal_trip *trip;
+
+ uint32_t id;
+ uint32_t thres_temp;
+ uint32_t reset_temp;
+};
+
+struct hisi_thermal_data {
+ struct mutex thermal_lock;
+ struct platform_device *pdev;
+ struct clk *clk;
+
+ int irq, irq_bind_sensor;
+ bool irq_enabled;
+
+ unsigned int sensors_num;
+ long sensor_temp[HISI_MAX_SENSORS];
+ struct hisi_thermal_sensor sensors[HISI_MAX_SENSORS];
+
+ void __iomem *regs;
+};
+
+/* in millicelsius */
+static inline int _step_to_temp(int step)
+{
+ /*
+* Every step equals (1 * 200) / 255 celsius, and finally
+* need convert to millicelsius.
+*/
+ return (HISI_TEMP_BASE + (step * 200 / 255)) * 1000;
+}
+
+static inline int _temp_to_step(int temp)
+{
+ return ((temp / 1000 - HISI_TEMP_BASE) * 255 / 200);
+}
+
+static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,
+struct hisi_thermal_sensor *sensor)
+{
+ int val;
+
+ mutex_lock(data-thermal_lock);
+
+ /* disable interrupt */
+ writel(0x0, data-regs + TEMP0_INT_EN);
+ writel(0x1, data-regs + TEMP0_INT_CLR);
+
+ /* disable module firstly */
+ writel(0x0, data
Re: 答复: [PATCH v3 2/2] thermal: hisilicon: add new hisilicon thermal sensor driver
On 2015/4/21 17:09, Wangfei (William, Euler) wrote:
> 发件人: linuxarm-boun...@huawei.com [linuxarm-boun...@huawei.com] 代表 Xinwei Kong
> [kong.kongxin...@hisilicon.com]
> 发送时间: 2015年4月7日 18:40
> 收件人: rui.zhu...@intel.com; edubez...@gmail.com; mpor...@konsulko.com;
> jorge.ramirez-or...@linaro.org; haojian.zhu...@linaro.org;
> linux...@vger.kernel.org
> 抄送: devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Linuxarm;
> Liguozhu (Kenneth); linux-arm-ker...@lists.infradead.org
> 主题: [PATCH v3 2/2] thermal: hisilicon: add new hisilicon thermal sensor driver
>
> From: kongxinwei
>
> This patch adds the support for hisilicon thermal sensor, within
> hisilicon SoC. there will register sensors for thermal framework
> and use device tree to bind cooling device.
>
> Signed-off-by: Leo Yan
> Signed-off-by: kongxinwei
> ---
> drivers/thermal/Kconfig| 8 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/hisi_thermal.c | 438
> +
> 3 files changed, 447 insertions(+)
> create mode 100644 drivers/thermal/hisi_thermal.c
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index af40db0..81aee01 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -136,6 +136,14 @@ config THERMAL_EMULATION
> because userland can easily disable the thermal policy by simply
> flooding this sysfs node with low temperature values.
>
> +config HISI_THERMAL
> + tristate "Hisilicon thermal driver"
> + depends on ARCH_HISI && CPU_THERMAL && OF
> + help
> + Enable this to plug hisilicon's thermal sensor driver into the Linux
> + thermal framework. cpufreq is used as the cooling device to throttle
> + CPUs when the passive trip is crossed.
> +
> config IMX_THERMAL
> tristate "Temperature sensor driver for Freescale i.MX SoCs"
> depends on CPU_THERMAL
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index fa0dc48..08ae7ac 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/
> obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
> obj-$(CONFIG_ST_THERMAL) += st/
> obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
> +obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
> diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c
> new file mode 100644
> index 000..50ffb45
> --- /dev/null
> +++ b/drivers/thermal/hisi_thermal.c
> @@ -0,0 +1,438 @@
> +/*
> + * Hisilicon thermal sensor driver
> + *
> + * Copyright (c) 2014-2015 Hisilicon Limited.
> + * Copyright (c) 2014-2015 Linaro Limited.
> + *
> + * Xinwei Kong
> + * Leo Yan
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any
> + * kind, whether express or implied; without even the implied warranty
> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "thermal_core.h"
> +
> +#define TEMP0_LAG (0x0)
> +#define TEMP0_TH (0x4)
> +#define TEMP0_RST_TH (0x8)
> +#define TEMP0_CFG (0xC)
> +#define TEMP0_EN (0x10)
> +#define TEMP0_INT_EN (0x14)
> +#define TEMP0_INT_CLR (0x18)
> +#define TEMP0_RST_MSK (0x1C)
> +#define TEMP0_RAW_INT (0x20)
> +#define TEMP0_MSK_INT (0x24)
> +#define TEMP0_VALUE(0x28)
> +
> +#define HISI_TEMP_BASE (-60)
> +#define HISI_TEMP_RESET(10)
> +#define HISI_TEMP_PASSIVE (85000)
>
> Don't use it in this drver
Good comment!!
>
> +
> +#define HISI_MAX_SENSORS 4
> +
> +struct hisi_thermal_sensor {
> + struct hisi_thermal_data *thermal;
> + struct thermal_zone_device *tzd;
> + const struct thermal_trip *trip;
> +
> + uint32_t id;
> + uint32_t thres_temp;
> + uint32_t reset_temp;
> +};
&g
Re: 答复: [PATCH v3 2/2] thermal: hisilicon: add new hisilicon thermal sensor driver
On 2015/4/21 17:09, Wangfei (William, Euler) wrote:
发件人: linuxarm-boun...@huawei.com [linuxarm-boun...@huawei.com] 代表 Xinwei Kong
[kong.kongxin...@hisilicon.com]
发送时间: 2015年4月7日 18:40
收件人: rui.zhu...@intel.com; edubez...@gmail.com; mpor...@konsulko.com;
jorge.ramirez-or...@linaro.org; haojian.zhu...@linaro.org;
linux...@vger.kernel.org
抄送: devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Linuxarm;
Liguozhu (Kenneth); linux-arm-ker...@lists.infradead.org
主题: [PATCH v3 2/2] thermal: hisilicon: add new hisilicon thermal sensor driver
From: kongxinwei kong.kongxin...@hisilicon.com
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.
Signed-off-by: Leo Yan leo@linaro.org
Signed-off-by: kongxinwei kong.kongxin...@hisilicon.com
---
drivers/thermal/Kconfig| 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/hisi_thermal.c | 438
+
3 files changed, 447 insertions(+)
create mode 100644 drivers/thermal/hisi_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index af40db0..81aee01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -136,6 +136,14 @@ config THERMAL_EMULATION
because userland can easily disable the thermal policy by simply
flooding this sysfs node with low temperature values.
+config HISI_THERMAL
+ tristate Hisilicon thermal driver
+ depends on ARCH_HISI CPU_THERMAL OF
+ help
+ Enable this to plug hisilicon's thermal sensor driver into the Linux
+ thermal framework. cpufreq is used as the cooling device to throttle
+ CPUs when the passive trip is crossed.
+
config IMX_THERMAL
tristate Temperature sensor driver for Freescale i.MX SoCs
depends on CPU_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index fa0dc48..08ae7ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL) += st/
obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
+obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c
new file mode 100644
index 000..50ffb45
--- /dev/null
+++ b/drivers/thermal/hisi_thermal.c
@@ -0,0 +1,438 @@
+/*
+ * Hisilicon thermal sensor driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Copyright (c) 2014-2015 Linaro Limited.
+ *
+ * Xinwei Kong kong.kongxin...@hisilicon.com
+ * Leo Yan leo@linaro.org
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/cpu_cooling.h
+#include linux/cpufreq.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/init.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/kernel.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_device.h
+#include linux/platform_device.h
+#include linux/regmap.h
+#include linux/slab.h
+#include linux/thermal.h
+#include linux/types.h
+
+#include thermal_core.h
+
+#define TEMP0_LAG (0x0)
+#define TEMP0_TH (0x4)
+#define TEMP0_RST_TH (0x8)
+#define TEMP0_CFG (0xC)
+#define TEMP0_EN (0x10)
+#define TEMP0_INT_EN (0x14)
+#define TEMP0_INT_CLR (0x18)
+#define TEMP0_RST_MSK (0x1C)
+#define TEMP0_RAW_INT (0x20)
+#define TEMP0_MSK_INT (0x24)
+#define TEMP0_VALUE(0x28)
+
+#define HISI_TEMP_BASE (-60)
+#define HISI_TEMP_RESET(10)
+#define HISI_TEMP_PASSIVE (85000)
Don't use it in this drver
Good comment!!
+
+#define HISI_MAX_SENSORS 4
+
+struct hisi_thermal_sensor {
+ struct hisi_thermal_data *thermal;
+ struct thermal_zone_device *tzd;
+ const struct thermal_trip *trip;
+
+ uint32_t id;
+ uint32_t thres_temp;
+ uint32_t reset_temp;
+};
+
+struct hisi_thermal_data {
+ struct mutex thermal_lock;
+ struct platform_device *pdev;
+ struct clk *clk;
+
+ int irq, irq_bind_sensor;
+ bool irq_enabled
[PATCH v3 1/2] dt-bindings: Document the hi6220 thermal sensor bindings
From: kongxinwei
This adds documentation of device tree bindings for the
thermal sensor controller of hi6220 SoC.
Signed-off-by: Leo Yan
Signed-off-by: kongxinwei
---
.../bindings/thermal/hisilicon-thermal.txt | 23 ++
1 file changed, 23 insertions(+)
create mode 100644
Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
new file mode 100644
index 000..b2a349f
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
@@ -0,0 +1,23 @@
+* Temperature Sensor on hisilicon SoCs
+
+** Required properties :
+
+- compatible: "hisilicon,tsensor".
+- reg: physical base address of thermal sensor and length of memory mapped
+ region.
+- interrupt: The interrupt number to the cpu. Defines the interrupt used
+ by SOCTHERM.
+- clock-names: Input clock name, should be 'thermal_clk'.
+- clocks: phandles for clock specified in "clock-names" property.
+- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description.
+
+Example :
+
+ tsensor: tsensor@0,f7030700 {
+ compatible = "hisilicon,tsensor";
+ reg = <0x0 0xf7030700 0x0 0x1000>;
+ interrupts = <0 7 0x4>;
+ clocks = <_sys HI6220_TSENSOR_CLK>;
+ clock-names = "thermal_clk";
+ #thermal-sensor-cells = <1>;
+ }
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 2/2] thermal: hisilicon: add new hisilicon thermal sensor driver
From: kongxinwei
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.
Signed-off-by: Leo Yan
Signed-off-by: kongxinwei
---
drivers/thermal/Kconfig| 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/hisi_thermal.c | 438 +
3 files changed, 447 insertions(+)
create mode 100644 drivers/thermal/hisi_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index af40db0..81aee01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -136,6 +136,14 @@ config THERMAL_EMULATION
because userland can easily disable the thermal policy by simply
flooding this sysfs node with low temperature values.
+config HISI_THERMAL
+ tristate "Hisilicon thermal driver"
+ depends on ARCH_HISI && CPU_THERMAL && OF
+ help
+ Enable this to plug hisilicon's thermal sensor driver into the Linux
+ thermal framework. cpufreq is used as the cooling device to throttle
+ CPUs when the passive trip is crossed.
+
config IMX_THERMAL
tristate "Temperature sensor driver for Freescale i.MX SoCs"
depends on CPU_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index fa0dc48..08ae7ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL) += st/
obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
+obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c
new file mode 100644
index 000..50ffb45
--- /dev/null
+++ b/drivers/thermal/hisi_thermal.c
@@ -0,0 +1,438 @@
+/*
+ * Hisilicon thermal sensor driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Copyright (c) 2014-2015 Linaro Limited.
+ *
+ * Xinwei Kong
+ * Leo Yan
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "thermal_core.h"
+
+#define TEMP0_LAG (0x0)
+#define TEMP0_TH (0x4)
+#define TEMP0_RST_TH (0x8)
+#define TEMP0_CFG (0xC)
+#define TEMP0_EN (0x10)
+#define TEMP0_INT_EN (0x14)
+#define TEMP0_INT_CLR (0x18)
+#define TEMP0_RST_MSK (0x1C)
+#define TEMP0_RAW_INT (0x20)
+#define TEMP0_MSK_INT (0x24)
+#define TEMP0_VALUE(0x28)
+
+#define HISI_TEMP_BASE (-60)
+#define HISI_TEMP_RESET(10)
+#define HISI_TEMP_PASSIVE (85000)
+
+#define HISI_MAX_SENSORS 4
+
+struct hisi_thermal_sensor {
+ struct hisi_thermal_data *thermal;
+ struct thermal_zone_device *tzd;
+ const struct thermal_trip *trip;
+
+ uint32_t id;
+ uint32_t thres_temp;
+ uint32_t reset_temp;
+};
+
+struct hisi_thermal_data {
+ struct mutex thermal_lock;
+ struct platform_device *pdev;
+ struct clk *clk;
+
+ int irq, irq_bind_sensor;
+ bool irq_enabled;
+
+ unsigned int sensors_num;
+ long sensor_temp[HISI_MAX_SENSORS];
+ struct hisi_thermal_sensor sensors[HISI_MAX_SENSORS];
+
+ void __iomem *regs;
+};
+
+/* in millicelsius */
+static inline int _step_to_temp(int step)
+{
+ /*
+* Every step equals (1 * 200) / 255 celsius, and finally
+* need convert to millicelsius.
+*/
+ return (HISI_TEMP_BASE + (step * 200 / 255)) * 1000;
+}
+
+static inline int _temp_to_step(int temp)
+{
+ return ((temp / 1000 - HISI_TEMP_BASE) * 255 / 200);
+}
+
+static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,
+struct hisi_thermal_sensor *sensor)
+{
+ int val;
+
+ mutex_lock(>thermal_lock);
+
+ /* disable interrupt */
+ writel(0x0, data->regs + TEMP0_INT_EN);
+ writel(0x1, data->regs + TEMP0_INT_CLR);
+
+ /* disable module firstly */
+ writel(0x0, data->regs + TEMP0_EN);
+
+ /* select sensor id */
+ writel((sensor->id <&l
[PATCH v3 0/2] 96boards: add thermal senor support to hikey board
From: kongxinwei Thank you all for giving this v2 patches stages some comments. Here is v3 patches and address all the issues raised as part of v2 review. The Linaro connect introduce 96boards series in Hong Kong,The HiKey board is the first board to be certified 96Boards Consumer Edition compatible. This board is based on the HiSilicon SoC. you can get more information from https://www.96boards.org. The hisilicon SoC contains thermal module, this thermal module has 4 sensors, - sensor 0: local sensor; - sensor 1: remote sensor for ACPU cluster 1; - sensor 2: remote sensor for ACPU cluster 2; - sensor 3: remote sensor for GPU; It can obtain this device temperature by operating this hardware. The new sensor driver satisfies thermal framework and to realize the ACPU ,GPU and so on to cool function. Changes v0->v1; * Delete this hi6220 dtsi. * Fix documentation and error checks. * Modify this driver which makes use of kernel to decide how to dynamically bind the interrupt to hottest sensor. * Delete "sensor-thres-temp" property and read thermal_zone trips points replace of it. * Delete "sensor-reset-temp" property and define the fixed value replace of it. Changes v1->v2; * change patch's position between binding document and driver file * clean up some regiser for enabling thermal sensor * use mutex lock to replace the spin lock Changes v2->v3; * delete sensor id property in binding document * fix sensor driver to satisfy sensor register after deleting sensor id property kongxinwei (2): dt-bindings: Document the hi6220 thermal sensor bindings thermal: hisilicon: add new hisilicon thermal sensor driver .../bindings/thermal/hisilicon-thermal.txt | 23 ++ drivers/thermal/Kconfig| 8 + drivers/thermal/Makefile | 1 + drivers/thermal/hisi_thermal.c | 438 + 4 files changed, 470 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt create mode 100644 drivers/thermal/hisi_thermal.c -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 1/2] dt-bindings: Document the hi6220 thermal sensor bindings
On 2015/4/7 12:27, Eduardo Valentin wrote:
> On Tue, Apr 07, 2015 at 11:46:22AM +0800, Xinwei Kong wrote:
>>
>>
>> On 2015/4/6 22:03, Matt Porter wrote:
>>> On Tue, Mar 31, 2015 at 02:59:21PM +0800, Xinwei Kong wrote:
>>>> From: kongxinwei
>>>>
>>>> This adds documentation of device tree bindings for the
>>>> thermal sensor controller of hi6220 SoC.
>>>>
>>>> Signed-off-by: Leo Yan
>>>> Signed-off-by: kongxinwei
>>>> ---
>>>> .../bindings/thermal/hisilicon-thermal.txt | 45
>>>> ++
>>>> 1 file changed, 45 insertions(+)
>>>> create mode 100644
>>>> Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
>>>>
>>>> diff --git
>>>> a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
>>>> b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
>>>> new file mode 100644
>>>> index 000..ceb6e2e
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
>>>> @@ -0,0 +1,45 @@
>>>> +* Hisilicon Thermal
>>>> +
>>>> +This driver is for hi6220 SoC which contain 4 thermal sensor.
>>>> +
>>>> + 1. sensor 0: local sensor;
>>>> + 2. sensor 1: remote sensor for ACPU cluster 1;
>>>> + 3. sensor 2: remote sensor for ACPU cluster 2;
>>>> + 4. sensor 3: remote sensor for GPU.
>>>> +
>>>> +Every sensor use one child node to represent it, so thermal sensor include
>>>> +parent node and four child node. The parent node describe common feature
>>>> and
>>>> +child node describe private feature for thermal sensor;
>>>> +
>>>> +** Required properties :
>>>> +
>>>> +- compatible: "hisilicon,tsensor".
>>>> +- reg: physical base address of thermal sensor and length of memory mapped
>>>> + region.
>>>> +- interrupt: The interrupt number to the cpu. Defines the interrupt used
>>>> + by SOCTHERM.
>>>> +- clock-names: Input clock name, should be 'thermal_clk'.
>>>> +- clocks: phandles for clock specified in "clock-names" property.
>>>> +- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description.
>>>> +
>>>> +** Required properties for child nodes :
>>>> +
>>>> +- hisilicon,tsensor-id: the index of thermal sensor and use it to
>>>> distinguish
>>>> + thermal sensor. For example: <0> stands for local sensor; <1> stands for
>>>> + acpu1 sensor;
>>>
>>> Please show an example illustrating why this property is needed. The
>>> example below doesn't show any per sensor properties aside from the
>>> sensor id. Other bindings with a similar sub-sensor hardware design like
>>> tegra-soctherm and rockchip-thermal don't have a need for a vendor
>>> specific property like this. Their drivers simply iterate over an id
>>> index during thermal sensor registration.
>>>
>>> -Matt
>>>
>> Thermal Ip of hisilicon SoC can get four module temperature--local sensor,
>> ACPU0
>> sensor, ACPU1 sensor and gpu sensor. In order to use these sensors, this
>> driver
>> will make use of sensor id to distinguish sensor in using process.
>>
>> These four sensors only get one sensor temperature at the same times. Because
>> these sensor commonly use the same register by setting diff value to enable
>> one
>> sensor. howerver, sensor id is key flag for these diff sensor modules.
>>
>> If deleting sensor id, this driver will define some value which set diff
>> sensor
>> regitser and it difficult to understand sensor register operation.
>
> The above still do not explain why you need a specific property.
>
> Could you please check
> Documentation/devicetree/bindings/thermal/thermal.txt file?
>
> There are several examples there on how to define DT nodes for the exact
> case you describe above.
>
Good comments, thank you for Matt and Valentin and I will try to satisfy
thermal.txt
file to realize this driver. Please wait for the next version patches.
Thanks
Xinwei
>>
>> Thanks
>> Xinwei
>>
>>>> +
>>>> +Example :
>>>> +
>>>> + tsensor: tsensor@0,f7030700 {
>>>> + compatible = "hisilicon,tsensor";
>>>> + reg = <0x0 0xf7030700 0x0 0x1000>;
>>>> + interrupts = <0 7 0x4>;
>>>> + clocks = <_sys HI6220_TSENSOR_CLK>;
>>>> + clock-names = "thermal_clk";
>>>> + #thermal-sensor-cells = <1>;
>>>> +
>>>> + local_sensor {
>>>> + hisilicon,tsensor-id = <0>;
>>>> + }
>>>> + ...
>>>> + }
>>>> --
>>>> 1.9.1
>>>>
>>>>
>>>>
>>>> ___
>>>> linux-arm-kernel mailing list
>>>> linux-arm-ker...@lists.infradead.org
>>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>>
>>> .
>>>
>>
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Re: [PATCH v2 1/2] dt-bindings: Document the hi6220 thermal sensor bindings
On 2015/4/7 12:27, Eduardo Valentin wrote:
On Tue, Apr 07, 2015 at 11:46:22AM +0800, Xinwei Kong wrote:
On 2015/4/6 22:03, Matt Porter wrote:
On Tue, Mar 31, 2015 at 02:59:21PM +0800, Xinwei Kong wrote:
From: kongxinwei kong.kongxin...@hisilicon.com
This adds documentation of device tree bindings for the
thermal sensor controller of hi6220 SoC.
Signed-off-by: Leo Yan leo@linaro.org
Signed-off-by: kongxinwei kong.kongxin...@hisilicon.com
---
.../bindings/thermal/hisilicon-thermal.txt | 45
++
1 file changed, 45 insertions(+)
create mode 100644
Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
diff --git
a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
new file mode 100644
index 000..ceb6e2e
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
@@ -0,0 +1,45 @@
+* Hisilicon Thermal
+
+This driver is for hi6220 SoC which contain 4 thermal sensor.
+
+ 1. sensor 0: local sensor;
+ 2. sensor 1: remote sensor for ACPU cluster 1;
+ 3. sensor 2: remote sensor for ACPU cluster 2;
+ 4. sensor 3: remote sensor for GPU.
+
+Every sensor use one child node to represent it, so thermal sensor include
+parent node and four child node. The parent node describe common feature
and
+child node describe private feature for thermal sensor;
+
+** Required properties :
+
+- compatible: hisilicon,tsensor.
+- reg: physical base address of thermal sensor and length of memory mapped
+ region.
+- interrupt: The interrupt number to the cpu. Defines the interrupt used
+ by SOCTHERM.
+- clock-names: Input clock name, should be 'thermal_clk'.
+- clocks: phandles for clock specified in clock-names property.
+- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description.
+
+** Required properties for child nodes :
+
+- hisilicon,tsensor-id: the index of thermal sensor and use it to
distinguish
+ thermal sensor. For example: 0 stands for local sensor; 1 stands for
+ acpu1 sensor;
Please show an example illustrating why this property is needed. The
example below doesn't show any per sensor properties aside from the
sensor id. Other bindings with a similar sub-sensor hardware design like
tegra-soctherm and rockchip-thermal don't have a need for a vendor
specific property like this. Their drivers simply iterate over an id
index during thermal sensor registration.
-Matt
Thermal Ip of hisilicon SoC can get four module temperature--local sensor,
ACPU0
sensor, ACPU1 sensor and gpu sensor. In order to use these sensors, this
driver
will make use of sensor id to distinguish sensor in using process.
These four sensors only get one sensor temperature at the same times. Because
these sensor commonly use the same register by setting diff value to enable
one
sensor. howerver, sensor id is key flag for these diff sensor modules.
If deleting sensor id, this driver will define some value which set diff
sensor
regitser and it difficult to understand sensor register operation.
The above still do not explain why you need a specific property.
Could you please check
Documentation/devicetree/bindings/thermal/thermal.txt file?
There are several examples there on how to define DT nodes for the exact
case you describe above.
Good comments, thank you for Matt and Valentin and I will try to satisfy
thermal.txt
file to realize this driver. Please wait for the next version patches.
Thanks
Xinwei
Thanks
Xinwei
+
+Example :
+
+ tsensor: tsensor@0,f7030700 {
+ compatible = hisilicon,tsensor;
+ reg = 0x0 0xf7030700 0x0 0x1000;
+ interrupts = 0 7 0x4;
+ clocks = clock_sys HI6220_TSENSOR_CLK;
+ clock-names = thermal_clk;
+ #thermal-sensor-cells = 1;
+
+ local_sensor {
+ hisilicon,tsensor-id = 0;
+ }
+ ...
+ }
--
1.9.1
___
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.
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[PATCH v3 0/2] 96boards: add thermal senor support to hikey board
From: kongxinwei kong.kongxin...@hisilicon.com Thank you all for giving this v2 patches stages some comments. Here is v3 patches and address all the issues raised as part of v2 review. The Linaro connect introduce 96boards series in Hong Kong,The HiKey board is the first board to be certified 96Boards Consumer Edition compatible. This board is based on the HiSilicon SoC. you can get more information from https://www.96boards.org. The hisilicon SoC contains thermal module, this thermal module has 4 sensors, - sensor 0: local sensor; - sensor 1: remote sensor for ACPU cluster 1; - sensor 2: remote sensor for ACPU cluster 2; - sensor 3: remote sensor for GPU; It can obtain this device temperature by operating this hardware. The new sensor driver satisfies thermal framework and to realize the ACPU ,GPU and so on to cool function. Changes v0-v1; * Delete this hi6220 dtsi. * Fix documentation and error checks. * Modify this driver which makes use of kernel to decide how to dynamically bind the interrupt to hottest sensor. * Delete sensor-thres-temp property and read thermal_zone trips points replace of it. * Delete sensor-reset-temp property and define the fixed value replace of it. Changes v1-v2; * change patch's position between binding document and driver file * clean up some regiser for enabling thermal sensor * use mutex lock to replace the spin lock Changes v2-v3; * delete sensor id property in binding document * fix sensor driver to satisfy sensor register after deleting sensor id property kongxinwei (2): dt-bindings: Document the hi6220 thermal sensor bindings thermal: hisilicon: add new hisilicon thermal sensor driver .../bindings/thermal/hisilicon-thermal.txt | 23 ++ drivers/thermal/Kconfig| 8 + drivers/thermal/Makefile | 1 + drivers/thermal/hisi_thermal.c | 438 + 4 files changed, 470 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt create mode 100644 drivers/thermal/hisi_thermal.c -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 2/2] thermal: hisilicon: add new hisilicon thermal sensor driver
From: kongxinwei kong.kongxin...@hisilicon.com
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.
Signed-off-by: Leo Yan leo@linaro.org
Signed-off-by: kongxinwei kong.kongxin...@hisilicon.com
---
drivers/thermal/Kconfig| 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/hisi_thermal.c | 438 +
3 files changed, 447 insertions(+)
create mode 100644 drivers/thermal/hisi_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index af40db0..81aee01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -136,6 +136,14 @@ config THERMAL_EMULATION
because userland can easily disable the thermal policy by simply
flooding this sysfs node with low temperature values.
+config HISI_THERMAL
+ tristate Hisilicon thermal driver
+ depends on ARCH_HISI CPU_THERMAL OF
+ help
+ Enable this to plug hisilicon's thermal sensor driver into the Linux
+ thermal framework. cpufreq is used as the cooling device to throttle
+ CPUs when the passive trip is crossed.
+
config IMX_THERMAL
tristate Temperature sensor driver for Freescale i.MX SoCs
depends on CPU_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index fa0dc48..08ae7ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL) += st/
obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
+obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c
new file mode 100644
index 000..50ffb45
--- /dev/null
+++ b/drivers/thermal/hisi_thermal.c
@@ -0,0 +1,438 @@
+/*
+ * Hisilicon thermal sensor driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Copyright (c) 2014-2015 Linaro Limited.
+ *
+ * Xinwei Kong kong.kongxin...@hisilicon.com
+ * Leo Yan leo@linaro.org
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/cpu_cooling.h
+#include linux/cpufreq.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/init.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/kernel.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_device.h
+#include linux/platform_device.h
+#include linux/regmap.h
+#include linux/slab.h
+#include linux/thermal.h
+#include linux/types.h
+
+#include thermal_core.h
+
+#define TEMP0_LAG (0x0)
+#define TEMP0_TH (0x4)
+#define TEMP0_RST_TH (0x8)
+#define TEMP0_CFG (0xC)
+#define TEMP0_EN (0x10)
+#define TEMP0_INT_EN (0x14)
+#define TEMP0_INT_CLR (0x18)
+#define TEMP0_RST_MSK (0x1C)
+#define TEMP0_RAW_INT (0x20)
+#define TEMP0_MSK_INT (0x24)
+#define TEMP0_VALUE(0x28)
+
+#define HISI_TEMP_BASE (-60)
+#define HISI_TEMP_RESET(10)
+#define HISI_TEMP_PASSIVE (85000)
+
+#define HISI_MAX_SENSORS 4
+
+struct hisi_thermal_sensor {
+ struct hisi_thermal_data *thermal;
+ struct thermal_zone_device *tzd;
+ const struct thermal_trip *trip;
+
+ uint32_t id;
+ uint32_t thres_temp;
+ uint32_t reset_temp;
+};
+
+struct hisi_thermal_data {
+ struct mutex thermal_lock;
+ struct platform_device *pdev;
+ struct clk *clk;
+
+ int irq, irq_bind_sensor;
+ bool irq_enabled;
+
+ unsigned int sensors_num;
+ long sensor_temp[HISI_MAX_SENSORS];
+ struct hisi_thermal_sensor sensors[HISI_MAX_SENSORS];
+
+ void __iomem *regs;
+};
+
+/* in millicelsius */
+static inline int _step_to_temp(int step)
+{
+ /*
+* Every step equals (1 * 200) / 255 celsius, and finally
+* need convert to millicelsius.
+*/
+ return (HISI_TEMP_BASE + (step * 200 / 255)) * 1000;
+}
+
+static inline int _temp_to_step(int temp)
+{
+ return ((temp / 1000 - HISI_TEMP_BASE) * 255 / 200);
+}
+
+static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,
+struct hisi_thermal_sensor *sensor)
+{
+ int val;
+
+ mutex_lock(data
[PATCH v3 1/2] dt-bindings: Document the hi6220 thermal sensor bindings
From: kongxinwei kong.kongxin...@hisilicon.com
This adds documentation of device tree bindings for the
thermal sensor controller of hi6220 SoC.
Signed-off-by: Leo Yan leo@linaro.org
Signed-off-by: kongxinwei kong.kongxin...@hisilicon.com
---
.../bindings/thermal/hisilicon-thermal.txt | 23 ++
1 file changed, 23 insertions(+)
create mode 100644
Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
new file mode 100644
index 000..b2a349f
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
@@ -0,0 +1,23 @@
+* Temperature Sensor on hisilicon SoCs
+
+** Required properties :
+
+- compatible: hisilicon,tsensor.
+- reg: physical base address of thermal sensor and length of memory mapped
+ region.
+- interrupt: The interrupt number to the cpu. Defines the interrupt used
+ by SOCTHERM.
+- clock-names: Input clock name, should be 'thermal_clk'.
+- clocks: phandles for clock specified in clock-names property.
+- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description.
+
+Example :
+
+ tsensor: tsensor@0,f7030700 {
+ compatible = hisilicon,tsensor;
+ reg = 0x0 0xf7030700 0x0 0x1000;
+ interrupts = 0 7 0x4;
+ clocks = clock_sys HI6220_TSENSOR_CLK;
+ clock-names = thermal_clk;
+ #thermal-sensor-cells = 1;
+ }
--
1.9.1
--
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Re: [PATCH v2 1/2] dt-bindings: Document the hi6220 thermal sensor bindings
On 2015/4/6 22:03, Matt Porter wrote:
> On Tue, Mar 31, 2015 at 02:59:21PM +0800, Xinwei Kong wrote:
>> From: kongxinwei
>>
>> This adds documentation of device tree bindings for the
>> thermal sensor controller of hi6220 SoC.
>>
>> Signed-off-by: Leo Yan
>> Signed-off-by: kongxinwei
>> ---
>> .../bindings/thermal/hisilicon-thermal.txt | 45
>> ++
>> 1 file changed, 45 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
>> b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
>> new file mode 100644
>> index 000..ceb6e2e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
>> @@ -0,0 +1,45 @@
>> +* Hisilicon Thermal
>> +
>> +This driver is for hi6220 SoC which contain 4 thermal sensor.
>> +
>> +1. sensor 0: local sensor;
>> +2. sensor 1: remote sensor for ACPU cluster 1;
>> +3. sensor 2: remote sensor for ACPU cluster 2;
>> +4. sensor 3: remote sensor for GPU.
>> +
>> +Every sensor use one child node to represent it, so thermal sensor include
>> +parent node and four child node. The parent node describe common feature and
>> +child node describe private feature for thermal sensor;
>> +
>> +** Required properties :
>> +
>> +- compatible: "hisilicon,tsensor".
>> +- reg: physical base address of thermal sensor and length of memory mapped
>> + region.
>> +- interrupt: The interrupt number to the cpu. Defines the interrupt used
>> + by SOCTHERM.
>> +- clock-names: Input clock name, should be 'thermal_clk'.
>> +- clocks: phandles for clock specified in "clock-names" property.
>> +- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description.
>> +
>> +** Required properties for child nodes :
>> +
>> +- hisilicon,tsensor-id: the index of thermal sensor and use it to
>> distinguish
>> + thermal sensor. For example: <0> stands for local sensor; <1> stands for
>> + acpu1 sensor;
>
> Please show an example illustrating why this property is needed. The
> example below doesn't show any per sensor properties aside from the
> sensor id. Other bindings with a similar sub-sensor hardware design like
> tegra-soctherm and rockchip-thermal don't have a need for a vendor
> specific property like this. Their drivers simply iterate over an id
> index during thermal sensor registration.
>
> -Matt
>
Thermal Ip of hisilicon SoC can get four module temperature--local sensor, ACPU0
sensor, ACPU1 sensor and gpu sensor. In order to use these sensors, this driver
will make use of sensor id to distinguish sensor in using process.
These four sensors only get one sensor temperature at the same times. Because
these sensor commonly use the same register by setting diff value to enable one
sensor. howerver, sensor id is key flag for these diff sensor modules.
If deleting sensor id, this driver will define some value which set diff sensor
regitser and it difficult to understand sensor register operation.
Thanks
Xinwei
>> +
>> +Example :
>> +
>> +tsensor: tsensor@0,f7030700 {
>> +compatible = "hisilicon,tsensor";
>> +reg = <0x0 0xf7030700 0x0 0x1000>;
>> +interrupts = <0 7 0x4>;
>> +clocks = <_sys HI6220_TSENSOR_CLK>;
>> +clock-names = "thermal_clk";
>> +#thermal-sensor-cells = <1>;
>> +
>> +local_sensor {
>> +hisilicon,tsensor-id = <0>;
>> +}
>> +...
>> +}
>> --
>> 1.9.1
>>
>>
>>
>> ___
>> linux-arm-kernel mailing list
>> linux-arm-ker...@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> .
>
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Re: [PATCH v2 1/2] dt-bindings: Document the hi6220 thermal sensor bindings
On 2015/4/6 22:03, Matt Porter wrote:
On Tue, Mar 31, 2015 at 02:59:21PM +0800, Xinwei Kong wrote:
From: kongxinwei kong.kongxin...@hisilicon.com
This adds documentation of device tree bindings for the
thermal sensor controller of hi6220 SoC.
Signed-off-by: Leo Yan leo@linaro.org
Signed-off-by: kongxinwei kong.kongxin...@hisilicon.com
---
.../bindings/thermal/hisilicon-thermal.txt | 45
++
1 file changed, 45 insertions(+)
create mode 100644
Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
new file mode 100644
index 000..ceb6e2e
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
@@ -0,0 +1,45 @@
+* Hisilicon Thermal
+
+This driver is for hi6220 SoC which contain 4 thermal sensor.
+
+1. sensor 0: local sensor;
+2. sensor 1: remote sensor for ACPU cluster 1;
+3. sensor 2: remote sensor for ACPU cluster 2;
+4. sensor 3: remote sensor for GPU.
+
+Every sensor use one child node to represent it, so thermal sensor include
+parent node and four child node. The parent node describe common feature and
+child node describe private feature for thermal sensor;
+
+** Required properties :
+
+- compatible: hisilicon,tsensor.
+- reg: physical base address of thermal sensor and length of memory mapped
+ region.
+- interrupt: The interrupt number to the cpu. Defines the interrupt used
+ by SOCTHERM.
+- clock-names: Input clock name, should be 'thermal_clk'.
+- clocks: phandles for clock specified in clock-names property.
+- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description.
+
+** Required properties for child nodes :
+
+- hisilicon,tsensor-id: the index of thermal sensor and use it to
distinguish
+ thermal sensor. For example: 0 stands for local sensor; 1 stands for
+ acpu1 sensor;
Please show an example illustrating why this property is needed. The
example below doesn't show any per sensor properties aside from the
sensor id. Other bindings with a similar sub-sensor hardware design like
tegra-soctherm and rockchip-thermal don't have a need for a vendor
specific property like this. Their drivers simply iterate over an id
index during thermal sensor registration.
-Matt
Thermal Ip of hisilicon SoC can get four module temperature--local sensor, ACPU0
sensor, ACPU1 sensor and gpu sensor. In order to use these sensors, this driver
will make use of sensor id to distinguish sensor in using process.
These four sensors only get one sensor temperature at the same times. Because
these sensor commonly use the same register by setting diff value to enable one
sensor. howerver, sensor id is key flag for these diff sensor modules.
If deleting sensor id, this driver will define some value which set diff sensor
regitser and it difficult to understand sensor register operation.
Thanks
Xinwei
+
+Example :
+
+tsensor: tsensor@0,f7030700 {
+compatible = hisilicon,tsensor;
+reg = 0x0 0xf7030700 0x0 0x1000;
+interrupts = 0 7 0x4;
+clocks = clock_sys HI6220_TSENSOR_CLK;
+clock-names = thermal_clk;
+#thermal-sensor-cells = 1;
+
+local_sensor {
+hisilicon,tsensor-id = 0;
+}
+...
+}
--
1.9.1
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[PATCH v2 0/2] 96boards: add thermal senor support to hikey board
From: kongxinwei Thank you all for giving this v1 patches stages some comments. Here is v2 patches and address all the issues raised as part of v1 review. The Linaro connect introduce 96boards series in Hong Kong,The HiKey board is the first board to be certified 96Boards Consumer Edition compatible. This board is based on the HiSilicon SoC. you can get more information from https://www.96boards.org. The hisilicon SoC contains thermal module, this thermal module has 4 sensors, - sensor 0: local sensor; - sensor 1: remote sensor for ACPU cluster 1; - sensor 2: remote sensor for ACPU cluster 2; - sensor 3: remote sensor for GPU; It can obtain this device temperature by operating this hardware. The new sensor driver satisfies thermal framework and to realize the ACPU ,GPU and so on to cool function. Changes v0->v1; * Delete this hi6220 dtsi. * Fix documentation and error checks. * Modify this driver which makes use of kernel to decide how to dynamically bind the interrupt to hottest sensor. * Delete "sensor-thres-temp" property and read thermal_zone trips points replace of it. * Delete "sensor-reset-temp" property and define the fixed value replace of it. Changes v1->v2; * change patch's situation between binding document and driver file * clean up some regiser for enabling thermal sensor * use mutex lock to replace the spin lock kongxinwei (2): dt-bindings: Document the hi6220 thermal sensor bindings thermal: hisilicon: add new hisilicon thermal sensor driver .../bindings/thermal/hisilicon-thermal.txt | 45 ++ drivers/thermal/Kconfig| 8 + drivers/thermal/Makefile | 1 + drivers/thermal/hisi_thermal.c | 475 + 4 files changed, 529 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt create mode 100644 drivers/thermal/hisi_thermal.c -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/2] dt-bindings: Document the hi6220 thermal sensor bindings
From: kongxinwei
This adds documentation of device tree bindings for the
thermal sensor controller of hi6220 SoC.
Signed-off-by: Leo Yan
Signed-off-by: kongxinwei
---
.../bindings/thermal/hisilicon-thermal.txt | 45 ++
1 file changed, 45 insertions(+)
create mode 100644
Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
new file mode 100644
index 000..ceb6e2e
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
@@ -0,0 +1,45 @@
+* Hisilicon Thermal
+
+This driver is for hi6220 SoC which contain 4 thermal sensor.
+
+ 1. sensor 0: local sensor;
+ 2. sensor 1: remote sensor for ACPU cluster 1;
+ 3. sensor 2: remote sensor for ACPU cluster 2;
+ 4. sensor 3: remote sensor for GPU.
+
+Every sensor use one child node to represent it, so thermal sensor include
+parent node and four child node. The parent node describe common feature and
+child node describe private feature for thermal sensor;
+
+** Required properties :
+
+- compatible: "hisilicon,tsensor".
+- reg: physical base address of thermal sensor and length of memory mapped
+ region.
+- interrupt: The interrupt number to the cpu. Defines the interrupt used
+ by SOCTHERM.
+- clock-names: Input clock name, should be 'thermal_clk'.
+- clocks: phandles for clock specified in "clock-names" property.
+- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description.
+
+** Required properties for child nodes :
+
+- hisilicon,tsensor-id: the index of thermal sensor and use it to distinguish
+ thermal sensor. For example: <0> stands for local sensor; <1> stands for
+ acpu1 sensor;
+
+Example :
+
+ tsensor: tsensor@0,f7030700 {
+ compatible = "hisilicon,tsensor";
+ reg = <0x0 0xf7030700 0x0 0x1000>;
+ interrupts = <0 7 0x4>;
+ clocks = <_sys HI6220_TSENSOR_CLK>;
+ clock-names = "thermal_clk";
+ #thermal-sensor-cells = <1>;
+
+ local_sensor {
+ hisilicon,tsensor-id = <0>;
+ }
+ ...
+ }
--
1.9.1
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[PATCH v2 2/2] thermal: hisilicon: add new hisilicon thermal sensor driver
From: kongxinwei
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.
Signed-off-by: Leo Yan
Signed-off-by: kongxinwei
---
drivers/thermal/Kconfig| 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/hisi_thermal.c | 475 +
3 files changed, 484 insertions(+)
create mode 100644 drivers/thermal/hisi_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index af40db0..81aee01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -136,6 +136,14 @@ config THERMAL_EMULATION
because userland can easily disable the thermal policy by simply
flooding this sysfs node with low temperature values.
+config HISI_THERMAL
+ tristate "Hisilicon thermal driver"
+ depends on ARCH_HISI && CPU_THERMAL && OF
+ help
+ Enable this to plug hisilicon's thermal sensor driver into the Linux
+ thermal framework. cpufreq is used as the cooling device to throttle
+ CPUs when the passive trip is crossed.
+
config IMX_THERMAL
tristate "Temperature sensor driver for Freescale i.MX SoCs"
depends on CPU_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index fa0dc48..08ae7ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL) += st/
obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
+obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c
new file mode 100644
index 000..c03d5c3
--- /dev/null
+++ b/drivers/thermal/hisi_thermal.c
@@ -0,0 +1,475 @@
+/*
+ * Hisilicon thermal sensor driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Copyright (c) 2014-2015 Linaro Limited.
+ *
+ * Xinwei Kong
+ * Leo Yan
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "thermal_core.h"
+
+#define TEMP0_LAG (0x0)
+#define TEMP0_TH (0x4)
+#define TEMP0_RST_TH (0x8)
+#define TEMP0_CFG (0xC)
+#define TEMP0_EN (0x10)
+#define TEMP0_INT_EN (0x14)
+#define TEMP0_INT_CLR (0x18)
+#define TEMP0_RST_MSK (0x1C)
+#define TEMP0_RAW_INT (0x20)
+#define TEMP0_MSK_INT (0x24)
+#define TEMP0_VALUE(0x28)
+
+#define HISI_TEMP_BASE (-60)
+#define HISI_TEMP_RESET(10)
+#define HISI_TEMP_PASSIVE (85000)
+
+#define HISI_MAX_SENSORS 4
+
+struct hisi_thermal_sensor {
+ struct hisi_thermal_data *thermal;
+ struct thermal_zone_device *tzd;
+ const struct thermal_trip *trip;
+
+ uint32_t id;
+ uint32_t thres_temp, reset_temp;
+};
+
+struct hisi_thermal_data {
+ struct mutex thermal_lock;
+ struct platform_device *pdev;
+ struct clk *clk;
+
+ int irq, irq_bind_sensor;
+ bool irq_enabled;
+
+ unsigned int sensors_num;
+ long sensor_temp[HISI_MAX_SENSORS];
+ struct hisi_thermal_sensor sensors[HISI_MAX_SENSORS];
+
+ void __iomem *regs;
+};
+
+/* in millicelsius */
+static inline int _step_to_temp(int step)
+{
+ /*
+* Every step equals (1 * 200) / 255 celsius, and finally
+* need convert to millicelsius.
+*/
+ return (HISI_TEMP_BASE + (step * 200 / 255)) * 1000;
+}
+
+static inline int _temp_to_step(int temp)
+{
+ return ((temp / 1000 - HISI_TEMP_BASE) * 255 / 200);
+}
+
+static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,
+struct hisi_thermal_sensor *sensor)
+{
+ int val;
+
+ mutex_lock(>thermal_lock);
+
+ /* disable interrupt */
+ writel(0x0, data->regs + TEMP0_INT_EN);
+ writel(0x1, data->regs + TEMP0_INT_CLR);
+
+ /* disable module firstly */
+ writel(0x0, data->regs + TEMP0_EN);
+
+ /* select sensor id */
+ writel((sensor->id << 12), data->
[PATCH v2 0/2] 96boards: add thermal senor support to hikey board
From: kongxinwei kong.kongxin...@hisilicon.com Thank you all for giving this v1 patches stages some comments. Here is v2 patches and address all the issues raised as part of v1 review. The Linaro connect introduce 96boards series in Hong Kong,The HiKey board is the first board to be certified 96Boards Consumer Edition compatible. This board is based on the HiSilicon SoC. you can get more information from https://www.96boards.org. The hisilicon SoC contains thermal module, this thermal module has 4 sensors, - sensor 0: local sensor; - sensor 1: remote sensor for ACPU cluster 1; - sensor 2: remote sensor for ACPU cluster 2; - sensor 3: remote sensor for GPU; It can obtain this device temperature by operating this hardware. The new sensor driver satisfies thermal framework and to realize the ACPU ,GPU and so on to cool function. Changes v0-v1; * Delete this hi6220 dtsi. * Fix documentation and error checks. * Modify this driver which makes use of kernel to decide how to dynamically bind the interrupt to hottest sensor. * Delete sensor-thres-temp property and read thermal_zone trips points replace of it. * Delete sensor-reset-temp property and define the fixed value replace of it. Changes v1-v2; * change patch's situation between binding document and driver file * clean up some regiser for enabling thermal sensor * use mutex lock to replace the spin lock kongxinwei (2): dt-bindings: Document the hi6220 thermal sensor bindings thermal: hisilicon: add new hisilicon thermal sensor driver .../bindings/thermal/hisilicon-thermal.txt | 45 ++ drivers/thermal/Kconfig| 8 + drivers/thermal/Makefile | 1 + drivers/thermal/hisi_thermal.c | 475 + 4 files changed, 529 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt create mode 100644 drivers/thermal/hisi_thermal.c -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/2] dt-bindings: Document the hi6220 thermal sensor bindings
From: kongxinwei kong.kongxin...@hisilicon.com
This adds documentation of device tree bindings for the
thermal sensor controller of hi6220 SoC.
Signed-off-by: Leo Yan leo@linaro.org
Signed-off-by: kongxinwei kong.kongxin...@hisilicon.com
---
.../bindings/thermal/hisilicon-thermal.txt | 45 ++
1 file changed, 45 insertions(+)
create mode 100644
Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
new file mode 100644
index 000..ceb6e2e
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
@@ -0,0 +1,45 @@
+* Hisilicon Thermal
+
+This driver is for hi6220 SoC which contain 4 thermal sensor.
+
+ 1. sensor 0: local sensor;
+ 2. sensor 1: remote sensor for ACPU cluster 1;
+ 3. sensor 2: remote sensor for ACPU cluster 2;
+ 4. sensor 3: remote sensor for GPU.
+
+Every sensor use one child node to represent it, so thermal sensor include
+parent node and four child node. The parent node describe common feature and
+child node describe private feature for thermal sensor;
+
+** Required properties :
+
+- compatible: hisilicon,tsensor.
+- reg: physical base address of thermal sensor and length of memory mapped
+ region.
+- interrupt: The interrupt number to the cpu. Defines the interrupt used
+ by SOCTHERM.
+- clock-names: Input clock name, should be 'thermal_clk'.
+- clocks: phandles for clock specified in clock-names property.
+- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description.
+
+** Required properties for child nodes :
+
+- hisilicon,tsensor-id: the index of thermal sensor and use it to distinguish
+ thermal sensor. For example: 0 stands for local sensor; 1 stands for
+ acpu1 sensor;
+
+Example :
+
+ tsensor: tsensor@0,f7030700 {
+ compatible = hisilicon,tsensor;
+ reg = 0x0 0xf7030700 0x0 0x1000;
+ interrupts = 0 7 0x4;
+ clocks = clock_sys HI6220_TSENSOR_CLK;
+ clock-names = thermal_clk;
+ #thermal-sensor-cells = 1;
+
+ local_sensor {
+ hisilicon,tsensor-id = 0;
+ }
+ ...
+ }
--
1.9.1
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[PATCH v2 2/2] thermal: hisilicon: add new hisilicon thermal sensor driver
From: kongxinwei kong.kongxin...@hisilicon.com
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.
Signed-off-by: Leo Yan leo@linaro.org
Signed-off-by: kongxinwei kong.kongxin...@hisilicon.com
---
drivers/thermal/Kconfig| 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/hisi_thermal.c | 475 +
3 files changed, 484 insertions(+)
create mode 100644 drivers/thermal/hisi_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index af40db0..81aee01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -136,6 +136,14 @@ config THERMAL_EMULATION
because userland can easily disable the thermal policy by simply
flooding this sysfs node with low temperature values.
+config HISI_THERMAL
+ tristate Hisilicon thermal driver
+ depends on ARCH_HISI CPU_THERMAL OF
+ help
+ Enable this to plug hisilicon's thermal sensor driver into the Linux
+ thermal framework. cpufreq is used as the cooling device to throttle
+ CPUs when the passive trip is crossed.
+
config IMX_THERMAL
tristate Temperature sensor driver for Freescale i.MX SoCs
depends on CPU_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index fa0dc48..08ae7ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL) += st/
obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
+obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c
new file mode 100644
index 000..c03d5c3
--- /dev/null
+++ b/drivers/thermal/hisi_thermal.c
@@ -0,0 +1,475 @@
+/*
+ * Hisilicon thermal sensor driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Copyright (c) 2014-2015 Linaro Limited.
+ *
+ * Xinwei Kong kong.kongxin...@hisilicon.com
+ * Leo Yan leo@linaro.org
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/cpu_cooling.h
+#include linux/cpufreq.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/init.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/kernel.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_device.h
+#include linux/platform_device.h
+#include linux/regmap.h
+#include linux/slab.h
+#include linux/thermal.h
+#include linux/types.h
+
+#include thermal_core.h
+
+#define TEMP0_LAG (0x0)
+#define TEMP0_TH (0x4)
+#define TEMP0_RST_TH (0x8)
+#define TEMP0_CFG (0xC)
+#define TEMP0_EN (0x10)
+#define TEMP0_INT_EN (0x14)
+#define TEMP0_INT_CLR (0x18)
+#define TEMP0_RST_MSK (0x1C)
+#define TEMP0_RAW_INT (0x20)
+#define TEMP0_MSK_INT (0x24)
+#define TEMP0_VALUE(0x28)
+
+#define HISI_TEMP_BASE (-60)
+#define HISI_TEMP_RESET(10)
+#define HISI_TEMP_PASSIVE (85000)
+
+#define HISI_MAX_SENSORS 4
+
+struct hisi_thermal_sensor {
+ struct hisi_thermal_data *thermal;
+ struct thermal_zone_device *tzd;
+ const struct thermal_trip *trip;
+
+ uint32_t id;
+ uint32_t thres_temp, reset_temp;
+};
+
+struct hisi_thermal_data {
+ struct mutex thermal_lock;
+ struct platform_device *pdev;
+ struct clk *clk;
+
+ int irq, irq_bind_sensor;
+ bool irq_enabled;
+
+ unsigned int sensors_num;
+ long sensor_temp[HISI_MAX_SENSORS];
+ struct hisi_thermal_sensor sensors[HISI_MAX_SENSORS];
+
+ void __iomem *regs;
+};
+
+/* in millicelsius */
+static inline int _step_to_temp(int step)
+{
+ /*
+* Every step equals (1 * 200) / 255 celsius, and finally
+* need convert to millicelsius.
+*/
+ return (HISI_TEMP_BASE + (step * 200 / 255)) * 1000;
+}
+
+static inline int _temp_to_step(int temp)
+{
+ return ((temp / 1000 - HISI_TEMP_BASE) * 255 / 200);
+}
+
+static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,
+struct hisi_thermal_sensor *sensor)
+{
+ int val;
+
+ mutex_lock(data-thermal_lock
Re: [PATCH v1 1/2] thermal: hisilicon: add new hisilicon thermal sensor driver
On 2015年03月28日 08:58, YiPing Xu wrote:
在 2015/3/27 16:30, Xinwei Kong 写道:
On 2015/3/26 17:14, YiPing Xu wrote:
在 2015/3/25 15:50, Xinwei Kong 写道:
From: kongxinwei
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.
Signed-off-by: Leo Yan
Signed-off-by: kongxinwei
---
drivers/thermal/Kconfig| 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/hisi_thermal.c | 526
+
3 files changed, 535 insertions(+)
create mode 100644 drivers/thermal/hisi_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index af40db0..81aee01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -136,6 +136,14 @@ config THERMAL_EMULATION
because userland can easily disable the thermal policy by
simply
flooding this sysfs node with low temperature values.
+config HISI_THERMAL
+tristate "Hisilicon thermal driver"
+depends on ARCH_HISI && CPU_THERMAL && OF
+help
+ Enable this to plug hisilicon's thermal sensor driver into
the Linux
+ thermal framework. cpufreq is used as the cooling device to
throttle
+ CPUs when the passive trip is crossed.
+
config IMX_THERMAL
tristate "Temperature sensor driver for Freescale i.MX SoCs"
depends on CPU_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index fa0dc48..08ae7ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL)+= ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL)+= st/
obj-$(CONFIG_TEGRA_SOCTHERM)+= tegra_soctherm.o
+obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/hisi_thermal.c
b/drivers/thermal/hisi_thermal.c
new file mode 100644
index 000..8edf83a
--- /dev/null
+++ b/drivers/thermal/hisi_thermal.c
are you sure all the SOCs in hisilicon use the same thermal IP ?
if not, this driver should not use the "hisi_" prefix.
We can use this hisi thermal driver framework to satisfy diff thermal
IP, all of SoC will use this drvier by adding a struct about diff IP.
We may talk about hisi thermal diff IP how to satisfy this driver.
Thanks
Xinwei
@@ -0,0 +1,526 @@
+/*
+ * Hisilicon thermal sensor driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Copyright (c) 2014-2015 Linaro Limited.
+ *
+ * Xinwei Kong
+ * Leo Yan
+ *
+ * This program is free software; you can redistribute it and/or
modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "thermal_core.h"
+
+#define TEMP0_LAG(0x0)
+#define TEMP0_TH(0x4)
+#define TEMP0_RST_TH(0x8)
+#define TEMP0_CFG(0xC)
+#define TEMP0_EN(0x10)
+#define TEMP0_INT_EN(0x14)
+#define TEMP0_INT_CLR(0x18)
+#define TEMP0_RST_MSK(0x1C)
+#define TEMP0_RAW_INT(0x20)
+#define TEMP0_MSK_INT(0x24)
+#define TEMP0_VALUE(0x28)
+
+#define HISI_TEMP_BASE(-60)
+#define HISI_TEMP_RESET(10)
+#define HISI_TEMP_PASSIVE(85000)
+
+#define HISI_MAX_SENSORS4
+
+struct hisi_thermal_sensor {
+struct hisi_thermal_data *thermal;
+struct thermal_zone_device *tzd;
+const struct thermal_trip *trip;
+
+uint32_t id;
+uint32_t thres_temp, reset_temp;
+};
+
+struct hisi_thermal_data {
+struct platform_device *pdev;
+struct clk *clk;
+
+int irq, irq_bind_sensor;
+bool irq_enabled;
+
+unsigned int sensors_num;
+long sensor_temp[HISI_MAX_SENSORS];
+struct hisi_thermal_sensor sensors[HISI_MAX_SENSORS];
+
+void __iomem *regs;
+};
+
+static DEFINE_SPINLOCK(thermal_lock);
+
"thermal_lock" should be defined in "hisi_thermal_data" to
support multi device instance.
ok,good comments
+/* in millicelsius */
+static inline int _step_to_temp(int step)
+{
+/*
+ * Every step equals (1 * 200) / 255 celsius, and finally
+ * need convert to millicelsius.
+ */
+return (HISI_TEMP_BASE + (step * 200 / 255)) * 1000;
+}
+
+static inline int _temp_to_step(int temp)
+{
+return ((temp / 1000 - HISI_TEMP_BASE) * 255 / 200);
+}
+
+static long his
Re: [PATCH v1 1/2] thermal: hisilicon: add new hisilicon thermal sensor driver
On 2015年03月28日 08:58, YiPing Xu wrote:
在 2015/3/27 16:30, Xinwei Kong 写道:
On 2015/3/26 17:14, YiPing Xu wrote:
在 2015/3/25 15:50, Xinwei Kong 写道:
From: kongxinwei
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.
Signed-off-by: Leo Yan
Signed-off-by: kongxinwei
---
drivers/thermal/Kconfig| 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/hisi_thermal.c | 526
+
3 files changed, 535 insertions(+)
create mode 100644 drivers/thermal/hisi_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index af40db0..81aee01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -136,6 +136,14 @@ config THERMAL_EMULATION
because userland can easily disable the thermal policy by
simply
flooding this sysfs node with low temperature values.
+config HISI_THERMAL
+tristate "Hisilicon thermal driver"
+depends on ARCH_HISI && CPU_THERMAL && OF
+help
+ Enable this to plug hisilicon's thermal sensor driver into
the Linux
+ thermal framework. cpufreq is used as the cooling device to
throttle
+ CPUs when the passive trip is crossed.
+
config IMX_THERMAL
tristate "Temperature sensor driver for Freescale i.MX SoCs"
depends on CPU_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index fa0dc48..08ae7ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL)+= ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL)+= st/
obj-$(CONFIG_TEGRA_SOCTHERM)+= tegra_soctherm.o
+obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/hisi_thermal.c
b/drivers/thermal/hisi_thermal.c
new file mode 100644
index 000..8edf83a
--- /dev/null
+++ b/drivers/thermal/hisi_thermal.c
are you sure all the SOCs in hisilicon use the same thermal IP ?
if not, this driver should not use the "hisi_" prefix.
We can use this hisi thermal driver framework to satisfy diff thermal
IP, all of SoC will use this drvier by adding a struct about diff IP.
We may talk about hisi thermal diff IP how to satisfy this driver.
Thanks
Xinwei
@@ -0,0 +1,526 @@
+/*
+ * Hisilicon thermal sensor driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Copyright (c) 2014-2015 Linaro Limited.
+ *
+ * Xinwei Kong
+ * Leo Yan
+ *
+ * This program is free software; you can redistribute it and/or
modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "thermal_core.h"
+
+#define TEMP0_LAG(0x0)
+#define TEMP0_TH(0x4)
+#define TEMP0_RST_TH(0x8)
+#define TEMP0_CFG(0xC)
+#define TEMP0_EN(0x10)
+#define TEMP0_INT_EN(0x14)
+#define TEMP0_INT_CLR(0x18)
+#define TEMP0_RST_MSK(0x1C)
+#define TEMP0_RAW_INT(0x20)
+#define TEMP0_MSK_INT(0x24)
+#define TEMP0_VALUE(0x28)
+
+#define HISI_TEMP_BASE(-60)
+#define HISI_TEMP_RESET(10)
+#define HISI_TEMP_PASSIVE(85000)
+
+#define HISI_MAX_SENSORS4
+
+struct hisi_thermal_sensor {
+struct hisi_thermal_data *thermal;
+struct thermal_zone_device *tzd;
+const struct thermal_trip *trip;
+
+uint32_t id;
+uint32_t thres_temp, reset_temp;
+};
+
+struct hisi_thermal_data {
+struct platform_device *pdev;
+struct clk *clk;
+
+int irq, irq_bind_sensor;
+bool irq_enabled;
+
+unsigned int sensors_num;
+long sensor_temp[HISI_MAX_SENSORS];
+struct hisi_thermal_sensor sensors[HISI_MAX_SENSORS];
+
+void __iomem *regs;
+};
+
+static DEFINE_SPINLOCK(thermal_lock);
+
"thermal_lock" should be defined in "hisi_thermal_data" to
support multi device instance.
ok,good comments
+/* in millicelsius */
+static inline int _step_to_temp(int step)
+{
+/*
+ * Every step equals (1 * 200) / 255 celsius, and finally
+ * need convert to millicelsius.
+ */
+return (HISI_TEMP_BASE + (step * 200 / 255)) * 1000;
+}
+
+static inline int _temp_to_step(int temp)
+{
+return ((temp / 1000 - HISI_TEMP_BASE) * 255 / 200);
+}
+
+static long his
Re: [PATCH v1 1/2] thermal: hisilicon: add new hisilicon thermal sensor driver
On 2015年03月28日 08:58, YiPing Xu wrote:
在 2015/3/27 16:30, Xinwei Kong 写道:
On 2015/3/26 17:14, YiPing Xu wrote:
在 2015/3/25 15:50, Xinwei Kong 写道:
From: kongxinwei kong.kongxin...@hisilicon.com
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.
Signed-off-by: Leo Yan leo@linaro.org
Signed-off-by: kongxinwei kong.kongxin...@hisilicon.com
---
drivers/thermal/Kconfig| 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/hisi_thermal.c | 526
+
3 files changed, 535 insertions(+)
create mode 100644 drivers/thermal/hisi_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index af40db0..81aee01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -136,6 +136,14 @@ config THERMAL_EMULATION
because userland can easily disable the thermal policy by
simply
flooding this sysfs node with low temperature values.
+config HISI_THERMAL
+tristate Hisilicon thermal driver
+depends on ARCH_HISI CPU_THERMAL OF
+help
+ Enable this to plug hisilicon's thermal sensor driver into
the Linux
+ thermal framework. cpufreq is used as the cooling device to
throttle
+ CPUs when the passive trip is crossed.
+
config IMX_THERMAL
tristate Temperature sensor driver for Freescale i.MX SoCs
depends on CPU_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index fa0dc48..08ae7ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL)+= ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL)+= st/
obj-$(CONFIG_TEGRA_SOCTHERM)+= tegra_soctherm.o
+obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/hisi_thermal.c
b/drivers/thermal/hisi_thermal.c
new file mode 100644
index 000..8edf83a
--- /dev/null
+++ b/drivers/thermal/hisi_thermal.c
are you sure all the SOCs in hisilicon use the same thermal IP ?
if not, this driver should not use the hisi_ prefix.
We can use this hisi thermal driver framework to satisfy diff thermal
IP, all of SoC will use this drvier by adding a struct about diff IP.
We may talk about hisi thermal diff IP how to satisfy this driver.
Thanks
Xinwei
@@ -0,0 +1,526 @@
+/*
+ * Hisilicon thermal sensor driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Copyright (c) 2014-2015 Linaro Limited.
+ *
+ * Xinwei Kong kong.kongxin...@hisilicon.com
+ * Leo Yan leo@linaro.org
+ *
+ * This program is free software; you can redistribute it and/or
modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/cpu_cooling.h
+#include linux/cpufreq.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/init.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/kernel.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_device.h
+#include linux/platform_device.h
+#include linux/regmap.h
+#include linux/slab.h
+#include linux/thermal.h
+#include linux/types.h
+
+#include thermal_core.h
+
+#define TEMP0_LAG(0x0)
+#define TEMP0_TH(0x4)
+#define TEMP0_RST_TH(0x8)
+#define TEMP0_CFG(0xC)
+#define TEMP0_EN(0x10)
+#define TEMP0_INT_EN(0x14)
+#define TEMP0_INT_CLR(0x18)
+#define TEMP0_RST_MSK(0x1C)
+#define TEMP0_RAW_INT(0x20)
+#define TEMP0_MSK_INT(0x24)
+#define TEMP0_VALUE(0x28)
+
+#define HISI_TEMP_BASE(-60)
+#define HISI_TEMP_RESET(10)
+#define HISI_TEMP_PASSIVE(85000)
+
+#define HISI_MAX_SENSORS4
+
+struct hisi_thermal_sensor {
+struct hisi_thermal_data *thermal;
+struct thermal_zone_device *tzd;
+const struct thermal_trip *trip;
+
+uint32_t id;
+uint32_t thres_temp, reset_temp;
+};
+
+struct hisi_thermal_data {
+struct platform_device *pdev;
+struct clk *clk;
+
+int irq, irq_bind_sensor;
+bool irq_enabled;
+
+unsigned int sensors_num;
+long sensor_temp[HISI_MAX_SENSORS];
+struct hisi_thermal_sensor sensors[HISI_MAX_SENSORS];
+
+void __iomem *regs;
+};
+
+static DEFINE_SPINLOCK(thermal_lock);
+
thermal_lock should be defined in hisi_thermal_data to
support multi device instance.
ok,good comments
+/* in millicelsius */
+static inline int _step_to_temp(int step)
+{
+/*
+ * Every step equals (1 * 200
Re: [PATCH v1 1/2] thermal: hisilicon: add new hisilicon thermal sensor driver
On 2015年03月28日 08:58, YiPing Xu wrote:
在 2015/3/27 16:30, Xinwei Kong 写道:
On 2015/3/26 17:14, YiPing Xu wrote:
在 2015/3/25 15:50, Xinwei Kong 写道:
From: kongxinwei kong.kongxin...@hisilicon.com
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.
Signed-off-by: Leo Yan leo@linaro.org
Signed-off-by: kongxinwei kong.kongxin...@hisilicon.com
---
drivers/thermal/Kconfig| 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/hisi_thermal.c | 526
+
3 files changed, 535 insertions(+)
create mode 100644 drivers/thermal/hisi_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index af40db0..81aee01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -136,6 +136,14 @@ config THERMAL_EMULATION
because userland can easily disable the thermal policy by
simply
flooding this sysfs node with low temperature values.
+config HISI_THERMAL
+tristate Hisilicon thermal driver
+depends on ARCH_HISI CPU_THERMAL OF
+help
+ Enable this to plug hisilicon's thermal sensor driver into
the Linux
+ thermal framework. cpufreq is used as the cooling device to
throttle
+ CPUs when the passive trip is crossed.
+
config IMX_THERMAL
tristate Temperature sensor driver for Freescale i.MX SoCs
depends on CPU_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index fa0dc48..08ae7ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_TI_SOC_THERMAL)+= ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL)+= st/
obj-$(CONFIG_TEGRA_SOCTHERM)+= tegra_soctherm.o
+obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/hisi_thermal.c
b/drivers/thermal/hisi_thermal.c
new file mode 100644
index 000..8edf83a
--- /dev/null
+++ b/drivers/thermal/hisi_thermal.c
are you sure all the SOCs in hisilicon use the same thermal IP ?
if not, this driver should not use the hisi_ prefix.
We can use this hisi thermal driver framework to satisfy diff thermal
IP, all of SoC will use this drvier by adding a struct about diff IP.
We may talk about hisi thermal diff IP how to satisfy this driver.
Thanks
Xinwei
@@ -0,0 +1,526 @@
+/*
+ * Hisilicon thermal sensor driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Copyright (c) 2014-2015 Linaro Limited.
+ *
+ * Xinwei Kong kong.kongxin...@hisilicon.com
+ * Leo Yan leo@linaro.org
+ *
+ * This program is free software; you can redistribute it and/or
modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/cpu_cooling.h
+#include linux/cpufreq.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/init.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/kernel.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_device.h
+#include linux/platform_device.h
+#include linux/regmap.h
+#include linux/slab.h
+#include linux/thermal.h
+#include linux/types.h
+
+#include thermal_core.h
+
+#define TEMP0_LAG(0x0)
+#define TEMP0_TH(0x4)
+#define TEMP0_RST_TH(0x8)
+#define TEMP0_CFG(0xC)
+#define TEMP0_EN(0x10)
+#define TEMP0_INT_EN(0x14)
+#define TEMP0_INT_CLR(0x18)
+#define TEMP0_RST_MSK(0x1C)
+#define TEMP0_RAW_INT(0x20)
+#define TEMP0_MSK_INT(0x24)
+#define TEMP0_VALUE(0x28)
+
+#define HISI_TEMP_BASE(-60)
+#define HISI_TEMP_RESET(10)
+#define HISI_TEMP_PASSIVE(85000)
+
+#define HISI_MAX_SENSORS4
+
+struct hisi_thermal_sensor {
+struct hisi_thermal_data *thermal;
+struct thermal_zone_device *tzd;
+const struct thermal_trip *trip;
+
+uint32_t id;
+uint32_t thres_temp, reset_temp;
+};
+
+struct hisi_thermal_data {
+struct platform_device *pdev;
+struct clk *clk;
+
+int irq, irq_bind_sensor;
+bool irq_enabled;
+
+unsigned int sensors_num;
+long sensor_temp[HISI_MAX_SENSORS];
+struct hisi_thermal_sensor sensors[HISI_MAX_SENSORS];
+
+void __iomem *regs;
+};
+
+static DEFINE_SPINLOCK(thermal_lock);
+
thermal_lock should be defined in hisi_thermal_data to
support multi device instance.
ok,good comments
+/* in millicelsius */
+static inline int _step_to_temp(int step)
+{
+/*
+ * Every step equals (1 * 200
