from:"fu . wei"

Re: [PATCH] clocksource: fix read and iounmap of incorrect variable

2017-06-09 Thread Fu Wei

Hi Frank,

On 10 June 2017 at 08:26,   wrote:
> From: Frank Rowand 
>
> Fix boot warning 'Trying to vfree() nonexistent vm area'
> from arch_timer_mem_of_init().
>
> Refactored code attempts to read and iounmap using address frame
> instead of address ioremap(frame->cntbase).
>
> Fixes: c389d701dfb70 ("clocksource: arm_arch_timer: split MMIO timer 
> probing.")
>
> Signed-off-by: Frank Rowand 

Reviewed-by: Fu Wei 

> ---
>
> WARNING: CPU: 0 PID: 0 at mm/vmalloc.c:1514 iounmap+0x14/0x18
> Trying to vfree() nonexistent vm area (ee821000)
> Modules linked in:
> CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.12.0-rc1-dirty #1
> Hardware name: Generic DT based system
> [] (unwind_backtrace) from [] (show_stack+0x10/0x14)
> [] (show_stack) from [] (dump_stack+0x6c/0x8c)
> [] (dump_stack) from [] (__warn+0xd0/0xf8)
> [] (__warn) from [] (warn_slowpath_fmt+0x38/0x48)
> [] (warn_slowpath_fmt) from [] (iounmap+0x14/0x18)
> [] (iounmap) from [] (arch_timer_mem_of_init+0x224/0x414)
> [] (arch_timer_mem_of_init) from [] 
> (clocksource_probe+0x44/0xa8)
> [] (clocksource_probe) from [] (start_kernel+0x228/0x3a0)
> [] (start_kernel) from [<0020807c>] (0x20807c)
>
>  drivers/clocksource/arm_arch_timer.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clocksource/arm_arch_timer.c 
> b/drivers/clocksource/arm_arch_timer.c
> index 4bed671e490e..8b5c30062d99 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -1209,9 +1209,9 @@ static int __init arch_timer_of_init(struct device_node 
> *np)
> return 0;
> }
>
> -   rate = readl_relaxed(frame + CNTFRQ);
> +   rate = readl_relaxed(base + CNTFRQ);
>
> -   iounmap(frame);
> +   iounmap(base);

Great thanks for your patch, this is a bug. So sorry for this typo.
It happened in my last v24 patchset: https://lkml.org/lkml/2017/4/14/363

Hope this fix can be merged ASAP.

>
> return rate;
>  }
> --
> Frank Rowand 
>



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [GIT PULL 00/16] clocksource: arm_arch_timer: GTDT-based MMIO timer support

2017-04-20 Thread Fu Wei

Hi Daniel, Lorenzo, Mark,


On 20 April 2017 at 16:26, Mark Rutland  wrote:
> On Wed, Apr 19, 2017 at 11:39:44PM +0200, Daniel Lezcano wrote:
>> On Wed, Apr 19, 2017 at 05:44:17PM +0100, Mark Rutland wrote:
>> > Hi Daniel,
>
>> > I realise this is a little late, but I would very much appreciate if you 
>> > could
>> > pull these arch timer GTDT patches for v4.12. The series has been largely 
>> > fine
>> > for a while now, and the major hold-ups were edge cases in error handling 
>> > which
>> > have now been addressed.
>
>> Hi Thomas,
>>
>> the series is ok for me. Is it possible to pull these changes directly in
>> tip/timers/core?
>
> The tip-bot tells me it was.
>
> Many thanks for picking these up, it's much appreciated.

Great thanks to all of you, I very appreciate all the help and
suggestion from you :-)

>
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

[PATCH v24 10/11] clocksource: arm_arch_timer: add GTDT support for memory-mapped timer

2017-04-14 Thread fu . wei

From: Fu Wei 

The patch add memory-mapped timer register support by using the
information provided by the new GTDT driver of ACPI.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
[Mark: verify CNTFRQ, only register the first frame]
Signed-off-by: Mark Rutland 
---
 drivers/clocksource/arm_arch_timer.c | 78 ++--
 1 file changed, 75 insertions(+), 3 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 05f2f7a..8981173 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -1385,10 +1385,78 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, 
"arm,armv7-timer-mem",
   arch_timer_mem_of_init);
 
 #ifdef CONFIG_ACPI_GTDT
-/* Initialize per-processor generic timer */
+static int __init
+arch_timer_mem_verify_cntfrq(struct arch_timer_mem *timer_mem)
+{
+   struct arch_timer_mem_frame *frame;
+   u32 rate;
+   int i;
+
+   for (i = 0; i < ARCH_TIMER_MEM_MAX_FRAMES; i++) {
+   frame = &timer_mem->frame[i];
+
+   if (!frame->valid)
+   continue;
+
+   rate = arch_timer_mem_frame_get_cntfrq(frame);
+   if (rate == arch_timer_rate)
+   continue;
+
+   pr_err(FW_BUG "CNTFRQ mismatch: frame @ %pa: (0x%08lx), CPU: 
(0x%08lx)\n",
+  &frame->cntbase,
+  (unsigned long)rate, (unsigned long)arch_timer_rate);
+
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
+static int __init arch_timer_mem_acpi_init(int platform_timer_count)
+{
+   struct arch_timer_mem *timers, *timer;
+   struct arch_timer_mem_frame *frame;
+   int timer_count, i, ret = 0;
+
+   timers = kcalloc(platform_timer_count, sizeof(*timers), GFP_KERNEL);
+   if (!timers)
+   return -ENOMEM;
+
+   ret = acpi_arch_timer_mem_init(timers, &timer_count);
+   if (ret || !timer_count)
+   goto out;
+
+   for (i = 0; i < timer_count; i++) {
+   ret = arch_timer_mem_verify_cntfrq(&timers[i]);
+   if (ret) {
+   pr_err("Disabling MMIO timers due to CNTFRQ 
mismatch\n");
+   goto out;
+   }
+   }
+
+   /*
+* While unlikely, it's theoretically possible that none of the frames
+* in a timer expose the combination of feature we want.
+*/
+   for (i = i; i < timer_count; i++) {
+   timer = &timers[i];
+
+   frame = arch_timer_mem_find_best_frame(timer);
+   if (frame)
+   break;
+   }
+
+   if (frame)
+   ret = arch_timer_mem_frame_register(frame);
+out:
+   kfree(timers);
+   return ret;
+}
+
+/* Initialize per-processor generic timer and memory-mapped timer(if present) 
*/
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
-   int ret;
+   int ret, platform_timer_count;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("already initialized, skipping\n");
@@ -1397,7 +1465,7 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
 
arch_timers_present |= ARCH_TIMER_TYPE_CP15;
 
-   ret = acpi_gtdt_init(table, NULL);
+   ret = acpi_gtdt_init(table, &platform_timer_count);
if (ret) {
pr_err("Failed to init GTDT table.\n");
return ret;
@@ -1440,6 +1508,10 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
if (ret)
return ret;
 
+   if (platform_timer_count &&
+   arch_timer_mem_acpi_init(platform_timer_count))
+   pr_err("Failed to initialize memory-mapped timer.\n");
+
return arch_timer_common_init();
 }
 CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
-- 
2.9.3

[PATCH v24 11/11] acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver

2017-04-14 Thread fu . wei

From: Fu Wei 

This driver adds support for parsing SBSA Generic Watchdog timer
in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT,
and creating a platform device with that information.

This allows the operating system to obtain device data from the
resource of platform device. The platform device named "sbsa-gwdt"
can be used by the ARM SBSA Generic Watchdog driver.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Tested-by: Xiongfeng Wang 
Reviewed-by: Lorenzo Pieralisi 
Signed-off-by: Mark Rutland 
---
 drivers/acpi/arm64/gtdt.c | 103 ++
 1 file changed, 103 insertions(+)

diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
index c9ef9c2..6ba47ea 100644
--- a/drivers/acpi/arm64/gtdt.c
+++ b/drivers/acpi/arm64/gtdt.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -60,6 +61,17 @@ static inline bool is_timer_block(void *platform_timer)
return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
 }
 
+static inline bool is_non_secure_watchdog(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+   struct acpi_gtdt_watchdog *wd = platform_timer;
+
+   if (gh->type != ACPI_GTDT_TYPE_WATCHDOG)
+   return false;
+
+   return !(wd->timer_flags & ACPI_GTDT_WATCHDOG_SECURE);
+}
+
 static int __init map_gt_gsi(u32 interrupt, u32 flags)
 {
int trigger, polarity;
@@ -299,3 +311,94 @@ int __init acpi_arch_timer_mem_init(struct arch_timer_mem 
*timer_mem,
 
return 0;
 }
+
+/*
+ * Initialize a SBSA generic Watchdog platform device info from GTDT
+ */
+static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd,
+   int index)
+{
+   struct platform_device *pdev;
+   int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags);
+
+   /*
+* According to SBSA specification the size of refresh and control
+* frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF).
+*/
+   struct resource res[] = {
+   DEFINE_RES_MEM(wd->control_frame_address, SZ_4K),
+   DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K),
+   DEFINE_RES_IRQ(irq),
+   };
+   int nr_res = ARRAY_SIZE(res);
+
+   pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n",
+wd->refresh_frame_address, wd->control_frame_address,
+wd->timer_interrupt, wd->timer_flags);
+
+   if (!(wd->refresh_frame_address && wd->control_frame_address)) {
+   pr_err(FW_BUG "failed to get the Watchdog base address.\n");
+   acpi_unregister_gsi(wd->timer_interrupt);
+   return -EINVAL;
+   }
+
+   if (irq <= 0) {
+   pr_warn("failed to map the Watchdog interrupt.\n");
+   nr_res--;
+   }
+
+   /*
+* Add a platform device named "sbsa-gwdt" to match the platform driver.
+* "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog
+* The platform driver can get device info below by matching this name.
+*/
+   pdev = platform_device_register_simple("sbsa-gwdt", index, res, nr_res);
+   if (IS_ERR(pdev)) {
+   acpi_unregister_gsi(wd->timer_interrupt);
+   return PTR_ERR(pdev);
+   }
+
+   return 0;
+}
+
+static int __init gtdt_sbsa_gwdt_init(void)
+{
+   void *platform_timer;
+   struct acpi_table_header *table;
+   int ret, timer_count, gwdt_count = 0;
+
+   if (acpi_disabled)
+   return 0;
+
+   if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0, &table)))
+   return -EINVAL;
+
+   /*
+* Note: Even though the global variable acpi_gtdt_desc has been
+* initialized by acpi_gtdt_init() while initializing the arch timers,
+* when we call this function to get SBSA watchdogs info from GTDT, the
+* pointers stashed in it are stale (since they are early temporary
+* mappings carried out before acpi_permanent_mmap is set) and we need
+* to re-initialize them with permanent mapped pointer values to let the
+* GTDT parsing possible.
+*/
+   ret = acpi_gtdt_init(table, &timer_count);
+   if (ret || !timer_count)
+   return ret;
+
+   for_each_platform_timer(platform_timer) {
+   if (is_non_secure_watchdog(platform_timer)) {
+   ret = gtdt_import_sbsa_gwdt(platform_timer, gwdt_count);
+   if (ret)
+   break;
+   gwdt_count++;
+   }
+   }
+
+   if (gwdt_count)
+   pr_info("found %d SBSA generic Watchdog(s).\n", gwdt_count);
+
+   return ret;
+}
+
+device_initcall(gtdt_sbsa_gwdt_init);
-- 
2.9.3

[PATCH v24 09/11] acpi/arm64: Add memory-mapped timer support in GTDT driver

2017-04-14 Thread fu . wei

From: Fu Wei 

On platforms booting with ACPI, architected memory-mapped timers'
configuration data is provided by firmware through the ACPI GTDT
static table.

The clocksource architected timer kernel driver requires a firmware
interface to collect timer configuration and configure its driver.
this infrastructure is present for device tree systems, but it is
missing on systems booting with ACPI.

Implement the kernel infrastructure required to parse the static
ACPI GTDT table so that the architected timer clocksource driver can
make use of it on systems booting with ACPI, therefore enabling
the corresponding timers configuration.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Signed-off-by: Mark Rutland 
---
 drivers/acpi/arm64/gtdt.c | 144 ++
 include/linux/acpi.h  |   1 +
 2 files changed, 145 insertions(+)

diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
index 3d95af8..c9ef9c2 100644
--- a/drivers/acpi/arm64/gtdt.c
+++ b/drivers/acpi/arm64/gtdt.c
@@ -13,6 +13,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -37,6 +38,28 @@ struct acpi_gtdt_descriptor {
 
 static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
 
+static inline void *next_platform_timer(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+
+   platform_timer += gh->length;
+   if (platform_timer < acpi_gtdt_desc.gtdt_end)
+   return platform_timer;
+
+   return NULL;
+}
+
+#define for_each_platform_timer(_g)\
+   for (_g = acpi_gtdt_desc.platform_timer; _g;\
+_g = next_platform_timer(_g))
+
+static inline bool is_timer_block(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+
+   return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
+}
+
 static int __init map_gt_gsi(u32 interrupt, u32 flags)
 {
int trigger, polarity;
@@ -155,3 +178,124 @@ int __init acpi_gtdt_init(struct acpi_table_header *table,
 
return 0;
 }
+
+static int __init gtdt_parse_timer_block(struct acpi_gtdt_timer_block *block,
+struct arch_timer_mem *timer_mem)
+{
+   int i;
+   struct arch_timer_mem_frame *frame;
+   struct acpi_gtdt_timer_entry *gtdt_frame;
+
+   if (!block->timer_count) {
+   pr_err(FW_BUG "GT block present, but frame count is zero.");
+   return -ENODEV;
+   }
+
+   if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) {
+   pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 
8\n",
+  block->timer_count);
+   return -EINVAL;
+   }
+
+   timer_mem->cntctlbase = (phys_addr_t)block->block_address;
+   /*
+* The CNTCTLBase frame is 4KB (register offsets 0x000 - 0xFFC).
+* See ARM DDI 0487A.k_iss10775, page I1-5129, Table I1-3
+* "CNTCTLBase memory map".
+*/
+   timer_mem->size = SZ_4K;
+
+   gtdt_frame = (void *)block + block->timer_offset;
+   if (gtdt_frame + block->timer_count != (void *)block + 
block->header.length)
+   return -EINVAL;
+
+   /*
+* Get the GT timer Frame data for every GT Block Timer
+*/
+   for (i = 0; i < block->timer_count; i++, gtdt_frame++) {
+   if (gtdt_frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)
+   continue;
+
+   if (!gtdt_frame->base_address || !gtdt_frame->timer_interrupt)
+   goto error;
+
+   frame = &timer_mem->frame[gtdt_frame->frame_number];
+   frame->phys_irq = map_gt_gsi(gtdt_frame->timer_interrupt,
+gtdt_frame->timer_flags);
+   if (frame->phys_irq <= 0) {
+   pr_warn("failed to map physical timer irq in frame 
%d.\n",
+   gtdt_frame->frame_number);
+   goto error;
+   }
+
+   if (gtdt_frame->virtual_timer_interrupt) {
+   frame->virt_irq =
+   map_gt_gsi(gtdt_frame->virtual_timer_interrupt,
+  gtdt_frame->virtual_timer_flags);
+   if (frame->virt_irq <= 0) {
+   pr_warn("failed to map virtual timer irq in 
frame %d.\n",
+   gtdt_frame->frame_number);
+   goto error;
+   }
+   } else {
+   frame->virt_irq = 0;
+   pr_debug("virtual timer in frame %d not implemented.\n",
+gtdt_frame->frame_number);
+   }
+
+

[PATCH v24 08/11] acpi: Introduce acpi_unregister_irq function

2017-04-14 Thread fu . wei

From: Fu Wei 

This patch introduces acpi_unregister_irq function to free a
linux IRQ number<->GSI mapping by a given linux IRQ number.

Even we have successfully registered the GSI, when some error occurs, we
may need to unmap it for freeing the IRQ resource. But in some cases, we
only have IRQ, but not GSI.

This patch is the preparation for memory-mapped timer support in GTDT
driver.

Signed-off-by: Fu Wei 
---
 drivers/acpi/irq.c   | 10 ++
 include/linux/acpi.h |  7 +++
 2 files changed, 17 insertions(+)

diff --git a/drivers/acpi/irq.c b/drivers/acpi/irq.c
index 830299a..59de777 100644
--- a/drivers/acpi/irq.c
+++ b/drivers/acpi/irq.c
@@ -85,6 +85,16 @@ void acpi_unregister_gsi(u32 gsi)
 EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
 
 /**
+ * acpi_unregister_irq() - Free a linux IRQ number<->GSI mapping
+ * @irq: linux IRQ number
+ */
+void acpi_unregister_irq(int irq)
+{
+   irq_dispose_mapping(irq);
+}
+EXPORT_SYMBOL_GPL(acpi_unregister_irq);
+
+/**
  * acpi_get_irq_source_fwhandle() - Retrieve fwhandle from IRQ resource source.
  * @source: acpi_resource_source to use for the lookup.
  *
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 4b5c146..728d1ed 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -336,6 +336,13 @@ extern int acpi_get_override_irq(u32 gsi, int *trigger, 
int *polarity);
  */
 void acpi_unregister_gsi (u32 gsi);
 
+/*
+ * This function undoes the effect of one call to acpi_register_gsi().
+ * The irq should be the return value of acpi_register_gsi().
+ * If the irq is valid, free a linux IRQ number<->GSI mapping.
+ */
+void acpi_unregister_irq(int irq);
+
 struct pci_dev;
 
 int acpi_pci_irq_enable (struct pci_dev *dev);
-- 
2.9.3

[PATCH v24 05/11] clocksource: arm_arch_timer: split MMIO timer probing.

2017-04-14 Thread fu . wei

From: Fu Wei 

Currently the code to probe MMIO architected timers mixes DT parsing with
actual poking of hardware. This makes the code harder than necessary to
understand, and makes it difficult to add support for probing via ACPI.

This patch splits the DT parsing from HW probing. The DT parsing now
lives in arch_timer_mem_of_init(), which fills in an arch_timer_mem
structure that it hands to probing functions that can be reused for ACPI
support.

Since the rate detection logic will be slight different when using ACPI,
the probing is performed as a number of steps. This results in more code
for the moment, and some arguably redundant work, but simplifies matters
considerably when ACPI support is added.

Signed-off-by: Fu Wei 
[Mark: refactor the probing split]
Signed-off-by: Mark Rutland 
---
 drivers/clocksource/arm_arch_timer.c | 186 +++
 1 file changed, 143 insertions(+), 43 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index e5e8708..dad0264 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -1197,18 +1197,37 @@ static int __init arch_timer_of_init(struct device_node 
*np)
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", 
arch_timer_of_init);
 CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", 
arch_timer_of_init);
 
-static int __init arch_timer_mem_init(struct device_node *np)
+static u32 __init
+arch_timer_mem_frame_get_cntfrq(struct arch_timer_mem_frame *frame)
 {
-   struct device_node *frame, *best_frame = NULL;
-   void __iomem *cntctlbase, *base;
-   unsigned int irq, ret = -EINVAL;
-   u32 cnttidr, rate;
+   void __iomem *base;
+   u32 rate;
 
-   arch_timers_present |= ARCH_TIMER_TYPE_MEM;
-   cntctlbase = of_iomap(np, 0);
+   base = ioremap(frame->cntbase, frame->size);
+   if (!base) {
+   pr_err("Unable to map frame @ %pa\n", &frame->cntbase);
+   return 0;
+   }
+
+   rate = readl_relaxed(frame + CNTFRQ);
+
+   iounmap(frame);
+
+   return rate;
+}
+
+static struct arch_timer_mem_frame * __init
+arch_timer_mem_find_best_frame(struct arch_timer_mem *timer_mem)
+{
+   struct arch_timer_mem_frame *frame, *best_frame = NULL;
+   void __iomem *cntctlbase;
+   u32 cnttidr;
+   int i;
+
+   cntctlbase = ioremap(timer_mem->cntctlbase, timer_mem->size);
if (!cntctlbase) {
-   pr_err("Can't find CNTCTLBase\n");
-   return -ENXIO;
+   pr_err("Can't map CNTCTLBase @ %pa\n", &timer_mem->cntctlbase);
+   return NULL;
}
 
cnttidr = readl_relaxed(cntctlbase + CNTTIDR);
@@ -1217,25 +1236,20 @@ static int __init arch_timer_mem_init(struct 
device_node *np)
 * Try to find a virtual capable frame. Otherwise fall back to a
 * physical capable frame.
 */
-   for_each_available_child_of_node(np, frame) {
-   int n;
-   u32 cntacr;
+   for (i = 0; i < ARCH_TIMER_MEM_MAX_FRAMES; i++) {
+   u32 cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT |
+CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT;
 
-   if (of_property_read_u32(frame, "frame-number", &n)) {
-   pr_err("Missing frame-number\n");
-   of_node_put(frame);
-   goto out;
-   }
+   frame = &timer_mem->frame[i];
+   if (!frame->valid)
+   continue;
 
/* Try enabling everything, and see what sticks */
-   cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT |
-CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT;
-   writel_relaxed(cntacr, cntctlbase + CNTACR(n));
-   cntacr = readl_relaxed(cntctlbase + CNTACR(n));
+   writel_relaxed(cntacr, cntctlbase + CNTACR(i));
+   cntacr = readl_relaxed(cntctlbase + CNTACR(i));
 
-   if ((cnttidr & CNTTIDR_VIRT(n)) &&
+   if ((cnttidr & CNTTIDR_VIRT(i)) &&
!(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) {
-   of_node_put(best_frame);
best_frame = frame;
arch_timer_mem_use_virtual = true;
break;
@@ -1244,45 +1258,131 @@ static int __init arch_timer_mem_init(struct 
device_node *np)
if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT))
continue;
 
-   of_node_put(best_frame);
-   best_frame = of_node_get(frame);
+   best_frame = frame;
}
 
-   ret= -ENXIO;
-   base = arch_counter_base = of_io_request_and_map(best_frame, 0,
-

[PATCH v24 07/11] clocksource: arm_arch_timer: simplify ACPI support code.

2017-04-14 Thread fu . wei

From: Fu Wei 

The patch update arm_arch_timer driver to use the function
provided by the new GTDT driver of ACPI.
By this way, arm_arch_timer.c can be simplified, and separate
all the ACPI GTDT knowledge from this timer driver.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Tested-by: Xiongfeng Wang 
Reviewed-by: Hanjun Guo 
Tested-by: Hanjun Guo 
Signed-off-by: Mark Rutland 
---
 drivers/clocksource/arm_arch_timer.c | 40 +---
 1 file changed, 10 insertions(+), 30 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index dad0264..05f2f7a 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -1384,53 +1384,33 @@ static int __init arch_timer_mem_of_init(struct 
device_node *np)
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
   arch_timer_mem_of_init);
 
-#ifdef CONFIG_ACPI
-static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags)
-{
-   int trigger, polarity;
-
-   if (!interrupt)
-   return 0;
-
-   trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
-   : ACPI_LEVEL_SENSITIVE;
-
-   polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
-   : ACPI_ACTIVE_HIGH;
-
-   return acpi_register_gsi(NULL, interrupt, trigger, polarity);
-}
-
+#ifdef CONFIG_ACPI_GTDT
 /* Initialize per-processor generic timer */
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
int ret;
-   struct acpi_table_gtdt *gtdt;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("already initialized, skipping\n");
return -EINVAL;
}
 
-   gtdt = container_of(table, struct acpi_table_gtdt, header);
-
arch_timers_present |= ARCH_TIMER_TYPE_CP15;
 
-   arch_timer_ppi[ARCH_TIMER_PHYS_SECURE_PPI] =
-   map_generic_timer_interrupt(gtdt->secure_el1_interrupt,
-   gtdt->secure_el1_flags);
+   ret = acpi_gtdt_init(table, NULL);
+   if (ret) {
+   pr_err("Failed to init GTDT table.\n");
+   return ret;
+   }
 
arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI] =
-   map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt,
-   gtdt->non_secure_el1_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_PHYS_NONSECURE_PPI);
 
arch_timer_ppi[ARCH_TIMER_VIRT_PPI] =
-   map_generic_timer_interrupt(gtdt->virtual_timer_interrupt,
-   gtdt->virtual_timer_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_VIRT_PPI);
 
arch_timer_ppi[ARCH_TIMER_HYP_PPI] =
-   map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
-   gtdt->non_secure_el2_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_HYP_PPI);
 
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
 
@@ -1451,7 +1431,7 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
}
 
/* Always-on capability */
-   arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
+   arch_timer_c3stop = acpi_gtdt_c3stop(arch_timer_uses_ppi);
 
/* Check for globally applicable workarounds */
arch_timer_check_ool_workaround(ate_match_acpi_oem_info, table);
-- 
2.9.3

[PATCH v24 06/11] acpi/arm64: Add GTDT table parse driver

2017-04-14 Thread fu . wei

From: Fu Wei 

This patch adds support for parsing arch timer info in GTDT,
provides some kernel APIs to parse all the PPIs and
always-on info in GTDT and export them.

By this driver, we can simplify arm_arch_timer drivers, and
separate the ACPI GTDT knowledge from it.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Acked-by: Rafael J. Wysocki 
Tested-by: Xiongfeng Wang 
Reviewed-by: Hanjun Guo 
Tested-by: Hanjun Guo 
Acked-by: Lorenzo Pieralisi 
Signed-off-by: Mark Rutland 
---
 arch/arm64/Kconfig  |   1 +
 drivers/acpi/arm64/Kconfig  |   3 +
 drivers/acpi/arm64/Makefile |   1 +
 drivers/acpi/arm64/gtdt.c   | 157 
 include/linux/acpi.h|   6 ++
 5 files changed, 168 insertions(+)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 3741859..7e2baec 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -2,6 +2,7 @@ config ARM64
def_bool y
select ACPI_CCA_REQUIRED if ACPI
select ACPI_GENERIC_GSI if ACPI
+   select ACPI_GTDT if ACPI
select ACPI_REDUCED_HARDWARE_ONLY if ACPI
select ACPI_MCFG if ACPI
select ACPI_SPCR_TABLE if ACPI
diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig
index 4616da4..5a6f80f 100644
--- a/drivers/acpi/arm64/Kconfig
+++ b/drivers/acpi/arm64/Kconfig
@@ -4,3 +4,6 @@
 
 config ACPI_IORT
bool
+
+config ACPI_GTDT
+   bool
diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile
index 72331f2..1017def 100644
--- a/drivers/acpi/arm64/Makefile
+++ b/drivers/acpi/arm64/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_ACPI_IORT)+= iort.o
+obj-$(CONFIG_ACPI_GTDT)+= gtdt.o
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
new file mode 100644
index 000..3d95af8
--- /dev/null
+++ b/drivers/acpi/arm64/gtdt.c
@@ -0,0 +1,157 @@
+/*
+ * ARM Specific GTDT table Support
+ *
+ * Copyright (C) 2016, Linaro Ltd.
+ * Author: Daniel Lezcano 
+ * Fu Wei 
+ * Hanjun Guo 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#undef pr_fmt
+#define pr_fmt(fmt) "ACPI GTDT: " fmt
+
+/**
+ * struct acpi_gtdt_descriptor - Store the key info of GTDT for all functions
+ * @gtdt:  The pointer to the struct acpi_table_gtdt of GTDT table.
+ * @gtdt_end:  The pointer to the end of GTDT table.
+ * @platform_timer:The pointer to the start of Platform Timer Structure
+ *
+ * The struct store the key info of GTDT table, it should be initialized by
+ * acpi_gtdt_init.
+ */
+struct acpi_gtdt_descriptor {
+   struct acpi_table_gtdt *gtdt;
+   void *gtdt_end;
+   void *platform_timer;
+};
+
+static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
+
+static int __init map_gt_gsi(u32 interrupt, u32 flags)
+{
+   int trigger, polarity;
+
+   trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
+   : ACPI_LEVEL_SENSITIVE;
+
+   polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
+   : ACPI_ACTIVE_HIGH;
+
+   return acpi_register_gsi(NULL, interrupt, trigger, polarity);
+}
+
+/**
+ * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
+ * @type:  the type of PPI.
+ *
+ * Note: Secure state is not managed by the kernel on ARM64 systems.
+ * So we only handle the non-secure timer PPIs,
+ * ARCH_TIMER_PHYS_SECURE_PPI is treated as invalid type.
+ *
+ * Return: the mapped PPI value, 0 if error.
+ */
+int __init acpi_gtdt_map_ppi(int type)
+{
+   struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
+
+   switch (type) {
+   case ARCH_TIMER_PHYS_NONSECURE_PPI:
+   return map_gt_gsi(gtdt->non_secure_el1_interrupt,
+ gtdt->non_secure_el1_flags);
+   case ARCH_TIMER_VIRT_PPI:
+   return map_gt_gsi(gtdt->virtual_timer_interrupt,
+ gtdt->virtual_timer_flags);
+
+   case ARCH_TIMER_HYP_PPI:
+   return map_gt_gsi(gtdt->non_secure_el2_interrupt,
+ gtdt->non_secure_el2_flags);
+   default:
+   pr_err("Failed to map timer interrupt: invalid type.\n");
+   }
+
+   return 0;
+}
+
+/**
+ * acpi_gtdt_c3stop() - Got c3stop info from GTDT according to the type of PPI.
+ * @type:  the type of PPI.
+ *
+ * Return: true if the timer HW state is lost when a CPU enters an idle state,
+ * false otherwise
+ */
+bool __init acpi_gtdt_c3stop(int type)
+{
+   struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
+
+   switch (type) {
+   case ARCH_TIMER_PHYS_NONSECURE_PPI:
+   return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
+
+   case ARCH_TIMER_VIRT_PPI:
+   ret

[PATCH v24 03/11] clocksource: arm_arch_timer: move arch_timer_needs_of_probing into DT init call

2017-04-14 Thread fu . wei

From: Fu Wei 

To cleanly split code paths specific to ACPI or DT at a higher level,
this patch removes arch_timer_init(), folding the relevant
parts of its logic into existing callers.

This paths the way for further rework, and saves a few lines.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
[Mark: reword commit message]
Signed-off-by: Mark Rutland 
---
 drivers/clocksource/arm_arch_timer.c | 46 
 1 file changed, 21 insertions(+), 25 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 03d71d6..e5e8708 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -1105,9 +1105,6 @@ static bool __init arch_timer_needs_of_probing(void)
 
 static int __init arch_timer_common_init(void)
 {
-   if (acpi_disabled && arch_timer_needs_of_probing())
-   return 0;
-
arch_timer_banner(arch_timers_present);
arch_counter_register(arch_timers_present);
return arch_timer_arch_init();
@@ -1145,26 +1142,9 @@ static enum arch_timer_ppi_nr __init 
arch_timer_select_ppi(void)
return ARCH_TIMER_PHYS_SECURE_PPI;
 }
 
-static int __init arch_timer_init(void)
-{
-   int ret;
-
-   ret = arch_timer_register();
-   if (ret)
-   return ret;
-
-   ret = arch_timer_common_init();
-   if (ret)
-   return ret;
-
-   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
-
-   return 0;
-}
-
 static int __init arch_timer_of_init(struct device_node *np)
 {
-   int i;
+   int i, ret;
u32 rate;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
@@ -1176,6 +1156,8 @@ static int __init arch_timer_of_init(struct device_node 
*np)
for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++)
arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
 
+   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
+
rate = arch_timer_get_cntfrq();
arch_timer_of_configure_rate(rate, np);
 
@@ -1203,7 +1185,14 @@ static int __init arch_timer_of_init(struct device_node 
*np)
arch_counter_suspend_stop = of_property_read_bool(np,
 
"arm,no-tick-in-suspend");
 
-   return arch_timer_init();
+   ret = arch_timer_register();
+   if (ret)
+   return ret;
+
+   if (arch_timer_needs_of_probing())
+   return 0;
+
+   return arch_timer_common_init();
 }
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", 
arch_timer_of_init);
 CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", 
arch_timer_of_init);
@@ -1285,7 +1274,8 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
if (ret)
goto out;
 
-   return arch_timer_common_init();
+   if (!arch_timer_needs_of_probing())
+   ret = arch_timer_common_init();
 out:
iounmap(cntctlbase);
of_node_put(best_frame);
@@ -1314,6 +1304,7 @@ static int __init map_generic_timer_interrupt(u32 
interrupt, u32 flags)
 /* Initialize per-processor generic timer */
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
+   int ret;
struct acpi_table_gtdt *gtdt;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
@@ -1341,6 +1332,8 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
gtdt->non_secure_el2_flags);
 
+   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
+
/*
 * When probing via ACPI, we have no mechanism to override the sysreg
 * CNTFRQ value. This *must* be correct.
@@ -1363,8 +1356,11 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
/* Check for globally applicable workarounds */
arch_timer_check_ool_workaround(ate_match_acpi_oem_info, table);
 
-   arch_timer_init();
-   return 0;
+   ret = arch_timer_register();
+   if (ret)
+   return ret;
+
+   return arch_timer_common_init();
 }
 CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
 #endif
-- 
2.9.3

[PATCH v24 04/11] clocksource: arm_arch_timer: add structs to describe MMIO timer

2017-04-14 Thread fu . wei

From: Fu Wei 

In preparation for ACPI GTDT support, this patch adds structs to
describe the MMIO timers indepedent of the firmware interface.

Subsequent patches will use these to split the FW/HW probing logic, so
that the HW probing logic can be shared by ACPI and DT.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
Signed-off-by: Mark Rutland 
---
 include/clocksource/arm_arch_timer.h | 16 
 1 file changed, 16 insertions(+)

diff --git a/include/clocksource/arm_arch_timer.h 
b/include/clocksource/arm_arch_timer.h
index 4a98c06..cc805b7 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -57,6 +57,8 @@ enum arch_timer_spi_nr {
 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
 #define ARCH_TIMER_MEM_VIRT_ACCESS 3
 
+#define ARCH_TIMER_MEM_MAX_FRAMES  8
+
 #define ARCH_TIMER_USR_PCT_ACCESS_EN   (1 << 0) /* physical counter */
 #define ARCH_TIMER_USR_VCT_ACCESS_EN   (1 << 1) /* virtual counter */
 #define ARCH_TIMER_VIRT_EVT_EN (1 << 2)
@@ -72,6 +74,20 @@ struct arch_timer_kvm_info {
int virtual_irq;
 };
 
+struct arch_timer_mem_frame {
+   bool valid;
+   phys_addr_t cntbase;
+   size_t size;
+   int phys_irq;
+   int virt_irq;
+};
+
+struct arch_timer_mem {
+   phys_addr_t cntctlbase;
+   size_t size;
+   struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES];
+};
+
 #ifdef CONFIG_ARM_ARCH_TIMER
 
 extern u32 arch_timer_get_rate(void);
-- 
2.9.3

[PATCH v24 02/11] clocksource: arm_arch_timer: refactor arch_timer_needs_probing

2017-04-14 Thread fu . wei

From: Fu Wei 

When booting with DT, it's possible for timer nodes to be probed in any
order. Some common initialisation needs to occur after all nodes have
been probed, and arch_timer_common_init() has code to detect when this
has happened.

This logic is DT-specific, and it would be best to factor it out of the
common code that will be shared with ACPI.

This patch folds this into the existing arch_timer_needs_probing(),
which is renamed to arch_timer_needs_of_probing(), and no longer takes
any arguments. This is only called when using DT, and not when using
ACPI, which will have a deterministic probe order.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
[Mark: reword commit message]
Signed-off-by: Mark Rutland 
---
 drivers/clocksource/arm_arch_timer.c | 34 +++---
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 0138b0c..03d71d6 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -1076,15 +1076,28 @@ static const struct of_device_id 
arch_timer_mem_of_match[] __initconst = {
{},
 };
 
-static bool __init
-arch_timer_needs_probing(int type, const struct of_device_id *matches)
+static bool __init arch_timer_needs_of_probing(void)
 {
struct device_node *dn;
bool needs_probing = false;
+   unsigned int mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
 
-   dn = of_find_matching_node(NULL, matches);
-   if (dn && of_device_is_available(dn) && !(arch_timers_present & type))
+   /* We have two timers, and both device-tree nodes are probed. */
+   if ((arch_timers_present & mask) == mask)
+   return false;
+
+   /*
+* Only one type of timer is probed,
+* check if we have another type of timer node in device-tree.
+*/
+   if (arch_timers_present & ARCH_TIMER_TYPE_CP15)
+   dn = of_find_matching_node(NULL, arch_timer_mem_of_match);
+   else
+   dn = of_find_matching_node(NULL, arch_timer_of_match);
+
+   if (dn && of_device_is_available(dn))
needs_probing = true;
+
of_node_put(dn);
 
return needs_probing;
@@ -1092,17 +1105,8 @@ arch_timer_needs_probing(int type, const struct 
of_device_id *matches)
 
 static int __init arch_timer_common_init(void)
 {
-   unsigned mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
-
-   /* Wait until both nodes are probed if we have two timers */
-   if ((arch_timers_present & mask) != mask) {
-   if (arch_timer_needs_probing(ARCH_TIMER_TYPE_MEM,
-arch_timer_mem_of_match))
-   return 0;
-   if (arch_timer_needs_probing(ARCH_TIMER_TYPE_CP15,
-arch_timer_of_match))
-   return 0;
-   }
+   if (acpi_disabled && arch_timer_needs_of_probing())
+   return 0;
 
arch_timer_banner(arch_timers_present);
arch_counter_register(arch_timers_present);
-- 
2.9.3

[PATCH v24 01/11] clocksource: arm_arch_timer: split dt-only rate handling

2017-04-14 Thread fu . wei

From: Fu Wei 

For historical reasons, rate detection when probing via DT is somewhat
convoluted. We tried to package this up in arch_timer_detect_rate(), but
with the addition of ACPI worse, and gets in the way of stringent rate
checking when ACPI is used.

This patch makes arch_timer_detect_rate() specific to DT, ripping out
ACPI logic. In preparation for rework of the MMIO timer probing, the
reading of the relevant CNTFRQ register is factored out to callers. The
function is then renamed to arch_timer_of_configure_rate(), which better
represents its new place in the world.

Comments are added in the DT and ACPI probe paths to explain this.

Signed-off-by: Fu Wei 
[Mark: reword commit message, TODO: rework comments]
Signed-off-by: Mark Rutland 
---
 drivers/clocksource/arm_arch_timer.c | 41 
 1 file changed, 23 insertions(+), 18 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 94de018..0138b0c 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -818,24 +818,19 @@ static int arch_timer_starting_cpu(unsigned int cpu)
return 0;
 }
 
-static void
-arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
+/*
+ * For historical reasons, when probing with DT we use whichever (non-zero)
+ * rate was probed first, and don't verify that others match. If the first node
+ * probed has a clock-frequency property, this overrides the HW register.
+ */
+static void arch_timer_of_configure_rate(u32 rate, struct device_node *np)
 {
/* Who has more than one independent system counter? */
if (arch_timer_rate)
return;
 
-   /*
-* Try to determine the frequency from the device tree or CNTFRQ,
-* if ACPI is enabled, get the frequency from CNTFRQ ONLY.
-*/
-   if (!acpi_disabled ||
-   of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) {
-   if (cntbase)
-   arch_timer_rate = readl_relaxed(cntbase + CNTFRQ);
-   else
-   arch_timer_rate = arch_timer_get_cntfrq();
-   }
+   if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
+   arch_timer_rate = rate;
 
/* Check the timer frequency. */
if (arch_timer_rate == 0)
@@ -1166,6 +1161,7 @@ static int __init arch_timer_init(void)
 static int __init arch_timer_of_init(struct device_node *np)
 {
int i;
+   u32 rate;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("multiple nodes in dt, skipping\n");
@@ -1176,7 +1172,8 @@ static int __init arch_timer_of_init(struct device_node 
*np)
for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++)
arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
 
-   arch_timer_detect_rate(NULL, np);
+   rate = arch_timer_get_cntfrq();
+   arch_timer_of_configure_rate(rate, np);
 
arch_timer_c3stop = !of_property_read_bool(np, "always-on");
 
@@ -1212,7 +1209,7 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
struct device_node *frame, *best_frame = NULL;
void __iomem *cntctlbase, *base;
unsigned int irq, ret = -EINVAL;
-   u32 cnttidr;
+   u32 cnttidr, rate;
 
arch_timers_present |= ARCH_TIMER_TYPE_MEM;
cntctlbase = of_iomap(np, 0);
@@ -1278,7 +1275,8 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
goto out;
}
 
-   arch_timer_detect_rate(base, np);
+   rate = readl(base + CNTFRQ);
+   arch_timer_of_configure_rate(rate, np);
ret = arch_timer_mem_register(base, irq);
if (ret)
goto out;
@@ -1339,8 +1337,15 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
gtdt->non_secure_el2_flags);
 
-   /* Get the frequency from CNTFRQ */
-   arch_timer_detect_rate(NULL, NULL);
+   /*
+* When probing via ACPI, we have no mechanism to override the sysreg
+* CNTFRQ value. This *must* be correct.
+*/
+   arch_timer_rate = arch_timer_get_cntfrq();
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "frequency not available.\n");
+   return -EINVAL;
+   }
 
arch_timer_uses_ppi = arch_timer_select_ppi();
if (!arch_timer_ppi[arch_timer_uses_ppi]) {
-- 
2.9.3

[PATCH v24 00/11] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-04-14 Thread fu . wei

From: Fu Wei 

This patchset:
(1)Preparation for adding GTDT support in arm_arch_timer:
1. Introduce a MMIO CNTFRQ helper.
2. separate out device-tree code from arch_timer_detect_rate
3. replace arch_timer_detect_rate with arch_timer_of_configure_rate
4. Refactor arch_timer_needs_probing, and move it into DT init call
5. Introduce some new structs and refactor the MMIO timer init code
for reusing some common code.

(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/gtdt.c
Parse all kinds of timer in GTDT table of ACPI:arch timer,
memory-mapped timer and SBSA Generic Watchdog timer.
This driver can help to simplify all the relevant timer drivers,
and separate all the ACPI GTDT knowledge from them.

(3)Simplify ACPI code for arm_arch_timer

(4)Add GTDT support for ARM memory-mapped timer.

This patchset has been tested on the following platforms with ACPI enabled:
(1)ARM Foundation v8 model

Changelog:
v24: https://lkml.org/lkml/2017/4/14/
 Mark Rutland:
 Rework comments
 Refactor the probing split
 Verify CNTFRQ:arch_timer_mem_verify_cntfrq
 Only register the first frame:arch_timer_mem_find_best_frame
 Fu Wei:
 Fetches from 
git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git arch-timer/gtdt
 Introduces acpi_unregister_irq function, and use it in 
drivers/acpi/arm64/gtdt.c

v23: https://lkml.org/lkml/2017/3/31/629
 Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
arch-timer/cleanup
 Improve the data struct of arch_timer_mem and arch_timer_mem_frame to
 improve the parser of GT blocks and arch_timer_mem initualization.
 Improve arch_timer_rate detection: sysreg frequency is primary in DT boot
 Improve some comments in GTDT parser driver.
 Improve acpi_gtdt_init function, and make a comment for the multiple calls.
 Improve the unwinding for the irq of timers, when an error occurs.
 Handle the case of virtual timer GSIV is 0.

v22: https://lkml.org/lkml/2017/3/21/523
 Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
arch-timer/cleanup
 Only Introduce arch_timer_mem_get_cntfrq to get the frequency from mmio.
 Merged patch 2,3(about arch_timer_detect_rate).
 Keep arch_timer_rate, do NOT split it for different types of timer.
 Improve  memory-mapped timer support by comments and variable name:
 data-->timer_mem
 frame-->gtdt_frame
 Delete zero check for SBSA watchdog irq.
 Skip secure SBSA watchdog in GTDT driver.
 Delete Kconfig modification for SBSA watchdog driver.
 Delete no_irq, using nr_res instead.

v21: https://lkml.org/lkml/2017/2/6/734
 Introduce two functions to get the frequency from mmio and sysreg.
 Remove arch_timer_detect_rate use arch_timer_get_*_freq directly
 Split arch_timer_rate for different types of timer.
 Skip secure timer frame in GTDT driver.
 Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
arch-timer/cleanup
 (The first 6 patches in v20 have been merged into arch-timer/cleanup 
branch)

v20: https://lkml.org/lkml/2017/1/18/534
 Reorder the first 4 patches and split the 4th patches.
 Leave CNTHCTL_* as they originally were.
 Fix the bug in arch_timer_select_ppi.
 Split "Rework counter frequency detection" patch.
 Rework the arch_timer_detect_rate function.
 Improve the commit message of "Refactor MMIO timer probing".
 Rebase to 4.10.0-rc4

v19: https://lkml.org/lkml/2016/12/21/25
 Fix a '\n' missing in a error message in arch_timer_mem_init.
 Add "request_mem_region" for ioremapping cntbase, according to
 f947ee1 clocksource/drivers/arm_arch_timer: Map frame with 
of_io_request_and_map()
 Rebase to 4.9.0-gfb779ff

v18: https://lkml.org/lkml/2016/12/8/446
 Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init.
 Rebase to 4.9.0-rc8-g9269898

v17: https://lkml.org/lkml/2016/11/25/140
 Take out some cleanups from 4/15.
 Merge 5/15 and 6/15, improve PPI determination code,
 improve commit message.
 Rework counter frequency detection.
 Move arch_timer_needs_of_probing into DT init call.
 Move Platform Timer scan loop back to timer init call to avoid allocating
 and free memory.
 Improve all the exported functions' comment.

v16: https://lkml.org/lkml/2016/11/16/268
 Fix patchset problem about static enum ppi_nr of 01/13 in v15.
 Refactor arch_timer_detect_rate.
 Refactor arch_timer_needs_probing.

v15: https://lkml.org/lkml/2016/11/15/366
 Re-order patches
 Add arm_arch_timer refactoring patches to prepare for GTDT:
 1. rename some  enums and defines, and some cleanups
 2. separate out arch_timer_uses_ppi init code and fix a potential bug
 3. Improve some new structs, refact

Re: [PATCH v23 09/11] acpi/arm64: Add memory-mapped timer support in GTDT driver

2017-04-06 Thread Fu Wei

Hi Mark,

On 7 April 2017 at 01:52, Mark Rutland  wrote:
> On Fri, Apr 07, 2017 at 01:39:09AM +0800, Fu Wei wrote:
>> On 7 April 2017 at 01:24, Mark Rutland  wrote:
>> > On Fri, Apr 07, 2017 at 12:47:47AM +0800, Fu Wei wrote:
>> >> On 6 April 2017 at 02:38, Mark Rutland  wrote:
>> >> > On Sat, Apr 01, 2017 at 01:51:03AM +0800, fu@linaro.org wrote:
>
>> > However, I would prefer to simplify this such that we only free the
>> > IRQs in the error path.
>> >
>> > We should be able to iterate over all freams, freeing any non-zero
>> > interrupt, since !valid frames shouldn't have non-zero interrupts.
>>
>> Yes, that is what I am doing :
>>
>>  if (!frame->valid)
>>   continue;
>
> What I meant was that we won't look at the frame->valid flag at all;
> only the interrupts. e.g.
>
> for (int i = 0; i < ARCH_TIMER_MEM_MAX_FRAMES; i++) {
> if (frame->phys_irq > 0)
> free_the_phys_irq_somehow();
> if (frame->virt_irq > 0)
> free_the_virt_irq_somehow();
> }

Since we use "kcalloc" to allocate struct arch_timer_mem, this should be OK.

>
> ... where we somehow figure out the GSI, or we introduce an api like
> unregister_gsi_for_irq(irq).

Yes, If you are OK with introducing a new API , this problem is solved :-)

>
> Since the !valid frames should all have zero for their interrupt fields,
> no special handling is necessary.
>
> That way, we only free the IRQs in one place, it's obvious that we
> consistently free all of them, etc.
>
>> Lorenzo addressed the API issue, we may can fix it by getting GSI info
>> from DT, then register it until we figure the best frame.
>> It may need some big change in DT code
>
> I'd prefer to keep this constrained to the ACPI code. ;)
>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v23 09/11] acpi/arm64: Add memory-mapped timer support in GTDT driver

2017-04-06 Thread Fu Wei

Hi Mark

On 7 April 2017 at 01:24, Mark Rutland  wrote:
> On Fri, Apr 07, 2017 at 12:47:47AM +0800, Fu Wei wrote:
>> On 6 April 2017 at 02:38, Mark Rutland  wrote:
>> > On Sat, Apr 01, 2017 at 01:51:03AM +0800, fu@linaro.org wrote:
>> >> + /*
>> >> +  * Get the GT timer Frame data for every GT Block Timer
>> >> +  */
>> >> + for (i = 0; i < block->timer_count; i++, gtdt_frame++) {
>> >> + if (gtdt_frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)
>> >> + continue;
>> >> +
>> >> + if (!gtdt_frame->base_address || 
>> >> !gtdt_frame->timer_interrupt)
>> >> + goto error;
>> >> +
>> >> + frame = &timer_mem->frame[gtdt_frame->frame_number];
>> >> + frame->phys_irq = map_gt_gsi(gtdt_frame->timer_interrupt,
>> >> +  gtdt_frame->timer_flags);
>> >> + if (frame->phys_irq <= 0) {
>> >> + pr_warn("failed to map physical timer irq in frame 
>> >> %d.\n",
>> >> + gtdt_frame->frame_number);
>> >> + goto error;
>> >> + }
>> >> +
>> >> + if (gtdt_frame->virtual_timer_interrupt) {
>> >> + frame->virt_irq =
>> >> + 
>> >> map_gt_gsi(gtdt_frame->virtual_timer_interrupt,
>> >> +gtdt_frame->virtual_timer_flags);
>> >> + if (frame->virt_irq <= 0) {
>> >> + pr_warn("failed to map virtual timer irq in 
>> >> frame %d.\n",
>> >> + gtdt_frame->frame_number);
>> >> + 
>> >> acpi_unregister_gsi(gtdt_frame->timer_interrupt);
>> >> + goto error;
>> >> + }
>> >> + } else {
>> >> + frame->virt_irq = 0;
>> >> + pr_debug("virtual timer in frame %d not 
>> >> implemented.\n",
>> >> +  gtdt_frame->frame_number);
>> >> + }
>> >> +
>> >> + frame->cntbase = gtdt_frame->base_address;
>> >> + /*
>> >> +  * The CNTBaseN frame is 4KB (register offsets 0x000 - 
>> >> 0xFFC).
>> >> +  * See ARM DDI 0487A.k_iss10775, page I1-5130, Table I1-4
>> >> +  * "CNTBaseN memory map".
>> >> +  */
>> >> + frame->size = SZ_4K;
>> >> + frame->valid = true;
>> >> + }
>> >> +
>> >> + return 0;
>> >> +
>> >> +error:
>> >> + for (i = 0; i < ARCH_TIMER_MEM_MAX_FRAMES; i++) {
>> >> + frame = &timer_mem->frame[i];
>> >> + if (!frame->valid)
>> >> + continue;
>> >> + irq_dispose_mapping(frame->phys_irq);
>> >> + if (frame->virt_irq)
>> >> + irq_dispose_mapping(frame->virt_irq);
>> >> + }
>> >
>> > We assign interrupts and may goto error before setting valid, so here we
>>
>> yes, I mean to do it.(setting valid at the end of loop)
>>
>> > won't free the interrupts of the last frame we parsed.
>>
>> that won't  be a problem, we may assign two interrupts in a round:
>> First of all, if  the assignment goes  wrong, that means the current
>> interrupt haven't been successfully assigned.
>> (1)if the first goes wrong, the we goto error to unwind  the irqs
>> assigned in previous rounds.
>> (2)if the second one goes wrong , we acpi_unregister_gsi the first one
>> and then  goto error to unwind  the irqs assigned in previous rounds.
>> (3)If the two assignments are successful, set up valid flag
>>
>> So we won't miss freeing the interrupts of the last frame we parsed.
>>
>> Did I miss something?
>
> No; you are correct, and I was mistaken.
>
> However, I would prefer to simplify this such that we only free the
> IRQs in the error path.
>
> We should be able to iterate over all freams, freeing any non-zero
> interrupt, since !valid frames shouldn't have non-zero interrupts.

Yes, that is what I am doing :

 if (!frame->valid)
  continue;

phys_irq must be non-zero, otherwise it was registered incorrectly (an error)
but we need to check virt_irq, it maybe 0 because, this timer frame
may not implement virt timer.
Can we simplify it? any idear?

Lorenzo addressed the API issue, we may can fix it by getting GSI info
from DT, then register it until we figure the best frame.
It may need some big change in DT code

I can do it in V24 , any thought?

Great thanks for your review and help! :-)

>
> I can make that update locally; no need to respin.
>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v23 09/11] acpi/arm64: Add memory-mapped timer support in GTDT driver

2017-04-06 Thread Fu Wei

Hi Lorenzo,

On 3 April 2017 at 18:45, Lorenzo Pieralisi  wrote:
> On Sat, Apr 01, 2017 at 01:51:03AM +0800, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> On platforms booting with ACPI, architected memory-mapped timers'
>> configuration data is provided by firmware through the ACPI GTDT
>> static table.
>>
>> The clocksource architected timer kernel driver requires a firmware
>> interface to collect timer configuration and configure its driver.
>> this infrastructure is present for device tree systems, but it is
>> missing on systems booting with ACPI.
>>
>> Implement the kernel infrastructure required to parse the static
>> ACPI GTDT table so that the architected timer clocksource driver can
>> make use of it on systems booting with ACPI, therefore enabling
>> the corresponding timers configuration.
>>
>> Signed-off-by: Fu Wei 
>> Signed-off-by: Hanjun Guo 
>> ---
>>  drivers/acpi/arm64/gtdt.c | 146 
>> ++
>>  include/linux/acpi.h  |   1 +
>>  2 files changed, 147 insertions(+)
>>
>> diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
>> index 3d95af8..3dd33f3 100644
>> --- a/drivers/acpi/arm64/gtdt.c
>> +++ b/drivers/acpi/arm64/gtdt.c
>> @@ -13,6 +13,7 @@
>>
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>
>>  #include 
>> @@ -37,6 +38,28 @@ struct acpi_gtdt_descriptor {
>>
>>  static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
>>
>> +static inline void *next_platform_timer(void *platform_timer)
>> +{
>> + struct acpi_gtdt_header *gh = platform_timer;
>> +
>> + platform_timer += gh->length;
>> + if (platform_timer < acpi_gtdt_desc.gtdt_end)
>> + return platform_timer;
>> +
>> + return NULL;
>> +}
>> +
>> +#define for_each_platform_timer(_g)  \
>> + for (_g = acpi_gtdt_desc.platform_timer; _g;\
>> +  _g = next_platform_timer(_g))
>> +
>> +static inline bool is_timer_block(void *platform_timer)
>> +{
>> + struct acpi_gtdt_header *gh = platform_timer;
>> +
>> + return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
>> +}
>> +
>>  static int __init map_gt_gsi(u32 interrupt, u32 flags)
>>  {
>>   int trigger, polarity;
>> @@ -155,3 +178,126 @@ int __init acpi_gtdt_init(struct acpi_table_header 
>> *table,
>>
>>   return 0;
>>  }
>> +
>> +static int __init gtdt_parse_timer_block(struct acpi_gtdt_timer_block 
>> *block,
>> +  struct arch_timer_mem *timer_mem)
>> +{
>> + int i;
>> + struct arch_timer_mem_frame *frame;
>> + struct acpi_gtdt_timer_entry *gtdt_frame;
>> +
>> + if (!block->timer_count) {
>> + pr_err(FW_BUG "GT block present, but frame count is zero.");
>> + return -ENODEV;
>> + }
>> +
>> + if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) {
>> + pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 
>> 8\n",
>> +block->timer_count);
>> + return -EINVAL;
>> + }
>> +
>> + timer_mem->cntctlbase = (phys_addr_t)block->block_address;
>> + /*
>> +  * The CNTCTLBase frame is 4KB (register offsets 0x000 - 0xFFC).
>> +  * See ARM DDI 0487A.k_iss10775, page I1-5129, Table I1-3
>> +  * "CNTCTLBase memory map".
>> +  */
>> + timer_mem->size = SZ_4K;
>> +
>> + gtdt_frame = (void *)block + block->timer_offset;
>> + if (gtdt_frame + block->timer_count != (void *)block + 
>> block->header.length)
>> + return -EINVAL;
>> +
>> + /*
>> +  * Get the GT timer Frame data for every GT Block Timer
>> +  */
>> + for (i = 0; i < block->timer_count; i++, gtdt_frame++) {
>> + if (gtdt_frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)
>> + continue;
>> +
>> + if (!gtdt_frame->base_address || !gtdt_frame->timer_interrupt)
>> + goto error;
>> +
>> + frame = &timer_mem->frame[gtdt_frame->frame_number];
>> + frame->phys_irq = map_gt_gsi(gtdt_frame->timer_interrupt,
>> +  gtdt_frame->timer_flags);
>> + if (frame->ph

Re: [PATCH v23 09/11] acpi/arm64: Add memory-mapped timer support in GTDT driver

2017-04-06 Thread Fu Wei

t *timer_count)
>> +{
>> + int ret;
>> + void *platform_timer;
>> +
>> + *timer_count = 0;
>> + for_each_platform_timer(platform_timer) {
>> + if (is_timer_block(platform_timer)) {
>> + ret = gtdt_parse_timer_block(platform_timer, 
>> timer_mem);
>> + if (ret)
>> + return ret;
>> + timer_mem++;
>> + (*timer_count)++;
>> + }
>> + }
>
> If we were to have multiple GT blocks, this would leave timer_mem in an
> inconsistent state. In gtdt_parse_timer_block we'll blat any existing
> timer_mem->cntctlbase, and blat some arbitrary set of frames. however,
> *some* frames may have been held over from a previous iteration.
>
> My understanding was that the system level timer had a single CNTCTLBase
> frame, and hence we should only have a single GT block.
>
> Judging by ARM DDI 0487A.k_iss10775, I1.3 "Memory-mapped timer
> components" and I3.4 "Generic Timer memory-mapped registers overview",
> it does appear that the system should only have one CNTCTLBase frame.
>
> What's going on here?
>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v23 06/11] clocksource: arm_arch_timer: refactor MMIO timer probing.

2017-04-06 Thread Fu Wei

Hi Mark,

On 6 April 2017 at 02:42, Mark Rutland  wrote:
> On Sat, Apr 01, 2017 at 01:51:00AM +0800, fu@linaro.org wrote:
>> + arch_timer_mem_freq = arch_timer_mem_get_cntfrq(base);
>> + if (!arch_timer_rate && arch_timer_mem_freq) {
>> + arch_timer_rate = arch_timer_mem_freq;
>> + } else if (!arch_timer_rate || arch_timer_rate != arch_timer_mem_freq) 
>> {
>> + pr_err(FW_BUG "invalid MMIO frequency.\n");
>> + iounmap(base);
>> + return -EINVAL;
>> + }
>
> I thought I had previously mentioned that this last check has the
> potential to break DT systems, which may be inadvertently relying on the
> probe order.
>
> I agree we must do this check for ACPI, but I think that for DT it needs
> to be relaxed.
>
> I'm happy to rework that locally, if you can address my comments on
> patch 9.

yes, you suggested that we keep the current frequency probing approach for DT,
and use the new approach for ACPI.

Because we try to merge the common code for MMIO timer. this become a little
problem, sorry for that.

I thinks for this code, maybe we can do :

arch_timer_mem_freq = arch_timer_mem_get_cntfrq(base);
if (!arch_timer_rate && arch_timer_mem_freq) {
arch_timer_rate = arch_timer_mem_freq;
} else if (!acpi_disabled && arch_timer_rate != arch_timer_mem_freq) {
pr_err(FW_BUG "invalid MMIO frequency.\n");
iounmap(base);
return -EINVAL;
}

Please correct me, if I miss something.

Thanks :-)

>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v23 00/11] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-03-31 Thread Fu Wei

Hi Xiongfeng Wang,

On 1 April 2017 at 10:14, Xiongfeng Wang  wrote:
>
>
> On 2017/4/1 1:50, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> This patchset:
>> (1)Preparation for adding GTDT support in arm_arch_timer:
>> 1. Introduce a MMIO CNTFRQ helper.
>> 2. separate out device-tree code from arch_timer_detect_rate
>> 3. remove arch_timer_detect_rate use arch_timer_*get_cntfrq directly
>> 4. Refactor arch_timer_needs_probing, and move it into DT init call
>> 5. Introduce some new structs and refactor the MMIO timer init code
>> for reusing some common code.
>>
>> (2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c
>> Parse all kinds of timer in GTDT table of ACPI:arch timer,
>> memory-mapped timer and SBSA Generic Watchdog timer.
>> This driver can help to simplify all the relevant timer drivers,
>> and separate all the ACPI GTDT knowledge from them.
>>
>> (3)Simplify ACPI code for arm_arch_timer
>>
>> (4)Add GTDT support for ARM memory-mapped timer.
>>
>> This patchset has been tested on the following platforms with ACPI enabled:
>> (1)ARM Foundation v8 model
>>
>
> for arm_arch_timer(not memory-mapped) and sbsa watchdog part,  Tested-by: 
> wangxiongfe...@huawei.com

Great thanks for your testing :-)

>
>
>
>
>
> Thanks,
>
> Wang Xiongfeng
> .
>
>> Changelog:
>> v23: https://lkml.org/lkml/2017/3/31/
>>  Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
>> arch-timer/cleanup
>>  Improve the data struct of arch_timer_mem and arch_timer_mem_frame to
>>  improve the parser of GT blocks and arch_timer_mem initualization.
>>  Improve arch_timer_rate detection: sysreg frequency is primary in DT 
>> boot
>>  Improve some comments in GTDT parser driver.
>>  Improve acpi_gtdt_init function, and make a comment for the multiple 
>> calls.
>>  Improve the unwinding for the irq of timers, when an error occurs.
>>  Handle the case of virtual timer GSIV is 0.
>>
>> v22: https://lkml.org/lkml/2017/3/21/523
>>  Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
>> arch-timer/cleanup
>>  Only Introduce arch_timer_mem_get_cntfrq to get the frequency from mmio.
>>  Merged patch 2,3(about arch_timer_detect_rate).
>>  Keep arch_timer_rate, do NOT split it for different types of timer.
>>  Improve  memory-mapped timer support by comments and variable name:
>>  data-->timer_mem
>>  frame-->gtdt_frame
>>  Delete zero check for SBSA watchdog irq.
>>  Skip secure SBSA watchdog in GTDT driver.
>>  Delete Kconfig modification for SBSA watchdog driver.
>>  Delete no_irq, using nr_res instead.
>>
>> v21: https://lkml.org/lkml/2017/2/6/734
>>  Introduce two functions to get the frequency from mmio and sysreg.
>>  Remove arch_timer_detect_rate use arch_timer_get_*_freq directly
>>  Split arch_timer_rate for different types of timer.
>>  Skip secure timer frame in GTDT driver.
>>  Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
>> arch-timer/cleanup
>>  (The first 6 patches in v20 have been merged into arch-timer/cleanup 
>> branch)
>>
>> v20: https://lkml.org/lkml/2017/1/18/534
>>  Reorder the first 4 patches and split the 4th patches.
>>  Leave CNTHCTL_* as they originally were.
>>  Fix the bug in arch_timer_select_ppi.
>>  Split "Rework counter frequency detection" patch.
>>  Rework the arch_timer_detect_rate function.
>>  Improve the commit message of "Refactor MMIO timer probing".
>>  Rebase to 4.10.0-rc4
>>
>> v19: https://lkml.org/lkml/2016/12/21/25
>>  Fix a '\n' missing in a error message in arch_timer_mem_init.
>>  Add "request_mem_region" for ioremapping cntbase, according to
>>  f947ee1 clocksource/drivers/arm_arch_timer: Map frame with 
>> of_io_request_and_map()
>>  Rebase to 4.9.0-gfb779ff
>>
>> v18: https://lkml.org/lkml/2016/12/8/446
>>  Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init.
>>  Rebase to 4.9.0-rc8-g9269898
>>
>> v17: https://lkml.org/lkml/2016/11/25/140
>>  Take out some cleanups from 4/15.
>>  Merge 5/15 and 6/15, improve PPI determination code,
>>  improve commit message.
>>  Rework counter frequency detection.
>>  Move arch_timer_need

Re: [PATCH v22 00/11] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-03-31 Thread Fu Wei

Hi Mark,

On 28 March 2017 at 22:53, Mark Rutland  wrote:
> Hi,
>
> On Tue, Mar 28, 2017 at 10:29:10PM +0800, Fu Wei wrote:
>> On 28 March 2017 at 21:05, Mark Rutland  wrote:
>> > Sorry for the delay; I have not had the time to focus on this as I would
>> > like to. I'm happy with patches 1-4, but from patch 5 onwards, there's
>> > one change I'd like to see.
>> >
>> > I'd prefer that mmio timer frame rame N was always stored at
>> > arch_timer_mem::frame[N], rather than arch_timer_mem::frame[] being in
>> > an arbitrary order. That will make arch_timer_mem_frame::frame_nr
>> > redundant.
>> >
>> > To allow arch_timer_mem::frame[] this to be sparse, I'm happy to have a
>> > bool arch_timer_mem_frame::valid field that we set when probing each
>> > frame. Then we don't need arch_timer_mem::num_frames.
>> >
>> > This will make iterating over the frames far less confusing, and makes
>> > it simple to detect when a frame number is erroneously reused.
>> >
>> > Otherwise, I'm largely happy to pick the rest and apply any fixups
>> > myself.
>>
>> Great thanks for your feedback!
>> I will follow your suggestion to improve my patches, then post it in a day.
>
> Thanks, that is much appreciated.
>
>> So I will rebase my patchset on arch-timer/gtdt branch of your REPO
>> https://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git/log/?h=arch-timer/gtdt
>
> Yes please! The current HEAD should be:
>
> ebbfe8889cffa12f ("clocksource: arm_arch_timer: move 
> arch_timer_needs_of_probing into DT init call").

Because there are some improvements on the first 4 patches, so I
fetched your gtdt branch, then rebase my v23  to the
arch-timer/cleanup

Thanks for your help! :-)

>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

[PATCH v23 11/11] acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver

2017-03-31 Thread fu . wei

From: Fu Wei 

This driver adds support for parsing SBSA Generic Watchdog timer
in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT,
and creating a platform device with that information.

This allows the operating system to obtain device data from the
resource of platform device. The platform device named "sbsa-gwdt"
can be used by the ARM SBSA Generic Watchdog driver.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Tested-by: Xiongfeng Wang 
Reviewed-by: Lorenzo Pieralisi 
---
 drivers/acpi/arm64/gtdt.c | 103 ++
 1 file changed, 103 insertions(+)

diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
index 3dd33f3..d73bb16 100644
--- a/drivers/acpi/arm64/gtdt.c
+++ b/drivers/acpi/arm64/gtdt.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -60,6 +61,17 @@ static inline bool is_timer_block(void *platform_timer)
return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
 }
 
+static inline bool is_non_secure_watchdog(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+   struct acpi_gtdt_watchdog *wd = platform_timer;
+
+   if (gh->type != ACPI_GTDT_TYPE_WATCHDOG)
+   return false;
+
+   return !(wd->timer_flags & ACPI_GTDT_WATCHDOG_SECURE);
+}
+
 static int __init map_gt_gsi(u32 interrupt, u32 flags)
 {
int trigger, polarity;
@@ -301,3 +313,94 @@ int __init acpi_arch_timer_mem_init(struct arch_timer_mem 
*timer_mem,
 
return 0;
 }
+
+/*
+ * Initialize a SBSA generic Watchdog platform device info from GTDT
+ */
+static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd,
+   int index)
+{
+   struct platform_device *pdev;
+   int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags);
+
+   /*
+* According to SBSA specification the size of refresh and control
+* frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF).
+*/
+   struct resource res[] = {
+   DEFINE_RES_MEM(wd->control_frame_address, SZ_4K),
+   DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K),
+   DEFINE_RES_IRQ(irq),
+   };
+   int nr_res = ARRAY_SIZE(res);
+
+   pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n",
+wd->refresh_frame_address, wd->control_frame_address,
+wd->timer_interrupt, wd->timer_flags);
+
+   if (!(wd->refresh_frame_address && wd->control_frame_address)) {
+   pr_err(FW_BUG "failed to get the Watchdog base address.\n");
+   acpi_unregister_gsi(wd->timer_interrupt);
+   return -EINVAL;
+   }
+
+   if (irq <= 0) {
+   pr_warn("failed to map the Watchdog interrupt.\n");
+   nr_res--;
+   }
+
+   /*
+* Add a platform device named "sbsa-gwdt" to match the platform driver.
+* "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog
+* The platform driver can get device info below by matching this name.
+*/
+   pdev = platform_device_register_simple("sbsa-gwdt", index, res, nr_res);
+   if (IS_ERR(pdev)) {
+   acpi_unregister_gsi(wd->timer_interrupt);
+   return PTR_ERR(pdev);
+   }
+
+   return 0;
+}
+
+static int __init gtdt_sbsa_gwdt_init(void)
+{
+   void *platform_timer;
+   struct acpi_table_header *table;
+   int ret, timer_count, gwdt_count = 0;
+
+   if (acpi_disabled)
+   return 0;
+
+   if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0, &table)))
+   return -EINVAL;
+
+   /*
+* Note: Even though the global variable acpi_gtdt_desc has been
+* initialized by acpi_gtdt_init() while initializing the arch timers,
+* when we call this function to get SBSA watchdogs info from GTDT, the
+* pointers stashed in it are stale (since they are early temporary
+* mappings carried out before acpi_permanent_mmap is set) and we need
+* to re-initialize them with permanent mapped pointer values to let the
+* GTDT parsing possible.
+*/
+   ret = acpi_gtdt_init(table, &timer_count);
+   if (ret || !timer_count)
+   return ret;
+
+   for_each_platform_timer(platform_timer) {
+   if (is_non_secure_watchdog(platform_timer)) {
+   ret = gtdt_import_sbsa_gwdt(platform_timer, gwdt_count);
+   if (ret)
+   break;
+   gwdt_count++;
+   }
+   }
+
+   if (gwdt_count)
+   pr_info("found %d SBSA generic Watchdog(s).\n", gwdt_count);
+
+   return ret;
+}
+
+device_initcall(gtdt_sbsa_gwdt_init);
-- 
2.9.3

[PATCH v23 10/11] clocksource: arm_arch_timer: add GTDT support for memory-mapped timer

2017-03-31 Thread fu . wei

From: Fu Wei 

The patch add memory-mapped timer register support by using the
information provided by the new GTDT driver of ACPI.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 35 ---
 1 file changed, 32 insertions(+), 3 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 415e30a..c722bb5 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -1150,10 +1150,35 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, 
"arm,armv7-timer-mem",
   arch_timer_mem_of_init);
 
 #ifdef CONFIG_ACPI_GTDT
-/* Initialize per-processor generic timer */
+static int __init arch_timer_mem_acpi_init(int platform_timer_count)
+{
+   struct arch_timer_mem *timer_mem;
+   int timer_count, i, ret;
+
+   timer_mem = kcalloc(platform_timer_count, sizeof(*timer_mem),
+   GFP_KERNEL);
+   if (!timer_mem)
+   return -ENOMEM;
+
+   ret = acpi_arch_timer_mem_init(timer_mem, &timer_count);
+   if (ret || !timer_count)
+   goto error;
+
+   for (i = 0; i < timer_count; i++) {
+   ret = arch_timer_mem_init(timer_mem + i);
+   if (!ret)
+   break;
+   }
+
+error:
+   kfree(timer_mem);
+   return ret;
+}
+
+/* Initialize per-processor generic timer and memory-mapped timer(if present) 
*/
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
-   int ret;
+   int ret, platform_timer_count;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("already initialized, skipping\n");
@@ -1162,7 +1187,7 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
 
arch_timers_present |= ARCH_TIMER_TYPE_CP15;
 
-   ret = acpi_gtdt_init(table, NULL);
+   ret = acpi_gtdt_init(table, &platform_timer_count);
if (ret) {
pr_err("Failed to init GTDT table.\n");
return ret;
@@ -1199,6 +1224,10 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
if (ret)
return ret;
 
+   if (platform_timer_count &&
+   arch_timer_mem_acpi_init(platform_timer_count))
+   pr_err("Failed to initialize memory-mapped timer.\n");
+
return arch_timer_common_init();
 }
 CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
-- 
2.9.3

[PATCH v23 09/11] acpi/arm64: Add memory-mapped timer support in GTDT driver

2017-03-31 Thread fu . wei

From: Fu Wei 

On platforms booting with ACPI, architected memory-mapped timers'
configuration data is provided by firmware through the ACPI GTDT
static table.

The clocksource architected timer kernel driver requires a firmware
interface to collect timer configuration and configure its driver.
this infrastructure is present for device tree systems, but it is
missing on systems booting with ACPI.

Implement the kernel infrastructure required to parse the static
ACPI GTDT table so that the architected timer clocksource driver can
make use of it on systems booting with ACPI, therefore enabling
the corresponding timers configuration.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
---
 drivers/acpi/arm64/gtdt.c | 146 ++
 include/linux/acpi.h  |   1 +
 2 files changed, 147 insertions(+)

diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
index 3d95af8..3dd33f3 100644
--- a/drivers/acpi/arm64/gtdt.c
+++ b/drivers/acpi/arm64/gtdt.c
@@ -13,6 +13,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -37,6 +38,28 @@ struct acpi_gtdt_descriptor {
 
 static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
 
+static inline void *next_platform_timer(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+
+   platform_timer += gh->length;
+   if (platform_timer < acpi_gtdt_desc.gtdt_end)
+   return platform_timer;
+
+   return NULL;
+}
+
+#define for_each_platform_timer(_g)\
+   for (_g = acpi_gtdt_desc.platform_timer; _g;\
+_g = next_platform_timer(_g))
+
+static inline bool is_timer_block(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+
+   return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
+}
+
 static int __init map_gt_gsi(u32 interrupt, u32 flags)
 {
int trigger, polarity;
@@ -155,3 +178,126 @@ int __init acpi_gtdt_init(struct acpi_table_header *table,
 
return 0;
 }
+
+static int __init gtdt_parse_timer_block(struct acpi_gtdt_timer_block *block,
+struct arch_timer_mem *timer_mem)
+{
+   int i;
+   struct arch_timer_mem_frame *frame;
+   struct acpi_gtdt_timer_entry *gtdt_frame;
+
+   if (!block->timer_count) {
+   pr_err(FW_BUG "GT block present, but frame count is zero.");
+   return -ENODEV;
+   }
+
+   if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) {
+   pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 
8\n",
+  block->timer_count);
+   return -EINVAL;
+   }
+
+   timer_mem->cntctlbase = (phys_addr_t)block->block_address;
+   /*
+* The CNTCTLBase frame is 4KB (register offsets 0x000 - 0xFFC).
+* See ARM DDI 0487A.k_iss10775, page I1-5129, Table I1-3
+* "CNTCTLBase memory map".
+*/
+   timer_mem->size = SZ_4K;
+
+   gtdt_frame = (void *)block + block->timer_offset;
+   if (gtdt_frame + block->timer_count != (void *)block + 
block->header.length)
+   return -EINVAL;
+
+   /*
+* Get the GT timer Frame data for every GT Block Timer
+*/
+   for (i = 0; i < block->timer_count; i++, gtdt_frame++) {
+   if (gtdt_frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)
+   continue;
+
+   if (!gtdt_frame->base_address || !gtdt_frame->timer_interrupt)
+   goto error;
+
+   frame = &timer_mem->frame[gtdt_frame->frame_number];
+   frame->phys_irq = map_gt_gsi(gtdt_frame->timer_interrupt,
+gtdt_frame->timer_flags);
+   if (frame->phys_irq <= 0) {
+   pr_warn("failed to map physical timer irq in frame 
%d.\n",
+   gtdt_frame->frame_number);
+   goto error;
+   }
+
+   if (gtdt_frame->virtual_timer_interrupt) {
+   frame->virt_irq =
+   map_gt_gsi(gtdt_frame->virtual_timer_interrupt,
+  gtdt_frame->virtual_timer_flags);
+   if (frame->virt_irq <= 0) {
+   pr_warn("failed to map virtual timer irq in 
frame %d.\n",
+   gtdt_frame->frame_number);
+   
acpi_unregister_gsi(gtdt_frame->timer_interrupt);
+   goto error;
+   }
+   } else {
+   frame->virt_irq = 0;
+   pr_debug("virtual timer in frame %d not implemented.\n",
+gtdt_frame->

[PATCH v23 08/11] clocksource: arm_arch_timer: simplify ACPI support code.

2017-03-31 Thread fu . wei

From: Fu Wei 

The patch update arm_arch_timer driver to use the function
provided by the new GTDT driver of ACPI.
By this way, arm_arch_timer.c can be simplified, and separate
all the ACPI GTDT knowledge from this timer driver.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Tested-by: Xiongfeng Wang 
Reviewed-by: Hanjun Guo 
Tested-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 54 
 1 file changed, 17 insertions(+), 37 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 4aaebe7..415e30a 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -1149,63 +1149,36 @@ static int __init arch_timer_mem_of_init(struct 
device_node *np)
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
   arch_timer_mem_of_init);
 
-#ifdef CONFIG_ACPI
-static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags)
-{
-   int trigger, polarity;
-
-   if (!interrupt)
-   return 0;
-
-   trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
-   : ACPI_LEVEL_SENSITIVE;
-
-   polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
-   : ACPI_ACTIVE_HIGH;
-
-   return acpi_register_gsi(NULL, interrupt, trigger, polarity);
-}
-
+#ifdef CONFIG_ACPI_GTDT
 /* Initialize per-processor generic timer */
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
int ret;
-   struct acpi_table_gtdt *gtdt;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("already initialized, skipping\n");
return -EINVAL;
}
 
-   gtdt = container_of(table, struct acpi_table_gtdt, header);
-
arch_timers_present |= ARCH_TIMER_TYPE_CP15;
 
-   arch_timer_ppi[ARCH_TIMER_PHYS_SECURE_PPI] =
-   map_generic_timer_interrupt(gtdt->secure_el1_interrupt,
-   gtdt->secure_el1_flags);
+   ret = acpi_gtdt_init(table, NULL);
+   if (ret) {
+   pr_err("Failed to init GTDT table.\n");
+   return ret;
+   }
 
arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI] =
-   map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt,
-   gtdt->non_secure_el1_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_PHYS_NONSECURE_PPI);
 
arch_timer_ppi[ARCH_TIMER_VIRT_PPI] =
-   map_generic_timer_interrupt(gtdt->virtual_timer_interrupt,
-   gtdt->virtual_timer_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_VIRT_PPI);
 
arch_timer_ppi[ARCH_TIMER_HYP_PPI] =
-   map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
-   gtdt->non_secure_el2_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_HYP_PPI);
 
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
 
-   /* Get the frequency from the sysreg CNTFRQ */
-   arch_timer_rate = arch_timer_get_cntfrq();
-   if (!arch_timer_rate) {
-   pr_err(FW_BUG "frequency not available.\n");
-   return -EINVAL;
-   }
-
arch_timer_uses_ppi = arch_timer_select_ppi();
if (!arch_timer_ppi[arch_timer_uses_ppi]) {
pr_err("No interrupt available, giving up\n");
@@ -1213,7 +1186,14 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
}
 
/* Always-on capability */
-   arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
+   arch_timer_c3stop = acpi_gtdt_c3stop(arch_timer_uses_ppi);
+
+   /* Get the frequency from the sysreg CNTFRQ */
+   arch_timer_rate = arch_timer_get_cntfrq();
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "frequency not available.\n");
+   return -EINVAL;
+   }
 
ret = arch_timer_register();
if (ret)
-- 
2.9.3

[PATCH v23 07/11] acpi/arm64: Add GTDT table parse driver

2017-03-31 Thread fu . wei

From: Fu Wei 

This patch adds support for parsing arch timer info in GTDT,
provides some kernel APIs to parse all the PPIs and
always-on info in GTDT and export them.

By this driver, we can simplify arm_arch_timer drivers, and
separate the ACPI GTDT knowledge from it.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Acked-by: Rafael J. Wysocki 
Tested-by: Xiongfeng Wang 
Reviewed-by: Hanjun Guo 
Tested-by: Hanjun Guo 
Acked-by: Lorenzo Pieralisi 
---
 arch/arm64/Kconfig  |   1 +
 drivers/acpi/arm64/Kconfig  |   3 +
 drivers/acpi/arm64/Makefile |   1 +
 drivers/acpi/arm64/gtdt.c   | 157 
 include/linux/acpi.h|   6 ++
 5 files changed, 168 insertions(+)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 3741859..7e2baec 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -2,6 +2,7 @@ config ARM64
def_bool y
select ACPI_CCA_REQUIRED if ACPI
select ACPI_GENERIC_GSI if ACPI
+   select ACPI_GTDT if ACPI
select ACPI_REDUCED_HARDWARE_ONLY if ACPI
select ACPI_MCFG if ACPI
select ACPI_SPCR_TABLE if ACPI
diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig
index 4616da4..5a6f80f 100644
--- a/drivers/acpi/arm64/Kconfig
+++ b/drivers/acpi/arm64/Kconfig
@@ -4,3 +4,6 @@
 
 config ACPI_IORT
bool
+
+config ACPI_GTDT
+   bool
diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile
index 72331f2..1017def 100644
--- a/drivers/acpi/arm64/Makefile
+++ b/drivers/acpi/arm64/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_ACPI_IORT)+= iort.o
+obj-$(CONFIG_ACPI_GTDT)+= gtdt.o
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
new file mode 100644
index 000..3d95af8
--- /dev/null
+++ b/drivers/acpi/arm64/gtdt.c
@@ -0,0 +1,157 @@
+/*
+ * ARM Specific GTDT table Support
+ *
+ * Copyright (C) 2016, Linaro Ltd.
+ * Author: Daniel Lezcano 
+ * Fu Wei 
+ * Hanjun Guo 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#undef pr_fmt
+#define pr_fmt(fmt) "ACPI GTDT: " fmt
+
+/**
+ * struct acpi_gtdt_descriptor - Store the key info of GTDT for all functions
+ * @gtdt:  The pointer to the struct acpi_table_gtdt of GTDT table.
+ * @gtdt_end:  The pointer to the end of GTDT table.
+ * @platform_timer:The pointer to the start of Platform Timer Structure
+ *
+ * The struct store the key info of GTDT table, it should be initialized by
+ * acpi_gtdt_init.
+ */
+struct acpi_gtdt_descriptor {
+   struct acpi_table_gtdt *gtdt;
+   void *gtdt_end;
+   void *platform_timer;
+};
+
+static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
+
+static int __init map_gt_gsi(u32 interrupt, u32 flags)
+{
+   int trigger, polarity;
+
+   trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
+   : ACPI_LEVEL_SENSITIVE;
+
+   polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
+   : ACPI_ACTIVE_HIGH;
+
+   return acpi_register_gsi(NULL, interrupt, trigger, polarity);
+}
+
+/**
+ * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
+ * @type:  the type of PPI.
+ *
+ * Note: Secure state is not managed by the kernel on ARM64 systems.
+ * So we only handle the non-secure timer PPIs,
+ * ARCH_TIMER_PHYS_SECURE_PPI is treated as invalid type.
+ *
+ * Return: the mapped PPI value, 0 if error.
+ */
+int __init acpi_gtdt_map_ppi(int type)
+{
+   struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
+
+   switch (type) {
+   case ARCH_TIMER_PHYS_NONSECURE_PPI:
+   return map_gt_gsi(gtdt->non_secure_el1_interrupt,
+ gtdt->non_secure_el1_flags);
+   case ARCH_TIMER_VIRT_PPI:
+   return map_gt_gsi(gtdt->virtual_timer_interrupt,
+ gtdt->virtual_timer_flags);
+
+   case ARCH_TIMER_HYP_PPI:
+   return map_gt_gsi(gtdt->non_secure_el2_interrupt,
+ gtdt->non_secure_el2_flags);
+   default:
+   pr_err("Failed to map timer interrupt: invalid type.\n");
+   }
+
+   return 0;
+}
+
+/**
+ * acpi_gtdt_c3stop() - Got c3stop info from GTDT according to the type of PPI.
+ * @type:  the type of PPI.
+ *
+ * Return: true if the timer HW state is lost when a CPU enters an idle state,
+ * false otherwise
+ */
+bool __init acpi_gtdt_c3stop(int type)
+{
+   struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
+
+   switch (type) {
+   case ARCH_TIMER_PHYS_NONSECURE_PPI:
+   return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
+
+   case ARCH_TIMER_VIRT_PPI:
+   return !(gtdt->vi

[PATCH v23 06/11] clocksource: arm_arch_timer: refactor MMIO timer probing.

2017-03-31 Thread fu . wei

From: Fu Wei 

Currently the code to probe MMIO architected timers mixes DT parsing with
actual poking of hardware. This makes the code harder than necessary to
understand, and makes it difficult to add support for probing via ACPI.

This patch factors all the DT-specific logic out of arch_timer_mem_init(),
into a new function arch_timer_mem_of_init().
The former pokes the hardware and determines the suitablility of frames
based on a datastructure populated by the latter.

This cleanly separates the two and will make it possible to add probing
using the ACPI GTDT in subsequent patches.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 170 +--
 1 file changed, 122 insertions(+), 48 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 9433276..4aaebe7 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -977,17 +977,17 @@ static int __init arch_timer_of_init(struct device_node 
*np)
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", 
arch_timer_of_init);
 CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", 
arch_timer_of_init);
 
-static int __init arch_timer_mem_init(struct device_node *np)
+static int __init arch_timer_mem_init(struct arch_timer_mem *timer_mem)
 {
-   struct device_node *frame, *best_frame = NULL;
+   struct arch_timer_mem_frame *best_frame = NULL;
+   u32 cnttidr, arch_timer_mem_freq;
void __iomem *cntctlbase, *base;
-   unsigned int irq, ret = -EINVAL;
-   u32 cnttidr;
+   unsigned int irq;
+   int i, ret;
 
-   arch_timers_present |= ARCH_TIMER_TYPE_MEM;
-   cntctlbase = of_iomap(np, 0);
+   cntctlbase = ioremap(timer_mem->cntctlbase, timer_mem->size);
if (!cntctlbase) {
-   pr_err("Can't find CNTCTLBase\n");
+   pr_err("Can't map CNTCTLBase.\n");
return -ENXIO;
}
 
@@ -997,25 +997,20 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
 * Try to find a virtual capable frame. Otherwise fall back to a
 * physical capable frame.
 */
-   for_each_available_child_of_node(np, frame) {
-   int n;
-   u32 cntacr;
+   for (i = 0; i < ARCH_TIMER_MEM_MAX_FRAMES; i++) {
+   u32 cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT |
+CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT;
+   struct arch_timer_mem_frame *frame = &timer_mem->frame[i];
 
-   if (of_property_read_u32(frame, "frame-number", &n)) {
-   pr_err("Missing frame-number\n");
-   of_node_put(frame);
-   goto out;
-   }
+   if (!frame->valid)
+   continue;
 
/* Try enabling everything, and see what sticks */
-   cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT |
-CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT;
-   writel_relaxed(cntacr, cntctlbase + CNTACR(n));
-   cntacr = readl_relaxed(cntctlbase + CNTACR(n));
+   writel_relaxed(cntacr, cntctlbase + CNTACR(i));
+   cntacr = readl_relaxed(cntctlbase + CNTACR(i));
 
-   if ((cnttidr & CNTTIDR_VIRT(n)) &&
+   if ((cnttidr & CNTTIDR_VIRT(i)) &&
!(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) {
-   of_node_put(best_frame);
best_frame = frame;
arch_timer_mem_use_virtual = true;
break;
@@ -1024,56 +1019,135 @@ static int __init arch_timer_mem_init(struct 
device_node *np)
if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT))
continue;
 
-   of_node_put(best_frame);
-   best_frame = of_node_get(frame);
+   best_frame = frame;
}
+   iounmap(cntctlbase);
 
-   ret= -ENXIO;
-   base = arch_counter_base = of_io_request_and_map(best_frame, 0,
-"arch_mem_timer");
-   if (IS_ERR(base)) {
-   pr_err("Can't map frame's registers\n");
-   goto out;
+   if (!best_frame) {
+   pr_err("Can't find frame for register\n");
+   return -EINVAL;
}
 
if (arch_timer_mem_use_virtual)
-   irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_VIRT_SPI);
+   irq = best_frame->virt_irq;
else
-   irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_PHYS_SPI);
+   irq = best_frame->phys_irq;
 
-   ret = -EINVAL;
if (!irq) {
pr_

[PATCH v23 05/11] clocksource: arm_arch_timer: add structs to describe MMIO timer

2017-03-31 Thread fu . wei

From: Fu Wei 

In preparation for ACPI GTDT support, this patch adds structs to
describe the MMIO timers indepedent of the firmware interface.

Subsequent patches will use these to split the FW/HW probing logic, so
that the HW probing logic can be shared by ACPI and DT.

[Mark: reword commit message]

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 include/clocksource/arm_arch_timer.h | 16 
 1 file changed, 16 insertions(+)

diff --git a/include/clocksource/arm_arch_timer.h 
b/include/clocksource/arm_arch_timer.h
index 4a98c06..cc805b7 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -57,6 +57,8 @@ enum arch_timer_spi_nr {
 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
 #define ARCH_TIMER_MEM_VIRT_ACCESS 3
 
+#define ARCH_TIMER_MEM_MAX_FRAMES  8
+
 #define ARCH_TIMER_USR_PCT_ACCESS_EN   (1 << 0) /* physical counter */
 #define ARCH_TIMER_USR_VCT_ACCESS_EN   (1 << 1) /* virtual counter */
 #define ARCH_TIMER_VIRT_EVT_EN (1 << 2)
@@ -72,6 +74,20 @@ struct arch_timer_kvm_info {
int virtual_irq;
 };
 
+struct arch_timer_mem_frame {
+   bool valid;
+   phys_addr_t cntbase;
+   size_t size;
+   int phys_irq;
+   int virt_irq;
+};
+
+struct arch_timer_mem {
+   phys_addr_t cntctlbase;
+   size_t size;
+   struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES];
+};
+
 #ifdef CONFIG_ARM_ARCH_TIMER
 
 extern u32 arch_timer_get_rate(void);
-- 
2.9.3

[PATCH v23 03/11] clocksource: arm_arch_timer: refactor arch_timer_needs_probing

2017-03-31 Thread fu . wei

From: Fu Wei 

When booting with DT, it's possible for timer nodes to be probed in any
order. Some common initialisation needs to occur after all nodes have
been probed, and arch_timer_common_init() has code to detect when this
has happened.

This logic is DT-specific, and it would be best to factor it out of the
common code that will be shared with ACPI.

This patch folds this into the existing arch_timer_needs_probing(),
which is renamed to arch_timer_needs_of_probing(), and no longer takes
any arguments. This is only called when using DT, and not when using
ACPI, which will have a deterministic probe order.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
[Mark: reword commit message]
Signed-off-by: Mark Rutland 
---
 drivers/clocksource/arm_arch_timer.c | 34 +++---
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 1b6a7e6..ed215d9 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -839,15 +839,28 @@ static const struct of_device_id 
arch_timer_mem_of_match[] __initconst = {
{},
 };
 
-static bool __init
-arch_timer_needs_probing(int type, const struct of_device_id *matches)
+static bool __init arch_timer_needs_of_probing(void)
 {
struct device_node *dn;
bool needs_probing = false;
+   unsigned int mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
 
-   dn = of_find_matching_node(NULL, matches);
-   if (dn && of_device_is_available(dn) && !(arch_timers_present & type))
+   /* We have two timers, and both device-tree nodes are probed. */
+   if ((arch_timers_present & mask) == mask)
+   return false;
+
+   /*
+* Only one type of timer is probed,
+* check if we have another type of timer node in device-tree.
+*/
+   if (arch_timers_present & ARCH_TIMER_TYPE_CP15)
+   dn = of_find_matching_node(NULL, arch_timer_mem_of_match);
+   else
+   dn = of_find_matching_node(NULL, arch_timer_of_match);
+
+   if (dn && of_device_is_available(dn))
needs_probing = true;
+
of_node_put(dn);
 
return needs_probing;
@@ -855,17 +868,8 @@ arch_timer_needs_probing(int type, const struct 
of_device_id *matches)
 
 static int __init arch_timer_common_init(void)
 {
-   unsigned mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
-
-   /* Wait until both nodes are probed if we have two timers */
-   if ((arch_timers_present & mask) != mask) {
-   if (arch_timer_needs_probing(ARCH_TIMER_TYPE_MEM,
-arch_timer_mem_of_match))
-   return 0;
-   if (arch_timer_needs_probing(ARCH_TIMER_TYPE_CP15,
-arch_timer_of_match))
-   return 0;
-   }
+   if (acpi_disabled && arch_timer_needs_of_probing())
+   return 0;
 
arch_timer_banner(arch_timers_present);
arch_counter_register(arch_timers_present);
-- 
2.9.3

[PATCH v23 04/11] clocksource: arm_arch_timer: move arch_timer_needs_of_probing into DT init call

2017-03-31 Thread fu . wei

From: Fu Wei 

To cleanly split code paths specific to ACPI or DT at a higher level,
this patch removes arch_timer_init(), folding the relevant
parts of its logic into existing callers.

This patches the way for further rework, and saves a few lines.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
[Mark: reword commit message]
Signed-off-by: Mark Rutland 
---
 drivers/clocksource/arm_arch_timer.c | 46 
 1 file changed, 21 insertions(+), 25 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index ed215d9..9433276 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -868,9 +868,6 @@ static bool __init arch_timer_needs_of_probing(void)
 
 static int __init arch_timer_common_init(void)
 {
-   if (acpi_disabled && arch_timer_needs_of_probing())
-   return 0;
-
arch_timer_banner(arch_timers_present);
arch_counter_register(arch_timers_present);
return arch_timer_arch_init();
@@ -908,26 +905,9 @@ static enum arch_timer_ppi_nr __init 
arch_timer_select_ppi(void)
return ARCH_TIMER_PHYS_SECURE_PPI;
 }
 
-static int __init arch_timer_init(void)
-{
-   int ret;
-
-   ret = arch_timer_register();
-   if (ret)
-   return ret;
-
-   ret = arch_timer_common_init();
-   if (ret)
-   return ret;
-
-   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
-
-   return 0;
-}
-
 static int __init arch_timer_of_init(struct device_node *np)
 {
-   int i;
+   int i, ret;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("multiple nodes in dt, skipping\n");
@@ -938,6 +918,8 @@ static int __init arch_timer_of_init(struct device_node *np)
for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++)
arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
 
+   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
+
/*
 * Determine the frequency of system counter:
 * Try to get the frequency from the device tree.
@@ -983,7 +965,14 @@ static int __init arch_timer_of_init(struct device_node 
*np)
arch_counter_suspend_stop = of_property_read_bool(np,
 
"arm,no-tick-in-suspend");
 
-   return arch_timer_init();
+   ret = arch_timer_register();
+   if (ret)
+   return ret;
+
+   if (arch_timer_needs_of_probing())
+   return 0;
+
+   return arch_timer_common_init();
 }
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", 
arch_timer_of_init);
 CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", 
arch_timer_of_init);
@@ -1076,7 +1065,8 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
if (ret)
goto out;
 
-   return arch_timer_common_init();
+   if (!arch_timer_needs_of_probing())
+   ret = arch_timer_common_init();
 out:
iounmap(cntctlbase);
of_node_put(best_frame);
@@ -1105,6 +1095,7 @@ static int __init map_generic_timer_interrupt(u32 
interrupt, u32 flags)
 /* Initialize per-processor generic timer */
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
+   int ret;
struct acpi_table_gtdt *gtdt;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
@@ -1132,6 +1123,8 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
gtdt->non_secure_el2_flags);
 
+   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
+
/* Get the frequency from the sysreg CNTFRQ */
arch_timer_rate = arch_timer_get_cntfrq();
if (!arch_timer_rate) {
@@ -1148,8 +1141,11 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
/* Always-on capability */
arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
 
-   arch_timer_init();
-   return 0;
+   ret = arch_timer_register();
+   if (ret)
+   return ret;
+
+   return arch_timer_common_init();
 }
 CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
 #endif
-- 
2.9.3

[PATCH v23 00/11] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-03-31 Thread fu . wei

From: Fu Wei 

This patchset:
(1)Preparation for adding GTDT support in arm_arch_timer:
1. Introduce a MMIO CNTFRQ helper.
2. separate out device-tree code from arch_timer_detect_rate
3. remove arch_timer_detect_rate use arch_timer_*get_cntfrq directly
4. Refactor arch_timer_needs_probing, and move it into DT init call
5. Introduce some new structs and refactor the MMIO timer init code
for reusing some common code.

(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c
Parse all kinds of timer in GTDT table of ACPI:arch timer,
memory-mapped timer and SBSA Generic Watchdog timer.
This driver can help to simplify all the relevant timer drivers,
and separate all the ACPI GTDT knowledge from them.

(3)Simplify ACPI code for arm_arch_timer

(4)Add GTDT support for ARM memory-mapped timer.

This patchset has been tested on the following platforms with ACPI enabled:
(1)ARM Foundation v8 model

Changelog:
v23: https://lkml.org/lkml/2017/3/31/
 Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
arch-timer/cleanup
 Improve the data struct of arch_timer_mem and arch_timer_mem_frame to
 improve the parser of GT blocks and arch_timer_mem initualization.
 Improve arch_timer_rate detection: sysreg frequency is primary in DT boot
 Improve some comments in GTDT parser driver.
 Improve acpi_gtdt_init function, and make a comment for the multiple calls.
 Improve the unwinding for the irq of timers, when an error occurs.
 Handle the case of virtual timer GSIV is 0.

v22: https://lkml.org/lkml/2017/3/21/523
 Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
arch-timer/cleanup
 Only Introduce arch_timer_mem_get_cntfrq to get the frequency from mmio.
 Merged patch 2,3(about arch_timer_detect_rate).
 Keep arch_timer_rate, do NOT split it for different types of timer.
 Improve  memory-mapped timer support by comments and variable name:
 data-->timer_mem
 frame-->gtdt_frame
 Delete zero check for SBSA watchdog irq.
 Skip secure SBSA watchdog in GTDT driver.
 Delete Kconfig modification for SBSA watchdog driver.
 Delete no_irq, using nr_res instead.

v21: https://lkml.org/lkml/2017/2/6/734
 Introduce two functions to get the frequency from mmio and sysreg.
 Remove arch_timer_detect_rate use arch_timer_get_*_freq directly
 Split arch_timer_rate for different types of timer.
 Skip secure timer frame in GTDT driver.
 Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
arch-timer/cleanup
 (The first 6 patches in v20 have been merged into arch-timer/cleanup 
branch)

v20: https://lkml.org/lkml/2017/1/18/534
 Reorder the first 4 patches and split the 4th patches.
 Leave CNTHCTL_* as they originally were.
 Fix the bug in arch_timer_select_ppi.
 Split "Rework counter frequency detection" patch.
 Rework the arch_timer_detect_rate function.
 Improve the commit message of "Refactor MMIO timer probing".
 Rebase to 4.10.0-rc4

v19: https://lkml.org/lkml/2016/12/21/25
 Fix a '\n' missing in a error message in arch_timer_mem_init.
 Add "request_mem_region" for ioremapping cntbase, according to
 f947ee1 clocksource/drivers/arm_arch_timer: Map frame with 
of_io_request_and_map()
 Rebase to 4.9.0-gfb779ff

v18: https://lkml.org/lkml/2016/12/8/446
 Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init.
 Rebase to 4.9.0-rc8-g9269898

v17: https://lkml.org/lkml/2016/11/25/140
 Take out some cleanups from 4/15.
 Merge 5/15 and 6/15, improve PPI determination code,
 improve commit message.
 Rework counter frequency detection.
 Move arch_timer_needs_of_probing into DT init call.
 Move Platform Timer scan loop back to timer init call to avoid allocating
 and free memory.
 Improve all the exported functions' comment.

v16: https://lkml.org/lkml/2016/11/16/268
 Fix patchset problem about static enum ppi_nr of 01/13 in v15.
 Refactor arch_timer_detect_rate.
 Refactor arch_timer_needs_probing.

v15: https://lkml.org/lkml/2016/11/15/366
 Re-order patches
 Add arm_arch_timer refactoring patches to prepare for GTDT:
 1. rename some  enums and defines, and some cleanups
 2. separate out arch_timer_uses_ppi init code and fix a potential bug
 3. Improve some new structs, refactor the timer init code.
 Since the some structs have been changed, GTDT parser for memory-mapped
 timer and SBSA Generic Watchdog timer have been update.

v14: https://lkml.org/lkml/2016/9/28/573
 Separate memory-mapped timer GTDT support into two patches
 1. Refactor the timer init code to prepare for GTDT
 2. Add GTDT support for memory-mapped timer

v13: http://www.mail-archive.com/linux-kernel@vger.kernel.or

[PATCH v23 01/11] clocksource: arm_arch_timer: add MMIO CNTFRQ helper

2017-03-31 Thread fu . wei

From: Fu Wei 

We currently open-code the readl() for the MMIO time frequency. To avoid
duplicating the logic with future rework, this patch adds a helepr to
read the MMIO timer frequency, mirroring what we have for the sysreg
timer frequency.

Signed-off-by: Fu Wei 
[Mark: reword commit message]
Signed-off-by: Mark Rutland 
---
 drivers/clocksource/arm_arch_timer.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 3faed19..843f923 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -555,6 +555,11 @@ static int arch_timer_starting_cpu(unsigned int cpu)
return 0;
 }
 
+static u32 arch_timer_mem_get_cntfrq(void __iomem *cntbase)
+{
+   return readl_relaxed(cntbase + CNTFRQ);
+}
+
 static void
 arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
 {
@@ -569,7 +574,7 @@ arch_timer_detect_rate(void __iomem *cntbase, struct 
device_node *np)
if (!acpi_disabled ||
of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) {
if (cntbase)
-   arch_timer_rate = readl_relaxed(cntbase + CNTFRQ);
+   arch_timer_rate = arch_timer_mem_get_cntfrq(cntbase);
else
arch_timer_rate = arch_timer_get_cntfrq();
}
-- 
2.9.3

[PATCH v23 02/11] clocksource: arm_arch_timer: split dt-only rate handling

2017-03-31 Thread fu . wei

From: Fu Wei 

Currently Currently arch_timer_detect_rate() tried to handle both the
sysreg timer and MMIO timer, with DT-specific fallback code. This gets
in the way of implementing deterministic and correct rate probing when
using ACPI.

This patch moves this logic out into the (DT-specific) probe functions,
allowing different logic to be used in the ACPI case, and making it
easier to see which CNTFRQ register is being read in each case.

Signed-off-by: Fu Wei 
[Mark: reword commit message, TODO: rework comments]
Signed-off-by: Mark Rutland 
---
 drivers/clocksource/arm_arch_timer.c | 58 +++-
 1 file changed, 30 insertions(+), 28 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 843f923..1b6a7e6 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -560,30 +560,6 @@ static u32 arch_timer_mem_get_cntfrq(void __iomem *cntbase)
return readl_relaxed(cntbase + CNTFRQ);
 }
 
-static void
-arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
-{
-   /* Who has more than one independent system counter? */
-   if (arch_timer_rate)
-   return;
-
-   /*
-* Try to determine the frequency from the device tree or CNTFRQ,
-* if ACPI is enabled, get the frequency from CNTFRQ ONLY.
-*/
-   if (!acpi_disabled ||
-   of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) {
-   if (cntbase)
-   arch_timer_rate = arch_timer_mem_get_cntfrq(cntbase);
-   else
-   arch_timer_rate = arch_timer_get_cntfrq();
-   }
-
-   /* Check the timer frequency. */
-   if (arch_timer_rate == 0)
-   pr_warn("frequency not available\n");
-}
-
 static void arch_timer_banner(unsigned type)
 {
pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
@@ -958,7 +934,17 @@ static int __init arch_timer_of_init(struct device_node 
*np)
for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++)
arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
 
-   arch_timer_detect_rate(NULL, np);
+   /*
+* Determine the frequency of system counter:
+* Try to get the frequency from the device tree.
+* If fail, try the sysreg CNTFRQ. Then verify the frequency.
+*/
+   if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
+   arch_timer_rate = arch_timer_get_cntfrq();
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "frequency not available.\n");
+   return -EINVAL;
+   }
 
arch_timer_c3stop = !of_property_read_bool(np, "always-on");
 
@@ -1069,7 +1055,19 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
goto out;
}
 
-   arch_timer_detect_rate(base, np);
+   /*
+* Try to determine the frequency from the device tree,
+* if fail, get the frequency from the CNTFRQ reg of MMIO timer.
+*/
+   if (!arch_timer_rate &&
+   of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
+   arch_timer_rate = arch_timer_mem_get_cntfrq(base);
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "MMIO frequency not available.\n");
+   ret = -EINVAL;
+   goto out;
+   }
+
ret = arch_timer_mem_register(base, irq);
if (ret)
goto out;
@@ -1130,8 +1128,12 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
gtdt->non_secure_el2_flags);
 
-   /* Get the frequency from CNTFRQ */
-   arch_timer_detect_rate(NULL, NULL);
+   /* Get the frequency from the sysreg CNTFRQ */
+   arch_timer_rate = arch_timer_get_cntfrq();
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "frequency not available.\n");
+   return -EINVAL;
+   }
 
arch_timer_uses_ppi = arch_timer_select_ppi();
if (!arch_timer_ppi[arch_timer_uses_ppi]) {
-- 
2.9.3

Re: [PATCH v22 11/11] acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver

2017-03-31 Thread Fu Wei

Hi Lorenzo,

On 28 March 2017 at 23:41, Lorenzo Pieralisi  wrote:
> On Wed, Mar 22, 2017 at 12:31:22AM +0800, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> This driver adds support for parsing SBSA Generic Watchdog timer
>> in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT,
>> and creating a platform device with that information.
>>
>> This allows the operating system to obtain device data from the
>> resource of platform device. The platform device named "sbsa-gwdt"
>> can be used by the ARM SBSA Generic Watchdog driver.
>>
>> Signed-off-by: Fu Wei 
>> Signed-off-by: Hanjun Guo 
>> Tested-by: Xiongfeng Wang 
>> ---
>>  drivers/acpi/arm64/gtdt.c | 94 
>> +++
>>  1 file changed, 94 insertions(+)
>>
>> diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
>> index f471873..5d167f0 100644
>> --- a/drivers/acpi/arm64/gtdt.c
>> +++ b/drivers/acpi/arm64/gtdt.c
>> @@ -14,6 +14,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>
>>  #include 
>>
>> @@ -59,6 +60,17 @@ static inline bool is_timer_block(void *platform_timer)
>>   return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
>>  }
>>
>> +static inline bool is_non_secure_watchdog(void *platform_timer)
>> +{
>> + struct acpi_gtdt_header *gh = platform_timer;
>> + struct acpi_gtdt_watchdog *wd = platform_timer;
>> +
>> + if (gh->type != ACPI_GTDT_TYPE_WATCHDOG)
>> + return false;
>> +
>> + return !(wd->timer_flags & ACPI_GTDT_WATCHDOG_SECURE);
>> +}
>> +
>>  static int __init map_gt_gsi(u32 interrupt, u32 flags)
>>  {
>>   int trigger, polarity;
>> @@ -285,3 +297,85 @@ int __init acpi_arch_timer_mem_init(struct 
>> arch_timer_mem *timer_mem,
>>
>>   return 0;
>>  }
>> +
>> +/*
>> + * Initialize a SBSA generic Watchdog platform device info from GTDT
>> + */
>> +static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd,
>> + int index)
>> +{
>> + struct platform_device *pdev;
>> + int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags);
>> +
>> + /*
>> +  * According to SBSA specification the size of refresh and control
>> +  * frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF).
>> +  */
>> + struct resource res[] = {
>> + DEFINE_RES_MEM(wd->control_frame_address, SZ_4K),
>> + DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K),
>> + DEFINE_RES_IRQ(irq),
>> + };
>> + int nr_res = ARRAY_SIZE(res);
>> +
>> + pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n",
>> +  wd->refresh_frame_address, wd->control_frame_address,
>> +  wd->timer_interrupt, wd->timer_flags);
>> +
>> + if (!(wd->refresh_frame_address && wd->control_frame_address)) {
>> + pr_err(FW_BUG "failed to get the Watchdog base address.\n");


+ acpi_unregister_gsi(wd->timer_interrupt);


>> + return -EINVAL;
>
> You should unmap the gsi here.

yes, you are right, fixed it.

>
>> + }
>> +
>> + if (irq <= 0) {
>> + pr_warn("failed to map the Watchdog interrupt.\n");
>> + nr_res--;
>> + }
>> +
>> + /*
>> +  * Add a platform device named "sbsa-gwdt" to match the platform 
>> driver.
>> +  * "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog
>> +  * The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get 
>> device

+  * The platform driver can get device info below by matching this name.

>
> Nit: I would not hardcode drivers paths in comments.


OK, deleted it

>
>> +  * info below by matching this name.
>> +  */
>> + pdev = platform_device_register_simple("sbsa-gwdt", index, res, 
>> nr_res);
>> + if (IS_ERR(pdev)) {
>> + acpi_unregister_gsi(wd->timer_interrupt);
>> + return PTR_ERR(pdev);
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int __init gtdt_sbsa_gwdt_init(void)
>> +{
>> + int ret, i = 0;
>> + void *platform_timer;
>> + struct acpi_table_header *table;
>> +
>> + if (acpi_disabled)
>> + retu

Re: [PATCH v22 09/11] acpi/arm64: Add memory-mapped timer support in GTDT driver

2017-03-30 Thread Fu Wei

Hi Lorenzo,

On 30 March 2017 at 00:47, Lorenzo Pieralisi  wrote:
> On Wed, Mar 22, 2017 at 12:31:20AM +0800, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> On platforms booting with ACPI, architected memory-mapped timers'
>> configuration data is provided by firmware through the ACPI GTDT
>> static table.
>>
>> The clocksource architected timer kernel driver requires a firmware
>> interface to collect timer configuration and configure its driver.
>> this infrastructure is present for device tree systems, but it is
>> missing on systems booting with ACPI.
>>
>> Implement the kernel infrastructure required to parse the static
>> ACPI GTDT table so that the architected timer clocksource driver can
>> make use of it on systems booting with ACPI, therefore enabling
>> the corresponding timers configuration.
>>
>> Signed-off-by: Fu Wei 
>> Signed-off-by: Hanjun Guo 
>> ---
>>  drivers/acpi/arm64/gtdt.c | 130 
>> ++
>>  include/linux/acpi.h  |   1 +
>>  2 files changed, 131 insertions(+)
>>
>> diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
>> index 8a03b4b..f471873 100644
>> --- a/drivers/acpi/arm64/gtdt.c
>> +++ b/drivers/acpi/arm64/gtdt.c
>> @@ -37,6 +37,28 @@ struct acpi_gtdt_descriptor {
>>
>>  static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
>>
>> +static inline void *next_platform_timer(void *platform_timer)
>> +{
>> + struct acpi_gtdt_header *gh = platform_timer;
>> +
>> + platform_timer += gh->length;
>> + if (platform_timer < acpi_gtdt_desc.gtdt_end)
>> + return platform_timer;
>> +
>> + return NULL;
>> +}
>> +
>> +#define for_each_platform_timer(_g)  \
>> + for (_g = acpi_gtdt_desc.platform_timer; _g;\
>> +  _g = next_platform_timer(_g))
>> +
>> +static inline bool is_timer_block(void *platform_timer)
>> +{
>> + struct acpi_gtdt_header *gh = platform_timer;
>> +
>> + return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
>> +}
>> +
>>  static int __init map_gt_gsi(u32 interrupt, u32 flags)
>>  {
>>   int trigger, polarity;
>> @@ -155,3 +177,111 @@ int __init acpi_gtdt_init(struct acpi_table_header 
>> *table,
>>
>>   return ret;
>>  }
>> +
>> +static int __init gtdt_parse_timer_block(struct acpi_gtdt_timer_block 
>> *block,
>> +  struct arch_timer_mem *timer_mem)
>> +{
>> + int i, j;
>> + struct acpi_gtdt_timer_entry *gtdt_frame;
>> +
>> + if (!block->timer_count) {
>> + pr_err(FW_BUG "GT block present, but frame count is zero.");
>> + return -ENODEV;
>> + }
>> +
>> + if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) {
>> + pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 
>> 8\n",
>> +block->timer_count);
>> + return -EINVAL;
>> + }
>> +
>> + timer_mem->cntctlbase = (phys_addr_t)block->block_address;
>> + /*
>> +  * The CNTCTLBase frame is 4KB (register offsets 0x000 - 0xFFC).
>> +  * See ARM DDI 0487A.k_iss10775, page I1-5129, Table I1-3
>> +  * "CNTCTLBase memory map".
>> +  */
>> + timer_mem->size = SZ_4K;
>> +
>> + gtdt_frame = (void *)block + block->timer_offset;
>> + if (gtdt_frame + block->timer_count != (void *)block + 
>> block->header.length)
>> + return -EINVAL;
>> +
>> + /*
>> +  * Get the GT timer Frame data for every GT Block Timer
>> +  */
>> + for (i = 0, j = 0; i < block->timer_count; i++, gtdt_frame++) {
>> + struct arch_timer_mem_frame *frame = &timer_mem->frame[j];
>> +
>> + if (gtdt_frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)
>> + continue;
>> +
>> + if (!gtdt_frame->base_address || !gtdt_frame->timer_interrupt)
>> + return -EINVAL;
>> +
>> + frame->phys_irq = map_gt_gsi(gtdt_frame->timer_interrupt,
>> +  gtdt_frame->timer_flags);
>> + if (frame->phys_irq <= 0) {
>> + pr_warn("failed to map physical timer irq in frame 
>> %d.\n",
>> + i)

Re: [PATCH v22 02/11] clocksource: arm_arch_timer: separate out device-tree code and remove arch_timer_detect_rate

2017-03-29 Thread Fu Wei

On 29 March 2017 at 22:41, Daniel Lezcano  wrote:
> On Wed, Mar 29, 2017 at 01:11:58PM +0800, Fu Wei wrote:
>> Hi Daniel,
>>
>> On 29 March 2017 at 11:41, Fu Wei  wrote:
>> > Hi Daniel,
>> >
>> > Great thanks for your review, allow me to answer your question below:
>> >
>> > On 28 March 2017 at 22:58, Daniel Lezcano  
>> > wrote:
>> >> On Wed, Mar 22, 2017 at 12:31:13AM +0800, fu@linaro.org wrote:
>> >>> From: Fu Wei 
>> >>>
>> >>> Currently, the counter frequency detection call(arch_timer_detect_rate)
>> >>> includes getting the frequency from the device-tree property, the per-cpu
>> >>> arch-timer and the memory-mapped (MMIO) timer interfaces.
>> >>> But reading device-tree property will be needed only when system boot 
>> >>> with
>> >>> device-tree, and reading from the per-cpu arch-timer and the 
>> >>> memory-mapped
>> >>> (MMIO) timer interfaces will be needed only when the system initializes
>> >>> the relevant timer.
>> >>>
>> >>> This patch separates out device-tree code, keep them in device-tree init
>> >>> function, and removes arch_timer_detect_rate founction, then uses the
>> >>> arch_timer_get_cntfrq and arch_timer_mem_get_cntfrq directly.
>> >>>
>> >>> Signed-off-by: Fu Wei 
>> >>> ---
>> >>>  drivers/clocksource/arm_arch_timer.c | 58 
>> >>> +++-
>> >>>  1 file changed, 30 insertions(+), 28 deletions(-)
>> >>>
>> >>> diff --git a/drivers/clocksource/arm_arch_timer.c 
>> >>> b/drivers/clocksource/arm_arch_timer.c
>> >>> index 843f923..29ca7d6 100644
>> >>> --- a/drivers/clocksource/arm_arch_timer.c
>> >>> +++ b/drivers/clocksource/arm_arch_timer.c
>> >>> @@ -560,30 +560,6 @@ static u32 arch_timer_mem_get_cntfrq(void __iomem 
>> >>> *cntbase)
>> >>>   return readl_relaxed(cntbase + CNTFRQ);
>> >>>  }
>> >>>
>> >>> -static void
>> >>> -arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
>> >>> -{
>> >>> - /* Who has more than one independent system counter? */
>> >>> - if (arch_timer_rate)
>> >>> - return;
>> >>> -
>> >>> - /*
>> >>> -  * Try to determine the frequency from the device tree or CNTFRQ,
>> >>> -  * if ACPI is enabled, get the frequency from CNTFRQ ONLY.
>> >>> -  */
>> >>> - if (!acpi_disabled ||
>> >>> - of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) 
>> >>> {
>> >>> - if (cntbase)
>> >>> - arch_timer_rate = 
>> >>> arch_timer_mem_get_cntfrq(cntbase);
>> >>> - else
>> >>> - arch_timer_rate = arch_timer_get_cntfrq();
>> >>> - }
>> >>> -
>> >>> - /* Check the timer frequency. */
>> >>> - if (arch_timer_rate == 0)
>> >>> - pr_warn("frequency not available\n");
>> >>> -}
>> >>> -
>> >>>  static void arch_timer_banner(unsigned type)
>> >>>  {
>> >>>   pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
>> >>> @@ -958,7 +934,17 @@ static int __init arch_timer_of_init(struct 
>> >>> device_node *np)
>> >>>   for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; 
>> >>> i++)
>> >>>   arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
>> >>>
>> >>> - arch_timer_detect_rate(NULL, np);
>> >>> + /*
>> >>> +  * Try to determine the frequency from the device tree,
>> >>> +  * if fail, get the frequency from the sysreg CNTFRQ.
>> >>> +  */
>> >>> + if (!arch_timer_rate &&
>> >>
>> >> This variable is set only if "arm,armv7-timer" and "arm,armv7-timer-mem" 
>> >> are
>> >> declared together in the DT, right ?
>> >>
>> >> Two declarations for a single variable ? Ignore the !arch_timer_rate.
>> >
>> > In this fu

Re: [PATCH v22 07/11] acpi/arm64: Add GTDT table parse driver

2017-03-29 Thread Fu Wei

On 29 March 2017 at 22:29, Fu Wei  wrote:
> Hi Lorenzo,
>
> On 28 March 2017 at 19:35, Lorenzo Pieralisi  
> wrote:
>> On Wed, Mar 22, 2017 at 12:31:18AM +0800, fu@linaro.org wrote:
>>> From: Fu Wei 
>>>
>>> This patch adds support for parsing arch timer info in GTDT,
>>> provides some kernel APIs to parse all the PPIs and
>>> always-on info in GTDT and export them.
>>>
>>> By this driver, we can simplify arm_arch_timer drivers, and
>>> separate the ACPI GTDT knowledge from it.
>>>
>>> Signed-off-by: Fu Wei 
>>> Signed-off-by: Hanjun Guo 
>>> Acked-by: Rafael J. Wysocki 
>>
>> Acked-by: Lorenzo Pieralisi 
>>
>> Some nits below.
>>
>>> Tested-by: Xiongfeng Wang 
>>> Reviewed-by: Hanjun Guo 
>>> Tested-by: Hanjun Guo 
>>> ---
>>>  arch/arm64/Kconfig  |   1 +
>>>  drivers/acpi/arm64/Kconfig  |   3 +
>>>  drivers/acpi/arm64/Makefile |   1 +
>>>  drivers/acpi/arm64/gtdt.c   | 157 
>>> 
>>>  include/linux/acpi.h|   6 ++
>>>  5 files changed, 168 insertions(+)
>>>
>>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>>> index 3741859..7e2baec 100644
>>> --- a/arch/arm64/Kconfig
>>> +++ b/arch/arm64/Kconfig
>>> @@ -2,6 +2,7 @@ config ARM64
>>>   def_bool y
>>>   select ACPI_CCA_REQUIRED if ACPI
>>>   select ACPI_GENERIC_GSI if ACPI
>>> + select ACPI_GTDT if ACPI
>>>   select ACPI_REDUCED_HARDWARE_ONLY if ACPI
>>>   select ACPI_MCFG if ACPI
>>>   select ACPI_SPCR_TABLE if ACPI
>>> diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig
>>> index 4616da4..5a6f80f 100644
>>> --- a/drivers/acpi/arm64/Kconfig
>>> +++ b/drivers/acpi/arm64/Kconfig
>>> @@ -4,3 +4,6 @@
>>>
>>>  config ACPI_IORT
>>>   bool
>>> +
>>> +config ACPI_GTDT
>>> + bool
>>> diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile
>>> index 72331f2..1017def 100644
>>> --- a/drivers/acpi/arm64/Makefile
>>> +++ b/drivers/acpi/arm64/Makefile
>>> @@ -1 +1,2 @@
>>>  obj-$(CONFIG_ACPI_IORT)  += iort.o
>>> +obj-$(CONFIG_ACPI_GTDT)  += gtdt.o
>>> diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
>>> new file mode 100644
>>> index 000..8a03b4b
>>> --- /dev/null
>>> +++ b/drivers/acpi/arm64/gtdt.c
>>> @@ -0,0 +1,157 @@
>>> +/*
>>> + * ARM Specific GTDT table Support
>>> + *
>>> + * Copyright (C) 2016, Linaro Ltd.
>>> + * Author: Daniel Lezcano 
>>> + * Fu Wei 
>>> + * Hanjun Guo 
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> + */
>>> +
>>> +#include 
>>> +#include 
>>> +#include 
>>> +
>>> +#include 
>>> +
>>> +#undef pr_fmt
>>> +#define pr_fmt(fmt) "ACPI GTDT: " fmt
>>> +
>>> +/**
>>> + * struct acpi_gtdt_descriptor - Store the key info of GTDT for all 
>>> functions
>>> + * @gtdt:The pointer to the struct acpi_table_gtdt of GTDT table.
>>> + * @gtdt_end:The pointer to the end of GTDT table.
>>> + * @platform_timer:  The pointer to the start of Platform Timer Structure
>>> + *
>>> + * The struct store the key info of GTDT table, it should be initialized by
>>> + * acpi_gtdt_init.
>>> + */
>>> +struct acpi_gtdt_descriptor {
>>> + struct acpi_table_gtdt *gtdt;
>>> + void *gtdt_end;
>>> + void *platform_timer;
>>> +};
>>> +
>>> +static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
>>> +
>>> +static int __init map_gt_gsi(u32 interrupt, u32 flags)
>>> +{
>>> + int trigger, polarity;
>>> +
>>> + trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
>>> + : ACPI_LEVEL_SENSITIVE;
>>> +
>>> + polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
>>> + : ACPI_ACTIVE_HIGH;
>>> +
>>> + return acpi_register_gsi(NULL, interrupt, trigger, polarity);
>>> +}
>>&g

Re: [PATCH v22 07/11] acpi/arm64: Add GTDT table parse driver

2017-03-29 Thread Fu Wei

Hi Lorenzo,

On 28 March 2017 at 19:35, Lorenzo Pieralisi  wrote:
> On Wed, Mar 22, 2017 at 12:31:18AM +0800, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> This patch adds support for parsing arch timer info in GTDT,
>> provides some kernel APIs to parse all the PPIs and
>> always-on info in GTDT and export them.
>>
>> By this driver, we can simplify arm_arch_timer drivers, and
>> separate the ACPI GTDT knowledge from it.
>>
>> Signed-off-by: Fu Wei 
>> Signed-off-by: Hanjun Guo 
>> Acked-by: Rafael J. Wysocki 
>
> Acked-by: Lorenzo Pieralisi 
>
> Some nits below.
>
>> Tested-by: Xiongfeng Wang 
>> Reviewed-by: Hanjun Guo 
>> Tested-by: Hanjun Guo 
>> ---
>>  arch/arm64/Kconfig  |   1 +
>>  drivers/acpi/arm64/Kconfig  |   3 +
>>  drivers/acpi/arm64/Makefile |   1 +
>>  drivers/acpi/arm64/gtdt.c   | 157 
>> 
>>  include/linux/acpi.h|   6 ++
>>  5 files changed, 168 insertions(+)
>>
>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>> index 3741859..7e2baec 100644
>> --- a/arch/arm64/Kconfig
>> +++ b/arch/arm64/Kconfig
>> @@ -2,6 +2,7 @@ config ARM64
>>   def_bool y
>>   select ACPI_CCA_REQUIRED if ACPI
>>   select ACPI_GENERIC_GSI if ACPI
>> + select ACPI_GTDT if ACPI
>>   select ACPI_REDUCED_HARDWARE_ONLY if ACPI
>>   select ACPI_MCFG if ACPI
>>   select ACPI_SPCR_TABLE if ACPI
>> diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig
>> index 4616da4..5a6f80f 100644
>> --- a/drivers/acpi/arm64/Kconfig
>> +++ b/drivers/acpi/arm64/Kconfig
>> @@ -4,3 +4,6 @@
>>
>>  config ACPI_IORT
>>   bool
>> +
>> +config ACPI_GTDT
>> + bool
>> diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile
>> index 72331f2..1017def 100644
>> --- a/drivers/acpi/arm64/Makefile
>> +++ b/drivers/acpi/arm64/Makefile
>> @@ -1 +1,2 @@
>>  obj-$(CONFIG_ACPI_IORT)  += iort.o
>> +obj-$(CONFIG_ACPI_GTDT)  += gtdt.o
>> diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
>> new file mode 100644
>> index 000..8a03b4b
>> --- /dev/null
>> +++ b/drivers/acpi/arm64/gtdt.c
>> @@ -0,0 +1,157 @@
>> +/*
>> + * ARM Specific GTDT table Support
>> + *
>> + * Copyright (C) 2016, Linaro Ltd.
>> + * Author: Daniel Lezcano 
>> + * Fu Wei 
>> + * Hanjun Guo 
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#include 
>> +
>> +#undef pr_fmt
>> +#define pr_fmt(fmt) "ACPI GTDT: " fmt
>> +
>> +/**
>> + * struct acpi_gtdt_descriptor - Store the key info of GTDT for all 
>> functions
>> + * @gtdt:The pointer to the struct acpi_table_gtdt of GTDT table.
>> + * @gtdt_end:The pointer to the end of GTDT table.
>> + * @platform_timer:  The pointer to the start of Platform Timer Structure
>> + *
>> + * The struct store the key info of GTDT table, it should be initialized by
>> + * acpi_gtdt_init.
>> + */
>> +struct acpi_gtdt_descriptor {
>> + struct acpi_table_gtdt *gtdt;
>> + void *gtdt_end;
>> + void *platform_timer;
>> +};
>> +
>> +static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
>> +
>> +static int __init map_gt_gsi(u32 interrupt, u32 flags)
>> +{
>> + int trigger, polarity;
>> +
>> + trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
>> + : ACPI_LEVEL_SENSITIVE;
>> +
>> + polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
>> + : ACPI_ACTIVE_HIGH;
>> +
>> + return acpi_register_gsi(NULL, interrupt, trigger, polarity);
>> +}
>> +
>> +/**
>> + * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
>> + * @type:the type of PPI.
>> + *
>> + * Note: Linux on arm64 isn't supported on the secure side.
>
> Note: Secure state is not managed by the kernel on ARM64 systems.
>
> Is that what you wanted to say ?
>
>> + * So we only handle the non-secure timer PPIs,
>> + * ARCH_TIMER_PHYS_SECURE_PPI is treated as invalid type.
>> + *
>> + * Return: the mapped PPI value, 0 if err

Re: [PATCH v22 07/11] acpi/arm64: Add GTDT table parse driver

2017-03-29 Thread Fu Wei

Hi Lorenzo,

On 29 March 2017 at 19:33, Lorenzo Pieralisi  wrote:
> On Wed, Mar 29, 2017 at 06:48:26PM +0800, Fu Wei wrote:
>> Hi Lorenzo,
>>
>> On 29 March 2017 at 18:21, Lorenzo Pieralisi  
>> wrote:
>> > On Wed, Mar 29, 2017 at 05:48:17PM +0800, Fu Wei wrote:
>> >
>> > [...]
>> >
>> >>  * @platform_timer_count: It points to a integer variable which is used
>> >>  *   for storing the number of platform timers.
>> >>  *   This pointer could be NULL, if the caller
>> >>  *   doesn't need this info.
>> >>
>> >> >
>> >> >> + *
>> >> >> + * Return: 0 if success, -EINVAL if error.
>> >> >> + */
>> >> >> +int __init acpi_gtdt_init(struct acpi_table_header *table,
>> >> >> +   int *platform_timer_count)
>> >> >> +{
>> >> >> + int ret = 0;
>> >> >> + int timer_count = 0;
>> >> >> + void *platform_timer = NULL;
>> >> >> + struct acpi_table_gtdt *gtdt;
>> >> >> +
>> >> >> + gtdt = container_of(table, struct acpi_table_gtdt, header);
>> >> >> + acpi_gtdt_desc.gtdt = gtdt;
>> >> >> + acpi_gtdt_desc.gtdt_end = (void *)table + table->length;
>> >> >> +
>> >> >> + if (table->revision < 2)
>> >> >> + pr_warn("Revision:%d doesn't support Platform Timers.\n",
>> >> >> + table->revision);
>> >> >
>> >> > Ok, two points here. First, I am not sure why you should warn if the
>> >> > table revision is < 2, is that a FW bug ? I do not think it is, you
>> >> > can just return 0.
>> >>
>> >> I used pr_debug here before v20, then I got Hanjun's suggestion:
>> >> ---
>> >> GTDT table revision is updated to 2 in ACPI 5.1, we will
>> >> not support ACPI version under 5.1 and disable ACPI in FADT
>> >> parse before this code is called, so if we get revision
>> >> <2 here, I think we need to print warning (we need to keep
>> >> the firmware stick to the spec on ARM64).
>> >> ---
>> >> https://lkml.org/lkml/2017/1/19/82
>> >>
>> >> So I started to use pr_warn.
>> >
>> > Thanks for the explanation, so it is a FW bug and the warning
>> > is granted :) just leave it there.
>> >
>> > Still, please check my comment on acpi_gtdt_init() being called
>> > multiple times on patch 11.
>>
>> Thanks
>>
>> For calling acpi_gtdt_init() twice:
>> (1) 1st time: in early boot(bootmem), for init arch_timer and
>> memory-mapped timer, we initialize the acpi_gtdt_desc.
>> you can see that all the items in this struct are pointer.
>> (2) 2nd time: when system switch from bootmem to slab, all the
>> pointers in the acpi_gtdt_desc are invalid, so we have to
>> re-initialize(re-map) them.
>>
>> I have tested it, if we don't re-initialize  the acpi_gtdt_desc,
>> system will go wrong.
>
> Ok, that's what I feared. My complaint on patch 11 is that:
>
> 1) Stashing the GTDT pointer in acpi_gtdt_desc is not needed to
>parse SBSA watchdogs

The acpi_gtdt_desc is for sharing the info between acpi_gtdt_init and
acpi_gtdt_c3stop, ;acpi_gtdt_map_ppi
I re-use it in parsing SBSA watchdogs, because I try to re-use acpi_gtdt_init.

> 2) It is not clear at all from the code or the commit log _why_ you
>need to call acpi_gtdt_init() again (ie technically you don't need
>to call it - you grab a valid pointer to the table and parse the
>watchdogs in the _same_ function gtdt_sbsa_gwdt_init())

yes, we can avoid calling acpi_gtdt_init(), do the same thing in
parsing SBSA watchdogs info.
But if we will do the same thing(getting gtdt, platform_timer,
timer_count), why not just re-using the same function?

So my suggestion is that:
Could we re-use acpi_gtdt_init, and a comment at the head of SBSA
watchdogs info parsing function to summarize this issue?
The comment like this

Note: although the global variable acpi_gtdt_desc has been initialized
by acpi_gtdt_init, when we initialized arch_timer. But when we call this
function to get SBSA watchdogs info from GTDT, the system has switch
from bootmem  to slab, so the pointers in acpi_gtdt_desc are dated, we
need to  re-initialize(remap) them. So we call acpi_gtdt_init again here.

Is that OK for you? :-)

>
> I do not think there is much you can do to improve the arch timer gtdt
> interface (and it is too late for that anyway) but in patch 11 it would
> be ideal if you avoid calling acpi_gtdt_init() again, just parse GTDT
> entries and initialize the corresponding watchdogs (ie pointers stashed
> in acpi_gtdt_desc are stale anyway but that's __initdata so I can live
> with that).
>
> You should add comments to summarize this issue so that it can be
> easily understood by anyone maintaining this code, it is not crystal
> clear by reading the code why you need to multiple acpi_gtdt_init()
> calls and that's not a piffling detail.
>
> The ACPI patches are fine with me otherwise, I will complete the
> review shortly.
>
> Thanks !
> Lorenzo



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v22 07/11] acpi/arm64: Add GTDT table parse driver

2017-03-29 Thread Fu Wei

Hi Lorenzo,

On 29 March 2017 at 18:21, Lorenzo Pieralisi  wrote:
> On Wed, Mar 29, 2017 at 05:48:17PM +0800, Fu Wei wrote:
>
> [...]
>
>>  * @platform_timer_count: It points to a integer variable which is used
>>  *   for storing the number of platform timers.
>>  *   This pointer could be NULL, if the caller
>>  *   doesn't need this info.
>>
>> >
>> >> + *
>> >> + * Return: 0 if success, -EINVAL if error.
>> >> + */
>> >> +int __init acpi_gtdt_init(struct acpi_table_header *table,
>> >> +   int *platform_timer_count)
>> >> +{
>> >> + int ret = 0;
>> >> + int timer_count = 0;
>> >> + void *platform_timer = NULL;
>> >> + struct acpi_table_gtdt *gtdt;
>> >> +
>> >> + gtdt = container_of(table, struct acpi_table_gtdt, header);
>> >> + acpi_gtdt_desc.gtdt = gtdt;
>> >> + acpi_gtdt_desc.gtdt_end = (void *)table + table->length;
>> >> +
>> >> + if (table->revision < 2)
>> >> + pr_warn("Revision:%d doesn't support Platform Timers.\n",
>> >> + table->revision);
>> >
>> > Ok, two points here. First, I am not sure why you should warn if the
>> > table revision is < 2, is that a FW bug ? I do not think it is, you
>> > can just return 0.
>>
>> I used pr_debug here before v20, then I got Hanjun's suggestion:
>> ---
>> GTDT table revision is updated to 2 in ACPI 5.1, we will
>> not support ACPI version under 5.1 and disable ACPI in FADT
>> parse before this code is called, so if we get revision
>> <2 here, I think we need to print warning (we need to keep
>> the firmware stick to the spec on ARM64).
>> ---
>> https://lkml.org/lkml/2017/1/19/82
>>
>> So I started to use pr_warn.
>
> Thanks for the explanation, so it is a FW bug and the warning
> is granted :) just leave it there.
>
> Still, please check my comment on acpi_gtdt_init() being called
> multiple times on patch 11.

Thanks

For calling acpi_gtdt_init() twice:
(1) 1st time: in early boot(bootmem), for init arch_timer and
memory-mapped timer, we initialize the acpi_gtdt_desc.
you can see that all the items in this struct are pointer.
(2) 2nd time: when system switch from bootmem to slab, all the
pointers in the acpi_gtdt_desc are invalid, so we have to
re-initialize(re-map) them.

I have tested it, if we don't re-initialize  the acpi_gtdt_desc,
system will go wrong.

>
> Thanks,
> Lorenzo



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v22 07/11] acpi/arm64: Add GTDT table parse driver

2017-03-29 Thread Fu Wei

Hi Lorenzo,

Great thanks for your review and help, I will take most of your suggestions,
But one or two comments have been discussed in previous patchset,
please allow me to explain these. :-)

On 28 March 2017 at 19:35, Lorenzo Pieralisi  wrote:
> On Wed, Mar 22, 2017 at 12:31:18AM +0800, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> This patch adds support for parsing arch timer info in GTDT,
>> provides some kernel APIs to parse all the PPIs and
>> always-on info in GTDT and export them.
>>
>> By this driver, we can simplify arm_arch_timer drivers, and
>> separate the ACPI GTDT knowledge from it.
>>
>> Signed-off-by: Fu Wei 
>> Signed-off-by: Hanjun Guo 
>> Acked-by: Rafael J. Wysocki 
>
> Acked-by: Lorenzo Pieralisi 
>
> Some nits below.

Great thanks!

>
>> Tested-by: Xiongfeng Wang 
>> Reviewed-by: Hanjun Guo 
>> Tested-by: Hanjun Guo 
>> ---
>>  arch/arm64/Kconfig  |   1 +
>>  drivers/acpi/arm64/Kconfig  |   3 +
>>  drivers/acpi/arm64/Makefile |   1 +
>>  drivers/acpi/arm64/gtdt.c   | 157 
>> 
>>  include/linux/acpi.h|   6 ++
>>  5 files changed, 168 insertions(+)
>>
>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>> index 3741859..7e2baec 100644
>> --- a/arch/arm64/Kconfig
>> +++ b/arch/arm64/Kconfig
>> @@ -2,6 +2,7 @@ config ARM64
>>   def_bool y
>>   select ACPI_CCA_REQUIRED if ACPI
>>   select ACPI_GENERIC_GSI if ACPI
>> + select ACPI_GTDT if ACPI
>>   select ACPI_REDUCED_HARDWARE_ONLY if ACPI
>>   select ACPI_MCFG if ACPI
>>   select ACPI_SPCR_TABLE if ACPI
>> diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig
>> index 4616da4..5a6f80f 100644
>> --- a/drivers/acpi/arm64/Kconfig
>> +++ b/drivers/acpi/arm64/Kconfig
>> @@ -4,3 +4,6 @@
>>
>>  config ACPI_IORT
>>   bool
>> +
>> +config ACPI_GTDT
>> + bool
>> diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile
>> index 72331f2..1017def 100644
>> --- a/drivers/acpi/arm64/Makefile
>> +++ b/drivers/acpi/arm64/Makefile
>> @@ -1 +1,2 @@
>>  obj-$(CONFIG_ACPI_IORT)  += iort.o
>> +obj-$(CONFIG_ACPI_GTDT)  += gtdt.o
>> diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
>> new file mode 100644
>> index 000..8a03b4b
>> --- /dev/null
>> +++ b/drivers/acpi/arm64/gtdt.c
>> @@ -0,0 +1,157 @@
>> +/*
>> + * ARM Specific GTDT table Support
>> + *
>> + * Copyright (C) 2016, Linaro Ltd.
>> + * Author: Daniel Lezcano 
>> + * Fu Wei 
>> + * Hanjun Guo 
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#include 
>> +
>> +#undef pr_fmt
>> +#define pr_fmt(fmt) "ACPI GTDT: " fmt
>> +
>> +/**
>> + * struct acpi_gtdt_descriptor - Store the key info of GTDT for all 
>> functions
>> + * @gtdt:The pointer to the struct acpi_table_gtdt of GTDT table.
>> + * @gtdt_end:The pointer to the end of GTDT table.
>> + * @platform_timer:  The pointer to the start of Platform Timer Structure
>> + *
>> + * The struct store the key info of GTDT table, it should be initialized by
>> + * acpi_gtdt_init.
>> + */
>> +struct acpi_gtdt_descriptor {
>> + struct acpi_table_gtdt *gtdt;
>> + void *gtdt_end;
>> + void *platform_timer;
>> +};
>> +
>> +static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
>> +
>> +static int __init map_gt_gsi(u32 interrupt, u32 flags)
>> +{
>> + int trigger, polarity;
>> +
>> + trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
>> + : ACPI_LEVEL_SENSITIVE;
>> +
>> + polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
>> + : ACPI_ACTIVE_HIGH;
>> +
>> + return acpi_register_gsi(NULL, interrupt, trigger, polarity);
>> +}
>> +
>> +/**
>> + * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
>> + * @type:the type of PPI.
>> + *
>> + * Note: Linux on arm64 isn't supported on the secure side.
>
> Note: Secure state is not managed by the kernel on ARM64 systems.
>
> Is that what yo

Re: [PATCH v22 02/11] clocksource: arm_arch_timer: separate out device-tree code and remove arch_timer_detect_rate

2017-03-28 Thread Fu Wei

Hi Daniel,

On 29 March 2017 at 11:41, Fu Wei  wrote:
> Hi Daniel,
>
> Great thanks for your review, allow me to answer your question below:
>
> On 28 March 2017 at 22:58, Daniel Lezcano  wrote:
>> On Wed, Mar 22, 2017 at 12:31:13AM +0800, fu@linaro.org wrote:
>>> From: Fu Wei 
>>>
>>> Currently, the counter frequency detection call(arch_timer_detect_rate)
>>> includes getting the frequency from the device-tree property, the per-cpu
>>> arch-timer and the memory-mapped (MMIO) timer interfaces.
>>> But reading device-tree property will be needed only when system boot with
>>> device-tree, and reading from the per-cpu arch-timer and the memory-mapped
>>> (MMIO) timer interfaces will be needed only when the system initializes
>>> the relevant timer.
>>>
>>> This patch separates out device-tree code, keep them in device-tree init
>>> function, and removes arch_timer_detect_rate founction, then uses the
>>> arch_timer_get_cntfrq and arch_timer_mem_get_cntfrq directly.
>>>
>>> Signed-off-by: Fu Wei 
>>> ---
>>>  drivers/clocksource/arm_arch_timer.c | 58 
>>> +++-
>>>  1 file changed, 30 insertions(+), 28 deletions(-)
>>>
>>> diff --git a/drivers/clocksource/arm_arch_timer.c 
>>> b/drivers/clocksource/arm_arch_timer.c
>>> index 843f923..29ca7d6 100644
>>> --- a/drivers/clocksource/arm_arch_timer.c
>>> +++ b/drivers/clocksource/arm_arch_timer.c
>>> @@ -560,30 +560,6 @@ static u32 arch_timer_mem_get_cntfrq(void __iomem 
>>> *cntbase)
>>>   return readl_relaxed(cntbase + CNTFRQ);
>>>  }
>>>
>>> -static void
>>> -arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
>>> -{
>>> - /* Who has more than one independent system counter? */
>>> - if (arch_timer_rate)
>>> - return;
>>> -
>>> - /*
>>> -  * Try to determine the frequency from the device tree or CNTFRQ,
>>> -  * if ACPI is enabled, get the frequency from CNTFRQ ONLY.
>>> -  */
>>> - if (!acpi_disabled ||
>>> - of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) {
>>> - if (cntbase)
>>> - arch_timer_rate = arch_timer_mem_get_cntfrq(cntbase);
>>> - else
>>> - arch_timer_rate = arch_timer_get_cntfrq();
>>> - }
>>> -
>>> - /* Check the timer frequency. */
>>> - if (arch_timer_rate == 0)
>>> - pr_warn("frequency not available\n");
>>> -}
>>> -
>>>  static void arch_timer_banner(unsigned type)
>>>  {
>>>   pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
>>> @@ -958,7 +934,17 @@ static int __init arch_timer_of_init(struct 
>>> device_node *np)
>>>   for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; 
>>> i++)
>>>   arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
>>>
>>> - arch_timer_detect_rate(NULL, np);
>>> + /*
>>> +  * Try to determine the frequency from the device tree,
>>> +  * if fail, get the frequency from the sysreg CNTFRQ.
>>> +  */
>>> + if (!arch_timer_rate &&
>>
>> This variable is set only if "arm,armv7-timer" and "arm,armv7-timer-mem" are
>> declared together in the DT, right ?
>>
>> Two declarations for a single variable ? Ignore the !arch_timer_rate.
>
> In this function, we try to initialize per-CPU arm arch_timer by DT.
> this "!arch_timer_rate" is for testing that if we have got system
> counter frequency from the memory-mapped timer. If so, we just skip
> getting the frequency from DT or sysreg cntfrq again.
> This variable is set only if "arm,armv7-timer-mem" is initialized
> earlier than "arm,armv7-timer", in another word, maybe the node of
> "arm,armv7-timer-mem" is declared earlier than  "arm,armv7-timer-mem"
> one in DT.
>
> we do this check is for keeping the same init logic as before in the
> DT, try to avoid any possibility of  breaking devices which boot by
> DT.
>
>>
>>> + of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
>>> + arch_timer_rate = arch_timer_get_cntfrq();
>>> + if (!arch_timer_rate) {
>>> + pr_err(FW_BUG &quo

Re: [PATCH v22 02/11] clocksource: arm_arch_timer: separate out device-tree code and remove arch_timer_detect_rate

2017-03-28 Thread Fu Wei

Hi Daniel,

Great thanks for your review, allow me to answer your question below:

On 28 March 2017 at 22:58, Daniel Lezcano  wrote:
> On Wed, Mar 22, 2017 at 12:31:13AM +0800, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> Currently, the counter frequency detection call(arch_timer_detect_rate)
>> includes getting the frequency from the device-tree property, the per-cpu
>> arch-timer and the memory-mapped (MMIO) timer interfaces.
>> But reading device-tree property will be needed only when system boot with
>> device-tree, and reading from the per-cpu arch-timer and the memory-mapped
>> (MMIO) timer interfaces will be needed only when the system initializes
>> the relevant timer.
>>
>> This patch separates out device-tree code, keep them in device-tree init
>> function, and removes arch_timer_detect_rate founction, then uses the
>> arch_timer_get_cntfrq and arch_timer_mem_get_cntfrq directly.
>>
>> Signed-off-by: Fu Wei 
>> ---
>>  drivers/clocksource/arm_arch_timer.c | 58 
>> +++-
>>  1 file changed, 30 insertions(+), 28 deletions(-)
>>
>> diff --git a/drivers/clocksource/arm_arch_timer.c 
>> b/drivers/clocksource/arm_arch_timer.c
>> index 843f923..29ca7d6 100644
>> --- a/drivers/clocksource/arm_arch_timer.c
>> +++ b/drivers/clocksource/arm_arch_timer.c
>> @@ -560,30 +560,6 @@ static u32 arch_timer_mem_get_cntfrq(void __iomem 
>> *cntbase)
>>   return readl_relaxed(cntbase + CNTFRQ);
>>  }
>>
>> -static void
>> -arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
>> -{
>> - /* Who has more than one independent system counter? */
>> - if (arch_timer_rate)
>> - return;
>> -
>> - /*
>> -  * Try to determine the frequency from the device tree or CNTFRQ,
>> -  * if ACPI is enabled, get the frequency from CNTFRQ ONLY.
>> -  */
>> - if (!acpi_disabled ||
>> - of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) {
>> - if (cntbase)
>> - arch_timer_rate = arch_timer_mem_get_cntfrq(cntbase);
>> - else
>> - arch_timer_rate = arch_timer_get_cntfrq();
>> - }
>> -
>> - /* Check the timer frequency. */
>> - if (arch_timer_rate == 0)
>> - pr_warn("frequency not available\n");
>> -}
>> -
>>  static void arch_timer_banner(unsigned type)
>>  {
>>   pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
>> @@ -958,7 +934,17 @@ static int __init arch_timer_of_init(struct device_node 
>> *np)
>>   for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++)
>>   arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
>>
>> - arch_timer_detect_rate(NULL, np);
>> + /*
>> +  * Try to determine the frequency from the device tree,
>> +  * if fail, get the frequency from the sysreg CNTFRQ.
>> +  */
>> + if (!arch_timer_rate &&
>
> This variable is set only if "arm,armv7-timer" and "arm,armv7-timer-mem" are
> declared together in the DT, right ?
>
> Two declarations for a single variable ? Ignore the !arch_timer_rate.

In this function, we try to initialize per-CPU arm arch_timer by DT.
this "!arch_timer_rate" is for testing that if we have got system
counter frequency from the memory-mapped timer. If so, we just skip
getting the frequency from DT or sysreg cntfrq again.
This variable is set only if "arm,armv7-timer-mem" is initialized
earlier than "arm,armv7-timer", in another word, maybe the node of
"arm,armv7-timer-mem" is declared earlier than  "arm,armv7-timer-mem"
one in DT.

we do this check is for keeping the same init logic as before in the
DT, try to avoid any possibility of  breaking devices which boot by
DT.

>
>> + of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
>> + arch_timer_rate = arch_timer_get_cntfrq();
>> + if (!arch_timer_rate) {
>> + pr_err(FW_BUG "frequency not available.\n");
>> + return -EINVAL;
>> + }
>
> Please, clarify this block, the conditions are unclear.

this "!arch_timer_rate" is for verifying that if the system counter
frequency we just got from DT or sysreg cntfrq is valid(non-zero).

So here, you can see I check arch_timer_rate twice, but they are for
different cases.

>
>>
>>   arch_timer_c3stop = !of_property_read_bool(np, "always-on&quo

Re: [PATCH v22 00/11] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-03-28 Thread Fu Wei

Hi Mark,

On 28 March 2017 at 21:05, Mark Rutland  wrote:
> On Tue, Mar 28, 2017 at 08:34:12PM +0800, Fu Wei wrote:
>> Hi Jon,
>>
>> Thanks for your email
>>  An hour ago, I just got some feedback from Lorenzo, will update my
>> patchset ASAP according to his suggestion.
>>
>> But I still need some feedback form Mark, I can see some progress here:
>> https://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git/log/?h=arch-timer/gtdt
>>
>> I guess I should rebase my patchset to his gtdt branch for v23.
>>
>> So now, I am waiting for Mark's feedback to move on.
>
> Sorry for the delay; I have not had the time to focus on this as I would
> like to. I'm happy with patches 1-4, but from patch 5 onwards, there's
> one change I'd like to see.
>
> I'd prefer that mmio timer frame rame N was always stored at
> arch_timer_mem::frame[N], rather than arch_timer_mem::frame[] being in
> an arbitrary order. That will make arch_timer_mem_frame::frame_nr
> redundant.
>
> To allow arch_timer_mem::frame[] this to be sparse, I'm happy to have a
> bool arch_timer_mem_frame::valid field that we set when probing each
> frame. Then we don't need arch_timer_mem::num_frames.
>
> This will make iterating over the frames far less confusing, and makes
> it simple to detect when a frame number is erroneously reused.
>
> Otherwise, I'm largely happy to pick the rest and apply any fixups
> myself.

Great thanks for your feedback!
I will follow your suggestion to improve my patches, then post it in a day.

So I will rebase my patchset on arch-timer/gtdt branch of your REPO
https://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git/log/?h=arch-timer/gtdt

>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v22 00/11] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-03-28 Thread Fu Wei

Hi Jon,

Thanks for your email
 An hour ago, I just got some feedback from Lorenzo, will update my
patchset ASAP according to his suggestion.

But I still need some feedback form Mark, I can see some progress here:
https://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git/log/?h=arch-timer/gtdt

I guess I should rebase my patchset to his gtdt branch for v23.

So now, I am waiting for Mark's feedback to move on.

On 28 March 2017 at 19:32, Jon Masters  wrote:
> Anyone got review comments for this series?
>
> On 03/21/2017 12:31 PM, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> This patchset:
>> (1)Preparation for adding GTDT support in arm_arch_timer:
>> 1. Introduce a wrapper function to get the frequency from mmio.
>> 2. separate out device-tree code from arch_timer_detect_rate
>> 3. remove arch_timer_detect_rate use arch_timer_*get_cntfrq directly
>> 4. Refactor arch_timer_needs_probing, and move it into DT init call
>> 5. Introduce some new structs and refactor the MMIO timer init code
>> for reusing some common code.
>>
>> (2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c
>> Parse all kinds of timer in GTDT table of ACPI:arch timer,
>> memory-mapped timer and SBSA Generic Watchdog timer.
>> This driver can help to simplify all the relevant timer drivers,
>> and separate all the ACPI GTDT knowledge from them.
>>
>> (3)Simplify ACPI code for arm_arch_timer
>>
>> (4)Add GTDT support for ARM memory-mapped timer.
>>
>> This patchset has been tested on the following platforms with ACPI enabled:
>> (1)ARM Foundation v8 model
>>
>> Changelog:
>> v22: https://lkml.org/lkml/2017/3/21/
>>  Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
>> arch-timer/cleanup
>>  Only Introduce arch_timer_mem_get_cntfrq to get the frequency from mmio.
>>  Merged patch 2,3(about arch_timer_detect_rate).
>>  Keep arch_timer_rate, do NOT split it for different types of timer.
>>  Improve  memory-mapped timer support by comments and variable name:
>>  data-->timer_mem
>>  frame-->gtdt_frame
>>  Delete zero check for SBSA watchdog irq.
>>  Skip secure SBSA watchdog in GTDT driver.
>>  Delete Kconfig modification for SBSA watchdog driver.
>>  Delete no_irq, using nr_res instead.
>>
>> v21: https://lkml.org/lkml/2017/2/6/734
>>  Introduce two functions to get the frequency from mmio and sysreg.
>>  Remove arch_timer_detect_rate use arch_timer_get_*_freq directly
>>  Split arch_timer_rate for different types of timer.
>>  Skip secure timer frame in GTDT driver.
>>  Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
>> arch-timer/cleanup
>>  (The first 6 patches in v20 have been merged into arch-timer/cleanup 
>> branch)
>>
>> v20: https://lkml.org/lkml/2017/1/18/534
>>  Reorder the first 4 patches and split the 4th patches.
>>  Leave CNTHCTL_* as they originally were.
>>  Fix the bug in arch_timer_select_ppi.
>>  Split "Rework counter frequency detection" patch.
>>  Rework the arch_timer_detect_rate function.
>>  Improve the commit message of "Refactor MMIO timer probing".
>>  Rebase to 4.10.0-rc4
>>
>> v19: https://lkml.org/lkml/2016/12/21/25
>>  Fix a '\n' missing in a error message in arch_timer_mem_init.
>>  Add "request_mem_region" for ioremapping cntbase, according to
>>  f947ee1 clocksource/drivers/arm_arch_timer: Map frame with 
>> of_io_request_and_map()
>>  Rebase to 4.9.0-gfb779ff
>>
>> v18: https://lkml.org/lkml/2016/12/8/446
>>  Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init.
>>  Rebase to 4.9.0-rc8-g9269898
>>
>> v17: https://lkml.org/lkml/2016/11/25/140
>>  Take out some cleanups from 4/15.
>>  Merge 5/15 and 6/15, improve PPI determination code,
>>  improve commit message.
>>  Rework counter frequency detection.
>>  Move arch_timer_needs_of_probing into DT init call.
>>  Move Platform Timer scan loop back to timer init call to avoid 
>> allocating
>>  and free memory.
>>  Improve all the exported functions' comment.
>>
>> v16: https://lkml.org/lkml/2016/11/16/268
>>  Fix patchset problem about static enum ppi_nr of 01/13 in v15.
>>  Refactor arch_timer_detect_rate.
>>  Refactor arch_timer_needs_probing.
>>
>>

[PATCH v22 08/11] clocksource: arm_arch_timer: simplify ACPI support code.

2017-03-21 Thread fu . wei

From: Fu Wei 

The patch update arm_arch_timer driver to use the function
provided by the new GTDT driver of ACPI.
By this way, arm_arch_timer.c can be simplified, and separate
all the ACPI GTDT knowledge from this timer driver.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Tested-by: Xiongfeng Wang 
Reviewed-by: Hanjun Guo 
Tested-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 54 
 1 file changed, 17 insertions(+), 37 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 3ada5dc..ef747f3 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -1141,63 +1141,36 @@ static int __init arch_timer_mem_of_init(struct 
device_node *np)
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
   arch_timer_mem_of_init);
 
-#ifdef CONFIG_ACPI
-static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags)
-{
-   int trigger, polarity;
-
-   if (!interrupt)
-   return 0;
-
-   trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
-   : ACPI_LEVEL_SENSITIVE;
-
-   polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
-   : ACPI_ACTIVE_HIGH;
-
-   return acpi_register_gsi(NULL, interrupt, trigger, polarity);
-}
-
+#ifdef CONFIG_ACPI_GTDT
 /* Initialize per-processor generic timer */
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
int ret;
-   struct acpi_table_gtdt *gtdt;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("already initialized, skipping\n");
return -EINVAL;
}
 
-   gtdt = container_of(table, struct acpi_table_gtdt, header);
-
arch_timers_present |= ARCH_TIMER_TYPE_CP15;
 
-   arch_timer_ppi[ARCH_TIMER_PHYS_SECURE_PPI] =
-   map_generic_timer_interrupt(gtdt->secure_el1_interrupt,
-   gtdt->secure_el1_flags);
+   ret = acpi_gtdt_init(table, NULL);
+   if (ret) {
+   pr_err("Failed to init GTDT table.\n");
+   return ret;
+   }
 
arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI] =
-   map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt,
-   gtdt->non_secure_el1_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_PHYS_NONSECURE_PPI);
 
arch_timer_ppi[ARCH_TIMER_VIRT_PPI] =
-   map_generic_timer_interrupt(gtdt->virtual_timer_interrupt,
-   gtdt->virtual_timer_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_VIRT_PPI);
 
arch_timer_ppi[ARCH_TIMER_HYP_PPI] =
-   map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
-   gtdt->non_secure_el2_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_HYP_PPI);
 
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
 
-   /* Get the frequency from the sysreg CNTFRQ */
-   arch_timer_rate = arch_timer_get_cntfrq();
-   if (!arch_timer_rate) {
-   pr_err(FW_BUG "frequency not available.\n");
-   return -EINVAL;
-   }
-
arch_timer_uses_ppi = arch_timer_select_ppi();
if (!arch_timer_ppi[arch_timer_uses_ppi]) {
pr_err("No interrupt available, giving up\n");
@@ -1205,7 +1178,14 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
}
 
/* Always-on capability */
-   arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
+   arch_timer_c3stop = acpi_gtdt_c3stop(arch_timer_uses_ppi);
+
+   /* Get the frequency from the sysreg CNTFRQ */
+   arch_timer_rate = arch_timer_get_cntfrq();
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "frequency not available.\n");
+   return -EINVAL;
+   }
 
ret = arch_timer_register();
if (ret)
-- 
2.9.3

[PATCH v22 09/11] acpi/arm64: Add memory-mapped timer support in GTDT driver

2017-03-21 Thread fu . wei

From: Fu Wei 

On platforms booting with ACPI, architected memory-mapped timers'
configuration data is provided by firmware through the ACPI GTDT
static table.

The clocksource architected timer kernel driver requires a firmware
interface to collect timer configuration and configure its driver.
this infrastructure is present for device tree systems, but it is
missing on systems booting with ACPI.

Implement the kernel infrastructure required to parse the static
ACPI GTDT table so that the architected timer clocksource driver can
make use of it on systems booting with ACPI, therefore enabling
the corresponding timers configuration.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
---
 drivers/acpi/arm64/gtdt.c | 130 ++
 include/linux/acpi.h  |   1 +
 2 files changed, 131 insertions(+)

diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
index 8a03b4b..f471873 100644
--- a/drivers/acpi/arm64/gtdt.c
+++ b/drivers/acpi/arm64/gtdt.c
@@ -37,6 +37,28 @@ struct acpi_gtdt_descriptor {
 
 static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
 
+static inline void *next_platform_timer(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+
+   platform_timer += gh->length;
+   if (platform_timer < acpi_gtdt_desc.gtdt_end)
+   return platform_timer;
+
+   return NULL;
+}
+
+#define for_each_platform_timer(_g)\
+   for (_g = acpi_gtdt_desc.platform_timer; _g;\
+_g = next_platform_timer(_g))
+
+static inline bool is_timer_block(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+
+   return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
+}
+
 static int __init map_gt_gsi(u32 interrupt, u32 flags)
 {
int trigger, polarity;
@@ -155,3 +177,111 @@ int __init acpi_gtdt_init(struct acpi_table_header *table,
 
return ret;
 }
+
+static int __init gtdt_parse_timer_block(struct acpi_gtdt_timer_block *block,
+struct arch_timer_mem *timer_mem)
+{
+   int i, j;
+   struct acpi_gtdt_timer_entry *gtdt_frame;
+
+   if (!block->timer_count) {
+   pr_err(FW_BUG "GT block present, but frame count is zero.");
+   return -ENODEV;
+   }
+
+   if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) {
+   pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 
8\n",
+  block->timer_count);
+   return -EINVAL;
+   }
+
+   timer_mem->cntctlbase = (phys_addr_t)block->block_address;
+   /*
+* The CNTCTLBase frame is 4KB (register offsets 0x000 - 0xFFC).
+* See ARM DDI 0487A.k_iss10775, page I1-5129, Table I1-3
+* "CNTCTLBase memory map".
+*/
+   timer_mem->size = SZ_4K;
+
+   gtdt_frame = (void *)block + block->timer_offset;
+   if (gtdt_frame + block->timer_count != (void *)block + 
block->header.length)
+   return -EINVAL;
+
+   /*
+* Get the GT timer Frame data for every GT Block Timer
+*/
+   for (i = 0, j = 0; i < block->timer_count; i++, gtdt_frame++) {
+   struct arch_timer_mem_frame *frame = &timer_mem->frame[j];
+
+   if (gtdt_frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)
+   continue;
+
+   if (!gtdt_frame->base_address || !gtdt_frame->timer_interrupt)
+   return -EINVAL;
+
+   frame->phys_irq = map_gt_gsi(gtdt_frame->timer_interrupt,
+gtdt_frame->timer_flags);
+   if (frame->phys_irq <= 0) {
+   pr_warn("failed to map physical timer irq in frame 
%d.\n",
+   i);
+   return -EINVAL;
+   }
+
+   frame->virt_irq =
+   map_gt_gsi(gtdt_frame->virtual_timer_interrupt,
+  gtdt_frame->virtual_timer_flags);
+   if (frame->virt_irq <= 0) {
+   pr_warn("failed to map virtual timer irq in frame 
%d.\n",
+   i);
+   acpi_unregister_gsi(gtdt_frame->timer_interrupt);
+   return -EINVAL;
+   }
+
+   frame->frame_nr = gtdt_frame->frame_number;
+   frame->cntbase = gtdt_frame->base_address;
+   /*
+* The CNTBaseN frame is 4KB (register offsets 0x000 - 0xFFC).
+* See ARM DDI 0487A.k_iss10775, page I1-5130, Table I1-4
+* "CNTBaseN memory map".
+*/
+   frame->size = SZ_4K;
+   j++;
+   }
+   timer_mem->num_frames = j;
+
+

[PATCH v22 07/11] acpi/arm64: Add GTDT table parse driver

2017-03-21 Thread fu . wei

From: Fu Wei 

This patch adds support for parsing arch timer info in GTDT,
provides some kernel APIs to parse all the PPIs and
always-on info in GTDT and export them.

By this driver, we can simplify arm_arch_timer drivers, and
separate the ACPI GTDT knowledge from it.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Acked-by: Rafael J. Wysocki 
Tested-by: Xiongfeng Wang 
Reviewed-by: Hanjun Guo 
Tested-by: Hanjun Guo 
---
 arch/arm64/Kconfig  |   1 +
 drivers/acpi/arm64/Kconfig  |   3 +
 drivers/acpi/arm64/Makefile |   1 +
 drivers/acpi/arm64/gtdt.c   | 157 
 include/linux/acpi.h|   6 ++
 5 files changed, 168 insertions(+)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 3741859..7e2baec 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -2,6 +2,7 @@ config ARM64
def_bool y
select ACPI_CCA_REQUIRED if ACPI
select ACPI_GENERIC_GSI if ACPI
+   select ACPI_GTDT if ACPI
select ACPI_REDUCED_HARDWARE_ONLY if ACPI
select ACPI_MCFG if ACPI
select ACPI_SPCR_TABLE if ACPI
diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig
index 4616da4..5a6f80f 100644
--- a/drivers/acpi/arm64/Kconfig
+++ b/drivers/acpi/arm64/Kconfig
@@ -4,3 +4,6 @@
 
 config ACPI_IORT
bool
+
+config ACPI_GTDT
+   bool
diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile
index 72331f2..1017def 100644
--- a/drivers/acpi/arm64/Makefile
+++ b/drivers/acpi/arm64/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_ACPI_IORT)+= iort.o
+obj-$(CONFIG_ACPI_GTDT)+= gtdt.o
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
new file mode 100644
index 000..8a03b4b
--- /dev/null
+++ b/drivers/acpi/arm64/gtdt.c
@@ -0,0 +1,157 @@
+/*
+ * ARM Specific GTDT table Support
+ *
+ * Copyright (C) 2016, Linaro Ltd.
+ * Author: Daniel Lezcano 
+ * Fu Wei 
+ * Hanjun Guo 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#undef pr_fmt
+#define pr_fmt(fmt) "ACPI GTDT: " fmt
+
+/**
+ * struct acpi_gtdt_descriptor - Store the key info of GTDT for all functions
+ * @gtdt:  The pointer to the struct acpi_table_gtdt of GTDT table.
+ * @gtdt_end:  The pointer to the end of GTDT table.
+ * @platform_timer:The pointer to the start of Platform Timer Structure
+ *
+ * The struct store the key info of GTDT table, it should be initialized by
+ * acpi_gtdt_init.
+ */
+struct acpi_gtdt_descriptor {
+   struct acpi_table_gtdt *gtdt;
+   void *gtdt_end;
+   void *platform_timer;
+};
+
+static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
+
+static int __init map_gt_gsi(u32 interrupt, u32 flags)
+{
+   int trigger, polarity;
+
+   trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
+   : ACPI_LEVEL_SENSITIVE;
+
+   polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
+   : ACPI_ACTIVE_HIGH;
+
+   return acpi_register_gsi(NULL, interrupt, trigger, polarity);
+}
+
+/**
+ * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
+ * @type:  the type of PPI.
+ *
+ * Note: Linux on arm64 isn't supported on the secure side.
+ * So we only handle the non-secure timer PPIs,
+ * ARCH_TIMER_PHYS_SECURE_PPI is treated as invalid type.
+ *
+ * Return: the mapped PPI value, 0 if error.
+ */
+int __init acpi_gtdt_map_ppi(int type)
+{
+   struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
+
+   switch (type) {
+   case ARCH_TIMER_PHYS_NONSECURE_PPI:
+   return map_gt_gsi(gtdt->non_secure_el1_interrupt,
+ gtdt->non_secure_el1_flags);
+   case ARCH_TIMER_VIRT_PPI:
+   return map_gt_gsi(gtdt->virtual_timer_interrupt,
+ gtdt->virtual_timer_flags);
+
+   case ARCH_TIMER_HYP_PPI:
+   return map_gt_gsi(gtdt->non_secure_el2_interrupt,
+ gtdt->non_secure_el2_flags);
+   default:
+   pr_err("Failed to map timer interrupt: invalid type.\n");
+   }
+
+   return 0;
+}
+
+/**
+ * acpi_gtdt_c3stop() - Got c3stop info from GTDT according to the type of PPI.
+ * @type:  the type of PPI.
+ *
+ * Return: 1 if the timer can be in deep idle state, 0 otherwise.
+ */
+bool __init acpi_gtdt_c3stop(int type)
+{
+   struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
+
+   switch (type) {
+   case ARCH_TIMER_PHYS_NONSECURE_PPI:
+   return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
+
+   case ARCH_TIMER_VIRT_PPI:
+   return !(gtdt->virtual_timer_flags & ACPI_GTDT_ALWAYS_ON);
+
+   case ARCH_T

[PATCH v22 10/11] clocksource: arm_arch_timer: add GTDT support for memory-mapped timer

2017-03-21 Thread fu . wei

From: Fu Wei 

The patch add memory-mapped timer register support by using the
information provided by the new GTDT driver of ACPI.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 35 ---
 1 file changed, 32 insertions(+), 3 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index ef747f3..f8aa5a0 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -1142,10 +1142,35 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, 
"arm,armv7-timer-mem",
   arch_timer_mem_of_init);
 
 #ifdef CONFIG_ACPI_GTDT
-/* Initialize per-processor generic timer */
+static int __init arch_timer_mem_acpi_init(int platform_timer_count)
+{
+   struct arch_timer_mem *timer_mem;
+   int timer_count, i, ret;
+
+   timer_mem = kcalloc(platform_timer_count, sizeof(*timer_mem),
+   GFP_KERNEL);
+   if (!timer_mem)
+   return -ENOMEM;
+
+   ret = acpi_arch_timer_mem_init(timer_mem, &timer_count);
+   if (ret || !timer_count)
+   goto error;
+
+   for (i = 0; i < timer_count; i++) {
+   ret = arch_timer_mem_init(timer_mem + i);
+   if (!ret)
+   break;
+   }
+
+error:
+   kfree(timer_mem);
+   return ret;
+}
+
+/* Initialize per-processor generic timer and memory-mapped timer(if present) 
*/
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
-   int ret;
+   int ret, platform_timer_count;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("already initialized, skipping\n");
@@ -1154,7 +1179,7 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
 
arch_timers_present |= ARCH_TIMER_TYPE_CP15;
 
-   ret = acpi_gtdt_init(table, NULL);
+   ret = acpi_gtdt_init(table, &platform_timer_count);
if (ret) {
pr_err("Failed to init GTDT table.\n");
return ret;
@@ -1191,6 +1216,10 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
if (ret)
return ret;
 
+   if (platform_timer_count &&
+   arch_timer_mem_acpi_init(platform_timer_count))
+   pr_err("Failed to initialize memory-mapped timer.\n");
+
return arch_timer_common_init();
 }
 CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
-- 
2.9.3

[PATCH v22 11/11] acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver

2017-03-21 Thread fu . wei

From: Fu Wei 

This driver adds support for parsing SBSA Generic Watchdog timer
in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT,
and creating a platform device with that information.

This allows the operating system to obtain device data from the
resource of platform device. The platform device named "sbsa-gwdt"
can be used by the ARM SBSA Generic Watchdog driver.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Tested-by: Xiongfeng Wang 
---
 drivers/acpi/arm64/gtdt.c | 94 +++
 1 file changed, 94 insertions(+)

diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
index f471873..5d167f0 100644
--- a/drivers/acpi/arm64/gtdt.c
+++ b/drivers/acpi/arm64/gtdt.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -59,6 +60,17 @@ static inline bool is_timer_block(void *platform_timer)
return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
 }
 
+static inline bool is_non_secure_watchdog(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+   struct acpi_gtdt_watchdog *wd = platform_timer;
+
+   if (gh->type != ACPI_GTDT_TYPE_WATCHDOG)
+   return false;
+
+   return !(wd->timer_flags & ACPI_GTDT_WATCHDOG_SECURE);
+}
+
 static int __init map_gt_gsi(u32 interrupt, u32 flags)
 {
int trigger, polarity;
@@ -285,3 +297,85 @@ int __init acpi_arch_timer_mem_init(struct arch_timer_mem 
*timer_mem,
 
return 0;
 }
+
+/*
+ * Initialize a SBSA generic Watchdog platform device info from GTDT
+ */
+static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd,
+   int index)
+{
+   struct platform_device *pdev;
+   int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags);
+
+   /*
+* According to SBSA specification the size of refresh and control
+* frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF).
+*/
+   struct resource res[] = {
+   DEFINE_RES_MEM(wd->control_frame_address, SZ_4K),
+   DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K),
+   DEFINE_RES_IRQ(irq),
+   };
+   int nr_res = ARRAY_SIZE(res);
+
+   pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n",
+wd->refresh_frame_address, wd->control_frame_address,
+wd->timer_interrupt, wd->timer_flags);
+
+   if (!(wd->refresh_frame_address && wd->control_frame_address)) {
+   pr_err(FW_BUG "failed to get the Watchdog base address.\n");
+   return -EINVAL;
+   }
+
+   if (irq <= 0) {
+   pr_warn("failed to map the Watchdog interrupt.\n");
+   nr_res--;
+   }
+
+   /*
+* Add a platform device named "sbsa-gwdt" to match the platform driver.
+* "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog
+* The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get device
+* info below by matching this name.
+*/
+   pdev = platform_device_register_simple("sbsa-gwdt", index, res, nr_res);
+   if (IS_ERR(pdev)) {
+   acpi_unregister_gsi(wd->timer_interrupt);
+   return PTR_ERR(pdev);
+   }
+
+   return 0;
+}
+
+static int __init gtdt_sbsa_gwdt_init(void)
+{
+   int ret, i = 0;
+   void *platform_timer;
+   struct acpi_table_header *table;
+
+   if (acpi_disabled)
+   return 0;
+
+   if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0, &table)))
+   return -EINVAL;
+
+   ret = acpi_gtdt_init(table, NULL);
+   if (ret)
+   return ret;
+
+   for_each_platform_timer(platform_timer) {
+   if (is_non_secure_watchdog(platform_timer)) {
+   ret = gtdt_import_sbsa_gwdt(platform_timer, i);
+   if (ret)
+   break;
+   i++;
+   }
+   }
+
+   if (i)
+   pr_info("found %d SBSA generic Watchdog(s).\n", i);
+
+   return ret;
+}
+
+device_initcall(gtdt_sbsa_gwdt_init);
-- 
2.9.3

[PATCH v22 06/11] clocksource: arm_arch_timer: refactor MMIO timer probing.

2017-03-21 Thread fu . wei

From: Fu Wei 

Currently the code to probe MMIO architected timers mixes DT parsing with
actual poking of hardware. This makes the code harder than necessary to
understand, and makes it difficult to add support for probing via ACPI.

This patch factors all the DT-specific logic out of arch_timer_mem_init(),
into a new function arch_timer_mem_of_init().
The former pokes the hardware and determines the suitablility of frames
based on a datastructure populated by the latter.

This cleanly separates the two and will make it possible to add probing
using the ACPI GTDT in subsequent patches.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 158 +--
 1 file changed, 112 insertions(+), 46 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 4b29a6d..3ada5dc 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -977,17 +977,21 @@ static int __init arch_timer_of_init(struct device_node 
*np)
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", 
arch_timer_of_init);
 CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", 
arch_timer_of_init);
 
-static int __init arch_timer_mem_init(struct device_node *np)
+static int __init arch_timer_mem_init(struct arch_timer_mem *timer_mem)
 {
-   struct device_node *frame, *best_frame = NULL;
void __iomem *cntctlbase, *base;
-   unsigned int irq, ret = -EINVAL;
+   struct arch_timer_mem_frame *best_frame = NULL;
+   u32 arch_timer_mem_freq;
+   unsigned int irq;
u32 cnttidr;
+   int i, ret;
 
-   arch_timers_present |= ARCH_TIMER_TYPE_MEM;
-   cntctlbase = of_iomap(np, 0);
+   if (!timer_mem->num_frames)
+   return -ENODEV;
+
+   cntctlbase = ioremap(timer_mem->cntctlbase, timer_mem->size);
if (!cntctlbase) {
-   pr_err("Can't find CNTCTLBase\n");
+   pr_err("Can't map CNTCTLBase.\n");
return -ENXIO;
}
 
@@ -997,26 +1001,18 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
 * Try to find a virtual capable frame. Otherwise fall back to a
 * physical capable frame.
 */
-   for_each_available_child_of_node(np, frame) {
-   int n;
-   u32 cntacr;
-
-   if (of_property_read_u32(frame, "frame-number", &n)) {
-   pr_err("Missing frame-number\n");
-   of_node_put(frame);
-   goto out;
-   }
+   for (i = 0; i < timer_mem->num_frames; i++) {
+   u32 cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT |
+CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT;
+   int n = timer_mem->frame[i].frame_nr;
 
/* Try enabling everything, and see what sticks */
-   cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT |
-CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT;
writel_relaxed(cntacr, cntctlbase + CNTACR(n));
cntacr = readl_relaxed(cntctlbase + CNTACR(n));
 
if ((cnttidr & CNTTIDR_VIRT(n)) &&
!(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) {
-   of_node_put(best_frame);
-   best_frame = frame;
+   best_frame = &timer_mem->frame[i];
arch_timer_mem_use_virtual = true;
break;
}
@@ -1024,56 +1020,126 @@ static int __init arch_timer_mem_init(struct 
device_node *np)
if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT))
continue;
 
-   of_node_put(best_frame);
-   best_frame = of_node_get(frame);
+   best_frame = &timer_mem->frame[i];
}
+   iounmap(cntctlbase);
 
-   ret= -ENXIO;
-   base = arch_counter_base = of_io_request_and_map(best_frame, 0,
-"arch_mem_timer");
-   if (IS_ERR(base)) {
-   pr_err("Can't map frame's registers\n");
-   goto out;
+   if (!best_frame) {
+   pr_err("Can't find frame for register\n");
+   return -EINVAL;
}
 
if (arch_timer_mem_use_virtual)
-   irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_VIRT_SPI);
+   irq = best_frame->virt_irq;
else
-   irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_PHYS_SPI);
+   irq = best_frame->phys_irq;
 
-   ret = -EINVAL;
if (!irq) {
pr_err("Frame missing %s irq.\n",
   arch_timer_mem_use_virtual ? "virt" :

[PATCH v22 05/11] clocksource: arm_arch_timer: introduce some new structs to prepare for GTDT

2017-03-21 Thread fu . wei

From: Fu Wei 

The patch introduce two new structs: arch_timer_mem, arch_timer_mem_frame.
And also introduce a new define: ARCH_TIMER_MEM_MAX_FRAMES

These will be used for refactoring the memory-mapped timer init code to
prepare for GTDT

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 include/clocksource/arm_arch_timer.h | 17 +
 1 file changed, 17 insertions(+)

diff --git a/include/clocksource/arm_arch_timer.h 
b/include/clocksource/arm_arch_timer.h
index 4a98c06..b7dd185 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -57,6 +57,8 @@ enum arch_timer_spi_nr {
 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
 #define ARCH_TIMER_MEM_VIRT_ACCESS 3
 
+#define ARCH_TIMER_MEM_MAX_FRAMES  8
+
 #define ARCH_TIMER_USR_PCT_ACCESS_EN   (1 << 0) /* physical counter */
 #define ARCH_TIMER_USR_VCT_ACCESS_EN   (1 << 1) /* virtual counter */
 #define ARCH_TIMER_VIRT_EVT_EN (1 << 2)
@@ -72,6 +74,21 @@ struct arch_timer_kvm_info {
int virtual_irq;
 };
 
+struct arch_timer_mem_frame {
+   int frame_nr;
+   phys_addr_t cntbase;
+   size_t size;
+   int phys_irq;
+   int virt_irq;
+};
+
+struct arch_timer_mem {
+   phys_addr_t cntctlbase;
+   size_t size;
+   int num_frames;
+   struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES];
+};
+
 #ifdef CONFIG_ARM_ARCH_TIMER
 
 extern u32 arch_timer_get_rate(void);
-- 
2.9.3

[PATCH v22 03/11] clocksource: arm_arch_timer: refactor arch_timer_needs_probing

2017-03-21 Thread fu . wei

From: Fu Wei 

When system init with device-tree, we don't know which node will be
initialized first. And the code in arch_timer_common_init should wait
until per-cpu timer and MMIO timer are both initialized. So we need
arch_timer_needs_probing to detect the init status of system.

But currently the code is dispersed in arch_timer_needs_probing and
arch_timer_common_init. And the function name doesn't specify that
it's only for device-tree. This is somewhat confusing.

This patch move all related code from arch_timer_common_init to
arch_timer_needs_probing, refactor it, and rename it to
arch_timer_needs_of_probing. And make sure that it will be called
only if acpi is disabled.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 34 +++---
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 29ca7d6..d1a05d9 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -839,15 +839,28 @@ static const struct of_device_id 
arch_timer_mem_of_match[] __initconst = {
{},
 };
 
-static bool __init
-arch_timer_needs_probing(int type, const struct of_device_id *matches)
+static bool __init arch_timer_needs_of_probing(void)
 {
struct device_node *dn;
bool needs_probing = false;
+   unsigned int mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
 
-   dn = of_find_matching_node(NULL, matches);
-   if (dn && of_device_is_available(dn) && !(arch_timers_present & type))
+   /* We have two timers, and both device-tree nodes are probed. */
+   if ((arch_timers_present & mask) == mask)
+   return false;
+
+   /*
+* Only one type of timer is probed,
+* check if we have another type of timer node in device-tree.
+*/
+   if (arch_timers_present & ARCH_TIMER_TYPE_CP15)
+   dn = of_find_matching_node(NULL, arch_timer_mem_of_match);
+   else
+   dn = of_find_matching_node(NULL, arch_timer_of_match);
+
+   if (dn && of_device_is_available(dn))
needs_probing = true;
+
of_node_put(dn);
 
return needs_probing;
@@ -855,17 +868,8 @@ arch_timer_needs_probing(int type, const struct 
of_device_id *matches)
 
 static int __init arch_timer_common_init(void)
 {
-   unsigned mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
-
-   /* Wait until both nodes are probed if we have two timers */
-   if ((arch_timers_present & mask) != mask) {
-   if (arch_timer_needs_probing(ARCH_TIMER_TYPE_MEM,
-arch_timer_mem_of_match))
-   return 0;
-   if (arch_timer_needs_probing(ARCH_TIMER_TYPE_CP15,
-arch_timer_of_match))
-   return 0;
-   }
+   if (acpi_disabled && arch_timer_needs_of_probing())
+   return 0;
 
arch_timer_banner(arch_timers_present);
arch_counter_register(arch_timers_present);
-- 
2.9.3

[PATCH v22 02/11] clocksource: arm_arch_timer: separate out device-tree code and remove arch_timer_detect_rate

2017-03-21 Thread fu . wei

From: Fu Wei 

Currently, the counter frequency detection call(arch_timer_detect_rate)
includes getting the frequency from the device-tree property, the per-cpu
arch-timer and the memory-mapped (MMIO) timer interfaces.
But reading device-tree property will be needed only when system boot with
device-tree, and reading from the per-cpu arch-timer and the memory-mapped
(MMIO) timer interfaces will be needed only when the system initializes
the relevant timer.

This patch separates out device-tree code, keep them in device-tree init
function, and removes arch_timer_detect_rate founction, then uses the
arch_timer_get_cntfrq and arch_timer_mem_get_cntfrq directly.

Signed-off-by: Fu Wei 
---
 drivers/clocksource/arm_arch_timer.c | 58 +++-
 1 file changed, 30 insertions(+), 28 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 843f923..29ca7d6 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -560,30 +560,6 @@ static u32 arch_timer_mem_get_cntfrq(void __iomem *cntbase)
return readl_relaxed(cntbase + CNTFRQ);
 }
 
-static void
-arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
-{
-   /* Who has more than one independent system counter? */
-   if (arch_timer_rate)
-   return;
-
-   /*
-* Try to determine the frequency from the device tree or CNTFRQ,
-* if ACPI is enabled, get the frequency from CNTFRQ ONLY.
-*/
-   if (!acpi_disabled ||
-   of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) {
-   if (cntbase)
-   arch_timer_rate = arch_timer_mem_get_cntfrq(cntbase);
-   else
-   arch_timer_rate = arch_timer_get_cntfrq();
-   }
-
-   /* Check the timer frequency. */
-   if (arch_timer_rate == 0)
-   pr_warn("frequency not available\n");
-}
-
 static void arch_timer_banner(unsigned type)
 {
pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
@@ -958,7 +934,17 @@ static int __init arch_timer_of_init(struct device_node 
*np)
for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++)
arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
 
-   arch_timer_detect_rate(NULL, np);
+   /*
+* Try to determine the frequency from the device tree,
+* if fail, get the frequency from the sysreg CNTFRQ.
+*/
+   if (!arch_timer_rate &&
+   of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
+   arch_timer_rate = arch_timer_get_cntfrq();
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "frequency not available.\n");
+   return -EINVAL;
+   }
 
arch_timer_c3stop = !of_property_read_bool(np, "always-on");
 
@@ -1069,7 +1055,19 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
goto out;
}
 
-   arch_timer_detect_rate(base, np);
+   /*
+* Try to determine the frequency from the device tree,
+* if fail, get the frequency from the CNTFRQ reg of MMIO timer.
+*/
+   if (!arch_timer_rate &&
+   of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
+   arch_timer_rate = arch_timer_mem_get_cntfrq(base);
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "MMIO frequency not available.\n");
+   ret = -EINVAL;
+   goto out;
+   }
+
ret = arch_timer_mem_register(base, irq);
if (ret)
goto out;
@@ -1130,8 +1128,12 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
gtdt->non_secure_el2_flags);
 
-   /* Get the frequency from CNTFRQ */
-   arch_timer_detect_rate(NULL, NULL);
+   /* Get the frequency from the sysreg CNTFRQ */
+   arch_timer_rate = arch_timer_get_cntfrq();
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "frequency not available.\n");
+   return -EINVAL;
+   }
 
arch_timer_uses_ppi = arch_timer_select_ppi();
if (!arch_timer_ppi[arch_timer_uses_ppi]) {
-- 
2.9.3

[PATCH v22 04/11] clocksource: arm_arch_timer: move arch_timer_needs_of_probing into DT init call

2017-03-21 Thread fu . wei

From: Fu Wei 

Because arch_timer_needs_of_probing is only for booting with device-tree,
but arch_timer_common_init is a generic init call which shouldn't include
the FW-specific code. It's better to put arch_timer_needs_of_probing into
DT init function.

But for per-cpu timer, the arch_timer_common_init is called from
arch_timer_init. For reaching the goal above, this patch disassemble
arch_timer_init and use arch_timer_register and arch_timer_common_init
directly, just like arch_timer_mem init code is doing.
By this way, all the DT relevant code are only called from DT init call.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 46 
 1 file changed, 21 insertions(+), 25 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index d1a05d9..4b29a6d 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -868,9 +868,6 @@ static bool __init arch_timer_needs_of_probing(void)
 
 static int __init arch_timer_common_init(void)
 {
-   if (acpi_disabled && arch_timer_needs_of_probing())
-   return 0;
-
arch_timer_banner(arch_timers_present);
arch_counter_register(arch_timers_present);
return arch_timer_arch_init();
@@ -908,26 +905,9 @@ static enum arch_timer_ppi_nr __init 
arch_timer_select_ppi(void)
return ARCH_TIMER_PHYS_SECURE_PPI;
 }
 
-static int __init arch_timer_init(void)
-{
-   int ret;
-
-   ret = arch_timer_register();
-   if (ret)
-   return ret;
-
-   ret = arch_timer_common_init();
-   if (ret)
-   return ret;
-
-   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
-
-   return 0;
-}
-
 static int __init arch_timer_of_init(struct device_node *np)
 {
-   int i;
+   int i, ret;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("multiple nodes in dt, skipping\n");
@@ -938,6 +918,8 @@ static int __init arch_timer_of_init(struct device_node *np)
for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++)
arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
 
+   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
+
/*
 * Try to determine the frequency from the device tree,
 * if fail, get the frequency from the sysreg CNTFRQ.
@@ -983,7 +965,14 @@ static int __init arch_timer_of_init(struct device_node 
*np)
arch_counter_suspend_stop = of_property_read_bool(np,
 
"arm,no-tick-in-suspend");
 
-   return arch_timer_init();
+   ret = arch_timer_register();
+   if (ret)
+   return ret;
+
+   if (arch_timer_needs_of_probing())
+   return 0;
+
+   return arch_timer_common_init();
 }
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", 
arch_timer_of_init);
 CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", 
arch_timer_of_init);
@@ -1076,7 +1065,8 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
if (ret)
goto out;
 
-   return arch_timer_common_init();
+   if (!arch_timer_needs_of_probing())
+   ret = arch_timer_common_init();
 out:
iounmap(cntctlbase);
of_node_put(best_frame);
@@ -1105,6 +1095,7 @@ static int __init map_generic_timer_interrupt(u32 
interrupt, u32 flags)
 /* Initialize per-processor generic timer */
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
+   int ret;
struct acpi_table_gtdt *gtdt;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
@@ -1132,6 +1123,8 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
gtdt->non_secure_el2_flags);
 
+   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
+
/* Get the frequency from the sysreg CNTFRQ */
arch_timer_rate = arch_timer_get_cntfrq();
if (!arch_timer_rate) {
@@ -1148,8 +1141,11 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
/* Always-on capability */
arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
 
-   arch_timer_init();
-   return 0;
+   ret = arch_timer_register();
+   if (ret)
+   return ret;
+
+   return arch_timer_common_init();
 }
 CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
 #endif
-- 
2.9.3

[PATCH v22 01/11] clocksource: arm_arch_timer: introduce a wrapper function to get the frequency from mmio.

2017-03-21 Thread fu . wei

From: Fu Wei 

The patch introduce a new functions: arch_timer_mem_get_cntfrq, and applies
it in arch_timer_detect_rate.
This function will be used for getting the frequency from mmio to prepare
for reworking counter frequency detection.

Signed-off-by: Fu Wei 
---
 drivers/clocksource/arm_arch_timer.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 3faed19..843f923 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -555,6 +555,11 @@ static int arch_timer_starting_cpu(unsigned int cpu)
return 0;
 }
 
+static u32 arch_timer_mem_get_cntfrq(void __iomem *cntbase)
+{
+   return readl_relaxed(cntbase + CNTFRQ);
+}
+
 static void
 arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
 {
@@ -569,7 +574,7 @@ arch_timer_detect_rate(void __iomem *cntbase, struct 
device_node *np)
if (!acpi_disabled ||
of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) {
if (cntbase)
-   arch_timer_rate = readl_relaxed(cntbase + CNTFRQ);
+   arch_timer_rate = arch_timer_mem_get_cntfrq(cntbase);
else
arch_timer_rate = arch_timer_get_cntfrq();
}
-- 
2.9.3

[PATCH v22 00/11] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-03-21 Thread fu . wei

From: Fu Wei 

This patchset:
(1)Preparation for adding GTDT support in arm_arch_timer:
1. Introduce a wrapper function to get the frequency from mmio.
2. separate out device-tree code from arch_timer_detect_rate
3. remove arch_timer_detect_rate use arch_timer_*get_cntfrq directly
4. Refactor arch_timer_needs_probing, and move it into DT init call
5. Introduce some new structs and refactor the MMIO timer init code
for reusing some common code.

(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c
Parse all kinds of timer in GTDT table of ACPI:arch timer,
memory-mapped timer and SBSA Generic Watchdog timer.
This driver can help to simplify all the relevant timer drivers,
and separate all the ACPI GTDT knowledge from them.

(3)Simplify ACPI code for arm_arch_timer

(4)Add GTDT support for ARM memory-mapped timer.

This patchset has been tested on the following platforms with ACPI enabled:
(1)ARM Foundation v8 model

Changelog:
v22: https://lkml.org/lkml/2017/3/21/
 Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
arch-timer/cleanup
 Only Introduce arch_timer_mem_get_cntfrq to get the frequency from mmio.
 Merged patch 2,3(about arch_timer_detect_rate).
 Keep arch_timer_rate, do NOT split it for different types of timer.
 Improve  memory-mapped timer support by comments and variable name:
 data-->timer_mem
 frame-->gtdt_frame
 Delete zero check for SBSA watchdog irq.
 Skip secure SBSA watchdog in GTDT driver.
 Delete Kconfig modification for SBSA watchdog driver.
 Delete no_irq, using nr_res instead.

v21: https://lkml.org/lkml/2017/2/6/734
 Introduce two functions to get the frequency from mmio and sysreg.
 Remove arch_timer_detect_rate use arch_timer_get_*_freq directly
 Split arch_timer_rate for different types of timer.
 Skip secure timer frame in GTDT driver.
 Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
arch-timer/cleanup
 (The first 6 patches in v20 have been merged into arch-timer/cleanup 
branch)

v20: https://lkml.org/lkml/2017/1/18/534
 Reorder the first 4 patches and split the 4th patches.
 Leave CNTHCTL_* as they originally were.
 Fix the bug in arch_timer_select_ppi.
 Split "Rework counter frequency detection" patch.
 Rework the arch_timer_detect_rate function.
 Improve the commit message of "Refactor MMIO timer probing".
 Rebase to 4.10.0-rc4

v19: https://lkml.org/lkml/2016/12/21/25
 Fix a '\n' missing in a error message in arch_timer_mem_init.
 Add "request_mem_region" for ioremapping cntbase, according to
 f947ee1 clocksource/drivers/arm_arch_timer: Map frame with 
of_io_request_and_map()
 Rebase to 4.9.0-gfb779ff

v18: https://lkml.org/lkml/2016/12/8/446
 Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init.
 Rebase to 4.9.0-rc8-g9269898

v17: https://lkml.org/lkml/2016/11/25/140
 Take out some cleanups from 4/15.
 Merge 5/15 and 6/15, improve PPI determination code,
 improve commit message.
 Rework counter frequency detection.
 Move arch_timer_needs_of_probing into DT init call.
 Move Platform Timer scan loop back to timer init call to avoid allocating
 and free memory.
 Improve all the exported functions' comment.

v16: https://lkml.org/lkml/2016/11/16/268
 Fix patchset problem about static enum ppi_nr of 01/13 in v15.
 Refactor arch_timer_detect_rate.
 Refactor arch_timer_needs_probing.

v15: https://lkml.org/lkml/2016/11/15/366
 Re-order patches
 Add arm_arch_timer refactoring patches to prepare for GTDT:
 1. rename some  enums and defines, and some cleanups
 2. separate out arch_timer_uses_ppi init code and fix a potential bug
 3. Improve some new structs, refactor the timer init code.
 Since the some structs have been changed, GTDT parser for memory-mapped
 timer and SBSA Generic Watchdog timer have been update.

v14: https://lkml.org/lkml/2016/9/28/573
 Separate memory-mapped timer GTDT support into two patches
 1. Refactor the timer init code to prepare for GTDT
 2. Add GTDT support for memory-mapped timer

v13: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1231717.html
 Improve arm_arch_timer code for memory-mapped
 timer GTDT support, refactor original memory-mapped timer
 dt support for reusing some common code.

v12: https://lkml.org/lkml/2016/9/13/250
 Rebase to latest Linux 4.8-rc6
 Delete the confusing "skipping" in the error message.

V11: https://lkml.org/lkml/2016/9/6/354
 Rebase to latest Linux 4.8-rc5
 Delete typedef (suggested by checkpatch.pl)

V10: https://lkml.org/lkml/2016/7/26/215
 Drop the "readq" patch.
 Rebase to latest Linux 4.7.

V9: https://lkml.org/lkm

Re: [PATCH v21 13/13] acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver

2017-03-20 Thread Fu Wei

Hi Mark,

On 21 March 2017 at 02:09, Mark Rutland  wrote:
> On Tue, Mar 21, 2017 at 01:57:58AM +0800, Fu Wei wrote:
>> On 18 March 2017 at 04:01, Mark Rutland  wrote:
>> > On Tue, Feb 07, 2017 at 02:50:15AM +0800, fu@linaro.org wrote:
>
>> > I've not been able to find where the ACPI spec says that zero is not a
>> > valid GSIV. This may simply be an oversight/ambiguity in the spec.
>> >
>> > Is there any statement to that effect?
>>
>> you are right, zero is a  valid GSIV, I will delete this check. Thanks
>
> That being the case, how does one describe a watchdog that does not have
> an interrupt?

I think we may can use "Timer Flags", because all the GSIV come with a flag,
if we can define a bit field called "valid" for all GSIV

Bit Field   Bit Offset   Number of bits Description
Valid31 1  This bit
indicates the validity of the timer interrupt
 1:
Interrupt is valid
 0:
Interrupt is invalid
Then we don't need to test the value of GSIV, just test this bit instead.

Just my thought, hope this makes sense to all of you :-)

>
> As I mentioned, I think this is an oversight/ambiguity in the spec tat
> we should address.
>
>> > My reading of SBSA is that there is one watchdog in the system.
>> >
>> > Is that not the case?
>>
>> do you mean:
>> ---
>> 4.2.4 Watchdogs
>> The base server system implements a Generic Watchdog as specified in
>> APPENDIX A: Generic Watchdog.
>> ---
>>
>> I am not sure about that if this is saying "we only have one SBSA
>> watchdog in a system"
>>
>> would you let me know where mention it? Do I miss something?
>
> My reading was that the 'a' above meant a single element. i.e.
>
> The base server system implements _a_ Generic Watchdog as
> specified in APPENDIX A: Generic Watchdog.
>
> Subsequently in 4.2.5, it is stated:
>
> In this scenario, the system wakeup timer or generic watchdog is
> still required to send its interrupt.
>
> ... which only makes sense if there is a single watchdog in the system.
>
> Perhaps this is an oversight in the specification.
>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [Linaro-acpi] [PATCH v21 13/13] acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver

2017-03-20 Thread Fu Wei

Hi Mark, Lurndal,


On 21 March 2017 at 02:50, Lurndal, Scott  wrote:
> On Mon, Mar 20, 2017 at 06:09:50PM +, Mark Rutland wrote:
>> On Tue, Mar 21, 2017 at 01:57:58AM +0800, Fu Wei wrote:
>> > On 18 March 2017 at 04:01, Mark Rutland  wrote:
>> > > On Tue, Feb 07, 2017 at 02:50:15AM +0800, fu@linaro.org wrote:
>>
>> > > I've not been able to find where the ACPI spec says that zero is not a
>> > > valid GSIV. This may simply be an oversight/ambiguity in the spec.
>> > >
>> > > Is there any statement to that effect?
>> >
>> > you are right, zero is a  valid GSIV, I will delete this check. Thanks
>>
>> That being the case, how does one describe a watchdog that does not have
>> an interrupt?
>>
>> As I mentioned, I think this is an oversight/ambiguity in the spec tat
>> we should address.
>>
>> > > My reading of SBSA is that there is one watchdog in the system.
>> > >
>> > > Is that not the case?
>> >
>> > do you mean:
>> > ---
>> > 4.2.4 Watchdogs
>> > The base server system implements a Generic Watchdog as specified in
>> > APPENDIX A: Generic Watchdog.
>> > ---
>> >
>> > I am not sure about that if this is saying "we only have one SBSA
>> > watchdog in a system"
>> >
>> > would you let me know where mention it? Do I miss something?
>>
>> My reading was that the 'a' above meant a single element. i.e.
>>
>>   The base server system implements _a_ Generic Watchdog as
>>   specified in APPENDIX A: Generic Watchdog.
>
>   It is a requirement of a conforming implementation that there
> be a generic watchdog (impl as per the appendix).   That doesn't preclude
> an implmentation from providing additional watchdogs (for example, if
> the processor implements EL3, it is likely that an implementation
> will include a secure watchdog as well as a non-secure watchdog).
>
>   The SBSA describes the minimal hardware requirements for a
> compliant server.

So I think, for the SBSA watchdog:

(1) there maybe more then one non-secure watchdog in GTDT

(2) we may also need to skip  secure watchdogs in GTDT,
and only register non-secure watchdogs into platform resources.

Please correct me, if I misunderstand something.

>
> scott



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v21 13/13] acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver

2017-03-20 Thread Fu Wei

Hi Mark

On 18 March 2017 at 04:01, Mark Rutland  wrote:
> On Tue, Feb 07, 2017 at 02:50:15AM +0800, fu@linaro.org wrote:
>> +static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd,
>> + int index)
>> +{
>> + struct platform_device *pdev;
>> + int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags);
>> + int no_irq = 1;
>> +
>> + /*
>> +  * According to SBSA specification the size of refresh and control
>> +  * frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF).
>> +  */
>> + struct resource res[] = {
>> + DEFINE_RES_MEM(wd->control_frame_address, SZ_4K),
>> + DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K),
>> + DEFINE_RES_IRQ(irq),
>> + };
>> +
>> + pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n",
>> +  wd->refresh_frame_address, wd->control_frame_address,
>> +  wd->timer_interrupt, wd->timer_flags);
>> +
>> + if (!(wd->refresh_frame_address && wd->control_frame_address)) {
>> + pr_err(FW_BUG "failed to get the Watchdog base address.\n");
>> + return -EINVAL;
>> + }
>> +
>> + if (!wd->timer_interrupt)
>> + pr_warn(FW_BUG "failed to get the Watchdog interrupt.\n");
>
> I've not been able to find where the ACPI spec says that zero is not a
> valid GSIV. This may simply be an oversight/ambiguity in the spec.
>
> Is there any statement to that effect?

you are right, zero is a  valid GSIV, I will delete this check. Thanks

>
>> + else if (irq <= 0)
>> + pr_warn("failed to map the Watchdog interrupt.\n");
>> + else
>> + no_irq = 0;
>> +
>> + /*
>> +  * Add a platform device named "sbsa-gwdt" to match the platform 
>> driver.
>> +  * "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog
>> +  * The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get 
>> device
>> +  * info below by matching this name.
>> +  */
>> + pdev = platform_device_register_simple("sbsa-gwdt", index, res,
>> +ARRAY_SIZE(res) - no_irq);
>
> This no_irq variable is messy and confusing.
>
> Get rid of no_irq, and replace it with nr_res, initialised to
> ARRAY_SIZE(res). If there's no interrupt, subtract one.

Sure, you are right ,will do

>
> [...]
>
>> + for_each_platform_timer(platform_timer) {
>> + if (is_watchdog(platform_timer)) {
>> + ret = gtdt_import_sbsa_gwdt(platform_timer, i);
>> + if (ret)
>> + break;
>> + i++;
>> + }
>> + }
>> +
>> + if (i)
>> + pr_info("found %d SBSA generic Watchdog(s).\n", i);
>
> My reading of SBSA is that there is one watchdog in the system.
>
> Is that not the case?

do you mean:
---
4.2.4 Watchdogs
The base server system implements a Generic Watchdog as specified in
APPENDIX A: Generic Watchdog.
---

I am not sure about that if this is saying "we only have one SBSA
watchdog in a system"

would you let me know where mention it? Do I miss something?

Thanks :-)

>
> [...]
>
>> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
>> index acb00b5..c899df1 100644
>> --- a/drivers/watchdog/Kconfig
>> +++ b/drivers/watchdog/Kconfig
>> @@ -219,6 +219,7 @@ config ARM_SBSA_WATCHDOG
>>   tristate "ARM SBSA Generic Watchdog"
>>   depends on ARM64
>>   depends on ARM_ARCH_TIMER
>> + depends on ACPI_GTDT || !ACPI
>
> I don't think this is necessary.
>
> This series hasn't touched this driver code at all.

yes, since we are using "select ACPI_GTDT if ACPI" in ARM64, we don't this.
Thanks for pointing it out.
:-)

>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v21 11/13] acpi/arm64: Add memory-mapped timer support in GTDT driver

2017-03-20 Thread Fu Wei

Hi Mark,

On 18 March 2017 at 03:40, Mark Rutland  wrote:
> Hi,
>
> On Tue, Feb 07, 2017 at 02:50:13AM +0800, fu@linaro.org wrote:
>> +static int __init gtdt_parse_timer_block(struct acpi_gtdt_timer_block 
>> *block,
>> +  struct arch_timer_mem *data)
>
> Please s/data/timer_mem/ here, to match the rest of the timer code.
>
>> +{
>> + int i, j;
>> + struct acpi_gtdt_timer_entry *frame;
>
> So as to make it clear what this is, and to make things a litlte simpler
> below, please s/frame/gtdt_frame/ here.
>
>> +
>> + if (!block->timer_count) {
>> + pr_err(FW_BUG "GT block present, but frame count is zero.");
>> + return -ENODEV;
>> + }
>> +
>> + if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) {
>> + pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 
>> 8\n",
>> +block->timer_count);
>> + return -EINVAL;
>> + }
>> +
>> + data->cntctlbase = (phys_addr_t)block->block_address;
>> + /*
>> +  * According to "Table * CNTCTLBase memory map" of
>> +  *  for ARMv8,
>> +  * The size of the CNTCTLBase frame is 4KB(Offset 0x000 – 0xFFC).
>> +  */
>
> As a general thing, please cite the version of the ARM ARM you're
> referring to, as over time the internal numbering (and the headings)
> change.
>
> e.g.
> /*
>  * The CNTCTLBase frame is 4KB (register offsets 0x000 - 0xFFC).
>  * See ARM DDI 0487A.k_iss10775, page I1-5129, Table I1-3
>  * "CNTCTLBase memory map".
>  */
>
>> + data->size = SZ_4K;
>> +
>> + frame = (void *)block + block->timer_offset;
>> + if (frame + block->timer_count != (void *)block + block->header.length)
>> + return -EINVAL;
>> +
>> + /*
>> +  * Get the GT timer Frame data for every GT Block Timer
>> +  */
>> + for (i = 0, j = 0; i < block->timer_count; i++, frame++) {
>
> With the gtdt_frame rename as above, here we can do:
>
> struct arch_timer_mem_frame *frame = &timer_mem->frame[j];
>
>> + if (frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)
>> + continue;
>> +
>> +     if (!frame->base_address || !frame->timer_interrupt)
>> + return -EINVAL;
>> +
>> + data->frame[j].phys_irq = map_gt_gsi(frame->timer_interrupt,
>> +  frame->timer_flags);
>
> ... allowing us to simplify lines like this.

Thanks, will follow all the suggestion above.
:-)

>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v21 04/13] clocksource: arm_arch_timer: split arch_timer_rate for different types of timer

2017-03-20 Thread Fu Wei

Hi Mark,

On 18 March 2017 at 03:05, Mark Rutland  wrote:
> On Tue, Feb 07, 2017 at 02:50:06AM +0800, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> Currently, arch_timer_rate is used to store the frequency got from per-cpu
>> arch-timer or the memory-mapped (MMIO) timers. But those values come from
>> different registers which should all be initialized by firmware.
>>
>> This patch remove arch_timer_rate, and use arch_timer_sysreg_freq and
>> arch_timer_mmio_freq instead.
>>
>> Signed-off-by: Fu Wei 
>
> Thanks for attacking this. Generally, I do think this is the right thing
> to do.
>
> However...
>
>> @@ -1070,10 +1077,9 @@ static int __init arch_timer_mem_init(struct 
>> device_node *np)
>>* Try to determine the frequency from the device tree,
>>* if fail, get the frequency from the CNTFRQ reg of MMIO timer.
>>*/
>> - if (!arch_timer_rate &&
>> - of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
>> - arch_timer_rate = arch_timer_get_mmio_freq(base);
>> - if (!arch_timer_rate) {
>> + if (of_property_read_u32(np, "clock-frequency", &arch_timer_mmio_freq))
>> + arch_timer_mmio_freq = arch_timer_get_mmio_freq(base);
>> + if (!arch_timer_mmio_freq) {
>>   pr_err(FW_BUG "frequency not available for MMIO timer.\n");
>>   ret = -EINVAL;
>>   goto out;
>
> ... unfortunately, I believe that this will break some DT platforms that
> have been (unintentionally) relying on the way currently allow the
> frequency to be probed from either the MMIO timer or the sysreg timer.
>

Ah, I 'm really not aware of this. Thanks for pointing it out.

> So while the above was my suggestion, it was not my best.
>
> For the timebeing, let's leave the single arch_timer_rate, but ensure
> that it doesn't get in the way fo the ACPI code, by making the ACPI
> probe path:
>
> * Probe the sysreg timers first, using the sysreg cntfrq().
>
> * Probe the MMIO timers second, verifying that each MMIO cntfrq matches
>   the already-probed sysreg cntfrq.
>
> ... which is what I believe you suggested previously.

OK, NP, will do this way.

>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v21 01/13] clocksource: arm_arch_timer: introduce two functions to get the frequency from mmio and sysreg.

2017-03-20 Thread Fu Wei

Hi Mark,

On 20 March 2017 at 18:41, Mark Rutland  wrote:
> On Mon, Mar 20, 2017 at 05:43:29PM +0800, Fu Wei wrote:
>> On 20 March 2017 at 15:36, Fu Wei  wrote:
>> > On 18 March 2017 at 02:05, Mark Rutland  wrote:
>> >> On Tue, Feb 07, 2017 at 02:50:03AM +0800, fu@linaro.org wrote:
>
>> >>> +static u32 arch_timer_get_mmio_freq(void __iomem *cntbase)
>> >>> +{
>> >>> + /*
>> >>> +  * Try to get the frequency from the CNTFRQ of timer frame 
>> >>> registers.
>> >>> +  * Note: please verify cntbase in caller.
>> >>> +  */
>> >>> + return readl_relaxed(cntbase + CNTFRQ);
>> >>> +}
>> >>
>> >> Wrapping the MMIO read makes sense if we're going to do this in more
>> >> than one place, so I'm happy with this wrapper.
>> >>
>> >> If you can s/arch_timer_get_mmio_freq/arch_timer_get_cntfrq/, and drop
>> >
>> > sorry, May I guess that is
>> > "s/arch_timer_get_mmio_freq/arch_timer_get_mmio_cntfrq/"
>> > or
>> > "s/arch_timer_get_mmio_freq/arch_timer_mem_get_cntfrq/"
>> >
>> > which one do you prefer? :-)
>>
>> keeping using arch_timer_get_cntfrq();  for per-CPU arch timer, then
>>
>> +static u32 arch_timer_mem_get_cntfrq(void __iomem *cntbase)
>> +{
>> +   return readl_relaxed(cntbase + CNTFRQ);
>> +}
>> +
>
> That looks perfect to me.
>
> Sorry for the confusion above!

Great, thanks , doing this way :-)

>
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v21 01/13] clocksource: arm_arch_timer: introduce two functions to get the frequency from mmio and sysreg.

2017-03-20 Thread Fu Wei

Hi Mark,

On 20 March 2017 at 15:36, Fu Wei  wrote:
> Hi Mark,
>
> On 18 March 2017 at 02:05, Mark Rutland  wrote:
>> On Tue, Feb 07, 2017 at 02:50:03AM +0800, fu@linaro.org wrote:
>>> +static u32 arch_timer_get_sysreg_freq(void)
>>> +{
>>> + /*
>>> +  * Try to get the frequency from the CNTFRQ of sysreg.
>>> +  */
>>> + return arch_timer_get_cntfrq();
>>> +}
>>
>> We already have arch_timer_get_cntfrq(), so I don't see the point in
>> this wrapper.
>>
>>> +static u32 arch_timer_get_mmio_freq(void __iomem *cntbase)
>>> +{
>>> + /*
>>> +  * Try to get the frequency from the CNTFRQ of timer frame registers.
>>> +  * Note: please verify cntbase in caller.
>>> +  */
>>> + return readl_relaxed(cntbase + CNTFRQ);
>>> +}
>>
>> Wrapping the MMIO read makes sense if we're going to do this in more
>> than one place, so I'm happy with this wrapper.
>>
>> If you can s/arch_timer_get_mmio_freq/arch_timer_get_cntfrq/, and drop
>
> sorry, May I guess that is
> "s/arch_timer_get_mmio_freq/arch_timer_get_mmio_cntfrq/"
> or
> "s/arch_timer_get_mmio_freq/arch_timer_mem_get_cntfrq/"
>
> which one do you prefer? :-)

keeping using arch_timer_get_cntfrq();  for per-CPU arch timer, then

+static u32 arch_timer_mem_get_cntfrq(void __iomem *cntbase)
+{
+   return readl_relaxed(cntbase + CNTFRQ);
+}
+

Is that OK for you?

>
>> the comments, then this looks fine to me.
>>
>> Thanks,
>> Mark.
>
>
>
> --
> Best regards,
>
> Fu Wei
> Software Engineer
> Red Hat



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v21 01/13] clocksource: arm_arch_timer: introduce two functions to get the frequency from mmio and sysreg.

2017-03-20 Thread Fu Wei

Hi Mark,

On 18 March 2017 at 02:05, Mark Rutland  wrote:
> On Tue, Feb 07, 2017 at 02:50:03AM +0800, fu@linaro.org wrote:
>> +static u32 arch_timer_get_sysreg_freq(void)
>> +{
>> + /*
>> +  * Try to get the frequency from the CNTFRQ of sysreg.
>> +  */
>> + return arch_timer_get_cntfrq();
>> +}
>
> We already have arch_timer_get_cntfrq(), so I don't see the point in
> this wrapper.
>
>> +static u32 arch_timer_get_mmio_freq(void __iomem *cntbase)
>> +{
>> + /*
>> +  * Try to get the frequency from the CNTFRQ of timer frame registers.
>> +  * Note: please verify cntbase in caller.
>> +  */
>> + return readl_relaxed(cntbase + CNTFRQ);
>> +}
>
> Wrapping the MMIO read makes sense if we're going to do this in more
> than one place, so I'm happy with this wrapper.
>
> If you can s/arch_timer_get_mmio_freq/arch_timer_get_cntfrq/, and drop

sorry, May I guess that is
"s/arch_timer_get_mmio_freq/arch_timer_get_mmio_cntfrq/"
or
"s/arch_timer_get_mmio_freq/arch_timer_mem_get_cntfrq/"

which one do you prefer? :-)

> the comments, then this looks fine to me.
>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v21 03/13] clocksource: arm_arch_timer: remove arch_timer_detect_rate

2017-03-20 Thread Fu Wei

Hi Mark,

On 18 March 2017 at 02:07, Mark Rutland  wrote:
> On Tue, Feb 07, 2017 at 02:50:05AM +0800, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> The original counter frequency detection call(arch_timer_detect_rate)
>> include getting the frequency from the per-cpu arch-timer and the
>> memory-mapped (MMIO) timer interfaces. But they will be needed only when
>> the system initializes the relevant timer.
>>
>> This patch remove arch_timer_detect_rate founction, and use the
>> arch_timer_get_sysreg_freq and arch_timer_get_mmio_freq directly.
>>
>> Signed-off-by: Fu Wei 
>
> Could you please fold this with the prior patch?

Sure, will do

>
>> @@ -1087,7 +1072,12 @@ static int __init arch_timer_mem_init(struct 
>> device_node *np)
>>*/
>>   if (!arch_timer_rate &&
>>   of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
>> - arch_timer_detect_rate(base);
>> + arch_timer_rate = arch_timer_get_mmio_freq(base);
>> + if (!arch_timer_rate) {
>> + pr_err(FW_BUG "frequency not available for MMIO timer.\n");
>
> It would be better to say "MMIO frequency not available.\n" here.

thanks , will do

>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v21 00/13] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-03-19 Thread Fu Wei

Hi Mark,

On 18 March 2017 at 04:03, Mark Rutland  wrote:
> On Thu, Mar 09, 2017 at 11:47:16PM +0100, Fu Wei wrote:
>> Hi Mark, Marc,
>
> Hi,
>
>> I have tried to rebase all the 19(6+13) patches  on 4.11-rc1,
>> all the patchse can directly apply on  4.11-rc1,
>>
>> Could you help to review the patches, and see if there is anywhere I
>> can improve ?
>
> I'm sorry I have taken so long to review this posting.
>
> This is generally looking much better. I'm not sure about a few details
> relating to the watchdog, but I'm largely happy to pick up the rest of
> the series, if you can address my comments.

Great thanks for your review, I will post a new v22 ASAP(before your Tuesday).

>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v21 00/13] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-03-09 Thread Fu Wei

Hi Mark, Marc,

I have tried to rebase all the 19(6+13) patches  on 4.11-rc1,
all the patchse can directly apply on  4.11-rc1,

Could you help to review the patches, and see if there is anywhere I
can improve ?
Great thanks ! :-)



On 20 February 2017 at 17:20, Fu Wei  wrote:
> Hi Mark, Marc
>
> On 7 February 2017 at 02:50,   wrote:
>> From: Fu Wei 
>>
>> This patchset:
>> (1)Preparation for adding GTDT support in arm_arch_timer:
>> 1. Introduce two functions to get the frequency from mmio and sysreg.
>> 2. separate out device-tree code from arch_timer_detect_rate
>> 3. remove arch_timer_detect_rate use arch_timer_get_*_freq directly
>> 4. split arch_timer_rate for different types of timer
>> 5. Refactor arch_timer_needs_probing, and move it into DT init call
>> 6. Introduce some new structs and refactor the MMIO timer init code
>> for reusing some common code.
>>
>> (2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c
>> Parse all kinds of timer in GTDT table of ACPI:arch timer,
>> memory-mapped timer and SBSA Generic Watchdog timer.
>> This driver can help to simplify all the relevant timer drivers,
>> and separate all the ACPI GTDT knowledge from them.
>>
>> (3)Simplify ACPI code for arm_arch_timer
>>
>> (4)Add GTDT support for ARM memory-mapped timer.
>>
>> This patchset has been tested on the following platforms with ACPI enabled:
>> (1)ARM Foundation v8 model
>>
>> Changelog:
>> v21: https://lkml.org/lkml/2017/2/6/
>>  Introduce two functions to get the frequency from mmio and sysreg.
>>  Remove arch_timer_detect_rate use arch_timer_get_*_freq directly
>>  Split arch_timer_rate for different types of timer.
>>  Skip secure timer frame in GTDT driver.
>>  Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
>> arch-timer/cleanup
>>  (The first 6 patches in v20 have been merged into arch-timer/cleanup 
>> branch)
>
> Did I follow your suggestion correctly?
> I wonder how to improve this patchset. May I have your some suggestion
> or feedback on v21? :-)
>
> Great thanks for your help!
>
>>
>> v20: https://lkml.org/lkml/2017/1/18/534
>>  Reorder the first 4 patches and split the 4th patches.
>>  Leave CNTHCTL_* as they originally were.
>>  Fix the bug in arch_timer_select_ppi.
>>  Split "Rework counter frequency detection" patch.
>>  Rework the arch_timer_detect_rate function.
>>  Improve the commit message of "Refactor MMIO timer probing".
>>  Rebase to 4.10.0-rc4
>>
>> v19: https://lkml.org/lkml/2016/12/21/25
>>  Fix a '\n' missing in a error message in arch_timer_mem_init.
>>  Add "request_mem_region" for ioremapping cntbase, according to
>>  f947ee1 clocksource/drivers/arm_arch_timer: Map frame with 
>> of_io_request_and_map()
>>  Rebase to 4.9.0-gfb779ff
>>
>> v18: https://lkml.org/lkml/2016/12/8/446
>>  Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init.
>>  Rebase to 4.9.0-rc8-g9269898
>>
>> v17: https://lkml.org/lkml/2016/11/25/140
>>  Take out some cleanups from 4/15.
>>  Merge 5/15 and 6/15, improve PPI determination code,
>>  improve commit message.
>>  Rework counter frequency detection.
>>  Move arch_timer_needs_of_probing into DT init call.
>>  Move Platform Timer scan loop back to timer init call to avoid 
>> allocating
>>  and free memory.
>>  Improve all the exported functions' comment.
>>
>> v16: https://lkml.org/lkml/2016/11/16/268
>>  Fix patchset problem about static enum ppi_nr of 01/13 in v15.
>>  Refactor arch_timer_detect_rate.
>>  Refactor arch_timer_needs_probing.
>>
>> v15: https://lkml.org/lkml/2016/11/15/366
>>  Re-order patches
>>  Add arm_arch_timer refactoring patches to prepare for GTDT:
>>  1. rename some  enums and defines, and some cleanups
>>  2. separate out arch_timer_uses_ppi init code and fix a potential 
>> bug
>>  3. Improve some new structs, refactor the timer init code.
>>  Since the some structs have been changed, GTDT parser for memory-mapped
>>  timer and SBSA Generic Watchdog timer have been update.
>>
>> v14: https://lkml.org/lkml/2016/9/28/573
>>  Separate memory-mapped timer GTDT support into two patches
>>  1. Refactor the timer init code to prepare for GTDT
>>

Re: [PATCH v21 00/13] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-02-20 Thread Fu Wei

Hi Mark, Marc

On 7 February 2017 at 02:50,   wrote:
> From: Fu Wei 
>
> This patchset:
> (1)Preparation for adding GTDT support in arm_arch_timer:
> 1. Introduce two functions to get the frequency from mmio and sysreg.
> 2. separate out device-tree code from arch_timer_detect_rate
> 3. remove arch_timer_detect_rate use arch_timer_get_*_freq directly
> 4. split arch_timer_rate for different types of timer
> 5. Refactor arch_timer_needs_probing, and move it into DT init call
> 6. Introduce some new structs and refactor the MMIO timer init code
> for reusing some common code.
>
> (2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c
> Parse all kinds of timer in GTDT table of ACPI:arch timer,
> memory-mapped timer and SBSA Generic Watchdog timer.
> This driver can help to simplify all the relevant timer drivers,
> and separate all the ACPI GTDT knowledge from them.
>
> (3)Simplify ACPI code for arm_arch_timer
>
> (4)Add GTDT support for ARM memory-mapped timer.
>
> This patchset has been tested on the following platforms with ACPI enabled:
> (1)ARM Foundation v8 model
>
> Changelog:
> v21: https://lkml.org/lkml/2017/2/6/
>  Introduce two functions to get the frequency from mmio and sysreg.
>  Remove arch_timer_detect_rate use arch_timer_get_*_freq directly
>  Split arch_timer_rate for different types of timer.
>  Skip secure timer frame in GTDT driver.
>  Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
> arch-timer/cleanup
>  (The first 6 patches in v20 have been merged into arch-timer/cleanup 
> branch)

Did I follow your suggestion correctly?
I wonder how to improve this patchset. May I have your some suggestion
or feedback on v21? :-)

Great thanks for your help!

>
> v20: https://lkml.org/lkml/2017/1/18/534
>  Reorder the first 4 patches and split the 4th patches.
>  Leave CNTHCTL_* as they originally were.
>  Fix the bug in arch_timer_select_ppi.
>  Split "Rework counter frequency detection" patch.
>  Rework the arch_timer_detect_rate function.
>  Improve the commit message of "Refactor MMIO timer probing".
>  Rebase to 4.10.0-rc4
>
> v19: https://lkml.org/lkml/2016/12/21/25
>  Fix a '\n' missing in a error message in arch_timer_mem_init.
>  Add "request_mem_region" for ioremapping cntbase, according to
>  f947ee1 clocksource/drivers/arm_arch_timer: Map frame with 
> of_io_request_and_map()
>  Rebase to 4.9.0-gfb779ff
>
> v18: https://lkml.org/lkml/2016/12/8/446
>  Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init.
>  Rebase to 4.9.0-rc8-g9269898
>
> v17: https://lkml.org/lkml/2016/11/25/140
>  Take out some cleanups from 4/15.
>  Merge 5/15 and 6/15, improve PPI determination code,
>  improve commit message.
>  Rework counter frequency detection.
>  Move arch_timer_needs_of_probing into DT init call.
>  Move Platform Timer scan loop back to timer init call to avoid allocating
>  and free memory.
>  Improve all the exported functions' comment.
>
> v16: https://lkml.org/lkml/2016/11/16/268
>  Fix patchset problem about static enum ppi_nr of 01/13 in v15.
>  Refactor arch_timer_detect_rate.
>  Refactor arch_timer_needs_probing.
>
> v15: https://lkml.org/lkml/2016/11/15/366
>  Re-order patches
>  Add arm_arch_timer refactoring patches to prepare for GTDT:
>  1. rename some  enums and defines, and some cleanups
>  2. separate out arch_timer_uses_ppi init code and fix a potential bug
>  3. Improve some new structs, refactor the timer init code.
>  Since the some structs have been changed, GTDT parser for memory-mapped
>  timer and SBSA Generic Watchdog timer have been update.
>
> v14: https://lkml.org/lkml/2016/9/28/573
>  Separate memory-mapped timer GTDT support into two patches
>  1. Refactor the timer init code to prepare for GTDT
>  2. Add GTDT support for memory-mapped timer
>
> v13: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1231717.html
>  Improve arm_arch_timer code for memory-mapped
>  timer GTDT support, refactor original memory-mapped timer
>  dt support for reusing some common code.
>
> v12: https://lkml.org/lkml/2016/9/13/250
>  Rebase to latest Linux 4.8-rc6
>  Delete the confusing "skipping" in the error message.
>
> V11: https://lkml.org/lkml/2016/9/6/354
>  Rebase to latest Linux 4.8-rc5
>  Delete typedef (suggested by checkpatch.pl)
>
> V10: https://lkml.org/lkml/2016/7/26/2

[PATCH v21 06/13] clocksource: arm_arch_timer: move arch_timer_needs_of_probing into DT init call

2017-02-06 Thread fu . wei

From: Fu Wei 

Because arch_timer_needs_of_probing is only for booting with device-tree,
but arch_timer_common_init is a generic init call which shouldn't include
the FW-specific code. It's better to put arch_timer_needs_of_probing into
DT init function.

But for per-cpu timer, the arch_timer_common_init is called from
arch_timer_init. For reaching the goal above, this patch disassemble
arch_timer_init and use arch_timer_register and arch_timer_common_init
directly, just like arch_timer_mem init code is doing.
By this way, all the DT relevant code are only called from DT init call.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 46 
 1 file changed, 21 insertions(+), 25 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 97ed103..f2b9ec4 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -887,9 +887,6 @@ static bool __init arch_timer_needs_of_probing(void)
 
 static int __init arch_timer_common_init(void)
 {
-   if (acpi_disabled && arch_timer_needs_of_probing())
-   return 0;
-
arch_timer_banner(arch_timers_present);
arch_counter_register(arch_timers_present);
return arch_timer_arch_init();
@@ -927,26 +924,9 @@ static enum arch_timer_ppi_nr __init 
arch_timer_select_ppi(void)
return ARCH_TIMER_PHYS_SECURE_PPI;
 }
 
-static int __init arch_timer_init(void)
-{
-   int ret;
-
-   ret = arch_timer_register();
-   if (ret)
-   return ret;
-
-   ret = arch_timer_common_init();
-   if (ret)
-   return ret;
-
-   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
-
-   return 0;
-}
-
 static int __init arch_timer_of_init(struct device_node *np)
 {
-   int i;
+   int i, ret;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("multiple nodes in dt, skipping\n");
@@ -957,6 +937,8 @@ static int __init arch_timer_of_init(struct device_node *np)
for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++)
arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
 
+   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
+
/*
 * Try to determine the frequency from the device tree,
 * if fail, get the frequency from the sysreg CNTFRQ.
@@ -1001,7 +983,14 @@ static int __init arch_timer_of_init(struct device_node 
*np)
arch_counter_suspend_stop = of_property_read_bool(np,
 
"arm,no-tick-in-suspend");
 
-   return arch_timer_init();
+   ret = arch_timer_register();
+   if (ret)
+   return ret;
+
+   if (arch_timer_needs_of_probing())
+   return 0;
+
+   return arch_timer_common_init();
 }
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", 
arch_timer_of_init);
 CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", 
arch_timer_of_init);
@@ -1093,7 +1082,8 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
if (ret)
goto out;
 
-   return arch_timer_common_init();
+   if (!arch_timer_needs_of_probing())
+   ret = arch_timer_common_init();
 out:
iounmap(cntctlbase);
of_node_put(best_frame);
@@ -1122,6 +1112,7 @@ static int __init map_generic_timer_interrupt(u32 
interrupt, u32 flags)
 /* Initialize per-processor generic timer */
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
+   int ret;
struct acpi_table_gtdt *gtdt;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
@@ -1149,6 +1140,8 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
gtdt->non_secure_el2_flags);
 
+   arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
+
/* Get the frequency from the sysreg CNTFRQ */
arch_timer_sysreg_freq = arch_timer_get_sysreg_freq();
if (!arch_timer_sysreg_freq) {
@@ -1165,8 +1158,11 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
/* Always-on capability */
arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
 
-   arch_timer_init();
-   return 0;
+   ret = arch_timer_register();
+   if (ret)
+   return ret;
+
+   return arch_timer_common_init();
 }
 CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
 #endif
-- 
2.9.3

[PATCH v21 12/13] clocksource: arm_arch_timer: add GTDT support for memory-mapped timer

2017-02-06 Thread fu . wei

From: Fu Wei 

The patch add memory-mapped timer register support by using the
information provided by the new GTDT driver of ACPI.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 35 ---
 1 file changed, 32 insertions(+), 3 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 35e0b66..44c55ec 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -1159,10 +1159,35 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, 
"arm,armv7-timer-mem",
   arch_timer_mem_of_init);
 
 #ifdef CONFIG_ACPI_GTDT
-/* Initialize per-processor generic timer */
+static int __init arch_timer_mem_acpi_init(int platform_timer_count)
+{
+   struct arch_timer_mem *timer_mem;
+   int timer_count, i, ret;
+
+   timer_mem = kcalloc(platform_timer_count, sizeof(*timer_mem),
+   GFP_KERNEL);
+   if (!timer_mem)
+   return -ENOMEM;
+
+   ret = acpi_arch_timer_mem_init(timer_mem, &timer_count);
+   if (ret || !timer_count)
+   goto error;
+
+   for (i = 0; i < timer_count; i++) {
+   ret = arch_timer_mem_init(timer_mem + i);
+   if (!ret)
+   break;
+   }
+
+error:
+   kfree(timer_mem);
+   return ret;
+}
+
+/* Initialize per-processor generic timer and memory-mapped timer(if present) 
*/
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
-   int ret;
+   int ret, platform_timer_count;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("already initialized, skipping\n");
@@ -1171,7 +1196,7 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
 
arch_timers_present |= ARCH_TIMER_TYPE_CP15;
 
-   ret = acpi_gtdt_init(table, NULL);
+   ret = acpi_gtdt_init(table, &platform_timer_count);
if (ret) {
pr_err("Failed to init GTDT table.\n");
return ret;
@@ -1208,6 +1233,10 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
if (ret)
return ret;
 
+   if (platform_timer_count &&
+   arch_timer_mem_acpi_init(platform_timer_count))
+   pr_err("Failed to initialize memory-mapped timer.\n");
+
return arch_timer_common_init();
 }
 CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
-- 
2.9.3

[PATCH v21 13/13] acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver

2017-02-06 Thread fu . wei

From: Fu Wei 

This driver adds support for parsing SBSA Generic Watchdog timer
in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT,
and creating a platform device with that information.

This allows the operating system to obtain device data from the
resource of platform device. The platform device named "sbsa-gwdt"
can be used by the ARM SBSA Generic Watchdog driver.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Tested-by: Xiongfeng Wang 
---
 drivers/acpi/arm64/gtdt.c | 93 +++
 drivers/watchdog/Kconfig  |  1 +
 2 files changed, 94 insertions(+)

diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
index 29b9acc..3a2eb57 100644
--- a/drivers/acpi/arm64/gtdt.c
+++ b/drivers/acpi/arm64/gtdt.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -59,6 +60,13 @@ static inline bool is_timer_block(void *platform_timer)
return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
 }
 
+static inline bool is_watchdog(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+
+   return gh->type == ACPI_GTDT_TYPE_WATCHDOG;
+}
+
 static int __init map_gt_gsi(u32 interrupt, u32 flags)
 {
int trigger, polarity;
@@ -283,3 +291,88 @@ int __init acpi_arch_timer_mem_init(struct arch_timer_mem 
*data,
 
return 0;
 }
+
+/*
+ * Initialize a SBSA generic Watchdog platform device info from GTDT
+ */
+static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd,
+   int index)
+{
+   struct platform_device *pdev;
+   int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags);
+   int no_irq = 1;
+
+   /*
+* According to SBSA specification the size of refresh and control
+* frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF).
+*/
+   struct resource res[] = {
+   DEFINE_RES_MEM(wd->control_frame_address, SZ_4K),
+   DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K),
+   DEFINE_RES_IRQ(irq),
+   };
+
+   pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n",
+wd->refresh_frame_address, wd->control_frame_address,
+wd->timer_interrupt, wd->timer_flags);
+
+   if (!(wd->refresh_frame_address && wd->control_frame_address)) {
+   pr_err(FW_BUG "failed to get the Watchdog base address.\n");
+   return -EINVAL;
+   }
+
+   if (!wd->timer_interrupt)
+   pr_warn(FW_BUG "failed to get the Watchdog interrupt.\n");
+   else if (irq <= 0)
+   pr_warn("failed to map the Watchdog interrupt.\n");
+   else
+   no_irq = 0;
+
+   /*
+* Add a platform device named "sbsa-gwdt" to match the platform driver.
+* "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog
+* The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get device
+* info below by matching this name.
+*/
+   pdev = platform_device_register_simple("sbsa-gwdt", index, res,
+  ARRAY_SIZE(res) - no_irq);
+   if (IS_ERR(pdev)) {
+   acpi_unregister_gsi(wd->timer_interrupt);
+   return PTR_ERR(pdev);
+   }
+
+   return 0;
+}
+
+static int __init gtdt_sbsa_gwdt_init(void)
+{
+   int ret, i = 0;
+   void *platform_timer;
+   struct acpi_table_header *table;
+
+   if (acpi_disabled)
+   return 0;
+
+   if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0, &table)))
+   return -EINVAL;
+
+   ret = acpi_gtdt_init(table, NULL);
+   if (ret)
+   return ret;
+
+   for_each_platform_timer(platform_timer) {
+   if (is_watchdog(platform_timer)) {
+   ret = gtdt_import_sbsa_gwdt(platform_timer, i);
+   if (ret)
+   break;
+   i++;
+   }
+   }
+
+   if (i)
+   pr_info("found %d SBSA generic Watchdog(s).\n", i);
+
+   return ret;
+}
+
+device_initcall(gtdt_sbsa_gwdt_init);
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index acb00b5..c899df1 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -219,6 +219,7 @@ config ARM_SBSA_WATCHDOG
tristate "ARM SBSA Generic Watchdog"
depends on ARM64
depends on ARM_ARCH_TIMER
+   depends on ACPI_GTDT || !ACPI
select WATCHDOG_CORE
help
  ARM SBSA Generic Watchdog has two stage timeouts:
-- 
2.9.3

[PATCH v21 10/13] clocksource: arm_arch_timer: simplify ACPI support code.

2017-02-06 Thread fu . wei

From: Fu Wei 

The patch update arm_arch_timer driver to use the function
provided by the new GTDT driver of ACPI.
By this way, arm_arch_timer.c can be simplified, and separate
all the ACPI GTDT knowledge from this timer driver.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Tested-by: Xiongfeng Wang 
Reviewed-by: Hanjun Guo 
Tested-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 54 
 1 file changed, 17 insertions(+), 37 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 73e875d..35e0b66 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -1158,63 +1158,36 @@ static int __init arch_timer_mem_of_init(struct 
device_node *np)
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
   arch_timer_mem_of_init);
 
-#ifdef CONFIG_ACPI
-static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags)
-{
-   int trigger, polarity;
-
-   if (!interrupt)
-   return 0;
-
-   trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
-   : ACPI_LEVEL_SENSITIVE;
-
-   polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
-   : ACPI_ACTIVE_HIGH;
-
-   return acpi_register_gsi(NULL, interrupt, trigger, polarity);
-}
-
+#ifdef CONFIG_ACPI_GTDT
 /* Initialize per-processor generic timer */
 static int __init arch_timer_acpi_init(struct acpi_table_header *table)
 {
int ret;
-   struct acpi_table_gtdt *gtdt;
 
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
pr_warn("already initialized, skipping\n");
return -EINVAL;
}
 
-   gtdt = container_of(table, struct acpi_table_gtdt, header);
-
arch_timers_present |= ARCH_TIMER_TYPE_CP15;
 
-   arch_timer_ppi[ARCH_TIMER_PHYS_SECURE_PPI] =
-   map_generic_timer_interrupt(gtdt->secure_el1_interrupt,
-   gtdt->secure_el1_flags);
+   ret = acpi_gtdt_init(table, NULL);
+   if (ret) {
+   pr_err("Failed to init GTDT table.\n");
+   return ret;
+   }
 
arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI] =
-   map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt,
-   gtdt->non_secure_el1_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_PHYS_NONSECURE_PPI);
 
arch_timer_ppi[ARCH_TIMER_VIRT_PPI] =
-   map_generic_timer_interrupt(gtdt->virtual_timer_interrupt,
-   gtdt->virtual_timer_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_VIRT_PPI);
 
arch_timer_ppi[ARCH_TIMER_HYP_PPI] =
-   map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
-   gtdt->non_secure_el2_flags);
+   acpi_gtdt_map_ppi(ARCH_TIMER_HYP_PPI);
 
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
 
-   /* Get the frequency from the sysreg CNTFRQ */
-   arch_timer_sysreg_freq = arch_timer_get_sysreg_freq();
-   if (!arch_timer_sysreg_freq) {
-   pr_err(FW_BUG "frequency not available.\n");
-   return -EINVAL;
-   }
-
arch_timer_uses_ppi = arch_timer_select_ppi();
if (!arch_timer_ppi[arch_timer_uses_ppi]) {
pr_err("No interrupt available, giving up\n");
@@ -1222,7 +1195,14 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
}
 
/* Always-on capability */
-   arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
+   arch_timer_c3stop = acpi_gtdt_c3stop(arch_timer_uses_ppi);
+
+   /* Get the frequency from the sysreg CNTFRQ */
+   arch_timer_sysreg_freq = arch_timer_get_sysreg_freq();
+   if (!arch_timer_sysreg_freq) {
+   pr_err(FW_BUG "frequency not available.\n");
+   return -EINVAL;
+   }
 
ret = arch_timer_register();
if (ret)
-- 
2.9.3

[PATCH v21 11/13] acpi/arm64: Add memory-mapped timer support in GTDT driver

2017-02-06 Thread fu . wei

From: Fu Wei 

On platforms booting with ACPI, architected memory-mapped timers'
configuration data is provided by firmware through the ACPI GTDT
static table.

The clocksource architected timer kernel driver requires a firmware
interface to collect timer configuration and configure its driver.
this infrastructure is present for device tree systems, but it is
missing on systems booting with ACPI.

Implement the kernel infrastructure required to parse the static
ACPI GTDT table so that the architected timer clocksource driver can
make use of it on systems booting with ACPI, therefore enabling
the corresponding timers configuration.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
---
 drivers/acpi/arm64/gtdt.c | 128 ++
 include/linux/acpi.h  |   1 +
 2 files changed, 129 insertions(+)

diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
index 8a03b4b..29b9acc 100644
--- a/drivers/acpi/arm64/gtdt.c
+++ b/drivers/acpi/arm64/gtdt.c
@@ -37,6 +37,28 @@ struct acpi_gtdt_descriptor {
 
 static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
 
+static inline void *next_platform_timer(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+
+   platform_timer += gh->length;
+   if (platform_timer < acpi_gtdt_desc.gtdt_end)
+   return platform_timer;
+
+   return NULL;
+}
+
+#define for_each_platform_timer(_g)\
+   for (_g = acpi_gtdt_desc.platform_timer; _g;\
+_g = next_platform_timer(_g))
+
+static inline bool is_timer_block(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+
+   return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
+}
+
 static int __init map_gt_gsi(u32 interrupt, u32 flags)
 {
int trigger, polarity;
@@ -155,3 +177,109 @@ int __init acpi_gtdt_init(struct acpi_table_header *table,
 
return ret;
 }
+
+static int __init gtdt_parse_timer_block(struct acpi_gtdt_timer_block *block,
+struct arch_timer_mem *data)
+{
+   int i, j;
+   struct acpi_gtdt_timer_entry *frame;
+
+   if (!block->timer_count) {
+   pr_err(FW_BUG "GT block present, but frame count is zero.");
+   return -ENODEV;
+   }
+
+   if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) {
+   pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 
8\n",
+  block->timer_count);
+   return -EINVAL;
+   }
+
+   data->cntctlbase = (phys_addr_t)block->block_address;
+   /*
+* According to "Table * CNTCTLBase memory map" of
+*  for ARMv8,
+* The size of the CNTCTLBase frame is 4KB(Offset 0x000 – 0xFFC).
+*/
+   data->size = SZ_4K;
+
+   frame = (void *)block + block->timer_offset;
+   if (frame + block->timer_count != (void *)block + block->header.length)
+   return -EINVAL;
+
+   /*
+* Get the GT timer Frame data for every GT Block Timer
+*/
+   for (i = 0, j = 0; i < block->timer_count; i++, frame++) {
+   if (frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)
+   continue;
+
+   if (!frame->base_address || !frame->timer_interrupt)
+   return -EINVAL;
+
+   data->frame[j].phys_irq = map_gt_gsi(frame->timer_interrupt,
+frame->timer_flags);
+   if (data->frame[j].phys_irq <= 0) {
+   pr_warn("failed to map physical timer irq in frame 
%d.\n",
+   i);
+   return -EINVAL;
+   }
+
+   data->frame[j].virt_irq =
+   map_gt_gsi(frame->virtual_timer_interrupt,
+  frame->virtual_timer_flags);
+   if (data->frame[j].virt_irq <= 0) {
+   pr_warn("failed to map virtual timer irq in frame 
%d.\n",
+   i);
+   acpi_unregister_gsi(frame->timer_interrupt);
+   return -EINVAL;
+   }
+
+   data->frame[j].frame_nr = frame->frame_number;
+   data->frame[j].cntbase = frame->base_address;
+   /*
+* According to "Table * CNTBaseN memory map" of
+*  for ARMv8,
+* The size of the CNTBaseN frame is 4KB(Offset 0x000 – 0xFFC).
+*/
+   data->frame[j].size = SZ_4K;
+   j++;
+   }
+   data->num_frames = j;
+
+   return 0;
+}
+
+/**
+ * acpi_arch_timer_mem_init() - Get the info of all GT blocks in GTDT table.
+ * @data:  the pointer to the array of

[PATCH v21 09/13] acpi/arm64: Add GTDT table parse driver

2017-02-06 Thread fu . wei

From: Fu Wei 

This patch adds support for parsing arch timer info in GTDT,
provides some kernel APIs to parse all the PPIs and
always-on info in GTDT and export them.

By this driver, we can simplify arm_arch_timer drivers, and
separate the ACPI GTDT knowledge from it.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Acked-by: Rafael J. Wysocki 
Tested-by: Xiongfeng Wang 
Reviewed-by: Hanjun Guo 
Tested-by: Hanjun Guo 
---
 arch/arm64/Kconfig  |   1 +
 drivers/acpi/arm64/Kconfig  |   3 +
 drivers/acpi/arm64/Makefile |   1 +
 drivers/acpi/arm64/gtdt.c   | 157 
 include/linux/acpi.h|   6 ++
 5 files changed, 168 insertions(+)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 1117421..ab1ee10 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -2,6 +2,7 @@ config ARM64
def_bool y
select ACPI_CCA_REQUIRED if ACPI
select ACPI_GENERIC_GSI if ACPI
+   select ACPI_GTDT if ACPI
select ACPI_REDUCED_HARDWARE_ONLY if ACPI
select ACPI_MCFG if ACPI
select ACPI_SPCR_TABLE if ACPI
diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig
index 4616da4..5a6f80f 100644
--- a/drivers/acpi/arm64/Kconfig
+++ b/drivers/acpi/arm64/Kconfig
@@ -4,3 +4,6 @@
 
 config ACPI_IORT
bool
+
+config ACPI_GTDT
+   bool
diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile
index 72331f2..1017def 100644
--- a/drivers/acpi/arm64/Makefile
+++ b/drivers/acpi/arm64/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_ACPI_IORT)+= iort.o
+obj-$(CONFIG_ACPI_GTDT)+= gtdt.o
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
new file mode 100644
index 000..8a03b4b
--- /dev/null
+++ b/drivers/acpi/arm64/gtdt.c
@@ -0,0 +1,157 @@
+/*
+ * ARM Specific GTDT table Support
+ *
+ * Copyright (C) 2016, Linaro Ltd.
+ * Author: Daniel Lezcano 
+ * Fu Wei 
+ * Hanjun Guo 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#undef pr_fmt
+#define pr_fmt(fmt) "ACPI GTDT: " fmt
+
+/**
+ * struct acpi_gtdt_descriptor - Store the key info of GTDT for all functions
+ * @gtdt:  The pointer to the struct acpi_table_gtdt of GTDT table.
+ * @gtdt_end:  The pointer to the end of GTDT table.
+ * @platform_timer:The pointer to the start of Platform Timer Structure
+ *
+ * The struct store the key info of GTDT table, it should be initialized by
+ * acpi_gtdt_init.
+ */
+struct acpi_gtdt_descriptor {
+   struct acpi_table_gtdt *gtdt;
+   void *gtdt_end;
+   void *platform_timer;
+};
+
+static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
+
+static int __init map_gt_gsi(u32 interrupt, u32 flags)
+{
+   int trigger, polarity;
+
+   trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
+   : ACPI_LEVEL_SENSITIVE;
+
+   polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
+   : ACPI_ACTIVE_HIGH;
+
+   return acpi_register_gsi(NULL, interrupt, trigger, polarity);
+}
+
+/**
+ * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
+ * @type:  the type of PPI.
+ *
+ * Note: Linux on arm64 isn't supported on the secure side.
+ * So we only handle the non-secure timer PPIs,
+ * ARCH_TIMER_PHYS_SECURE_PPI is treated as invalid type.
+ *
+ * Return: the mapped PPI value, 0 if error.
+ */
+int __init acpi_gtdt_map_ppi(int type)
+{
+   struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
+
+   switch (type) {
+   case ARCH_TIMER_PHYS_NONSECURE_PPI:
+   return map_gt_gsi(gtdt->non_secure_el1_interrupt,
+ gtdt->non_secure_el1_flags);
+   case ARCH_TIMER_VIRT_PPI:
+   return map_gt_gsi(gtdt->virtual_timer_interrupt,
+ gtdt->virtual_timer_flags);
+
+   case ARCH_TIMER_HYP_PPI:
+   return map_gt_gsi(gtdt->non_secure_el2_interrupt,
+ gtdt->non_secure_el2_flags);
+   default:
+   pr_err("Failed to map timer interrupt: invalid type.\n");
+   }
+
+   return 0;
+}
+
+/**
+ * acpi_gtdt_c3stop() - Got c3stop info from GTDT according to the type of PPI.
+ * @type:  the type of PPI.
+ *
+ * Return: 1 if the timer can be in deep idle state, 0 otherwise.
+ */
+bool __init acpi_gtdt_c3stop(int type)
+{
+   struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
+
+   switch (type) {
+   case ARCH_TIMER_PHYS_NONSECURE_PPI:
+   return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
+
+   case ARCH_TIMER_VIRT_PPI:
+   return !(gtdt->virtual_timer_flags & ACPI_GTDT_ALWAYS_ON);
+
+   case ARCH_T

[PATCH v21 07/13] clocksource: arm_arch_timer: introduce some new structs to prepare for GTDT

2017-02-06 Thread fu . wei

From: Fu Wei 

The patch introduce two new structs: arch_timer_mem, arch_timer_mem_frame.
And also introduce a new define: ARCH_TIMER_MEM_MAX_FRAMES

These will be used for refactoring the memory-mapped timer init code to
prepare for GTDT

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 include/clocksource/arm_arch_timer.h | 17 +
 1 file changed, 17 insertions(+)

diff --git a/include/clocksource/arm_arch_timer.h 
b/include/clocksource/arm_arch_timer.h
index 4a98c06..b7dd185 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -57,6 +57,8 @@ enum arch_timer_spi_nr {
 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
 #define ARCH_TIMER_MEM_VIRT_ACCESS 3
 
+#define ARCH_TIMER_MEM_MAX_FRAMES  8
+
 #define ARCH_TIMER_USR_PCT_ACCESS_EN   (1 << 0) /* physical counter */
 #define ARCH_TIMER_USR_VCT_ACCESS_EN   (1 << 1) /* virtual counter */
 #define ARCH_TIMER_VIRT_EVT_EN (1 << 2)
@@ -72,6 +74,21 @@ struct arch_timer_kvm_info {
int virtual_irq;
 };
 
+struct arch_timer_mem_frame {
+   int frame_nr;
+   phys_addr_t cntbase;
+   size_t size;
+   int phys_irq;
+   int virt_irq;
+};
+
+struct arch_timer_mem {
+   phys_addr_t cntctlbase;
+   size_t size;
+   int num_frames;
+   struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES];
+};
+
 #ifdef CONFIG_ARM_ARCH_TIMER
 
 extern u32 arch_timer_get_rate(void);
-- 
2.9.3

[PATCH v21 08/13] clocksource: arm_arch_timer: refactor MMIO timer probing.

2017-02-06 Thread fu . wei

From: Fu Wei 

Currently the code to probe MMIO architected timers mixes DT parsing with
actual poking of hardware. This makes the code harder than necessary to
understand, and makes it difficult to add support for probing via ACPI.

This patch factors all the DT-specific logic out of arch_timer_mem_init(),
into a new function arch_timer_mem_of_init().
The former pokes the hardware and determines the suitablility of frames
based on a datastructure populated by the latter.

This cleanly separates the two and will make it possible to add probing
using the ACPI GTDT in subsequent patches.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 156 +--
 1 file changed, 111 insertions(+), 45 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index f2b9ec4..73e875d 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -995,17 +995,20 @@ static int __init arch_timer_of_init(struct device_node 
*np)
 CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", 
arch_timer_of_init);
 CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", 
arch_timer_of_init);
 
-static int __init arch_timer_mem_init(struct device_node *np)
+static int __init arch_timer_mem_init(struct arch_timer_mem *timer_mem)
 {
-   struct device_node *frame, *best_frame = NULL;
void __iomem *cntctlbase, *base;
-   unsigned int irq, ret = -EINVAL;
+   struct arch_timer_mem_frame *best_frame = NULL;
+   unsigned int irq;
u32 cnttidr;
+   int i, ret;
 
-   arch_timers_present |= ARCH_TIMER_TYPE_MEM;
-   cntctlbase = of_iomap(np, 0);
+   if (!timer_mem->num_frames)
+   return -ENODEV;
+
+   cntctlbase = ioremap(timer_mem->cntctlbase, timer_mem->size);
if (!cntctlbase) {
-   pr_err("Can't find CNTCTLBase\n");
+   pr_err("Can't map CNTCTLBase.\n");
return -ENXIO;
}
 
@@ -1015,26 +1018,18 @@ static int __init arch_timer_mem_init(struct 
device_node *np)
 * Try to find a virtual capable frame. Otherwise fall back to a
 * physical capable frame.
 */
-   for_each_available_child_of_node(np, frame) {
-   int n;
-   u32 cntacr;
-
-   if (of_property_read_u32(frame, "frame-number", &n)) {
-   pr_err("Missing frame-number\n");
-   of_node_put(frame);
-   goto out;
-   }
+   for (i = 0; i < timer_mem->num_frames; i++) {
+   u32 cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT |
+CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT;
+   int n = timer_mem->frame[i].frame_nr;
 
/* Try enabling everything, and see what sticks */
-   cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT |
-CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT;
writel_relaxed(cntacr, cntctlbase + CNTACR(n));
cntacr = readl_relaxed(cntctlbase + CNTACR(n));
 
if ((cnttidr & CNTTIDR_VIRT(n)) &&
!(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) {
-   of_node_put(best_frame);
-   best_frame = frame;
+   best_frame = &timer_mem->frame[i];
arch_timer_mem_use_virtual = true;
break;
}
@@ -1042,55 +1037,126 @@ static int __init arch_timer_mem_init(struct 
device_node *np)
if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT))
continue;
 
-   of_node_put(best_frame);
-   best_frame = of_node_get(frame);
+   best_frame = &timer_mem->frame[i];
}
+   iounmap(cntctlbase);
 
-   ret= -ENXIO;
-   base = arch_counter_base = of_io_request_and_map(best_frame, 0,
-"arch_mem_timer");
-   if (IS_ERR(base)) {
-   pr_err("Can't map frame's registers\n");
-   goto out;
+   if (!best_frame) {
+   pr_err("Can't find frame for register\n");
+   return -EINVAL;
}
 
if (arch_timer_mem_use_virtual)
-   irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_VIRT_SPI);
+   irq = best_frame->virt_irq;
else
-   irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_PHYS_SPI);
+   irq = best_frame->phys_irq;
 
-   ret = -EINVAL;
if (!irq) {
pr_err("Frame missing %s irq.\n",
   arch_timer_mem_use_virtual ? "virt" : "phys");
-

[PATCH v21 05/13] clocksource: arm_arch_timer: refactor arch_timer_needs_probing

2017-02-06 Thread fu . wei

From: Fu Wei 

When system init with device-tree, we don't know which node will be
initialized first. And the code in arch_timer_common_init should wait
until per-cpu timer and MMIO timer are both initialized. So we need
arch_timer_needs_probing to detect the init status of system.

But currently the code is dispersed in arch_timer_needs_probing and
arch_timer_common_init. And the function name doesn't specify that
it's only for device-tree. This is somewhat confusing.

This patch move all related code from arch_timer_common_init to
arch_timer_needs_probing, refactor it, and rename it to
arch_timer_needs_of_probing. And make sure that it will be called
only if acpi is disabled.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 34 +++---
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 97a4e90..97ed103 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -858,15 +858,28 @@ static const struct of_device_id 
arch_timer_mem_of_match[] __initconst = {
{},
 };
 
-static bool __init
-arch_timer_needs_probing(int type, const struct of_device_id *matches)
+static bool __init arch_timer_needs_of_probing(void)
 {
struct device_node *dn;
bool needs_probing = false;
+   unsigned int mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
 
-   dn = of_find_matching_node(NULL, matches);
-   if (dn && of_device_is_available(dn) && !(arch_timers_present & type))
+   /* We have two timers, and both device-tree nodes are probed. */
+   if ((arch_timers_present & mask) == mask)
+   return false;
+
+   /*
+* Only one type of timer is probed,
+* check if we have another type of timer node in device-tree.
+*/
+   if (arch_timers_present & ARCH_TIMER_TYPE_CP15)
+   dn = of_find_matching_node(NULL, arch_timer_mem_of_match);
+   else
+   dn = of_find_matching_node(NULL, arch_timer_of_match);
+
+   if (dn && of_device_is_available(dn))
needs_probing = true;
+
of_node_put(dn);
 
return needs_probing;
@@ -874,17 +887,8 @@ arch_timer_needs_probing(int type, const struct 
of_device_id *matches)
 
 static int __init arch_timer_common_init(void)
 {
-   unsigned mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
-
-   /* Wait until both nodes are probed if we have two timers */
-   if ((arch_timers_present & mask) != mask) {
-   if (arch_timer_needs_probing(ARCH_TIMER_TYPE_MEM,
-arch_timer_mem_of_match))
-   return 0;
-   if (arch_timer_needs_probing(ARCH_TIMER_TYPE_CP15,
-arch_timer_of_match))
-   return 0;
-   }
+   if (acpi_disabled && arch_timer_needs_of_probing())
+   return 0;
 
arch_timer_banner(arch_timers_present);
arch_counter_register(arch_timers_present);
-- 
2.9.3

[PATCH v21 02/13] clocksource: arm_arch_timer: separate out device-tree code from arch_timer_detect_rate

2017-02-06 Thread fu . wei

From: Fu Wei 

Currently, the counter frequency detection call(arch_timer_detect_rate)
include getting the frequency from the device-tree property.
But reading device-tree property will be needed only when system boot with
device-tree.

This patch separate out device-tree code, keep them in device-tree init
function.

Signed-off-by: Fu Wei 
Reviewed-by: Hanjun Guo 
Tested-by: Hanjun Guo 
---
 drivers/clocksource/arm_arch_timer.c | 38 ++--
 1 file changed, 23 insertions(+), 15 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 1d273d6..aa14305 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -571,24 +571,19 @@ static u32 arch_timer_get_mmio_freq(void __iomem *cntbase)
return readl_relaxed(cntbase + CNTFRQ);
 }
 
-static void
-arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
+static void arch_timer_detect_rate(void __iomem *cntbase)
 {
/* Who has more than one independent system counter? */
if (arch_timer_rate)
return;
 
/*
-* Try to determine the frequency from the device tree or CNTFRQ,
-* if ACPI is enabled, get the frequency from CNTFRQ ONLY.
+* Try to determine the frequency from the MMIO timer or the sysreg.
 */
-   if (!acpi_disabled ||
-   of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) {
-   if (cntbase)
-   arch_timer_rate = arch_timer_get_mmio_freq(cntbase);
-   else
-   arch_timer_rate = arch_timer_get_sysreg_freq();
-   }
+   if (cntbase)
+   arch_timer_rate = arch_timer_get_mmio_freq(cntbase);
+   else
+   arch_timer_rate = arch_timer_get_sysreg_freq();
 
/* Check the timer frequency. */
if (arch_timer_rate == 0)
@@ -969,7 +964,13 @@ static int __init arch_timer_of_init(struct device_node 
*np)
for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++)
arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
 
-   arch_timer_detect_rate(NULL, np);
+   /*
+* Try to determine the frequency from the device tree,
+* if fail, get the frequency from the sysreg CNTFRQ.
+*/
+   if (!arch_timer_rate &&
+   of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
+   arch_timer_detect_rate(NULL);
 
arch_timer_c3stop = !of_property_read_bool(np, "always-on");
 
@@ -1080,7 +1081,14 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
goto out;
}
 
-   arch_timer_detect_rate(base, np);
+   /*
+* Try to determine the frequency from the device tree,
+* if fail, get the frequency from the CNTFRQ reg of MMIO timer.
+*/
+   if (!arch_timer_rate &&
+   of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
+   arch_timer_detect_rate(base);
+
ret = arch_timer_mem_register(base, irq);
if (ret)
goto out;
@@ -1141,8 +1149,8 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
gtdt->non_secure_el2_flags);
 
-   /* Get the frequency from CNTFRQ */
-   arch_timer_detect_rate(NULL, NULL);
+   /* Get the frequency from the sysreg CNTFRQ */
+   arch_timer_detect_rate(NULL);
 
arch_timer_uses_ppi = arch_timer_select_ppi();
if (!arch_timer_ppi[arch_timer_uses_ppi]) {
-- 
2.9.3

[PATCH v21 03/13] clocksource: arm_arch_timer: remove arch_timer_detect_rate

2017-02-06 Thread fu . wei

From: Fu Wei 

The original counter frequency detection call(arch_timer_detect_rate)
include getting the frequency from the per-cpu arch-timer and the
memory-mapped (MMIO) timer interfaces. But they will be needed only when
the system initializes the relevant timer.

This patch remove arch_timer_detect_rate founction, and use the
arch_timer_get_sysreg_freq and arch_timer_get_mmio_freq directly.

Signed-off-by: Fu Wei 
---
 drivers/clocksource/arm_arch_timer.c | 38 +++-
 1 file changed, 16 insertions(+), 22 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index aa14305..63fb441 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -571,25 +571,6 @@ static u32 arch_timer_get_mmio_freq(void __iomem *cntbase)
return readl_relaxed(cntbase + CNTFRQ);
 }
 
-static void arch_timer_detect_rate(void __iomem *cntbase)
-{
-   /* Who has more than one independent system counter? */
-   if (arch_timer_rate)
-   return;
-
-   /*
-* Try to determine the frequency from the MMIO timer or the sysreg.
-*/
-   if (cntbase)
-   arch_timer_rate = arch_timer_get_mmio_freq(cntbase);
-   else
-   arch_timer_rate = arch_timer_get_sysreg_freq();
-
-   /* Check the timer frequency. */
-   if (arch_timer_rate == 0)
-   pr_warn("frequency not available\n");
-}
-
 static void arch_timer_banner(unsigned type)
 {
pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
@@ -970,7 +951,11 @@ static int __init arch_timer_of_init(struct device_node 
*np)
 */
if (!arch_timer_rate &&
of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
-   arch_timer_detect_rate(NULL);
+   arch_timer_rate = arch_timer_get_sysreg_freq();
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "frequency not available.\n");
+   return -EINVAL;
+   }
 
arch_timer_c3stop = !of_property_read_bool(np, "always-on");
 
@@ -1087,7 +1072,12 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
 */
if (!arch_timer_rate &&
of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
-   arch_timer_detect_rate(base);
+   arch_timer_rate = arch_timer_get_mmio_freq(base);
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "frequency not available for MMIO timer.\n");
+   ret = -EINVAL;
+   goto out;
+   }
 
ret = arch_timer_mem_register(base, irq);
if (ret)
@@ -1150,7 +1140,11 @@ static int __init arch_timer_acpi_init(struct 
acpi_table_header *table)
gtdt->non_secure_el2_flags);
 
/* Get the frequency from the sysreg CNTFRQ */
-   arch_timer_detect_rate(NULL);
+   arch_timer_rate = arch_timer_get_sysreg_freq();
+   if (!arch_timer_rate) {
+   pr_err(FW_BUG "frequency not available.\n");
+   return -EINVAL;
+   }
 
arch_timer_uses_ppi = arch_timer_select_ppi();
if (!arch_timer_ppi[arch_timer_uses_ppi]) {
-- 
2.9.3

[PATCH v21 04/13] clocksource: arm_arch_timer: split arch_timer_rate for different types of timer

2017-02-06 Thread fu . wei

From: Fu Wei 

Currently, arch_timer_rate is used to store the frequency got from per-cpu
arch-timer or the memory-mapped (MMIO) timers. But those values come from
different registers which should all be initialized by firmware.

This patch remove arch_timer_rate, and use arch_timer_sysreg_freq and
arch_timer_mmio_freq instead.

Signed-off-by: Fu Wei 
---
 drivers/clocksource/arm_arch_timer.c | 42 
 1 file changed, 24 insertions(+), 18 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 63fb441..97a4e90 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -65,7 +65,8 @@ struct arch_timer {
 
 #define to_arch_timer(e) container_of(e, struct arch_timer, evt)
 
-static u32 arch_timer_rate;
+static u32 arch_timer_sysreg_freq;
+static u32 arch_timer_mmio_freq;
 static int arch_timer_ppi[ARCH_TIMER_MAX_TIMER_PPI];
 
 static struct clock_event_device __percpu *arch_timer_evt;
@@ -417,6 +418,7 @@ static void erratum_workaround_set_sne(struct 
clock_event_device *clk)
 static void __arch_timer_setup(unsigned type,
   struct clock_event_device *clk)
 {
+   u32 freq;
clk->features = CLOCK_EVT_FEAT_ONESHOT;
 
if (type == ARCH_TIMER_TYPE_CP15) {
@@ -444,6 +446,7 @@ static void __arch_timer_setup(unsigned type,
}
 
erratum_workaround_set_sne(clk);
+   freq = arch_timer_sysreg_freq;
} else {
clk->features |= CLOCK_EVT_FEAT_DYNIRQ;
clk->name = "arch_mem_timer";
@@ -460,11 +463,12 @@ static void __arch_timer_setup(unsigned type,
clk->set_next_event =
arch_timer_set_next_event_phys_mem;
}
+   freq = arch_timer_mmio_freq;
}
 
clk->set_state_shutdown(clk);
 
-   clockevents_config_and_register(clk, arch_timer_rate, 0xf, 0x7fff);
+   clockevents_config_and_register(clk, freq, 0xf, 0x7fff);
 }
 
 static void arch_timer_evtstrm_enable(int divider)
@@ -487,7 +491,7 @@ static void arch_timer_configure_evtstream(void)
int evt_stream_div, pos;
 
/* Find the closest power of two to the divisor */
-   evt_stream_div = arch_timer_rate / ARCH_TIMER_EVT_STREAM_FREQ;
+   evt_stream_div = arch_timer_sysreg_freq / ARCH_TIMER_EVT_STREAM_FREQ;
pos = fls(evt_stream_div);
if (pos > 1 && !(evt_stream_div & (1 << (pos - 2
pos--;
@@ -578,8 +582,8 @@ static void arch_timer_banner(unsigned type)
type == (ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM) ?
" and " : "",
type & ARCH_TIMER_TYPE_MEM ? "mmio" : "",
-   (unsigned long)arch_timer_rate / 100,
-   (unsigned long)(arch_timer_rate / 1) % 100,
+   (unsigned long)arch_timer_sysreg_freq / 100,
+   (unsigned long)(arch_timer_sysreg_freq / 1) % 100,
type & ARCH_TIMER_TYPE_CP15 ?
(arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) ? "virt" : 
"phys" :
"",
@@ -591,7 +595,7 @@ static void arch_timer_banner(unsigned type)
 
 u32 arch_timer_get_rate(void)
 {
-   return arch_timer_rate;
+   return arch_timer_sysreg_freq;
 }
 
 static u64 arch_counter_get_cntvct_mem(void)
@@ -648,6 +652,7 @@ struct arch_timer_kvm_info *arch_timer_get_kvm_info(void)
 static void __init arch_counter_register(unsigned type)
 {
u64 start_count;
+   u32 freq;
 
/* Register the CP15 based counter if we have one */
if (type & ARCH_TIMER_TYPE_CP15) {
@@ -657,6 +662,8 @@ static void __init arch_counter_register(unsigned type)
else
arch_timer_read_counter = arch_counter_get_cntpct;
 
+   freq = arch_timer_sysreg_freq;
+
clocksource_counter.archdata.vdso_direct = true;
 
 #ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND
@@ -669,19 +676,20 @@ static void __init arch_counter_register(unsigned type)
 #endif
} else {
arch_timer_read_counter = arch_counter_get_cntvct_mem;
+   freq = arch_timer_mmio_freq;
}
 
if (!arch_counter_suspend_stop)
clocksource_counter.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP;
start_count = arch_timer_read_counter();
-   clocksource_register_hz(&clocksource_counter, arch_timer_rate);
+   clocksource_register_hz(&clocksource_counter, freq);
cyclecounter.mult = clocksource_counter.mult;
cyclecounter.shift = clocksource_counter.shift;
timecounter_init(&arch_timer_kvm_info.timecounter,
 &cyclecounter, start_count);
 
/* 56 bits minim

[PATCH v21 01/13] clocksource: arm_arch_timer: introduce two functions to get the frequency from mmio and sysreg.

2017-02-06 Thread fu . wei

From: Fu Wei 

The patch introduce two new functions: arch_timer_get_sysreg_freq and
arch_timer_get_mmio_freq, and applys them in arch_timer_detect_rate.
These will be used for getting the frequency from mmio and sysreg to
prepare for reworking counter frequency detection.

Signed-off-by: Fu Wei 
---
 drivers/clocksource/arm_arch_timer.c | 21 +++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 46a1709..1d273d6 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -554,6 +554,23 @@ static int arch_timer_starting_cpu(unsigned int cpu)
return 0;
 }
 
+static u32 arch_timer_get_sysreg_freq(void)
+{
+   /*
+* Try to get the frequency from the CNTFRQ of sysreg.
+*/
+   return arch_timer_get_cntfrq();
+}
+
+static u32 arch_timer_get_mmio_freq(void __iomem *cntbase)
+{
+   /*
+* Try to get the frequency from the CNTFRQ of timer frame registers.
+* Note: please verify cntbase in caller.
+*/
+   return readl_relaxed(cntbase + CNTFRQ);
+}
+
 static void
 arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
 {
@@ -568,9 +585,9 @@ arch_timer_detect_rate(void __iomem *cntbase, struct 
device_node *np)
if (!acpi_disabled ||
of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) {
if (cntbase)
-   arch_timer_rate = readl_relaxed(cntbase + CNTFRQ);
+   arch_timer_rate = arch_timer_get_mmio_freq(cntbase);
else
-   arch_timer_rate = arch_timer_get_cntfrq();
+   arch_timer_rate = arch_timer_get_sysreg_freq();
}
 
/* Check the timer frequency. */
-- 
2.9.3

[PATCH v21 00/13] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-02-06 Thread fu . wei

From: Fu Wei 

This patchset:
(1)Preparation for adding GTDT support in arm_arch_timer:
1. Introduce two functions to get the frequency from mmio and sysreg.
2. separate out device-tree code from arch_timer_detect_rate
3. remove arch_timer_detect_rate use arch_timer_get_*_freq directly
4. split arch_timer_rate for different types of timer
5. Refactor arch_timer_needs_probing, and move it into DT init call
6. Introduce some new structs and refactor the MMIO timer init code
for reusing some common code.

(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c
Parse all kinds of timer in GTDT table of ACPI:arch timer,
memory-mapped timer and SBSA Generic Watchdog timer.
This driver can help to simplify all the relevant timer drivers,
and separate all the ACPI GTDT knowledge from them.

(3)Simplify ACPI code for arm_arch_timer

(4)Add GTDT support for ARM memory-mapped timer.

This patchset has been tested on the following platforms with ACPI enabled:
(1)ARM Foundation v8 model

Changelog:
v21: https://lkml.org/lkml/2017/2/6/
 Introduce two functions to get the frequency from mmio and sysreg.
 Remove arch_timer_detect_rate use arch_timer_get_*_freq directly
 Split arch_timer_rate for different types of timer.
 Skip secure timer frame in GTDT driver.
 Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
arch-timer/cleanup
 (The first 6 patches in v20 have been merged into arch-timer/cleanup 
branch)

v20: https://lkml.org/lkml/2017/1/18/534
 Reorder the first 4 patches and split the 4th patches.
 Leave CNTHCTL_* as they originally were.
 Fix the bug in arch_timer_select_ppi.
 Split "Rework counter frequency detection" patch.
 Rework the arch_timer_detect_rate function.
 Improve the commit message of "Refactor MMIO timer probing".
 Rebase to 4.10.0-rc4

v19: https://lkml.org/lkml/2016/12/21/25
 Fix a '\n' missing in a error message in arch_timer_mem_init.
 Add "request_mem_region" for ioremapping cntbase, according to
 f947ee1 clocksource/drivers/arm_arch_timer: Map frame with 
of_io_request_and_map()
 Rebase to 4.9.0-gfb779ff

v18: https://lkml.org/lkml/2016/12/8/446
 Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init.
 Rebase to 4.9.0-rc8-g9269898

v17: https://lkml.org/lkml/2016/11/25/140
 Take out some cleanups from 4/15.
 Merge 5/15 and 6/15, improve PPI determination code,
 improve commit message.
 Rework counter frequency detection.
 Move arch_timer_needs_of_probing into DT init call.
 Move Platform Timer scan loop back to timer init call to avoid allocating
 and free memory.
 Improve all the exported functions' comment.

v16: https://lkml.org/lkml/2016/11/16/268
 Fix patchset problem about static enum ppi_nr of 01/13 in v15.
 Refactor arch_timer_detect_rate.
 Refactor arch_timer_needs_probing.

v15: https://lkml.org/lkml/2016/11/15/366
 Re-order patches
 Add arm_arch_timer refactoring patches to prepare for GTDT:
 1. rename some  enums and defines, and some cleanups
 2. separate out arch_timer_uses_ppi init code and fix a potential bug
 3. Improve some new structs, refactor the timer init code.
 Since the some structs have been changed, GTDT parser for memory-mapped
 timer and SBSA Generic Watchdog timer have been update.

v14: https://lkml.org/lkml/2016/9/28/573
 Separate memory-mapped timer GTDT support into two patches
 1. Refactor the timer init code to prepare for GTDT
 2. Add GTDT support for memory-mapped timer

v13: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1231717.html
 Improve arm_arch_timer code for memory-mapped
 timer GTDT support, refactor original memory-mapped timer
 dt support for reusing some common code.

v12: https://lkml.org/lkml/2016/9/13/250
 Rebase to latest Linux 4.8-rc6
 Delete the confusing "skipping" in the error message.

V11: https://lkml.org/lkml/2016/9/6/354
 Rebase to latest Linux 4.8-rc5
 Delete typedef (suggested by checkpatch.pl)

V10: https://lkml.org/lkml/2016/7/26/215
 Drop the "readq" patch.
 Rebase to latest Linux 4.7.

V9: https://lkml.org/lkml/2016/7/25/345
Improve pr_err message in acpi gtdt driver.
Update Commit message for 7/9
shorten the irq mapping function name
Improve GTDT driver for memory-mapped timer

v8: https://lkml.org/lkml/2016/7/19/660
Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT",
and also improve printk message.
Simplify is_timer_block and is_watchdog.
Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init();
Delete __init in include/linux/acpi.h for GTDT API
Make ARM64 select GTDT.
Delete "#include &

Re: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection.

2017-01-31 Thread Fu Wei

Hi Mark,

On 1 February 2017 at 02:49, Mark Rutland  wrote:
> On Wed, Feb 01, 2017 at 02:43:02AM +0800, Fu Wei wrote:
>> On 31 January 2017 at 01:49, Mark Rutland  wrote:
>> > On Thu, Jan 26, 2017 at 01:49:03PM +0800, Fu Wei wrote:
>> >> On 26 January 2017 at 01:25, Mark Rutland  wrote:
>> >> > On Wed, Jan 25, 2017 at 02:46:12PM +0800, Fu Wei wrote:
>> >> >> On 25 January 2017 at 01:24, Mark Rutland  wrote:
>> >> >> > On Wed, Jan 18, 2017 at 09:25:32PM +0800, fu@linaro.org wrote:
>> >> >> >> From: Fu Wei 
>> >
>> >> But according to another document(ARMv8-A Foundation Platform User
>> >> Guide  ARM DUI0677K),
>> >> Table 3-2 ARMv8-A Foundation Platform memory map (continued)
>> >>
>> >> AP_REFCLK CNTBase0, Generic Timer 64KB   S
>> >> AP_REFCLK CNTBase1, Generic Timer 64KB   S/NS
>> >>
>> >> Dose it means the timer frame 0 can be accessed in SECURE status  only,
>> >> and the timer frame 1 can be accessed in both status?
>> >
>> > That does appear to be what it says.
>> >
>> > I assume in this case CNTCTLBase.CNTSAR<0> is RES0.
>> >
>> >> And because Linux kernel is running on Non-secure EL1, so should we
>> >> skip "SECURE" timer in Linux?
>> >
>> > I guess you mean by checking the GTx Common flags, to see if the timer
>> > is secure? Yes, we must skip those.
>>
>> Yes, exactly.
>>
>> I think we can check the  GTx Common flags, if the timer is set as
>> SECURE, this driver should just skip this timer.
>
> I completely agree that we must skip these.
>
>> > Looking further at this, the ACPI spec is sorely lacking any statement
>> > as to the configuration of CNTCTLBase.{CNTSAR,CNTTIDR,CNTACR}, so it's
>> > not clear if we can access anything in a frame, even if it is listed as
>> > being a non-secure timer.
>> >
>> > I think we need a stronger statement here. Otherwise, we will encounter
>> > problems. Linux currently assumes that CNTCTLBase.CNTACR is
>> > writeable, given a non-secure frame N. This is only the case if
>> > CNTCTLBase.CNTSAR.NS == 1.
>>
>> the original driver has checked these registers, but the problem is:
>> What if the timer frame is designed to be a secure timer, all the
>> register in this frame is only can be accessed in secure status, just
>> like foundation model?
>> Note: for foundation model, Please check Table 3-1 Access permissions
>> of 3.1 ARMv8-A Foundation Platform memory map in ARMv8-A Foundation
>> Platform User Guide
>>
>> So I think we should check the GTDT first, if it's not a secure timer,
>> then we can go on checking CNTSAR. :-)
>
> I've clearly confused matters here. I completely agree that we must skip
> timers the GTDT descrbies as secure.

Yes, got it :-)

>
> My complaint here is that the spec does not explicitly state that
> CNTCTLBase.CNTSAR.NS must be set for timers *not* marked as secure
> (though I believe that is the intent). That is a spec issue, not a code
> issue.

agree :-)

>
> We unfortunately can't check CNTNSAR, as it is secure-only. :(

yes, the spec says:
In a system that implements both Secure and Non-secure states, this
register is only accessible by Secure accesses.

So I think the firmware(from vendor) can decide which timer frame
should be marked as secure according to the GTDT, then kernel just get
this info from GTDT instead of checking CNTNSAR.


>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection.

2017-01-31 Thread Fu Wei

Hi Mark,

On 31 January 2017 at 01:49, Mark Rutland  wrote:
> On Thu, Jan 26, 2017 at 01:49:03PM +0800, Fu Wei wrote:
>> On 26 January 2017 at 01:25, Mark Rutland  wrote:
>> > On Wed, Jan 25, 2017 at 02:46:12PM +0800, Fu Wei wrote:
>> >> On 25 January 2017 at 01:24, Mark Rutland  wrote:
>> >> > On Wed, Jan 18, 2017 at 09:25:32PM +0800, fu@linaro.org wrote:
>> >> >> From: Fu Wei 
>
>> > For CNT{,EL0}BaseN.CNTFRQ, I am very concerned by the wording in the
>> > current ARMv8 ARM ARM. This does not match my understanding, nor does it
>> > match the description in the ARMv7 ARM. I believe this may be a
>> > documentation error, and I'm chasing that up internally.
>> >
>> > Either the currently logic in the driver which attempts to read
>> > CNT{,EL0}BaseN.CNTFRQ is flawed, or the description in the ARM ARM is
>> > erroneous.
>>
>> Yes, those description did confuse me. :-(
>>
>> But according to another document(ARMv8-A Foundation Platform User
>> Guide  ARM DUI0677K),
>> Table 3-2 ARMv8-A Foundation Platform memory map (continued)
>>
>> AP_REFCLK CNTBase0, Generic Timer 64KB   S
>> AP_REFCLK CNTBase1, Generic Timer 64KB   S/NS
>>
>> Dose it means the timer frame 0 can be accessed in SECURE status  only,
>> and the timer frame 1 can be accessed in both status?
>
> That does appear to be what it says.
>
> I assume in this case CNTCTLBase.CNTSAR<0> is RES0.
>
>> And because Linux kernel is running on Non-secure EL1, so should we
>> skip "SECURE" timer in Linux?
>
> I guess you mean by checking the GTx Common flags, to see if the timer
> is secure? Yes, we must skip those.

Yes, exactly.

I think we can check the  GTx Common flags, if the timer is set as
SECURE, this driver should just skip this timer.

Reason:
1, IF the timer is designed to be a secure timer which is only can be
accessed in secure status, the ACPI table should label this as SECURE,
then driver should skip it.
2, IF the timer is accessible from both status, but the firmware want
to use this driver for secure OS,  the ACPI table should also label
this as SECURE(meanwhile firmware should configure CNTSAR too), then
driver should skip it, too.

Actually I have added this into my next patchset v21. If you don't
have other suggestion I can post it tomorrow.

Can I? any thought?

>
> Looking further at this, the ACPI spec is sorely lacking any statement
> as to the configuration of CNTCTLBase.{CNTSAR,CNTTIDR,CNTACR}, so it's
> not clear if we can access anything in a frame, even if it is listed as
> being a non-secure timer.
>
> I think we need a stronger statement here. Otherwise, we will encounter
> problems. Linux currently assumes that CNTCTLBase.CNTACR is
> writeable, given a non-secure frame N. This is only the case if
> CNTCTLBase.CNTSAR.NS == 1.

the original driver has checked these registers, but the problem is:
What if the timer frame is designed to be a secure timer, all the
register in this frame is only can be accessed in secure status, just
like foundation model?
Note: for foundation model, Please check Table 3-1 Access permissions
of 3.1 ARMv8-A Foundation Platform memory map in ARMv8-A Foundation
Platform User Guide

So I think we should check the GTDT first, if it's not a secure timer,
then we can go on checking CNTSAR. :-)

Please correct me, If I miss something. :-)

Great thanks for your info :-)

>
> Thanks,
> Mark.

-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection.

2017-01-25 Thread Fu Wei

Hi Mark, Christopher,

On 26 January 2017 at 01:36, Mark Rutland  wrote:
> On Wed, Jan 25, 2017 at 10:38:01AM -0500, Christopher Covington wrote:
>> On 01/25/2017 01:46 AM, Fu Wei wrote:
>> > On 25 January 2017 at 01:24, Mark Rutland  wrote:
>> >> On Wed, Jan 18, 2017 at 09:25:32PM +0800, fu@linaro.org wrote:
>> >>> From: Fu Wei 
>
>> > And for CNTFRQ(in CNTCTLBase and CNTBaseN) , we can NOT access it in
>> > Linux kernel (EL1),
>> > Because ARMv8 ARM says:
>> > In a system that implements both Secure and Non-secure states, this
>> > register is only accessible by Secure accesses.
>> > That means we still need to get the frequency of the system counter
>> > from CNTFRQ_EL0 in MMIO timer code.
>> > This have been proved when I tested this driver on foundation model, I
>> > got "0" when I access CNTFRQ from Linux kernel (Non-secure EL1)
>>
>> That sounds like a firmware problem. Firmware in EL3 is supposed to write
>> the value into CNTFRQ.
>
> Definitely. FW *should* program the CNTFRQ_EL0 CPU registers and any
> MMIO CNTFRQ registers.

Many thanks for the explanation. This might be the problem. Maybe we
can check the UEFI :-)

>
>> If you're not currently using any firmware, I'd
>> recommend the bootwrapper on models/simulators/emulators.
>>
>> http://git.kernel.org/cgit/linux/kernel/git/mark/boot-wrapper-aarch64.git/tree/arch/aarch64/boot.S#n48
>
> Unfortunately, the boot-wrapper only programs the CNTFRQ_EL0 CPU system
> registers, and does not program any MMIO CNTFRQ registers.
>
> IIRC the models it was originally written for didn't have any (and we
> had no DT binding until far later...). Luckily the model DTs do not
> expose any MMIO timer addresses to the kernel currently.

But according to another document(ARMv8-A Foundation Platform User
Guide  ARM DUI0677K), Table 3-2 ARMv8-A Foundation Platform memory
map,
we may have two frames in the Generic timer block, right?


>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection.

2017-01-25 Thread Fu Wei

Hi Mark,

On 26 January 2017 at 01:25, Mark Rutland  wrote:
> On Wed, Jan 25, 2017 at 02:46:12PM +0800, Fu Wei wrote:
>> Hi Mark,
>
> Hi,
>
>> On 25 January 2017 at 01:24, Mark Rutland  wrote:
>> > On Wed, Jan 18, 2017 at 09:25:32PM +0800, fu....@linaro.org wrote:
>> >> From: Fu Wei 
>> >>
>> >> The counter frequency detection call(arch_timer_detect_rate) combines two
>> >> ways to get counter frequency: system coprocessor register and MMIO timer.
>> >> But in a specific timer init code, we only need one way to try:
>> >> getting frequency from MMIO timer register will be needed only when we
>> >> init MMIO timer; getting frequency from system coprocessor register will
>> >> be needed only when we init arch timer.
>> >
>> > When I mentioned this splitting before, I had mean that we'd completely
>> > separate the two, with separate mmio_rate and sysreg_rate variables.
>>
>> sorry for misunderstanding.
>>
>> Are you saying :
>>
>> diff --git a/drivers/clocksource/arm_arch_timer.c
>> b/drivers/clocksource/arm_arch_timer.c
>> index 663a57a..eec92f6 100644
>> --- a/drivers/clocksource/arm_arch_timer.c
>> +++ b/drivers/clocksource/arm_arch_timer.c
>> @@ -65,7 +65,8 @@ struct arch_timer {
>>
>>  #define to_arch_timer(e) container_of(e, struct arch_timer, evt)
>>
>> -static u32 arch_timer_rate;
>> +static u32 arch_timer_sysreg_rate ;
>> +static u32 arch_timer_mmio_rate;
>>  static int arch_timer_ppi[ARCH_TIMER_MAX_TIMER_PPI];
>>
>>  static struct clock_event_device __percpu *arch_timer_evt;
>>
>>
>> But what have I learned From ARMv8 ARM is
>> AArch64 System register CNTFRQ_EL0 is provided so that software can
>> discover the frequency of the system counter.
>> CNTFRQ(in CNTCTLBase and CNTBaseN) is provided so that software can
>> discover the frequency of the system counter.
>> The bit assignments of the registers are identical in the System
>> register interface and in the memory-mapped system level interface.
>
> This means that the bits in the registers have the same meaning.
>
> However, they are separate registers, and must be written separately. A
> write to one does not propagate to the other, and they are not
> guaranteed to contain the same value.

Ah, Sorry for misunderstanding this, and thanks for correcting it,
I thought they point to the same register.

>
>> So I think they both contain the same value : the frequency of the
>> system counter, just in different view, and can be accessed in
>> different ways.
>
> Certainly, in theory, these *should* contain the same value.
>
> Unfortunately, in practice, on several systems, they do not. It is very
> easy to forget to initialise one of these registers correctly, and it's
> possible for some software to work (masking the issue), while other
> software will fail very quickly. I very much suspect we will see the
> same class of issue on ACPI systems.

Ah, thanks , that makes sense to me :-)

So can I say:
In normal case, CNTFRQ_EL0, CNTCTLBase.CNTFRQ and CNTBaseN.CNTFRQ
should be set to the same value.
But in some special case, some CNTFRQ maybe set to a different number
for some reason(maybe on purpose).

>
> Consider a system where the sysreg CNTFRQ was correct, but the MMIO
> CNTFRQ contains an erroneous non-zero value.
>
> If we get the frequency out of CNTFRQ_EL0 first, and assign this to
> arch_timer_rate, we won't bother to look at the MMIO registers (which
> could contain erroneous values). If we read an erroneous CNTBaseN.CNTFRQ
> value first, and assign this to arch_timer_rate, we won't look at
> CNTFRQ_EL0.
>
> This is *very* fragile w.r.t. probe order. I don't like the fragility of
> setting a common arch_timer_rate depending on which gets probed first,
> as this masks a bug, which will adversely affect us later.
>
> This is already a problem for DT systems, and I do not want this problem
> to spread to ACPI systems.
>
> For ACPI, the approach I'd personally like to take is to keep the two
> rates separate. Probe the sysreg timer first and subsequently probe the
> MMIO timers. If the MMIO CNTFRQ (of all frames) does not match the
> sysreg CNTFRQ, we log a warning and give up probing the MMIO timers.

OK, I think I got your point, will do this way. Thanks :-)

>
> For legacy reasons, DT is going to be more complicated, but I believe we
> can apply that approach to ACPI.
>
>> So do we really need to separate mmio_rate and sysreg_rate variables?
>>
>> And for CNTFRQ(in CNTCTLBase and CNTBaseN) , we can NOT access it in
>> Linux kern

Re: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection.

2017-01-24 Thread Fu Wei

Hi Mark,

On 25 January 2017 at 14:46, Fu Wei  wrote:
> Hi Mark,
>
> On 25 January 2017 at 01:24, Mark Rutland  wrote:
>> On Wed, Jan 18, 2017 at 09:25:32PM +0800, fu@linaro.org wrote:
>>> From: Fu Wei 
>>>
>>> The counter frequency detection call(arch_timer_detect_rate) combines two
>>> ways to get counter frequency: system coprocessor register and MMIO timer.
>>> But in a specific timer init code, we only need one way to try:
>>> getting frequency from MMIO timer register will be needed only when we
>>> init MMIO timer; getting frequency from system coprocessor register will
>>> be needed only when we init arch timer.
>>
>> When I mentioned this splitting before, I had mean that we'd completely
>> separate the two, with separate mmio_rate and sysreg_rate variables.
>
> sorry for misunderstanding.
>
> Are you saying :
>
> diff --git a/drivers/clocksource/arm_arch_timer.c
> b/drivers/clocksource/arm_arch_timer.c
> index 663a57a..eec92f6 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -65,7 +65,8 @@ struct arch_timer {
>
>  #define to_arch_timer(e) container_of(e, struct arch_timer, evt)
>
> -static u32 arch_timer_rate;
> +static u32 arch_timer_sysreg_rate ;
> +static u32 arch_timer_mmio_rate;
>  static int arch_timer_ppi[ARCH_TIMER_MAX_TIMER_PPI];
>
>  static struct clock_event_device __percpu *arch_timer_evt;
>
>
> But what have I learned From ARMv8 ARM is
> AArch64 System register CNTFRQ_EL0 is provided so that software can
> discover the frequency of the system counter.
> CNTFRQ(in CNTCTLBase and CNTBaseN) is provided so that software can
> discover the frequency of the system counter.
> The bit assignments of the registers are identical in the System
> register interface and in the memory-mapped system level interface.
> So I think they both contain the same value : the frequency of the
> system counter, just in different view, and can be accessed in
> different ways.
>
> So do we really need to separate mmio_rate and sysreg_rate variables?
>
> And for CNTFRQ(in CNTCTLBase and CNTBaseN) , we can NOT access it in
> Linux kernel (EL1),
> Because ARMv8 ARM says:
> In a system that implements both Secure and Non-secure states, this
> register is only accessible by Secure accesses.
> That means we still need to get the frequency of the system counter
> from CNTFRQ_EL0 in MMIO timer code.
> This have been proved when I tested this driver on foundation model, I
> got "0" when I access CNTFRQ from Linux kernel (Non-secure EL1)
>
> So I guess the logic of the original code is
>  static u32 arch_timer_rate keeps the frequency of the system counter,
>  no matter where the value comes from.
> Because  they should be the same value. if we have got the frequency
> of the system counter(arch_timer_rate != 0), then we don't need to get
> it again, even in anther way.

*IF*  the above is right,
For ARM32, boot with dtb,  the original logic and this patch work well.
For ARM64, boot with dtb,  if MMIO timer is probed first, and there is
not "clock-frequency" in the node. MMIO timer can't get  the
frequency. Because we will get "0" when we access CNTFRQ from Linux
kernel (Non-secure EL1), that means the original logic and this patch
won't work. To fix this issue, we need to get  the frequency  from
sysreg CNTFRQ_EL0.
For ARM64, boot with ACPI, the original logic and this patch work
well, because we always probe arch_timer first.

So *IF* I understand it correctly, May I suggest that we only get  the
frequency from sysreg CNTFRQ_EL0 in this driver?
I think that can simplify the code and avoid the issue when we boot
ARM64 with dtb.

Again,  please correct me if I misunderstand something.  :-)  Great
thanks for your help!

>
> But  the above is just my thought, and I believe you're the expert of
> ARM. So please correct me if I misunderstand something.  :-)
>
> Thanks!
>>
>> The probing logic relying on this is complicated and fragile, and I
>> think these patches are complicating that further (though I appreciate
>> that's far from the intent).
>>
>> I believe we need to split the MMIO and sysreg timer code apart
>> entirely. I've had a look at that today, though it's been fairly painful
>> so far. It appears some platforms may inadvertently be relying on the
>> order and manner in which the rates are probed, which is a major
>> headache.
>>
>> I will try to attack that some more tomorrow.
>>
>>> This patch separates paths to determine frequency:
>>> Separate out the MMIO frequency and the sysreg frequency detection call,
>&

Re: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection.

2017-01-24 Thread Fu Wei

Hi Mark,

On 25 January 2017 at 01:24, Mark Rutland  wrote:
> On Wed, Jan 18, 2017 at 09:25:32PM +0800, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> The counter frequency detection call(arch_timer_detect_rate) combines two
>> ways to get counter frequency: system coprocessor register and MMIO timer.
>> But in a specific timer init code, we only need one way to try:
>> getting frequency from MMIO timer register will be needed only when we
>> init MMIO timer; getting frequency from system coprocessor register will
>> be needed only when we init arch timer.
>
> When I mentioned this splitting before, I had mean that we'd completely
> separate the two, with separate mmio_rate and sysreg_rate variables.

sorry for misunderstanding.

Are you saying :

diff --git a/drivers/clocksource/arm_arch_timer.c
b/drivers/clocksource/arm_arch_timer.c
index 663a57a..eec92f6 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -65,7 +65,8 @@ struct arch_timer {

 #define to_arch_timer(e) container_of(e, struct arch_timer, evt)

-static u32 arch_timer_rate;
+static u32 arch_timer_sysreg_rate ;
+static u32 arch_timer_mmio_rate;
 static int arch_timer_ppi[ARCH_TIMER_MAX_TIMER_PPI];

 static struct clock_event_device __percpu *arch_timer_evt;

But what have I learned From ARMv8 ARM is
AArch64 System register CNTFRQ_EL0 is provided so that software can
discover the frequency of the system counter.
CNTFRQ(in CNTCTLBase and CNTBaseN) is provided so that software can
discover the frequency of the system counter.
The bit assignments of the registers are identical in the System
register interface and in the memory-mapped system level interface.
So I think they both contain the same value : the frequency of the
system counter, just in different view, and can be accessed in
different ways.

So do we really need to separate mmio_rate and sysreg_rate variables?

And for CNTFRQ(in CNTCTLBase and CNTBaseN) , we can NOT access it in
Linux kernel (EL1),
Because ARMv8 ARM says:
In a system that implements both Secure and Non-secure states, this
register is only accessible by Secure accesses.
That means we still need to get the frequency of the system counter
from CNTFRQ_EL0 in MMIO timer code.
This have been proved when I tested this driver on foundation model, I
got "0" when I access CNTFRQ from Linux kernel (Non-secure EL1)

So I guess the logic of the original code is
 static u32 arch_timer_rate keeps the frequency of the system counter,
 no matter where the value comes from.
Because  they should be the same value. if we have got the frequency
of the system counter(arch_timer_rate != 0), then we don't need to get
it again, even in anther way.

But  the above is just my thought, and I believe you're the expert of
ARM. So please correct me if I misunderstand something.  :-)

Thanks!
>
> The probing logic relying on this is complicated and fragile, and I
> think these patches are complicating that further (though I appreciate
> that's far from the intent).
>
> I believe we need to split the MMIO and sysreg timer code apart
> entirely. I've had a look at that today, though it's been fairly painful
> so far. It appears some platforms may inadvertently be relying on the
> order and manner in which the rates are probed, which is a major
> headache.
>
> I will try to attack that some more tomorrow.
>
>> This patch separates paths to determine frequency:
>> Separate out the MMIO frequency and the sysreg frequency detection call,
>> and use the appropriate one for the counter.
>>
>> Signed-off-by: Fu Wei 
>> ---
>>  drivers/clocksource/arm_arch_timer.c | 40 
>> ++--
>>  1 file changed, 25 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/clocksource/arm_arch_timer.c 
>> b/drivers/clocksource/arm_arch_timer.c
>> index 6484f84..9482481 100644
>> --- a/drivers/clocksource/arm_arch_timer.c
>> +++ b/drivers/clocksource/arm_arch_timer.c
>> @@ -488,23 +488,33 @@ static int arch_timer_starting_cpu(unsigned int cpu)
>>   return 0;
>>  }
>>
>> -static void arch_timer_detect_rate(void __iomem *cntbase)
>> +static void __arch_timer_determine_rate(u32 rate)
>>  {
>> - /* Who has more than one independent system counter? */
>> - if (arch_timer_rate)
>> - return;
>> + /* Check the timer frequency. */
>> + if (!arch_timer_rate) {
>> + if (rate)
>> + arch_timer_rate = rate;
>> + else
>> + pr_warn("frequency not available\n");
>> + } else if (rate && arch_timer_rate != rate) {
>> + pr_warn("got different frequency, keep original.\n");
>> + }
>> +}
>
> This function should be killed off entirely. We need to be able to fail
> the probe if we cannot determine the rate, and that means we need error
> handling in the ACPI and DT cases anyway.
>
> Thanks,
> Mark.

-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v20 00/17] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-01-23 Thread Fu Wei

Hi Mark

On 24 January 2017 at 02:54, Mark Rutland  wrote:
> Hi,
>
> On Wed, Jan 18, 2017 at 09:25:24PM +0800, fu@linaro.org wrote:
>> From: Fu Wei 
>>
>> This patchset:
>> (1)Preparation for adding GTDT support in arm_arch_timer:
>> 1. Clean up printk() usage
>> 2. Rename the type macros
>> 3. Rename the PPI enum & enum values
>> 4. Move the type macro and PPI enum into the header file
>> 5. Add new enum for SPIs
>> 6. Rework PPI determination;
>
> I've taken these few patches onto a preliminary/unstable branch [1].

Many thanks for the good news!

>
> I haven't had the time to take a look at the rest of the series yet. I
> intend to go over that tomorrow, picking what I can, and leaving
> feedback for anything that will need rework.

Thanks, I will wait for your feedback, and improve this patchset ASAP.

>
> Thanks,
> Mark.
>
> [1] git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git 
> arch-timer/updates



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v20 13/17] acpi/arm64: Add GTDT table parse driver

2017-01-19 Thread Fu Wei

Hi Mark,

On 19 January 2017 at 19:16, Mark Rutland  wrote:
> On Thu, Jan 19, 2017 at 06:32:55PM +0800, Fu Wei wrote:
>> On 19 January 2017 at 17:11, Hanjun Guo  wrote:
>> > On 2017/1/18 21:25, fu@linaro.org wrote:
>> >> From: Fu Wei 
>
>> >> +   else if (!gtdt->platform_timer_count)
>> >> +   pr_debug("No Platform Timer.\n");
>> >> +   else
>> >> +   timer_count = gtdt->platform_timer_count;
>> >> +
>> >> +   if (timer_count) {
>> >> +   platform_timer = (void *)gtdt +
>> >> gtdt->platform_timer_offset;
>> >> +   if (platform_timer < (void *)table +
>> >> +sizeof(struct acpi_table_gtdt)) {
>> >> +   pr_err(FW_BUG "invalid timer data.\n");
>> >
>> >
>> > It's ok but I didn't see other ACPI tables parsing did this check,
>> > maybe we can just remove it :)
>>
>> here, I want to make sure the FW is valid.
>> Once there is a FW bug, we could just return with error.  :-)
>
> Yes, please keep the check!

Yes, we will keep this check   :-)

Thanks!
>
> If anything, it would be nicer for the other ACPI code to verify things
> a little more stringently.
>
> Thanks,
> Mark.



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v20 00/17] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer

2017-01-19 Thread Fu Wei

Hi Hanjun,

On 19 January 2017 at 17:20, Hanjun Guo  wrote:
> Hi Fuwei,
>
>
> On 2017/1/18 21:25, fu@linaro.org wrote:
>>
>> From: Fu Wei 
>>
>> This patchset:
>> (1)Preparation for adding GTDT support in arm_arch_timer:
>> 1. Clean up printk() usage
>> 2. Rename the type macros
>> 3. Rename the PPI enum & enum values
>> 4. Move the type macro and PPI enum into the header file
>> 5. Add new enum for SPIs
>> 6. Rework PPI determination;
>> 7. Rework counter frequency detection;
>> 8. Refactor arch_timer_needs_probing, move it into DT init call
>> 9. Introduce some new structs and refactor the MMIO timer init
>> code
>> for reusing some common code.
>>
>> (2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c
>> Parse all kinds of timer in GTDT table of ACPI:arch timer,
>> memory-mapped timer and SBSA Generic Watchdog timer.
>> This driver can help to simplify all the relevant timer drivers,
>> and separate all the ACPI GTDT knowledge from them.
>>
>> (3)Simplify ACPI code for arm_arch_timer
>>
>> (4)Add GTDT support for ARM memory-mapped timer.
>>
>> This patchset has been tested on the following platforms with ACPI
>> enabled:
>> (1)ARM Foundation v8 model
>>
>> Changelog:
>> v20: https://lkml.org/lkml/2017/1/18/
>>  Reorder the first 4 patches and split the 4th patches.
>>  Leave CNTHCTL_* as they originally were.
>>  Fix the bug in arch_timer_select_ppi.
>>  Split "Rework counter frequency detection" patch.
>>  Rework the arch_timer_detect_rate function.
>>  Improve the commit message of "Refactor MMIO timer probing".
>>  Rebase to 4.10.0-rc4
>
>
> Other than some minor comments I raised, the patch set
> looks fine to me, and I tested this patch set on D03,
> the percpu arch timer works fine as before.
>
> With the comments fixed,
> Reviewed-by: Hanjun Guo 
> Tested-by: Hanjun Guo 

Great thanks for your testing. :-)

will apply Reviewed-by: Hanjun Guo  on all patches,
and Tested-by: Hanjun Guo  on arch_timer patches.

>
> Thanks
> Hanjun



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v20 13/17] acpi/arm64: Add GTDT table parse driver

2017-01-19 Thread Fu Wei

Hi Hanjun,

On 19 January 2017 at 17:11, Hanjun Guo  wrote:
> On 2017/1/18 21:25, fu@linaro.org wrote:
>>
>> From: Fu Wei 
>>
>> This patch adds support for parsing arch timer info in GTDT,
>> provides some kernel APIs to parse all the PPIs and
>> always-on info in GTDT and export them.
>>
>> By this driver, we can simplify arm_arch_timer drivers, and
>> separate the ACPI GTDT knowledge from it.
>>
>> Signed-off-by: Fu Wei 
>> Signed-off-by: Hanjun Guo 
>> Acked-by: Rafael J. Wysocki 
>> Tested-by: Xiongfeng Wang 
>> ---
>>  arch/arm64/Kconfig  |   1 +
>>  drivers/acpi/arm64/Kconfig  |   3 +
>>  drivers/acpi/arm64/Makefile |   1 +
>>  drivers/acpi/arm64/gtdt.c   | 157
>> 
>>  include/linux/acpi.h|   6 ++
>>  5 files changed, 168 insertions(+)
>>
>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>> index 1117421..ab1ee10 100644
>> --- a/arch/arm64/Kconfig
>> +++ b/arch/arm64/Kconfig
>> @@ -2,6 +2,7 @@ config ARM64
>> def_bool y
>> select ACPI_CCA_REQUIRED if ACPI
>> select ACPI_GENERIC_GSI if ACPI
>> +   select ACPI_GTDT if ACPI
>> select ACPI_REDUCED_HARDWARE_ONLY if ACPI
>> select ACPI_MCFG if ACPI
>> select ACPI_SPCR_TABLE if ACPI
>> diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig
>> index 4616da4..5a6f80f 100644
>> --- a/drivers/acpi/arm64/Kconfig
>> +++ b/drivers/acpi/arm64/Kconfig
>> @@ -4,3 +4,6 @@
>>
>>  config ACPI_IORT
>> bool
>> +
>> +config ACPI_GTDT
>> +   bool
>> diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile
>> index 72331f2..1017def 100644
>> --- a/drivers/acpi/arm64/Makefile
>> +++ b/drivers/acpi/arm64/Makefile
>> @@ -1 +1,2 @@
>>  obj-$(CONFIG_ACPI_IORT)+= iort.o
>> +obj-$(CONFIG_ACPI_GTDT)+= gtdt.o
>> diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
>> new file mode 100644
>> index 000..d93a790
>> --- /dev/null
>> +++ b/drivers/acpi/arm64/gtdt.c
>> @@ -0,0 +1,157 @@
>
> [...]
>
>> +
>> +/**
>> + * acpi_gtdt_init() - Get the info of GTDT table to prepare for further
>> init.
>> + * @table: The pointer to GTDT table.
>> + * @platform_timer_count:  The pointer of int variate for returning
>> the
>> + * number of platform timers. It can be NULL,
>> if
>> + * driver don't need this info.
>> + *
>> + * Return: 0 if success, -EINVAL if error.
>> + */
>> +int __init acpi_gtdt_init(struct acpi_table_header *table,
>> + int *platform_timer_count)
>> +{
>> +   int ret = 0;
>> +   int timer_count = 0;
>> +   void *platform_timer = NULL;
>> +   struct acpi_table_gtdt *gtdt;
>> +
>> +   gtdt = container_of(table, struct acpi_table_gtdt, header);
>> +   acpi_gtdt_desc.gtdt = gtdt;
>> +   acpi_gtdt_desc.gtdt_end = (void *)table + table->length;
>> +
>> +   if (table->revision < 2)
>> +   pr_debug("Revision:%d doesn't support Platform Timers.\n",
>> +table->revision);
>
>
> GTDT table revision is updated to 2 in ACPI 5.1, we will
> not support ACPI version under 5.1 and disable ACPI in FADT
> parse before this code is called, so if we get revision
> <2 here, I think we need to print warning (we need to keep
> the firmware stick to the spec on ARM64).

agree, will change pr_debug to pr_warn.

Thanks :-)

>
>> +   else if (!gtdt->platform_timer_count)
>> +   pr_debug("No Platform Timer.\n");
>> +   else
>> +   timer_count = gtdt->platform_timer_count;
>> +
>> +   if (timer_count) {
>> +   platform_timer = (void *)gtdt +
>> gtdt->platform_timer_offset;
>> +   if (platform_timer < (void *)table +
>> +sizeof(struct acpi_table_gtdt)) {
>> +   pr_err(FW_BUG "invalid timer data.\n");
>
>
> It's ok but I didn't see other ACPI tables parsing did this check,
> maybe we can just remove it :)

here, I want to make sure the FW is valid.
Once there is a FW bug, we could just return with error.  :-)

>
>> +   timer_count = 0;
>> +   platform_timer = NULL;
>> +

Re: [PATCH v20 16/17] clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer

2017-01-19 Thread Fu Wei

Hi Hanjun,

On 19 January 2017 at 17:16, Hanjun Guo  wrote:
> On 2017/1/18 21:25, fu@linaro.org wrote:
>>
>> From: Fu Wei 
>>
>> The patch add memory-mapped timer register support by using the
>> information provided by the new GTDT driver of ACPI.
>>
>> Signed-off-by: Fu Wei 
>> ---
>>  drivers/clocksource/arm_arch_timer.c | 35
>> ---
>>  1 file changed, 32 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/clocksource/arm_arch_timer.c
>> b/drivers/clocksource/arm_arch_timer.c
>> index 79dc004..7ca2da7 100644
>> --- a/drivers/clocksource/arm_arch_timer.c
>> +++ b/drivers/clocksource/arm_arch_timer.c
>> @@ -1077,10 +1077,36 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem,
>> "arm,armv7-timer-mem",
>>arch_timer_mem_of_init);
>>
>>  #ifdef CONFIG_ACPI_GTDT
>> -/* Initialize per-processor generic timer */
>> +static int __init arch_timer_mem_acpi_init(int platform_timer_count)
>> +{
>> +   struct arch_timer_mem *timer_mem;
>> +   int timer_count, i, ret;
>> +
>
>
> if (!platform_timer_count)
> return 0;
>
> Did I miss something?

Ah, thanks, I guess I miss this check below.

>
> Thanks
> Hanjun
>
>
>> +   timer_mem = kcalloc(platform_timer_count, sizeof(*timer_mem),
>> +   GFP_KERNEL);
>> +   if (!timer_mem)
>> +   return -ENOMEM;
>> +
>> +   ret = acpi_arch_timer_mem_init(timer_mem, &timer_count);
>> +   if (ret || !timer_count)
>> +   goto error;
>> +
>> +   for (i = 0; i < timer_count; i++) {
>> +   ret = arch_timer_mem_init(timer_mem);
>> +   if (!ret)
>> +   break;
>> +   timer_mem++;
>> +   }
>> +
>> +error:
>> +   kfree(timer_mem);
>> +   return ret;
>> +}
>> +
>> +/* Initialize per-processor generic timer and memory-mapped timer(if
>> present) */
>>  static int __init arch_timer_acpi_init(struct acpi_table_header *table)
>>  {
>> -   int ret;
>> +   int ret, platform_timer_count;
>>
>> if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
>> pr_warn("already initialized, skipping\n");
>> @@ -1089,7 +1115,7 @@ static int __init arch_timer_acpi_init(struct
>> acpi_table_header *table)
>>
>> arch_timers_present |= ARCH_TIMER_TYPE_CP15;
>>
>> -   ret = acpi_gtdt_init(table, NULL);
>> +   ret = acpi_gtdt_init(table, &platform_timer_count);
>> if (ret) {
>> pr_err("Failed to init GTDT table.\n");
>> return ret;
>> @@ -1122,6 +1148,9 @@ static int __init arch_timer_acpi_init(struct
>> acpi_table_header *table)
>> if (ret)
>> return ret;
>>
>> +   if (arch_timer_mem_acpi_init(platform_timer_count))

+   if (platform_timer_count &&
+   arch_timer_mem_acpi_init(platform_timer_count))


>> +   pr_err("Failed to initialize memory-mapped timer.\n");
>> +
>> return arch_timer_common_init();
>>  }
>>  CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT,
>> arch_timer_acpi_init);
>>
>



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v20 11/17] clocksource/drivers/arm_arch_timer: Introduce some new structs to prepare for GTDT

2017-01-19 Thread Fu Wei

Hi Hanjun,

On 19 January 2017 at 16:28, Hanjun Guo  wrote:
> On 2017/1/18 21:25, fu@linaro.org wrote:
>>
>> From: Fu Wei 
>>
>> The patch introduce two new structs: arch_timer_mem, arch_timer_mem_frame.
>> And also introduce a new define: ARCH_TIMER_MEM_MAX_FRAMES
>>
>> These will be used for refactoring the memory-mapped timer init code to
>> prepare for GTDT
>>
>> Signed-off-by: Fu Wei 
>> ---
>>  include/clocksource/arm_arch_timer.h | 17 +
>>  1 file changed, 17 insertions(+)
>>
>> diff --git a/include/clocksource/arm_arch_timer.h
>> b/include/clocksource/arm_arch_timer.h
>> index 4a98c06..b7dd185 100644
>> --- a/include/clocksource/arm_arch_timer.h
>> +++ b/include/clocksource/arm_arch_timer.h
>> @@ -57,6 +57,8 @@ enum arch_timer_spi_nr {
>>  #define ARCH_TIMER_MEM_PHYS_ACCESS 2
>>  #define ARCH_TIMER_MEM_VIRT_ACCESS 3
>>
>> +#define ARCH_TIMER_MEM_MAX_FRAMES  8
>> +
>>  #define ARCH_TIMER_USR_PCT_ACCESS_EN   (1 << 0) /* physical counter */
>>  #define ARCH_TIMER_USR_VCT_ACCESS_EN   (1 << 1) /* virtual counter */
>>  #define ARCH_TIMER_VIRT_EVT_EN (1 << 2)
>> @@ -72,6 +74,21 @@ struct arch_timer_kvm_info {
>> int virtual_irq;
>>  };
>>
>> +struct arch_timer_mem_frame {
>> +   int frame_nr;
>> +   phys_addr_t cntbase;
>> +   size_t size;
>> +   int phys_irq;
>> +   int virt_irq;
>> +};
>> +
>> +struct arch_timer_mem {
>> +   phys_addr_t cntctlbase;
>> +   size_t size;
>> +   int num_frames;
>> +   struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES];
>> +};
>
>
> Since struct is introduced but not used in this patch, how about
> squash it with patch 12/17?

In the previous patchset, I have been suggested that I should split it out.

>
> Thanks
> Hanjun



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection.

2017-01-19 Thread Fu Wei

Hi Hanjun,

On 19 January 2017 at 16:02, Hanjun Guo  wrote:
> Hi Fuwei,
>
> One comments below.
>
>
> On 2017/1/18 21:25, fu@linaro.org wrote:
>>
>> From: Fu Wei 
>>
>> The counter frequency detection call(arch_timer_detect_rate) combines two
>> ways to get counter frequency: system coprocessor register and MMIO timer.
>> But in a specific timer init code, we only need one way to try:
>> getting frequency from MMIO timer register will be needed only when we
>> init MMIO timer; getting frequency from system coprocessor register will
>> be needed only when we init arch timer.
>>
>> This patch separates paths to determine frequency:
>> Separate out the MMIO frequency and the sysreg frequency detection call,
>> and use the appropriate one for the counter.
>>
>> Signed-off-by: Fu Wei 
>> ---
>>  drivers/clocksource/arm_arch_timer.c | 40
>> ++--
>>  1 file changed, 25 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/clocksource/arm_arch_timer.c
>> b/drivers/clocksource/arm_arch_timer.c
>> index 6484f84..9482481 100644
>> --- a/drivers/clocksource/arm_arch_timer.c
>> +++ b/drivers/clocksource/arm_arch_timer.c
>> @@ -488,23 +488,33 @@ static int arch_timer_starting_cpu(unsigned int cpu)
>> return 0;
>>  }
>>
>> -static void arch_timer_detect_rate(void __iomem *cntbase)
>> +static void __arch_timer_determine_rate(u32 rate)
>>  {
>> -   /* Who has more than one independent system counter? */
>> -   if (arch_timer_rate)
>> -   return;
>> +   /* Check the timer frequency. */
>> +   if (!arch_timer_rate) {
>> +   if (rate)
>> +   arch_timer_rate = rate;
>> +   else
>> +   pr_warn("frequency not available\n");
>> +   } else if (rate && arch_timer_rate != rate) {
>
>     ^
> Typo? I think it's "&" here.

Not a typo, It's definitely a “&&”  :-)

Here arch_timer_rate is not zero.

If rate is not zero(that means we got a valid rate), and
arch_timer_rate != rate ,
we will print warning message.

>
> Thanks
> Hanjun



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

[PATCH v20 17/17] acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver

2017-01-18 Thread fu . wei

From: Fu Wei 

This driver adds support for parsing SBSA Generic Watchdog timer
in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT,
and creating a platform device with that information.

This allows the operating system to obtain device data from the
resource of platform device. The platform device named "sbsa-gwdt"
can be used by the ARM SBSA Generic Watchdog driver.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Tested-by: Xiongfeng Wang 
---
 drivers/acpi/arm64/gtdt.c | 93 +++
 drivers/watchdog/Kconfig  |  1 +
 2 files changed, 94 insertions(+)

diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
index 91ea6cb..22d3659 100644
--- a/drivers/acpi/arm64/gtdt.c
+++ b/drivers/acpi/arm64/gtdt.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -59,6 +60,13 @@ static inline bool is_timer_block(void *platform_timer)
return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
 }
 
+static inline bool is_watchdog(void *platform_timer)
+{
+   struct acpi_gtdt_header *gh = platform_timer;
+
+   return gh->type == ACPI_GTDT_TYPE_WATCHDOG;
+}
+
 static int __init map_gt_gsi(u32 interrupt, u32 flags)
 {
int trigger, polarity;
@@ -279,3 +287,88 @@ int __init acpi_arch_timer_mem_init(struct arch_timer_mem 
*data,
 
return 0;
 }
+
+/*
+ * Initialize a SBSA generic Watchdog platform device info from GTDT
+ */
+static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd,
+   int index)
+{
+   struct platform_device *pdev;
+   int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags);
+   int no_irq = 1;
+
+   /*
+* According to SBSA specification the size of refresh and control
+* frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF).
+*/
+   struct resource res[] = {
+   DEFINE_RES_MEM(wd->control_frame_address, SZ_4K),
+   DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K),
+   DEFINE_RES_IRQ(irq),
+   };
+
+   pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n",
+wd->refresh_frame_address, wd->control_frame_address,
+wd->timer_interrupt, wd->timer_flags);
+
+   if (!(wd->refresh_frame_address && wd->control_frame_address)) {
+   pr_err(FW_BUG "failed to get the Watchdog base address.\n");
+   return -EINVAL;
+   }
+
+   if (!wd->timer_interrupt)
+   pr_warn(FW_BUG "failed to get the Watchdog interrupt.\n");
+   else if (irq <= 0)
+   pr_warn("failed to map the Watchdog interrupt.\n");
+   else
+   no_irq = 0;
+
+   /*
+* Add a platform device named "sbsa-gwdt" to match the platform driver.
+* "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog
+* The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get device
+* info below by matching this name.
+*/
+   pdev = platform_device_register_simple("sbsa-gwdt", index, res,
+  ARRAY_SIZE(res) - no_irq);
+   if (IS_ERR(pdev)) {
+   acpi_unregister_gsi(wd->timer_interrupt);
+   return PTR_ERR(pdev);
+   }
+
+   return 0;
+}
+
+static int __init gtdt_sbsa_gwdt_init(void)
+{
+   int ret, i = 0;
+   void *platform_timer;
+   struct acpi_table_header *table;
+
+   if (acpi_disabled)
+   return 0;
+
+   if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0, &table)))
+   return -EINVAL;
+
+   ret = acpi_gtdt_init(table, NULL);
+   if (ret)
+   return ret;
+
+   for_each_platform_timer(platform_timer) {
+   if (is_watchdog(platform_timer)) {
+   ret = gtdt_import_sbsa_gwdt(platform_timer, i);
+   if (ret)
+   break;
+   i++;
+   }
+   }
+
+   if (i)
+   pr_info("found %d SBSA generic Watchdog(s).\n", i);
+
+   return ret;
+}
+
+device_initcall(gtdt_sbsa_gwdt_init);
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index acb00b5..c899df1 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -219,6 +219,7 @@ config ARM_SBSA_WATCHDOG
tristate "ARM SBSA Generic Watchdog"
depends on ARM64
depends on ARM_ARCH_TIMER
+   depends on ACPI_GTDT || !ACPI
select WATCHDOG_CORE
help
  ARM SBSA Generic Watchdog has two stage timeouts:
-- 
2.9.3

[PATCH v20 13/17] acpi/arm64: Add GTDT table parse driver

2017-01-18 Thread fu . wei

From: Fu Wei 

This patch adds support for parsing arch timer info in GTDT,
provides some kernel APIs to parse all the PPIs and
always-on info in GTDT and export them.

By this driver, we can simplify arm_arch_timer drivers, and
separate the ACPI GTDT knowledge from it.

Signed-off-by: Fu Wei 
Signed-off-by: Hanjun Guo 
Acked-by: Rafael J. Wysocki 
Tested-by: Xiongfeng Wang 
---
 arch/arm64/Kconfig  |   1 +
 drivers/acpi/arm64/Kconfig  |   3 +
 drivers/acpi/arm64/Makefile |   1 +
 drivers/acpi/arm64/gtdt.c   | 157 
 include/linux/acpi.h|   6 ++
 5 files changed, 168 insertions(+)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 1117421..ab1ee10 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -2,6 +2,7 @@ config ARM64
def_bool y
select ACPI_CCA_REQUIRED if ACPI
select ACPI_GENERIC_GSI if ACPI
+   select ACPI_GTDT if ACPI
select ACPI_REDUCED_HARDWARE_ONLY if ACPI
select ACPI_MCFG if ACPI
select ACPI_SPCR_TABLE if ACPI
diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig
index 4616da4..5a6f80f 100644
--- a/drivers/acpi/arm64/Kconfig
+++ b/drivers/acpi/arm64/Kconfig
@@ -4,3 +4,6 @@
 
 config ACPI_IORT
bool
+
+config ACPI_GTDT
+   bool
diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile
index 72331f2..1017def 100644
--- a/drivers/acpi/arm64/Makefile
+++ b/drivers/acpi/arm64/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_ACPI_IORT)+= iort.o
+obj-$(CONFIG_ACPI_GTDT)+= gtdt.o
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
new file mode 100644
index 000..d93a790
--- /dev/null
+++ b/drivers/acpi/arm64/gtdt.c
@@ -0,0 +1,157 @@
+/*
+ * ARM Specific GTDT table Support
+ *
+ * Copyright (C) 2016, Linaro Ltd.
+ * Author: Daniel Lezcano 
+ * Fu Wei 
+ * Hanjun Guo 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#undef pr_fmt
+#define pr_fmt(fmt) "ACPI GTDT: " fmt
+
+/**
+ * struct acpi_gtdt_descriptor - Store the key info of GTDT for all functions
+ * @gtdt:  The pointer to the struct acpi_table_gtdt of GTDT table.
+ * @gtdt_end:  The pointer to the end of GTDT table.
+ * @platform_timer:The pointer to the start of Platform Timer Structure
+ *
+ * The struct store the key info of GTDT table, it should be initialized by
+ * acpi_gtdt_init.
+ */
+struct acpi_gtdt_descriptor {
+   struct acpi_table_gtdt *gtdt;
+   void *gtdt_end;
+   void *platform_timer;
+};
+
+static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
+
+static int __init map_gt_gsi(u32 interrupt, u32 flags)
+{
+   int trigger, polarity;
+
+   trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
+   : ACPI_LEVEL_SENSITIVE;
+
+   polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
+   : ACPI_ACTIVE_HIGH;
+
+   return acpi_register_gsi(NULL, interrupt, trigger, polarity);
+}
+
+/**
+ * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
+ * @type:  the type of PPI.
+ *
+ * Note: Linux on arm64 isn't supported on the secure side.
+ * So we only handle the non-secure timer PPIs,
+ * ARCH_TIMER_PHYS_SECURE_PPI is treated as invalid type.
+ *
+ * Return: the mapped PPI value, 0 if error.
+ */
+int __init acpi_gtdt_map_ppi(int type)
+{
+   struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
+
+   switch (type) {
+   case ARCH_TIMER_PHYS_NONSECURE_PPI:
+   return map_gt_gsi(gtdt->non_secure_el1_interrupt,
+ gtdt->non_secure_el1_flags);
+   case ARCH_TIMER_VIRT_PPI:
+   return map_gt_gsi(gtdt->virtual_timer_interrupt,
+ gtdt->virtual_timer_flags);
+
+   case ARCH_TIMER_HYP_PPI:
+   return map_gt_gsi(gtdt->non_secure_el2_interrupt,
+ gtdt->non_secure_el2_flags);
+   default:
+   pr_err("Failed to map timer interrupt: invalid type.\n");
+   }
+
+   return 0;
+}
+
+/**
+ * acpi_gtdt_c3stop() - Got c3stop info from GTDT according to the type of PPI.
+ * @type:  the type of PPI.
+ *
+ * Return: 1 if the timer can be in deep idle state, 0 otherwise.
+ */
+bool __init acpi_gtdt_c3stop(int type)
+{
+   struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
+
+   switch (type) {
+   case ARCH_TIMER_PHYS_NONSECURE_PPI:
+   return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
+
+   case ARCH_TIMER_VIRT_PPI:
+   return !(gtdt->virtual_timer_flags & ACPI_GTDT_ALWAYS_ON);
+
+   case ARCH_TIMER_HYP_PPI:
+   return !(gtd

[PATCH v20 05/17] clocksource/drivers/arm_arch_timer: Add a new enum for spi type

2017-01-18 Thread fu . wei

From: Fu Wei 

This patch add a new enum "arch_timer_spi_nr" and use it in the driver.
Just for code's readability, no functional change.

Signed-off-by: Fu Wei 
Acked-by: Mark Rutland 
---
 drivers/clocksource/arm_arch_timer.c | 4 ++--
 include/clocksource/arm_arch_timer.h | 6 ++
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 90b6661..ca73513 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -974,9 +974,9 @@ static int __init arch_timer_mem_init(struct device_node 
*np)
}
 
if (arch_timer_mem_use_virtual)
-   irq = irq_of_parse_and_map(best_frame, 1);
+   irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_VIRT_SPI);
else
-   irq = irq_of_parse_and_map(best_frame, 0);
+   irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_PHYS_SPI);
 
ret = -EINVAL;
if (!irq) {
diff --git a/include/clocksource/arm_arch_timer.h 
b/include/clocksource/arm_arch_timer.h
index b898637..4a98c06 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -46,6 +46,12 @@ enum arch_timer_ppi_nr {
ARCH_TIMER_MAX_TIMER_PPI
 };
 
+enum arch_timer_spi_nr {
+   ARCH_TIMER_PHYS_SPI,
+   ARCH_TIMER_VIRT_SPI,
+   ARCH_TIMER_MAX_TIMER_SPI
+};
+
 #define ARCH_TIMER_PHYS_ACCESS 0
 #define ARCH_TIMER_VIRT_ACCESS 1
 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
-- 
2.9.3

[PATCH v20 09/17] clocksource/drivers/arm_arch_timer: Refactor arch_timer_needs_probing

2017-01-18 Thread fu . wei

From: Fu Wei 

When system init with device-tree, we don't know which node will be
initialized first. And the code in arch_timer_common_init should wait
until per-cpu timer and MMIO timer are both initialized. So we need
arch_timer_needs_probing to detect the init status of system.

But currently the code is dispersed in arch_timer_needs_probing and
arch_timer_common_init. And the function name doesn't specify that
it's only for device-tree. This is somewhat confusing.

This patch move all related code from arch_timer_common_init to
arch_timer_needs_probing, refactor it, and rename it to
arch_timer_needs_of_probing. And make sure that it will be called
only if acpi is disabled.

Signed-off-by: Fu Wei 
---
 drivers/clocksource/arm_arch_timer.c | 34 +++---
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 9482481..d10c2f7 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -796,15 +796,28 @@ static const struct of_device_id 
arch_timer_mem_of_match[] __initconst = {
{},
 };
 
-static bool __init
-arch_timer_needs_probing(int type, const struct of_device_id *matches)
+static bool __init arch_timer_needs_of_probing(void)
 {
struct device_node *dn;
bool needs_probing = false;
+   unsigned int mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
 
-   dn = of_find_matching_node(NULL, matches);
-   if (dn && of_device_is_available(dn) && !(arch_timers_present & type))
+   /* We have two timers, and both device-tree nodes are probed. */
+   if ((arch_timers_present & mask) == mask)
+   return false;
+
+   /*
+* Only one type of timer is probed,
+* check if we have another type of timer node in device-tree.
+*/
+   if (arch_timers_present & ARCH_TIMER_TYPE_CP15)
+   dn = of_find_matching_node(NULL, arch_timer_mem_of_match);
+   else
+   dn = of_find_matching_node(NULL, arch_timer_of_match);
+
+   if (dn && of_device_is_available(dn))
needs_probing = true;
+
of_node_put(dn);
 
return needs_probing;
@@ -812,17 +825,8 @@ arch_timer_needs_probing(int type, const struct 
of_device_id *matches)
 
 static int __init arch_timer_common_init(void)
 {
-   unsigned mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
-
-   /* Wait until both nodes are probed if we have two timers */
-   if ((arch_timers_present & mask) != mask) {
-   if (arch_timer_needs_probing(ARCH_TIMER_TYPE_MEM,
-arch_timer_mem_of_match))
-   return 0;
-   if (arch_timer_needs_probing(ARCH_TIMER_TYPE_CP15,
-arch_timer_of_match))
-   return 0;
-   }
+   if (acpi_disabled && arch_timer_needs_of_probing())
+   return 0;
 
arch_timer_banner(arch_timers_present);
arch_counter_register(arch_timers_present);
-- 
2.9.3

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