from:"navin . patidar"

Re: [PATCH] iio: orientation: Add BNO055 9-axis Absolute Orientation Sensor driver

2016-07-26 Thread navin patidar

Oh, I didn't know that Vlad already have submitted a patch for BNO055.
My patch doesn't do any thing new so please drop my patch.

regards,
--navin-patidar

On Tue, Jul 26, 2016 at 11:46 AM, Peter Meerwald-Stadler
<pme...@pmeerw.net> wrote:
> Hallo Navin,
>
>> Thanks for reviewing the patch. I will send the updated patch.
>
> I am sorry to have overlooked a previous patch by Vlad Dogaru, see
> http://comments.gmane.org/gmane.linux.kernel.iio/24643, for the BNO055
>
> there have been a number of issues, it has not been accepted yet
>
> I think our policy is first come, first served; I have compared the two
> patches, maybe you can collaborate on a common proposal?
>
> regards, p.
>
>> regards,
>> --navin-patidar
>>
>> On Tue, Jul 26, 2016 at 1:07 AM, Peter Meerwald-Stadler <pme...@pmeerw.net>
>> wrote:
>>
>> >
>> > > BNO055 provides the following motion sensors data:
>> > >
>> > >  * Gyroscope
>> > >  * Accelerometer
>> > >  * Magnetometer
>> > >  * Absolute Orientation (Quaternion)
>> >
>> > comments below
>> >
>> > > Signed-off-by: navin patidar <navin.pati...@gmail.com>
>> > > ---
>> > >  drivers/iio/orientation/Kconfig  |  10 +
>> > >  drivers/iio/orientation/Makefile |   1 +
>> > >  drivers/iio/orientation/bno055.c | 422
>> > +++
>> > >  3 files changed, 433 insertions(+)
>> > >  create mode 100644 drivers/iio/orientation/bno055.c
>> > >
>> > > diff --git a/drivers/iio/orientation/Kconfig
>> > b/drivers/iio/orientation/Kconfig
>> > > index e3aa1e5..9ac21ee 100644
>> > > --- a/drivers/iio/orientation/Kconfig
>> > > +++ b/drivers/iio/orientation/Kconfig
>> > > @@ -28,4 +28,14 @@ config HID_SENSOR_DEVICE_ROTATION
>> > > device rotation. The output of a device rotation sensor
>> > > is presented using quaternion format.
>> > >
>> > > +config BNO055
>> > > + tristate "BOSCH BNO055 Absolute Orientation"
>> > > + depends on I2C
>> > > + select REGMAP_I2C
>> > > + help
>> > > +   Say yes here to build support for BOSCH BNO55 9-axis absolute
>> > orientation sensor
>> > > +   driver connected via I2C.
>> > > +   This driver can also be built as a module. If so, the module
>> > > +   will be called bno055.
>> > > +
>> > >  endmenu
>> > > diff --git a/drivers/iio/orientation/Makefile
>> > b/drivers/iio/orientation/Makefile
>> > > index 4734dab..7d00037 100644
>> > > --- a/drivers/iio/orientation/Makefile
>> > > +++ b/drivers/iio/orientation/Makefile
>> > > @@ -5,3 +5,4 @@
>> > >  # When adding new entries keep the list in alphabetical order
>> > >  obj-$(CONFIG_HID_SENSOR_INCLINOMETER_3D) += hid-sensor-incl-3d.o
>> > >  obj-$(CONFIG_HID_SENSOR_DEVICE_ROTATION) += hid-sensor-rotation.o
>> > > +obj-$(CONFIG_BNO055) += bno055.o
>> > > diff --git a/drivers/iio/orientation/bno055.c
>> > b/drivers/iio/orientation/bno055.c
>> > > new file mode 100644
>> > > index 000..48b9e93
>> > > --- /dev/null
>> > > +++ b/drivers/iio/orientation/bno055.c
>> > > @@ -0,0 +1,422 @@
>> > > +/*
>> > > + * Copyright (c) 2016 Intel Corporation
>> > > + *
>> > > + * Driver for Bosch Sensortec BNO055 digital motion sensor.
>> > > + *
>> > > + * This program is free software; you can redistribute it and/or modify
>> > > + * it under the terms of the GNU General Public License version 2 as
>> > > + * published by the Free Software Foundation.
>> > > + *
>> >
>> > I find it useful to state the 7-bit i2c chip address here
>> >
>> > > + */
>> > > +
>> > > +#define pr_fmt(fmt) "bno055: " fmt
>> > > +
>> > > +#include 
>> > > +#include 
>> > > +#include 
>> > > +#include 
>> > > +#include 
>> > > +#include 
>> > > +
>> >
>> > drop one newline
>> >
>> > > +
>> > > +#define BNO055_CHIP_ID   0xA0
>> > > +#define REG_MAG_RADIUS_MSB   0x6A
>> >
>> > please consistently prefix with BNO055_
>> >
>> > > +
>> > > +/* BNO055

Re: [PATCH] iio: orientation: Add BNO055 9-axis Absolute Orientation Sensor driver

2016-07-26 Thread navin patidar

Oh, I didn't know that Vlad already have submitted a patch for BNO055.
My patch doesn't do any thing new so please drop my patch.

regards,
--navin-patidar

On Tue, Jul 26, 2016 at 11:46 AM, Peter Meerwald-Stadler
 wrote:
> Hallo Navin,
>
>> Thanks for reviewing the patch. I will send the updated patch.
>
> I am sorry to have overlooked a previous patch by Vlad Dogaru, see
> http://comments.gmane.org/gmane.linux.kernel.iio/24643, for the BNO055
>
> there have been a number of issues, it has not been accepted yet
>
> I think our policy is first come, first served; I have compared the two
> patches, maybe you can collaborate on a common proposal?
>
> regards, p.
>
>> regards,
>> --navin-patidar
>>
>> On Tue, Jul 26, 2016 at 1:07 AM, Peter Meerwald-Stadler 
>> wrote:
>>
>> >
>> > > BNO055 provides the following motion sensors data:
>> > >
>> > >  * Gyroscope
>> > >  * Accelerometer
>> > >  * Magnetometer
>> > >  * Absolute Orientation (Quaternion)
>> >
>> > comments below
>> >
>> > > Signed-off-by: navin patidar 
>> > > ---
>> > >  drivers/iio/orientation/Kconfig  |  10 +
>> > >  drivers/iio/orientation/Makefile |   1 +
>> > >  drivers/iio/orientation/bno055.c | 422
>> > +++
>> > >  3 files changed, 433 insertions(+)
>> > >  create mode 100644 drivers/iio/orientation/bno055.c
>> > >
>> > > diff --git a/drivers/iio/orientation/Kconfig
>> > b/drivers/iio/orientation/Kconfig
>> > > index e3aa1e5..9ac21ee 100644
>> > > --- a/drivers/iio/orientation/Kconfig
>> > > +++ b/drivers/iio/orientation/Kconfig
>> > > @@ -28,4 +28,14 @@ config HID_SENSOR_DEVICE_ROTATION
>> > > device rotation. The output of a device rotation sensor
>> > > is presented using quaternion format.
>> > >
>> > > +config BNO055
>> > > + tristate "BOSCH BNO055 Absolute Orientation"
>> > > + depends on I2C
>> > > + select REGMAP_I2C
>> > > + help
>> > > +   Say yes here to build support for BOSCH BNO55 9-axis absolute
>> > orientation sensor
>> > > +   driver connected via I2C.
>> > > +   This driver can also be built as a module. If so, the module
>> > > +   will be called bno055.
>> > > +
>> > >  endmenu
>> > > diff --git a/drivers/iio/orientation/Makefile
>> > b/drivers/iio/orientation/Makefile
>> > > index 4734dab..7d00037 100644
>> > > --- a/drivers/iio/orientation/Makefile
>> > > +++ b/drivers/iio/orientation/Makefile
>> > > @@ -5,3 +5,4 @@
>> > >  # When adding new entries keep the list in alphabetical order
>> > >  obj-$(CONFIG_HID_SENSOR_INCLINOMETER_3D) += hid-sensor-incl-3d.o
>> > >  obj-$(CONFIG_HID_SENSOR_DEVICE_ROTATION) += hid-sensor-rotation.o
>> > > +obj-$(CONFIG_BNO055) += bno055.o
>> > > diff --git a/drivers/iio/orientation/bno055.c
>> > b/drivers/iio/orientation/bno055.c
>> > > new file mode 100644
>> > > index 000..48b9e93
>> > > --- /dev/null
>> > > +++ b/drivers/iio/orientation/bno055.c
>> > > @@ -0,0 +1,422 @@
>> > > +/*
>> > > + * Copyright (c) 2016 Intel Corporation
>> > > + *
>> > > + * Driver for Bosch Sensortec BNO055 digital motion sensor.
>> > > + *
>> > > + * This program is free software; you can redistribute it and/or modify
>> > > + * it under the terms of the GNU General Public License version 2 as
>> > > + * published by the Free Software Foundation.
>> > > + *
>> >
>> > I find it useful to state the 7-bit i2c chip address here
>> >
>> > > + */
>> > > +
>> > > +#define pr_fmt(fmt) "bno055: " fmt
>> > > +
>> > > +#include 
>> > > +#include 
>> > > +#include 
>> > > +#include 
>> > > +#include 
>> > > +#include 
>> > > +
>> >
>> > drop one newline
>> >
>> > > +
>> > > +#define BNO055_CHIP_ID   0xA0
>> > > +#define REG_MAG_RADIUS_MSB   0x6A
>> >
>> > please consistently prefix with BNO055_
>> >
>> > > +
>> > > +/* BNO055 configuration registers */
>> > > +#define REG_PWR_MODE

[PATCH] iio: orientation: Add BNO055 9-axis Absolute Orientation Sensor driver

2016-07-25 Thread navin patidar

BNO055 provides the following motion sensors data:

 * Gyroscope
 * Accelerometer
 * Magnetometer
 * Absolute Orientation (Quaternion)

Signed-off-by: navin patidar <navin.pati...@gmail.com>
---
 drivers/iio/orientation/Kconfig  |  10 +
 drivers/iio/orientation/Makefile |   1 +
 drivers/iio/orientation/bno055.c | 422 +++
 3 files changed, 433 insertions(+)
 create mode 100644 drivers/iio/orientation/bno055.c

diff --git a/drivers/iio/orientation/Kconfig b/drivers/iio/orientation/Kconfig
index e3aa1e5..9ac21ee 100644
--- a/drivers/iio/orientation/Kconfig
+++ b/drivers/iio/orientation/Kconfig
@@ -28,4 +28,14 @@ config HID_SENSOR_DEVICE_ROTATION
  device rotation. The output of a device rotation sensor
  is presented using quaternion format.
 
+config BNO055
+   tristate "BOSCH BNO055 Absolute Orientation"
+   depends on I2C
+   select REGMAP_I2C
+   help
+ Say yes here to build support for BOSCH BNO55 9-axis absolute 
orientation sensor
+ driver connected via I2C.
+ This driver can also be built as a module. If so, the module
+ will be called bno055.
+
 endmenu
diff --git a/drivers/iio/orientation/Makefile b/drivers/iio/orientation/Makefile
index 4734dab..7d00037 100644
--- a/drivers/iio/orientation/Makefile
+++ b/drivers/iio/orientation/Makefile
@@ -5,3 +5,4 @@
 # When adding new entries keep the list in alphabetical order
 obj-$(CONFIG_HID_SENSOR_INCLINOMETER_3D) += hid-sensor-incl-3d.o
 obj-$(CONFIG_HID_SENSOR_DEVICE_ROTATION) += hid-sensor-rotation.o
+obj-$(CONFIG_BNO055) += bno055.o
diff --git a/drivers/iio/orientation/bno055.c b/drivers/iio/orientation/bno055.c
new file mode 100644
index 000..48b9e93
--- /dev/null
+++ b/drivers/iio/orientation/bno055.c
@@ -0,0 +1,422 @@
+/*
+ * Copyright (c) 2016 Intel Corporation
+ *
+ * Driver for Bosch Sensortec BNO055 digital motion sensor.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#define pr_fmt(fmt) "bno055: " fmt
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+
+#define BNO055_CHIP_ID 0xA0
+#define REG_MAG_RADIUS_MSB 0x6A
+
+/* BNO055 configuration registers */
+#define REG_PWR_MODE   0x3E
+#define REG_OPR_MODE   0x3D
+#define REG_UNIT_SEL   0x3B
+#define REG_AXIS_MAP_SIGN  0x42
+#define REG_AXIS_MAP_CONFIG0x41
+#define REG_UNIT_SEL   0x3B
+#define REG_SYS_TRIGGER0x3F
+#define BNO055_REG_PAGE_ID 0x07
+#define BNO055_REG_ID  0x00
+
+/* BNO055 status registers */
+#define SYS_STATUS 0x39
+#define INT_STATUS 0x37
+#define CALIB_STATUS   0x35
+
+/* BNO055 data registers */
+
+#define GRV_DATA_Z_MSB 0x33
+#define GRV_DATA_Z_LSB 0x32
+#define GRV_DATA_Y_MSB 0x31
+#define GRV_DATA_Y_LSB 0x30
+#define GRV_DATA_X_MSB 0x2F
+#define GRV_DATA_X_LSB 0x2E
+
+#define LIA_DATA_Z_MSB 0x2D
+#define LIA_DATA_Z_LSB 0x2C
+#define LIA_DATA_Y_MSB 0x2B
+#define LIA_DATA_Y_LSB 0x2A
+#define LIA_DATA_X_MSB 0x29
+#define LIA_DATA_X_LSB 0x28
+
+#define QUA_DATA_Z_MSB 0x27
+#define QUA_DATA_Z_LSB 0x26
+#define QUA_DATA_Y_MSB 0x25
+#define QUA_DATA_Y_LSB 0x24
+#define QUA_DATA_X_MSB 0x23
+#define QUA_DATA_X_LSB 0x22
+#define QUA_DATA_W_MSB 0x21
+#define QUA_DATA_W_LSB 0x20
+
+#define EUL_PITCH_MSB 0x1F
+#define EUL_PITCH_LSB 0x1E
+#define EUL_ROLL_MSB 0x1D
+#define EUL_ROLL_LSB 0x1C
+#define EUL_HEADING_MSB 0x1B
+#define EUL_HEADING_LSB 0x1A
+
+#define GYR_DATA_Z_MSB 0x19
+#define GYR_DATA_Z_LSB 0x18
+#define GYR_DATA_Y_MSB 0x17
+#define GYR_DATA_Y_LSB 0x16
+#define GYR_DATA_X_MSB 0x15
+#define GYR_DATA_X_LSB 0x14
+
+#define MAG_DATA_Z_MSB 0x13
+#define MAG_DATA_Z_LSB 0x12
+#define MAG_DATA_Y_MSB 0x11
+#define MAG_DATA_Y_LSB 0x10
+#define MAG_DATA_X_MSB 0x0F
+#define MAG_DATA_X_LSB 0x0E
+
+#define ACC_DATA_Z_MSB 0x0D
+#define ACC_DATA_Z_LSB 0x0C
+#define ACC_DATA_Y_MSB 0x0B
+#define ACC_DATA_Y_LSB 0x0A
+#define ACC_DATA_X_MSB 0x09
+#define ACC_DATA_X_LSB 0x08
+
+/* operation modes */
+#define FUSION_NDOF_MODE 0x0C
+
+/* power modes */
+#define NORMAL_MODE 0x00
+#define LOW_POWER_MODE BIT(0)
+#define SUSPEND_MODE BIT(1)
+
+#define PROPER_CALIBRATION 0xFF
+
+#define BASE_REG  0x08
+#define SENSOR_AXIS_TO_REG(sensor,axis)(BASE_REG + (sensor * 6) + 
(axis * 2))
+
+#define BNO055_CHANNEL(_type, _axis) { \
+   .type = IIO_##_type,\
+   .modified = 1,  \
+   .channel2 = IIO_MOD_##_axis,\
+   .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),   \
+   .scan_index = AXIS_##_axis, \
+   .scan_type = {  \

[PATCH] iio: orientation: Add BNO055 9-axis Absolute Orientation Sensor driver

2016-07-25 Thread navin patidar

BNO055 provides the following motion sensors data:

 * Gyroscope
 * Accelerometer
 * Magnetometer
 * Absolute Orientation (Quaternion)

Signed-off-by: navin patidar 
---
 drivers/iio/orientation/Kconfig  |  10 +
 drivers/iio/orientation/Makefile |   1 +
 drivers/iio/orientation/bno055.c | 422 +++
 3 files changed, 433 insertions(+)
 create mode 100644 drivers/iio/orientation/bno055.c

diff --git a/drivers/iio/orientation/Kconfig b/drivers/iio/orientation/Kconfig
index e3aa1e5..9ac21ee 100644
--- a/drivers/iio/orientation/Kconfig
+++ b/drivers/iio/orientation/Kconfig
@@ -28,4 +28,14 @@ config HID_SENSOR_DEVICE_ROTATION
  device rotation. The output of a device rotation sensor
  is presented using quaternion format.
 
+config BNO055
+   tristate "BOSCH BNO055 Absolute Orientation"
+   depends on I2C
+   select REGMAP_I2C
+   help
+ Say yes here to build support for BOSCH BNO55 9-axis absolute 
orientation sensor
+ driver connected via I2C.
+ This driver can also be built as a module. If so, the module
+ will be called bno055.
+
 endmenu
diff --git a/drivers/iio/orientation/Makefile b/drivers/iio/orientation/Makefile
index 4734dab..7d00037 100644
--- a/drivers/iio/orientation/Makefile
+++ b/drivers/iio/orientation/Makefile
@@ -5,3 +5,4 @@
 # When adding new entries keep the list in alphabetical order
 obj-$(CONFIG_HID_SENSOR_INCLINOMETER_3D) += hid-sensor-incl-3d.o
 obj-$(CONFIG_HID_SENSOR_DEVICE_ROTATION) += hid-sensor-rotation.o
+obj-$(CONFIG_BNO055) += bno055.o
diff --git a/drivers/iio/orientation/bno055.c b/drivers/iio/orientation/bno055.c
new file mode 100644
index 000..48b9e93
--- /dev/null
+++ b/drivers/iio/orientation/bno055.c
@@ -0,0 +1,422 @@
+/*
+ * Copyright (c) 2016 Intel Corporation
+ *
+ * Driver for Bosch Sensortec BNO055 digital motion sensor.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#define pr_fmt(fmt) "bno055: " fmt
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+
+#define BNO055_CHIP_ID 0xA0
+#define REG_MAG_RADIUS_MSB 0x6A
+
+/* BNO055 configuration registers */
+#define REG_PWR_MODE   0x3E
+#define REG_OPR_MODE   0x3D
+#define REG_UNIT_SEL   0x3B
+#define REG_AXIS_MAP_SIGN  0x42
+#define REG_AXIS_MAP_CONFIG0x41
+#define REG_UNIT_SEL   0x3B
+#define REG_SYS_TRIGGER0x3F
+#define BNO055_REG_PAGE_ID 0x07
+#define BNO055_REG_ID  0x00
+
+/* BNO055 status registers */
+#define SYS_STATUS 0x39
+#define INT_STATUS 0x37
+#define CALIB_STATUS   0x35
+
+/* BNO055 data registers */
+
+#define GRV_DATA_Z_MSB 0x33
+#define GRV_DATA_Z_LSB 0x32
+#define GRV_DATA_Y_MSB 0x31
+#define GRV_DATA_Y_LSB 0x30
+#define GRV_DATA_X_MSB 0x2F
+#define GRV_DATA_X_LSB 0x2E
+
+#define LIA_DATA_Z_MSB 0x2D
+#define LIA_DATA_Z_LSB 0x2C
+#define LIA_DATA_Y_MSB 0x2B
+#define LIA_DATA_Y_LSB 0x2A
+#define LIA_DATA_X_MSB 0x29
+#define LIA_DATA_X_LSB 0x28
+
+#define QUA_DATA_Z_MSB 0x27
+#define QUA_DATA_Z_LSB 0x26
+#define QUA_DATA_Y_MSB 0x25
+#define QUA_DATA_Y_LSB 0x24
+#define QUA_DATA_X_MSB 0x23
+#define QUA_DATA_X_LSB 0x22
+#define QUA_DATA_W_MSB 0x21
+#define QUA_DATA_W_LSB 0x20
+
+#define EUL_PITCH_MSB 0x1F
+#define EUL_PITCH_LSB 0x1E
+#define EUL_ROLL_MSB 0x1D
+#define EUL_ROLL_LSB 0x1C
+#define EUL_HEADING_MSB 0x1B
+#define EUL_HEADING_LSB 0x1A
+
+#define GYR_DATA_Z_MSB 0x19
+#define GYR_DATA_Z_LSB 0x18
+#define GYR_DATA_Y_MSB 0x17
+#define GYR_DATA_Y_LSB 0x16
+#define GYR_DATA_X_MSB 0x15
+#define GYR_DATA_X_LSB 0x14
+
+#define MAG_DATA_Z_MSB 0x13
+#define MAG_DATA_Z_LSB 0x12
+#define MAG_DATA_Y_MSB 0x11
+#define MAG_DATA_Y_LSB 0x10
+#define MAG_DATA_X_MSB 0x0F
+#define MAG_DATA_X_LSB 0x0E
+
+#define ACC_DATA_Z_MSB 0x0D
+#define ACC_DATA_Z_LSB 0x0C
+#define ACC_DATA_Y_MSB 0x0B
+#define ACC_DATA_Y_LSB 0x0A
+#define ACC_DATA_X_MSB 0x09
+#define ACC_DATA_X_LSB 0x08
+
+/* operation modes */
+#define FUSION_NDOF_MODE 0x0C
+
+/* power modes */
+#define NORMAL_MODE 0x00
+#define LOW_POWER_MODE BIT(0)
+#define SUSPEND_MODE BIT(1)
+
+#define PROPER_CALIBRATION 0xFF
+
+#define BASE_REG  0x08
+#define SENSOR_AXIS_TO_REG(sensor,axis)(BASE_REG + (sensor * 6) + 
(axis * 2))
+
+#define BNO055_CHANNEL(_type, _axis) { \
+   .type = IIO_##_type,\
+   .modified = 1,  \
+   .channel2 = IIO_MOD_##_axis,\
+   .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),   \
+   .scan_index = AXIS_##_axis, \
+   .scan_type = {  \
+

[PATCH 02/13] staging: rtl8188eu: Remove unused header file odm_RegDefine11AC.h

2014-09-20 Thread navin patidar

Signed-off-by: navin patidar 
---
 .../staging/rtl8188eu/include/odm_RegDefine11AC.h  |   54 
 drivers/staging/rtl8188eu/include/odm_precomp.h|1 -
 2 files changed, 55 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/include/odm_RegDefine11AC.h

diff --git a/drivers/staging/rtl8188eu/include/odm_RegDefine11AC.h 
b/drivers/staging/rtl8188eu/include/odm_RegDefine11AC.h
deleted file mode 100644
index f08775c..000
--- a/drivers/staging/rtl8188eu/include/odm_RegDefine11AC.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-
-#ifndef__ODM_REGDEFINE11AC_H__
-#define __ODM_REGDEFINE11AC_H__
-
-/* 2 RF REG LIST */
-
-
-
-/* 2 BB REG LIST */
-/* PAGE 8 */
-/* PAGE 9 */
-#defineODM_REG_OFDM_FA_RST_11AC0x9A4
-/* PAGE A */
-#defineODM_REG_CCK_CCA_11AC0xA0A
-#defineODM_REG_CCK_FA_RST_11AC 0xA2C
-#defineODM_REG_CCK_FA_11AC 0xA5C
-/* PAGE C */
-#defineODM_REG_IGI_A_11AC  0xC50
-/* PAGE E */
-#defineODM_REG_IGI_B_11AC  0xE50
-/* PAGE F */
-#defineODM_REG_OFDM_FA_11AC0xF48
-
-
-/* 2 MAC REG LIST */
-
-
-
-
-/* DIG Related */
-#defineODM_BIT_IGI_11AC0x
-
-
-
-#endif
diff --git a/drivers/staging/rtl8188eu/include/odm_precomp.h 
b/drivers/staging/rtl8188eu/include/odm_precomp.h
index a8537bf..0f236da 100644
--- a/drivers/staging/rtl8188eu/include/odm_precomp.h
+++ b/drivers/staging/rtl8188eu/include/odm_precomp.h
@@ -37,7 +37,6 @@
 #include "odm.h"
 #include "odm_HWConfig.h"
 #include "odm_debug.h"
-#include "odm_RegDefine11AC.h"
 #include "odm_RegDefine11N.h"
 
 #include "Hal8188ERateAdaptive.h"/* for  RA,Power training */
-- 
1.7.10.4

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[PATCH 03/13] staging: rtl8188eu: Rework function odm_RX_HWAntDivInit()

2014-09-20 Thread navin patidar

Rename CamelCase function name.
Remove unnecessary comments.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   31 +-
 1 file changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 095078d..4b8bafe 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -21,34 +21,35 @@
 #include "odm_precomp.h"
 #include "phy.h"
 
-static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm)
+static void dm_rx_hw_antena_div_init(struct odm_dm_struct *dm_odm)
 {
struct adapter *adapter = dm_odm->Adapter;
-   u32 value32;
+   u32 value32;
 
if (*(dm_odm->mp_mode) == 1) {
dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
-   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0); /*  
disable HW AntDiv */
-   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);  /*  
1:CG, 0:CS */
+   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
+   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
return;
}
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
("odm_RX_HWAntDivInit()\n"));
 
/* MAC Setting */
value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
-   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, 
value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
+   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord,
+  value32|(BIT23|BIT25));
/* Pin Settings */
-   phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* 
Reg870[8]=1'b0, Reg870[9]=1'b0   antsel antselb by HW */
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* 
Reg864[10]=1'b0  antsel2 by HW */
-   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 1);  /* 
Regb2c[22]=1'b0  disable CS/CG switch */
-   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);  /* 
Regb2c[31]=1'b1  output at CG only */
+   phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0);
+   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 1);
+   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
/* OFDM Settings */
-   phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 
0x00a0);
+   phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord,
+  0x00a0);
/* CCK Settings */
-   phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK 
PHY status report issue */
-   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK 
complete HW AntDiv within 64 samples */
+   phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1);
+   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1);
ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
-   phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0x, 0x0201);  
/* antenna mapping table */
+   phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0x, 0x0201);
 }
 
 static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm)
@@ -177,7 +178,7 @@ void ODM_AntennaDiversityInit_88E(struct odm_dm_struct 
*dm_odm)
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
("dm_odm->bIsMPChip=%s\n", (dm_odm->bIsMPChip ? "true" : "false")));
 
if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)
-   odm_RX_HWAntDivInit(dm_odm);
+   dm_rx_hw_antena_div_init(dm_odm);
else if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
odm_TRX_HWAntDivInit(dm_odm);
else if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)
-- 
1.7.10.4

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[PATCH 13/13] staging: rtl8188eu: odm.h: Remove unused struct dyn_primary_cca

2014-09-20 Thread navin patidar

struct odm_dm_struct has a member of struct dyn_primary_cca,
which is initialized once and then never used by driver, so
we can remove struct dyn_promary_cca and code which initialize
it.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/odm.c  |1 -
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   15 ---
 drivers/staging/rtl8188eu/include/odm.h  |9 -
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |2 --
 4 files changed, 27 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm.c 
b/drivers/staging/rtl8188eu/hal/odm.c
index 7da7fd7..e4df837 100644
--- a/drivers/staging/rtl8188eu/hal/odm.c
+++ b/drivers/staging/rtl8188eu/hal/odm.c
@@ -191,7 +191,6 @@ void ODM_DMInit(struct odm_dm_struct *pDM_Odm)
odm_DIGInit(pDM_Odm);
odm_RateAdaptiveMaskInit(pDM_Odm);
 
-   odm_PrimaryCCA_Init(pDM_Odm);/*  Gary */
odm_DynamicTxPowerInit(pDM_Odm);
odm_TXPowerTrackingInit(pDM_Odm);
ODM_EdcaTurboInit(pDM_Odm);
diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 495d9ec..5342af7 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -370,18 +370,3 @@ void rtl88eu_dm_antenna_diversity(struct odm_dm_struct 
*dm_odm)
(dm_odm->AntDivType == CGCS_RX_HW_ANTDIV))
rtl88eu_dm_hw_ant_div(dm_odm);
 }
-
-/* 3 */
-/* 3 Dynamic Primary CCA */
-/* 3 */
-
-void odm_PrimaryCCA_Init(struct odm_dm_struct *dm_odm)
-{
-   struct dyn_primary_cca *PrimaryCCA = &(dm_odm->DM_PriCCA);
-
-   PrimaryCCA->DupRTS_flag = 0;
-   PrimaryCCA->intf_flag = 0;
-   PrimaryCCA->intf_type = 0;
-   PrimaryCCA->Monitor_flag = 0;
-   PrimaryCCA->PriCCA_flag = 0;
-}
diff --git a/drivers/staging/rtl8188eu/include/odm.h 
b/drivers/staging/rtl8188eu/include/odm.h
index e83812f..525eb10 100644
--- a/drivers/staging/rtl8188eu/include/odm.h
+++ b/drivers/staging/rtl8188eu/include/odm.h
@@ -164,14 +164,6 @@ struct false_alarm_stats {
u32 Cnt_BW_LSC; /* Gary */
 };
 
-struct dyn_primary_cca {
-   u8  PriCCA_flag;
-   u8  intf_flag;
-   u8  intf_type;
-   u8  DupRTS_flag;
-   u8  Monitor_flag;
-};
-
 struct rx_hpc {
u8  RXHP_flag;
u8  PSD_func_trigger;
@@ -867,7 +859,6 @@ struct odm_dm_struct {
struct fast_ant_train DM_FatTable;
struct rtw_dig  DM_DigTable;
struct rtl_ps   DM_PSTable;
-   struct dyn_primary_cca DM_PriCCA;
struct rx_hpc   DM_RXHP_Table;
struct false_alarm_stats FalseAlmCnt;
struct false_alarm_stats FlaseAlmCntBuddyAdapter;
diff --git a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h 
b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
index eabef39..14dce6c 100644
--- a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
+++ b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
@@ -47,8 +47,6 @@ void odm_FastAntTrainingCallback(struct odm_dm_struct 
*pDM_Odm);
 
 void odm_FastAntTrainingWorkItemCallback(struct odm_dm_struct *pDM_Odm);
 
-void odm_PrimaryCCA_Init(struct odm_dm_struct *pDM_Odm);
-
 bool ODM_DynamicPrimaryCCA_DupRTS(struct odm_dm_struct *pDM_Odm);
 
 #endif
-- 
1.7.10.4

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[PATCH 12/13] staging: rtl8188eu: Rework function ODM_AntennaDiversity_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name.
Remove unnecessary comments.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/odm.c  |2 +-
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   31 +-
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |2 +-
 3 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm.c 
b/drivers/staging/rtl8188eu/hal/odm.c
index bc891e9..7da7fd7 100644
--- a/drivers/staging/rtl8188eu/hal/odm.c
+++ b/drivers/staging/rtl8188eu/hal/odm.c
@@ -1275,7 +1275,7 @@ void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm)
return;
}
 
-   ODM_AntennaDiversity_88E(pDM_Odm);
+   rtl88eu_dm_antenna_diversity(pDM_Odm);
 }
 
 /* EDCA Turbo */
diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 4e390d9..495d9ec 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -331,7 +331,7 @@ static void rtl88eu_dm_hw_ant_div(struct odm_dm_struct 
*dm_odm)
dig_table->RSSI_max = max_rssi;
 }
 
-void ODM_AntennaDiversity_88E(struct odm_dm_struct *dm_odm)
+void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm)
 {
struct fast_ant_train *dm_fat_tbl = _odm->DM_FatTable;
struct adapter *adapter = dm_odm->Adapter;
@@ -339,28 +339,35 @@ void ODM_AntennaDiversity_88E(struct odm_dm_struct 
*dm_odm)
if (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV))
return;
if (!dm_odm->bLinked) {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
("ODM_AntennaDiversity_88E(): No Link.\n"));
+   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+("ODM_AntennaDiversity_88E(): No Link.\n"));
if (dm_fat_tbl->bBecomeLinked) {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
("Need to Turn off HW AntDiv\n"));
-   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
/* RegC50[7]=1'b1   enable HW AntDiv */
-   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, 
BIT15, 0); /* Enable CCK AntDiv */
+   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+("Need to Turn off HW AntDiv\n"));
+   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
+   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N,
+  BIT15, 0);
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
-   phy_set_bb_reg(adapter, 
ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* Reg80c[21]=1'b0  from TX Reg */
+   phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N,
+  BIT21, 0);
dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
}
return;
} else {
if (!dm_fat_tbl->bBecomeLinked) {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
("Need to Turn on HW AntDiv\n"));
-   /* Because HW AntDiv is disabled before Link, we enable 
HW AntDiv after link */
-   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 1);
/* RegC50[7]=1'b1   enable HW AntDiv */
-   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, 
BIT15, 1); /* Enable CCK AntDiv */
+   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+("Need to Turn on HW AntDiv\n"));
+   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 1);
+   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N,
+  BIT15, 1);
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
-   phy_set_bb_reg(adapter, 
ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); /* Reg80c[21]=1'b1  from TX Info */
+   phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N,
+  BIT21, 1);
dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
}
}
-   if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == 
CGCS_RX_HW_ANTDIV))
+   if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ||
+   (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV))
rtl88eu_dm_hw_ant_div(dm_odm);
 }
 
diff --git a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h 
b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
index 684947f..eabef39 100644
--- a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
+++ b/drivers/staging/rtl

[PATCH 11/13] staging: rtl8188eu: Rework function odm_HWAntDiv()

2014-09-20 Thread navin patidar

 Rename CamelCase function name and local variables.
 Remove unnecessary debugging messages.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   78 +-
 1 file changed, 38 insertions(+), 40 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 95bcc0a..4e390d9 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -272,53 +272,51 @@ void rtl88eu_dm_ant_sel_statistics(struct odm_dm_struct 
*dm_odm,
}
 }
 
-static void odm_HWAntDiv(struct odm_dm_struct *dm_odm)
+static void rtl88eu_dm_hw_ant_div(struct odm_dm_struct *dm_odm)
 {
-   u32 i, MinRSSI = 0xFF, AntDivMaxRSSI = 0, MaxRSSI = 0, 
LocalMinRSSI, LocalMaxRSSI;
-   u32 Main_RSSI, Aux_RSSI;
-   u8  RxIdleAnt = 0, TargetAnt = 7;
struct fast_ant_train *dm_fat_tbl = _odm->DM_FatTable;
-   struct rtw_dig *pDM_DigTable = _odm->DM_DigTable;
-   struct sta_info *pEntry;
+   struct rtw_dig *dig_table = _odm->DM_DigTable;
+   struct sta_info *entry;
+   u32 i, min_rssi = 0xFF, ant_div_max_rssi = 0, max_rssi = 0;
+   u32 local_min_rssi,local_max_rssi;
+   u32 main_rssi, aux_rssi;
+   u8 RxIdleAnt = 0, target_ant = 7;
 
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
-   pEntry = dm_odm->pODM_StaInfo[i];
-   if (IS_STA_VALID(pEntry)) {
+   entry = dm_odm->pODM_StaInfo[i];
+   if (IS_STA_VALID(entry)) {
/* 2 Caculate RSSI per Antenna */
-   Main_RSSI = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ? 
(dm_fat_tbl->MainAnt_Sum[i]/dm_fat_tbl->MainAnt_Cnt[i]) : 0;
-   Aux_RSSI = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ? 
(dm_fat_tbl->AuxAnt_Sum[i]/dm_fat_tbl->AuxAnt_Cnt[i]) : 0;
-   TargetAnt = (Main_RSSI >= Aux_RSSI) ? MAIN_ANT : 
AUX_ANT;
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
-("MacID=%d, MainAnt_Sum=%d, 
MainAnt_Cnt=%d\n",
-i, dm_fat_tbl->MainAnt_Sum[i],
-dm_fat_tbl->MainAnt_Cnt[i]));
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
-("MacID=%d, AuxAnt_Sum=%d, 
AuxAnt_Cnt=%d\n",
-i, dm_fat_tbl->AuxAnt_Sum[i], 
dm_fat_tbl->AuxAnt_Cnt[i]));
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
-("MacID=%d, Main_RSSI= %d, Aux_RSSI= %d\n",
-i, Main_RSSI, Aux_RSSI));
-   /* 2 Select MaxRSSI for DIG */
-   LocalMaxRSSI = (Main_RSSI > Aux_RSSI) ? Main_RSSI : 
Aux_RSSI;
-   if ((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 
40))
-   AntDivMaxRSSI = LocalMaxRSSI;
-   if (LocalMaxRSSI > MaxRSSI)
-   MaxRSSI = LocalMaxRSSI;
+   main_rssi = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ?
+
(dm_fat_tbl->MainAnt_Sum[i]/dm_fat_tbl->MainAnt_Cnt[i]) : 0;
+   aux_rssi = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ?
+   
(dm_fat_tbl->AuxAnt_Sum[i]/dm_fat_tbl->AuxAnt_Cnt[i]) : 0;
+   target_ant = (main_rssi >= aux_rssi) ? MAIN_ANT : 
AUX_ANT;
+   /* 2 Select max_rssi for DIG */
+   local_max_rssi = (main_rssi > aux_rssi) ?
+ main_rssi : aux_rssi;
+   if ((local_max_rssi > ant_div_max_rssi) &&
+   (local_max_rssi < 40))
+   ant_div_max_rssi = local_max_rssi;
+   if (local_max_rssi > max_rssi)
+   max_rssi = local_max_rssi;
 
/* 2 Select RX Idle Antenna */
-   if ((dm_fat_tbl->RxIdleAnt == MAIN_ANT) && (Main_RSSI 
== 0))
-   Main_RSSI = Aux_RSSI;
-   else if ((dm_fat_tbl->RxIdleAnt == AUX_ANT) && 
(Aux_RSSI == 0))
-   Aux_RSSI = Main_RSSI;
-
-   LocalMinRSSI = (Main_RSSI > Aux_RSSI) ? Aux_RSSI : 
Main_RSSI;
-   if (LocalMinRSSI < MinRSSI) {
-   MinRSSI = LocalMinRSSI;
-   RxIdleAnt = TargetAnt;
+   if ((dm_fat_tbl->RxIdleAnt == MAIN_ANT) &&
+   (main_rssi == 0))
+   main_rssi = au

[PATCH 10/13] staging: rtl8188eu: Rework function ODM_AntselStatistics_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name and local variables.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/odm_HWConfig.c |2 +-
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   19 ++-
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |4 ++--
 3 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c 
b/drivers/staging/rtl8188eu/hal/odm_HWConfig.c
index dbc1368..4e4e219 100644
--- a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c
+++ b/drivers/staging/rtl8188eu/hal/odm_HWConfig.c
@@ -315,7 +315,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct 
*dm_odm,
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
(pDM_FatTable->antsel_rx_keep_1<<1) | 
pDM_FatTable->antsel_rx_keep_0;
-   ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, 
pPktinfo->StationID, pPhyInfo->RxPWDBAll);
+   rtl88eu_dm_ant_sel_statistics(dm_odm, antsel_tr_mux, 
pPktinfo->StationID, pPhyInfo->RxPWDBAll);
}
}
/* Smart Antenna Debug Message-- */
diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 5a51405..95bcc0a 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -249,24 +249,25 @@ void rtl88eu_dm_set_tx_ant_by_tx_info(struct 
odm_dm_struct *dm_odm,
}
 }
 
-void ODM_AntselStatistics_88E(struct odm_dm_struct *dm_odm, u8 antsel_tr_mux, 
u32 MacId, u8 RxPWDBAll)
+void rtl88eu_dm_ant_sel_statistics(struct odm_dm_struct *dm_odm,
+  u8 antsel_tr_mux, u32 mac_id, u8 rx_pwdb_all)
 {
struct fast_ant_train *dm_fat_tbl = _odm->DM_FatTable;
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
if (antsel_tr_mux == MAIN_ANT_CG_TRX) {
-   dm_fat_tbl->MainAnt_Sum[MacId] += RxPWDBAll;
-   dm_fat_tbl->MainAnt_Cnt[MacId]++;
+   dm_fat_tbl->MainAnt_Sum[mac_id] += rx_pwdb_all;
+   dm_fat_tbl->MainAnt_Cnt[mac_id]++;
} else {
-   dm_fat_tbl->AuxAnt_Sum[MacId] += RxPWDBAll;
-   dm_fat_tbl->AuxAnt_Cnt[MacId]++;
+   dm_fat_tbl->AuxAnt_Sum[mac_id] += rx_pwdb_all;
+   dm_fat_tbl->AuxAnt_Cnt[mac_id]++;
}
} else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) {
if (antsel_tr_mux == MAIN_ANT_CGCS_RX) {
-   dm_fat_tbl->MainAnt_Sum[MacId] += RxPWDBAll;
-   dm_fat_tbl->MainAnt_Cnt[MacId]++;
+   dm_fat_tbl->MainAnt_Sum[mac_id] += rx_pwdb_all;
+   dm_fat_tbl->MainAnt_Cnt[mac_id]++;
} else {
-   dm_fat_tbl->AuxAnt_Sum[MacId] += RxPWDBAll;
-   dm_fat_tbl->AuxAnt_Cnt[MacId]++;
+   dm_fat_tbl->AuxAnt_Sum[mac_id] += rx_pwdb_all;
+   dm_fat_tbl->AuxAnt_Cnt[mac_id]++;
}
}
 }
diff --git a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h 
b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
index 7a10101..684947f 100644
--- a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
+++ b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
@@ -38,8 +38,8 @@ void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct 
*dm_odm, u8 *desc,
 
 void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant);
 
-void ODM_AntselStatistics_88E(struct odm_dm_struct *pDM_Odm, u8
antsel_tr_mux,
- u32 MacId, u8 RxPWDBAll);
+void rtl88eu_dm_ant_sel_statistics(struct odm_dm_struct *dm_odm, u8 
antsel_tr_mux,
+  u32 mac_id, u8 rx_pwdb_all);
 
 void odm_FastAntTraining(struct odm_dm_struct *pDM_Odm);
 
-- 
1.7.10.4

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[PATCH 08/13] staging: rtl8188eu: Rework function odm_UpdateTxAnt_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name and local variables.
Remove unnecessary debugging messages.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   25 +
 1 file changed, 9 insertions(+), 16 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 8b886c6..f3a4e28 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -222,25 +222,18 @@ void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct 
*dm_odm, u8 ant)
dm_fat_tbl->RxIdleAnt = ant;
 }
 
-static void odm_UpdateTxAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant, u32 
MacId)
+static void update_tx_ant_88eu(struct odm_dm_struct *dm_odm, u8 ant, u32 
mac_id)
 {
struct fast_ant_train *dm_fat_tbl = _odm->DM_FatTable;
-   u8  TargetAnt;
+   u8 target_ant;
 
-   if (Ant == MAIN_ANT)
-   TargetAnt = MAIN_ANT_CG_TRX;
+   if (ant == MAIN_ANT)
+   target_ant = MAIN_ANT_CG_TRX;
else
-   TargetAnt = AUX_ANT_CG_TRX;
-   dm_fat_tbl->antsel_a[MacId] = TargetAnt
-   dm_fat_tbl->antsel_b[MacId] = (TargetAnt)>>1;
-   dm_fat_tbl->antsel_c[MacId] = (TargetAnt)>>2;
-
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
-("Tx from TxInfo, TargetAnt=%s\n",
-(Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
-("antsel_tr_mux=3'b%d%d%d\n",
-dm_fat_tbl->antsel_c[MacId], dm_fat_tbl->antsel_b[MacId], 
dm_fat_tbl->antsel_a[MacId]));
+   target_ant = AUX_ANT_CG_TRX;
+   dm_fat_tbl->antsel_a[mac_id] = target_ant
+   dm_fat_tbl->antsel_b[mac_id] = (target_ant)>>1;
+   dm_fat_tbl->antsel_c[mac_id] = (target_ant)>>2;
 }
 
 void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *dm_odm, u8 *pDesc, u8 
macId)
@@ -322,7 +315,7 @@ static void odm_HWAntDiv(struct odm_dm_struct *dm_odm)
}
/* 2 Select TRX Antenna */
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
-   odm_UpdateTxAnt_88E(dm_odm, TargetAnt, i);
+   update_tx_ant_88eu(dm_odm, TargetAnt, i);
}
dm_fat_tbl->MainAnt_Sum[i] = 0;
dm_fat_tbl->AuxAnt_Sum[i] = 0;
-- 
1.7.10.4

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[PATCH 09/13] staging: rtl8188eu: Rework function ODM_SetTxAntByTxInfo_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name and local variables.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   12 +++-
 drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c   |3 ++-
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |4 ++--
 3 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index f3a4e28..5a51405 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -236,14 +236,16 @@ static void update_tx_ant_88eu(struct odm_dm_struct 
*dm_odm, u8 ant, u32 mac_id)
dm_fat_tbl->antsel_c[mac_id] = (target_ant)>>2;
 }
 
-void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *dm_odm, u8 *pDesc, u8 
macId)
+void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct *dm_odm,
+ u8 *desc, u8 mac_id)
 {
struct fast_ant_train *dm_fat_tbl = _odm->DM_FatTable;
 
-   if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == 
CG_TRX_SMART_ANTDIV)) {
-   SET_TX_DESC_ANTSEL_A_88E(pDesc, dm_fat_tbl->antsel_a[macId]);
-   SET_TX_DESC_ANTSEL_B_88E(pDesc, dm_fat_tbl->antsel_b[macId]);
-   SET_TX_DESC_ANTSEL_C_88E(pDesc, dm_fat_tbl->antsel_c[macId]);
+   if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ||
+   (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)) {
+   SET_TX_DESC_ANTSEL_A_88E(desc, dm_fat_tbl->antsel_a[mac_id]);
+   SET_TX_DESC_ANTSEL_B_88E(desc, dm_fat_tbl->antsel_b[mac_id]);
+   SET_TX_DESC_ANTSEL_C_88E(desc, dm_fat_tbl->antsel_c[mac_id]);
}
 }
 
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c 
b/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c
index 3494ac6..be9eede 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c
@@ -336,7 +336,8 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 
*pmem, s32 sz, u8 bag
ptxdesc->txdw4 |= cpu_to_le32(HW_SSN);  /*  Hw set sequence 
number */
}
 
-   ODM_SetTxAntByTxInfo_88E(>odmpriv, pmem, pattrib->mac_id);
+   rtl88eu_dm_set_tx_ant_by_tx_info(>odmpriv, pmem,
+pattrib->mac_id);
 
rtl8188eu_cal_txdesc_chksum(ptxdesc);
_dbg_dump_tx_info(adapt, pxmitframe->frame_tag, ptxdesc);
diff --git a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h 
b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
index 7dc2698..7a10101 100644
--- a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
+++ b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
@@ -33,8 +33,8 @@ void rtl88eu_dm_antenna_div_init(struct odm_dm_struct 
*dm_odm);
 
 void ODM_AntennaDiversity_88E(struct odm_dm_struct *pDM_Odm);
 
-void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *pDM_Odm, u8 *pDesc,
- u8 macId);
+void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct *dm_odm, u8 *desc,
+ u8 mac_id);
 
 void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant);
 
-- 
1.7.10.4

--
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[PATCH 05/13] staging: rtl8188eu: Rework function odm_FastAntTrainingInit()

2014-09-20 Thread navin patidar

Rename CamelCase function name.
Remove unnecessary comments and debugging messages.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   53 --
 1 file changed, 25 insertions(+), 28 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 8cbd578..68d0235 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -96,17 +96,14 @@ static void dm_trx_hw_antenna_div_init(struct odm_dm_struct 
*dm_odm)
}
 }
 
-static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm)
+static void dm_fast_training_init(struct odm_dm_struct *dm_odm)
 {
struct adapter *adapter = dm_odm->Adapter;
-   u32 value32, i;
+   u32 value32, i;
struct fast_ant_train *dm_fat_tbl = _odm->DM_FatTable;
-   u32 AntCombination = 2;
-
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
("odm_FastAntTrainingInit()\n"));
+   u32 AntCombination = 2;
 
if (*(dm_odm->mp_mode) == 1) {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, 
("dm_odm->AntDivType: %d\n", dm_odm->AntDivType));
return;
}
 
@@ -121,40 +118,40 @@ static void odm_FastAntTrainingInit(struct odm_dm_struct 
*dm_odm)
 
/* MAC Setting */
value32 = phy_query_bb_reg(adapter, 0x4c, bMaskDWord);
-   phy_set_bb_reg(adapter, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); /* 
Reg4C[25]=1, Reg4C[23]=1 for pin output */
+   phy_set_bb_reg(adapter, 0x4c, bMaskDWord, value32|(BIT23|BIT25));
value32 = phy_query_bb_reg(adapter,  0x7B4, bMaskDWord);
-   phy_set_bb_reg(adapter, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); /* 
Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */
+   phy_set_bb_reg(adapter, 0x7b4, bMaskDWord, value32|(BIT16|BIT17));
 
/* Match MAC ADDR */
phy_set_bb_reg(adapter, 0x7b4, 0x, 0);
phy_set_bb_reg(adapter, 0x7b0, bMaskDWord, 0);
 
-   phy_set_bb_reg(adapter, 0x870, BIT9|BIT8, 0);/* Reg870[8]=1'b0, 
Reg870[9]=1'b0  antsel antselb by HW */
-   phy_set_bb_reg(adapter, 0x864, BIT10, 0);   /* Reg864[10]=1'b0  
antsel2 by HW */
-   phy_set_bb_reg(adapter, 0xb2c, BIT22, 0);   /* Regb2c[22]=1'b0  
disable CS/CG switch */
-   phy_set_bb_reg(adapter, 0xb2c, BIT31, 1);   /* Regb2c[31]=1'b1  
output at CG only */
+   phy_set_bb_reg(adapter, 0x870, BIT9|BIT8, 0);
+   phy_set_bb_reg(adapter, 0x864, BIT10, 0);
+   phy_set_bb_reg(adapter, 0xb2c, BIT22, 0);
+   phy_set_bb_reg(adapter, 0xb2c, BIT31, 1);
phy_set_bb_reg(adapter, 0xca4, bMaskDWord, 0x00a0);
 
/* antenna mapping table */
if (AntCombination == 2) {
if (!dm_odm->bIsMPChip) { /* testchip */
-   phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 1); 
/* Reg858[10:8]=3'b001 */
-   phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 2);   
/* Reg858[13:11]=3'b010 */
+   phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 1);
+   phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 2);
} else { /* MPchip */
phy_set_bb_reg(adapter, 0x914, bMaskByte0, 1);
phy_set_bb_reg(adapter, 0x914, bMaskByte1, 2);
}
} else if (AntCombination == 7) {
if (!dm_odm->bIsMPChip) { /* testchip */
-   phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 0); 
/* Reg858[10:8]=3'b000 */
-   phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 1);   
/* Reg858[13:11]=3'b001 */
+   phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 0);
+   phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 1);
phy_set_bb_reg(adapter, 0x878, BIT16, 0);
-   phy_set_bb_reg(adapter, 0x858, BIT15|BIT14, 2); /* 
Reg878[0],Reg858[14:15])=3'b010 */
-   phy_set_bb_reg(adapter, 0x878, BIT19|BIT18|BIT17, 3);/* 
Reg878[3:1]=3b'011 */
-   phy_set_bb_reg(adapter, 0x878, BIT22|BIT21|BIT20, 4);/* 
Reg878[6:4]=3b'100 */
-   phy_set_bb_reg(adapter, 0x878, BIT25|BIT24|BIT23, 5);/* 
Reg878[9:7]=3b'101 */
-   phy_set_bb_reg(adapter, 0x878, BIT28|BIT27|BIT26, 6);/* 
Reg878[12:10]=3b'110 */
-   phy_set_bb_reg(adapter, 0x878, BIT31|BIT30|BIT29, 7);/* 
Reg878[15:13]=3b'111 */
+   phy_set_bb_reg(adapter, 0x858, BIT15|BIT14, 2);
+   phy_set_bb_reg(adapter, 0x878, BIT19|BIT18|BIT17, 3);
+   phy_set_bb_reg(adapter, 0x878, BIT22|BIT21|BIT20, 4);
+   phy_set_bb_reg(adapter, 0x878, BIT25|BIT24|BIT23, 5);
+   phy_set_bb

[PATCH 06/13] staging: rtl8188eu: Rework function ODM_AntennaDiversityInit_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name.
Remove unnecessary debugging messages.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/odm.c  |2 +-
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |5 +
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |2 +-
 3 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm.c 
b/drivers/staging/rtl8188eu/hal/odm.c
index ae98379..bc891e9 100644
--- a/drivers/staging/rtl8188eu/hal/odm.c
+++ b/drivers/staging/rtl8188eu/hal/odm.c
@@ -1265,7 +1265,7 @@ void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm)
return;
}
 
-   ODM_AntennaDiversityInit_88E(pDM_Odm);
+   rtl88eu_dm_antenna_div_init(pDM_Odm);
 }
 
 void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm)
diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 68d0235..74105b5 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -174,11 +174,8 @@ static void dm_fast_training_init(struct odm_dm_struct 
*dm_odm)
phy_set_bb_reg(adapter, 0xc50, BIT7, 1);
 }
 
-void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm)
+void rtl88eu_dm_antenna_div_init(struct odm_dm_struct *dm_odm)
 {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
("dm_odm->AntDivType=%d\n", dm_odm->AntDivType));
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
("dm_odm->bIsMPChip=%s\n", (dm_odm->bIsMPChip ? "true" : "false")));
-
if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)
dm_rx_hw_antena_div_init(dm_odm);
else if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
diff --git a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h 
b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
index 02ac78d..7ef8c36 100644
--- a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
+++ b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
@@ -29,7 +29,7 @@
 
 void ODM_DIG_LowerBound_88E(struct odm_dm_struct *pDM_Odm);
 
-void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *pDM_Odm);
+void rtl88eu_dm_antenna_div_init(struct odm_dm_struct *dm_odm);
 
 void ODM_AntennaDiversity_88E(struct odm_dm_struct *pDM_Odm);
 
-- 
1.7.10.4

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[PATCH 07/13] staging: rtl8188eu: Rework function ODM_UpdateRxIdleAnt_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name and local variables.
Remove unnecessary debugging messages and comments.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   51 --
 drivers/staging/rtl8188eu/hal/usb_halinit.c  |2 +-
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |2 +-
 3 files changed, 31 insertions(+), 24 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 74105b5..8b886c6 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -48,7 +48,7 @@ static void dm_rx_hw_antena_div_init(struct odm_dm_struct 
*dm_odm)
/* CCK Settings */
phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1);
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1);
-   ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
+   rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT);
phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0x, 0x0201);
 }
 
@@ -82,7 +82,7 @@ static void dm_trx_hw_antenna_div_init(struct odm_dm_struct 
*dm_odm)
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1);
/* Tx Settings */
phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0);
-   ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
+   rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT);
 
/* antenna mapping table */
if (!dm_odm->bIsMPChip) { /* testchip */
@@ -184,35 +184,42 @@ void rtl88eu_dm_antenna_div_init(struct odm_dm_struct 
*dm_odm)
dm_fast_training_init(dm_odm);
 }
 
-void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant)
+void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant)
 {
struct fast_ant_train *dm_fat_tbl = _odm->DM_FatTable;
struct adapter *adapter = dm_odm->Adapter;
-   u32 DefaultAnt, OptionalAnt;
-
-   if (dm_fat_tbl->RxIdleAnt != Ant) {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to 
Update Rx Idle Ant\n"));
-   if (Ant == MAIN_ANT) {
-   DefaultAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? 
MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
-   OptionalAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) 
? AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
+   u32 default_ant, optional_ant;
+
+   if (dm_fat_tbl->RxIdleAnt != ant) {
+   if (ant == MAIN_ANT) {
+   default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ?
+  MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
+   optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) 
?
+   AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
} else {
-   DefaultAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? 
AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
-   OptionalAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) 
? MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
+   default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ?
+  AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
+   optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) 
?
+   MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
}
 
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, 
BIT5|BIT4|BIT3, DefaultAnt);   /* Default RX */
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, 
BIT8|BIT7|BIT6, OptionalAnt);  /* Optional RX */
-   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N, 
BIT14|BIT13|BIT12, DefaultAnt);/* Default TX */
-   phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N, BIT6|BIT7, 
DefaultAnt);/* Resp Tx */
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
+  BIT5|BIT4|BIT3, default_ant);
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
+  BIT8|BIT7|BIT6, optional_ant);
+   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N,
+  BIT14|BIT13|BIT12, default_ant);
+   phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N,
+  BIT6|BIT7, default_ant);
} else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) {
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, 
BIT5|BIT4|BIT3, DefaultAnt);   /* Default RX */
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, 
BIT8|BIT7|BIT6, OptionalAnt);  /* Optional RX */
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
+

[PATCH 01/13] staging: rtl8188eu: Remove odm_debug.c

2014-09-20 Thread navin patidar

Move a function and global variable from odm_debug.c to odm.c

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/Makefile|1 -
 drivers/staging/rtl8188eu/hal/odm.c   |8 
 drivers/staging/rtl8188eu/hal/odm_debug.c |   32 -
 3 files changed, 8 insertions(+), 33 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/hal/odm_debug.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index 33cd34d..31ac159 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -27,7 +27,6 @@ r8188eu-y :=  \
hal/hal_intf.o  \
hal/hal_com.o   \
hal/odm.o   \
-   hal/odm_debug.o \
hal/odm_HWConfig.o  \
hal/odm_RTL8188E.o  \
hal/rtl8188e_cmd.o  \
diff --git a/drivers/staging/rtl8188eu/hal/odm.c 
b/drivers/staging/rtl8188eu/hal/odm.c
index 3a929bf..ae98379 100644
--- a/drivers/staging/rtl8188eu/hal/odm.c
+++ b/drivers/staging/rtl8188eu/hal/odm.c
@@ -23,6 +23,7 @@
 #include "odm_precomp.h"
 #include "phy.h"
 
+u32 GlobalDebugLevel;
 static const u16 dB_Invert_Table[8][12] = {
{1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4},
{4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16},
@@ -172,6 +173,13 @@ u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = {
 #defineRxDefaultAnt1   0x65a9
 #defineRxDefaultAnt2   0x569a
 
+void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm)
+{
+   pDM_Odm->DebugLevel = ODM_DBG_TRACE;
+
+   pDM_Odm->DebugComponents = 0;
+}
+
 /* 3 Export Interface */
 
 /*  2011/09/21 MH Add to describe different team necessary resource allocate?? 
*/
diff --git a/drivers/staging/rtl8188eu/hal/odm_debug.c 
b/drivers/staging/rtl8188eu/hal/odm_debug.c
deleted file mode 100644
index 84caadd..000
--- a/drivers/staging/rtl8188eu/hal/odm_debug.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-
-/*  include files */
-
-#include "odm_precomp.h"
-
-void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm)
-{
-   pDM_Odm->DebugLevel = ODM_DBG_TRACE;
-
-   pDM_Odm->DebugComponents = 0;
-}
-
-u32 GlobalDebugLevel;
-- 
1.7.10.4

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[PATCH 04/13] staging: rtl8188eu: Rework function odm_TRX_HWAntDivInit()

2014-09-20 Thread navin patidar

Rename CamelCase function name.
Remove unnecessary comments.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   39 +++---
 1 file changed, 22 insertions(+), 17 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 4b8bafe..8cbd578 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -52,42 +52,47 @@ static void dm_rx_hw_antena_div_init(struct odm_dm_struct 
*dm_odm)
phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0x, 0x0201);
 }
 
-static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm)
+static void dm_trx_hw_antenna_div_init(struct odm_dm_struct *dm_odm)
 {
struct adapter *adapter = dm_odm->Adapter;
u32 value32;
 
if (*(dm_odm->mp_mode) == 1) {
dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
-   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0); /*  
disable HW AntDiv */
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, 
BIT5|BIT4|BIT3, 0); /* Default RX   (0/1) */
+   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
+  BIT5|BIT4|BIT3, 0);
return;
}
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
("odm_TRX_HWAntDivInit()\n"));
 
/* MAC Setting */
value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
-   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, 
value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
+   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord,
+  value32|(BIT23|BIT25));
/* Pin Settings */
-   phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* 
Reg870[8]=1'b0, Reg870[9]=1'b0   antsel antselb by HW */
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* 
Reg864[10]=1'b0  antsel2 by HW */
-   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 0);  /* 
Regb2c[22]=1'b0  disable CS/CG switch */
-   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);  /* 
Regb2c[31]=1'b1  output at CG only */
+   phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0);
+   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 0);
+   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
/* OFDM Settings */
-   phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 
0x00a0);
+   phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord,
+  0x00a0);
/* CCK Settings */
-   phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK 
PHY status report issue */
-   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK 
complete HW AntDiv within 64 samples */
+   phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1);
+   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1);
/* Tx Settings */
-   phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* 
Reg80c[21]=1'b0  from TX Reg */
+   phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0);
ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
 
/* antenna mapping table */
if (!dm_odm->bIsMPChip) { /* testchip */
-   phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N, 
BIT10|BIT9|BIT8, 1);  /* Reg858[10:8]=3'b001 */
-   phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N, 
BIT13|BIT12|BIT11, 2);/* Reg858[13:11]=3'b010 */
+   phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N,
+  BIT10|BIT9|BIT8, 1);
+   phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N,
+  BIT13|BIT12|BIT11, 2);
} else { /* MPchip */
-   phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, 
0x0201);  /* Reg914=3'b010, Reg915=3'b001 */
+   phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, bMaskDWord,
+  0x0201);
}
 }
 
@@ -180,7 +185,7 @@ void ODM_AntennaDiversityInit_88E(struct odm_dm_struct 
*dm_odm)
if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)
dm_rx_hw_antena_div_init(dm_odm);
else if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
-   odm_TRX_HWAntDivInit(dm_odm);
+   dm_trx_hw_antenna_div_init(dm_odm);
else if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)
odm_FastAntTrainingInit(dm_odm);
 }
-- 
1.7.10.4

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[PATCH 04/13] staging: rtl8188eu: Rework function odm_TRX_HWAntDivInit()

2014-09-20 Thread navin patidar

Rename CamelCase function name.
Remove unnecessary comments.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   39 +++---
 1 file changed, 22 insertions(+), 17 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 4b8bafe..8cbd578 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -52,42 +52,47 @@ static void dm_rx_hw_antena_div_init(struct odm_dm_struct 
*dm_odm)
phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0x, 0x0201);
 }
 
-static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm)
+static void dm_trx_hw_antenna_div_init(struct odm_dm_struct *dm_odm)
 {
struct adapter *adapter = dm_odm-Adapter;
u32 value32;
 
if (*(dm_odm-mp_mode) == 1) {
dm_odm-AntDivType = CGCS_RX_SW_ANTDIV;
-   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0); /*  
disable HW AntDiv */
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, 
BIT5|BIT4|BIT3, 0); /* Default RX   (0/1) */
+   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
+  BIT5|BIT4|BIT3, 0);
return;
}
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
(odm_TRX_HWAntDivInit()\n));
 
/* MAC Setting */
value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
-   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, 
value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
+   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord,
+  value32|(BIT23|BIT25));
/* Pin Settings */
-   phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* 
Reg870[8]=1'b0, Reg870[9]=1'b0   antsel antselb by HW */
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* 
Reg864[10]=1'b0  antsel2 by HW */
-   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 0);  /* 
Regb2c[22]=1'b0  disable CS/CG switch */
-   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);  /* 
Regb2c[31]=1'b1  output at CG only */
+   phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0);
+   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 0);
+   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
/* OFDM Settings */
-   phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 
0x00a0);
+   phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord,
+  0x00a0);
/* CCK Settings */
-   phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK 
PHY status report issue */
-   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK 
complete HW AntDiv within 64 samples */
+   phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1);
+   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1);
/* Tx Settings */
-   phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* 
Reg80c[21]=1'b0  from TX Reg */
+   phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0);
ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
 
/* antenna mapping table */
if (!dm_odm-bIsMPChip) { /* testchip */
-   phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N, 
BIT10|BIT9|BIT8, 1);  /* Reg858[10:8]=3'b001 */
-   phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N, 
BIT13|BIT12|BIT11, 2);/* Reg858[13:11]=3'b010 */
+   phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N,
+  BIT10|BIT9|BIT8, 1);
+   phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N,
+  BIT13|BIT12|BIT11, 2);
} else { /* MPchip */
-   phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, 
0x0201);  /* Reg914=3'b010, Reg915=3'b001 */
+   phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, bMaskDWord,
+  0x0201);
}
 }
 
@@ -180,7 +185,7 @@ void ODM_AntennaDiversityInit_88E(struct odm_dm_struct 
*dm_odm)
if (dm_odm-AntDivType == CGCS_RX_HW_ANTDIV)
dm_rx_hw_antena_div_init(dm_odm);
else if (dm_odm-AntDivType == CG_TRX_HW_ANTDIV)
-   odm_TRX_HWAntDivInit(dm_odm);
+   dm_trx_hw_antenna_div_init(dm_odm);
else if (dm_odm-AntDivType == CG_TRX_SMART_ANTDIV)
odm_FastAntTrainingInit(dm_odm);
 }
-- 
1.7.10.4

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[PATCH 01/13] staging: rtl8188eu: Remove odm_debug.c

2014-09-20 Thread navin patidar

Move a function and global variable from odm_debug.c to odm.c

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/Makefile|1 -
 drivers/staging/rtl8188eu/hal/odm.c   |8 
 drivers/staging/rtl8188eu/hal/odm_debug.c |   32 -
 3 files changed, 8 insertions(+), 33 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/hal/odm_debug.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index 33cd34d..31ac159 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -27,7 +27,6 @@ r8188eu-y :=  \
hal/hal_intf.o  \
hal/hal_com.o   \
hal/odm.o   \
-   hal/odm_debug.o \
hal/odm_HWConfig.o  \
hal/odm_RTL8188E.o  \
hal/rtl8188e_cmd.o  \
diff --git a/drivers/staging/rtl8188eu/hal/odm.c 
b/drivers/staging/rtl8188eu/hal/odm.c
index 3a929bf..ae98379 100644
--- a/drivers/staging/rtl8188eu/hal/odm.c
+++ b/drivers/staging/rtl8188eu/hal/odm.c
@@ -23,6 +23,7 @@
 #include odm_precomp.h
 #include phy.h
 
+u32 GlobalDebugLevel;
 static const u16 dB_Invert_Table[8][12] = {
{1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4},
{4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16},
@@ -172,6 +173,13 @@ u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = {
 #defineRxDefaultAnt1   0x65a9
 #defineRxDefaultAnt2   0x569a
 
+void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm)
+{
+   pDM_Odm-DebugLevel = ODM_DBG_TRACE;
+
+   pDM_Odm-DebugComponents = 0;
+}
+
 /* 3 Export Interface */
 
 /*  2011/09/21 MH Add to describe different team necessary resource allocate?? 
*/
diff --git a/drivers/staging/rtl8188eu/hal/odm_debug.c 
b/drivers/staging/rtl8188eu/hal/odm_debug.c
deleted file mode 100644
index 84caadd..000
--- a/drivers/staging/rtl8188eu/hal/odm_debug.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-
-/*  include files */
-
-#include odm_precomp.h
-
-void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm)
-{
-   pDM_Odm-DebugLevel = ODM_DBG_TRACE;
-
-   pDM_Odm-DebugComponents = 0;
-}
-
-u32 GlobalDebugLevel;
-- 
1.7.10.4

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[PATCH 09/13] staging: rtl8188eu: Rework function ODM_SetTxAntByTxInfo_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name and local variables.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   12 +++-
 drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c   |3 ++-
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |4 ++--
 3 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index f3a4e28..5a51405 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -236,14 +236,16 @@ static void update_tx_ant_88eu(struct odm_dm_struct 
*dm_odm, u8 ant, u32 mac_id)
dm_fat_tbl-antsel_c[mac_id] = (target_antBIT2)2;
 }
 
-void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *dm_odm, u8 *pDesc, u8 
macId)
+void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct *dm_odm,
+ u8 *desc, u8 mac_id)
 {
struct fast_ant_train *dm_fat_tbl = dm_odm-DM_FatTable;
 
-   if ((dm_odm-AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm-AntDivType == 
CG_TRX_SMART_ANTDIV)) {
-   SET_TX_DESC_ANTSEL_A_88E(pDesc, dm_fat_tbl-antsel_a[macId]);
-   SET_TX_DESC_ANTSEL_B_88E(pDesc, dm_fat_tbl-antsel_b[macId]);
-   SET_TX_DESC_ANTSEL_C_88E(pDesc, dm_fat_tbl-antsel_c[macId]);
+   if ((dm_odm-AntDivType == CG_TRX_HW_ANTDIV) ||
+   (dm_odm-AntDivType == CG_TRX_SMART_ANTDIV)) {
+   SET_TX_DESC_ANTSEL_A_88E(desc, dm_fat_tbl-antsel_a[mac_id]);
+   SET_TX_DESC_ANTSEL_B_88E(desc, dm_fat_tbl-antsel_b[mac_id]);
+   SET_TX_DESC_ANTSEL_C_88E(desc, dm_fat_tbl-antsel_c[mac_id]);
}
 }
 
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c 
b/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c
index 3494ac6..be9eede 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c
@@ -336,7 +336,8 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 
*pmem, s32 sz, u8 bag
ptxdesc-txdw4 |= cpu_to_le32(HW_SSN);  /*  Hw set sequence 
number */
}
 
-   ODM_SetTxAntByTxInfo_88E(haldata-odmpriv, pmem, pattrib-mac_id);
+   rtl88eu_dm_set_tx_ant_by_tx_info(haldata-odmpriv, pmem,
+pattrib-mac_id);
 
rtl8188eu_cal_txdesc_chksum(ptxdesc);
_dbg_dump_tx_info(adapt, pxmitframe-frame_tag, ptxdesc);
diff --git a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h 
b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
index 7dc2698..7a10101 100644
--- a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
+++ b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
@@ -33,8 +33,8 @@ void rtl88eu_dm_antenna_div_init(struct odm_dm_struct 
*dm_odm);
 
 void ODM_AntennaDiversity_88E(struct odm_dm_struct *pDM_Odm);
 
-void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *pDM_Odm, u8 *pDesc,
- u8 macId);
+void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct *dm_odm, u8 *desc,
+ u8 mac_id);
 
 void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant);
 
-- 
1.7.10.4

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[PATCH 05/13] staging: rtl8188eu: Rework function odm_FastAntTrainingInit()

2014-09-20 Thread navin patidar

Rename CamelCase function name.
Remove unnecessary comments and debugging messages.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   53 --
 1 file changed, 25 insertions(+), 28 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 8cbd578..68d0235 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -96,17 +96,14 @@ static void dm_trx_hw_antenna_div_init(struct odm_dm_struct 
*dm_odm)
}
 }
 
-static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm)
+static void dm_fast_training_init(struct odm_dm_struct *dm_odm)
 {
struct adapter *adapter = dm_odm-Adapter;
-   u32 value32, i;
+   u32 value32, i;
struct fast_ant_train *dm_fat_tbl = dm_odm-DM_FatTable;
-   u32 AntCombination = 2;
-
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
(odm_FastAntTrainingInit()\n));
+   u32 AntCombination = 2;
 
if (*(dm_odm-mp_mode) == 1) {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, 
(dm_odm-AntDivType: %d\n, dm_odm-AntDivType));
return;
}
 
@@ -121,40 +118,40 @@ static void odm_FastAntTrainingInit(struct odm_dm_struct 
*dm_odm)
 
/* MAC Setting */
value32 = phy_query_bb_reg(adapter, 0x4c, bMaskDWord);
-   phy_set_bb_reg(adapter, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); /* 
Reg4C[25]=1, Reg4C[23]=1 for pin output */
+   phy_set_bb_reg(adapter, 0x4c, bMaskDWord, value32|(BIT23|BIT25));
value32 = phy_query_bb_reg(adapter,  0x7B4, bMaskDWord);
-   phy_set_bb_reg(adapter, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); /* 
Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */
+   phy_set_bb_reg(adapter, 0x7b4, bMaskDWord, value32|(BIT16|BIT17));
 
/* Match MAC ADDR */
phy_set_bb_reg(adapter, 0x7b4, 0x, 0);
phy_set_bb_reg(adapter, 0x7b0, bMaskDWord, 0);
 
-   phy_set_bb_reg(adapter, 0x870, BIT9|BIT8, 0);/* Reg870[8]=1'b0, 
Reg870[9]=1'b0  antsel antselb by HW */
-   phy_set_bb_reg(adapter, 0x864, BIT10, 0);   /* Reg864[10]=1'b0  
antsel2 by HW */
-   phy_set_bb_reg(adapter, 0xb2c, BIT22, 0);   /* Regb2c[22]=1'b0  
disable CS/CG switch */
-   phy_set_bb_reg(adapter, 0xb2c, BIT31, 1);   /* Regb2c[31]=1'b1  
output at CG only */
+   phy_set_bb_reg(adapter, 0x870, BIT9|BIT8, 0);
+   phy_set_bb_reg(adapter, 0x864, BIT10, 0);
+   phy_set_bb_reg(adapter, 0xb2c, BIT22, 0);
+   phy_set_bb_reg(adapter, 0xb2c, BIT31, 1);
phy_set_bb_reg(adapter, 0xca4, bMaskDWord, 0x00a0);
 
/* antenna mapping table */
if (AntCombination == 2) {
if (!dm_odm-bIsMPChip) { /* testchip */
-   phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 1); 
/* Reg858[10:8]=3'b001 */
-   phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 2);   
/* Reg858[13:11]=3'b010 */
+   phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 1);
+   phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 2);
} else { /* MPchip */
phy_set_bb_reg(adapter, 0x914, bMaskByte0, 1);
phy_set_bb_reg(adapter, 0x914, bMaskByte1, 2);
}
} else if (AntCombination == 7) {
if (!dm_odm-bIsMPChip) { /* testchip */
-   phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 0); 
/* Reg858[10:8]=3'b000 */
-   phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 1);   
/* Reg858[13:11]=3'b001 */
+   phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 0);
+   phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 1);
phy_set_bb_reg(adapter, 0x878, BIT16, 0);
-   phy_set_bb_reg(adapter, 0x858, BIT15|BIT14, 2); /* 
Reg878[0],Reg858[14:15])=3'b010 */
-   phy_set_bb_reg(adapter, 0x878, BIT19|BIT18|BIT17, 3);/* 
Reg878[3:1]=3b'011 */
-   phy_set_bb_reg(adapter, 0x878, BIT22|BIT21|BIT20, 4);/* 
Reg878[6:4]=3b'100 */
-   phy_set_bb_reg(adapter, 0x878, BIT25|BIT24|BIT23, 5);/* 
Reg878[9:7]=3b'101 */
-   phy_set_bb_reg(adapter, 0x878, BIT28|BIT27|BIT26, 6);/* 
Reg878[12:10]=3b'110 */
-   phy_set_bb_reg(adapter, 0x878, BIT31|BIT30|BIT29, 7);/* 
Reg878[15:13]=3b'111 */
+   phy_set_bb_reg(adapter, 0x858, BIT15|BIT14, 2);
+   phy_set_bb_reg(adapter, 0x878, BIT19|BIT18|BIT17, 3);
+   phy_set_bb_reg(adapter, 0x878, BIT22|BIT21|BIT20, 4);
+   phy_set_bb_reg(adapter, 0x878, BIT25|BIT24|BIT23, 5);
+   phy_set_bb_reg(adapter, 0x878, BIT28

[PATCH 06/13] staging: rtl8188eu: Rework function ODM_AntennaDiversityInit_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name.
Remove unnecessary debugging messages.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/odm.c  |2 +-
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |5 +
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |2 +-
 3 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm.c 
b/drivers/staging/rtl8188eu/hal/odm.c
index ae98379..bc891e9 100644
--- a/drivers/staging/rtl8188eu/hal/odm.c
+++ b/drivers/staging/rtl8188eu/hal/odm.c
@@ -1265,7 +1265,7 @@ void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm)
return;
}
 
-   ODM_AntennaDiversityInit_88E(pDM_Odm);
+   rtl88eu_dm_antenna_div_init(pDM_Odm);
 }
 
 void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm)
diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 68d0235..74105b5 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -174,11 +174,8 @@ static void dm_fast_training_init(struct odm_dm_struct 
*dm_odm)
phy_set_bb_reg(adapter, 0xc50, BIT7, 1);
 }
 
-void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm)
+void rtl88eu_dm_antenna_div_init(struct odm_dm_struct *dm_odm)
 {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
(dm_odm-AntDivType=%d\n, dm_odm-AntDivType));
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
(dm_odm-bIsMPChip=%s\n, (dm_odm-bIsMPChip ? true : false)));
-
if (dm_odm-AntDivType == CGCS_RX_HW_ANTDIV)
dm_rx_hw_antena_div_init(dm_odm);
else if (dm_odm-AntDivType == CG_TRX_HW_ANTDIV)
diff --git a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h 
b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
index 02ac78d..7ef8c36 100644
--- a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
+++ b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
@@ -29,7 +29,7 @@
 
 void ODM_DIG_LowerBound_88E(struct odm_dm_struct *pDM_Odm);
 
-void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *pDM_Odm);
+void rtl88eu_dm_antenna_div_init(struct odm_dm_struct *dm_odm);
 
 void ODM_AntennaDiversity_88E(struct odm_dm_struct *pDM_Odm);
 
-- 
1.7.10.4

--
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Please read the FAQ at  http://www.tux.org/lkml/

[PATCH 07/13] staging: rtl8188eu: Rework function ODM_UpdateRxIdleAnt_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name and local variables.
Remove unnecessary debugging messages and comments.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   51 --
 drivers/staging/rtl8188eu/hal/usb_halinit.c  |2 +-
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |2 +-
 3 files changed, 31 insertions(+), 24 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 74105b5..8b886c6 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -48,7 +48,7 @@ static void dm_rx_hw_antena_div_init(struct odm_dm_struct 
*dm_odm)
/* CCK Settings */
phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1);
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1);
-   ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
+   rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT);
phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0x, 0x0201);
 }
 
@@ -82,7 +82,7 @@ static void dm_trx_hw_antenna_div_init(struct odm_dm_struct 
*dm_odm)
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1);
/* Tx Settings */
phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0);
-   ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
+   rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT);
 
/* antenna mapping table */
if (!dm_odm-bIsMPChip) { /* testchip */
@@ -184,35 +184,42 @@ void rtl88eu_dm_antenna_div_init(struct odm_dm_struct 
*dm_odm)
dm_fast_training_init(dm_odm);
 }
 
-void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant)
+void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant)
 {
struct fast_ant_train *dm_fat_tbl = dm_odm-DM_FatTable;
struct adapter *adapter = dm_odm-Adapter;
-   u32 DefaultAnt, OptionalAnt;
-
-   if (dm_fat_tbl-RxIdleAnt != Ant) {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (Need to 
Update Rx Idle Ant\n));
-   if (Ant == MAIN_ANT) {
-   DefaultAnt = (dm_odm-AntDivType == CG_TRX_HW_ANTDIV) ? 
MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
-   OptionalAnt = (dm_odm-AntDivType == CG_TRX_HW_ANTDIV) 
? AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
+   u32 default_ant, optional_ant;
+
+   if (dm_fat_tbl-RxIdleAnt != ant) {
+   if (ant == MAIN_ANT) {
+   default_ant = (dm_odm-AntDivType == CG_TRX_HW_ANTDIV) ?
+  MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
+   optional_ant = (dm_odm-AntDivType == CG_TRX_HW_ANTDIV) 
?
+   AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
} else {
-   DefaultAnt = (dm_odm-AntDivType == CG_TRX_HW_ANTDIV) ? 
AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
-   OptionalAnt = (dm_odm-AntDivType == CG_TRX_HW_ANTDIV) 
? MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
+   default_ant = (dm_odm-AntDivType == CG_TRX_HW_ANTDIV) ?
+  AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
+   optional_ant = (dm_odm-AntDivType == CG_TRX_HW_ANTDIV) 
?
+   MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
}
 
if (dm_odm-AntDivType == CG_TRX_HW_ANTDIV) {
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, 
BIT5|BIT4|BIT3, DefaultAnt);   /* Default RX */
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, 
BIT8|BIT7|BIT6, OptionalAnt);  /* Optional RX */
-   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N, 
BIT14|BIT13|BIT12, DefaultAnt);/* Default TX */
-   phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N, BIT6|BIT7, 
DefaultAnt);/* Resp Tx */
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
+  BIT5|BIT4|BIT3, default_ant);
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
+  BIT8|BIT7|BIT6, optional_ant);
+   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N,
+  BIT14|BIT13|BIT12, default_ant);
+   phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N,
+  BIT6|BIT7, default_ant);
} else if (dm_odm-AntDivType == CGCS_RX_HW_ANTDIV) {
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, 
BIT5|BIT4|BIT3, DefaultAnt);   /* Default RX */
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, 
BIT8|BIT7|BIT6, OptionalAnt);  /* Optional RX */
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
+  BIT5|BIT4|BIT3, default_ant

[PATCH 10/13] staging: rtl8188eu: Rework function ODM_AntselStatistics_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name and local variables.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/odm_HWConfig.c |2 +-
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   19 ++-
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |4 ++--
 3 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c 
b/drivers/staging/rtl8188eu/hal/odm_HWConfig.c
index dbc1368..4e4e219 100644
--- a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c
+++ b/drivers/staging/rtl8188eu/hal/odm_HWConfig.c
@@ -315,7 +315,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct 
*dm_odm,
if (pPktinfo-bPacketToSelf || pPktinfo-bPacketBeacon) {
antsel_tr_mux = (pDM_FatTable-antsel_rx_keep_22) |
(pDM_FatTable-antsel_rx_keep_11) | 
pDM_FatTable-antsel_rx_keep_0;
-   ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, 
pPktinfo-StationID, pPhyInfo-RxPWDBAll);
+   rtl88eu_dm_ant_sel_statistics(dm_odm, antsel_tr_mux, 
pPktinfo-StationID, pPhyInfo-RxPWDBAll);
}
}
/* Smart Antenna Debug Message-- */
diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 5a51405..95bcc0a 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -249,24 +249,25 @@ void rtl88eu_dm_set_tx_ant_by_tx_info(struct 
odm_dm_struct *dm_odm,
}
 }
 
-void ODM_AntselStatistics_88E(struct odm_dm_struct *dm_odm, u8 antsel_tr_mux, 
u32 MacId, u8 RxPWDBAll)
+void rtl88eu_dm_ant_sel_statistics(struct odm_dm_struct *dm_odm,
+  u8 antsel_tr_mux, u32 mac_id, u8 rx_pwdb_all)
 {
struct fast_ant_train *dm_fat_tbl = dm_odm-DM_FatTable;
if (dm_odm-AntDivType == CG_TRX_HW_ANTDIV) {
if (antsel_tr_mux == MAIN_ANT_CG_TRX) {
-   dm_fat_tbl-MainAnt_Sum[MacId] += RxPWDBAll;
-   dm_fat_tbl-MainAnt_Cnt[MacId]++;
+   dm_fat_tbl-MainAnt_Sum[mac_id] += rx_pwdb_all;
+   dm_fat_tbl-MainAnt_Cnt[mac_id]++;
} else {
-   dm_fat_tbl-AuxAnt_Sum[MacId] += RxPWDBAll;
-   dm_fat_tbl-AuxAnt_Cnt[MacId]++;
+   dm_fat_tbl-AuxAnt_Sum[mac_id] += rx_pwdb_all;
+   dm_fat_tbl-AuxAnt_Cnt[mac_id]++;
}
} else if (dm_odm-AntDivType == CGCS_RX_HW_ANTDIV) {
if (antsel_tr_mux == MAIN_ANT_CGCS_RX) {
-   dm_fat_tbl-MainAnt_Sum[MacId] += RxPWDBAll;
-   dm_fat_tbl-MainAnt_Cnt[MacId]++;
+   dm_fat_tbl-MainAnt_Sum[mac_id] += rx_pwdb_all;
+   dm_fat_tbl-MainAnt_Cnt[mac_id]++;
} else {
-   dm_fat_tbl-AuxAnt_Sum[MacId] += RxPWDBAll;
-   dm_fat_tbl-AuxAnt_Cnt[MacId]++;
+   dm_fat_tbl-AuxAnt_Sum[mac_id] += rx_pwdb_all;
+   dm_fat_tbl-AuxAnt_Cnt[mac_id]++;
}
}
 }
diff --git a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h 
b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
index 7a10101..684947f 100644
--- a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
+++ b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
@@ -38,8 +38,8 @@ void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct 
*dm_odm, u8 *desc,
 
 void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant);
 
-void ODM_AntselStatistics_88E(struct odm_dm_struct *pDM_Odm, u8
antsel_tr_mux,
- u32 MacId, u8 RxPWDBAll);
+void rtl88eu_dm_ant_sel_statistics(struct odm_dm_struct *dm_odm, u8 
antsel_tr_mux,
+  u32 mac_id, u8 rx_pwdb_all);
 
 void odm_FastAntTraining(struct odm_dm_struct *pDM_Odm);
 
-- 
1.7.10.4

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[PATCH 08/13] staging: rtl8188eu: Rework function odm_UpdateTxAnt_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name and local variables.
Remove unnecessary debugging messages.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   25 +
 1 file changed, 9 insertions(+), 16 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 8b886c6..f3a4e28 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -222,25 +222,18 @@ void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct 
*dm_odm, u8 ant)
dm_fat_tbl-RxIdleAnt = ant;
 }
 
-static void odm_UpdateTxAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant, u32 
MacId)
+static void update_tx_ant_88eu(struct odm_dm_struct *dm_odm, u8 ant, u32 
mac_id)
 {
struct fast_ant_train *dm_fat_tbl = dm_odm-DM_FatTable;
-   u8  TargetAnt;
+   u8 target_ant;
 
-   if (Ant == MAIN_ANT)
-   TargetAnt = MAIN_ANT_CG_TRX;
+   if (ant == MAIN_ANT)
+   target_ant = MAIN_ANT_CG_TRX;
else
-   TargetAnt = AUX_ANT_CG_TRX;
-   dm_fat_tbl-antsel_a[MacId] = TargetAntBIT0;
-   dm_fat_tbl-antsel_b[MacId] = (TargetAntBIT1)1;
-   dm_fat_tbl-antsel_c[MacId] = (TargetAntBIT2)2;
-
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
-(Tx from TxInfo, TargetAnt=%s\n,
-(Ant == MAIN_ANT) ? MAIN_ANT : AUX_ANT));
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
-(antsel_tr_mux=3'b%d%d%d\n,
-dm_fat_tbl-antsel_c[MacId], dm_fat_tbl-antsel_b[MacId], 
dm_fat_tbl-antsel_a[MacId]));
+   target_ant = AUX_ANT_CG_TRX;
+   dm_fat_tbl-antsel_a[mac_id] = target_antBIT0;
+   dm_fat_tbl-antsel_b[mac_id] = (target_antBIT1)1;
+   dm_fat_tbl-antsel_c[mac_id] = (target_antBIT2)2;
 }
 
 void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *dm_odm, u8 *pDesc, u8 
macId)
@@ -322,7 +315,7 @@ static void odm_HWAntDiv(struct odm_dm_struct *dm_odm)
}
/* 2 Select TRX Antenna */
if (dm_odm-AntDivType == CG_TRX_HW_ANTDIV)
-   odm_UpdateTxAnt_88E(dm_odm, TargetAnt, i);
+   update_tx_ant_88eu(dm_odm, TargetAnt, i);
}
dm_fat_tbl-MainAnt_Sum[i] = 0;
dm_fat_tbl-AuxAnt_Sum[i] = 0;
-- 
1.7.10.4

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[PATCH 13/13] staging: rtl8188eu: odm.h: Remove unused struct dyn_primary_cca

2014-09-20 Thread navin patidar

struct odm_dm_struct has a member of struct dyn_primary_cca,
which is initialized once and then never used by driver, so
we can remove struct dyn_promary_cca and code which initialize
it.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/odm.c  |1 -
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   15 ---
 drivers/staging/rtl8188eu/include/odm.h  |9 -
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |2 --
 4 files changed, 27 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm.c 
b/drivers/staging/rtl8188eu/hal/odm.c
index 7da7fd7..e4df837 100644
--- a/drivers/staging/rtl8188eu/hal/odm.c
+++ b/drivers/staging/rtl8188eu/hal/odm.c
@@ -191,7 +191,6 @@ void ODM_DMInit(struct odm_dm_struct *pDM_Odm)
odm_DIGInit(pDM_Odm);
odm_RateAdaptiveMaskInit(pDM_Odm);
 
-   odm_PrimaryCCA_Init(pDM_Odm);/*  Gary */
odm_DynamicTxPowerInit(pDM_Odm);
odm_TXPowerTrackingInit(pDM_Odm);
ODM_EdcaTurboInit(pDM_Odm);
diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 495d9ec..5342af7 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -370,18 +370,3 @@ void rtl88eu_dm_antenna_diversity(struct odm_dm_struct 
*dm_odm)
(dm_odm-AntDivType == CGCS_RX_HW_ANTDIV))
rtl88eu_dm_hw_ant_div(dm_odm);
 }
-
-/* 3 */
-/* 3 Dynamic Primary CCA */
-/* 3 */
-
-void odm_PrimaryCCA_Init(struct odm_dm_struct *dm_odm)
-{
-   struct dyn_primary_cca *PrimaryCCA = (dm_odm-DM_PriCCA);
-
-   PrimaryCCA-DupRTS_flag = 0;
-   PrimaryCCA-intf_flag = 0;
-   PrimaryCCA-intf_type = 0;
-   PrimaryCCA-Monitor_flag = 0;
-   PrimaryCCA-PriCCA_flag = 0;
-}
diff --git a/drivers/staging/rtl8188eu/include/odm.h 
b/drivers/staging/rtl8188eu/include/odm.h
index e83812f..525eb10 100644
--- a/drivers/staging/rtl8188eu/include/odm.h
+++ b/drivers/staging/rtl8188eu/include/odm.h
@@ -164,14 +164,6 @@ struct false_alarm_stats {
u32 Cnt_BW_LSC; /* Gary */
 };
 
-struct dyn_primary_cca {
-   u8  PriCCA_flag;
-   u8  intf_flag;
-   u8  intf_type;
-   u8  DupRTS_flag;
-   u8  Monitor_flag;
-};
-
 struct rx_hpc {
u8  RXHP_flag;
u8  PSD_func_trigger;
@@ -867,7 +859,6 @@ struct odm_dm_struct {
struct fast_ant_train DM_FatTable;
struct rtw_dig  DM_DigTable;
struct rtl_ps   DM_PSTable;
-   struct dyn_primary_cca DM_PriCCA;
struct rx_hpc   DM_RXHP_Table;
struct false_alarm_stats FalseAlmCnt;
struct false_alarm_stats FlaseAlmCntBuddyAdapter;
diff --git a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h 
b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
index eabef39..14dce6c 100644
--- a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
+++ b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
@@ -47,8 +47,6 @@ void odm_FastAntTrainingCallback(struct odm_dm_struct 
*pDM_Odm);
 
 void odm_FastAntTrainingWorkItemCallback(struct odm_dm_struct *pDM_Odm);
 
-void odm_PrimaryCCA_Init(struct odm_dm_struct *pDM_Odm);
-
 bool ODM_DynamicPrimaryCCA_DupRTS(struct odm_dm_struct *pDM_Odm);
 
 #endif
-- 
1.7.10.4

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[PATCH 12/13] staging: rtl8188eu: Rework function ODM_AntennaDiversity_88E()

2014-09-20 Thread navin patidar

Rename CamelCase function name.
Remove unnecessary comments.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/odm.c  |2 +-
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   31 +-
 drivers/staging/rtl8188eu/include/odm_RTL8188E.h |2 +-
 3 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm.c 
b/drivers/staging/rtl8188eu/hal/odm.c
index bc891e9..7da7fd7 100644
--- a/drivers/staging/rtl8188eu/hal/odm.c
+++ b/drivers/staging/rtl8188eu/hal/odm.c
@@ -1275,7 +1275,7 @@ void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm)
return;
}
 
-   ODM_AntennaDiversity_88E(pDM_Odm);
+   rtl88eu_dm_antenna_diversity(pDM_Odm);
 }
 
 /* EDCA Turbo */
diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 4e390d9..495d9ec 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -331,7 +331,7 @@ static void rtl88eu_dm_hw_ant_div(struct odm_dm_struct 
*dm_odm)
dig_table-RSSI_max = max_rssi;
 }
 
-void ODM_AntennaDiversity_88E(struct odm_dm_struct *dm_odm)
+void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm)
 {
struct fast_ant_train *dm_fat_tbl = dm_odm-DM_FatTable;
struct adapter *adapter = dm_odm-Adapter;
@@ -339,28 +339,35 @@ void ODM_AntennaDiversity_88E(struct odm_dm_struct 
*dm_odm)
if (!(dm_odm-SupportAbility  ODM_BB_ANT_DIV))
return;
if (!dm_odm-bLinked) {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
(ODM_AntennaDiversity_88E(): No Link.\n));
+   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+(ODM_AntennaDiversity_88E(): No Link.\n));
if (dm_fat_tbl-bBecomeLinked) {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
(Need to Turn off HW AntDiv\n));
-   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
/* RegC50[7]=1'b1   enable HW AntDiv */
-   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, 
BIT15, 0); /* Enable CCK AntDiv */
+   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+(Need to Turn off HW AntDiv\n));
+   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
+   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N,
+  BIT15, 0);
if (dm_odm-AntDivType == CG_TRX_HW_ANTDIV)
-   phy_set_bb_reg(adapter, 
ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* Reg80c[21]=1'b0  from TX Reg */
+   phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N,
+  BIT21, 0);
dm_fat_tbl-bBecomeLinked = dm_odm-bLinked;
}
return;
} else {
if (!dm_fat_tbl-bBecomeLinked) {
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
(Need to Turn on HW AntDiv\n));
-   /* Because HW AntDiv is disabled before Link, we enable 
HW AntDiv after link */
-   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 1);
/* RegC50[7]=1'b1   enable HW AntDiv */
-   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, 
BIT15, 1); /* Enable CCK AntDiv */
+   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+(Need to Turn on HW AntDiv\n));
+   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 1);
+   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N,
+  BIT15, 1);
if (dm_odm-AntDivType == CG_TRX_HW_ANTDIV)
-   phy_set_bb_reg(adapter, 
ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); /* Reg80c[21]=1'b1  from TX Info */
+   phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N,
+  BIT21, 1);
dm_fat_tbl-bBecomeLinked = dm_odm-bLinked;
}
}
-   if ((dm_odm-AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm-AntDivType == 
CGCS_RX_HW_ANTDIV))
+   if ((dm_odm-AntDivType == CG_TRX_HW_ANTDIV) ||
+   (dm_odm-AntDivType == CGCS_RX_HW_ANTDIV))
rtl88eu_dm_hw_ant_div(dm_odm);
 }
 
diff --git a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h 
b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
index 684947f..eabef39 100644
--- a/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
+++ b/drivers/staging/rtl8188eu/include/odm_RTL8188E.h
@@ -31,7 +31,7 @@ void ODM_DIG_LowerBound_88E(struct odm_dm_struct *pDM_Odm);
 
 void

[PATCH 11/13] staging: rtl8188eu: Rework function odm_HWAntDiv()

2014-09-20 Thread navin patidar

 Rename CamelCase function name and local variables.
 Remove unnecessary debugging messages.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   78 +-
 1 file changed, 38 insertions(+), 40 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 95bcc0a..4e390d9 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -272,53 +272,51 @@ void rtl88eu_dm_ant_sel_statistics(struct odm_dm_struct 
*dm_odm,
}
 }
 
-static void odm_HWAntDiv(struct odm_dm_struct *dm_odm)
+static void rtl88eu_dm_hw_ant_div(struct odm_dm_struct *dm_odm)
 {
-   u32 i, MinRSSI = 0xFF, AntDivMaxRSSI = 0, MaxRSSI = 0, 
LocalMinRSSI, LocalMaxRSSI;
-   u32 Main_RSSI, Aux_RSSI;
-   u8  RxIdleAnt = 0, TargetAnt = 7;
struct fast_ant_train *dm_fat_tbl = dm_odm-DM_FatTable;
-   struct rtw_dig *pDM_DigTable = dm_odm-DM_DigTable;
-   struct sta_info *pEntry;
+   struct rtw_dig *dig_table = dm_odm-DM_DigTable;
+   struct sta_info *entry;
+   u32 i, min_rssi = 0xFF, ant_div_max_rssi = 0, max_rssi = 0;
+   u32 local_min_rssi,local_max_rssi;
+   u32 main_rssi, aux_rssi;
+   u8 RxIdleAnt = 0, target_ant = 7;
 
for (i = 0; i  ODM_ASSOCIATE_ENTRY_NUM; i++) {
-   pEntry = dm_odm-pODM_StaInfo[i];
-   if (IS_STA_VALID(pEntry)) {
+   entry = dm_odm-pODM_StaInfo[i];
+   if (IS_STA_VALID(entry)) {
/* 2 Caculate RSSI per Antenna */
-   Main_RSSI = (dm_fat_tbl-MainAnt_Cnt[i] != 0) ? 
(dm_fat_tbl-MainAnt_Sum[i]/dm_fat_tbl-MainAnt_Cnt[i]) : 0;
-   Aux_RSSI = (dm_fat_tbl-AuxAnt_Cnt[i] != 0) ? 
(dm_fat_tbl-AuxAnt_Sum[i]/dm_fat_tbl-AuxAnt_Cnt[i]) : 0;
-   TargetAnt = (Main_RSSI = Aux_RSSI) ? MAIN_ANT : 
AUX_ANT;
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
-(MacID=%d, MainAnt_Sum=%d, 
MainAnt_Cnt=%d\n,
-i, dm_fat_tbl-MainAnt_Sum[i],
-dm_fat_tbl-MainAnt_Cnt[i]));
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
-(MacID=%d, AuxAnt_Sum=%d, 
AuxAnt_Cnt=%d\n,
-i, dm_fat_tbl-AuxAnt_Sum[i], 
dm_fat_tbl-AuxAnt_Cnt[i]));
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
-(MacID=%d, Main_RSSI= %d, Aux_RSSI= %d\n,
-i, Main_RSSI, Aux_RSSI));
-   /* 2 Select MaxRSSI for DIG */
-   LocalMaxRSSI = (Main_RSSI  Aux_RSSI) ? Main_RSSI : 
Aux_RSSI;
-   if ((LocalMaxRSSI  AntDivMaxRSSI)  (LocalMaxRSSI  
40))
-   AntDivMaxRSSI = LocalMaxRSSI;
-   if (LocalMaxRSSI  MaxRSSI)
-   MaxRSSI = LocalMaxRSSI;
+   main_rssi = (dm_fat_tbl-MainAnt_Cnt[i] != 0) ?
+
(dm_fat_tbl-MainAnt_Sum[i]/dm_fat_tbl-MainAnt_Cnt[i]) : 0;
+   aux_rssi = (dm_fat_tbl-AuxAnt_Cnt[i] != 0) ?
+   
(dm_fat_tbl-AuxAnt_Sum[i]/dm_fat_tbl-AuxAnt_Cnt[i]) : 0;
+   target_ant = (main_rssi = aux_rssi) ? MAIN_ANT : 
AUX_ANT;
+   /* 2 Select max_rssi for DIG */
+   local_max_rssi = (main_rssi  aux_rssi) ?
+ main_rssi : aux_rssi;
+   if ((local_max_rssi  ant_div_max_rssi) 
+   (local_max_rssi  40))
+   ant_div_max_rssi = local_max_rssi;
+   if (local_max_rssi  max_rssi)
+   max_rssi = local_max_rssi;
 
/* 2 Select RX Idle Antenna */
-   if ((dm_fat_tbl-RxIdleAnt == MAIN_ANT)  (Main_RSSI 
== 0))
-   Main_RSSI = Aux_RSSI;
-   else if ((dm_fat_tbl-RxIdleAnt == AUX_ANT)  
(Aux_RSSI == 0))
-   Aux_RSSI = Main_RSSI;
-
-   LocalMinRSSI = (Main_RSSI  Aux_RSSI) ? Aux_RSSI : 
Main_RSSI;
-   if (LocalMinRSSI  MinRSSI) {
-   MinRSSI = LocalMinRSSI;
-   RxIdleAnt = TargetAnt;
+   if ((dm_fat_tbl-RxIdleAnt == MAIN_ANT) 
+   (main_rssi == 0))
+   main_rssi = aux_rssi;
+   else if ((dm_fat_tbl-RxIdleAnt == AUX_ANT) 
+(aux_rssi == 0))
+   aux_rssi = main_rssi

[PATCH 03/13] staging: rtl8188eu: Rework function odm_RX_HWAntDivInit()

2014-09-20 Thread navin patidar

Rename CamelCase function name.
Remove unnecessary comments.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |   31 +-
 1 file changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c 
b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
index 095078d..4b8bafe 100644
--- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
+++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
@@ -21,34 +21,35 @@
 #include odm_precomp.h
 #include phy.h
 
-static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm)
+static void dm_rx_hw_antena_div_init(struct odm_dm_struct *dm_odm)
 {
struct adapter *adapter = dm_odm-Adapter;
-   u32 value32;
+   u32 value32;
 
if (*(dm_odm-mp_mode) == 1) {
dm_odm-AntDivType = CGCS_RX_SW_ANTDIV;
-   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0); /*  
disable HW AntDiv */
-   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);  /*  
1:CG, 0:CS */
+   phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
+   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
return;
}
-   ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
(odm_RX_HWAntDivInit()\n));
 
/* MAC Setting */
value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
-   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, 
value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
+   phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord,
+  value32|(BIT23|BIT25));
/* Pin Settings */
-   phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* 
Reg870[8]=1'b0, Reg870[9]=1'b0   antsel antselb by HW */
-   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* 
Reg864[10]=1'b0  antsel2 by HW */
-   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 1);  /* 
Regb2c[22]=1'b0  disable CS/CG switch */
-   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);  /* 
Regb2c[31]=1'b1  output at CG only */
+   phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);
+   phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0);
+   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 1);
+   phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
/* OFDM Settings */
-   phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 
0x00a0);
+   phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord,
+  0x00a0);
/* CCK Settings */
-   phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK 
PHY status report issue */
-   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK 
complete HW AntDiv within 64 samples */
+   phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1);
+   phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1);
ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
-   phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0x, 0x0201);  
/* antenna mapping table */
+   phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0x, 0x0201);
 }
 
 static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm)
@@ -177,7 +178,7 @@ void ODM_AntennaDiversityInit_88E(struct odm_dm_struct 
*dm_odm)
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 
(dm_odm-bIsMPChip=%s\n, (dm_odm-bIsMPChip ? true : false)));
 
if (dm_odm-AntDivType == CGCS_RX_HW_ANTDIV)
-   odm_RX_HWAntDivInit(dm_odm);
+   dm_rx_hw_antena_div_init(dm_odm);
else if (dm_odm-AntDivType == CG_TRX_HW_ANTDIV)
odm_TRX_HWAntDivInit(dm_odm);
else if (dm_odm-AntDivType == CG_TRX_SMART_ANTDIV)
-- 
1.7.10.4

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[PATCH 02/13] staging: rtl8188eu: Remove unused header file odm_RegDefine11AC.h

2014-09-20 Thread navin patidar

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 .../staging/rtl8188eu/include/odm_RegDefine11AC.h  |   54 
 drivers/staging/rtl8188eu/include/odm_precomp.h|1 -
 2 files changed, 55 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/include/odm_RegDefine11AC.h

diff --git a/drivers/staging/rtl8188eu/include/odm_RegDefine11AC.h 
b/drivers/staging/rtl8188eu/include/odm_RegDefine11AC.h
deleted file mode 100644
index f08775c..000
--- a/drivers/staging/rtl8188eu/include/odm_RegDefine11AC.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-
-#ifndef__ODM_REGDEFINE11AC_H__
-#define __ODM_REGDEFINE11AC_H__
-
-/* 2 RF REG LIST */
-
-
-
-/* 2 BB REG LIST */
-/* PAGE 8 */
-/* PAGE 9 */
-#defineODM_REG_OFDM_FA_RST_11AC0x9A4
-/* PAGE A */
-#defineODM_REG_CCK_CCA_11AC0xA0A
-#defineODM_REG_CCK_FA_RST_11AC 0xA2C
-#defineODM_REG_CCK_FA_11AC 0xA5C
-/* PAGE C */
-#defineODM_REG_IGI_A_11AC  0xC50
-/* PAGE E */
-#defineODM_REG_IGI_B_11AC  0xE50
-/* PAGE F */
-#defineODM_REG_OFDM_FA_11AC0xF48
-
-
-/* 2 MAC REG LIST */
-
-
-
-
-/* DIG Related */
-#defineODM_BIT_IGI_11AC0x
-
-
-
-#endif
diff --git a/drivers/staging/rtl8188eu/include/odm_precomp.h 
b/drivers/staging/rtl8188eu/include/odm_precomp.h
index a8537bf..0f236da 100644
--- a/drivers/staging/rtl8188eu/include/odm_precomp.h
+++ b/drivers/staging/rtl8188eu/include/odm_precomp.h
@@ -37,7 +37,6 @@
 #include odm.h
 #include odm_HWConfig.h
 #include odm_debug.h
-#include odm_RegDefine11AC.h
 #include odm_RegDefine11N.h
 
 #include Hal8188ERateAdaptive.h/* for  RA,Power training */
-- 
1.7.10.4

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[PATCH 8/8] staging: rtl8188eu: Rename Hal8188EPwrSeq.h to pwrseq.h

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/pwrseq.c |2 +-
 drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h |  341 
 drivers/staging/rtl8188eu/include/pwrseq.h |  341 
 drivers/staging/rtl8188eu/include/rtl8188e_hal.h   |2 +-
 4 files changed, 343 insertions(+), 343 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
 create mode 100644 drivers/staging/rtl8188eu/include/pwrseq.h

diff --git a/drivers/staging/rtl8188eu/hal/pwrseq.c 
b/drivers/staging/rtl8188eu/hal/pwrseq.c
index 4c29e63..20dce42 100644
--- a/drivers/staging/rtl8188eu/hal/pwrseq.c
+++ b/drivers/staging/rtl8188eu/hal/pwrseq.c
@@ -18,7 +18,7 @@
  *
  
**/
 
-#include "Hal8188EPwrSeq.h"
+#include "pwrseq.h"
 #include 
 
 /*
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h 
b/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
deleted file mode 100644
index 43db92d..000
--- a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
+++ /dev/null
@@ -1,341 +0,0 @@
-
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-
-#ifndef __HAL8188EPWRSEQ_H__
-#define __HAL8188EPWRSEQ_H__
-
-#include "pwrseqcmd.h"
-
-/*
-   Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd
-   There are 6 HW Power States:
-   0: POFF--Power Off
-   1: PDN--Power Down
-   2: CARDEMU--Card Emulation
-   3: ACT--Active Mode
-   4: LPS--Low Power State
-   5: SUS--Suspend
-
-   The transision from different states are defined below
-   TRANS_CARDEMU_TO_ACT
-   TRANS_ACT_TO_CARDEMU
-   TRANS_CARDEMU_TO_SUS
-   TRANS_SUS_TO_CARDEMU
-   TRANS_CARDEMU_TO_PDN
-   TRANS_ACT_TO_LPS
-   TRANS_LPS_TO_ACT
-
-   TRANS_END
-
-PWR SEQ Version: rtl8188E_PwrSeq_V09.h
-*/
-#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS10
-#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS10
-#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS10
-#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS10
-#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS10
-#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS10
-#define RTL8188E_TRANS_ACT_TO_LPS_STEPS15
-#define RTL8188E_TRANS_LPS_TO_ACT_STEPS15
-#define RTL8188E_TRANS_END_STEPS   1
-
-
-#define RTL8188E_TRANS_CARDEMU_TO_ACT  \
-   /* format
-* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value
-* },
-* comment here
-*/ \
-   {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1}, \
-   /* wait till 0x04[17] = 1power ready*/  \
-   {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0|BIT1, 0}, \
-   /* 0x02[1:0] = 0reset BB*/  \
-   {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},   \
-   /*0x24[23] = 2b'01 schmit trigger */\
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},  \
-   /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, 0}, \
-   /*0x04[12:11] = 2b'00 disable WL suspend*/  \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},   \
-   /*0x04[8] = 1 polling until return 0*/  \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR

[PATCH 2/8] staging: rtl8188eu: Hal8188EPwrSeq.c: fix lines over 80 characters.

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c |   46 
 1 file changed, 31 insertions(+), 15 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c 
b/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
index fc23bf1..4c29e63 100644
--- a/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
+++ b/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
@@ -25,61 +25,77 @@
 drivers should parse below arrays and do the corresponding actions
 */
 /* 3 Power on  Array */
-struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + 
RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS +
+RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
 };
 
 /* 3Radio off Array */
-struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 
+ RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+ RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_END
 };
 
 /* 3Card Disable Array */
-struct wl_pwr_cfg 
rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + 
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_ACT_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_CARDDIS
-   RTL8188E_TRANS_END
+struct wl_pwr_cfg rtl8188E_card_disable_flow
+   [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
+RTL8188E_TRANS_END_STEPS] = {
+   RTL8188E_TRANS_ACT_TO_CARDEMU
+   RTL8188E_TRANS_CARDEMU_TO_CARDDIS
+   RTL8188E_TRANS_END
 };
 
 /* 3 Card Enable Array */
-struct wl_pwr_cfg 
rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + 
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_CARDDIS_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_ACT
-   RTL8188E_TRANS_END
+struct wl_pwr_cfg rtl8188E_card_enable_flow
+   [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
+RTL8188E_TRANS_END_STEPS] = {
+   RTL8188E_TRANS_CARDDIS_TO_CARDEMU
+   RTL8188E_TRANS_CARDEMU_TO_ACT
+   RTL8188E_TRANS_END
 };
 
 /* 3Suspend Array */
-struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + 
RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+   RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
+   RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_SUS
RTL8188E_TRANS_END
 };
 
 /* 3 Resume Array */
-struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + 
RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+  RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
+  RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_SUS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
 };
 
 /* 3HWPDN Array */
-struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + 
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+ RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
+ RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_PDN
RTL8188E_TRANS_END
 };
 
 /* 3 Enter LPS */
-struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + 
RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
+ RTL8188E_TRANS_END_STEPS] = {
/* FW behavior */
RTL8188E_TRANS_ACT_TO_LPS
RTL8188E_TRANS_END
 };
 
 /* 3 Leave LPS */
-struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + 
RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS +
+ RTL8188E_TRANS_END_STEPS] = {
/* FW behavior */
RTL8188E_TRANS_LPS_TO_ACT
RTL8188E_TRANS_END
-- 
1.7.10.4

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[PATCH 5/8] staging: rtl8188eu: Rename HalPwrSeqCmd.c to pwrseqcmd.c

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/Makefile   |2 +-
 drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c |  123 --
 drivers/staging/rtl8188eu/hal/pwrseqcmd.c|  123 ++
 3 files changed, 124 insertions(+), 124 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
 create mode 100644 drivers/staging/rtl8188eu/hal/pwrseqcmd.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index a309451..8723794 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -22,7 +22,7 @@ r8188eu-y :=  \
hal/bb_cfg.o \
hal/rf_cfg.o \
hal/HalPhyRf_8188e.o\
-   hal/HalPwrSeqCmd.o  \
+   hal/pwrseqcmd.o \
hal/pwrseq.o \
hal/Hal8188ERateAdaptive.o\
hal/hal_intf.o  \
diff --git a/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c 
b/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
deleted file mode 100644
index 2565d6e..000
--- a/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- 
**/
-
-#include 
-#include 
-
-/* This routine deals with the Power Configuration CMDs parsing
- * for RTL8723/RTL8188E Series IC.
- */
-u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
-   u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[])
-{
-   struct wl_pwr_cfg pwrcfgcmd = {0};
-   u8 poll_bit = false;
-   u32 aryidx = 0;
-   u8 value = 0;
-   u32 offset = 0;
-   u32 poll_count = 0; /*  polling autoload done. */
-   u32 max_poll_count = 5000;
-
-   do {
-   pwrcfgcmd = pwrseqcmd[aryidx];
-
-   RT_TRACE(_module_hal_init_c_ , _drv_info_,
-("rtl88eu_pwrseqcmdparsing: offset(%#x) cut_msk(%#x)"
- "fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x)"
- "msk(%#x) value(%#x)\n",
-GET_PWR_CFG_OFFSET(pwrcfgcmd),
-GET_PWR_CFG_CUT_MASK(pwrcfgcmd),
-GET_PWR_CFG_FAB_MASK(pwrcfgcmd),
-GET_PWR_CFG_INTF_MASK(pwrcfgcmd),
-GET_PWR_CFG_BASE(pwrcfgcmd),
-GET_PWR_CFG_CMD(pwrcfgcmd),
-GET_PWR_CFG_MASK(pwrcfgcmd),
-GET_PWR_CFG_VALUE(pwrcfgcmd)));
-
-   /* Only Handle the command whose FAB, CUT, and Interface are 
matched */
-   if ((GET_PWR_CFG_FAB_MASK(pwrcfgcmd) & fab_vers) &&
-   (GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) &&
-   (GET_PWR_CFG_INTF_MASK(pwrcfgcmd) & ifacetype)) {
-   switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
-   case PWR_CMD_READ:
-   RT_TRACE(_module_hal_init_c_, _drv_info_,
-("rtl88eu_pwrseqcmdparsing: 
PWR_CMD_READ\n"));
-   break;
-   case PWR_CMD_WRITE:
-   RT_TRACE(_module_hal_init_c_, _drv_info_,
-("rtl88eu_pwrseqcmdparsing: 
PWR_CMD_WRITE\n"));
-   offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
-
-   /*  Read the value from system register */
-   value = usb_read8(padapter, offset);
-
-   value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
-   value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) &
- GET_PWR_CFG_MASK(pwrcfgcmd));
-
-   /*  Write the value back to system register */
-   usb_write8(padapter, offset, value);
-   break;
-   case PWR

[PATCH 7/8] staging: rtl8188eu: Hal8188EPwrSeq.h: fix lines over 80 char

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h |  411 ++--
 1 file changed, 288 insertions(+), 123 deletions(-)

diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h 
b/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
index fabb201..43db92d 100644
--- a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
+++ b/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
@@ -47,130 +47,295 @@
 
 PWR SEQ Version: rtl8188E_PwrSeq_V09.h
 */
-#defineRTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10
-#defineRTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10
-#defineRTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10
-#defineRTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10
-#defineRTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10
-#defineRTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10
-#defineRTL8188E_TRANS_ACT_TO_LPS_STEPS 15
-#defineRTL8188E_TRANS_LPS_TO_ACT_STEPS 15
-#defineRTL8188E_TRANS_END_STEPS1
-
-
-#define RTL8188E_TRANS_CARDEMU_TO_ACT  
\
-   /* format */
\
-   /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, 
comments here*/\
-   {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1
power ready*/  \
-   {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0|BIT1, 0}, /* 0x02[1:0] = 0   reset BB*/   
   \
-   {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger 
*/ \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, /* 0x04[15] = 0 disable HWPDN 
(control by DRV)*/\
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, 0}, /*0x04[12:11] = 2b'00 disable 
WL suspend*/ \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x04[8] = 1 polling until 
return 0*/   \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0}, /*wait till 0x04[8] = 0*/ \
-   {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*LDO normal mode*/ \
-   {0x0074, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*SDIO Driving*/\
-
-#define RTL8188E_TRANS_ACT_TO_CARDEMU  
\
-   /* format */
\
-   /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, 
comments here*/\
-   {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/\
-   {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*LDO Sleep mode*/   \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW 
state machine*/ \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling 
until return 0 to disable*/   \
-
-#define RTL8188E_TRANS_CARDEMU_TO_SUS  
\
-   /* format */
\
-   /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, 
comments here*/\
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, 
PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 
BIT3}, /*0x04[12:11] = 2b'01enable WL suspend*/  \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 
2b'11enable WL suspend for PCIe*/  \
-   {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, 
PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 
BIT7}, /*  0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */  \
-   {0x0041, PWR_CUT_ALL_MSK

[PATCH 6/8] staging: rtl8188eu: Rename HalPwrSeqCmd.h to pwrseqcmd.h

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/pwrseqcmd.c  |2 +-
 drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h |2 +-
 drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h   |   90 
 drivers/staging/rtl8188eu/include/pwrseqcmd.h  |   90 
 4 files changed, 92 insertions(+), 92 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
 create mode 100644 drivers/staging/rtl8188eu/include/pwrseqcmd.h

diff --git a/drivers/staging/rtl8188eu/hal/pwrseqcmd.c 
b/drivers/staging/rtl8188eu/hal/pwrseqcmd.c
index 2565d6e..be0663e 100644
--- a/drivers/staging/rtl8188eu/hal/pwrseqcmd.c
+++ b/drivers/staging/rtl8188eu/hal/pwrseqcmd.c
@@ -17,7 +17,7 @@
  *
  
**/
 
-#include 
+#include 
 #include 
 
 /* This routine deals with the Power Configuration CMDs parsing
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h 
b/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
index aebf1d3..fabb201 100644
--- a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
+++ b/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
@@ -22,7 +22,7 @@
 #ifndef __HAL8188EPWRSEQ_H__
 #define __HAL8188EPWRSEQ_H__
 
-#include "HalPwrSeqCmd.h"
+#include "pwrseqcmd.h"
 
 /*
Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd
diff --git a/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h 
b/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
deleted file mode 100644
index 980a497..000
--- a/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-#ifndef __HALPWRSEQCMD_H__
-#define __HALPWRSEQCMD_H__
-
-#include 
-
-/* The value of cmd: 4 bits */
-#define PWR_CMD_READ   0x00
-#define PWR_CMD_WRITE  0x01
-#define PWR_CMD_POLLING0x02
-#define PWR_CMD_DELAY  0x03
-#define PWR_CMD_END0x04
-
-/* The value of base: 4 bits */
-/*  define the base address of each block */
-#define PWR_BASEADDR_MAC   0x00
-#define PWR_BASEADDR_USB   0x01
-#define PWR_BASEADDR_PCIE  0x02
-#define PWR_BASEADDR_SDIO  0x03
-
-/* The value of interface_msk: 4 bits */
-#define PWR_INTF_SDIO_MSK  BIT(0)
-#define PWR_INTF_USB_MSK   BIT(1)
-#define PWR_INTF_PCI_MSK   BIT(2)
-#define PWR_INTF_ALL_MSK   (BIT(0)|BIT(1)|BIT(2)|BIT(3))
-
-/* The value of fab_msk: 4 bits */
-#define PWR_FAB_TSMC_MSK   BIT(0)
-#define PWR_FAB_UMC_MSKBIT(1)
-#define PWR_FAB_ALL_MSK(BIT(0)|BIT(1)|BIT(2)|BIT(3))
-
-/* The value of cut_msk: 8 bits */
-#define PWR_CUT_TESTCHIP_MSK   BIT(0)
-#define PWR_CUT_A_MSK  BIT(1)
-#define PWR_CUT_B_MSK  BIT(2)
-#define PWR_CUT_C_MSK  BIT(3)
-#define PWR_CUT_D_MSK  BIT(4)
-#define PWR_CUT_E_MSK  BIT(5)
-#define PWR_CUT_F_MSK  BIT(6)
-#define PWR_CUT_G_MSK  BIT(7)
-#define PWR_CUT_ALL_MSK0xFF
-
-
-enum pwrseq_cmd_delat_unit {
-   PWRSEQ_DELAY_US,
-   PWRSEQ_DELAY_MS,
-};
-
-struct wl_pwr_cfg {
-   u16 offset;
-   u8 cut_msk;
-   u8 fab_msk:4;
-   u8 interface_msk:4;
-   u8 base:4;
-   u8 cmd:4;
-   u8 msk;
-   u8 value;
-};
-
-#define GET_PWR_CFG_OFFSET(__PWR_CMD)  __PWR_CMD.offset
-#define GET_PWR_CFG_CUT_MASK(__PWR_CMD)__PWR_CMD.cut_msk
-#define GET_PWR_CFG_FAB_MASK(__PWR_CMD)__PWR_CMD.fab_msk
-#define GET_PWR_CFG_INTF_MASK(__PWR_CMD)   __PWR_CMD.interface_msk
-#define GET_PWR_CFG_BASE(__PWR_CMD)__PWR_CMD.base
-#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
-#define GET_PWR_CFG_MASK(__PWR_CMD)__PWR_CMD.msk
-#define GET_PWR_CFG_VALUE(__PWR_CMD)   __PWR_CMD.value
-
-u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
-   u8 ifacetype, struct wl_pwr_cfg pwrcfgCmd[]);
-
-#endif
diff --git a/drivers/staging/rtl8188eu/include/pwrseqcmd.h 
b/drivers/stagi

[PATCH 3/8] staging: rtl8188eu: HalPwrSeqCmd.h: Remove unnecessary comments.

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h |  108 +++---
 1 file changed, 35 insertions(+), 73 deletions(-)

diff --git a/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h 
b/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
index fc24ce4..980a497 100644
--- a/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
+++ b/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
@@ -22,77 +22,41 @@
 
 #include 
 
-/*-*/
-/* 3 The value of cmd: 4 bits */
-/*-*/
-#define PWR_CMD_READ   0x00
- /*  offset: the read register offset */
- /*  msk: the mask of the read value */
- /*  value: N/A, left by 0 */
- /*  note: dirver shall implement this function by read & msk */
-
-#define PWR_CMD_WRITE  0x01
- /*  offset: the read register offset */
- /*  msk: the mask of the write bits */
- /*  value: write value */
- /*  note: driver shall implement this cmd by read & msk after write */
-
-#define PWR_CMD_POLLING0x02
- /*  offset: the read register offset */
- /*  msk: the mask of the polled value */
- /*  value: the value to be polled, masked by the msd field. */
- /*  note: driver shall implement this cmd by */
- /*  do{ */
- /*  if ( (Read(offset) & msk) == (value & msk) ) */
- /*  break; */
- /*  } while (not timeout); */
-
-#define PWR_CMD_DELAY  0x03
- /*  offset: the value to delay */
- /*  msk: N/A */
- /*  value: the unit of delay, 0: us, 1: ms */
-
-#define PWR_CMD_END0x04
- /*  offset: N/A */
- /*  msk: N/A */
- /*  value: N/A */
-
-/*-*/
-/* 3 The value of base: 4 bits */
-/*-*/
-   /*  define the base address of each block */
-#define PWR_BASEADDR_MAC   0x00
-#define PWR_BASEADDR_USB   0x01
-#define PWR_BASEADDR_PCIE  0x02
-#define PWR_BASEADDR_SDIO  0x03
-
-/*-*/
-/* 3 The value of interface_msk: 4 bits */
-/*-*/
-#definePWR_INTF_SDIO_MSK   BIT(0)
-#definePWR_INTF_USB_MSKBIT(1)
-#definePWR_INTF_PCI_MSKBIT(2)
-#definePWR_INTF_ALL_MSK(BIT(0)|BIT(1)|BIT(2)|BIT(3))
-
-/*-*/
-/* 3 The value of fab_msk: 4 bits */
-/*-*/
-#definePWR_FAB_TSMC_MSKBIT(0)
-#definePWR_FAB_UMC_MSK BIT(1)
-#definePWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
-
-/*-*/
-/* 3 The value of cut_msk: 8 bits */
-/*-*/
-#definePWR_CUT_TESTCHIP_MSKBIT(0)
-#definePWR_CUT_A_MSK   BIT(1)
-#definePWR_CUT_B_MSK   BIT(2)
-#definePWR_CUT_C_MSK   BIT(3)
-#definePWR_CUT_D_MSK   BIT(4)
-#definePWR_CUT_E_MSK   BIT(5)
-#definePWR_CUT_F_MSK   BIT(6)
-#definePWR_CUT_G_MSK   BIT(7)
-#definePWR_CUT_ALL_MSK 0xFF
+/* The value of cmd: 4 bits */
+#define PWR_CMD_READ   0x00
+#define PWR_CMD_WRITE  0x01
+#define PWR_CMD_POLLING0x02
+#define PWR_CMD_DELAY  0x03
+#define PWR_CMD_END0x04
+
+/* The value of base: 4 bits */
+/*  define the base address of each block */
+#define PWR_BASEADDR_MAC   0x00
+#define PWR_BASEADDR_USB   0x01
+#define PWR_BASEADDR_PCIE  0x02
+#define PWR_BASEADDR_SDIO  0x03
+
+/* The value of interface_msk: 4 bits */
+#define PWR_INTF_SDIO_MSK  BIT(0)
+#define PWR_INTF_USB_MSK   BIT(1)
+#define PWR_INTF_PCI_MSK   BIT(2)
+#define PWR_INTF_ALL_MSK   (BIT(0)|BIT(1)|BIT(2)|BIT(3))
+
+/* The value of fab_msk: 4 bits */
+#define PWR_FAB_TSMC_MSK   BIT(0)
+#define PWR_FAB_UMC_MSKBIT(1)
+#define PWR_FAB_ALL_MSK(BIT(0)|BIT(1)|BIT(2)|BIT(3))
+
+/* The value of cut_msk: 8 bits */
+#define PWR_CUT_TESTCHIP_MSK   BIT(0)
+#define PWR_CUT_A_MSK  BIT(1)
+#define PWR_CUT_B_MSK  BIT(2)
+#define PWR_CUT_C_MSK  BIT(3)
+#define PWR_CUT_D_MSK  BIT(4)
+#define PWR_CUT_E_MSK  BIT(5)
+#define PWR_CUT_F_MSK  BIT(6)
+#define PWR_CUT_G_MSK  BIT(7)
+#define PWR_CUT_ALL_MSK0xFF
 
 
 enum pwrseq_cmd_delat_unit {
@@ -120,8 +84,6 @@ struct wl_pwr_cfg {
 #define GET_PWR_CFG_MASK(__PWR_CMD)__PWR_CMD.msk
 #define GET_PWR_CFG_VALUE(__PWR_CMD)   __PWR_CMD.value
 
-
-/* Prototype of pr

[PATCH 4/8] staging: rtl8188eu: Rename Hal8188EPwrSeq.c to pwrseq.c

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/Makefile |2 +-
 drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c |  102 
 drivers/staging/rtl8188eu/hal/pwrseq.c |  102 
 3 files changed, 103 insertions(+), 103 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
 create mode 100644 drivers/staging/rtl8188eu/hal/pwrseq.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index af919c3..a309451 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -23,7 +23,7 @@ r8188eu-y :=  \
hal/rf_cfg.o \
hal/HalPhyRf_8188e.o\
hal/HalPwrSeqCmd.o  \
-   hal/Hal8188EPwrSeq.o\
+   hal/pwrseq.o \
hal/Hal8188ERateAdaptive.o\
hal/hal_intf.o  \
hal/hal_com.o   \
diff --git a/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c 
b/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
deleted file mode 100644
index 4c29e63..000
--- a/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-
-#include "Hal8188EPwrSeq.h"
-#include 
-
-/*
-drivers should parse below arrays and do the corresponding actions
-*/
-/* 3 Power on  Array */
-struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS +
-RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_CARDEMU_TO_ACT
-   RTL8188E_TRANS_END
-};
-
-/* 3Radio off Array */
-struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
- RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_ACT_TO_CARDEMU
-   RTL8188E_TRANS_END
-};
-
-/* 3Card Disable Array */
-struct wl_pwr_cfg rtl8188E_card_disable_flow
-   [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
-RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_ACT_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_CARDDIS
-   RTL8188E_TRANS_END
-};
-
-/* 3 Card Enable Array */
-struct wl_pwr_cfg rtl8188E_card_enable_flow
-   [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
-RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_CARDDIS_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_ACT
-   RTL8188E_TRANS_END
-};
-
-/* 3Suspend Array */
-struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-   RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
-   RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_ACT_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_SUS
-   RTL8188E_TRANS_END
-};
-
-/* 3 Resume Array */
-struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-  RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
-  RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_SUS_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_ACT
-   RTL8188E_TRANS_END
-};
-
-/* 3HWPDN Array */
-struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
- RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
- RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_ACT_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_PDN
-   RTL8188E_TRANS_END
-};
-
-/* 3 Enter LPS */
-struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
- RTL8188E_TRANS_END_STEPS] = {
-   /* FW behavior */
-   RTL8188E_TRANS_ACT_TO_LPS
-   RTL8188E_TRANS_END
-};
-
-/* 3 Leave LPS */
-struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS +
- RTL8188E_TRANS_END_STEPS] = {
-   /* F

[PATCH 1/8] staging: rtl8188eu: Rework function HalPwrSeqCmdParsing()

2014-09-01 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c |   64 +-
 drivers/staging/rtl8188eu/hal/usb_halinit.c  |   12 +++-
 drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h |4 +-
 3 files changed, 38 insertions(+), 42 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c 
b/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
index caca535..2565d6e 100644
--- a/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
+++ b/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
@@ -15,36 +15,16 @@
  * this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  *
- *
  
**/
-/*++
-Copyright (c) Realtek Semiconductor Corp. All rights reserved.
-
-Module Name:
-   HalPwrSeqCmd.c
-
-Abstract:
-   Implement HW Power sequence configuration CMD handling routine for 
Realtek devices.
-
-Major Change History:
-   When   Who   What
-   -- ---   ---
-   2011-10-26 LucasModify to be compatible with SD4-CE driver.
-   2011-07-07 RogerCreate.
-
---*/
 
 #include 
 #include 
 
-/* Description: */
-/* This routine deals with the Power Configuration CMDs parsing
- * for RTL8723/RTL8188E Series IC.
- * Assumption:
- * We should follow specific format which was released from HW SD.
+/* This routine deals with the Power Configuration CMDs parsing
+ * for RTL8723/RTL8188E Series IC.
  */
-u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
-  u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[])
+u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
+   u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[])
 {
struct wl_pwr_cfg pwrcfgcmd = {0};
u8 poll_bit = false;
@@ -58,7 +38,9 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, 
u8 fab_vers,
pwrcfgcmd = pwrseqcmd[aryidx];
 
RT_TRACE(_module_hal_init_c_ , _drv_info_,
-("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) 
fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n",
+("rtl88eu_pwrseqcmdparsing: offset(%#x) cut_msk(%#x)"
+ "fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x)"
+ "msk(%#x) value(%#x)\n",
 GET_PWR_CFG_OFFSET(pwrcfgcmd),
 GET_PWR_CFG_CUT_MASK(pwrcfgcmd),
 GET_PWR_CFG_FAB_MASK(pwrcfgcmd),
@@ -68,37 +50,42 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 
cut_vers, u8 fab_vers,
 GET_PWR_CFG_MASK(pwrcfgcmd),
 GET_PWR_CFG_VALUE(pwrcfgcmd)));
 
-   /* 2 Only Handle the command whose FAB, CUT, and Interface are 
matched */
+   /* Only Handle the command whose FAB, CUT, and Interface are 
matched */
if ((GET_PWR_CFG_FAB_MASK(pwrcfgcmd) & fab_vers) &&
(GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) &&
(GET_PWR_CFG_INTF_MASK(pwrcfgcmd) & ifacetype)) {
switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
case PWR_CMD_READ:
-   RT_TRACE(_module_hal_init_c_ , _drv_info_, 
("HalPwrSeqCmdParsing: PWR_CMD_READ\n"));
+   RT_TRACE(_module_hal_init_c_, _drv_info_,
+("rtl88eu_pwrseqcmdparsing: 
PWR_CMD_READ\n"));
break;
case PWR_CMD_WRITE:
-   RT_TRACE(_module_hal_init_c_ , _drv_info_, 
("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
+   RT_TRACE(_module_hal_init_c_, _drv_info_,
+("rtl88eu_pwrseqcmdparsing: 
PWR_CMD_WRITE\n"));
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
 
/*  Read the value from system register */
value = usb_read8(padapter, offset);
 
value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
-   value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & 
GET_PWR_CFG_MASK(pwrcfgcmd));
+   value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) &
+ GET_PWR_CFG_MASK(pwrcfgcmd));
 
/*  Write the value back to system register */
usb_write8(padapter, offset, value);
break;

[PATCH 1/8] staging: rtl8188eu: Rework function HalPwrSeqCmdParsing()

2014-09-01 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c |   64 +-
 drivers/staging/rtl8188eu/hal/usb_halinit.c  |   12 +++-
 drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h |4 +-
 3 files changed, 38 insertions(+), 42 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c 
b/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
index caca535..2565d6e 100644
--- a/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
+++ b/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
@@ -15,36 +15,16 @@
  * this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  *
- *
  
**/
-/*++
-Copyright (c) Realtek Semiconductor Corp. All rights reserved.
-
-Module Name:
-   HalPwrSeqCmd.c
-
-Abstract:
-   Implement HW Power sequence configuration CMD handling routine for 
Realtek devices.
-
-Major Change History:
-   When   Who   What
-   -- ---   ---
-   2011-10-26 LucasModify to be compatible with SD4-CE driver.
-   2011-07-07 RogerCreate.
-
---*/
 
 #include HalPwrSeqCmd.h
 #include usb_ops_linux.h
 
-/* Description: */
-/* This routine deals with the Power Configuration CMDs parsing
- * for RTL8723/RTL8188E Series IC.
- * Assumption:
- * We should follow specific format which was released from HW SD.
+/* This routine deals with the Power Configuration CMDs parsing
+ * for RTL8723/RTL8188E Series IC.
  */
-u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
-  u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[])
+u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
+   u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[])
 {
struct wl_pwr_cfg pwrcfgcmd = {0};
u8 poll_bit = false;
@@ -58,7 +38,9 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, 
u8 fab_vers,
pwrcfgcmd = pwrseqcmd[aryidx];
 
RT_TRACE(_module_hal_init_c_ , _drv_info_,
-(HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) 
fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n,
+(rtl88eu_pwrseqcmdparsing: offset(%#x) cut_msk(%#x)
+ fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x)
+ msk(%#x) value(%#x)\n,
 GET_PWR_CFG_OFFSET(pwrcfgcmd),
 GET_PWR_CFG_CUT_MASK(pwrcfgcmd),
 GET_PWR_CFG_FAB_MASK(pwrcfgcmd),
@@ -68,37 +50,42 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 
cut_vers, u8 fab_vers,
 GET_PWR_CFG_MASK(pwrcfgcmd),
 GET_PWR_CFG_VALUE(pwrcfgcmd)));
 
-   /* 2 Only Handle the command whose FAB, CUT, and Interface are 
matched */
+   /* Only Handle the command whose FAB, CUT, and Interface are 
matched */
if ((GET_PWR_CFG_FAB_MASK(pwrcfgcmd)  fab_vers) 
(GET_PWR_CFG_CUT_MASK(pwrcfgcmd)  cut_vers) 
(GET_PWR_CFG_INTF_MASK(pwrcfgcmd)  ifacetype)) {
switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
case PWR_CMD_READ:
-   RT_TRACE(_module_hal_init_c_ , _drv_info_, 
(HalPwrSeqCmdParsing: PWR_CMD_READ\n));
+   RT_TRACE(_module_hal_init_c_, _drv_info_,
+(rtl88eu_pwrseqcmdparsing: 
PWR_CMD_READ\n));
break;
case PWR_CMD_WRITE:
-   RT_TRACE(_module_hal_init_c_ , _drv_info_, 
(HalPwrSeqCmdParsing: PWR_CMD_WRITE\n));
+   RT_TRACE(_module_hal_init_c_, _drv_info_,
+(rtl88eu_pwrseqcmdparsing: 
PWR_CMD_WRITE\n));
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
 
/*  Read the value from system register */
value = usb_read8(padapter, offset);
 
value = ~(GET_PWR_CFG_MASK(pwrcfgcmd));
-   value |= (GET_PWR_CFG_VALUE(pwrcfgcmd)  
GET_PWR_CFG_MASK(pwrcfgcmd));
+   value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) 
+ GET_PWR_CFG_MASK(pwrcfgcmd));
 
/*  Write the value back to system register */
usb_write8(padapter, offset, value);
break;
case PWR_CMD_POLLING:
-   RT_TRACE(_module_hal_init_c_

[PATCH 6/8] staging: rtl8188eu: Rename HalPwrSeqCmd.h to pwrseqcmd.h

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/pwrseqcmd.c  |2 +-
 drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h |2 +-
 drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h   |   90 
 drivers/staging/rtl8188eu/include/pwrseqcmd.h  |   90 
 4 files changed, 92 insertions(+), 92 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
 create mode 100644 drivers/staging/rtl8188eu/include/pwrseqcmd.h

diff --git a/drivers/staging/rtl8188eu/hal/pwrseqcmd.c 
b/drivers/staging/rtl8188eu/hal/pwrseqcmd.c
index 2565d6e..be0663e 100644
--- a/drivers/staging/rtl8188eu/hal/pwrseqcmd.c
+++ b/drivers/staging/rtl8188eu/hal/pwrseqcmd.c
@@ -17,7 +17,7 @@
  *
  
**/
 
-#include HalPwrSeqCmd.h
+#include pwrseqcmd.h
 #include usb_ops_linux.h
 
 /* This routine deals with the Power Configuration CMDs parsing
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h 
b/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
index aebf1d3..fabb201 100644
--- a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
+++ b/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
@@ -22,7 +22,7 @@
 #ifndef __HAL8188EPWRSEQ_H__
 #define __HAL8188EPWRSEQ_H__
 
-#include HalPwrSeqCmd.h
+#include pwrseqcmd.h
 
 /*
Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd
diff --git a/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h 
b/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
deleted file mode 100644
index 980a497..000
--- a/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-#ifndef __HALPWRSEQCMD_H__
-#define __HALPWRSEQCMD_H__
-
-#include drv_types.h
-
-/* The value of cmd: 4 bits */
-#define PWR_CMD_READ   0x00
-#define PWR_CMD_WRITE  0x01
-#define PWR_CMD_POLLING0x02
-#define PWR_CMD_DELAY  0x03
-#define PWR_CMD_END0x04
-
-/* The value of base: 4 bits */
-/*  define the base address of each block */
-#define PWR_BASEADDR_MAC   0x00
-#define PWR_BASEADDR_USB   0x01
-#define PWR_BASEADDR_PCIE  0x02
-#define PWR_BASEADDR_SDIO  0x03
-
-/* The value of interface_msk: 4 bits */
-#define PWR_INTF_SDIO_MSK  BIT(0)
-#define PWR_INTF_USB_MSK   BIT(1)
-#define PWR_INTF_PCI_MSK   BIT(2)
-#define PWR_INTF_ALL_MSK   (BIT(0)|BIT(1)|BIT(2)|BIT(3))
-
-/* The value of fab_msk: 4 bits */
-#define PWR_FAB_TSMC_MSK   BIT(0)
-#define PWR_FAB_UMC_MSKBIT(1)
-#define PWR_FAB_ALL_MSK(BIT(0)|BIT(1)|BIT(2)|BIT(3))
-
-/* The value of cut_msk: 8 bits */
-#define PWR_CUT_TESTCHIP_MSK   BIT(0)
-#define PWR_CUT_A_MSK  BIT(1)
-#define PWR_CUT_B_MSK  BIT(2)
-#define PWR_CUT_C_MSK  BIT(3)
-#define PWR_CUT_D_MSK  BIT(4)
-#define PWR_CUT_E_MSK  BIT(5)
-#define PWR_CUT_F_MSK  BIT(6)
-#define PWR_CUT_G_MSK  BIT(7)
-#define PWR_CUT_ALL_MSK0xFF
-
-
-enum pwrseq_cmd_delat_unit {
-   PWRSEQ_DELAY_US,
-   PWRSEQ_DELAY_MS,
-};
-
-struct wl_pwr_cfg {
-   u16 offset;
-   u8 cut_msk;
-   u8 fab_msk:4;
-   u8 interface_msk:4;
-   u8 base:4;
-   u8 cmd:4;
-   u8 msk;
-   u8 value;
-};
-
-#define GET_PWR_CFG_OFFSET(__PWR_CMD)  __PWR_CMD.offset
-#define GET_PWR_CFG_CUT_MASK(__PWR_CMD)__PWR_CMD.cut_msk
-#define GET_PWR_CFG_FAB_MASK(__PWR_CMD)__PWR_CMD.fab_msk
-#define GET_PWR_CFG_INTF_MASK(__PWR_CMD)   __PWR_CMD.interface_msk
-#define GET_PWR_CFG_BASE(__PWR_CMD)__PWR_CMD.base
-#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
-#define GET_PWR_CFG_MASK(__PWR_CMD)__PWR_CMD.msk
-#define GET_PWR_CFG_VALUE(__PWR_CMD)   __PWR_CMD.value
-
-u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
-   u8 ifacetype, struct wl_pwr_cfg pwrcfgCmd[]);
-
-#endif
diff --git a/drivers/staging

[PATCH 3/8] staging: rtl8188eu: HalPwrSeqCmd.h: Remove unnecessary comments.

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h |  108 +++---
 1 file changed, 35 insertions(+), 73 deletions(-)

diff --git a/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h 
b/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
index fc24ce4..980a497 100644
--- a/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
+++ b/drivers/staging/rtl8188eu/include/HalPwrSeqCmd.h
@@ -22,77 +22,41 @@
 
 #include drv_types.h
 
-/*-*/
-/* 3 The value of cmd: 4 bits */
-/*-*/
-#define PWR_CMD_READ   0x00
- /*  offset: the read register offset */
- /*  msk: the mask of the read value */
- /*  value: N/A, left by 0 */
- /*  note: dirver shall implement this function by read  msk */
-
-#define PWR_CMD_WRITE  0x01
- /*  offset: the read register offset */
- /*  msk: the mask of the write bits */
- /*  value: write value */
- /*  note: driver shall implement this cmd by read  msk after write */
-
-#define PWR_CMD_POLLING0x02
- /*  offset: the read register offset */
- /*  msk: the mask of the polled value */
- /*  value: the value to be polled, masked by the msd field. */
- /*  note: driver shall implement this cmd by */
- /*  do{ */
- /*  if ( (Read(offset)  msk) == (value  msk) ) */
- /*  break; */
- /*  } while (not timeout); */
-
-#define PWR_CMD_DELAY  0x03
- /*  offset: the value to delay */
- /*  msk: N/A */
- /*  value: the unit of delay, 0: us, 1: ms */
-
-#define PWR_CMD_END0x04
- /*  offset: N/A */
- /*  msk: N/A */
- /*  value: N/A */
-
-/*-*/
-/* 3 The value of base: 4 bits */
-/*-*/
-   /*  define the base address of each block */
-#define PWR_BASEADDR_MAC   0x00
-#define PWR_BASEADDR_USB   0x01
-#define PWR_BASEADDR_PCIE  0x02
-#define PWR_BASEADDR_SDIO  0x03
-
-/*-*/
-/* 3 The value of interface_msk: 4 bits */
-/*-*/
-#definePWR_INTF_SDIO_MSK   BIT(0)
-#definePWR_INTF_USB_MSKBIT(1)
-#definePWR_INTF_PCI_MSKBIT(2)
-#definePWR_INTF_ALL_MSK(BIT(0)|BIT(1)|BIT(2)|BIT(3))
-
-/*-*/
-/* 3 The value of fab_msk: 4 bits */
-/*-*/
-#definePWR_FAB_TSMC_MSKBIT(0)
-#definePWR_FAB_UMC_MSK BIT(1)
-#definePWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
-
-/*-*/
-/* 3 The value of cut_msk: 8 bits */
-/*-*/
-#definePWR_CUT_TESTCHIP_MSKBIT(0)
-#definePWR_CUT_A_MSK   BIT(1)
-#definePWR_CUT_B_MSK   BIT(2)
-#definePWR_CUT_C_MSK   BIT(3)
-#definePWR_CUT_D_MSK   BIT(4)
-#definePWR_CUT_E_MSK   BIT(5)
-#definePWR_CUT_F_MSK   BIT(6)
-#definePWR_CUT_G_MSK   BIT(7)
-#definePWR_CUT_ALL_MSK 0xFF
+/* The value of cmd: 4 bits */
+#define PWR_CMD_READ   0x00
+#define PWR_CMD_WRITE  0x01
+#define PWR_CMD_POLLING0x02
+#define PWR_CMD_DELAY  0x03
+#define PWR_CMD_END0x04
+
+/* The value of base: 4 bits */
+/*  define the base address of each block */
+#define PWR_BASEADDR_MAC   0x00
+#define PWR_BASEADDR_USB   0x01
+#define PWR_BASEADDR_PCIE  0x02
+#define PWR_BASEADDR_SDIO  0x03
+
+/* The value of interface_msk: 4 bits */
+#define PWR_INTF_SDIO_MSK  BIT(0)
+#define PWR_INTF_USB_MSK   BIT(1)
+#define PWR_INTF_PCI_MSK   BIT(2)
+#define PWR_INTF_ALL_MSK   (BIT(0)|BIT(1)|BIT(2)|BIT(3))
+
+/* The value of fab_msk: 4 bits */
+#define PWR_FAB_TSMC_MSK   BIT(0)
+#define PWR_FAB_UMC_MSKBIT(1)
+#define PWR_FAB_ALL_MSK(BIT(0)|BIT(1)|BIT(2)|BIT(3))
+
+/* The value of cut_msk: 8 bits */
+#define PWR_CUT_TESTCHIP_MSK   BIT(0)
+#define PWR_CUT_A_MSK  BIT(1)
+#define PWR_CUT_B_MSK  BIT(2)
+#define PWR_CUT_C_MSK  BIT(3)
+#define PWR_CUT_D_MSK  BIT(4)
+#define PWR_CUT_E_MSK  BIT(5)
+#define PWR_CUT_F_MSK  BIT(6)
+#define PWR_CUT_G_MSK  BIT(7)
+#define PWR_CUT_ALL_MSK0xFF
 
 
 enum pwrseq_cmd_delat_unit {
@@ -120,8 +84,6 @@ struct wl_pwr_cfg {
 #define GET_PWR_CFG_MASK(__PWR_CMD)__PWR_CMD.msk
 #define GET_PWR_CFG_VALUE(__PWR_CMD)   __PWR_CMD.value

[PATCH 4/8] staging: rtl8188eu: Rename Hal8188EPwrSeq.c to pwrseq.c

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/Makefile |2 +-
 drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c |  102 
 drivers/staging/rtl8188eu/hal/pwrseq.c |  102 
 3 files changed, 103 insertions(+), 103 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
 create mode 100644 drivers/staging/rtl8188eu/hal/pwrseq.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index af919c3..a309451 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -23,7 +23,7 @@ r8188eu-y :=  \
hal/rf_cfg.o \
hal/HalPhyRf_8188e.o\
hal/HalPwrSeqCmd.o  \
-   hal/Hal8188EPwrSeq.o\
+   hal/pwrseq.o \
hal/Hal8188ERateAdaptive.o\
hal/hal_intf.o  \
hal/hal_com.o   \
diff --git a/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c 
b/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
deleted file mode 100644
index 4c29e63..000
--- a/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-
-#include Hal8188EPwrSeq.h
-#include rtl8188e_hal.h
-
-/*
-drivers should parse below arrays and do the corresponding actions
-*/
-/* 3 Power on  Array */
-struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS +
-RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_CARDEMU_TO_ACT
-   RTL8188E_TRANS_END
-};
-
-/* 3Radio off Array */
-struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
- RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_ACT_TO_CARDEMU
-   RTL8188E_TRANS_END
-};
-
-/* 3Card Disable Array */
-struct wl_pwr_cfg rtl8188E_card_disable_flow
-   [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
-RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_ACT_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_CARDDIS
-   RTL8188E_TRANS_END
-};
-
-/* 3 Card Enable Array */
-struct wl_pwr_cfg rtl8188E_card_enable_flow
-   [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
-RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_CARDDIS_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_ACT
-   RTL8188E_TRANS_END
-};
-
-/* 3Suspend Array */
-struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-   RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
-   RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_ACT_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_SUS
-   RTL8188E_TRANS_END
-};
-
-/* 3 Resume Array */
-struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-  RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
-  RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_SUS_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_ACT
-   RTL8188E_TRANS_END
-};
-
-/* 3HWPDN Array */
-struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
- RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
- RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_ACT_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_PDN
-   RTL8188E_TRANS_END
-};
-
-/* 3 Enter LPS */
-struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
- RTL8188E_TRANS_END_STEPS] = {
-   /* FW behavior */
-   RTL8188E_TRANS_ACT_TO_LPS
-   RTL8188E_TRANS_END
-};
-
-/* 3 Leave LPS */
-struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS +
- RTL8188E_TRANS_END_STEPS

[PATCH 5/8] staging: rtl8188eu: Rename HalPwrSeqCmd.c to pwrseqcmd.c

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/Makefile   |2 +-
 drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c |  123 --
 drivers/staging/rtl8188eu/hal/pwrseqcmd.c|  123 ++
 3 files changed, 124 insertions(+), 124 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
 create mode 100644 drivers/staging/rtl8188eu/hal/pwrseqcmd.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index a309451..8723794 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -22,7 +22,7 @@ r8188eu-y :=  \
hal/bb_cfg.o \
hal/rf_cfg.o \
hal/HalPhyRf_8188e.o\
-   hal/HalPwrSeqCmd.o  \
+   hal/pwrseqcmd.o \
hal/pwrseq.o \
hal/Hal8188ERateAdaptive.o\
hal/hal_intf.o  \
diff --git a/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c 
b/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
deleted file mode 100644
index 2565d6e..000
--- a/drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- 
**/
-
-#include HalPwrSeqCmd.h
-#include usb_ops_linux.h
-
-/* This routine deals with the Power Configuration CMDs parsing
- * for RTL8723/RTL8188E Series IC.
- */
-u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
-   u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[])
-{
-   struct wl_pwr_cfg pwrcfgcmd = {0};
-   u8 poll_bit = false;
-   u32 aryidx = 0;
-   u8 value = 0;
-   u32 offset = 0;
-   u32 poll_count = 0; /*  polling autoload done. */
-   u32 max_poll_count = 5000;
-
-   do {
-   pwrcfgcmd = pwrseqcmd[aryidx];
-
-   RT_TRACE(_module_hal_init_c_ , _drv_info_,
-(rtl88eu_pwrseqcmdparsing: offset(%#x) cut_msk(%#x)
- fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x)
- msk(%#x) value(%#x)\n,
-GET_PWR_CFG_OFFSET(pwrcfgcmd),
-GET_PWR_CFG_CUT_MASK(pwrcfgcmd),
-GET_PWR_CFG_FAB_MASK(pwrcfgcmd),
-GET_PWR_CFG_INTF_MASK(pwrcfgcmd),
-GET_PWR_CFG_BASE(pwrcfgcmd),
-GET_PWR_CFG_CMD(pwrcfgcmd),
-GET_PWR_CFG_MASK(pwrcfgcmd),
-GET_PWR_CFG_VALUE(pwrcfgcmd)));
-
-   /* Only Handle the command whose FAB, CUT, and Interface are 
matched */
-   if ((GET_PWR_CFG_FAB_MASK(pwrcfgcmd)  fab_vers) 
-   (GET_PWR_CFG_CUT_MASK(pwrcfgcmd)  cut_vers) 
-   (GET_PWR_CFG_INTF_MASK(pwrcfgcmd)  ifacetype)) {
-   switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
-   case PWR_CMD_READ:
-   RT_TRACE(_module_hal_init_c_, _drv_info_,
-(rtl88eu_pwrseqcmdparsing: 
PWR_CMD_READ\n));
-   break;
-   case PWR_CMD_WRITE:
-   RT_TRACE(_module_hal_init_c_, _drv_info_,
-(rtl88eu_pwrseqcmdparsing: 
PWR_CMD_WRITE\n));
-   offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
-
-   /*  Read the value from system register */
-   value = usb_read8(padapter, offset);
-
-   value = ~(GET_PWR_CFG_MASK(pwrcfgcmd));
-   value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) 
- GET_PWR_CFG_MASK(pwrcfgcmd));
-
-   /*  Write the value back to system register */
-   usb_write8(padapter, offset, value);
-   break;
-   case PWR_CMD_POLLING:
-   RT_TRACE

[PATCH 7/8] staging: rtl8188eu: Hal8188EPwrSeq.h: fix lines over 80 char

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h |  411 ++--
 1 file changed, 288 insertions(+), 123 deletions(-)

diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h 
b/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
index fabb201..43db92d 100644
--- a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
+++ b/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
@@ -47,130 +47,295 @@
 
 PWR SEQ Version: rtl8188E_PwrSeq_V09.h
 */
-#defineRTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10
-#defineRTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10
-#defineRTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10
-#defineRTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10
-#defineRTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10
-#defineRTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10
-#defineRTL8188E_TRANS_ACT_TO_LPS_STEPS 15
-#defineRTL8188E_TRANS_LPS_TO_ACT_STEPS 15
-#defineRTL8188E_TRANS_END_STEPS1
-
-
-#define RTL8188E_TRANS_CARDEMU_TO_ACT  
\
-   /* format */
\
-   /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, 
comments here*/\
-   {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1
power ready*/  \
-   {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0|BIT1, 0}, /* 0x02[1:0] = 0   reset BB*/   
   \
-   {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger 
*/ \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, /* 0x04[15] = 0 disable HWPDN 
(control by DRV)*/\
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, 0}, /*0x04[12:11] = 2b'00 disable 
WL suspend*/ \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x04[8] = 1 polling until 
return 0*/   \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0}, /*wait till 0x04[8] = 0*/ \
-   {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*LDO normal mode*/ \
-   {0x0074, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*SDIO Driving*/\
-
-#define RTL8188E_TRANS_ACT_TO_CARDEMU  
\
-   /* format */
\
-   /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, 
comments here*/\
-   {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/\
-   {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*LDO Sleep mode*/   \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW 
state machine*/ \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling 
until return 0 to disable*/   \
-
-#define RTL8188E_TRANS_CARDEMU_TO_SUS  
\
-   /* format */
\
-   /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, 
comments here*/\
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, 
PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 
BIT3}, /*0x04[12:11] = 2b'01enable WL suspend*/  \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, 
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 
2b'11enable WL suspend for PCIe*/  \
-   {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, 
PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 
BIT7}, /*  0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */  \
-   {0x0041

[PATCH 2/8] staging: rtl8188eu: Hal8188EPwrSeq.c: fix lines over 80 characters.

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c |   46 
 1 file changed, 31 insertions(+), 15 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c 
b/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
index fc23bf1..4c29e63 100644
--- a/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
+++ b/drivers/staging/rtl8188eu/hal/Hal8188EPwrSeq.c
@@ -25,61 +25,77 @@
 drivers should parse below arrays and do the corresponding actions
 */
 /* 3 Power on  Array */
-struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + 
RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS +
+RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
 };
 
 /* 3Radio off Array */
-struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 
+ RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+ RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_END
 };
 
 /* 3Card Disable Array */
-struct wl_pwr_cfg 
rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + 
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_ACT_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_CARDDIS
-   RTL8188E_TRANS_END
+struct wl_pwr_cfg rtl8188E_card_disable_flow
+   [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
+RTL8188E_TRANS_END_STEPS] = {
+   RTL8188E_TRANS_ACT_TO_CARDEMU
+   RTL8188E_TRANS_CARDEMU_TO_CARDDIS
+   RTL8188E_TRANS_END
 };
 
 /* 3 Card Enable Array */
-struct wl_pwr_cfg 
rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + 
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
-   RTL8188E_TRANS_CARDDIS_TO_CARDEMU
-   RTL8188E_TRANS_CARDEMU_TO_ACT
-   RTL8188E_TRANS_END
+struct wl_pwr_cfg rtl8188E_card_enable_flow
+   [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
+RTL8188E_TRANS_END_STEPS] = {
+   RTL8188E_TRANS_CARDDIS_TO_CARDEMU
+   RTL8188E_TRANS_CARDEMU_TO_ACT
+   RTL8188E_TRANS_END
 };
 
 /* 3Suspend Array */
-struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + 
RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+   RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
+   RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_SUS
RTL8188E_TRANS_END
 };
 
 /* 3 Resume Array */
-struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + 
RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+  RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
+  RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_SUS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
 };
 
 /* 3HWPDN Array */
-struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + 
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
+ RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
+ RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_PDN
RTL8188E_TRANS_END
 };
 
 /* 3 Enter LPS */
-struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + 
RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
+ RTL8188E_TRANS_END_STEPS] = {
/* FW behavior */
RTL8188E_TRANS_ACT_TO_LPS
RTL8188E_TRANS_END
 };
 
 /* 3 Leave LPS */
-struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + 
RTL8188E_TRANS_END_STEPS] = {
+struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS +
+ RTL8188E_TRANS_END_STEPS] = {
/* FW behavior */
RTL8188E_TRANS_LPS_TO_ACT
RTL8188E_TRANS_END
-- 
1.7.10.4

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[PATCH 8/8] staging: rtl8188eu: Rename Hal8188EPwrSeq.h to pwrseq.h

2014-09-01 Thread navin patidar


Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/pwrseq.c |2 +-
 drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h |  341 
 drivers/staging/rtl8188eu/include/pwrseq.h |  341 
 drivers/staging/rtl8188eu/include/rtl8188e_hal.h   |2 +-
 4 files changed, 343 insertions(+), 343 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
 create mode 100644 drivers/staging/rtl8188eu/include/pwrseq.h

diff --git a/drivers/staging/rtl8188eu/hal/pwrseq.c 
b/drivers/staging/rtl8188eu/hal/pwrseq.c
index 4c29e63..20dce42 100644
--- a/drivers/staging/rtl8188eu/hal/pwrseq.c
+++ b/drivers/staging/rtl8188eu/hal/pwrseq.c
@@ -18,7 +18,7 @@
  *
  
**/
 
-#include Hal8188EPwrSeq.h
+#include pwrseq.h
 #include rtl8188e_hal.h
 
 /*
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h 
b/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
deleted file mode 100644
index 43db92d..000
--- a/drivers/staging/rtl8188eu/include/Hal8188EPwrSeq.h
+++ /dev/null
@@ -1,341 +0,0 @@
-
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-
-#ifndef __HAL8188EPWRSEQ_H__
-#define __HAL8188EPWRSEQ_H__
-
-#include pwrseqcmd.h
-
-/*
-   Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd
-   There are 6 HW Power States:
-   0: POFF--Power Off
-   1: PDN--Power Down
-   2: CARDEMU--Card Emulation
-   3: ACT--Active Mode
-   4: LPS--Low Power State
-   5: SUS--Suspend
-
-   The transision from different states are defined below
-   TRANS_CARDEMU_TO_ACT
-   TRANS_ACT_TO_CARDEMU
-   TRANS_CARDEMU_TO_SUS
-   TRANS_SUS_TO_CARDEMU
-   TRANS_CARDEMU_TO_PDN
-   TRANS_ACT_TO_LPS
-   TRANS_LPS_TO_ACT
-
-   TRANS_END
-
-PWR SEQ Version: rtl8188E_PwrSeq_V09.h
-*/
-#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS10
-#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS10
-#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS10
-#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS10
-#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS10
-#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS10
-#define RTL8188E_TRANS_ACT_TO_LPS_STEPS15
-#define RTL8188E_TRANS_LPS_TO_ACT_STEPS15
-#define RTL8188E_TRANS_END_STEPS   1
-
-
-#define RTL8188E_TRANS_CARDEMU_TO_ACT  \
-   /* format
-* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value
-* },
-* comment here
-*/ \
-   {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1}, \
-   /* wait till 0x04[17] = 1power ready*/  \
-   {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0|BIT1, 0}, \
-   /* 0x02[1:0] = 0reset BB*/  \
-   {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},   \
-   /*0x24[23] = 2b'01 schmit trigger */\
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},  \
-   /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, 0}, \
-   /*0x04[12:11] = 2b'00 disable WL suspend*/  \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},   \
-   /*0x04[8] = 1 polling until return 0*/  \
-   {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\
-   PWR_BASEADDR_MAC, PWR_CMD_POLLING

[PATCH 7/9] staging: rtl8188eu: Remove file rtl8188e_rf.h

2014-08-31 Thread navin patidar

Move macros from rtl8188e_rf.h to rf.h and then remove rtl8188e_rf.h .

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c  |1 +
 drivers/staging/rtl8188eu/include/rf.h   |3 ++
 drivers/staging/rtl8188eu/include/rtl8188e_hal.h |1 -
 drivers/staging/rtl8188eu/include/rtl8188e_rf.h  |   32 --
 4 files changed, 4 insertions(+), 33 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/include/rtl8188e_rf.h

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 79a329d..6ae22b0 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
diff --git a/drivers/staging/rtl8188eu/include/rf.h 
b/drivers/staging/rtl8188eu/include/rf.h
index 3b97ee3..98a5551 100644
--- a/drivers/staging/rtl8188eu/include/rf.h
+++ b/drivers/staging/rtl8188eu/include/rf.h
@@ -1,3 +1,6 @@
+#define RF6052_MAX_TX_PWR  0x3F
+#define RF6052_MAX_REG 0x3F
+
 void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
  enum ht_channel_width bandwidth);
 void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt,
diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h 
b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
index 814ba1a..f5abe01 100644
--- a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
+++ b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
@@ -25,7 +25,6 @@
 #include "rtl8188e_spec.h"
 #include "Hal8188EPhyReg.h"
 #include "Hal8188EPhyCfg.h"
-#include "rtl8188e_rf.h"
 #include "rtl8188e_dm.h"
 #include "rtl8188e_recv.h"
 #include "rtl8188e_xmit.h"
diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_rf.h 
b/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
deleted file mode 100644
index 445f123..000
--- a/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-#ifndef __RTL8188E_RF_H__
-#define __RTL8188E_RF_H__
-
-#defineRF6052_MAX_TX_PWR   0x3F
-#defineRF6052_MAX_REG  0x3F
-#defineRF6052_MAX_PATH 2
-
-
-void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate);
-void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
-enum ht_channel_width Bandwidth);
-
-#endif/* __RTL8188E_RF_H__ */
-- 
1.7.10.4

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[PATCH 6/9] staging: rtl8188eu: Rework function get_rx_power_val_by_reg()

2014-08-31 Thread navin patidar

Rename CamelCase variables.
Remove block of the code which is specific to the bluetooth.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |   92 +++
 1 file changed, 45 insertions(+), 47 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 7797b38..79a329d 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -154,65 +154,66 @@ static void getpowerbase88e(struct adapter *adapt, u8 
*pwr_level_ofdm,
*(mcs_base+i) = powerbase1;
}
 }
-static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
-   u8 index, u32 *powerBase0, u32 *powerBase1,
-   u32 *pOutWriteVal)
+static void get_rx_power_val_by_reg(struct adapter *adapt, u8 channel,
+   u8 index, u32 *powerbase0, u32 *powerbase1,
+   u32 *out_val)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
-   struct dm_priv  *pdmpriv = >dmpriv;
-   u8  i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
-   s8  pwr_diff = 0;
-   u32 writeVal, customer_limit, rf;
-   u8  Regulatory = pHalData->EEPROMRegulatory;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   struct dm_priv  *pdmpriv = _data->dmpriv;
+   u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
+   s8 pwr_diff = 0;
+   u32 write_val, customer_limit, rf;
+   u8 regulatory = hal_data->EEPROMRegulatory;
 
/*  Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate */
 
for (rf = 0; rf < 2; rf++) {
-   switch (Regulatory) {
-   case 0: /*  Realtek better performance */
-   /*  increase power diff defined by Realtek for 
large power */
+   u8 j = index + (rf ? 8 : 0);
+
+   switch (regulatory) {
+   case 0:
chnlGroup = 0;
-   writeVal = 
pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
-   ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
+   write_val = 
hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
+   ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
-   case 1: /*  Realtek regulatory */
+   case 1: /*  Realtek regulatory */
/*  increase power diff defined by Realtek for 
regulatory */
-   if (pHalData->pwrGroupCnt == 1)
+   if (hal_data->pwrGroupCnt == 1)
chnlGroup = 0;
-   if (pHalData->pwrGroupCnt >= pHalData->PGMaxGroup) {
-   if (Channel < 3)/*  
Channel 1-2 */
+   if (hal_data->pwrGroupCnt >= hal_data->PGMaxGroup) {
+   if (channel < 3)
chnlGroup = 0;
-   else if (Channel < 6)   /*  Channel 3-5 
*/
+   else if (channel < 6)
chnlGroup = 1;
-   else if (Channel < 9)   /*  
Channel 6-8 */
+   else if (channel < 9)
chnlGroup = 2;
-   else if (Channel < 12)  /*  Channel 
9-11 */
+   else if (channel < 12)
chnlGroup = 3;
-   else if (Channel < 14)  /*  Channel 
12-13 */
+   else if (channel < 14)
chnlGroup = 4;
-   else if (Channel == 14) /*  Channel 14 
*/
+   else if (channel == 14)
chnlGroup = 5;
}
-   writeVal = 
pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
-   ((index < 2) ? powerBase0[rf] : 
powerBase1[rf]);
+   write_val = 
hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
+   ((index < 2) ? powerbase0[rf] : 
powerbase1[rf]);
break;
case 2: /*  Better regulatory */
/*  don't increase any power diff */
-   writeVal = ((index < 2) ? powerBase0[rf] : 
powerBase1[rf]);
+

[PATCH 2/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetCckTxPower()

2014-08-31 Thread navin patidar

Rename CamelCase variables and function name.
Remove redundant variable TurboScanOff.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/phy.c |2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |  124 ---
 drivers/staging/rtl8188eu/include/rf.h  |2 +
 drivers/staging/rtl8188eu/include/rtl8188e_rf.h |1 -
 4 files changed, 48 insertions(+), 81 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/phy.c 
b/drivers/staging/rtl8188eu/hal/phy.c
index b67b91e..a918dfa 100644
--- a/drivers/staging/rtl8188eu/hal/phy.c
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -237,7 +237,7 @@ void phy_set_tx_power_level(struct adapter *adapt, u8 
channel)
phy_power_index_check(adapt, channel, _pwr[0], _pwr[0],
  _pwr[0], _pwr[0]);
 
-   rtl8188e_PHY_RF6052SetCckTxPower(adapt, _pwr[0]);
+   rtl88eu_phy_rf6052_set_cck_txpower(adapt, _pwr[0]);
rtl8188e_PHY_RF6052SetOFDMTxPower(adapt, _pwr[0], _pwr[0],
  _pwr[0], channel);
 }
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index bd90068..8959ac3 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -45,119 +45,85 @@ void rtl88eu_phy_rf6052_set_bandwidth(struct adapter 
*adapt,
}
 }
 
-/*-
- * Function:   PHY_RF6052SetCckTxPower
- *
- * Overview:
- *
- * Input:   NONE
- *
- * Output:  NONE
- *
- * Return:  NONE
- *
- * Revised History:
- * WhenWho Remark
- * 11/05/2008  MHC Simulate 8192series..
- *
- *---*/
-
-void
-rtl8188e_PHY_RF6052SetCckTxPower(
-   struct adapter *Adapter,
-   u8 *pPowerlevel)
+void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
-   struct dm_priv *pdmpriv = >dmpriv;
-   struct mlme_ext_priv *pmlmeext = >mlmeextpriv;
-   u32 TxAGC[2] = {0, 0}, tmpval = 0, pwrtrac_value;
-   bool TurboScanOff = false;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   struct dm_priv *pdmpriv = _data->dmpriv;
+   struct mlme_ext_priv *pmlmeext = >mlmeextpriv;
+   u32 tx_agc[2] = {0, 0}, tmpval = 0, pwrtrac_value;
u8 idx1, idx2;
u8 *ptr;
u8 direction;
-   /* FOR CE ,must disable turbo scan */
-   TurboScanOff = true;
 
 
if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
-   TxAGC[RF_PATH_A] = 0x3f3f3f3f;
-   TxAGC[RF_PATH_B] = 0x3f3f3f3f;
-
-   TurboScanOff = true;/* disable turbo scan */
-
-   if (TurboScanOff) {
-   for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
-   TxAGC[idx1] =
-   pPowerlevel[idx1] | 
(pPowerlevel[idx1]<<8) |
-   (pPowerlevel[idx1]<<16) | 
(pPowerlevel[idx1]<<24);
-   /*  2010/10/18 MH For external PA module. We 
need to limit power index to be less than 0x20. */
-   if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA)
-   TxAGC[idx1] = 0x20;
-   }
+   tx_agc[RF_PATH_A] = 0x3f3f3f3f;
+   tx_agc[RF_PATH_B] = 0x3f3f3f3f;
+   for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
+   tx_agc[idx1] = powerlevel[idx1] |
+ (powerlevel[idx1]<<8) |
+ (powerlevel[idx1]<<16) |
+ (powerlevel[idx1]<<24);
+   if (tx_agc[idx1] > 0x20 && hal_data->ExternalPA)
+   tx_agc[idx1] = 0x20;
}
} else {
-   /* Driver dynamic Tx power shall not affect Tx power.
-* It shall be determined by power training mechanism.
-i   *  Currently, we cannot fully disable driver dynamic
-* tx power mechanism because it is referenced by BT
-* coexist mechanism.
-* In the future, two mechanism shall be separated from
-* each other and maintained independently. */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
-   TxAGC[RF_PATH_A] = 0x10101010;
-   TxAGC[RF_PATH_B] = 0x10101010;
+   tx_agc[RF_PATH_A] = 0x10101010;
+   tx_agc[RF_PATH_B] = 0x10101010;
} else if (pdmpriv->

[PATCH 5/9] staging: rtl8188eu: Rework function writeOFDMPowerReg88E()

2014-08-31 Thread navin patidar

Rename CamelCase variables and function name.
Remove a block of the code which is executed only if RF type is T2R2 but
rtl8188eu's RF is a T1R1 type, so driver doesn't need that code.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |   50 +++
 1 file changed, 15 insertions(+), 35 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index d63529b..7797b38 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -253,55 +253,35 @@ static void get_rx_power_val_by_reg(struct adapter 
*Adapter, u8 Channel,
*(pOutWriteVal+rf) = writeVal;
}
 }
-static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 
*pValue)
+
+static void write_ofdm_pwr_reg(struct adapter *adapt, u8 index, u32 *pvalue)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
-   u16 regoffset_a[6] = {
-   rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
-   rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
-   rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12};
-   u16 regoffset_b[6] = {
-   rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
-   rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
-   rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12};
+   u16 regoffset_a[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
+  rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
+  rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12 };
+   u16 regoffset_b[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
+  rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
+  rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12 };
u8 i, rf, pwr_val[4];
-   u32 writeVal;
+   u32 write_val;
u16 regoffset;
 
for (rf = 0; rf < 2; rf++) {
-   writeVal = pValue[rf];
+   write_val = pvalue[rf];
for (i = 0; i < 4; i++) {
-   pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
+   pwr_val[i] = (u8)((write_val & (0x7f<<(i*8)))>>(i*8));
if (pwr_val[i]  > RF6052_MAX_TX_PWR)
pwr_val[i]  = RF6052_MAX_TX_PWR;
}
-   writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) | 
(pwr_val[1]<<8) | pwr_val[0];
+   write_val = (pwr_val[3]<<24) | (pwr_val[2]<<16) |
+   (pwr_val[1]<<8) | pwr_val[0];
 
if (rf == 0)
regoffset = regoffset_a[index];
else
regoffset = regoffset_b[index];
 
-   phy_set_bb_reg(Adapter, regoffset, bMaskDWord, writeVal);
-
-   /*  201005115 Joseph: Set Tx Power diff for Tx power training 
mechanism. */
-   if (((pHalData->rf_type == RF_2T2R) &&
-(regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == 
rTxAGC_B_Mcs15_Mcs12)) ||
-   ((pHalData->rf_type != RF_2T2R) &&
-(regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == 
rTxAGC_B_Mcs07_Mcs04))) {
-   writeVal = pwr_val[3];
-   if (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == 
rTxAGC_A_Mcs07_Mcs04)
-   regoffset = 0xc90;
-   if (regoffset == rTxAGC_B_Mcs15_Mcs12 || regoffset == 
rTxAGC_B_Mcs07_Mcs04)
-   regoffset = 0xc98;
-   for (i = 0; i < 3; i++) {
-   if (i != 2)
-   writeVal = (writeVal > 8) ? 
(writeVal-8) : 0;
-   else
-   writeVal = (writeVal > 6) ? 
(writeVal-6) : 0;
-   usb_write8(Adapter, (u32)(regoffset+i), 
(u8)writeVal);
-   }
-   }
+   phy_set_bb_reg(adapt, regoffset, bMaskDWord, write_val);
}
 }
 
@@ -332,6 +312,6 @@ void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter 
*adapt,
write_val[0] -= pwrtrac_value;
write_val[1] -= pwrtrac_value;
}
-   writeOFDMPowerReg88E(adapt, index, _val[0]);
+   write_ofdm_pwr_reg(adapt, index, _val[0]);
}
 }
-- 
1.7.10.4

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[PATCH 4/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetOFDMTxPower()

2014-08-31 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/phy.c |2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |   61 +++
 drivers/staging/rtl8188eu/include/rf.h  |4 ++
 drivers/staging/rtl8188eu/include/rtl8188e_rf.h |2 -
 4 files changed, 22 insertions(+), 47 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/phy.c 
b/drivers/staging/rtl8188eu/hal/phy.c
index a918dfa..7291b46 100644
--- a/drivers/staging/rtl8188eu/hal/phy.c
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -238,7 +238,7 @@ void phy_set_tx_power_level(struct adapter *adapt, u8 
channel)
  _pwr[0], _pwr[0]);
 
rtl88eu_phy_rf6052_set_cck_txpower(adapt, _pwr[0]);
-   rtl8188e_PHY_RF6052SetOFDMTxPower(adapt, _pwr[0], _pwr[0],
+   rtl88eu_phy_rf6052_set_ofdm_txpower(adapt, _pwr[0], _pwr[0],
  _pwr[0], channel);
 }
 
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 6a1731c..d63529b 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -305,60 +305,33 @@ static void writeOFDMPowerReg88E(struct adapter *Adapter, 
u8 index, u32 *pValue)
}
 }
 
-/*-
- * Function:   PHY_RF6052SetOFDMTxPower
- *
- * Overview:   For legacy and HY OFDM, we must read EEPROM TX power index for
- * different channel and read original value in TX power 
register area from
- * 0xe00. We increase offset and original value to be 
correct tx pwr.
- *
- * Input:   NONE
- *
- * Output:  NONE
- *
- * Return:  NONE
- *
- * Revised History:
- * WhenWho Remark
- * 11/05/2008  MHC Simulate 8192 series method.
- * 01/06/2009  MHC 1. Prevent Path B tx power overflow or 
underflow dure to
- * A/B pwr difference or legacy/HT 
pwr diff.
- * 2. We concern with path B 
legacy/HT OFDM difference.
- * 01/22/2009  MHC Support new EPRO format from SD3.
- *
- *---*/
-
-void
-rtl8188e_PHY_RF6052SetOFDMTxPower(
-   struct adapter *Adapter,
-   u8 *pPowerLevelOFDM,
-   u8 *pPowerLevelBW20,
-   u8 *pPowerLevelBW40,
-   u8 Channel)
+void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt,
+u8 *pwr_level_ofdm,
+u8 *pwr_level_bw20,
+u8 *pwr_level_bw40, u8 channel)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
-   u32 writeVal[2], powerBase0[2], powerBase1[2], pwrtrac_value;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   u32 write_val[2], powerbase0[2], powerbase1[2], pwrtrac_value;
u8 direction;
u8 index = 0;
 
-   getpowerbase88e(Adapter, pPowerLevelOFDM, pPowerLevelBW20, 
pPowerLevelBW40, Channel, [0], [0]);
+   getpowerbase88e(adapt, pwr_level_ofdm, pwr_level_bw20, pwr_level_bw40,
+   channel, [0], [0]);
 
-   /*  2012/04/23 MH According to power tracking value, we need to revise 
OFDM tx power. */
-   /*  This is ued to fix unstable power tracking mode. */
-   ODM_TxPwrTrackAdjust88E(>odmpriv, 0, , 
_value);
+   ODM_TxPwrTrackAdjust88E(_data->odmpriv, 0, , 
_value);
 
for (index = 0; index < 6; index++) {
-   get_rx_power_val_by_reg(Adapter, Channel, index,
-   [0], [0],
-   [0]);
+   get_rx_power_val_by_reg(adapt, channel, index,
+   [0], [0],
+   _val[0]);
 
if (direction == 1) {
-   writeVal[0] += pwrtrac_value;
-   writeVal[1] += pwrtrac_value;
+   write_val[0] += pwrtrac_value;
+   write_val[1] += pwrtrac_value;
} else if (direction == 2) {
-   writeVal[0] -= pwrtrac_value;
-   writeVal[1] -= pwrtrac_value;
+   write_val[0] -= pwrtrac_value;
+   write_val[1] -= pwrtrac_value;
}
-   writeOFDMPowerReg88E(Adapter, index, [0]);
+   writeOFDMPowerReg88E(adapt, index, _val[0]);
}
 }
diff --git a/drivers/staging/rtl8188eu/include/rf.h 
b/drivers/staging/rtl8188eu/include/rf.h
index 82bd076..3b97ee3 100644
--- a/drivers/staging/rtl8188eu/include/rf.h
+++ b/drivers/staging/rtl8188eu/include/rf.h
@@ -2,3 +2,

[PATCH 9/9] staging: rtl8188eu: Remove unused function SetBcnCtrlReg()

2014-08-31 Thread navin patidar

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |   18 --
 drivers/staging/rtl8188eu/include/rtl8188e_hal.h  |1 -
 2 files changed, 19 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index 7a8fe53..d6fe5e6 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -704,21 +704,3 @@ void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 
*PROMContent, bool Aut
}
DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
 }
-
-/*  This function is used only for 92C to set REG_BCN_CTRL(0x550) register. */
-/*  We just reserve the value of the register in variable 
pHalData->RegBcnCtrlVal and then operate */
-/*  the value of the register via atomic operation. */
-/*  This prevents from race condition when setting this register. */
-/*  The value of pHalData->RegBcnCtrlVal is initialized in 
HwConfigureRTL8192CE() function. */
-
-void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits)
-{
-   struct hal_data_8188e *pHalData;
-
-   pHalData = GET_HAL_DATA(padapter);
-
-   pHalData->RegBcnCtrlVal |= SetBits;
-   pHalData->RegBcnCtrlVal &= ~ClearBits;
-
-   usb_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal);
-}
diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h 
b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
index f5abe01..2c517ce 100644
--- a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
+++ b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
@@ -417,7 +417,6 @@ void Hal_ReadPowerSavingMode88E(struct adapter *pAdapter, 
u8 *hwinfo,
 void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc);
 
 /*  register */
-void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits);
 
 void rtl8188e_start_thread(struct adapter *padapter);
 void rtl8188e_stop_thread(struct adapter *padapter);
-- 
1.7.10.4

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[PATCH 8/9] staging: rtl8188eu: Rename rtl8188e_rf6052.c to rf.c

2014-08-31 Thread navin patidar

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/Makefile  |2 +-
 drivers/staging/rtl8188eu/hal/rf.c  |  316 +++
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |  316 ---
 3 files changed, 317 insertions(+), 317 deletions(-)
 create mode 100644 drivers/staging/rtl8188eu/hal/rf.c
 delete mode 100644 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index 20225b3..af919c3 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -35,7 +35,7 @@ r8188eu-y :=  \
hal/rtl8188e_dm.o   \
hal/rtl8188e_hal_init.o \
hal/phy.o \
-   hal/rtl8188e_rf6052.o   \
+   hal/rf.o \
hal/rtl8188e_rxdesc.o   \
hal/rtl8188e_xmit.o \
hal/rtl8188eu_led.o \
diff --git a/drivers/staging/rtl8188eu/hal/rf.c 
b/drivers/staging/rtl8188eu/hal/rf.c
new file mode 100644
index 000..6ae22b0
--- /dev/null
+++ b/drivers/staging/rtl8188eu/hal/rf.c
@@ -0,0 +1,316 @@
+/**
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ 
**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
+ enum ht_channel_width bandwidth)
+{
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+
+   switch (bandwidth) {
+   case HT_CHANNEL_WIDTH_20:
+   hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
+ 0xf3ff) | BIT(10) | BIT(11));
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+  hal_data->RfRegChnlVal[0]);
+   break;
+   case HT_CHANNEL_WIDTH_40:
+   hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
+ 0xf3ff) | BIT(10));
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+  hal_data->RfRegChnlVal[0]);
+   break;
+   default:
+   break;
+   }
+}
+
+void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel)
+{
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   struct dm_priv *pdmpriv = _data->dmpriv;
+   struct mlme_ext_priv *pmlmeext = >mlmeextpriv;
+   u32 tx_agc[2] = {0, 0}, tmpval = 0, pwrtrac_value;
+   u8 idx1, idx2;
+   u8 *ptr;
+   u8 direction;
+
+
+   if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
+   tx_agc[RF_PATH_A] = 0x3f3f3f3f;
+   tx_agc[RF_PATH_B] = 0x3f3f3f3f;
+   for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
+   tx_agc[idx1] = powerlevel[idx1] |
+ (powerlevel[idx1]<<8) |
+ (powerlevel[idx1]<<16) |
+ (powerlevel[idx1]<<24);
+   if (tx_agc[idx1] > 0x20 && hal_data->ExternalPA)
+   tx_agc[idx1] = 0x20;
+   }
+   } else {
+   if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
+   tx_agc[RF_PATH_A] = 0x10101010;
+   tx_agc[RF_PATH_B] = 0x10101010;
+   } else if (pdmpriv->DynamicTxHighPowerLvl == 
TxHighPwrLevel_Level2) {
+   tx_agc[RF_PATH_A] = 0x;
+   tx_agc[RF_PATH_B] = 0x;
+   } else {
+   for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
+   tx_agc[idx1] = powerlevel[idx1] |
+  (powerlevel[idx1]<<8) |
+  (powerlevel[idx1]<<16) |
+  (powerlevel[idx1]&

[PATCH 1/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetBandwidth()

2014-08-31 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/phy.c |3 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |   58 +--
 drivers/staging/rtl8188eu/include/rf.h  |2 +
 3 files changed, 16 insertions(+), 47 deletions(-)
 create mode 100644 drivers/staging/rtl8188eu/include/rf.h

diff --git a/drivers/staging/rtl8188eu/hal/phy.c 
b/drivers/staging/rtl8188eu/hal/phy.c
index 5041da0..b67b91e 100644
--- a/drivers/staging/rtl8188eu/hal/phy.c
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define MAX_PRECMD_CNT 16
 #define MAX_RFDEPENDCMD_CNT 16
@@ -312,7 +313,7 @@ static void phy_set_bw_mode_callback(struct adapter *adapt)
case RF_PSEUDO_11N:
break;
case RF_6052:
-   rtl8188e_PHY_RF6052SetBandwidth(adapt, 
hal_data->CurrentChannelBW);
+   rtl88eu_phy_rf6052_set_bandwidth(adapt, 
hal_data->CurrentChannelBW);
break;
default:
break;
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index bcee67a..bd90068 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -15,64 +15,30 @@
  * this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  *
- *
  
**/
-/**
- *
- *
- * Module: rtl8192c_rf6052.c   ( Source C File)
- *
- * Note:   Provide RF 6052 series relative API.
- *
- * Function:
- *
- * Export:
- *
- * Abbrev:
- *
- * History:
- * DataWho Remark
- *
- * 09/25/2008  MHC Create initial version.
- * 11/05/2008  MHC Add API for tw power setting.
- *
- *
-**/
-
-#define _RTL8188E_RF6052_C_
 
 #include 
 #include 
 #include 
 #include 
 
-/*-
- * Function:PHY_RF6052SetBandwidth()
- *
- * Overview:This function is called by SetBWModeCallback8190Pci() only
- *
- * Input:   struct adapter *Adapter
- * WIRELESS_BANDWIDTH_EBandwidth   20M or 40M
- *
- * Output:  NONE
- *
- * Return:  NONE
- *
- * Note:   For RF type 0222D
- *---*/
-void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
-enum ht_channel_width Bandwidth)
+void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
+ enum ht_channel_width bandwidth)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
 
-   switch (Bandwidth) {
+   switch (bandwidth) {
case HT_CHANNEL_WIDTH_20:
-   pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 
0xf3ff) | BIT(10) | BIT(11));
-   phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 
pHalData->RfRegChnlVal[0]);
+   hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
+ 0xf3ff) | BIT(10) | BIT(11));
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+  hal_data->RfRegChnlVal[0]);
break;
case HT_CHANNEL_WIDTH_40:
-   pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 
0xf3ff) | BIT(10));
-   phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 
pHalData->RfRegChnlVal[0]);
+   hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
+ 0xf3ff) | BIT(10));
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+  hal_data->RfRegChnlVal[0]);
break;
default:
break;
diff --git a/drivers/staging/rtl8188eu/include/rf.h 
b/drivers/staging/rtl8188eu/include/rf.h
new file mode 100644
index 000..ca0d28d
--- /dev/null
+++ b/drivers/staging/rtl8188eu/include/rf.h
@@ -0,0 +1,2 @@
+void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
+ enum ht_channel_width bandwidth);
-- 
1.7.10.4

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[PATCH 3/9] staging: rtl8188eu: Rework function getpowerbase88e()

2014-08-31 Thread navin patidar

Rename CamelCase variables.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |   33 ---
 1 file changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 8959ac3..6a1731c 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -125,32 +125,33 @@ void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter 
*adapt, u8 *powerlevel)
phy_set_bb_reg(adapt, rTxAGC_B_CCK1_55_Mcs32, 0xff00, tmpval);
 }
 
-/*  */
 /*  powerbase0 for OFDM rates */
 /*  powerbase1 for HT MCS rates */
-/*  */
-static void getpowerbase88e(struct adapter *Adapter, u8 *pPowerLevelOFDM,
-   u8 *pPowerLevelBW20, u8 *pPowerLevelBW40, u8 
Channel, u32 *OfdmBase, u32 *MCSBase)
+static void getpowerbase88e(struct adapter *adapt, u8 *pwr_level_ofdm,
+   u8 *pwr_level_bw20, u8 *pwr_level_bw40,
+   u8 channel,u32 *ofdmbase, u32 *mcs_base)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
-   u32 powerBase0, powerBase1;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   u32 powerbase0, powerbase1;
u8 i, powerlevel[2];
 
for (i = 0; i < 2; i++) {
-   powerBase0 = pPowerLevelOFDM[i];
+   powerbase0 = pwr_level_ofdm[i];
 
-   powerBase0 = (powerBase0<<24) | (powerBase0<<16) | 
(powerBase0<<8) | powerBase0;
-   *(OfdmBase+i) = powerBase0;
+   powerbase0 = (powerbase0<<24) | (powerbase0<<16) |
+(powerbase0<<8) | powerbase0;
+   *(ofdmbase+i) = powerbase0;
}
-   for (i = 0; i < pHalData->NumTotalRFPath; i++) {
+   for (i = 0; i < hal_data->NumTotalRFPath; i++) {
/* Check HT20 to HT40 diff */
-   if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
-   powerlevel[i] = pPowerLevelBW20[i];
+   if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+   powerlevel[i] = pwr_level_bw20[i];
else
-   powerlevel[i] = pPowerLevelBW40[i];
-   powerBase1 = powerlevel[i];
-   powerBase1 = (powerBase1<<24) | (powerBase1<<16) | 
(powerBase1<<8) | powerBase1;
-   *(MCSBase+i) = powerBase1;
+   powerlevel[i] = pwr_level_bw40[i];
+   powerbase1 = powerlevel[i];
+   powerbase1 = (powerbase1<<24) | (powerbase1<<16) |
+(powerbase1<<8) | powerbase1;
+   *(mcs_base+i) = powerbase1;
}
 }
 static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
-- 
1.7.10.4

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Re: [PATCH 03/20] staging: rtl8188eu: Rework function PHY_QueryBBReg()

2014-08-31 Thread navin patidar

On Sun, Aug 31, 2014 at 2:14 AM, Greg KH  wrote:
> On Sat, Aug 23, 2014 at 07:48:24PM +0530, navin patidar wrote:
>> Rename CamelCase variables and function name.
>>
>> Signed-off-by: navin patidar 
>
> This patch fails to apply:
>
> checking file drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
> checking file drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
> checking file drivers/staging/rtl8188eu/hal/odm.c
> checking file drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
> checking file drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
> checking file drivers/staging/rtl8188eu/hal/usb_halinit.c
> checking file drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
> checking file drivers/staging/rtl8188eu/include/phy.h
> Hunk #1 FAILED at 1.
> 1 out of 1 hunk FAILED
>
> Can you please refresh it against my staging-next branch of the
> staging.git tree on git.kernel.org and resend it, and the rest of the
> patches in this series so that I can apply them?

I've sent v2 of the rest of the patches in this series.

regards,
--navin-patidar
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Re: [PATCH 03/20] staging: rtl8188eu: Rework function PHY_QueryBBReg()

2014-08-31 Thread navin patidar

On Sun, Aug 31, 2014 at 2:14 AM, Greg KH gre...@linuxfoundation.org wrote:
 On Sat, Aug 23, 2014 at 07:48:24PM +0530, navin patidar wrote:
 Rename CamelCase variables and function name.

 Signed-off-by: navin patidar navin.pati...@gmail.com

 This patch fails to apply:

 checking file drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
 checking file drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
 checking file drivers/staging/rtl8188eu/hal/odm.c
 checking file drivers/staging/rtl8188eu/hal/odm_RTL8188E.c
 checking file drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
 checking file drivers/staging/rtl8188eu/hal/usb_halinit.c
 checking file drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
 checking file drivers/staging/rtl8188eu/include/phy.h
 Hunk #1 FAILED at 1.
 1 out of 1 hunk FAILED

 Can you please refresh it against my staging-next branch of the
 staging.git tree on git.kernel.org and resend it, and the rest of the
 patches in this series so that I can apply them?

I've sent v2 of the rest of the patches in this series.

regards,
--navin-patidar
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[PATCH 1/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetBandwidth()

2014-08-31 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/phy.c |3 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |   58 +--
 drivers/staging/rtl8188eu/include/rf.h  |2 +
 3 files changed, 16 insertions(+), 47 deletions(-)
 create mode 100644 drivers/staging/rtl8188eu/include/rf.h

diff --git a/drivers/staging/rtl8188eu/hal/phy.c 
b/drivers/staging/rtl8188eu/hal/phy.c
index 5041da0..b67b91e 100644
--- a/drivers/staging/rtl8188eu/hal/phy.c
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -23,6 +23,7 @@
 #include drv_types.h
 #include rtw_iol.h
 #include rtl8188e_hal.h
+#include rf.h
 
 #define MAX_PRECMD_CNT 16
 #define MAX_RFDEPENDCMD_CNT 16
@@ -312,7 +313,7 @@ static void phy_set_bw_mode_callback(struct adapter *adapt)
case RF_PSEUDO_11N:
break;
case RF_6052:
-   rtl8188e_PHY_RF6052SetBandwidth(adapt, 
hal_data-CurrentChannelBW);
+   rtl88eu_phy_rf6052_set_bandwidth(adapt, 
hal_data-CurrentChannelBW);
break;
default:
break;
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index bcee67a..bd90068 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -15,64 +15,30 @@
  * this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  *
- *
  
**/
-/**
- *
- *
- * Module: rtl8192c_rf6052.c   ( Source C File)
- *
- * Note:   Provide RF 6052 series relative API.
- *
- * Function:
- *
- * Export:
- *
- * Abbrev:
- *
- * History:
- * DataWho Remark
- *
- * 09/25/2008  MHC Create initial version.
- * 11/05/2008  MHC Add API for tw power setting.
- *
- *
-**/
-
-#define _RTL8188E_RF6052_C_
 
 #include osdep_service.h
 #include drv_types.h
 #include phy.h
 #include rtl8188e_hal.h
 
-/*-
- * Function:PHY_RF6052SetBandwidth()
- *
- * Overview:This function is called by SetBWModeCallback8190Pci() only
- *
- * Input:   struct adapter *Adapter
- * WIRELESS_BANDWIDTH_EBandwidth   20M or 40M
- *
- * Output:  NONE
- *
- * Return:  NONE
- *
- * Note:   For RF type 0222D
- *---*/
-void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
-enum ht_channel_width Bandwidth)
+void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
+ enum ht_channel_width bandwidth)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
 
-   switch (Bandwidth) {
+   switch (bandwidth) {
case HT_CHANNEL_WIDTH_20:
-   pHalData-RfRegChnlVal[0] = ((pHalData-RfRegChnlVal[0]  
0xf3ff) | BIT(10) | BIT(11));
-   phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 
pHalData-RfRegChnlVal[0]);
+   hal_data-RfRegChnlVal[0] = ((hal_data-RfRegChnlVal[0] 
+ 0xf3ff) | BIT(10) | BIT(11));
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+  hal_data-RfRegChnlVal[0]);
break;
case HT_CHANNEL_WIDTH_40:
-   pHalData-RfRegChnlVal[0] = ((pHalData-RfRegChnlVal[0]  
0xf3ff) | BIT(10));
-   phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 
pHalData-RfRegChnlVal[0]);
+   hal_data-RfRegChnlVal[0] = ((hal_data-RfRegChnlVal[0] 
+ 0xf3ff) | BIT(10));
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+  hal_data-RfRegChnlVal[0]);
break;
default:
break;
diff --git a/drivers/staging/rtl8188eu/include/rf.h 
b/drivers/staging/rtl8188eu/include/rf.h
new file mode 100644
index 000..ca0d28d
--- /dev/null
+++ b/drivers/staging/rtl8188eu/include/rf.h
@@ -0,0 +1,2 @@
+void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
+ enum ht_channel_width bandwidth);
-- 
1.7.10.4

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[PATCH 3/9] staging: rtl8188eu: Rework function getpowerbase88e()

2014-08-31 Thread navin patidar

Rename CamelCase variables.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |   33 ---
 1 file changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 8959ac3..6a1731c 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -125,32 +125,33 @@ void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter 
*adapt, u8 *powerlevel)
phy_set_bb_reg(adapt, rTxAGC_B_CCK1_55_Mcs32, 0xff00, tmpval);
 }
 
-/*  */
 /*  powerbase0 for OFDM rates */
 /*  powerbase1 for HT MCS rates */
-/*  */
-static void getpowerbase88e(struct adapter *Adapter, u8 *pPowerLevelOFDM,
-   u8 *pPowerLevelBW20, u8 *pPowerLevelBW40, u8 
Channel, u32 *OfdmBase, u32 *MCSBase)
+static void getpowerbase88e(struct adapter *adapt, u8 *pwr_level_ofdm,
+   u8 *pwr_level_bw20, u8 *pwr_level_bw40,
+   u8 channel,u32 *ofdmbase, u32 *mcs_base)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
-   u32 powerBase0, powerBase1;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   u32 powerbase0, powerbase1;
u8 i, powerlevel[2];
 
for (i = 0; i  2; i++) {
-   powerBase0 = pPowerLevelOFDM[i];
+   powerbase0 = pwr_level_ofdm[i];
 
-   powerBase0 = (powerBase024) | (powerBase016) | 
(powerBase08) | powerBase0;
-   *(OfdmBase+i) = powerBase0;
+   powerbase0 = (powerbase024) | (powerbase016) |
+(powerbase08) | powerbase0;
+   *(ofdmbase+i) = powerbase0;
}
-   for (i = 0; i  pHalData-NumTotalRFPath; i++) {
+   for (i = 0; i  hal_data-NumTotalRFPath; i++) {
/* Check HT20 to HT40 diff */
-   if (pHalData-CurrentChannelBW == HT_CHANNEL_WIDTH_20)
-   powerlevel[i] = pPowerLevelBW20[i];
+   if (hal_data-CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+   powerlevel[i] = pwr_level_bw20[i];
else
-   powerlevel[i] = pPowerLevelBW40[i];
-   powerBase1 = powerlevel[i];
-   powerBase1 = (powerBase124) | (powerBase116) | 
(powerBase18) | powerBase1;
-   *(MCSBase+i) = powerBase1;
+   powerlevel[i] = pwr_level_bw40[i];
+   powerbase1 = powerlevel[i];
+   powerbase1 = (powerbase124) | (powerbase116) |
+(powerbase18) | powerbase1;
+   *(mcs_base+i) = powerbase1;
}
 }
 static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
-- 
1.7.10.4

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[PATCH 9/9] staging: rtl8188eu: Remove unused function SetBcnCtrlReg()

2014-08-31 Thread navin patidar

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |   18 --
 drivers/staging/rtl8188eu/include/rtl8188e_hal.h  |1 -
 2 files changed, 19 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index 7a8fe53..d6fe5e6 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -704,21 +704,3 @@ void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 
*PROMContent, bool Aut
}
DBG_88E(ThermalMeter = 0x%x\n, pHalData-EEPROMThermalMeter);
 }
-
-/*  This function is used only for 92C to set REG_BCN_CTRL(0x550) register. */
-/*  We just reserve the value of the register in variable 
pHalData-RegBcnCtrlVal and then operate */
-/*  the value of the register via atomic operation. */
-/*  This prevents from race condition when setting this register. */
-/*  The value of pHalData-RegBcnCtrlVal is initialized in 
HwConfigureRTL8192CE() function. */
-
-void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits)
-{
-   struct hal_data_8188e *pHalData;
-
-   pHalData = GET_HAL_DATA(padapter);
-
-   pHalData-RegBcnCtrlVal |= SetBits;
-   pHalData-RegBcnCtrlVal = ~ClearBits;
-
-   usb_write8(padapter, REG_BCN_CTRL, (u8)pHalData-RegBcnCtrlVal);
-}
diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h 
b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
index f5abe01..2c517ce 100644
--- a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
+++ b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
@@ -417,7 +417,6 @@ void Hal_ReadPowerSavingMode88E(struct adapter *pAdapter, 
u8 *hwinfo,
 void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc);
 
 /*  register */
-void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits);
 
 void rtl8188e_start_thread(struct adapter *padapter);
 void rtl8188e_stop_thread(struct adapter *padapter);
-- 
1.7.10.4

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[PATCH 8/9] staging: rtl8188eu: Rename rtl8188e_rf6052.c to rf.c

2014-08-31 Thread navin patidar

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/Makefile  |2 +-
 drivers/staging/rtl8188eu/hal/rf.c  |  316 +++
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |  316 ---
 3 files changed, 317 insertions(+), 317 deletions(-)
 create mode 100644 drivers/staging/rtl8188eu/hal/rf.c
 delete mode 100644 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index 20225b3..af919c3 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -35,7 +35,7 @@ r8188eu-y :=  \
hal/rtl8188e_dm.o   \
hal/rtl8188e_hal_init.o \
hal/phy.o \
-   hal/rtl8188e_rf6052.o   \
+   hal/rf.o \
hal/rtl8188e_rxdesc.o   \
hal/rtl8188e_xmit.o \
hal/rtl8188eu_led.o \
diff --git a/drivers/staging/rtl8188eu/hal/rf.c 
b/drivers/staging/rtl8188eu/hal/rf.c
new file mode 100644
index 000..6ae22b0
--- /dev/null
+++ b/drivers/staging/rtl8188eu/hal/rf.c
@@ -0,0 +1,316 @@
+/**
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ 
**/
+
+#include osdep_service.h
+#include drv_types.h
+#include phy.h
+#include rf.h
+#include rtl8188e_hal.h
+
+void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
+ enum ht_channel_width bandwidth)
+{
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+
+   switch (bandwidth) {
+   case HT_CHANNEL_WIDTH_20:
+   hal_data-RfRegChnlVal[0] = ((hal_data-RfRegChnlVal[0] 
+ 0xf3ff) | BIT(10) | BIT(11));
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+  hal_data-RfRegChnlVal[0]);
+   break;
+   case HT_CHANNEL_WIDTH_40:
+   hal_data-RfRegChnlVal[0] = ((hal_data-RfRegChnlVal[0] 
+ 0xf3ff) | BIT(10));
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+  hal_data-RfRegChnlVal[0]);
+   break;
+   default:
+   break;
+   }
+}
+
+void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel)
+{
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   struct dm_priv *pdmpriv = hal_data-dmpriv;
+   struct mlme_ext_priv *pmlmeext = adapt-mlmeextpriv;
+   u32 tx_agc[2] = {0, 0}, tmpval = 0, pwrtrac_value;
+   u8 idx1, idx2;
+   u8 *ptr;
+   u8 direction;
+
+
+   if (pmlmeext-sitesurvey_res.state == SCAN_PROCESS) {
+   tx_agc[RF_PATH_A] = 0x3f3f3f3f;
+   tx_agc[RF_PATH_B] = 0x3f3f3f3f;
+   for (idx1 = RF_PATH_A; idx1 = RF_PATH_B; idx1++) {
+   tx_agc[idx1] = powerlevel[idx1] |
+ (powerlevel[idx1]8) |
+ (powerlevel[idx1]16) |
+ (powerlevel[idx1]24);
+   if (tx_agc[idx1]  0x20  hal_data-ExternalPA)
+   tx_agc[idx1] = 0x20;
+   }
+   } else {
+   if (pdmpriv-DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
+   tx_agc[RF_PATH_A] = 0x10101010;
+   tx_agc[RF_PATH_B] = 0x10101010;
+   } else if (pdmpriv-DynamicTxHighPowerLvl == 
TxHighPwrLevel_Level2) {
+   tx_agc[RF_PATH_A] = 0x;
+   tx_agc[RF_PATH_B] = 0x;
+   } else {
+   for (idx1 = RF_PATH_A; idx1 = RF_PATH_B; idx1++) {
+   tx_agc[idx1] = powerlevel[idx1] |
+  (powerlevel[idx1]8) |
+  (powerlevel[idx1]16) |
+  (powerlevel[idx1]24

[PATCH 4/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetOFDMTxPower()

2014-08-31 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/phy.c |2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |   61 +++
 drivers/staging/rtl8188eu/include/rf.h  |4 ++
 drivers/staging/rtl8188eu/include/rtl8188e_rf.h |2 -
 4 files changed, 22 insertions(+), 47 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/phy.c 
b/drivers/staging/rtl8188eu/hal/phy.c
index a918dfa..7291b46 100644
--- a/drivers/staging/rtl8188eu/hal/phy.c
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -238,7 +238,7 @@ void phy_set_tx_power_level(struct adapter *adapt, u8 
channel)
  bw20_pwr[0], bw40_pwr[0]);
 
rtl88eu_phy_rf6052_set_cck_txpower(adapt, cck_pwr[0]);
-   rtl8188e_PHY_RF6052SetOFDMTxPower(adapt, ofdm_pwr[0], bw20_pwr[0],
+   rtl88eu_phy_rf6052_set_ofdm_txpower(adapt, ofdm_pwr[0], bw20_pwr[0],
  bw40_pwr[0], channel);
 }
 
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 6a1731c..d63529b 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -305,60 +305,33 @@ static void writeOFDMPowerReg88E(struct adapter *Adapter, 
u8 index, u32 *pValue)
}
 }
 
-/*-
- * Function:   PHY_RF6052SetOFDMTxPower
- *
- * Overview:   For legacy and HY OFDM, we must read EEPROM TX power index for
- * different channel and read original value in TX power 
register area from
- * 0xe00. We increase offset and original value to be 
correct tx pwr.
- *
- * Input:   NONE
- *
- * Output:  NONE
- *
- * Return:  NONE
- *
- * Revised History:
- * WhenWho Remark
- * 11/05/2008  MHC Simulate 8192 series method.
- * 01/06/2009  MHC 1. Prevent Path B tx power overflow or 
underflow dure to
- * A/B pwr difference or legacy/HT 
pwr diff.
- * 2. We concern with path B 
legacy/HT OFDM difference.
- * 01/22/2009  MHC Support new EPRO format from SD3.
- *
- *---*/
-
-void
-rtl8188e_PHY_RF6052SetOFDMTxPower(
-   struct adapter *Adapter,
-   u8 *pPowerLevelOFDM,
-   u8 *pPowerLevelBW20,
-   u8 *pPowerLevelBW40,
-   u8 Channel)
+void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt,
+u8 *pwr_level_ofdm,
+u8 *pwr_level_bw20,
+u8 *pwr_level_bw40, u8 channel)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
-   u32 writeVal[2], powerBase0[2], powerBase1[2], pwrtrac_value;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   u32 write_val[2], powerbase0[2], powerbase1[2], pwrtrac_value;
u8 direction;
u8 index = 0;
 
-   getpowerbase88e(Adapter, pPowerLevelOFDM, pPowerLevelBW20, 
pPowerLevelBW40, Channel, powerBase0[0], powerBase1[0]);
+   getpowerbase88e(adapt, pwr_level_ofdm, pwr_level_bw20, pwr_level_bw40,
+   channel, powerbase0[0], powerbase1[0]);
 
-   /*  2012/04/23 MH According to power tracking value, we need to revise 
OFDM tx power. */
-   /*  This is ued to fix unstable power tracking mode. */
-   ODM_TxPwrTrackAdjust88E(pHalData-odmpriv, 0, direction, 
pwrtrac_value);
+   ODM_TxPwrTrackAdjust88E(hal_data-odmpriv, 0, direction, 
pwrtrac_value);
 
for (index = 0; index  6; index++) {
-   get_rx_power_val_by_reg(Adapter, Channel, index,
-   powerBase0[0], powerBase1[0],
-   writeVal[0]);
+   get_rx_power_val_by_reg(adapt, channel, index,
+   powerbase0[0], powerbase1[0],
+   write_val[0]);
 
if (direction == 1) {
-   writeVal[0] += pwrtrac_value;
-   writeVal[1] += pwrtrac_value;
+   write_val[0] += pwrtrac_value;
+   write_val[1] += pwrtrac_value;
} else if (direction == 2) {
-   writeVal[0] -= pwrtrac_value;
-   writeVal[1] -= pwrtrac_value;
+   write_val[0] -= pwrtrac_value;
+   write_val[1] -= pwrtrac_value;
}
-   writeOFDMPowerReg88E(Adapter, index, writeVal[0]);
+   writeOFDMPowerReg88E(adapt, index, write_val[0]);
}
 }
diff --git a/drivers/staging

[PATCH 2/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetCckTxPower()

2014-08-31 Thread navin patidar

Rename CamelCase variables and function name.
Remove redundant variable TurboScanOff.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/phy.c |2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |  124 ---
 drivers/staging/rtl8188eu/include/rf.h  |2 +
 drivers/staging/rtl8188eu/include/rtl8188e_rf.h |1 -
 4 files changed, 48 insertions(+), 81 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/phy.c 
b/drivers/staging/rtl8188eu/hal/phy.c
index b67b91e..a918dfa 100644
--- a/drivers/staging/rtl8188eu/hal/phy.c
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -237,7 +237,7 @@ void phy_set_tx_power_level(struct adapter *adapt, u8 
channel)
phy_power_index_check(adapt, channel, cck_pwr[0], ofdm_pwr[0],
  bw20_pwr[0], bw40_pwr[0]);
 
-   rtl8188e_PHY_RF6052SetCckTxPower(adapt, cck_pwr[0]);
+   rtl88eu_phy_rf6052_set_cck_txpower(adapt, cck_pwr[0]);
rtl8188e_PHY_RF6052SetOFDMTxPower(adapt, ofdm_pwr[0], bw20_pwr[0],
  bw40_pwr[0], channel);
 }
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index bd90068..8959ac3 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -45,119 +45,85 @@ void rtl88eu_phy_rf6052_set_bandwidth(struct adapter 
*adapt,
}
 }
 
-/*-
- * Function:   PHY_RF6052SetCckTxPower
- *
- * Overview:
- *
- * Input:   NONE
- *
- * Output:  NONE
- *
- * Return:  NONE
- *
- * Revised History:
- * WhenWho Remark
- * 11/05/2008  MHC Simulate 8192series..
- *
- *---*/
-
-void
-rtl8188e_PHY_RF6052SetCckTxPower(
-   struct adapter *Adapter,
-   u8 *pPowerlevel)
+void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
-   struct dm_priv *pdmpriv = pHalData-dmpriv;
-   struct mlme_ext_priv *pmlmeext = Adapter-mlmeextpriv;
-   u32 TxAGC[2] = {0, 0}, tmpval = 0, pwrtrac_value;
-   bool TurboScanOff = false;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   struct dm_priv *pdmpriv = hal_data-dmpriv;
+   struct mlme_ext_priv *pmlmeext = adapt-mlmeextpriv;
+   u32 tx_agc[2] = {0, 0}, tmpval = 0, pwrtrac_value;
u8 idx1, idx2;
u8 *ptr;
u8 direction;
-   /* FOR CE ,must disable turbo scan */
-   TurboScanOff = true;
 
 
if (pmlmeext-sitesurvey_res.state == SCAN_PROCESS) {
-   TxAGC[RF_PATH_A] = 0x3f3f3f3f;
-   TxAGC[RF_PATH_B] = 0x3f3f3f3f;
-
-   TurboScanOff = true;/* disable turbo scan */
-
-   if (TurboScanOff) {
-   for (idx1 = RF_PATH_A; idx1 = RF_PATH_B; idx1++) {
-   TxAGC[idx1] =
-   pPowerlevel[idx1] | 
(pPowerlevel[idx1]8) |
-   (pPowerlevel[idx1]16) | 
(pPowerlevel[idx1]24);
-   /*  2010/10/18 MH For external PA module. We 
need to limit power index to be less than 0x20. */
-   if (TxAGC[idx1]  0x20  pHalData-ExternalPA)
-   TxAGC[idx1] = 0x20;
-   }
+   tx_agc[RF_PATH_A] = 0x3f3f3f3f;
+   tx_agc[RF_PATH_B] = 0x3f3f3f3f;
+   for (idx1 = RF_PATH_A; idx1 = RF_PATH_B; idx1++) {
+   tx_agc[idx1] = powerlevel[idx1] |
+ (powerlevel[idx1]8) |
+ (powerlevel[idx1]16) |
+ (powerlevel[idx1]24);
+   if (tx_agc[idx1]  0x20  hal_data-ExternalPA)
+   tx_agc[idx1] = 0x20;
}
} else {
-   /* Driver dynamic Tx power shall not affect Tx power.
-* It shall be determined by power training mechanism.
-i   *  Currently, we cannot fully disable driver dynamic
-* tx power mechanism because it is referenced by BT
-* coexist mechanism.
-* In the future, two mechanism shall be separated from
-* each other and maintained independently. */
if (pdmpriv-DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
-   TxAGC[RF_PATH_A] = 0x10101010;
-   TxAGC[RF_PATH_B] = 0x10101010;
+   tx_agc[RF_PATH_A] = 0x10101010;
+   tx_agc[RF_PATH_B] = 0x10101010;
} else if (pdmpriv-DynamicTxHighPowerLvl == 
TxHighPwrLevel_Level2

[PATCH 5/9] staging: rtl8188eu: Rework function writeOFDMPowerReg88E()

2014-08-31 Thread navin patidar

Rename CamelCase variables and function name.
Remove a block of the code which is executed only if RF type is T2R2 but
rtl8188eu's RF is a T1R1 type, so driver doesn't need that code.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |   50 +++
 1 file changed, 15 insertions(+), 35 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index d63529b..7797b38 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -253,55 +253,35 @@ static void get_rx_power_val_by_reg(struct adapter 
*Adapter, u8 Channel,
*(pOutWriteVal+rf) = writeVal;
}
 }
-static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 
*pValue)
+
+static void write_ofdm_pwr_reg(struct adapter *adapt, u8 index, u32 *pvalue)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
-   u16 regoffset_a[6] = {
-   rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
-   rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
-   rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12};
-   u16 regoffset_b[6] = {
-   rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
-   rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
-   rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12};
+   u16 regoffset_a[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
+  rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
+  rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12 };
+   u16 regoffset_b[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
+  rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
+  rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12 };
u8 i, rf, pwr_val[4];
-   u32 writeVal;
+   u32 write_val;
u16 regoffset;
 
for (rf = 0; rf  2; rf++) {
-   writeVal = pValue[rf];
+   write_val = pvalue[rf];
for (i = 0; i  4; i++) {
-   pwr_val[i] = (u8)((writeVal  (0x7f(i*8)))(i*8));
+   pwr_val[i] = (u8)((write_val  (0x7f(i*8)))(i*8));
if (pwr_val[i]   RF6052_MAX_TX_PWR)
pwr_val[i]  = RF6052_MAX_TX_PWR;
}
-   writeVal = (pwr_val[3]24) | (pwr_val[2]16) | 
(pwr_val[1]8) | pwr_val[0];
+   write_val = (pwr_val[3]24) | (pwr_val[2]16) |
+   (pwr_val[1]8) | pwr_val[0];
 
if (rf == 0)
regoffset = regoffset_a[index];
else
regoffset = regoffset_b[index];
 
-   phy_set_bb_reg(Adapter, regoffset, bMaskDWord, writeVal);
-
-   /*  201005115 Joseph: Set Tx Power diff for Tx power training 
mechanism. */
-   if (((pHalData-rf_type == RF_2T2R) 
-(regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == 
rTxAGC_B_Mcs15_Mcs12)) ||
-   ((pHalData-rf_type != RF_2T2R) 
-(regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == 
rTxAGC_B_Mcs07_Mcs04))) {
-   writeVal = pwr_val[3];
-   if (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == 
rTxAGC_A_Mcs07_Mcs04)
-   regoffset = 0xc90;
-   if (regoffset == rTxAGC_B_Mcs15_Mcs12 || regoffset == 
rTxAGC_B_Mcs07_Mcs04)
-   regoffset = 0xc98;
-   for (i = 0; i  3; i++) {
-   if (i != 2)
-   writeVal = (writeVal  8) ? 
(writeVal-8) : 0;
-   else
-   writeVal = (writeVal  6) ? 
(writeVal-6) : 0;
-   usb_write8(Adapter, (u32)(regoffset+i), 
(u8)writeVal);
-   }
-   }
+   phy_set_bb_reg(adapt, regoffset, bMaskDWord, write_val);
}
 }
 
@@ -332,6 +312,6 @@ void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter 
*adapt,
write_val[0] -= pwrtrac_value;
write_val[1] -= pwrtrac_value;
}
-   writeOFDMPowerReg88E(adapt, index, write_val[0]);
+   write_ofdm_pwr_reg(adapt, index, write_val[0]);
}
 }
-- 
1.7.10.4

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[PATCH 7/9] staging: rtl8188eu: Remove file rtl8188e_rf.h

2014-08-31 Thread navin patidar

Move macros from rtl8188e_rf.h to rf.h and then remove rtl8188e_rf.h .

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c  |1 +
 drivers/staging/rtl8188eu/include/rf.h   |3 ++
 drivers/staging/rtl8188eu/include/rtl8188e_hal.h |1 -
 drivers/staging/rtl8188eu/include/rtl8188e_rf.h  |   32 --
 4 files changed, 4 insertions(+), 33 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/include/rtl8188e_rf.h

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 79a329d..6ae22b0 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -20,6 +20,7 @@
 #include osdep_service.h
 #include drv_types.h
 #include phy.h
+#include rf.h
 #include rtl8188e_hal.h
 
 void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
diff --git a/drivers/staging/rtl8188eu/include/rf.h 
b/drivers/staging/rtl8188eu/include/rf.h
index 3b97ee3..98a5551 100644
--- a/drivers/staging/rtl8188eu/include/rf.h
+++ b/drivers/staging/rtl8188eu/include/rf.h
@@ -1,3 +1,6 @@
+#define RF6052_MAX_TX_PWR  0x3F
+#define RF6052_MAX_REG 0x3F
+
 void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
  enum ht_channel_width bandwidth);
 void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt,
diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h 
b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
index 814ba1a..f5abe01 100644
--- a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
+++ b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
@@ -25,7 +25,6 @@
 #include rtl8188e_spec.h
 #include Hal8188EPhyReg.h
 #include Hal8188EPhyCfg.h
-#include rtl8188e_rf.h
 #include rtl8188e_dm.h
 #include rtl8188e_recv.h
 #include rtl8188e_xmit.h
diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_rf.h 
b/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
deleted file mode 100644
index 445f123..000
--- a/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/**
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- 
**/
-#ifndef __RTL8188E_RF_H__
-#define __RTL8188E_RF_H__
-
-#defineRF6052_MAX_TX_PWR   0x3F
-#defineRF6052_MAX_REG  0x3F
-#defineRF6052_MAX_PATH 2
-
-
-void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate);
-void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
-enum ht_channel_width Bandwidth);
-
-#endif/* __RTL8188E_RF_H__ */
-- 
1.7.10.4

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[PATCH 6/9] staging: rtl8188eu: Rework function get_rx_power_val_by_reg()

2014-08-31 Thread navin patidar

Rename CamelCase variables.
Remove block of the code which is specific to the bluetooth.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c |   92 +++
 1 file changed, 45 insertions(+), 47 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 7797b38..79a329d 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -154,65 +154,66 @@ static void getpowerbase88e(struct adapter *adapt, u8 
*pwr_level_ofdm,
*(mcs_base+i) = powerbase1;
}
 }
-static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
-   u8 index, u32 *powerBase0, u32 *powerBase1,
-   u32 *pOutWriteVal)
+static void get_rx_power_val_by_reg(struct adapter *adapt, u8 channel,
+   u8 index, u32 *powerbase0, u32 *powerbase1,
+   u32 *out_val)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
-   struct dm_priv  *pdmpriv = pHalData-dmpriv;
-   u8  i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
-   s8  pwr_diff = 0;
-   u32 writeVal, customer_limit, rf;
-   u8  Regulatory = pHalData-EEPROMRegulatory;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   struct dm_priv  *pdmpriv = hal_data-dmpriv;
+   u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
+   s8 pwr_diff = 0;
+   u32 write_val, customer_limit, rf;
+   u8 regulatory = hal_data-EEPROMRegulatory;
 
/*  Index 0  1= legacy OFDM, 2-5=HT_MCS rate */
 
for (rf = 0; rf  2; rf++) {
-   switch (Regulatory) {
-   case 0: /*  Realtek better performance */
-   /*  increase power diff defined by Realtek for 
large power */
+   u8 j = index + (rf ? 8 : 0);
+
+   switch (regulatory) {
+   case 0:
chnlGroup = 0;
-   writeVal = 
pHalData-MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
-   ((index  2) ? powerBase0[rf] : powerBase1[rf]);
+   write_val = 
hal_data-MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
+   ((index  2) ? powerbase0[rf] : powerbase1[rf]);
break;
-   case 1: /*  Realtek regulatory */
+   case 1: /*  Realtek regulatory */
/*  increase power diff defined by Realtek for 
regulatory */
-   if (pHalData-pwrGroupCnt == 1)
+   if (hal_data-pwrGroupCnt == 1)
chnlGroup = 0;
-   if (pHalData-pwrGroupCnt = pHalData-PGMaxGroup) {
-   if (Channel  3)/*  
Channel 1-2 */
+   if (hal_data-pwrGroupCnt = hal_data-PGMaxGroup) {
+   if (channel  3)
chnlGroup = 0;
-   else if (Channel  6)   /*  Channel 3-5 
*/
+   else if (channel  6)
chnlGroup = 1;
-   else if (Channel  9)   /*  
Channel 6-8 */
+   else if (channel  9)
chnlGroup = 2;
-   else if (Channel  12)  /*  Channel 
9-11 */
+   else if (channel  12)
chnlGroup = 3;
-   else if (Channel  14)  /*  Channel 
12-13 */
+   else if (channel  14)
chnlGroup = 4;
-   else if (Channel == 14) /*  Channel 14 
*/
+   else if (channel == 14)
chnlGroup = 5;
}
-   writeVal = 
pHalData-MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
-   ((index  2) ? powerBase0[rf] : 
powerBase1[rf]);
+   write_val = 
hal_data-MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
+   ((index  2) ? powerbase0[rf] : 
powerbase1[rf]);
break;
case 2: /*  Better regulatory */
/*  don't increase any power diff */
-   writeVal = ((index  2) ? powerBase0[rf] : 
powerBase1[rf]);
+   write_val = ((index  2) ? powerbase0[rf] : 
powerbase1[rf]);
break

[PATCH 07/20] staging: rtl8188eu: Rework function phy_RFSerialWrite()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |   85 +++
 1 file changed, 11 insertions(+), 74 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index ef1082f..2cbaff5 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -110,81 +110,18 @@ static u32 rf_serial_read(struct adapter *adapt,
return ret;
 }
 
-/**
-* Function:phy_RFSerialWrite
-*
-* OverView:Write data to RF register (page 8~)
-*
-* Input:
-*  struct adapter *Adapter,
-*  enum rf_radio_path eRFPath, Radio path of A/B/C/D
-*  u32 Offset, The target 
address to be read
-*  u32 DataThe new 
register Data in the target bit position
-*  of the 
target to be read
-*
-* Output:  None
-* Return:  None
-* Note:Threre are three types of serial operations:
-*  1. Software serial write
-*  2. Hardware LSSI-Low Speed Serial Interface
-*  3. Hardware HSSI-High speed
-*  serial write. Driver need to implement (1) and (2).
-*  This function is equal to the combination of 
RF_ReadReg() and  RFLSSIRead()
- *
- * Note: For RF8256 only
- *  The total count of RTL8256(Zebra4) register is around 
36 bit it only employs
- *  4-bit RF address. RTL8256 uses "register mode control 
bit" (Reg00[12], Reg00[10])
- *  to access register address bigger than 0xf. See 
"Appendix-4 in PHY Configuration
- *  programming guide" for more details.
- *  Thus, we define a sub-finction for RTL8526 register 
address conversion
- *
===
- *  Register Mode  RegCTL[1]   
RegCTL[0]   Note
- * (Reg00[12]) 
(Reg00[10])
- *
===
- *  Reg_Mode0  0   
x   Reg 0 ~15(0x0 ~ 0xf)
- *
--
- *  Reg_Mode1  1   
0   Reg 16 ~30(0x1 ~ 0xf)
- *
--
- *  Reg_Mode2  1   
1   Reg 31 ~ 45(0x1 ~ 0xf)
- *
--
- *
- * 2008/09/02  MH  Add 92S RF definition
- *
- *
- *
-*/
-static void
-phy_RFSerialWrite(
-   struct adapter *Adapter,
-   enum rf_radio_path eRFPath,
-   u32 Offset,
-   u32 Data
-   )
+static void rf_serial_write(struct adapter *adapt,
+   enum rf_radio_path rfpath, u32 offset,
+   u32 data)
 {
-   u32 DataAndAddr = 0;
-   struct hal_data_8188e   *pHalData = 
GET_HAL_DATA(Adapter);
-   struct bb_reg_def *pPhyReg = >PHYRegDef[eRFPath];
-   u32 NewOffset;
-
-
-   /*  2009/06/17 MH We can not execute IO for power save or other 
accident mode. */
-
-   Offset &= 0xff;
-
-   /*  */
-   /*  Switch page for 8256 RF IC */
-   /*  */
-   NewOffset = Offset;
-
-   /*  */
-   /*  Put write addr in [5:0]  and write data in [31:16] */
-   /*  */
-   DataAndAddr = ((NewOffset<<20) | (Data&0x000f)) & 0x0fff;   
/*  T65 RF */
+   u32 data_and_addr = 0;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   struct bb_reg_def *phyreg = _data->PHYRegDef[rfpath];
+   u32 newoffset;
 
-   /*  */
-   /*  Write Operation */
-   /*  */
-   phy_set_bb_reg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, 
DataAndAddr);
+   newoffset = offset & 0xff;
+   data_and_addr = ((newoffset<<20) | (data&0x000f)) & 0x0fff;
+   phy_set_bb_reg(adapt, phyreg->rf3wireOffset, bMaskDWord, data_and_addr);
 }
 
 /**
@@ -251,7 +188,7 @@ rtl8188e_PHY_SetRFReg(
Data = ((Original_Value & (~BitMask)) | (Data << BitShift));
}
 
-   phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data

[PATCH 09/20] staging: rtl8188eu: Rework function rtl8188e_PHY_SetRFReg()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c   |2 +-
 drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c |   32 +++
 drivers/staging/rtl8188eu/hal/odm.c|2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c  |2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   42 +---
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c|4 +-
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |5 ---
 drivers/staging/rtl8188eu/include/phy.h|2 +
 8 files changed, 32 insertions(+), 59 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c 
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
index 670ded7..ddc2f55 100644
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
+++ b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
@@ -179,7 +179,7 @@ static void rtl_rfreg_delay(struct adapter *adapt, enum 
rf_radio_path rfpath,u32
} else if (addr == 0xf9) {
udelay(1);
} else {
-   rtl8188e_PHY_SetRFReg(adapt, rfpath, addr, mask, data);
+   phy_set_rf_reg(adapt, rfpath, addr, mask, data);
udelay(1);
}
 }
diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c 
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index 06c5536..f1a1e78 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -527,14 +527,14 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB)
/* modify RXIQK mode table */
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx 
IQK modify RXIQK mode table!\n"));
phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x);
-   PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
-   PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x3);
-   PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0xf);
-   PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B);
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x3);
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0xf);
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B);
 
/* PA,PAD off */
-   PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980);
-   PHY_SetRFReg(adapt, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000);
+   phy_set_rf_reg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980);
+   phy_set_rf_reg(adapt, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000);
 
phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x8080);
 
@@ -589,10 +589,10 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB)
/* modify RXIQK mode table */
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx 
IQK modify RXIQK mode table 2!\n"));
phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x);
-   PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
-   PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x3);
-   PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0xf);
-   PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa);
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x3);
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0xf);
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa);
phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x8080);
 
/* IQK setting */
@@ -630,7 +630,7 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB)
 
/* reload RF 0xdf */
phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x);
-   PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180);
+   phy_set_rf_reg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180);
 
if (!(regeac & BIT27) &&/* if Tx is OK, check whether 
Rx is OK */
(((regEA4 & 0x03FF)>>16) != 0x132) &&
@@ -1224,18 +1224,18 @@ static void phy_LCCalibrate_8188E(struct adapter 
*adapt, bool is2t)
 
/* 2. Set RF mode = standby mode */
/* Path-A */
-   PHY_SetRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits, 
(RF_Amode&0x8)|0x1);
+   phy_set_rf_reg(adapt, RF_PATH_A, RF_AC, bMask12Bits, 
(RF_Amode&0x8)|0x1);
 
/* Path-B */
if (is2t)
-   PHY_SetRFReg(adapt, RF_PATH_B, RF_AC, bMask12Bits, 
(RF_Bmode&0x8)|0x1);
+   phy_set_rf_reg(ada

[PATCH 12/20] staging: rtl8188eu: Rework function _PHY_SetBWMode92C()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |   98 +--
 1 file changed, 37 insertions(+), 61 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index c33da36..89ec958 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -259,102 +259,78 @@ PHY_SetTxPowerLevel8188E(
rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, [0], 
[0], [0], channel);
 }
 
-/*-
- * Function:PHY_SetBWModeCallback8192C()
- *
- * Overview:Timer callback function for SetSetBWMode
- *
- * Input:  PRT_TIMER   pTimer
- *
- * Output:  NONE
- *
- * Return:  NONE
- *
- * Note:   (1) We do not take j mode into consideration now
- * (2) Will two workitem of "switch channel" and "switch 
channel bandwidth" run
- *  concurrently?
- *---*/
-static void
-_PHY_SetBWMode92C(
-   struct adapter *Adapter
-)
+static void phy_set_bw_mode_callback(struct adapter *adapt)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
-   u8 regBwOpMode;
-   u8 regRRSR_RSC;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   u8 reg_bw_opmode;
+   u8 reg_prsr_rsc;
 
-   if (pHalData->rf_chip == RF_PSEUDO_11N)
+   if (hal_data->rf_chip == RF_PSEUDO_11N)
return;
 
/*  There is no 40MHz mode in RF_8225. */
-   if (pHalData->rf_chip == RF_8225)
+   if (hal_data->rf_chip == RF_8225)
return;
 
-   if (Adapter->bDriverStopped)
+   if (adapt->bDriverStopped)
return;
 
-   /* 3 */
-   /* 3<1>Set MAC register */
-   /* 3 */
+   /* Set MAC register */
 
-   regBwOpMode = usb_read8(Adapter, REG_BWOPMODE);
-   regRRSR_RSC = usb_read8(Adapter, REG_RRSR+2);
+   reg_bw_opmode = usb_read8(adapt, REG_BWOPMODE);
+   reg_prsr_rsc = usb_read8(adapt, REG_RRSR+2);
 
-   switch (pHalData->CurrentChannelBW) {
+   switch (hal_data->CurrentChannelBW) {
case HT_CHANNEL_WIDTH_20:
-   regBwOpMode |= BW_OPMODE_20MHZ;
-   /*  2007/02/07 Mark by Emily because we have not verify whether 
this register works */
-   usb_write8(Adapter, REG_BWOPMODE, regBwOpMode);
+   reg_bw_opmode |= BW_OPMODE_20MHZ;
+   usb_write8(adapt, REG_BWOPMODE, reg_bw_opmode);
break;
case HT_CHANNEL_WIDTH_40:
-   regBwOpMode &= ~BW_OPMODE_20MHZ;
-   /*  2007/02/07 Mark by Emily because we have not verify whether 
this register works */
-   usb_write8(Adapter, REG_BWOPMODE, regBwOpMode);
-   regRRSR_RSC = (regRRSR_RSC&0x90) | 
(pHalData->nCur40MhzPrimeSC<<5);
-   usb_write8(Adapter, REG_RRSR+2, regRRSR_RSC);
+   reg_bw_opmode &= ~BW_OPMODE_20MHZ;
+   usb_write8(adapt, REG_BWOPMODE, reg_bw_opmode);
+   reg_prsr_rsc = (reg_prsr_rsc&0x90) |
+  (hal_data->nCur40MhzPrimeSC<<5);
+   usb_write8(adapt, REG_RRSR+2, reg_prsr_rsc);
break;
default:
break;
}
 
-   /* 3  */
-   /* 3 <2>Set PHY related register */
-   /* 3 */
-   switch (pHalData->CurrentChannelBW) {
-   /* 20 MHz channel*/
+   /* Set PHY related register */
+   switch (hal_data->CurrentChannelBW) {
case HT_CHANNEL_WIDTH_20:
-   phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0);
-   phy_set_bb_reg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
+   phy_set_bb_reg(adapt, rFPGA0_RFMOD, bRFMOD, 0x0);
+   phy_set_bb_reg(adapt, rFPGA1_RFMOD, bRFMOD, 0x0);
break;
-   /* 40 MHz channel*/
case HT_CHANNEL_WIDTH_40:
-   phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1);
-   phy_set_bb_reg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1);
-   /*  Set Control channel to upper or lower. These settings are 
required only for 40MHz */
-   phy_set_bb_reg(Adapter, rCCK0_System, bCCKSideBand, 
(pHalData->nCur40MhzPrimeSC>>1));
-   phy_set_bb_reg(Adapter, rOFDM1_LSTF, 0xC00, 
pHalData->nCur40MhzPrimeSC);
-   phy_set_bb_reg(Adapter, 0x818, (BIT26 | BIT27),
-(pHalData->nCur40MhzPrimeSC == 
HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
+   phy_set_bb_reg(adapt, rFPGA0_RFMOD, bRFMOD, 0x1);
+   phy_set_bb_reg(adapt, rFPGA1_RFMOD, bRFMOD, 0x1);
+

[PATCH 20/20] staging: rtl8188eu: Rename HalHWImg8188E_MAC.c to mac_cfg.c

2014-08-23 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/Makefile|2 +-
 drivers/staging/rtl8188eu/hal/HalHWImg8188E_MAC.c |  133 -
 drivers/staging/rtl8188eu/hal/mac_cfg.c   |  133 +
 3 files changed, 134 insertions(+), 134 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/hal/HalHWImg8188E_MAC.c
 create mode 100644 drivers/staging/rtl8188eu/hal/mac_cfg.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index 412a056..20225b3 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -18,7 +18,7 @@ r8188eu-y :=  \
core/rtw_wlan_util.o\
core/rtw_xmit.o \
hal/fw.o\
-   hal/HalHWImg8188E_MAC.o \
+   hal/mac_cfg.o \
hal/bb_cfg.o \
hal/rf_cfg.o \
hal/HalPhyRf_8188e.o\
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_MAC.c 
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_MAC.c
deleted file mode 100644
index 7d22dd1..000
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_MAC.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/**
-*
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-**/
-
-#include "odm_precomp.h"
-#include 
-
-/* MAC_REG.TXT */
-
-static u32 array_MAC_REG_8188E[] = {
-   0x026, 0x0041,
-   0x027, 0x0035,
-   0x428, 0x000A,
-   0x429, 0x0010,
-   0x430, 0x,
-   0x431, 0x0001,
-   0x432, 0x0002,
-   0x433, 0x0004,
-   0x434, 0x0005,
-   0x435, 0x0006,
-   0x436, 0x0007,
-   0x437, 0x0008,
-   0x438, 0x,
-   0x439, 0x,
-   0x43A, 0x0001,
-   0x43B, 0x0002,
-   0x43C, 0x0004,
-   0x43D, 0x0005,
-   0x43E, 0x0006,
-   0x43F, 0x0007,
-   0x440, 0x005D,
-   0x441, 0x0001,
-   0x442, 0x,
-   0x444, 0x0015,
-   0x445, 0x00F0,
-   0x446, 0x000F,
-   0x447, 0x,
-   0x458, 0x0041,
-   0x459, 0x00A8,
-   0x45A, 0x0072,
-   0x45B, 0x00B9,
-   0x460, 0x0066,
-   0x461, 0x0066,
-   0x480, 0x0008,
-   0x4C8, 0x00FF,
-   0x4C9, 0x0008,
-   0x4CC, 0x00FF,
-   0x4CD, 0x00FF,
-   0x4CE, 0x0001,
-   0x4D3, 0x0001,
-   0x500, 0x0026,
-   0x501, 0x00A2,
-   0x502, 0x002F,
-   0x503, 0x,
-   0x504, 0x0028,
-   0x505, 0x00A3,
-   0x506, 0x005E,
-   0x507, 0x,
-   0x508, 0x002B,
-   0x509, 0x00A4,
-   0x50A, 0x005E,
-   0x50B, 0x,
-   0x50C, 0x004F,
-   0x50D, 0x00A4,
-   0x50E, 0x,
-   0x50F, 0x,
-   0x512, 0x001C,
-   0x514, 0x000A,
-   0x516, 0x000A,
-   0x525, 0x004F,
-   0x550, 0x0010,
-   0x551, 0x0010,
-   0x559, 0x0002,
-   0x55D, 0x00FF,
-   0x605, 0x0030,
-   0x608, 0x000E,
-   0x609, 0x002A,
-   0x620, 0x00FF,
-   0x621, 0x00FF,
-   0x622, 0x00FF,
-   0x623, 0x00FF,
-   0x624, 0x00FF,
-   0x625, 0x00FF,
-   0x626, 0x00FF,
-   0x627, 0x00FF,
-   0x652, 0x0020,
-   0x63C, 0x000A,
-   0x63D, 0x000A,
-

[PATCH 18/20] staging: rtl8188eu: Rename HalHWImg8188E_BB.c to bb_cfg.c

2014-08-23 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/Makefile   |2 +-
 drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c |  715 --
 drivers/staging/rtl8188eu/hal/bb_cfg.c   |  715 ++
 3 files changed, 716 insertions(+), 716 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
 create mode 100644 drivers/staging/rtl8188eu/hal/bb_cfg.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index 7886ea0..600ca8e 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -19,7 +19,7 @@ r8188eu-y :=  \
core/rtw_xmit.o \
hal/fw.o\
hal/HalHWImg8188E_MAC.o \
-   hal/HalHWImg8188E_BB.o  \
+   hal/bb_cfg.o \
hal/HalHWImg8188E_RF.o  \
hal/HalPhyRf_8188e.o\
hal/HalPwrSeqCmd.o  \
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c 
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
deleted file mode 100644
index 80e8cc9..000
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
+++ /dev/null
@@ -1,715 +0,0 @@
-/**
-*
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-**/
-
-#include "odm_precomp.h"
-
-#include 
-
-#define read_next_pair(array, v1, v2, i)   \
-do {   \
-i += 2;\
-v1 = array[i]; \
-v2 = array[i+1];   \
-} while (0)
-
-
-/* AGC_TAB_1T.TXT */
-
-static u32 array_agc_tab_1t_8188e[] = {
-   0xC78, 0xFB01,
-   0xC78, 0xFB010001,
-   0xC78, 0xFB020001,
-   0xC78, 0xFB030001,
-   0xC78, 0xFB040001,
-   0xC78, 0xFB050001,
-   0xC78, 0xFA060001,
-   0xC78, 0xF9070001,
-   0xC78, 0xF8080001,
-   0xC78, 0xF7090001,
-   0xC78, 0xF60A0001,
-   0xC78, 0xF50B0001,
-   0xC78, 0xF40C0001,
-   0xC78, 0xF30D0001,
-   0xC78, 0xF20E0001,
-   0xC78, 0xF10F0001,
-   0xC78, 0xF011,
-   0xC78, 0xEF110001,
-   0xC78, 0xEE120001,
-   0xC78, 0xED130001,
-   0xC78, 0xEC140001,
-   0xC78, 0xEB150001,
-   0xC78, 0xEA160001,
-   0xC78, 0xE9170001,
-   0xC78, 0xE8180001,
-   0xC78, 0xE7190001,
-   0xC78, 0xE61A0001,
-   0xC78, 0xE51B0001,
-   0xC78, 0xE41C0001,
-   0xC78, 0xE31D0001,
-   0xC78, 0xE21E0001,
-   0xC78, 0xE11F0001,
-   0xC78, 0x8A21,
-   0xC78, 0x89210001,
-   0xC78, 0x88220001,
-   0xC78, 0x87230001,
-   0xC78, 0x86240001,
-   0xC78, 0x85250001,
-   0xC78, 0x84260001,
-   0xC78, 0x83270001,
-   0xC78, 0x82280001,
-   0xC78, 0x6B290001,
-   0xC78, 0x6A2A0001,
-   0xC78, 0x692B0001,
-   0xC78, 0x682C0001,
-   0xC78, 0x672D0001,
-   0xC78, 0x662E0001,
-   0xC78, 0x652F0001,
-   0xC78, 0x6431,
-   0xC78, 0x63310001,
-   0xC78, 0x62320001,
-   0xC78, 0x61330001,
-   0xC78, 0x46340001,
-   0xC78, 0x45350001,
-   0xC78, 0x44360001,
-   0xC78, 0x43370001,
-   0xC78, 0x42380001,
-   0xC78, 0x41390001,
-   0xC78, 0x403A0001,
-   0xC78, 0x403B0001,
-   0xC78, 0x403C0001,
-   0xC78, 0x403D0001,
-   0xC78, 0x403E0001,
-   0xC78, 0x403F0001,
-   0xC78, 0xFB41,
-   0xC78, 0xFB410001,
-   0xC78, 0xFB420001,
-   0xC78, 0xFB430001,
-   0xC78,

[PATCH 19/20] staging: rtl8188eu: Rename HalHWImg8188E_RF.c to rf_cfg.c

2014-08-23 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/Makefile   |2 +-
 drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c |  320 --
 drivers/staging/rtl8188eu/hal/rf_cfg.c   |  320 ++
 3 files changed, 321 insertions(+), 321 deletions(-)
 delete mode 100644 drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
 create mode 100644 drivers/staging/rtl8188eu/hal/rf_cfg.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index 600ca8e..412a056 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -20,7 +20,7 @@ r8188eu-y :=  \
hal/fw.o\
hal/HalHWImg8188E_MAC.o \
hal/bb_cfg.o \
-   hal/HalHWImg8188E_RF.o  \
+   hal/rf_cfg.o \
hal/HalPhyRf_8188e.o\
hal/HalPwrSeqCmd.o  \
hal/Hal8188EPwrSeq.o\
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c 
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
deleted file mode 100644
index ddc2f55..000
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/**
-*
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-**/
-
-#include "odm_precomp.h"
-
-#include 
-
-static bool check_condition(struct adapter *adapt, const u32  condition)
-{
-   struct odm_dm_struct *odm = _HAL_DATA(adapt)->odmpriv;
-   u32 _board = odm->BoardType;
-   u32 _platform = odm->SupportPlatform;
-   u32 _interface = odm->SupportInterface;
-   u32 cond = condition;
-
-   if (condition == 0xCDCDCDCD)
-   return true;
-
-   cond = condition & 0x00FF;
-   if ((_board == cond) && cond != 0x00)
-   return false;
-
-   cond = condition & 0xFF00;
-   cond = cond >> 8;
-   if ((_interface & cond) == 0 && cond != 0x07)
-   return false;
-
-   cond = condition & 0x00FF;
-   cond = cond >> 16;
-   if ((_platform & cond) == 0 && cond != 0x0F)
-   return false;
-   return true;
-}
-
-/* RadioA_1T.TXT */
-
-static u32 Array_RadioA_1T_8188E[] = {
-   0x000, 0x0003,
-   0x008, 0x00084000,
-   0x018, 0x0407,
-   0x019, 0x0012,
-   0x01E, 0x00080009,
-   0x01F, 0x0880,
-   0x02F, 0x0001A060,
-   0x03F, 0x,
-   0x042, 0x60C0,
-   0x057, 0x000D,
-   0x058, 0x000BE180,
-   0x067, 0x1552,
-   0x083, 0x,
-   0x0B0, 0x000FF8FC,
-   0x0B1, 0x00054400,
-   0x0B2, 0x000CCC19,
-   0x0B4, 0x00043003,
-   0x0B6, 0x0004953E,
-   0x0B7, 0x0001C718,
-   0x0B8, 0x60FF,
-   0x0B9, 0x00080001,
-   0x0BA, 0x0004,
-   0x0BB, 0x0400,
-   0x0BF, 0x000C,
-   0x0C2, 0x2400,
-   0x0C3, 0x0009,
-   0x0C4, 0x00040C91,
-   0x0C5, 0x0009,
-   0x0C6, 0x00A3,
-   0x0C7, 0x00088820,
-   0x0C8, 0x00076C06,
-   0x0C9, 0x,
-   0x0CA, 0x0008,
-   0x0DF, 0x0180,
-   0x0EF, 0x01A0,
-   0x051, 0x0006B27D,
-   0xFF0F041F, 0xABCD,
-   0x052, 0x0007E4DD,
-   0xCDCDCDCD, 0xCDCD,
-   0x052, 0x0007E49D,
-   0xFF0F041F, 0xDEAD,
-   0x053, 0x0073,
-   0x056, 0x00051FF3,
-   0x035, 0x0086,
-   0x035, 0x0186,
-   0x035, 0x0286,
-   0x036, 0x1C25,
-   0x036, 0x9C25,
-   0x036, 0x00011C25,
-   0x036, 0x00019C25,
-   0x0B6, 0x00048538,
-   0x018, 0x0C07,
-   0x05A, 0x

[PATCH 17/20] staging: rtl8188eu: Rename rtl8188e_phycfg.c to phy.c

2014-08-23 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/Makefile  |2 +-
 drivers/staging/rtl8188eu/hal/phy.c |  381 +++
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |  381 ---
 3 files changed, 382 insertions(+), 382 deletions(-)
 create mode 100644 drivers/staging/rtl8188eu/hal/phy.c
 delete mode 100644 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index 1b8c89b..7886ea0 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -34,7 +34,7 @@ r8188eu-y :=  \
hal/rtl8188e_cmd.o  \
hal/rtl8188e_dm.o   \
hal/rtl8188e_hal_init.o \
-   hal/rtl8188e_phycfg.o   \
+   hal/phy.o \
hal/rtl8188e_rf6052.o   \
hal/rtl8188e_rxdesc.o   \
hal/rtl8188e_xmit.o \
diff --git a/drivers/staging/rtl8188eu/hal/phy.c 
b/drivers/staging/rtl8188eu/hal/phy.c
new file mode 100644
index 000..5041da0
--- /dev/null
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -0,0 +1,381 @@
+/**
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
**/
+#define _RTL8188E_PHYCFG_C_
+
+#include 
+#include 
+#include 
+#include 
+
+#define MAX_PRECMD_CNT 16
+#define MAX_RFDEPENDCMD_CNT 16
+#define MAX_POSTCMD_CNT 16
+
+#define MAX_DOZE_WAITING_TIMES_9x 64
+
+static u32 cal_bit_shift(u32 bitmask)
+{
+   u32 i;
+
+   for (i = 0; i <= 31; i++) {
+   if (((bitmask >> i) & 0x1) == 1)
+   break;
+   }
+   return i;
+}
+
+u32 phy_query_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask)
+{
+   u32 return_value = 0, original_value, bit_shift;
+
+   original_value = usb_read32(adapt, regaddr);
+   bit_shift = cal_bit_shift(bitmask);
+   return_value = (original_value & bitmask) >> bit_shift;
+   return return_value;
+}
+
+void phy_set_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask, u32 data)
+{
+   u32 original_value, bit_shift;
+
+   if (bitmask != bMaskDWord) { /* if not "double word" write */
+   original_value = usb_read32(adapt, regaddr);
+   bit_shift = cal_bit_shift(bitmask);
+   data = ((original_value & (~bitmask)) | (data << bit_shift));
+   }
+
+   usb_write32(adapt, regaddr, data);
+}
+
+static u32 rf_serial_read(struct adapter *adapt,
+   enum rf_radio_path rfpath, u32 offset)
+{
+   u32 ret = 0;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   struct bb_reg_def *phyreg = _data->PHYRegDef[rfpath];
+   u32 newoffset;
+   u32 tmplong, tmplong2;
+   u8 rfpi_enable = 0;
+
+   offset &= 0xff;
+   newoffset = offset;
+
+   tmplong = phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord);
+   if (rfpath == RF_PATH_A)
+   tmplong2 = tmplong;
+   else
+   tmplong2 = phy_query_bb_reg(adapt, phyreg->rfHSSIPara2,
+   bMaskDWord);
+
+   tmplong2 = (tmplong2 & (~bLSSIReadAddress)) |
+  (newoffset<<23) | bLSSIReadEdge;
+
+   phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord,
+  tmplong&(~bLSSIReadEdge));
+   udelay(10);
+
+   phy_set_bb_reg(adapt, phyreg->rfHSSIPara2, bMaskDWord, tmplong2);
+   udelay(100);
+
+   udelay(10);
+
+   if (rfpath == RF_PATH_A)
+   rfpi_enable = (u8)phy_query_bb_reg(adapt, 
rFPGA0_XA_HSSIParameter1, BIT8);
+   else if (rfpath == RF_PATH_B)
+   rfpi_enable = (u8)phy_query_bb_reg(adapt, 
rFPGA0_XB_HSSIParameter1, BIT8);
+
+   if (rfpi_enable)
+   ret = phy_query_bb_reg(adapt, phyreg->rfLSSIReadBackPi,
+  bLSSIReadBackData);
+   else
+   ret = phy_query_bb_reg(adapt, phyreg->rfLSSIReadBack,
+  bLSS

[PATCH 13/20] staging: rtl8188eu: Rework function _PHY_SwChnl8192C()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |   22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 89ec958..1aa5a56 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -367,24 +367,24 @@ void PHY_SetBWMode8188E(struct adapter *Adapter, enum 
ht_channel_width Bandwidth
pHalData->CurrentChannelBW = tmpBW;
 }
 
-static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel)
+static void phy_sw_chnl_callback(struct adapter *adapt, u8 channel)
 {
-   u8 eRFPath;
+   u8 rf_path;
u32 param1, param2;
-   struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
 
-   if (Adapter->bNotifyChannelChange)
+   if (adapt->bNotifyChannelChange)
DBG_88E("[%s] ch = %d\n", __func__, channel);
 
-   /* s1. pre common command - CmdID_SetTxPowerLevel */
-   PHY_SetTxPowerLevel8188E(Adapter, channel);
+   PHY_SetTxPowerLevel8188E(adapt, channel);
 
-   /* s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, 
param2=channel */
param1 = RF_CHNLBW;
param2 = channel;
-   for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
-   pHalData->RfRegChnlVal[eRFPath] = 
((pHalData->RfRegChnlVal[eRFPath] & 0xfc00) | param2);
-   phy_set_rf_reg(Adapter, (enum rf_radio_path)eRFPath, param1, 
bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
+   for (rf_path = 0; rf_path < hal_data->NumTotalRFPath; rf_path++) {
+   hal_data->RfRegChnlVal[rf_path] = 
(hal_data->RfRegChnlVal[rf_path] &
+ 0xfc00) | param2;
+   phy_set_rf_reg(adapt, (enum rf_radio_path)rf_path, param1,
+  bRFRegOffsetMask, 
hal_data->RfRegChnlVal[rf_path]);
}
 }
 
@@ -404,7 +404,7 @@ void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
pHalData->CurrentChannel = channel;
 
if ((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) {
-   _PHY_SwChnl8192C(Adapter, channel);
+   phy_sw_chnl_callback(Adapter, channel);
 
if (bResult)
;
-- 
1.7.10.4

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[PATCH 15/20] staging: rtl8188eu: Rework function PHY_SetBWMode8188E()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c  |2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   33 ++--
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |4 ---
 drivers/staging/rtl8188eu/include/phy.h|3 ++
 4 files changed, 13 insertions(+), 29 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index cc2988c..f41e83d 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -221,7 +221,7 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
 
pHalFunc->read_chip_version = _read_chip_version;
 
-   pHalFunc->set_bwmode_handler = _SetBWMode8188E;
+   pHalFunc->set_bwmode_handler = _set_bw_mode;
pHalFunc->set_channel_handler = _SwChnl8188E;
 
pHalFunc->hal_dm_watchdog = _HalDmWatchDog;
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 85e05ae..b1ff892 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -319,34 +319,19 @@ static void phy_set_bw_mode_callback(struct adapter 
*adapt)
}
 }
 
- 
/*-
- * Function:   SetBWMode8190Pci()
- *
- * Overview:  This function is export to "HalCommon" moudule
- *
- * Input:  struct adapter *Adapter
- * enum ht_channel_width Bandwidth 20M or 40M
- *
- * Output:  NONE
- *
- * Return:  NONE
- *
- * Note:   We do not take j mode into consideration now
- *---*/
-void PHY_SetBWMode8188E(struct adapter *Adapter, enum ht_channel_width 
Bandwidth,  /*  20M or 40M */
-   unsigned char   Offset) /*  Upper, Lower, or 
Don't care */
+void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
+unsigned char offset)
 {
-   struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
-   enum ht_channel_width tmpBW = pHalData->CurrentChannelBW;
-
-   pHalData->CurrentChannelBW = Bandwidth;
+   struct hal_data_8188e   *hal_data = GET_HAL_DATA(adapt);
+   enum ht_channel_width tmp_bw = hal_data->CurrentChannelBW;
 
-   pHalData->nCur40MhzPrimeSC = Offset;
+   hal_data->CurrentChannelBW = bandwidth;
+   hal_data->nCur40MhzPrimeSC = offset;
 
-   if ((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved))
-   phy_set_bw_mode_callback(Adapter);
+   if ((!adapt->bDriverStopped) && (!adapt->bSurpriseRemoved))
+   phy_set_bw_mode_callback(adapt);
else
-   pHalData->CurrentChannelBW = tmpBW;
+   hal_data->CurrentChannelBW = tmp_bw;
 }
 
 static void phy_sw_chnl_callback(struct adapter *adapt, u8 channel)
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h 
b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
index 1835933..f8bc63c 100644
--- a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
+++ b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
@@ -207,10 +207,6 @@ void PHY_GetTxPowerLevel8188E(struct adapter *adapter, u32 
*powerlevel);
 
 void PHY_ScanOperationBackup8188E(struct adapter *Adapter, u8 Operation);
 
-/*  Switch bandwidth for 8192S */
-void PHY_SetBWMode8188E(struct adapter *adapter,
-   enum ht_channel_width chnlwidth, unsigned char offset);
-
 /*  channel switch related funciton */
 void PHY_SwChnl8188E(struct adapter *adapter, u8 channel);
 /*  Call after initialization */
diff --git a/drivers/staging/rtl8188eu/include/phy.h 
b/drivers/staging/rtl8188eu/include/phy.h
index 853d1e3..5b93987 100644
--- a/drivers/staging/rtl8188eu/include/phy.h
+++ b/drivers/staging/rtl8188eu/include/phy.h
@@ -10,3 +10,6 @@ void phy_set_rf_reg(struct adapter *adapt, enum rf_radio_path 
rf_path,
u32 reg_addr, u32 bit_mask, u32 data);
 
 void phy_set_tx_power_level(struct adapter *adapt, u8 channel);
+
+void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
+unsigned char offset);
-- 
1.7.10.4

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[PATCH 11/20] staging: rtl8188eu: Rework function phy_PowerIndexCheck88E()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |   17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index f4df9ef..c33da36 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -211,15 +211,16 @@ static void get_tx_power_index(struct adapter *adapt, u8 
channel, u8 *cck_pwr,
}
 }
 
-static void phy_PowerIndexCheck88E(struct adapter *Adapter, u8 channel, u8 
*cckPowerLevel,
-  u8 *ofdmPowerLevel, u8 *BW20PowerLevel, u8 
*BW40PowerLevel)
+static void phy_power_index_check(struct adapter *adapt, u8 channel,
+ u8 *cck_pwr, u8 *ofdm_pwr, u8 *bw20_pwr,
+ u8 *bw40_pwr)
 {
-   struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
 
-   pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0];
-   pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0];
-   pHalData->CurrentBW2024GTxPwrIdx = BW20PowerLevel[0];
-   pHalData->CurrentBW4024GTxPwrIdx = BW40PowerLevel[0];
+   hal_data->CurrentCckTxPwrIdx = cck_pwr[0];
+   hal_data->CurrentOfdm24GTxPwrIdx = ofdm_pwr[0];
+   hal_data->CurrentBW2024GTxPwrIdx = bw20_pwr[0];
+   hal_data->CurrentBW4024GTxPwrIdx = bw40_pwr[0];
 }
 
 /*-
@@ -252,7 +253,7 @@ PHY_SetTxPowerLevel8188E(
 
get_tx_power_index(Adapter, channel, [0], 
[0], [0], [0]);
 
-   phy_PowerIndexCheck88E(Adapter, channel, [0], 
[0], [0], [0]);
+   phy_power_index_check(Adapter, channel, [0], 
[0], [0], [0]);
 
rtl8188e_PHY_RF6052SetCckTxPower(Adapter, [0]);
rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, [0], 
[0], [0], channel);
-- 
1.7.10.4

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[PATCH 16/20] staging: rtl8188eu: Rework function PHY_SwChnl8188E()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c  |2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   27 +---
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |2 --
 drivers/staging/rtl8188eu/include/phy.h|1 +
 4 files changed, 14 insertions(+), 18 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index f41e83d..7a8fe53 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -222,7 +222,7 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
pHalFunc->read_chip_version = _read_chip_version;
 
pHalFunc->set_bwmode_handler = _set_bw_mode;
-   pHalFunc->set_channel_handler = _SwChnl8188E;
+   pHalFunc->set_channel_handler = _sw_chnl;
 
pHalFunc->hal_dm_watchdog = _HalDmWatchDog;
 
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index b1ff892..5041da0 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -355,30 +355,27 @@ static void phy_sw_chnl_callback(struct adapter *adapt, 
u8 channel)
}
 }
 
-void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
+void phy_sw_chnl(struct adapter *adapt, u8 channel)
 {
-   /*  Call after initialization */
-   struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
-   u8 tmpchannel = pHalData->CurrentChannel;
-   bool  bResult = true;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   u8 tmpchannel = hal_data->CurrentChannel;
+   bool  result = true;
 
-   if (pHalData->rf_chip == RF_PSEUDO_11N)
-   return; /* return immediately if it is peudo-phy */
+   if (hal_data->rf_chip == RF_PSEUDO_11N)
+   return;
 
if (channel == 0)
channel = 1;
 
-   pHalData->CurrentChannel = channel;
+   hal_data->CurrentChannel = channel;
 
-   if ((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) {
-   phy_sw_chnl_callback(Adapter, channel);
+   if ((!adapt->bDriverStopped) && (!adapt->bSurpriseRemoved)) {
+   phy_sw_chnl_callback(adapt, channel);
 
-   if (bResult)
-   ;
-   else
-   pHalData->CurrentChannel = tmpchannel;
+   if (!result)
+   hal_data->CurrentChannel = tmpchannel;
 
} else {
-   pHalData->CurrentChannel = tmpchannel;
+   hal_data->CurrentChannel = tmpchannel;
}
 }
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h 
b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
index f8bc63c..20e6b40 100644
--- a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
+++ b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
@@ -207,8 +207,6 @@ void PHY_GetTxPowerLevel8188E(struct adapter *adapter, u32 
*powerlevel);
 
 void PHY_ScanOperationBackup8188E(struct adapter *Adapter, u8 Operation);
 
-/*  channel switch related funciton */
-void PHY_SwChnl8188E(struct adapter *adapter, u8 channel);
 /*  Call after initialization */
 void ChkFwCmdIoDone(struct adapter *adapter);
 
diff --git a/drivers/staging/rtl8188eu/include/phy.h 
b/drivers/staging/rtl8188eu/include/phy.h
index 5b93987..defed4a 100644
--- a/drivers/staging/rtl8188eu/include/phy.h
+++ b/drivers/staging/rtl8188eu/include/phy.h
@@ -13,3 +13,4 @@ void phy_set_tx_power_level(struct adapter *adapt, u8 
channel);
 
 void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
 unsigned char offset);
+void phy_sw_chnl(struct adapter *adapt, u8 channel);
-- 
1.7.10.4

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[PATCH 14/20] staging: rtl8188eu: Rework function PHY_SetTxPowerLevel8188E()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c |2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   44 ++--
 drivers/staging/rtl8188eu/hal/usb_halinit.c|2 +-
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |1 -
 drivers/staging/rtl8188eu/include/phy.h|2 +
 5 files changed, 17 insertions(+), 34 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c 
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index f1a1e78..0e58597 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -114,7 +114,7 @@ static void odm_TxPwrTrackSetPwr88E(struct odm_dm_struct 
*dm_odm)
 {
if (dm_odm->BbSwingFlagOfdm || dm_odm->BbSwingFlagCck) {
ODM_RT_TRACE(dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 
("odm_TxPwrTrackSetPwr88E CH=%d\n", *(dm_odm->pChannel)));
-   PHY_SetTxPowerLevel8188E(dm_odm->Adapter, *(dm_odm->pChannel));
+   phy_set_tx_power_level(dm_odm->Adapter, *(dm_odm->pChannel));
dm_odm->BbSwingFlagOfdm = false;
dm_odm->BbSwingFlagCck  = false;
}
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 1aa5a56..85e05ae 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -223,40 +223,22 @@ static void phy_power_index_check(struct adapter *adapt, 
u8 channel,
hal_data->CurrentBW4024GTxPwrIdx = bw40_pwr[0];
 }
 
-/*-
- * Function:SetTxPowerLevel8190()
- *
- * Overview:This function is export to "HalCommon" moudule
- * We must consider RF path later!!!
- *
- * Input:   struct adapter *Adapter
- * u8  channel
- *
- * Output:  NONE
- *
- * Return:  NONE
- * 2008/11/04  MHC We remove EEPROM_93C56.
- * We need to move CCX relative 
code to independet file.
- * 2009/01/21  MHC Support new EEPROM format from SD3 
requirement.
- *
- *---*/
-void
-PHY_SetTxPowerLevel8188E(
-   struct adapter *Adapter,
-   u8 channel
-   )
+void phy_set_tx_power_level(struct adapter *adapt, u8 channel)
 {
-   u8 cckPowerLevel[MAX_TX_COUNT] = {0};
-   u8 ofdmPowerLevel[MAX_TX_COUNT] = {0};/*  [0]:RF-A, [1]:RF-B */
-   u8 BW20PowerLevel[MAX_TX_COUNT] = {0};
-   u8 BW40PowerLevel[MAX_TX_COUNT] = {0};
+   u8 cck_pwr[MAX_TX_COUNT] = {0};
+   u8 ofdm_pwr[MAX_TX_COUNT] = {0};/*  [0]:RF-A, [1]:RF-B */
+   u8 bw20_pwr[MAX_TX_COUNT] = {0};
+   u8 bw40_pwr[MAX_TX_COUNT] = {0};
 
-   get_tx_power_index(Adapter, channel, [0], 
[0], [0], [0]);
+   get_tx_power_index(adapt, channel, _pwr[0], _pwr[0],
+  _pwr[0], _pwr[0]);
 
-   phy_power_index_check(Adapter, channel, [0], 
[0], [0], [0]);
+   phy_power_index_check(adapt, channel, _pwr[0], _pwr[0],
+ _pwr[0], _pwr[0]);
 
-   rtl8188e_PHY_RF6052SetCckTxPower(Adapter, [0]);
-   rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, [0], 
[0], [0], channel);
+   rtl8188e_PHY_RF6052SetCckTxPower(adapt, _pwr[0]);
+   rtl8188e_PHY_RF6052SetOFDMTxPower(adapt, _pwr[0], _pwr[0],
+ _pwr[0], channel);
 }
 
 static void phy_set_bw_mode_callback(struct adapter *adapt)
@@ -376,7 +358,7 @@ static void phy_sw_chnl_callback(struct adapter *adapt, u8 
channel)
if (adapt->bNotifyChannelChange)
DBG_88E("[%s] ch = %d\n", __func__, channel);
 
-   PHY_SetTxPowerLevel8188E(adapt, channel);
+   phy_set_tx_power_level(adapt, channel);
 
param1 = RF_CHNLBW;
param2 = channel;
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c 
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index 968707e..f56cbdf 100644
--- a/drivers/staging/rtl8188eu/hal/usb_halinit.c
+++ b/drivers/staging/rtl8188eu/hal/usb_halinit.c
@@ -829,7 +829,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
 
 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
/*  2010/12/17 MH We need to set TX power according to EFUSE content at 
first. */
-   PHY_SetTxPowerLevel8188E(Adapter, haldata->CurrentChannel);
+   phy_set_tx_power_level(Adapter, haldata->CurrentChannel);
 
 /*  Move by Neo for USB SS to below setp */
 /* _RfPowerSave(Adapter); */
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h 
b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
index 94f9bf0..1835933 100644
--- a/drivers/staging/rtl8188eu/include/Hal8

[PATCH 10/20] staging: rtl8188eu: Rework function getTxPowerIndex88E()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |  105 ++-
 1 file changed, 45 insertions(+), 60 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 83cd19d..f4df9ef 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -150,78 +150,63 @@ void phy_set_rf_reg(struct adapter *adapt, enum 
rf_radio_path rf_path,
rf_serial_write(adapt, rf_path, reg_addr, data);
 }
 
-static void getTxPowerIndex88E(struct adapter *Adapter, u8 channel, u8 
*cckPowerLevel,
-  u8 *ofdmPowerLevel, u8 *BW20PowerLevel,
-  u8 *BW40PowerLevel)
+static void get_tx_power_index(struct adapter *adapt, u8 channel, u8 *cck_pwr,
+  u8 *ofdm_pwr, u8 *bw20_pwr, u8 *bw40_pwr)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
u8 index = (channel - 1);
u8 TxCount = 0, path_nums;
 
-   if ((RF_1T2R == pHalData->rf_type) || (RF_1T1R == pHalData->rf_type))
+   if ((RF_1T2R == hal_data->rf_type) || (RF_1T1R == hal_data->rf_type))
path_nums = 1;
else
path_nums = 2;
 
for (TxCount = 0; TxCount < path_nums; TxCount++) {
if (TxCount == RF_PATH_A) {
-   /*  1. CCK */
-   cckPowerLevel[TxCount]  = 
pHalData->Index24G_CCK_Base[TxCount][index];
-   /* 2. OFDM */
-   ofdmPowerLevel[TxCount] = 
pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
-   pHalData->OFDM_24G_Diff[TxCount][RF_PATH_A];
-   /*  1. BW20 */
-   BW20PowerLevel[TxCount] = 
pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
-   pHalData->BW20_24G_Diff[TxCount][RF_PATH_A];
-   /* 2. BW40 */
-   BW40PowerLevel[TxCount] = 
pHalData->Index24G_BW40_Base[TxCount][index];
+   cck_pwr[TxCount] = 
hal_data->Index24G_CCK_Base[TxCount][index];
+   ofdm_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index]+
+   
hal_data->OFDM_24G_Diff[TxCount][RF_PATH_A];
+
+   bw20_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index]+
+   
hal_data->BW20_24G_Diff[TxCount][RF_PATH_A];
+   bw40_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[TxCount][index];
} else if (TxCount == RF_PATH_B) {
-   /*  1. CCK */
-   cckPowerLevel[TxCount]  = 
pHalData->Index24G_CCK_Base[TxCount][index];
-   /* 2. OFDM */
-   ofdmPowerLevel[TxCount] = 
pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
-   pHalData->BW20_24G_Diff[RF_PATH_A][index]+
-   pHalData->BW20_24G_Diff[TxCount][index];
-   /*  1. BW20 */
-   BW20PowerLevel[TxCount] = 
pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
-   pHalData->BW20_24G_Diff[TxCount][RF_PATH_A]+
-   pHalData->BW20_24G_Diff[TxCount][index];
-   /* 2. BW40 */
-   BW40PowerLevel[TxCount] = 
pHalData->Index24G_BW40_Base[TxCount][index];
+   cck_pwr[TxCount] = 
hal_data->Index24G_CCK_Base[TxCount][index];
+   ofdm_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index]+
+   hal_data->BW20_24G_Diff[RF_PATH_A][index]+
+   hal_data->BW20_24G_Diff[TxCount][index];
+
+   bw20_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[RF_PATH_A][index]+
+   hal_data->BW20_24G_Diff[TxCount][RF_PATH_A]+
+   hal_data->BW20_24G_Diff[TxCount][index];
+   bw40_pwr[TxCount] = 
hal_data->Index24G_BW40_Base[TxCount][index];
} else if (TxCount == RF_PATH_C) {
-   /*  1. CCK */
-   cckPowerLevel[TxCount]  = 
pHalData->Index24G_CCK_Base[TxCount][index];
-   /* 2. OFDM */
-   ofdmPowerLevel[TxCount] = 
pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
-   pHalData->BW20_24G_Diff[RF_PATH_A][index]+
-   pHalData->BW20_24G_Diff[RF_PATH_B][index]+
-   pHalData->BW20_24G_Diff[TxCount][index];
-   /*  1. BW20 */
-   BW20PowerLevel[TxCount] =

[PATCH 06/20] staging: rtl8188eu: Rework function phy_RFSerialRead()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |   99 ---
 1 file changed, 34 insertions(+), 65 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 752ca42..ef1082f 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -64,81 +64,50 @@ void phy_set_bb_reg(struct adapter *adapt, u32 regaddr, u32 
bitmask, u32 data)
usb_write32(adapt, regaddr, data);
 }
 
-/*  */
-/*  2. RF register R/W API */
-/*  */
-/**
-* Function:phy_RFSerialRead
-*
-* OverView:Read regster from RF chips
-*
-* Input:
-*  struct adapter *Adapter,
-*  enum rf_radio_path eRFPath, Radio path of A/B/C/D
-*  u32 Offset, The target 
address to be read
-*
-* Output:  None
-* Return:  u32 reback value
-* Note:Threre are three types of serial operations:
-*  1. Software serial write
-*  2. Hardware LSSI-Low Speed Serial Interface
-*  3. Hardware HSSI-High speed
-*  serial write. Driver need to implement (1) and (2).
-*  This function is equal to the combination of 
RF_ReadReg() and  RFLSSIRead()
-*/
-static u32
-phy_RFSerialRead(
-   struct adapter *Adapter,
-   enum rf_radio_path eRFPath,
-   u32 Offset
-   )
+static u32 rf_serial_read(struct adapter *adapt,
+   enum rf_radio_path rfpath, u32 offset)
 {
-   u32 retValue = 0;
-   struct hal_data_8188e   *pHalData = 
GET_HAL_DATA(Adapter);
-   struct bb_reg_def *pPhyReg = >PHYRegDef[eRFPath];
-   u32 NewOffset;
+   u32 ret = 0;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   struct bb_reg_def *phyreg = _data->PHYRegDef[rfpath];
+   u32 newoffset;
u32 tmplong, tmplong2;
-   u8  RfPiEnable = 0;
-   /*  */
-   /*  Make sure RF register offset is correct */
-   /*  */
-   Offset &= 0xff;
+   u8 rfpi_enable = 0;
 
-   /*  */
-   /*  Switch page for 8256 RF IC */
-   /*  */
-   NewOffset = Offset;
+   offset &= 0xff;
+   newoffset = offset;
 
-   /*  For 92S LSSI Read RFLSSIRead */
-   /*  For RF A/B write 0x824/82c(does not work in the future) */
-   /*  We must use 0x824 for RF A and B to execute read trigger */
-   tmplong = phy_query_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2, 
bMaskDWord);
-   if (eRFPath == RF_PATH_A)
+   tmplong = phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord);
+   if (rfpath == RF_PATH_A)
tmplong2 = tmplong;
else
-   tmplong2 = phy_query_bb_reg(Adapter, pPhyReg->rfHSSIPara2, 
bMaskDWord);
+   tmplong2 = phy_query_bb_reg(adapt, phyreg->rfHSSIPara2,
+   bMaskDWord);
 
-   tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | 
bLSSIReadEdge;  /* T65 RF */
+   tmplong2 = (tmplong2 & (~bLSSIReadAddress)) |
+  (newoffset<<23) | bLSSIReadEdge;
 
-   phy_set_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, 
tmplong&(~bLSSIReadEdge));
-   udelay(10);/*  PlatformStallExecution(10); */
+   phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord,
+  tmplong&(~bLSSIReadEdge));
+   udelay(10);
 
-   phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2);
-   udelay(100);/* PlatformStallExecution(100); */
+   phy_set_bb_reg(adapt, phyreg->rfHSSIPara2, bMaskDWord, tmplong2);
+   udelay(100);
 
-   udelay(10);/* PlatformStallExecution(10); */
+   udelay(10);
 
-   if (eRFPath == RF_PATH_A)
-   RfPiEnable = (u8)phy_query_bb_reg(Adapter, 
rFPGA0_XA_HSSIParameter1, BIT8);
-   else if (eRFPath == RF_PATH_B)
-   RfPiEnable = (u8)phy_query_bb_reg(Adapter, 
rFPGA0_XB_HSSIParameter1, BIT8);
+   if (rfpath == RF_PATH_A)
+   rfpi_enable = (u8)phy_query_bb_reg(adapt, 
rFPGA0_XA_HSSIParameter1, BIT8);
+   else if (rfpath == RF_PATH_B)
+   rfpi_enable = (u8)phy_query_bb_reg(adapt, 
rFPGA0_XB_HSSIParameter1, BIT8);
 
-   if (RfPiEnable) {   /*  Read from BBreg8b8, 12 bits for 8190, 
20bits for T65 RF */
-   retValue = phy_query_bb_reg(Adapter, pPhyReg->rfLSSIReadBackPi, 
bLSSIReadBackData);
-   } else {/* Read from BBreg8a0, 12 bits for 8190, 20 bits for 
T65 RF */
-   retValue = phy_query_bb_reg(Adapter, pPhyReg->rfLSSIReadBack, 
bLSSIReadBackData);
-   }
-   return retValue;
+   if (rfpi_enable)
+

[PATCH 05/20] staging: rtl8188eu: Rework function PHY_SetBBReg()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c   |6 +-
 drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c   |   16 +-
 drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c |  176 ++--
 drivers/staging/rtl8188eu/hal/odm.c|   34 ++--
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c   |  144 
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   53 ++
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c|   12 +-
 drivers/staging/rtl8188eu/hal/usb_halinit.c|6 +-
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |4 -
 drivers/staging/rtl8188eu/include/phy.h|1 +
 10 files changed, 216 insertions(+), 236 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c 
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
index 0c5dc26..80e8cc9 100644
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
+++ b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
@@ -174,7 +174,7 @@ static bool set_baseband_agc_config(struct adapter *adapt)
u32 v2 = array[i+1];
 
if (v1 < 0xCDCDCDCD){
-   PHY_SetBBReg(adapt, v1, bMaskDWord, v2);
+   phy_set_bb_reg(adapt, v1, bMaskDWord, v2);
udelay(1);
}
}
@@ -392,7 +392,7 @@ static void rtl_bb_delay(struct adapter *adapt, u32 addr, 
u32 data)
} else if (addr == 0xf9) {
udelay(1);
} else {
-   PHY_SetBBReg(adapt, addr, bMaskDWord, data);
+   phy_set_bb_reg(adapt, addr, bMaskDWord, data);
/*  Add 1us delay between BB/RF register setting. */
udelay(1);
}
@@ -709,7 +709,7 @@ bool rtl88eu_phy_bb_config(struct adapter *adapt)
 
/*  write 0x24[16:11] = 0x24[22:17] = crystal_cap */
crystal_cap = hal_data->CrystalCap & 0x3F;
-   PHY_SetBBReg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800, (crystal_cap | 
(crystal_cap << 6)));
+   phy_set_bb_reg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800, (crystal_cap | 
(crystal_cap << 6)));
 
return rtstatus;
 }
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c 
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
index 0284602..670ded7 100644
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
+++ b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
@@ -255,17 +255,18 @@ static bool rf6052_conf_para(struct adapter *adapt)
break;
}
 
-   PHY_SetBBReg(adapt, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);
+   phy_set_bb_reg(adapt, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);
udelay(1);
 
-   PHY_SetBBReg(adapt, pphyreg->rfintfo, BRFSI_RFENV, 0x1);
+   phy_set_bb_reg(adapt, pphyreg->rfintfo, BRFSI_RFENV, 0x1);
udelay(1);
 
-   PHY_SetBBReg(adapt, pphyreg->rfHSSIPara2,
+   phy_set_bb_reg(adapt, pphyreg->rfHSSIPara2,
  B3WIREADDREAALENGTH, 0x0);
udelay(1);
 
-   PHY_SetBBReg(adapt, pphyreg->rfHSSIPara2, B3WIREDATALENGTH, 
0x0);
+   phy_set_bb_reg(adapt, pphyreg->rfHSSIPara2,
+  B3WIREDATALENGTH, 0x0);
udelay(1);
 
switch (rfpath) {
@@ -284,12 +285,13 @@ static bool rf6052_conf_para(struct adapter *adapt)
switch (rfpath) {
case RF90_PATH_A:
case RF90_PATH_C:
-   PHY_SetBBReg(adapt, pphyreg->rfintfs, BRFSI_RFENV, 
u4val);
+   phy_set_bb_reg(adapt, pphyreg->rfintfs,
+  BRFSI_RFENV, u4val);
break;
case RF90_PATH_B:
case RF90_PATH_D:
-   PHY_SetBBReg(adapt, pphyreg->rfintfs, BRFSI_RFENV << 16,
- u4val);
+   phy_set_bb_reg(adapt, pphyreg->rfintfs,
+  BRFSI_RFENV << 16, u4val);
break;
}
 
diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c 
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index e36fa5e..f837c95 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -424,17 +424,17 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
 
/* wtite new elements A, C, D 
to regC88 and regC9C, element B is always 0 */
value32 = (ele_D<<22) | 
((ele_C&0x3F)<<16) | ele_A;
-   PHY_SetBBReg(Adapter, 
rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
+

[PATCH 08/20] staging: rtl8188eu: Rework function PHY_QueryRFReg()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c |   10 +++
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c  |4 +--
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   31 +---
 drivers/staging/rtl8188eu/hal/usb_halinit.c|4 +--
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |4 ---
 drivers/staging/rtl8188eu/include/phy.h|2 ++
 6 files changed, 18 insertions(+), 37 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c 
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index f837c95..06c5536 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -169,7 +169,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
 ("===>dm_TXPowerTrackingCallback_ThermalMeter_8188E 
txpowercontrol %d\n",
 dm_odm->RFCalibrateInfo.TxPowerTrackControl));
 
-   ThermalValue = (u8)PHY_QueryRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, 
0xfc00);  /* 0x42: RF Reg[15:10] 88E */
+   ThermalValue = (u8)phy_query_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E, 
0xfc00);/* 0x42: RF Reg[15:10] 88E */
 
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
 ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x 
EEPROMthermalmeter 0x%x\n",
@@ -446,7 +446,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, 
ODM_DBG_LOUD,
 ("TxPwrTracking 0xc80 = 0x%x, 
0xc94 = 0x%x RF 0x24 = 0x%x\n",
 phy_query_bb_reg(Adapter, 0xc80, 
bMaskDWord), phy_query_bb_reg(Adapter,
-0xc94, bMaskDWord), 
PHY_QueryRFReg(Adapter, RF_PATH_A, 0x24, bRFRegOffsetMask)));
+0xc94, bMaskDWord), 
phy_query_rf_reg(Adapter, RF_PATH_A, 0x24, bRFRegOffsetMask)));
}
}
 
@@ -1216,11 +1216,11 @@ static void phy_LCCalibrate_8188E(struct adapter 
*adapt, bool is2t)
if ((tmpreg&0x70) != 0) {
/* 1. Read original RF mode */
/* Path-A */
-   RF_Amode = PHY_QueryRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits);
+   RF_Amode = phy_query_rf_reg(adapt, RF_PATH_A, RF_AC, 
bMask12Bits);
 
/* Path-B */
if (is2t)
-   RF_Bmode = PHY_QueryRFReg(adapt, RF_PATH_B, RF_AC, 
bMask12Bits);
+   RF_Bmode = phy_query_rf_reg(adapt, RF_PATH_B, RF_AC, 
bMask12Bits);
 
/* 2. Set RF mode = standby mode */
/* Path-A */
@@ -1232,7 +1232,7 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt, 
bool is2t)
}
 
/* 3. Read RF reg18 */
-   LC_Cal = PHY_QueryRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits);
+   LC_Cal = phy_query_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits);
 
/* 4. Set LC calibration begin  bit15 */
PHY_SetRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000);
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index ae7cb8d..a5064ae 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -23,7 +23,7 @@
 #include 
 #include 
 #include 
-
+#include 
 #include 
 
 #include 
@@ -230,7 +230,7 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
 
pHalFunc->AntDivBeforeLinkHandler = 
pHalFunc->AntDivCompareHandler = 
-   pHalFunc->read_rfreg = _PHY_QueryRFReg;
+   pHalFunc->read_rfreg = _query_rf_reg;
pHalFunc->write_rfreg = _PHY_SetRFReg;
 
pHalFunc->sreset_init_value = _init_value;
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 2cbaff5..506b287 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -124,32 +124,15 @@ static void rf_serial_write(struct adapter *adapt,
phy_set_bb_reg(adapt, phyreg->rf3wireOffset, bMaskDWord, data_and_addr);
 }
 
-/**
-* Function:PHY_QueryRFReg
-*
-* OverView:Query "Specific bits" to RF register (page 8~)
-*
-* Input:
-*  struct adapter *Adapter,
-*  enum rf_radio_path eRFPath, Radio path of A/B/C/D
-*  u32 RegAddr,The target 
address to be read
-*  u32 BitMask The target bit 
position in the target address
-*  to be 
read
-*
-* Output:  None
-* Return:  u32

[PATCH 04/20] staging: rtl8188eu: Remove unused wrapper function rtw_hal_write_bbreg()

2014-08-23 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/hal_intf.c  |7 ---
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |1 -
 drivers/staging/rtl8188eu/include/hal_intf.h  |4 
 3 files changed, 12 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/hal_intf.c 
b/drivers/staging/rtl8188eu/hal/hal_intf.c
index 0d21e60..538a0f6 100644
--- a/drivers/staging/rtl8188eu/hal/hal_intf.c
+++ b/drivers/staging/rtl8188eu/hal/hal_intf.c
@@ -256,13 +256,6 @@ void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, 
u8 arg,
   rssi_level);
 }
 
-void rtw_hal_write_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask,
-u32 data)
-{
-   if (adapt->HalFunc.write_bbreg)
-   adapt->HalFunc.write_bbreg(adapt, regaddr, bitmask, data);
-}
-
 u32 rtw_hal_read_rfreg(struct adapter *adapt, enum rf_radio_path rfpath,
   u32 regaddr, u32 bitmask)
 {
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index 204d2e4..ae7cb8d 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -230,7 +230,6 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
 
pHalFunc->AntDivBeforeLinkHandler = 
pHalFunc->AntDivCompareHandler = 
-   pHalFunc->write_bbreg = _PHY_SetBBReg;
pHalFunc->read_rfreg = _PHY_QueryRFReg;
pHalFunc->write_rfreg = _PHY_SetRFReg;
 
diff --git a/drivers/staging/rtl8188eu/include/hal_intf.h 
b/drivers/staging/rtl8188eu/include/hal_intf.h
index 606fd60..9191993 100644
--- a/drivers/staging/rtl8188eu/include/hal_intf.h
+++ b/drivers/staging/rtl8188eu/include/hal_intf.h
@@ -213,8 +213,6 @@ struct hal_ops {
struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(struct adapter *padapter,
 struct xmit_frame *pmgntframe);
-   void(*write_bbreg)(struct adapter *padapter, u32 RegAddr,
-  u32 BitMask, u32 Data);
u32 (*read_rfreg)(struct adapter *padapter,
  enum rf_radio_path eRFPath, u32 RegAddr,
  u32 BitMask);
@@ -300,8 +298,6 @@ voidrtw_hal_clone_data(struct adapter *dst_adapt,
 
 void rtw_hal_bcn_related_reg_setting(struct adapter *padapter);
 
-void   rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask,
-   u32 Data);
 u32rtw_hal_read_rfreg(struct adapter *padapter, enum rf_radio_path eRFPath,
   u32 RegAddr, u32 BitMask);
 void   rtw_hal_write_rfreg(struct adapter *padapter,
-- 
1.7.10.4

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[PATCH 03/20] staging: rtl8188eu: Rework function PHY_QueryBBReg()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c   |8 +--
 drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c |   69 ++--
 drivers/staging/rtl8188eu/hal/odm.c|   31 -
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c   |9 +--
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   44 -
 drivers/staging/rtl8188eu/hal/usb_halinit.c|2 +-
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |3 -
 drivers/staging/rtl8188eu/include/phy.h|2 +
 8 files changed, 75 insertions(+), 93 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c 
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
index 94ee740..0284602 100644
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
+++ b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
@@ -245,13 +245,13 @@ static bool rf6052_conf_para(struct adapter *adapt)
switch (rfpath) {
case RF90_PATH_A:
case RF90_PATH_C:
-   u4val = PHY_QueryBBReg(adapt, pphyreg->rfintfs,
-   BRFSI_RFENV);
+   u4val = phy_query_bb_reg(adapt, pphyreg->rfintfs,
+BRFSI_RFENV);
break;
case RF90_PATH_B:
case RF90_PATH_D:
-   u4val = PHY_QueryBBReg(adapt, pphyreg->rfintfs,
-   BRFSI_RFENV << 16);
+   u4val = phy_query_bb_reg(adapt, pphyreg->rfintfs,
+BRFSI_RFENV << 16);
break;
}
 
diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c 
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index d2bcc16..e36fa5e 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -17,6 +17,7 @@
  */
 
 #include "odm_precomp.h"
+#include "phy.h"
 
 /*  2010/04/25 MH Define the max tx power tracking tx agc power. */
 #defineODM_TXPWRTRACK_MAX_IDX_88E  6
@@ -181,7 +182,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
 
if (ThermalValue) {
/* Query OFDM path A default setting */
-   ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 
bMaskDWord)_D;
+   ele_D = phy_query_bb_reg(Adapter, rOFDM0_XATxIQImbalance, 
bMaskDWord)_D;
for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find the 
index */
if (ele_D == (OFDMSwingTable[i]_D)) {
OFDM_index_old[0] = (u8)i;
@@ -195,7 +196,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
 
/* Query OFDM path B default setting */
if (is2t) {
-   ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance, 
bMaskDWord)_D;
+   ele_D = phy_query_bb_reg(Adapter, 
rOFDM0_XBTxIQImbalance, bMaskDWord)_D;
for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find 
the index */
if (ele_D == (OFDMSwingTable[i]_D)) {
OFDM_index_old[1] = (u8)i;
@@ -444,7 +445,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
 
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, 
ODM_DBG_LOUD,
 ("TxPwrTracking 0xc80 = 0x%x, 
0xc94 = 0x%x RF 0x24 = 0x%x\n",
-PHY_QueryBBReg(Adapter, 0xc80, 
bMaskDWord), PHY_QueryBBReg(Adapter,
+phy_query_bb_reg(Adapter, 0xc80, 
bMaskDWord), phy_query_bb_reg(Adapter,
 0xc94, bMaskDWord), 
PHY_QueryRFReg(Adapter, RF_PATH_A, 0x24, bRFRegOffsetMask)));
}
}
@@ -497,13 +498,13 @@ phy_PathA_IQK_8188E(struct adapter *adapt, bool 
configPathB)
mdelay(IQK_DELAY_TIME_88E);
 
/*  Check failed */
-   regeac = PHY_QueryBBReg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord);
+   regeac = phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord);
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 
0x%x\n", regeac));
-   regE94 = PHY_QueryBBReg(adapt, rTx_Power_Before_IQK_A, bMaskDWord);
+   regE94 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, bMaskDWord);
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 
0x%x\n", regE94));
-   regE9C = PHY_QueryBBReg(adapt, rTx_Power_After_IQK_A, bMaskDWord);
+   regE9C = phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, bMaskDWord);
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, OD

[PATCH 02/20] staging: rtl8188eu: Remove unused wrapper function rtw_hal_read_bbreg()

2014-08-23 Thread navin patidar


Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/hal_intf.c  |9 -
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |1 -
 drivers/staging/rtl8188eu/include/hal_intf.h  |4 
 3 files changed, 14 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/hal_intf.c 
b/drivers/staging/rtl8188eu/hal/hal_intf.c
index bc89e99..0d21e60 100644
--- a/drivers/staging/rtl8188eu/hal/hal_intf.c
+++ b/drivers/staging/rtl8188eu/hal/hal_intf.c
@@ -256,15 +256,6 @@ void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, 
u8 arg,
   rssi_level);
 }
 
-u32 rtw_hal_read_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask)
-{
-   u32 data = 0;
-
-   if (adapt->HalFunc.read_bbreg)
-   data = adapt->HalFunc.read_bbreg(adapt, regaddr, bitmask);
-   return data;
-}
-
 void rtw_hal_write_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask,
 u32 data)
 {
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index 50b1332..204d2e4 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -230,7 +230,6 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
 
pHalFunc->AntDivBeforeLinkHandler = 
pHalFunc->AntDivCompareHandler = 
-   pHalFunc->read_bbreg = _PHY_QueryBBReg;
pHalFunc->write_bbreg = _PHY_SetBBReg;
pHalFunc->read_rfreg = _PHY_QueryRFReg;
pHalFunc->write_rfreg = _PHY_SetRFReg;
diff --git a/drivers/staging/rtl8188eu/include/hal_intf.h 
b/drivers/staging/rtl8188eu/include/hal_intf.h
index 1c5303e..606fd60 100644
--- a/drivers/staging/rtl8188eu/include/hal_intf.h
+++ b/drivers/staging/rtl8188eu/include/hal_intf.h
@@ -213,9 +213,6 @@ struct hal_ops {
struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(struct adapter *padapter,
 struct xmit_frame *pmgntframe);
-
-   u32 (*read_bbreg)(struct adapter *padapter, u32 RegAddr,
- u32 BitMask);
void(*write_bbreg)(struct adapter *padapter, u32 RegAddr,
   u32 BitMask, u32 Data);
u32 (*read_rfreg)(struct adapter *padapter,
@@ -303,7 +300,6 @@ voidrtw_hal_clone_data(struct adapter *dst_adapt,
 
 void rtw_hal_bcn_related_reg_setting(struct adapter *padapter);
 
-u32rtw_hal_read_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask);
 void   rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask,
u32 Data);
 u32rtw_hal_read_rfreg(struct adapter *padapter, enum rf_radio_path eRFPath,
-- 
1.7.10.4

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Please read the FAQ at  http://www.tux.org/lkml/

[PATCH 01/20] staging: rtl8188eu: Rework function phy_CalculateBitShift()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |   42 ---
 1 file changed, 6 insertions(+), 36 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 0f90cf4..522f185 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -24,48 +24,18 @@
 #include 
 #include 
 
-/*---Define Local Constant---*/
-/* Channel switch:The size of command tables for switch channel*/
 #define MAX_PRECMD_CNT 16
 #define MAX_RFDEPENDCMD_CNT 16
 #define MAX_POSTCMD_CNT 16
 
 #define MAX_DOZE_WAITING_TIMES_9x 64
 
-/*---Define Local Constant---*/
-
-
-/*Define global variable-*/
-
-/*Define local variable--*/
-
-
-/*Define export function prototype---*/
-/*  Please refer to header file */
-/*Define export function prototype---*/
-
-/*Function Body--*/
-/*  */
-/*  1. BB register R/W API */
-/*  */
-
-/**
-* Function:phy_CalculateBitShift
-*
-* OverView:Get shifted position of the BitMask
-*
-* Input:
-*  u32 BitMask,
-*
-* Output:  none
-* Return:  u32 Return the shift bit bit position of 
the mask
-*/
-static u32 phy_CalculateBitShift(u32 BitMask)
+static u32 cal_bit_shift(u32 bitmask)
 {
u32 i;
 
for (i = 0; i <= 31; i++) {
-   if (((BitMask>>i) &  0x1) == 1)
+   if (((bitmask >> i) & 0x1) == 1)
break;
}
return i;
@@ -95,7 +65,7 @@ rtl8188e_PHY_QueryBBReg(
u32 ReturnValue = 0, OriginalValue, BitShift;
 
OriginalValue = usb_read32(Adapter, RegAddr);
-   BitShift = phy_CalculateBitShift(BitMask);
+   BitShift = cal_bit_shift(BitMask);
ReturnValue = (OriginalValue & BitMask) >> BitShift;
return ReturnValue;
 }
@@ -125,7 +95,7 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 
RegAddr, u32 BitMask, u3
 
if (BitMask != bMaskDWord) { /* if not "double word" write */
OriginalValue = usb_read32(Adapter, RegAddr);
-   BitShift = phy_CalculateBitShift(BitMask);
+   BitShift = cal_bit_shift(BitMask);
Data = ((OriginalValue & (~BitMask)) | (Data << BitShift));
}
 
@@ -310,7 +280,7 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum 
rf_radio_path eRFPath,
 
Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
 
-   BitShift =  phy_CalculateBitShift(BitMask);
+   BitShift =  cal_bit_shift(BitMask);
Readback_Value = (Original_Value & BitMask) >> BitShift;
return Readback_Value;
 }
@@ -347,7 +317,7 @@ rtl8188e_PHY_SetRFReg(
/*  RF data is 12 bits only */
if (BitMask != bRFRegOffsetMask) {
Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
-   BitShift =  phy_CalculateBitShift(BitMask);
+   BitShift =  cal_bit_shift(BitMask);
Data = ((Original_Value & (~BitMask)) | (Data << BitShift));
}
 
-- 
1.7.10.4

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[PATCH 02/20] staging: rtl8188eu: Remove unused wrapper function rtw_hal_read_bbreg()

2014-08-23 Thread navin patidar


Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/hal_intf.c  |9 -
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |1 -
 drivers/staging/rtl8188eu/include/hal_intf.h  |4 
 3 files changed, 14 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/hal_intf.c 
b/drivers/staging/rtl8188eu/hal/hal_intf.c
index bc89e99..0d21e60 100644
--- a/drivers/staging/rtl8188eu/hal/hal_intf.c
+++ b/drivers/staging/rtl8188eu/hal/hal_intf.c
@@ -256,15 +256,6 @@ void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, 
u8 arg,
   rssi_level);
 }
 
-u32 rtw_hal_read_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask)
-{
-   u32 data = 0;
-
-   if (adapt-HalFunc.read_bbreg)
-   data = adapt-HalFunc.read_bbreg(adapt, regaddr, bitmask);
-   return data;
-}
-
 void rtw_hal_write_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask,
 u32 data)
 {
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index 50b1332..204d2e4 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -230,7 +230,6 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
 
pHalFunc-AntDivBeforeLinkHandler = AntDivBeforeLink8188E;
pHalFunc-AntDivCompareHandler = AntDivCompare8188E;
-   pHalFunc-read_bbreg = rtl8188e_PHY_QueryBBReg;
pHalFunc-write_bbreg = rtl8188e_PHY_SetBBReg;
pHalFunc-read_rfreg = rtl8188e_PHY_QueryRFReg;
pHalFunc-write_rfreg = rtl8188e_PHY_SetRFReg;
diff --git a/drivers/staging/rtl8188eu/include/hal_intf.h 
b/drivers/staging/rtl8188eu/include/hal_intf.h
index 1c5303e..606fd60 100644
--- a/drivers/staging/rtl8188eu/include/hal_intf.h
+++ b/drivers/staging/rtl8188eu/include/hal_intf.h
@@ -213,9 +213,6 @@ struct hal_ops {
struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(struct adapter *padapter,
 struct xmit_frame *pmgntframe);
-
-   u32 (*read_bbreg)(struct adapter *padapter, u32 RegAddr,
- u32 BitMask);
void(*write_bbreg)(struct adapter *padapter, u32 RegAddr,
   u32 BitMask, u32 Data);
u32 (*read_rfreg)(struct adapter *padapter,
@@ -303,7 +300,6 @@ voidrtw_hal_clone_data(struct adapter *dst_adapt,
 
 void rtw_hal_bcn_related_reg_setting(struct adapter *padapter);
 
-u32rtw_hal_read_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask);
 void   rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask,
u32 Data);
 u32rtw_hal_read_rfreg(struct adapter *padapter, enum rf_radio_path eRFPath,
-- 
1.7.10.4

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Please read the FAQ at  http://www.tux.org/lkml/

[PATCH 04/20] staging: rtl8188eu: Remove unused wrapper function rtw_hal_write_bbreg()

2014-08-23 Thread navin patidar


Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/hal_intf.c  |7 ---
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |1 -
 drivers/staging/rtl8188eu/include/hal_intf.h  |4 
 3 files changed, 12 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/hal_intf.c 
b/drivers/staging/rtl8188eu/hal/hal_intf.c
index 0d21e60..538a0f6 100644
--- a/drivers/staging/rtl8188eu/hal/hal_intf.c
+++ b/drivers/staging/rtl8188eu/hal/hal_intf.c
@@ -256,13 +256,6 @@ void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, 
u8 arg,
   rssi_level);
 }
 
-void rtw_hal_write_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask,
-u32 data)
-{
-   if (adapt-HalFunc.write_bbreg)
-   adapt-HalFunc.write_bbreg(adapt, regaddr, bitmask, data);
-}
-
 u32 rtw_hal_read_rfreg(struct adapter *adapt, enum rf_radio_path rfpath,
   u32 regaddr, u32 bitmask)
 {
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index 204d2e4..ae7cb8d 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -230,7 +230,6 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
 
pHalFunc-AntDivBeforeLinkHandler = AntDivBeforeLink8188E;
pHalFunc-AntDivCompareHandler = AntDivCompare8188E;
-   pHalFunc-write_bbreg = rtl8188e_PHY_SetBBReg;
pHalFunc-read_rfreg = rtl8188e_PHY_QueryRFReg;
pHalFunc-write_rfreg = rtl8188e_PHY_SetRFReg;
 
diff --git a/drivers/staging/rtl8188eu/include/hal_intf.h 
b/drivers/staging/rtl8188eu/include/hal_intf.h
index 606fd60..9191993 100644
--- a/drivers/staging/rtl8188eu/include/hal_intf.h
+++ b/drivers/staging/rtl8188eu/include/hal_intf.h
@@ -213,8 +213,6 @@ struct hal_ops {
struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(struct adapter *padapter,
 struct xmit_frame *pmgntframe);
-   void(*write_bbreg)(struct adapter *padapter, u32 RegAddr,
-  u32 BitMask, u32 Data);
u32 (*read_rfreg)(struct adapter *padapter,
  enum rf_radio_path eRFPath, u32 RegAddr,
  u32 BitMask);
@@ -300,8 +298,6 @@ voidrtw_hal_clone_data(struct adapter *dst_adapt,
 
 void rtw_hal_bcn_related_reg_setting(struct adapter *padapter);
 
-void   rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask,
-   u32 Data);
 u32rtw_hal_read_rfreg(struct adapter *padapter, enum rf_radio_path eRFPath,
   u32 RegAddr, u32 BitMask);
 void   rtw_hal_write_rfreg(struct adapter *padapter,
-- 
1.7.10.4

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[PATCH 01/20] staging: rtl8188eu: Rework function phy_CalculateBitShift()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |   42 ---
 1 file changed, 6 insertions(+), 36 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 0f90cf4..522f185 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -24,48 +24,18 @@
 #include rtw_iol.h
 #include rtl8188e_hal.h
 
-/*---Define Local Constant---*/
-/* Channel switch:The size of command tables for switch channel*/
 #define MAX_PRECMD_CNT 16
 #define MAX_RFDEPENDCMD_CNT 16
 #define MAX_POSTCMD_CNT 16
 
 #define MAX_DOZE_WAITING_TIMES_9x 64
 
-/*---Define Local Constant---*/
-
-
-/*Define global variable-*/
-
-/*Define local variable--*/
-
-
-/*Define export function prototype---*/
-/*  Please refer to header file */
-/*Define export function prototype---*/
-
-/*Function Body--*/
-/*  */
-/*  1. BB register R/W API */
-/*  */
-
-/**
-* Function:phy_CalculateBitShift
-*
-* OverView:Get shifted position of the BitMask
-*
-* Input:
-*  u32 BitMask,
-*
-* Output:  none
-* Return:  u32 Return the shift bit bit position of 
the mask
-*/
-static u32 phy_CalculateBitShift(u32 BitMask)
+static u32 cal_bit_shift(u32 bitmask)
 {
u32 i;
 
for (i = 0; i = 31; i++) {
-   if (((BitMaski)   0x1) == 1)
+   if (((bitmask  i)  0x1) == 1)
break;
}
return i;
@@ -95,7 +65,7 @@ rtl8188e_PHY_QueryBBReg(
u32 ReturnValue = 0, OriginalValue, BitShift;
 
OriginalValue = usb_read32(Adapter, RegAddr);
-   BitShift = phy_CalculateBitShift(BitMask);
+   BitShift = cal_bit_shift(BitMask);
ReturnValue = (OriginalValue  BitMask)  BitShift;
return ReturnValue;
 }
@@ -125,7 +95,7 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 
RegAddr, u32 BitMask, u3
 
if (BitMask != bMaskDWord) { /* if not double word write */
OriginalValue = usb_read32(Adapter, RegAddr);
-   BitShift = phy_CalculateBitShift(BitMask);
+   BitShift = cal_bit_shift(BitMask);
Data = ((OriginalValue  (~BitMask)) | (Data  BitShift));
}
 
@@ -310,7 +280,7 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum 
rf_radio_path eRFPath,
 
Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
 
-   BitShift =  phy_CalculateBitShift(BitMask);
+   BitShift =  cal_bit_shift(BitMask);
Readback_Value = (Original_Value  BitMask)  BitShift;
return Readback_Value;
 }
@@ -347,7 +317,7 @@ rtl8188e_PHY_SetRFReg(
/*  RF data is 12 bits only */
if (BitMask != bRFRegOffsetMask) {
Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
-   BitShift =  phy_CalculateBitShift(BitMask);
+   BitShift =  cal_bit_shift(BitMask);
Data = ((Original_Value  (~BitMask)) | (Data  BitShift));
}
 
-- 
1.7.10.4

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Please read the FAQ at  http://www.tux.org/lkml/

[PATCH 03/20] staging: rtl8188eu: Rework function PHY_QueryBBReg()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c   |8 +--
 drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c |   69 ++--
 drivers/staging/rtl8188eu/hal/odm.c|   31 -
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c   |9 +--
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   44 -
 drivers/staging/rtl8188eu/hal/usb_halinit.c|2 +-
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |3 -
 drivers/staging/rtl8188eu/include/phy.h|2 +
 8 files changed, 75 insertions(+), 93 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c 
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
index 94ee740..0284602 100644
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
+++ b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
@@ -245,13 +245,13 @@ static bool rf6052_conf_para(struct adapter *adapt)
switch (rfpath) {
case RF90_PATH_A:
case RF90_PATH_C:
-   u4val = PHY_QueryBBReg(adapt, pphyreg-rfintfs,
-   BRFSI_RFENV);
+   u4val = phy_query_bb_reg(adapt, pphyreg-rfintfs,
+BRFSI_RFENV);
break;
case RF90_PATH_B:
case RF90_PATH_D:
-   u4val = PHY_QueryBBReg(adapt, pphyreg-rfintfs,
-   BRFSI_RFENV  16);
+   u4val = phy_query_bb_reg(adapt, pphyreg-rfintfs,
+BRFSI_RFENV  16);
break;
}
 
diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c 
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index d2bcc16..e36fa5e 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -17,6 +17,7 @@
  */
 
 #include odm_precomp.h
+#include phy.h
 
 /*  2010/04/25 MH Define the max tx power tracking tx agc power. */
 #defineODM_TXPWRTRACK_MAX_IDX_88E  6
@@ -181,7 +182,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
 
if (ThermalValue) {
/* Query OFDM path A default setting */
-   ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 
bMaskDWord)bMaskOFDM_D;
+   ele_D = phy_query_bb_reg(Adapter, rOFDM0_XATxIQImbalance, 
bMaskDWord)bMaskOFDM_D;
for (i = 0; i  OFDM_TABLE_SIZE_92D; i++) { /* find the 
index */
if (ele_D == (OFDMSwingTable[i]bMaskOFDM_D)) {
OFDM_index_old[0] = (u8)i;
@@ -195,7 +196,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
 
/* Query OFDM path B default setting */
if (is2t) {
-   ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance, 
bMaskDWord)bMaskOFDM_D;
+   ele_D = phy_query_bb_reg(Adapter, 
rOFDM0_XBTxIQImbalance, bMaskDWord)bMaskOFDM_D;
for (i = 0; i  OFDM_TABLE_SIZE_92D; i++) { /* find 
the index */
if (ele_D == (OFDMSwingTable[i]bMaskOFDM_D)) {
OFDM_index_old[1] = (u8)i;
@@ -444,7 +445,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
 
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, 
ODM_DBG_LOUD,
 (TxPwrTracking 0xc80 = 0x%x, 
0xc94 = 0x%x RF 0x24 = 0x%x\n,
-PHY_QueryBBReg(Adapter, 0xc80, 
bMaskDWord), PHY_QueryBBReg(Adapter,
+phy_query_bb_reg(Adapter, 0xc80, 
bMaskDWord), phy_query_bb_reg(Adapter,
 0xc94, bMaskDWord), 
PHY_QueryRFReg(Adapter, RF_PATH_A, 0x24, bRFRegOffsetMask)));
}
}
@@ -497,13 +498,13 @@ phy_PathA_IQK_8188E(struct adapter *adapt, bool 
configPathB)
mdelay(IQK_DELAY_TIME_88E);
 
/*  Check failed */
-   regeac = PHY_QueryBBReg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord);
+   regeac = phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord);
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, (0xeac = 
0x%x\n, regeac));
-   regE94 = PHY_QueryBBReg(adapt, rTx_Power_Before_IQK_A, bMaskDWord);
+   regE94 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, bMaskDWord);
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, (0xe94 = 
0x%x\n, regE94));
-   regE9C = PHY_QueryBBReg(adapt, rTx_Power_After_IQK_A, bMaskDWord);
+   regE9C = phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, bMaskDWord);
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,  (0xe9c = 
0x%x\n

[PATCH 08/20] staging: rtl8188eu: Rework function PHY_QueryRFReg()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c |   10 +++
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c  |4 +--
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   31 +---
 drivers/staging/rtl8188eu/hal/usb_halinit.c|4 +--
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |4 ---
 drivers/staging/rtl8188eu/include/phy.h|2 ++
 6 files changed, 18 insertions(+), 37 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c 
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index f837c95..06c5536 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -169,7 +169,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
 (===dm_TXPowerTrackingCallback_ThermalMeter_8188E 
txpowercontrol %d\n,
 dm_odm-RFCalibrateInfo.TxPowerTrackControl));
 
-   ThermalValue = (u8)PHY_QueryRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, 
0xfc00);  /* 0x42: RF Reg[15:10] 88E */
+   ThermalValue = (u8)phy_query_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E, 
0xfc00);/* 0x42: RF Reg[15:10] 88E */
 
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
 (Readback Thermal Meter = 0x%x pre thermal meter 0x%x 
EEPROMthermalmeter 0x%x\n,
@@ -446,7 +446,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, 
ODM_DBG_LOUD,
 (TxPwrTracking 0xc80 = 0x%x, 
0xc94 = 0x%x RF 0x24 = 0x%x\n,
 phy_query_bb_reg(Adapter, 0xc80, 
bMaskDWord), phy_query_bb_reg(Adapter,
-0xc94, bMaskDWord), 
PHY_QueryRFReg(Adapter, RF_PATH_A, 0x24, bRFRegOffsetMask)));
+0xc94, bMaskDWord), 
phy_query_rf_reg(Adapter, RF_PATH_A, 0x24, bRFRegOffsetMask)));
}
}
 
@@ -1216,11 +1216,11 @@ static void phy_LCCalibrate_8188E(struct adapter 
*adapt, bool is2t)
if ((tmpreg0x70) != 0) {
/* 1. Read original RF mode */
/* Path-A */
-   RF_Amode = PHY_QueryRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits);
+   RF_Amode = phy_query_rf_reg(adapt, RF_PATH_A, RF_AC, 
bMask12Bits);
 
/* Path-B */
if (is2t)
-   RF_Bmode = PHY_QueryRFReg(adapt, RF_PATH_B, RF_AC, 
bMask12Bits);
+   RF_Bmode = phy_query_rf_reg(adapt, RF_PATH_B, RF_AC, 
bMask12Bits);
 
/* 2. Set RF mode = standby mode */
/* Path-A */
@@ -1232,7 +1232,7 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt, 
bool is2t)
}
 
/* 3. Read RF reg18 */
-   LC_Cal = PHY_QueryRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits);
+   LC_Cal = phy_query_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits);
 
/* 4. Set LC calibration begin  bit15 */
PHY_SetRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000);
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index ae7cb8d..a5064ae 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -23,7 +23,7 @@
 #include linux/vmalloc.h
 #include drv_types.h
 #include rtw_efuse.h
-
+#include phy.h
 #include rtl8188e_hal.h
 
 #include rtw_iol.h
@@ -230,7 +230,7 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
 
pHalFunc-AntDivBeforeLinkHandler = AntDivBeforeLink8188E;
pHalFunc-AntDivCompareHandler = AntDivCompare8188E;
-   pHalFunc-read_rfreg = rtl8188e_PHY_QueryRFReg;
+   pHalFunc-read_rfreg = phy_query_rf_reg;
pHalFunc-write_rfreg = rtl8188e_PHY_SetRFReg;
 
pHalFunc-sreset_init_value = sreset_init_value;
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 2cbaff5..506b287 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -124,32 +124,15 @@ static void rf_serial_write(struct adapter *adapt,
phy_set_bb_reg(adapt, phyreg-rf3wireOffset, bMaskDWord, data_and_addr);
 }
 
-/**
-* Function:PHY_QueryRFReg
-*
-* OverView:Query Specific bits to RF register (page 8~)
-*
-* Input:
-*  struct adapter *Adapter,
-*  enum rf_radio_path eRFPath, Radio path of A/B/C/D
-*  u32 RegAddr,The target 
address to be read
-*  u32 BitMask The target bit 
position in the target address

[PATCH 10/20] staging: rtl8188eu: Rework function getTxPowerIndex88E()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |  105 ++-
 1 file changed, 45 insertions(+), 60 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 83cd19d..f4df9ef 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -150,78 +150,63 @@ void phy_set_rf_reg(struct adapter *adapt, enum 
rf_radio_path rf_path,
rf_serial_write(adapt, rf_path, reg_addr, data);
 }
 
-static void getTxPowerIndex88E(struct adapter *Adapter, u8 channel, u8 
*cckPowerLevel,
-  u8 *ofdmPowerLevel, u8 *BW20PowerLevel,
-  u8 *BW40PowerLevel)
+static void get_tx_power_index(struct adapter *adapt, u8 channel, u8 *cck_pwr,
+  u8 *ofdm_pwr, u8 *bw20_pwr, u8 *bw40_pwr)
 {
-   struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
u8 index = (channel - 1);
u8 TxCount = 0, path_nums;
 
-   if ((RF_1T2R == pHalData-rf_type) || (RF_1T1R == pHalData-rf_type))
+   if ((RF_1T2R == hal_data-rf_type) || (RF_1T1R == hal_data-rf_type))
path_nums = 1;
else
path_nums = 2;
 
for (TxCount = 0; TxCount  path_nums; TxCount++) {
if (TxCount == RF_PATH_A) {
-   /*  1. CCK */
-   cckPowerLevel[TxCount]  = 
pHalData-Index24G_CCK_Base[TxCount][index];
-   /* 2. OFDM */
-   ofdmPowerLevel[TxCount] = 
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
-   pHalData-OFDM_24G_Diff[TxCount][RF_PATH_A];
-   /*  1. BW20 */
-   BW20PowerLevel[TxCount] = 
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
-   pHalData-BW20_24G_Diff[TxCount][RF_PATH_A];
-   /* 2. BW40 */
-   BW40PowerLevel[TxCount] = 
pHalData-Index24G_BW40_Base[TxCount][index];
+   cck_pwr[TxCount] = 
hal_data-Index24G_CCK_Base[TxCount][index];
+   ofdm_pwr[TxCount] = 
hal_data-Index24G_BW40_Base[RF_PATH_A][index]+
+   
hal_data-OFDM_24G_Diff[TxCount][RF_PATH_A];
+
+   bw20_pwr[TxCount] = 
hal_data-Index24G_BW40_Base[RF_PATH_A][index]+
+   
hal_data-BW20_24G_Diff[TxCount][RF_PATH_A];
+   bw40_pwr[TxCount] = 
hal_data-Index24G_BW40_Base[TxCount][index];
} else if (TxCount == RF_PATH_B) {
-   /*  1. CCK */
-   cckPowerLevel[TxCount]  = 
pHalData-Index24G_CCK_Base[TxCount][index];
-   /* 2. OFDM */
-   ofdmPowerLevel[TxCount] = 
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
-   pHalData-BW20_24G_Diff[RF_PATH_A][index]+
-   pHalData-BW20_24G_Diff[TxCount][index];
-   /*  1. BW20 */
-   BW20PowerLevel[TxCount] = 
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
-   pHalData-BW20_24G_Diff[TxCount][RF_PATH_A]+
-   pHalData-BW20_24G_Diff[TxCount][index];
-   /* 2. BW40 */
-   BW40PowerLevel[TxCount] = 
pHalData-Index24G_BW40_Base[TxCount][index];
+   cck_pwr[TxCount] = 
hal_data-Index24G_CCK_Base[TxCount][index];
+   ofdm_pwr[TxCount] = 
hal_data-Index24G_BW40_Base[RF_PATH_A][index]+
+   hal_data-BW20_24G_Diff[RF_PATH_A][index]+
+   hal_data-BW20_24G_Diff[TxCount][index];
+
+   bw20_pwr[TxCount] = 
hal_data-Index24G_BW40_Base[RF_PATH_A][index]+
+   hal_data-BW20_24G_Diff[TxCount][RF_PATH_A]+
+   hal_data-BW20_24G_Diff[TxCount][index];
+   bw40_pwr[TxCount] = 
hal_data-Index24G_BW40_Base[TxCount][index];
} else if (TxCount == RF_PATH_C) {
-   /*  1. CCK */
-   cckPowerLevel[TxCount]  = 
pHalData-Index24G_CCK_Base[TxCount][index];
-   /* 2. OFDM */
-   ofdmPowerLevel[TxCount] = 
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
-   pHalData-BW20_24G_Diff[RF_PATH_A][index]+
-   pHalData-BW20_24G_Diff[RF_PATH_B][index]+
-   pHalData-BW20_24G_Diff[TxCount][index];
-   /*  1. BW20 */
-   BW20PowerLevel[TxCount] = 
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
-   pHalData-BW20_24G_Diff[RF_PATH_A][index

[PATCH 06/20] staging: rtl8188eu: Rework function phy_RFSerialRead()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |   99 ---
 1 file changed, 34 insertions(+), 65 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 752ca42..ef1082f 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -64,81 +64,50 @@ void phy_set_bb_reg(struct adapter *adapt, u32 regaddr, u32 
bitmask, u32 data)
usb_write32(adapt, regaddr, data);
 }
 
-/*  */
-/*  2. RF register R/W API */
-/*  */
-/**
-* Function:phy_RFSerialRead
-*
-* OverView:Read regster from RF chips
-*
-* Input:
-*  struct adapter *Adapter,
-*  enum rf_radio_path eRFPath, Radio path of A/B/C/D
-*  u32 Offset, The target 
address to be read
-*
-* Output:  None
-* Return:  u32 reback value
-* Note:Threre are three types of serial operations:
-*  1. Software serial write
-*  2. Hardware LSSI-Low Speed Serial Interface
-*  3. Hardware HSSI-High speed
-*  serial write. Driver need to implement (1) and (2).
-*  This function is equal to the combination of 
RF_ReadReg() and  RFLSSIRead()
-*/
-static u32
-phy_RFSerialRead(
-   struct adapter *Adapter,
-   enum rf_radio_path eRFPath,
-   u32 Offset
-   )
+static u32 rf_serial_read(struct adapter *adapt,
+   enum rf_radio_path rfpath, u32 offset)
 {
-   u32 retValue = 0;
-   struct hal_data_8188e   *pHalData = 
GET_HAL_DATA(Adapter);
-   struct bb_reg_def *pPhyReg = pHalData-PHYRegDef[eRFPath];
-   u32 NewOffset;
+   u32 ret = 0;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   struct bb_reg_def *phyreg = hal_data-PHYRegDef[rfpath];
+   u32 newoffset;
u32 tmplong, tmplong2;
-   u8  RfPiEnable = 0;
-   /*  */
-   /*  Make sure RF register offset is correct */
-   /*  */
-   Offset = 0xff;
+   u8 rfpi_enable = 0;
 
-   /*  */
-   /*  Switch page for 8256 RF IC */
-   /*  */
-   NewOffset = Offset;
+   offset = 0xff;
+   newoffset = offset;
 
-   /*  For 92S LSSI Read RFLSSIRead */
-   /*  For RF A/B write 0x824/82c(does not work in the future) */
-   /*  We must use 0x824 for RF A and B to execute read trigger */
-   tmplong = phy_query_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2, 
bMaskDWord);
-   if (eRFPath == RF_PATH_A)
+   tmplong = phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord);
+   if (rfpath == RF_PATH_A)
tmplong2 = tmplong;
else
-   tmplong2 = phy_query_bb_reg(Adapter, pPhyReg-rfHSSIPara2, 
bMaskDWord);
+   tmplong2 = phy_query_bb_reg(adapt, phyreg-rfHSSIPara2,
+   bMaskDWord);
 
-   tmplong2 = (tmplong2  (~bLSSIReadAddress)) | (NewOffset23) | 
bLSSIReadEdge;  /* T65 RF */
+   tmplong2 = (tmplong2  (~bLSSIReadAddress)) |
+  (newoffset23) | bLSSIReadEdge;
 
-   phy_set_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, 
tmplong(~bLSSIReadEdge));
-   udelay(10);/*  PlatformStallExecution(10); */
+   phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord,
+  tmplong(~bLSSIReadEdge));
+   udelay(10);
 
-   phy_set_bb_reg(Adapter, pPhyReg-rfHSSIPara2, bMaskDWord, tmplong2);
-   udelay(100);/* PlatformStallExecution(100); */
+   phy_set_bb_reg(adapt, phyreg-rfHSSIPara2, bMaskDWord, tmplong2);
+   udelay(100);
 
-   udelay(10);/* PlatformStallExecution(10); */
+   udelay(10);
 
-   if (eRFPath == RF_PATH_A)
-   RfPiEnable = (u8)phy_query_bb_reg(Adapter, 
rFPGA0_XA_HSSIParameter1, BIT8);
-   else if (eRFPath == RF_PATH_B)
-   RfPiEnable = (u8)phy_query_bb_reg(Adapter, 
rFPGA0_XB_HSSIParameter1, BIT8);
+   if (rfpath == RF_PATH_A)
+   rfpi_enable = (u8)phy_query_bb_reg(adapt, 
rFPGA0_XA_HSSIParameter1, BIT8);
+   else if (rfpath == RF_PATH_B)
+   rfpi_enable = (u8)phy_query_bb_reg(adapt, 
rFPGA0_XB_HSSIParameter1, BIT8);
 
-   if (RfPiEnable) {   /*  Read from BBreg8b8, 12 bits for 8190, 
20bits for T65 RF */
-   retValue = phy_query_bb_reg(Adapter, pPhyReg-rfLSSIReadBackPi, 
bLSSIReadBackData);
-   } else {/* Read from BBreg8a0, 12 bits for 8190, 20 bits for 
T65 RF */
-   retValue = phy_query_bb_reg(Adapter, pPhyReg-rfLSSIReadBack, 
bLSSIReadBackData);
-   }
-   return retValue;
+   if (rfpi_enable)
+   ret = phy_query_bb_reg(adapt, phyreg

[PATCH 05/20] staging: rtl8188eu: Rework function PHY_SetBBReg()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c   |6 +-
 drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c   |   16 +-
 drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c |  176 ++--
 drivers/staging/rtl8188eu/hal/odm.c|   34 ++--
 drivers/staging/rtl8188eu/hal/odm_RTL8188E.c   |  144 
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   53 ++
 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c|   12 +-
 drivers/staging/rtl8188eu/hal/usb_halinit.c|6 +-
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |4 -
 drivers/staging/rtl8188eu/include/phy.h|1 +
 10 files changed, 216 insertions(+), 236 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c 
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
index 0c5dc26..80e8cc9 100644
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
+++ b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
@@ -174,7 +174,7 @@ static bool set_baseband_agc_config(struct adapter *adapt)
u32 v2 = array[i+1];
 
if (v1  0xCDCDCDCD){
-   PHY_SetBBReg(adapt, v1, bMaskDWord, v2);
+   phy_set_bb_reg(adapt, v1, bMaskDWord, v2);
udelay(1);
}
}
@@ -392,7 +392,7 @@ static void rtl_bb_delay(struct adapter *adapt, u32 addr, 
u32 data)
} else if (addr == 0xf9) {
udelay(1);
} else {
-   PHY_SetBBReg(adapt, addr, bMaskDWord, data);
+   phy_set_bb_reg(adapt, addr, bMaskDWord, data);
/*  Add 1us delay between BB/RF register setting. */
udelay(1);
}
@@ -709,7 +709,7 @@ bool rtl88eu_phy_bb_config(struct adapter *adapt)
 
/*  write 0x24[16:11] = 0x24[22:17] = crystal_cap */
crystal_cap = hal_data-CrystalCap  0x3F;
-   PHY_SetBBReg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800, (crystal_cap | 
(crystal_cap  6)));
+   phy_set_bb_reg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800, (crystal_cap | 
(crystal_cap  6)));
 
return rtstatus;
 }
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c 
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
index 0284602..670ded7 100644
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
+++ b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
@@ -255,17 +255,18 @@ static bool rf6052_conf_para(struct adapter *adapt)
break;
}
 
-   PHY_SetBBReg(adapt, pphyreg-rfintfe, BRFSI_RFENV  16, 0x1);
+   phy_set_bb_reg(adapt, pphyreg-rfintfe, BRFSI_RFENV  16, 0x1);
udelay(1);
 
-   PHY_SetBBReg(adapt, pphyreg-rfintfo, BRFSI_RFENV, 0x1);
+   phy_set_bb_reg(adapt, pphyreg-rfintfo, BRFSI_RFENV, 0x1);
udelay(1);
 
-   PHY_SetBBReg(adapt, pphyreg-rfHSSIPara2,
+   phy_set_bb_reg(adapt, pphyreg-rfHSSIPara2,
  B3WIREADDREAALENGTH, 0x0);
udelay(1);
 
-   PHY_SetBBReg(adapt, pphyreg-rfHSSIPara2, B3WIREDATALENGTH, 
0x0);
+   phy_set_bb_reg(adapt, pphyreg-rfHSSIPara2,
+  B3WIREDATALENGTH, 0x0);
udelay(1);
 
switch (rfpath) {
@@ -284,12 +285,13 @@ static bool rf6052_conf_para(struct adapter *adapt)
switch (rfpath) {
case RF90_PATH_A:
case RF90_PATH_C:
-   PHY_SetBBReg(adapt, pphyreg-rfintfs, BRFSI_RFENV, 
u4val);
+   phy_set_bb_reg(adapt, pphyreg-rfintfs,
+  BRFSI_RFENV, u4val);
break;
case RF90_PATH_B:
case RF90_PATH_D:
-   PHY_SetBBReg(adapt, pphyreg-rfintfs, BRFSI_RFENV  16,
- u4val);
+   phy_set_bb_reg(adapt, pphyreg-rfintfs,
+  BRFSI_RFENV  16, u4val);
break;
}
 
diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c 
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index e36fa5e..f837c95 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -424,17 +424,17 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
 
/* wtite new elements A, C, D 
to regC88 and regC9C, element B is always 0 */
value32 = (ele_D22) | 
((ele_C0x3F)16) | ele_A;
-   PHY_SetBBReg(Adapter, 
rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
+   phy_set_bb_reg(Adapter, 
rOFDM0_XBTxIQImbalance, bMaskDWord, value32

[PATCH 16/20] staging: rtl8188eu: Rework function PHY_SwChnl8188E()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c  |2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   27 +---
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |2 --
 drivers/staging/rtl8188eu/include/phy.h|1 +
 4 files changed, 14 insertions(+), 18 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index f41e83d..7a8fe53 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -222,7 +222,7 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
pHalFunc-read_chip_version = rtl8188e_read_chip_version;
 
pHalFunc-set_bwmode_handler = phy_set_bw_mode;
-   pHalFunc-set_channel_handler = PHY_SwChnl8188E;
+   pHalFunc-set_channel_handler = phy_sw_chnl;
 
pHalFunc-hal_dm_watchdog = rtl8188e_HalDmWatchDog;
 
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index b1ff892..5041da0 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -355,30 +355,27 @@ static void phy_sw_chnl_callback(struct adapter *adapt, 
u8 channel)
}
 }
 
-void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
+void phy_sw_chnl(struct adapter *adapt, u8 channel)
 {
-   /*  Call after initialization */
-   struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
-   u8 tmpchannel = pHalData-CurrentChannel;
-   bool  bResult = true;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   u8 tmpchannel = hal_data-CurrentChannel;
+   bool  result = true;
 
-   if (pHalData-rf_chip == RF_PSEUDO_11N)
-   return; /* return immediately if it is peudo-phy */
+   if (hal_data-rf_chip == RF_PSEUDO_11N)
+   return;
 
if (channel == 0)
channel = 1;
 
-   pHalData-CurrentChannel = channel;
+   hal_data-CurrentChannel = channel;
 
-   if ((!Adapter-bDriverStopped)  (!Adapter-bSurpriseRemoved)) {
-   phy_sw_chnl_callback(Adapter, channel);
+   if ((!adapt-bDriverStopped)  (!adapt-bSurpriseRemoved)) {
+   phy_sw_chnl_callback(adapt, channel);
 
-   if (bResult)
-   ;
-   else
-   pHalData-CurrentChannel = tmpchannel;
+   if (!result)
+   hal_data-CurrentChannel = tmpchannel;
 
} else {
-   pHalData-CurrentChannel = tmpchannel;
+   hal_data-CurrentChannel = tmpchannel;
}
 }
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h 
b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
index f8bc63c..20e6b40 100644
--- a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
+++ b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
@@ -207,8 +207,6 @@ void PHY_GetTxPowerLevel8188E(struct adapter *adapter, u32 
*powerlevel);
 
 void PHY_ScanOperationBackup8188E(struct adapter *Adapter, u8 Operation);
 
-/*  channel switch related funciton */
-void PHY_SwChnl8188E(struct adapter *adapter, u8 channel);
 /*  Call after initialization */
 void ChkFwCmdIoDone(struct adapter *adapter);
 
diff --git a/drivers/staging/rtl8188eu/include/phy.h 
b/drivers/staging/rtl8188eu/include/phy.h
index 5b93987..defed4a 100644
--- a/drivers/staging/rtl8188eu/include/phy.h
+++ b/drivers/staging/rtl8188eu/include/phy.h
@@ -13,3 +13,4 @@ void phy_set_tx_power_level(struct adapter *adapt, u8 
channel);
 
 void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
 unsigned char offset);
+void phy_sw_chnl(struct adapter *adapt, u8 channel);
-- 
1.7.10.4

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[PATCH 14/20] staging: rtl8188eu: Rework function PHY_SetTxPowerLevel8188E()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c |2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   44 ++--
 drivers/staging/rtl8188eu/hal/usb_halinit.c|2 +-
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |1 -
 drivers/staging/rtl8188eu/include/phy.h|2 +
 5 files changed, 17 insertions(+), 34 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c 
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index f1a1e78..0e58597 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -114,7 +114,7 @@ static void odm_TxPwrTrackSetPwr88E(struct odm_dm_struct 
*dm_odm)
 {
if (dm_odm-BbSwingFlagOfdm || dm_odm-BbSwingFlagCck) {
ODM_RT_TRACE(dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 
(odm_TxPwrTrackSetPwr88E CH=%d\n, *(dm_odm-pChannel)));
-   PHY_SetTxPowerLevel8188E(dm_odm-Adapter, *(dm_odm-pChannel));
+   phy_set_tx_power_level(dm_odm-Adapter, *(dm_odm-pChannel));
dm_odm-BbSwingFlagOfdm = false;
dm_odm-BbSwingFlagCck  = false;
}
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 1aa5a56..85e05ae 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -223,40 +223,22 @@ static void phy_power_index_check(struct adapter *adapt, 
u8 channel,
hal_data-CurrentBW4024GTxPwrIdx = bw40_pwr[0];
 }
 
-/*-
- * Function:SetTxPowerLevel8190()
- *
- * Overview:This function is export to HalCommon moudule
- * We must consider RF path later!!!
- *
- * Input:   struct adapter *Adapter
- * u8  channel
- *
- * Output:  NONE
- *
- * Return:  NONE
- * 2008/11/04  MHC We remove EEPROM_93C56.
- * We need to move CCX relative 
code to independet file.
- * 2009/01/21  MHC Support new EEPROM format from SD3 
requirement.
- *
- *---*/
-void
-PHY_SetTxPowerLevel8188E(
-   struct adapter *Adapter,
-   u8 channel
-   )
+void phy_set_tx_power_level(struct adapter *adapt, u8 channel)
 {
-   u8 cckPowerLevel[MAX_TX_COUNT] = {0};
-   u8 ofdmPowerLevel[MAX_TX_COUNT] = {0};/*  [0]:RF-A, [1]:RF-B */
-   u8 BW20PowerLevel[MAX_TX_COUNT] = {0};
-   u8 BW40PowerLevel[MAX_TX_COUNT] = {0};
+   u8 cck_pwr[MAX_TX_COUNT] = {0};
+   u8 ofdm_pwr[MAX_TX_COUNT] = {0};/*  [0]:RF-A, [1]:RF-B */
+   u8 bw20_pwr[MAX_TX_COUNT] = {0};
+   u8 bw40_pwr[MAX_TX_COUNT] = {0};
 
-   get_tx_power_index(Adapter, channel, cckPowerLevel[0], 
ofdmPowerLevel[0], BW20PowerLevel[0], BW40PowerLevel[0]);
+   get_tx_power_index(adapt, channel, cck_pwr[0], ofdm_pwr[0],
+  bw20_pwr[0], bw40_pwr[0]);
 
-   phy_power_index_check(Adapter, channel, cckPowerLevel[0], 
ofdmPowerLevel[0], BW20PowerLevel[0], BW40PowerLevel[0]);
+   phy_power_index_check(adapt, channel, cck_pwr[0], ofdm_pwr[0],
+ bw20_pwr[0], bw40_pwr[0]);
 
-   rtl8188e_PHY_RF6052SetCckTxPower(Adapter, cckPowerLevel[0]);
-   rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, ofdmPowerLevel[0], 
BW20PowerLevel[0], BW40PowerLevel[0], channel);
+   rtl8188e_PHY_RF6052SetCckTxPower(adapt, cck_pwr[0]);
+   rtl8188e_PHY_RF6052SetOFDMTxPower(adapt, ofdm_pwr[0], bw20_pwr[0],
+ bw40_pwr[0], channel);
 }
 
 static void phy_set_bw_mode_callback(struct adapter *adapt)
@@ -376,7 +358,7 @@ static void phy_sw_chnl_callback(struct adapter *adapt, u8 
channel)
if (adapt-bNotifyChannelChange)
DBG_88E([%s] ch = %d\n, __func__, channel);
 
-   PHY_SetTxPowerLevel8188E(adapt, channel);
+   phy_set_tx_power_level(adapt, channel);
 
param1 = RF_CHNLBW;
param2 = channel;
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c 
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index 968707e..f56cbdf 100644
--- a/drivers/staging/rtl8188eu/hal/usb_halinit.c
+++ b/drivers/staging/rtl8188eu/hal/usb_halinit.c
@@ -829,7 +829,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
 
 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
/*  2010/12/17 MH We need to set TX power according to EFUSE content at 
first. */
-   PHY_SetTxPowerLevel8188E(Adapter, haldata-CurrentChannel);
+   phy_set_tx_power_level(Adapter, haldata-CurrentChannel);
 
 /*  Move by Neo for USB SS to below setp */
 /* _RfPowerSave(Adapter); */
diff --git a/drivers/staging/rtl8188eu/include

[PATCH 15/20] staging: rtl8188eu: Rework function PHY_SetBWMode8188E()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c  |2 +-
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c|   33 ++--
 drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |4 ---
 drivers/staging/rtl8188eu/include/phy.h|3 ++
 4 files changed, 13 insertions(+), 29 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index cc2988c..f41e83d 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -221,7 +221,7 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
 
pHalFunc-read_chip_version = rtl8188e_read_chip_version;
 
-   pHalFunc-set_bwmode_handler = PHY_SetBWMode8188E;
+   pHalFunc-set_bwmode_handler = phy_set_bw_mode;
pHalFunc-set_channel_handler = PHY_SwChnl8188E;
 
pHalFunc-hal_dm_watchdog = rtl8188e_HalDmWatchDog;
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 85e05ae..b1ff892 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -319,34 +319,19 @@ static void phy_set_bw_mode_callback(struct adapter 
*adapt)
}
 }
 
- 
/*-
- * Function:   SetBWMode8190Pci()
- *
- * Overview:  This function is export to HalCommon moudule
- *
- * Input:  struct adapter *Adapter
- * enum ht_channel_width Bandwidth 20M or 40M
- *
- * Output:  NONE
- *
- * Return:  NONE
- *
- * Note:   We do not take j mode into consideration now
- *---*/
-void PHY_SetBWMode8188E(struct adapter *Adapter, enum ht_channel_width 
Bandwidth,  /*  20M or 40M */
-   unsigned char   Offset) /*  Upper, Lower, or 
Don't care */
+void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
+unsigned char offset)
 {
-   struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
-   enum ht_channel_width tmpBW = pHalData-CurrentChannelBW;
-
-   pHalData-CurrentChannelBW = Bandwidth;
+   struct hal_data_8188e   *hal_data = GET_HAL_DATA(adapt);
+   enum ht_channel_width tmp_bw = hal_data-CurrentChannelBW;
 
-   pHalData-nCur40MhzPrimeSC = Offset;
+   hal_data-CurrentChannelBW = bandwidth;
+   hal_data-nCur40MhzPrimeSC = offset;
 
-   if ((!Adapter-bDriverStopped)  (!Adapter-bSurpriseRemoved))
-   phy_set_bw_mode_callback(Adapter);
+   if ((!adapt-bDriverStopped)  (!adapt-bSurpriseRemoved))
+   phy_set_bw_mode_callback(adapt);
else
-   pHalData-CurrentChannelBW = tmpBW;
+   hal_data-CurrentChannelBW = tmp_bw;
 }
 
 static void phy_sw_chnl_callback(struct adapter *adapt, u8 channel)
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h 
b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
index 1835933..f8bc63c 100644
--- a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
+++ b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
@@ -207,10 +207,6 @@ void PHY_GetTxPowerLevel8188E(struct adapter *adapter, u32 
*powerlevel);
 
 void PHY_ScanOperationBackup8188E(struct adapter *Adapter, u8 Operation);
 
-/*  Switch bandwidth for 8192S */
-void PHY_SetBWMode8188E(struct adapter *adapter,
-   enum ht_channel_width chnlwidth, unsigned char offset);
-
 /*  channel switch related funciton */
 void PHY_SwChnl8188E(struct adapter *adapter, u8 channel);
 /*  Call after initialization */
diff --git a/drivers/staging/rtl8188eu/include/phy.h 
b/drivers/staging/rtl8188eu/include/phy.h
index 853d1e3..5b93987 100644
--- a/drivers/staging/rtl8188eu/include/phy.h
+++ b/drivers/staging/rtl8188eu/include/phy.h
@@ -10,3 +10,6 @@ void phy_set_rf_reg(struct adapter *adapt, enum rf_radio_path 
rf_path,
u32 reg_addr, u32 bit_mask, u32 data);
 
 void phy_set_tx_power_level(struct adapter *adapt, u8 channel);
+
+void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
+unsigned char offset);
-- 
1.7.10.4

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[PATCH 11/20] staging: rtl8188eu: Rework function phy_PowerIndexCheck88E()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |   17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index f4df9ef..c33da36 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -211,15 +211,16 @@ static void get_tx_power_index(struct adapter *adapt, u8 
channel, u8 *cck_pwr,
}
 }
 
-static void phy_PowerIndexCheck88E(struct adapter *Adapter, u8 channel, u8 
*cckPowerLevel,
-  u8 *ofdmPowerLevel, u8 *BW20PowerLevel, u8 
*BW40PowerLevel)
+static void phy_power_index_check(struct adapter *adapt, u8 channel,
+ u8 *cck_pwr, u8 *ofdm_pwr, u8 *bw20_pwr,
+ u8 *bw40_pwr)
 {
-   struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
 
-   pHalData-CurrentCckTxPwrIdx = cckPowerLevel[0];
-   pHalData-CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0];
-   pHalData-CurrentBW2024GTxPwrIdx = BW20PowerLevel[0];
-   pHalData-CurrentBW4024GTxPwrIdx = BW40PowerLevel[0];
+   hal_data-CurrentCckTxPwrIdx = cck_pwr[0];
+   hal_data-CurrentOfdm24GTxPwrIdx = ofdm_pwr[0];
+   hal_data-CurrentBW2024GTxPwrIdx = bw20_pwr[0];
+   hal_data-CurrentBW4024GTxPwrIdx = bw40_pwr[0];
 }
 
 /*-
@@ -252,7 +253,7 @@ PHY_SetTxPowerLevel8188E(
 
get_tx_power_index(Adapter, channel, cckPowerLevel[0], 
ofdmPowerLevel[0], BW20PowerLevel[0], BW40PowerLevel[0]);
 
-   phy_PowerIndexCheck88E(Adapter, channel, cckPowerLevel[0], 
ofdmPowerLevel[0], BW20PowerLevel[0], BW40PowerLevel[0]);
+   phy_power_index_check(Adapter, channel, cckPowerLevel[0], 
ofdmPowerLevel[0], BW20PowerLevel[0], BW40PowerLevel[0]);
 
rtl8188e_PHY_RF6052SetCckTxPower(Adapter, cckPowerLevel[0]);
rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, ofdmPowerLevel[0], 
BW20PowerLevel[0], BW40PowerLevel[0], channel);
-- 
1.7.10.4

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[PATCH 13/20] staging: rtl8188eu: Rework function _PHY_SwChnl8192C()

2014-08-23 Thread navin patidar

Rename CamelCase variables and function name.

Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |   22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c 
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 89ec958..1aa5a56 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -367,24 +367,24 @@ void PHY_SetBWMode8188E(struct adapter *Adapter, enum 
ht_channel_width Bandwidth
pHalData-CurrentChannelBW = tmpBW;
 }
 
-static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel)
+static void phy_sw_chnl_callback(struct adapter *adapt, u8 channel)
 {
-   u8 eRFPath;
+   u8 rf_path;
u32 param1, param2;
-   struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
 
-   if (Adapter-bNotifyChannelChange)
+   if (adapt-bNotifyChannelChange)
DBG_88E([%s] ch = %d\n, __func__, channel);
 
-   /* s1. pre common command - CmdID_SetTxPowerLevel */
-   PHY_SetTxPowerLevel8188E(Adapter, channel);
+   PHY_SetTxPowerLevel8188E(adapt, channel);
 
-   /* s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, 
param2=channel */
param1 = RF_CHNLBW;
param2 = channel;
-   for (eRFPath = 0; eRFPath  pHalData-NumTotalRFPath; eRFPath++) {
-   pHalData-RfRegChnlVal[eRFPath] = 
((pHalData-RfRegChnlVal[eRFPath]  0xfc00) | param2);
-   phy_set_rf_reg(Adapter, (enum rf_radio_path)eRFPath, param1, 
bRFRegOffsetMask, pHalData-RfRegChnlVal[eRFPath]);
+   for (rf_path = 0; rf_path  hal_data-NumTotalRFPath; rf_path++) {
+   hal_data-RfRegChnlVal[rf_path] = 
(hal_data-RfRegChnlVal[rf_path] 
+ 0xfc00) | param2;
+   phy_set_rf_reg(adapt, (enum rf_radio_path)rf_path, param1,
+  bRFRegOffsetMask, 
hal_data-RfRegChnlVal[rf_path]);
}
 }
 
@@ -404,7 +404,7 @@ void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
pHalData-CurrentChannel = channel;
 
if ((!Adapter-bDriverStopped)  (!Adapter-bSurpriseRemoved)) {
-   _PHY_SwChnl8192C(Adapter, channel);
+   phy_sw_chnl_callback(Adapter, channel);
 
if (bResult)
;
-- 
1.7.10.4

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[PATCH 17/20] staging: rtl8188eu: Rename rtl8188e_phycfg.c to phy.c

2014-08-23 Thread navin patidar


Signed-off-by: navin patidar navin.pati...@gmail.com
---
 drivers/staging/rtl8188eu/Makefile  |2 +-
 drivers/staging/rtl8188eu/hal/phy.c |  381 +++
 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c |  381 ---
 3 files changed, 382 insertions(+), 382 deletions(-)
 create mode 100644 drivers/staging/rtl8188eu/hal/phy.c
 delete mode 100644 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c

diff --git a/drivers/staging/rtl8188eu/Makefile 
b/drivers/staging/rtl8188eu/Makefile
index 1b8c89b..7886ea0 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -34,7 +34,7 @@ r8188eu-y :=  \
hal/rtl8188e_cmd.o  \
hal/rtl8188e_dm.o   \
hal/rtl8188e_hal_init.o \
-   hal/rtl8188e_phycfg.o   \
+   hal/phy.o \
hal/rtl8188e_rf6052.o   \
hal/rtl8188e_rxdesc.o   \
hal/rtl8188e_xmit.o \
diff --git a/drivers/staging/rtl8188eu/hal/phy.c 
b/drivers/staging/rtl8188eu/hal/phy.c
new file mode 100644
index 000..5041da0
--- /dev/null
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -0,0 +1,381 @@
+/**
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
**/
+#define _RTL8188E_PHYCFG_C_
+
+#include osdep_service.h
+#include drv_types.h
+#include rtw_iol.h
+#include rtl8188e_hal.h
+
+#define MAX_PRECMD_CNT 16
+#define MAX_RFDEPENDCMD_CNT 16
+#define MAX_POSTCMD_CNT 16
+
+#define MAX_DOZE_WAITING_TIMES_9x 64
+
+static u32 cal_bit_shift(u32 bitmask)
+{
+   u32 i;
+
+   for (i = 0; i = 31; i++) {
+   if (((bitmask  i)  0x1) == 1)
+   break;
+   }
+   return i;
+}
+
+u32 phy_query_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask)
+{
+   u32 return_value = 0, original_value, bit_shift;
+
+   original_value = usb_read32(adapt, regaddr);
+   bit_shift = cal_bit_shift(bitmask);
+   return_value = (original_value  bitmask)  bit_shift;
+   return return_value;
+}
+
+void phy_set_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask, u32 data)
+{
+   u32 original_value, bit_shift;
+
+   if (bitmask != bMaskDWord) { /* if not double word write */
+   original_value = usb_read32(adapt, regaddr);
+   bit_shift = cal_bit_shift(bitmask);
+   data = ((original_value  (~bitmask)) | (data  bit_shift));
+   }
+
+   usb_write32(adapt, regaddr, data);
+}
+
+static u32 rf_serial_read(struct adapter *adapt,
+   enum rf_radio_path rfpath, u32 offset)
+{
+   u32 ret = 0;
+   struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+   struct bb_reg_def *phyreg = hal_data-PHYRegDef[rfpath];
+   u32 newoffset;
+   u32 tmplong, tmplong2;
+   u8 rfpi_enable = 0;
+
+   offset = 0xff;
+   newoffset = offset;
+
+   tmplong = phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord);
+   if (rfpath == RF_PATH_A)
+   tmplong2 = tmplong;
+   else
+   tmplong2 = phy_query_bb_reg(adapt, phyreg-rfHSSIPara2,
+   bMaskDWord);
+
+   tmplong2 = (tmplong2  (~bLSSIReadAddress)) |
+  (newoffset23) | bLSSIReadEdge;
+
+   phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord,
+  tmplong(~bLSSIReadEdge));
+   udelay(10);
+
+   phy_set_bb_reg(adapt, phyreg-rfHSSIPara2, bMaskDWord, tmplong2);
+   udelay(100);
+
+   udelay(10);
+
+   if (rfpath == RF_PATH_A)
+   rfpi_enable = (u8)phy_query_bb_reg(adapt, 
rFPGA0_XA_HSSIParameter1, BIT8);
+   else if (rfpath == RF_PATH_B)
+   rfpi_enable = (u8)phy_query_bb_reg(adapt, 
rFPGA0_XB_HSSIParameter1, BIT8);
+
+   if (rfpi_enable)
+   ret = phy_query_bb_reg(adapt, phyreg-rfLSSIReadBackPi,
+  bLSSIReadBackData);
+   else
+   ret = phy_query_bb_reg(adapt, phyreg-rfLSSIReadBack,
+  bLSSIReadBackData

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