[tip:x86/cpu] x86/cpufeature: Remove cpu_has_pge
Commit-ID: c109bf95992b391bb40bc37c5d309d13fead99b5
Gitweb: http://git.kernel.org/tip/c109bf95992b391bb40bc37c5d309d13fead99b5
Author: Borislav Petkov
AuthorDate: Tue, 29 Mar 2016 17:42:02 +0200
Committer: Ingo Molnar
CommitDate: Thu, 31 Mar 2016 13:35:09 +0200
x86/cpufeature: Remove cpu_has_pge
Use static_cpu_has() in __flush_tlb_all() due to the time-sensitivity of
this one.
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1459266123-21878-10-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/cpufeature.h | 1 -
arch/x86/include/asm/tlbflush.h| 2 +-
arch/x86/kernel/cpu/intel.c| 6 +++---
arch/x86/kernel/cpu/mtrr/cyrix.c | 4 ++--
arch/x86/kernel/cpu/mtrr/generic.c | 4 ++--
arch/x86/mm/init.c | 2 +-
arch/x86/xen/enlighten.c | 2 +-
drivers/lguest/x86/core.c | 2 +-
8 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 5e02bc2..f97b534 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -121,7 +121,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
#define cpu_has_fpuboot_cpu_has(X86_FEATURE_FPU)
#define cpu_has_pseboot_cpu_has(X86_FEATURE_PSE)
#define cpu_has_tscboot_cpu_has(X86_FEATURE_TSC)
-#define cpu_has_pgeboot_cpu_has(X86_FEATURE_PGE)
#define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC)
#define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR)
#define cpu_has_xmmboot_cpu_has(X86_FEATURE_XMM)
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index c24b422..3628e6c 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -181,7 +181,7 @@ static inline void __native_flush_tlb_single(unsigned long
addr)
static inline void __flush_tlb_all(void)
{
- if (cpu_has_pge)
+ if (static_cpu_has(X86_FEATURE_PGE))
__flush_tlb_global();
else
__flush_tlb();
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 1dba36f..f71a349 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -152,9 +152,9 @@ static void early_init_intel(struct cpuinfo_x86 *c)
* the TLB when any changes are made to any of the page table entries.
* The operating system must reload CR3 to cause the TLB to be flushed"
*
-* As a result cpu_has_pge() in arch/x86/include/asm/tlbflush.h should
-* be false so that __flush_tlb_all() causes CR3 insted of CR4.PGE
-* to be modified
+* As a result, boot_cpu_has(X86_FEATURE_PGE) in
arch/x86/include/asm/tlbflush.h
+* should be false so that __flush_tlb_all() causes CR3 insted of
CR4.PGE
+* to be modified.
*/
if (c->x86 == 5 && c->x86_model == 9) {
pr_info("Disabling PGE capability bit\n");
diff --git a/arch/x86/kernel/cpu/mtrr/cyrix.c b/arch/x86/kernel/cpu/mtrr/cyrix.c
index f8c81ba..b1086f7 100644
--- a/arch/x86/kernel/cpu/mtrr/cyrix.c
+++ b/arch/x86/kernel/cpu/mtrr/cyrix.c
@@ -137,7 +137,7 @@ static void prepare_set(void)
u32 cr0;
/* Save value of CR4 and clear Page Global Enable (bit 7) */
- if (cpu_has_pge) {
+ if (boot_cpu_has(X86_FEATURE_PGE)) {
cr4 = __read_cr4();
__write_cr4(cr4 & ~X86_CR4_PGE);
}
@@ -170,7 +170,7 @@ static void post_set(void)
write_cr0(read_cr0() & ~X86_CR0_CD);
/* Restore value of CR4 */
- if (cpu_has_pge)
+ if (boot_cpu_has(X86_FEATURE_PGE))
__write_cr4(cr4);
}
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c
b/arch/x86/kernel/cpu/mtrr/generic.c
index 19f5736..f1bed30 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -741,7 +741,7 @@ static void prepare_set(void) __acquires(set_atomicity_lock)
wbinvd();
/* Save value of CR4 and clear Page Global Enable (bit 7) */
- if (cpu_has_pge) {
+ if (boot_cpu_has(X86_FEATURE_PGE)) {
cr4 = __read_cr4();
__write_cr4(cr4 & ~X86_CR4_PGE);
}
@@ -771,7 +771,7 @@ static void post_set(void) __releases(set_atomicity_lock)
write_cr0(read_cr0() & ~X86_CR0_CD);
/* Restore value of CR4 */
- if (cpu_has_pge)
+ if (boot_cpu_has(X86_FEATURE_PGE))
__write_cr4(cr4);
raw_spin_unlock(&set_atomicity_lock);
}
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 14377e9..05ff46a 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -166,7 +166,7 @@ static void __init probe_page_size_mask(void)
cr4_set_bits_and_update_boot(X86_CR4_PSE);
/* Enable PGE if available */
- if (cpu_has_pge) {
+
[tip:x86/cpu] x86/cpufeature: Remove cpu_has_clflush
Commit-ID: 906bf7fda2c9cf5c1762ec607943ed54b6c5b203
Gitweb: http://git.kernel.org/tip/906bf7fda2c9cf5c1762ec607943ed54b6c5b203
Author: Borislav Petkov
AuthorDate: Tue, 29 Mar 2016 17:41:59 +0200
Committer: Ingo Molnar
CommitDate: Thu, 31 Mar 2016 13:35:09 +0200
x86/cpufeature: Remove cpu_has_clflush
Use the fast variant in the DRM code.
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: dri-de...@lists.freedesktop.org
Cc: intel-...@lists.freedesktop.org
Link: http://lkml.kernel.org/r/1459266123-21878-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/cpufeature.h | 1 -
arch/x86/kernel/cpu/intel.c| 2 +-
arch/x86/kernel/tce_64.c | 2 +-
arch/x86/mm/pageattr.c | 2 +-
drivers/gpu/drm/drm_cache.c| 6 +++---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
6 files changed, 7 insertions(+), 8 deletions(-)
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 693b4aa..a751542 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -129,7 +129,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
#define cpu_has_aesboot_cpu_has(X86_FEATURE_AES)
#define cpu_has_avxboot_cpu_has(X86_FEATURE_AVX)
#define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2)
-#define cpu_has_clflushboot_cpu_has(X86_FEATURE_CLFLUSH)
#define cpu_has_patboot_cpu_has(X86_FEATURE_PAT)
#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
#define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 1f7fdb9..628a9f8 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -468,7 +468,7 @@ static void init_intel(struct cpuinfo_x86 *c)
set_cpu_cap(c, X86_FEATURE_PEBS);
}
- if (c->x86 == 6 && cpu_has_clflush &&
+ if (c->x86 == 6 && boot_cpu_has(X86_FEATURE_CLFLUSH) &&
(c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
set_cpu_bug(c, X86_BUG_CLFLUSH_MONITOR);
diff --git a/arch/x86/kernel/tce_64.c b/arch/x86/kernel/tce_64.c
index ab40954..f386bad 100644
--- a/arch/x86/kernel/tce_64.c
+++ b/arch/x86/kernel/tce_64.c
@@ -40,7 +40,7 @@
static inline void flush_tce(void* tceaddr)
{
/* a single tce can't cross a cache line */
- if (cpu_has_clflush)
+ if (boot_cpu_has(X86_FEATURE_CLFLUSH))
clflush(tceaddr);
else
wbinvd();
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index fb20c2e..bbf462f 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1460,7 +1460,7 @@ static int change_page_attr_set_clr(unsigned long *addr,
int numpages,
* error case we fall back to cpa_flush_all (which uses
* WBINVD):
*/
- if (!ret && cpu_has_clflush) {
+ if (!ret && boot_cpu_has(X86_FEATURE_CLFLUSH)) {
if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
cpa_flush_array(addr, numpages, cache,
cpa.flags, pages);
diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
index 6743ff7..059f7c3 100644
--- a/drivers/gpu/drm/drm_cache.c
+++ b/drivers/gpu/drm/drm_cache.c
@@ -72,7 +72,7 @@ drm_clflush_pages(struct page *pages[], unsigned long
num_pages)
{
#if defined(CONFIG_X86)
- if (cpu_has_clflush) {
+ if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
drm_cache_flush_clflush(pages, num_pages);
return;
}
@@ -105,7 +105,7 @@ void
drm_clflush_sg(struct sg_table *st)
{
#if defined(CONFIG_X86)
- if (cpu_has_clflush) {
+ if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
struct sg_page_iter sg_iter;
mb();
@@ -129,7 +129,7 @@ void
drm_clflush_virt_range(void *addr, unsigned long length)
{
#if defined(CONFIG_X86)
- if (cpu_has_clflush) {
+ if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
const int size = boot_cpu_data.x86_clflush_size;
void *end = addr + length;
addr = (void *)(((unsigned long)addr) & -size);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 1328bc5..b845f46 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -488,7 +488,7 @@ i915_gem_execbuffer_relocate_entry(struct
drm_i915_gem_object *obj,
ret = relocate_entry_cpu(obj, reloc, target_offset);
else if (obj->map_and_fenceable)
ret = relocate_entry_gtt(obj, reloc, target_offset);
- else if (cpu_has_clflush)
+ else if (static_cpu_has(X86_FEATURE_CLFLUSH))
ret = relocate_entry_clflu
[tip:x86/cpu] x86/cpufeature: Remove cpu_has_x2apic
Commit-ID: 62436a4d36c94d202784cd8a997ff8bb4b880237
Gitweb: http://git.kernel.org/tip/62436a4d36c94d202784cd8a997ff8bb4b880237
Author: Borislav Petkov
AuthorDate: Tue, 29 Mar 2016 17:41:57 +0200
Committer: Ingo Molnar
CommitDate: Thu, 31 Mar 2016 13:35:08 +0200
x86/cpufeature: Remove cpu_has_x2apic
Signed-off-by: Borislav Petkov
Acked-by: Tony Luck
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1459266123-21878-5-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/ia64/include/asm/iommu.h | 1 -
arch/x86/include/asm/apic.h | 4 ++--
arch/x86/include/asm/cpufeature.h | 1 -
arch/x86/kernel/apic/apic.c | 2 +-
4 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/ia64/include/asm/iommu.h b/arch/ia64/include/asm/iommu.h
index 105c93b..1d12129 100644
--- a/arch/ia64/include/asm/iommu.h
+++ b/arch/ia64/include/asm/iommu.h
@@ -1,7 +1,6 @@
#ifndef _ASM_IA64_IOMMU_H
#define _ASM_IA64_IOMMU_H 1
-#define cpu_has_x2apic 0
/* 10 seconds */
#define DMAR_OPERATION_TIMEOUT (((cycles_t) local_cpu_data->itc_freq)*10)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 98f25bb..bc27611 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -239,10 +239,10 @@ extern void __init check_x2apic(void);
extern void x2apic_setup(void);
static inline int x2apic_enabled(void)
{
- return cpu_has_x2apic && apic_is_x2apic_enabled();
+ return boot_cpu_has(X86_FEATURE_X2APIC) && apic_is_x2apic_enabled();
}
-#define x2apic_supported() (cpu_has_x2apic)
+#define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC))
#else /* !CONFIG_X86_X2APIC */
static inline void check_x2apic(void) { }
static inline void x2apic_setup(void) { }
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 33c29aa..3da7aec 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -132,7 +132,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
#define cpu_has_clflushboot_cpu_has(X86_FEATURE_CLFLUSH)
#define cpu_has_gbpagesboot_cpu_has(X86_FEATURE_GBPAGES)
#define cpu_has_patboot_cpu_has(X86_FEATURE_PAT)
-#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
#define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES)
/*
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index d356987..d7867c8 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1561,7 +1561,7 @@ void __init check_x2apic(void)
pr_info("x2apic: enabled by BIOS, switching to x2apic ops\n");
x2apic_mode = 1;
x2apic_state = X2APIC_ON;
- } else if (!cpu_has_x2apic) {
+ } else if (!boot_cpu_has(X86_FEATURE_X2APIC)) {
x2apic_state = X2APIC_DISABLED;
}
}
[tip:x86/cpu] x86/cpufeature: Remove cpu_has_gbpages
Commit-ID: b8291adc191abec2095f03a130ac91506d345cae
Gitweb: http://git.kernel.org/tip/b8291adc191abec2095f03a130ac91506d345cae
Author: Borislav Petkov
AuthorDate: Tue, 29 Mar 2016 17:41:58 +0200
Committer: Ingo Molnar
CommitDate: Thu, 31 Mar 2016 13:35:08 +0200
x86/cpufeature: Remove cpu_has_gbpages
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1459266123-21878-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/cpufeature.h | 1 -
arch/x86/kvm/mmu.c| 3 ++-
arch/x86/mm/hugetlbpage.c | 4 ++--
arch/x86/mm/init.c| 2 +-
arch/x86/mm/ioremap.c | 2 +-
arch/x86/mm/pageattr.c| 2 +-
6 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 3da7aec..693b4aa 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -130,7 +130,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
#define cpu_has_avxboot_cpu_has(X86_FEATURE_AVX)
#define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2)
#define cpu_has_clflushboot_cpu_has(X86_FEATURE_CLFLUSH)
-#define cpu_has_gbpagesboot_cpu_has(X86_FEATURE_GBPAGES)
#define cpu_has_patboot_cpu_has(X86_FEATURE_PAT)
#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
#define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES)
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 70e95d0..bc1e0b6 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -3836,7 +3836,8 @@ reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
__reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check,
boot_cpu_data.x86_phys_bits,
context->shadow_root_level, false,
- cpu_has_gbpages, true, true);
+ boot_cpu_has(X86_FEATURE_GBPAGES),
+ true, true);
else
__reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
boot_cpu_data.x86_phys_bits,
diff --git a/arch/x86/mm/hugetlbpage.c b/arch/x86/mm/hugetlbpage.c
index 740d7ac..14a9505 100644
--- a/arch/x86/mm/hugetlbpage.c
+++ b/arch/x86/mm/hugetlbpage.c
@@ -162,7 +162,7 @@ static __init int setup_hugepagesz(char *opt)
unsigned long ps = memparse(opt, &opt);
if (ps == PMD_SIZE) {
hugetlb_add_hstate(PMD_SHIFT - PAGE_SHIFT);
- } else if (ps == PUD_SIZE && cpu_has_gbpages) {
+ } else if (ps == PUD_SIZE && boot_cpu_has(X86_FEATURE_GBPAGES)) {
hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT);
} else {
printk(KERN_ERR "hugepagesz: Unsupported page size %lu M\n",
@@ -177,7 +177,7 @@ __setup("hugepagesz=", setup_hugepagesz);
static __init int gigantic_pages_init(void)
{
/* With compaction or CMA we can allocate gigantic pages at runtime */
- if (cpu_has_gbpages && !size_to_hstate(1UL << PUD_SHIFT))
+ if (boot_cpu_has(X86_FEATURE_GBPAGES) && !size_to_hstate(1UL <<
PUD_SHIFT))
hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT);
return 0;
}
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 9d56f27..14377e9 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -173,7 +173,7 @@ static void __init probe_page_size_mask(void)
__supported_pte_mask &= ~_PAGE_GLOBAL;
/* Enable 1 GB linear kernel mappings if available: */
- if (direct_gbpages && cpu_has_gbpages) {
+ if (direct_gbpages && boot_cpu_has(X86_FEATURE_GBPAGES)) {
printk(KERN_INFO "Using GB pages for direct mapping\n");
page_size_mask |= 1 << PG_LEVEL_1G;
} else {
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index 0d8d53d..5a116ac 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -378,7 +378,7 @@ EXPORT_SYMBOL(iounmap);
int __init arch_ioremap_pud_supported(void)
{
#ifdef CONFIG_X86_64
- return cpu_has_gbpages;
+ return boot_cpu_has(X86_FEATURE_GBPAGES);
#else
return 0;
#endif
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 01be9ec..fb20c2e 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1055,7 +1055,7 @@ static int populate_pud(struct cpa_data *cpa, unsigned
long start, pgd_t *pgd,
/*
* Map everything starting from the Gb boundary, possibly with 1G pages
*/
- while (cpu_has_gbpages && end - start >= PUD_SIZE) {
+ while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
set_pud(pud, __pud(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
massage_pgprot(pud_pgprot)));
[tip:x86/cpu] x86/cpufeature: Remove cpu_has_osxsave
Commit-ID: ab4a56fa2c6ce9384ca077b6570c56fe18361f17
Gitweb: http://git.kernel.org/tip/ab4a56fa2c6ce9384ca077b6570c56fe18361f17
Author: Borislav Petkov
AuthorDate: Tue, 29 Mar 2016 17:41:56 +0200
Committer: Ingo Molnar
CommitDate: Thu, 31 Mar 2016 13:35:08 +0200
x86/cpufeature: Remove cpu_has_osxsave
Use boot_cpu_has() instead.
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: linux-cry...@vger.kernel.org
Link: http://lkml.kernel.org/r/1459266123-21878-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/crypto/camellia_aesni_avx2_glue.c | 3 ++-
arch/x86/crypto/camellia_aesni_avx_glue.c | 2 +-
arch/x86/crypto/serpent_avx2_glue.c| 2 +-
arch/x86/include/asm/cpufeature.h | 1 -
arch/x86/include/asm/xor_avx.h | 4 ++--
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/crypto/camellia_aesni_avx2_glue.c
b/arch/x86/crypto/camellia_aesni_avx2_glue.c
index d844569..c37f702 100644
--- a/arch/x86/crypto/camellia_aesni_avx2_glue.c
+++ b/arch/x86/crypto/camellia_aesni_avx2_glue.c
@@ -562,7 +562,8 @@ static int __init camellia_aesni_init(void)
{
const char *feature_name;
- if (!cpu_has_avx2 || !cpu_has_avx || !cpu_has_aes || !cpu_has_osxsave) {
+ if (!cpu_has_avx2 || !cpu_has_avx || !cpu_has_aes ||
+ !boot_cpu_has(X86_FEATURE_OSXSAVE)) {
pr_info("AVX2 or AES-NI instructions are not detected.\n");
return -ENODEV;
}
diff --git a/arch/x86/crypto/camellia_aesni_avx_glue.c
b/arch/x86/crypto/camellia_aesni_avx_glue.c
index 93d8f29..65f6455 100644
--- a/arch/x86/crypto/camellia_aesni_avx_glue.c
+++ b/arch/x86/crypto/camellia_aesni_avx_glue.c
@@ -554,7 +554,7 @@ static int __init camellia_aesni_init(void)
{
const char *feature_name;
- if (!cpu_has_avx || !cpu_has_aes || !cpu_has_osxsave) {
+ if (!cpu_has_avx || !cpu_has_aes || !boot_cpu_has(X86_FEATURE_OSXSAVE))
{
pr_info("AVX or AES-NI instructions are not detected.\n");
return -ENODEV;
}
diff --git a/arch/x86/crypto/serpent_avx2_glue.c
b/arch/x86/crypto/serpent_avx2_glue.c
index 6d19834..408cae2 100644
--- a/arch/x86/crypto/serpent_avx2_glue.c
+++ b/arch/x86/crypto/serpent_avx2_glue.c
@@ -538,7 +538,7 @@ static int __init init(void)
{
const char *feature_name;
- if (!cpu_has_avx2 || !cpu_has_osxsave) {
+ if (!cpu_has_avx2 || !boot_cpu_has(X86_FEATURE_OSXSAVE)) {
pr_info("AVX2 instructions are not detected.\n");
return -ENODEV;
}
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 3aea54e..33c29aa 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -135,7 +135,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
#define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES)
-#define cpu_has_osxsaveboot_cpu_has(X86_FEATURE_OSXSAVE)
/*
* Do not add any more of those clumsy macros - use static_cpu_has() for
* fast paths and boot_cpu_has() otherwise!
diff --git a/arch/x86/include/asm/xor_avx.h b/arch/x86/include/asm/xor_avx.h
index 7c0a517..e45e556 100644
--- a/arch/x86/include/asm/xor_avx.h
+++ b/arch/x86/include/asm/xor_avx.h
@@ -167,12 +167,12 @@ static struct xor_block_template xor_block_avx = {
#define AVX_XOR_SPEED \
do { \
- if (cpu_has_avx && cpu_has_osxsave) \
+ if (cpu_has_avx && boot_cpu_has(X86_FEATURE_OSXSAVE)) \
xor_speed(&xor_block_avx); \
} while (0)
#define AVX_SELECT(FASTEST) \
- (cpu_has_avx && cpu_has_osxsave ? &xor_block_avx : FASTEST)
+ (cpu_has_avx && boot_cpu_has(X86_FEATURE_OSXSAVE) ? &xor_block_avx :
FASTEST)
#else
[tip:x86/cpu] x86/cpufeature: Remove cpu_has_hypervisor
Commit-ID: 0c9f3536cc712dfd5ec3127d55cd7b807cc0adb5
Gitweb: http://git.kernel.org/tip/0c9f3536cc712dfd5ec3127d55cd7b807cc0adb5
Author: Borislav Petkov
AuthorDate: Tue, 29 Mar 2016 17:41:55 +0200
Committer: Ingo Molnar
CommitDate: Thu, 31 Mar 2016 13:35:07 +0200
x86/cpufeature: Remove cpu_has_hypervisor
Use boot_cpu_has() instead.
Tested-by: David Kershner
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: sparmaintai...@unisys.com
Cc: virtualizat...@lists.linux-foundation.org
Link: http://lkml.kernel.org/r/1459266123-21878-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/intel/uncore.c | 2 +-
arch/x86/include/asm/cpufeature.h | 1 -
arch/x86/kernel/cpu/vmware.c | 2 +-
arch/x86/kernel/kvm.c | 2 +-
drivers/staging/unisys/visorbus/visorchipset.c | 2 +-
5 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
index 7012d18..3f6d8b5 100644
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -1383,7 +1383,7 @@ static int __init intel_uncore_init(void)
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
return -ENODEV;
- if (cpu_has_hypervisor)
+ if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
return -ENODEV;
max_packages = topology_max_packages();
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index fee7a6e..3aea54e 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -136,7 +136,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
#define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES)
#define cpu_has_osxsaveboot_cpu_has(X86_FEATURE_OSXSAVE)
-#define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR)
/*
* Do not add any more of those clumsy macros - use static_cpu_has() for
* fast paths and boot_cpu_has() otherwise!
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index 364e583..8cac429 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -94,7 +94,7 @@ static void __init vmware_platform_setup(void)
*/
static uint32_t __init vmware_platform(void)
{
- if (cpu_has_hypervisor) {
+ if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) {
unsigned int eax;
unsigned int hyper_vendor_id[3];
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 8079508..dc1207e 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -522,7 +522,7 @@ static noinline uint32_t __kvm_cpuid_base(void)
if (boot_cpu_data.cpuid_level < 0)
return 0; /* So we don't blow up on old processors */
- if (cpu_has_hypervisor)
+ if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
return hypervisor_cpuid_base("KVMKVMKVM\0\0\0", 0);
return 0;
diff --git a/drivers/staging/unisys/visorbus/visorchipset.c
b/drivers/staging/unisys/visorbus/visorchipset.c
index 5fbda7b..9cf4f84 100644
--- a/drivers/staging/unisys/visorbus/visorchipset.c
+++ b/drivers/staging/unisys/visorbus/visorchipset.c
@@ -2425,7 +2425,7 @@ static __init uint32_t visorutil_spar_detect(void)
{
unsigned int eax, ebx, ecx, edx;
- if (cpu_has_hypervisor) {
+ if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) {
/* check the ID */
cpuid(UNISYS_SPAR_LEAF_ID, &eax, &ebx, &ecx, &edx);
return (ebx == UNISYS_SPAR_ID_EBX) &&
[tip:x86/cpu] x86/cpufeature: Remove cpu_has_arch_perfmon
Commit-ID: 7b5e74e637e4a977c7cf40fd7de332f60b68180e
Gitweb: http://git.kernel.org/tip/7b5e74e637e4a977c7cf40fd7de332f60b68180e
Author: Borislav Petkov
AuthorDate: Tue, 29 Mar 2016 17:41:54 +0200
Committer: Ingo Molnar
CommitDate: Thu, 31 Mar 2016 13:33:17 +0200
x86/cpufeature: Remove cpu_has_arch_perfmon
Use boot_cpu_has() instead.
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: oprofile-l...@lists.sf.net
Link: http://lkml.kernel.org/r/1459266123-21878-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/cpufeature.h | 1 -
arch/x86/oprofile/nmi_int.c | 4 ++--
arch/x86/oprofile/op_model_ppro.c | 2 +-
3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 3636ec0..fee7a6e 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -131,7 +131,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
#define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2)
#define cpu_has_clflushboot_cpu_has(X86_FEATURE_CLFLUSH)
#define cpu_has_gbpagesboot_cpu_has(X86_FEATURE_GBPAGES)
-#define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
#define cpu_has_patboot_cpu_has(X86_FEATURE_PAT)
#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 0e07e09..25171e9 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -636,7 +636,7 @@ static int __init ppro_init(char **cpu_type)
__u8 cpu_model = boot_cpu_data.x86_model;
struct op_x86_model_spec *spec = &op_ppro_spec; /* default */
- if (force_cpu_type == arch_perfmon && cpu_has_arch_perfmon)
+ if (force_cpu_type == arch_perfmon &&
boot_cpu_has(X86_FEATURE_ARCH_PERFMON))
return 0;
/*
@@ -761,7 +761,7 @@ int __init op_nmi_init(struct oprofile_operations *ops)
if (cpu_type)
break;
- if (!cpu_has_arch_perfmon)
+ if (!boot_cpu_has(X86_FEATURE_ARCH_PERFMON))
return -ENODEV;
/* use arch perfmon as fallback */
diff --git a/arch/x86/oprofile/op_model_ppro.c
b/arch/x86/oprofile/op_model_ppro.c
index d90528e..350f709 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -75,7 +75,7 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const
*model,
u64 val;
int i;
- if (cpu_has_arch_perfmon) {
+ if (boot_cpu_has(X86_FEATURE_ARCH_PERFMON)) {
union cpuid10_eax eax;
eax.full = cpuid_eax(0xa);
[tip:x86/mm] x86/mm/pat, x86/cpufeature: Remove cpu_has_pat
Commit-ID: 568a58e5dfbcb88011cad7f87ed046aa00f19d1a Gitweb: http://git.kernel.org/tip/568a58e5dfbcb88011cad7f87ed046aa00f19d1a Author: Borislav Petkov AuthorDate: Tue, 29 Mar 2016 17:42:01 +0200 Committer: Ingo Molnar CommitDate: Thu, 31 Mar 2016 13:32:43 +0200 x86/mm/pat, x86/cpufeature: Remove cpu_has_pat Signed-off-by: Borislav Petkov Acked-by: Daniel Vetter Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Cc: intel-...@lists.freedesktop.org Link: http://lkml.kernel.org/r/1459266123-21878-9-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/include/asm/cpufeature.h | 1 - drivers/gpu/drm/i915/i915_gem.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index 3636ec0..7a3fa7d 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -132,7 +132,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; #define cpu_has_clflushboot_cpu_has(X86_FEATURE_CLFLUSH) #define cpu_has_gbpagesboot_cpu_has(X86_FEATURE_GBPAGES) #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) -#define cpu_has_patboot_cpu_has(X86_FEATURE_PAT) #define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) #define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE) #define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 3d31d3a..aaec8ae 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1732,7 +1732,7 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data, if (args->flags & ~(I915_MMAP_WC)) return -EINVAL; - if (args->flags & I915_MMAP_WC && !cpu_has_pat) + if (args->flags & I915_MMAP_WC && !boot_cpu_has(X86_FEATURE_PAT)) return -ENODEV; obj = drm_gem_object_lookup(dev, file, args->handle);
[tip:x86/asm] x86/cpu: Do the feature test first in enable_sep_cpu()
Commit-ID: b3edfda4382ffaef5e5c1cffb25a33b3b9ef4546 Gitweb: http://git.kernel.org/tip/b3edfda4382ffaef5e5c1cffb25a33b3b9ef4546 Author: Borislav Petkov AuthorDate: Wed, 16 Mar 2016 13:19:29 +0100 Committer: Ingo Molnar CommitDate: Tue, 29 Mar 2016 12:57:12 +0200 x86/cpu: Do the feature test first in enable_sep_cpu() ... before assigning local vars. Kill out label too and simplify. No functionality change. Signed-off-by: Borislav Petkov Acked-by: Andy Lutomirski Cc: Andy Lutomirski Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1458130769-24963-1-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/common.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 8394b3d..7fea407 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1076,12 +1076,12 @@ void enable_sep_cpu(void) struct tss_struct *tss; int cpu; + if (!boot_cpu_has(X86_FEATURE_SEP)) + return; + cpu = get_cpu(); tss = &per_cpu(cpu_tss, cpu); - if (!boot_cpu_has(X86_FEATURE_SEP)) - goto out; - /* * We cache MSR_IA32_SYSENTER_CS's value in the TSS's ss1 field -- * see the big comment in struct x86_hw_tss's definition. @@ -1096,7 +1096,6 @@ void enable_sep_cpu(void) wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0); -out: put_cpu(); } #endif
[tip:x86/asm] x86/thread_info: Merge two !__ASSEMBLY__ sections
Commit-ID: 7388573a341a27e595d23b034d711620cd9a5edb Gitweb: http://git.kernel.org/tip/7388573a341a27e595d23b034d711620cd9a5edb Author: Borislav Petkov AuthorDate: Mon, 28 Mar 2016 20:20:17 +0200 Committer: Ingo Molnar CommitDate: Tue, 29 Mar 2016 10:55:50 +0200 x86/thread_info: Merge two !__ASSEMBLY__ sections We have #ifndef __ASSEMBLY__ ... #endif #ifndef __ASSEMBLY__ ... #endif Merge the two. No functionality change. Signed-off-by: Borislav Petkov Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1459189217-25532-1-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/include/asm/thread_info.h | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h index 8286669..ffae84d 100644 --- a/arch/x86/include/asm/thread_info.h +++ b/arch/x86/include/asm/thread_info.h @@ -276,11 +276,9 @@ static inline bool is_ia32_task(void) */ #define force_iret() set_thread_flag(TIF_NOTIFY_RESUME) -#endif /* !__ASSEMBLY__ */ - -#ifndef __ASSEMBLY__ extern void arch_task_cache_init(void); extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src); extern void arch_release_task_struct(struct task_struct *tsk); -#endif +#endif /* !__ASSEMBLY__ */ + #endif /* _ASM_X86_THREAD_INFO_H */
[tip:x86/urgent] x86/thread_info: Merge two !__ASSEMBLY__ sections
Commit-ID: 5f870a3f7188065e13efafe1faeb01c136173bc4 Gitweb: http://git.kernel.org/tip/5f870a3f7188065e13efafe1faeb01c136173bc4 Author: Borislav Petkov AuthorDate: Mon, 28 Mar 2016 20:20:17 +0200 Committer: Thomas Gleixner CommitDate: Tue, 29 Mar 2016 11:12:10 +0200 x86/thread_info: Merge two !__ASSEMBLY__ sections We have #ifndef __ASSEMBLY__ ... #endif #ifndef __ASSEMBLY__ ... #endif Merge the two. No functionality change. Signed-off-by: Borislav Petkov Link: http://lkml.kernel.org/r/1459189217-25532-1-git-send-email...@alien8.de Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/thread_info.h | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h index 8286669..ffae84d 100644 --- a/arch/x86/include/asm/thread_info.h +++ b/arch/x86/include/asm/thread_info.h @@ -276,11 +276,9 @@ static inline bool is_ia32_task(void) */ #define force_iret() set_thread_flag(TIF_NOTIFY_RESUME) -#endif /* !__ASSEMBLY__ */ - -#ifndef __ASSEMBLY__ extern void arch_task_cache_init(void); extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src); extern void arch_release_task_struct(struct task_struct *tsk); -#endif +#endif /* !__ASSEMBLY__ */ + #endif /* _ASM_X86_THREAD_INFO_H */
[tip:x86/urgent] x86/Documentation: Start documenting x86 topology
Commit-ID: f7be8610bca88e59dd2fd5d98fcbc5031ef0e079 Gitweb: http://git.kernel.org/tip/f7be8610bca88e59dd2fd5d98fcbc5031ef0e079 Author: Borislav Petkov AuthorDate: Mon, 28 Mar 2016 11:56:09 +0200 Committer: Thomas Gleixner CommitDate: Tue, 29 Mar 2016 10:45:04 +0200 x86/Documentation: Start documenting x86 topology This should contain important aspects of how we represent the system topology on x86. If people have questions about it and this file doesn't answer it, then it must be updated. Signed-off-by: Borislav Petkov Link: http://lkml.kernel.org/r/20160328095609.gd26...@pd.tnic Signed-off-by: Thomas Gleixner --- Documentation/x86/topology.txt | 208 + 1 file changed, 208 insertions(+) diff --git a/Documentation/x86/topology.txt b/Documentation/x86/topology.txt new file mode 100644 index 000..06afac2 --- /dev/null +++ b/Documentation/x86/topology.txt @@ -0,0 +1,208 @@ +x86 Topology + + +This documents and clarifies the main aspects of x86 topology modelling and +representation in the kernel. Update/change when doing changes to the +respective code. + +The architecture-agnostic topology definitions are in +Documentation/cputopology.txt. This file holds x86-specific +differences/specialities which must not necessarily apply to the generic +definitions. Thus, the way to read up on Linux topology on x86 is to start +with the generic one and look at this one in parallel for the x86 specifics. + +Needless to say, code should use the generic functions - this file is *only* +here to *document* the inner workings of x86 topology. + +Started by Thomas Gleixner and Borislav Petkov . + +The main aim of the topology facilities is to present adequate interfaces to +code which needs to know/query/use the structure of the running system wrt +threads, cores, packages, etc. + +The kernel does not care about the concept of physical sockets because a +socket has no relevance to software. It's an electromechanical component. In +the past a socket always contained a single package (see below), but with the +advent of Multi Chip Modules (MCM) a socket can hold more than one package. So +there might be still references to sockets in the code, but they are of +historical nature and should be cleaned up. + +The topology of a system is described in the units of: + +- packages +- cores +- threads + +* Package: + + Packages contain a number of cores plus shared resources, e.g. DRAM + controller, shared caches etc. + + AMD nomenclature for package is 'Node'. + + Package-related topology information in the kernel: + + - cpuinfo_x86.x86_max_cores: + +The number of cores in a package. This information is retrieved via CPUID. + + - cpuinfo_x86.phys_proc_id: + +The physical ID of the package. This information is retrieved via CPUID +and deduced from the APIC IDs of the cores in the package. + + - cpuinfo_x86.logical_id: + +The logical ID of the package. As we do not trust BIOSes to enumerate the +packages in a consistent way, we introduced the concept of logical package +ID so we can sanely calculate the number of maximum possible packages in +the system and have the packages enumerated linearly. + + - topology_max_packages(): + +The maximum possible number of packages in the system. Helpful for per +package facilities to preallocate per package information. + + +* Cores: + + A core consists of 1 or more threads. It does not matter whether the threads + are SMT- or CMT-type threads. + + AMDs nomenclature for a CMT core is "Compute Unit". The kernel always uses + "core". + + Core-related topology information in the kernel: + + - smp_num_siblings: + +The number of threads in a core. The number of threads in a package can be +calculated by: + + threads_per_package = cpuinfo_x86.x86_max_cores * smp_num_siblings + + +* Threads: + + A thread is a single scheduling unit. It's the equivalent to a logical Linux + CPU. + + AMDs nomenclature for CMT threads is "Compute Unit Core". The kernel always + uses "thread". + + Thread-related topology information in the kernel: + + - topology_core_cpumask(): + +The cpumask contains all online threads in the package to which a thread +belongs. + +The number of online threads is also printed in /proc/cpuinfo "siblings." + + - topology_sibling_mask(): + +The cpumask contains all online threads in the core to which a thread +belongs. + + - topology_logical_package_id(): + +The logical package ID to which a thread belongs. + + - topology_physical_package_id(): + +The physical package ID to which a thread belongs. + + - topology_core_id(); + +The ID of the core to which a thread belongs. It is also printed in /proc/cpuinfo +"core_id." + + + +System topology examples + +Note: + +The alternative Linux CPU enumeration depends on how the BIOS enumerates the +threads. Many BIOSes enumerate all threads 0 first and then a
[tip:x86/urgent] x86/cpu: Get rid of compute_unit_id
Commit-ID: 8196dab4fc159943df6baaac04973bb1accb7100
Gitweb: http://git.kernel.org/tip/8196dab4fc159943df6baaac04973bb1accb7100
Author: Borislav Petkov
AuthorDate: Fri, 25 Mar 2016 15:52:36 +0100
Committer: Thomas Gleixner
CommitDate: Tue, 29 Mar 2016 10:45:04 +0200
x86/cpu: Get rid of compute_unit_id
It is cpu_core_id anyway.
Signed-off-by: Borislav Petkov
Link: http://lkml.kernel.org/r/1458917557-8757-3-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner
---
arch/x86/include/asm/processor.h | 2 --
arch/x86/kernel/amd_nb.c | 6 ++
arch/x86/kernel/cpu/amd.c| 10 +++---
arch/x86/kernel/smpboot.c| 2 +-
4 files changed, 6 insertions(+), 14 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 983738a..9264476 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -132,8 +132,6 @@ struct cpuinfo_x86 {
u16 logical_proc_id;
/* Core id: */
u16 cpu_core_id;
- /* Compute unit id */
- u8 compute_unit_id;
/* Index into per_cpu list: */
u16 cpu_index;
u32 microcode;
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 29fa475..a147e67 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -170,15 +170,13 @@ int amd_get_subcaches(int cpu)
{
struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link;
unsigned int mask;
- int cuid;
if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
return 0;
pci_read_config_dword(link, 0x1d4, &mask);
- cuid = cpu_data(cpu).compute_unit_id;
- return (mask >> (4 * cuid)) & 0xf;
+ return (mask >> (4 * cpu_data(cpu).cpu_core_id)) & 0xf;
}
int amd_set_subcaches(int cpu, unsigned long mask)
@@ -204,7 +202,7 @@ int amd_set_subcaches(int cpu, unsigned long mask)
pci_write_config_dword(nb->misc, 0x1b8, reg & ~0x18);
}
- cuid = cpu_data(cpu).compute_unit_id;
+ cuid = cpu_data(cpu).cpu_core_id;
mask <<= 4 * cuid;
mask |= (0xf ^ (1 << cuid)) << 26;
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 4d0087f..7b76eb6 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -300,7 +300,6 @@ static int nearby_node(int apicid)
#ifdef CONFIG_SMP
static void amd_get_topology(struct cpuinfo_x86 *c)
{
- u32 cores_per_cu = 1;
u8 node_id;
int cpu = smp_processor_id();
@@ -312,9 +311,9 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
node_id = ecx & 7;
/* get compute unit information */
- cores_per_cu = smp_num_siblings = ((ebx >> 8) & 3) + 1;
+ smp_num_siblings = ((ebx >> 8) & 3) + 1;
c->x86_max_cores /= smp_num_siblings;
- c->compute_unit_id = ebx & 0xff;
+ c->cpu_core_id = ebx & 0xff;
} else if (cpu_has(c, X86_FEATURE_NODEID_MSR)) {
u64 value;
@@ -325,19 +324,16 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
/* fixup multi-node processor information */
if (nodes_per_socket > 1) {
- u32 cores_per_node;
u32 cus_per_node;
set_cpu_cap(c, X86_FEATURE_AMD_DCM);
cus_per_node = c->x86_max_cores / nodes_per_socket;
- cores_per_node = cus_per_node * cores_per_cu;
/* store NodeID, use llc_shared_map to store sibling info */
per_cpu(cpu_llc_id, cpu) = node_id;
/* core id has to be in the [0 .. cores_per_node - 1] range */
- c->cpu_core_id %= cores_per_node;
- c->compute_unit_id %= cus_per_node;
+ c->cpu_core_id %= cus_per_node;
}
}
#endif
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index b2c99f8..a2065d3 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -422,7 +422,7 @@ static bool match_smt(struct cpuinfo_x86 *c, struct
cpuinfo_x86 *o)
if (c->phys_proc_id == o->phys_proc_id &&
per_cpu(cpu_llc_id, cpu1) == per_cpu(cpu_llc_id, cpu2) &&
- c->compute_unit_id == o->compute_unit_id)
+ c->cpu_core_id == o->cpu_core_id)
return topology_sane(c, o, "smt");
} else if (c->phys_proc_id == o->phys_proc_id &&
[tip:x86/urgent] x86/fpu: Fix eager-FPU handling on legacy FPU machines
Commit-ID: 6e6867093de35141f0a76b66ac13f9f2e2c8e77a
Gitweb: http://git.kernel.org/tip/6e6867093de35141f0a76b66ac13f9f2e2c8e77a
Author: Borislav Petkov
AuthorDate: Fri, 11 Mar 2016 12:32:06 +0100
Committer: Ingo Molnar
CommitDate: Sat, 12 Mar 2016 16:13:55 +0100
x86/fpu: Fix eager-FPU handling on legacy FPU machines
i486 derived cores like Intel Quark support only the very old,
legacy x87 FPU (FSAVE/FRSTOR, CPUID bit FXSR is not set), and
our FPU code wasn't handling the saving and restoring there
properly in the 'eagerfpu' case.
So after we made eagerfpu the default for all CPU types:
58122bf1d856 x86/fpu: Default eagerfpu=on on all CPUs
these old FPU designs broke. First, Andy Shevchenko reported a splat:
WARNING: CPU: 0 PID: 823 at arch/x86/include/asm/fpu/internal.h:163
fpu__clear+0x8c/0x160
which was us trying to execute FXRSTOR on those machines even though
they don't support it.
After taking care of that, Bryan O'Donoghue reported that a simple FPU
test still failed because we weren't initializing the FPU state properly
on those machines.
Take care of all that.
Reported-and-tested-by: Bryan O'Donoghue
Reported-by: Andy Shevchenko
Signed-off-by: Borislav Petkov
Acked-by: Linus Torvalds
Cc: Andrew Morton
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Dave Hansen
Cc: Denys Vlasenko
Cc: Fenghua Yu
Cc: H. Peter Anvin
Cc: Oleg Nesterov
Cc: Peter Zijlstra
Cc: Quentin Casasnovas
Cc: Thomas Gleixner
Cc: Yu-cheng
Link: http://lkml.kernel.org/r/2016033206.gd4...@pd.tnic
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/fpu/core.c | 4 +++-
arch/x86/kernel/fpu/init.c | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
index d25097c..d5804ad 100644
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -409,8 +409,10 @@ static inline void copy_init_fpstate_to_fpregs(void)
{
if (use_xsave())
copy_kernel_to_xregs(&init_fpstate.xsave, -1);
- else
+ else if (static_cpu_has(X86_FEATURE_FXSR))
copy_kernel_to_fxregs(&init_fpstate.fxsave);
+ else
+ copy_kernel_to_fregs(&init_fpstate.fsave);
}
/*
diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index 9ee7e30..bd08fb7 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -134,7 +134,7 @@ static void __init fpu__init_system_generic(void)
* Set up the legacy init FPU context. (xstate init might overwrite this
* with a more modern format, if the CPU supports it.)
*/
- fpstate_init_fxstate(&init_fpstate.fxsave);
+ fpstate_init(&init_fpstate);
fpu__init_system_mxcsr();
}
[tip:x86/urgent] x86/delay: Avoid preemptible context checks in delay_mwaitx()
Commit-ID: 84477336ec03f8061ffd6908da341e063e5d6d1f Gitweb: http://git.kernel.org/tip/84477336ec03f8061ffd6908da341e063e5d6d1f Author: Borislav Petkov AuthorDate: Wed, 9 Mar 2016 21:56:22 +0100 Committer: Ingo Molnar CommitDate: Thu, 10 Mar 2016 11:27:12 +0100 x86/delay: Avoid preemptible context checks in delay_mwaitx() We do use this_cpu_ptr(&cpu_tss) as a cacheline-aligned, seldomly accessed per-cpu var as the MONITORX target in delay_mwaitx(). However, when called in preemptible context, this_cpu_ptr -> smp_processor_id() -> debug_smp_processor_id() fires: BUG: using smp_processor_id() in preemptible [] code: udevd/312 caller is delay_mwaitx+0x40/0xa0 But we don't care about that check - we only need cpu_tss as a MONITORX target and it doesn't really matter which CPU's var we're touching as we're going idle anyway. Fix that. Suggested-by: Andy Lutomirski Signed-off-by: Borislav Petkov Cc: Andy Lutomirski Cc: Huang Rui Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Thomas Gleixner Cc: spg_linux_ker...@amd.com Link: http://lkml.kernel.org/r/20160309205622.gg6...@pd.tnic Signed-off-by: Ingo Molnar --- arch/x86/lib/delay.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/lib/delay.c b/arch/x86/lib/delay.c index e912b2f..2f07c29 100644 --- a/arch/x86/lib/delay.c +++ b/arch/x86/lib/delay.c @@ -102,7 +102,7 @@ static void delay_mwaitx(unsigned long __loops) * Use cpu_tss as a cacheline-aligned, seldomly * accessed per-cpu variable as the monitor target. */ - __monitorx(this_cpu_ptr(&cpu_tss), 0, 0); + __monitorx(raw_cpu_ptr(&cpu_tss), 0, 0); /* * AMD, like Intel, supports the EAX hint and EAX=0xf
[tip:x86/build] x86/defconfigs/32: Set CONFIG_FRAME_WARN to the Kconfig default
Commit-ID: 8b30a8b3c636a155bab9176ad209964c9c22252d Gitweb: http://git.kernel.org/tip/8b30a8b3c636a155bab9176ad209964c9c22252d Author: Borislav Petkov AuthorDate: Wed, 9 Mar 2016 14:48:21 +0100 Committer: Ingo Molnar CommitDate: Wed, 9 Mar 2016 14:53:41 +0100 x86/defconfigs/32: Set CONFIG_FRAME_WARN to the Kconfig default Sync it to the Kconfig default for 32-bit. Signed-off-by: Borislav Petkov Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Cc: tim.gard...@canonical.com Link: http://lkml.kernel.org/r/20160309134821.gd6...@pd.tnic Signed-off-by: Ingo Molnar --- arch/x86/configs/i386_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig index 028be48..e25a163 100644 --- a/arch/x86/configs/i386_defconfig +++ b/arch/x86/configs/i386_defconfig @@ -288,7 +288,7 @@ CONFIG_NLS_ISO8859_1=y CONFIG_NLS_UTF8=y CONFIG_PRINTK_TIME=y # CONFIG_ENABLE_WARN_DEPRECATED is not set -CONFIG_FRAME_WARN=2048 +CONFIG_FRAME_WARN=1024 CONFIG_MAGIC_SYSRQ=y # CONFIG_UNUSED_SYMBOLS is not set CONFIG_DEBUG_KERNEL=y
[tip:perf/core] perf/x86/intel/rapl: Simplify quirk handling even more
Commit-ID: 7a8698058ae493ae53b1a8a2fa23d2e37000d73e
Gitweb: http://git.kernel.org/tip/7a8698058ae493ae53b1a8a2fa23d2e37000d73e
Author: Borislav Petkov
AuthorDate: Tue, 8 Mar 2016 17:40:41 +0100
Committer: Ingo Molnar
CommitDate: Tue, 8 Mar 2016 17:49:52 +0100
perf/x86/intel/rapl: Simplify quirk handling even more
Drop the quirk() function pointer in favor of a simple boolean which
says whether the quirk should be applied or not. Update comment while at
it.
Signed-off-by: Borislav Petkov
Cc: Alexander Shishkin
Cc: Andi Kleen
Cc: Arnaldo Carvalho de Melo
Cc: Harish Chegondi
Cc: Jacob Pan
Cc: Jiri Olsa
Cc: Kan Liang
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Cc: linux-tip-comm...@vger.kernel.org
Link: http://lkml.kernel.org/r/20160308164041.gf16...@pd.tnic
Signed-off-by: Ingo Molnar
---
arch/x86/events/intel/rapl.c | 32 +---
1 file changed, 13 insertions(+), 19 deletions(-)
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
index 019e541..b834a3f 100644
--- a/arch/x86/events/intel/rapl.c
+++ b/arch/x86/events/intel/rapl.c
@@ -592,18 +592,7 @@ static int rapl_cpu_notifier(struct notifier_block *self,
return NOTIFY_OK;
}
-static __init void rapl_hsw_server_quirk(void)
-{
- /*
-* DRAM domain on HSW server has fixed energy unit which can be
-* different than the unit from power unit MSR.
-* "Intel Xeon Processor E5-1600 and E5-2600 v3 Product Families, V2
-* of 2. Datasheet, September 2014, Reference Number: 330784-001 "
-*/
- rapl_hw_unit[RAPL_IDX_RAM_NRG_STAT] = 16;
-}
-
-static int rapl_check_hw_unit(void (*quirk)(void))
+static int rapl_check_hw_unit(bool apply_quirk)
{
u64 msr_rapl_power_unit_bits;
int i;
@@ -614,9 +603,14 @@ static int rapl_check_hw_unit(void (*quirk)(void))
for (i = 0; i < NR_RAPL_DOMAINS; i++)
rapl_hw_unit[i] = (msr_rapl_power_unit_bits >> 8) & 0x1FULL;
- /* Apply cpu model quirk */
- if (quirk)
- quirk();
+ /*
+* DRAM domain on HSW server and KNL has fixed energy unit which can be
+* different than the unit from power unit MSR. See
+* "Intel Xeon Processor E5-1600 and E5-2600 v3 Product Families, V2
+* of 2. Datasheet, September 2014, Reference Number: 330784-001 "
+*/
+ if (apply_quirk)
+ rapl_hw_unit[RAPL_IDX_RAM_NRG_STAT] = 16;
/*
* Calculate the timer rate:
@@ -704,7 +698,7 @@ static const struct x86_cpu_id rapl_cpu_match[] __initconst
= {
static int __init rapl_pmu_init(void)
{
- void (*quirk)(void) = NULL;
+ bool apply_quirk = false;
int ret;
if (!x86_match_cpu(rapl_cpu_match))
@@ -717,7 +711,7 @@ static int __init rapl_pmu_init(void)
rapl_pmu_events_group.attrs = rapl_events_cln_attr;
break;
case 63: /* Haswell-Server */
- quirk = rapl_hsw_server_quirk;
+ apply_quirk = true;
rapl_cntr_mask = RAPL_IDX_SRV;
rapl_pmu_events_group.attrs = rapl_events_srv_attr;
break;
@@ -733,7 +727,7 @@ static int __init rapl_pmu_init(void)
rapl_pmu_events_group.attrs = rapl_events_srv_attr;
break;
case 87: /* Knights Landing */
- quirk = rapl_hsw_server_quirk;
+ apply_quirk = true;
rapl_cntr_mask = RAPL_IDX_KNL;
rapl_pmu_events_group.attrs = rapl_events_knl_attr;
break;
@@ -741,7 +735,7 @@ static int __init rapl_pmu_init(void)
return -ENODEV;
}
- ret = rapl_check_hw_unit(quirk);
+ ret = rapl_check_hw_unit(apply_quirk);
if (ret)
return ret;
[tip:perf/core] perf stat: Document --detailed option
Commit-ID: f594bae08183fb6b57db55387794ece3e1edf6f6
Gitweb: http://git.kernel.org/tip/f594bae08183fb6b57db55387794ece3e1edf6f6
Author: Borislav Petkov
AuthorDate: Mon, 7 Mar 2016 16:44:44 -0300
Committer: Ingo Molnar
CommitDate: Tue, 8 Mar 2016 10:11:18 +0100
perf stat: Document --detailed option
I'm surprised this remained undocumented since at least 2011. And it is
actually a very useful switch, as Steve and I came to realize recently.
Add the text from
2cba3ffb9a9d ("perf stat: Add -d -d and -d -d -d options to show more CPU
events")
which added the incrementing aspect to -d.
Tested-by: Arnaldo Carvalho de Melo
Signed-off-by: Borislav Petkov
Signed-off-by: Arnaldo Carvalho de Melo
Cc: Alexander Shishkin
Cc: David Ahern
Cc: Davidlohr Bueso
Cc: Jiri Olsa
Cc: Mel Gorman
Cc: Namhyung Kim
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Steven Rostedt
Cc: Thomas Gleixner
Fixes: 2cba3ffb9a9d ("perf stat: Add -d -d and -d -d -d options to show more
CPU events")
Link: http://lkml.kernel.org/r/1457347294-32546-1-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
tools/perf/Documentation/perf-stat.txt | 8
1 file changed, 8 insertions(+)
diff --git a/tools/perf/Documentation/perf-stat.txt
b/tools/perf/Documentation/perf-stat.txt
index 52ef7a9..14d9e8f 100644
--- a/tools/perf/Documentation/perf-stat.txt
+++ b/tools/perf/Documentation/perf-stat.txt
@@ -69,6 +69,14 @@ report::
--scale::
scale/normalize counter values
+-d::
+--detailed::
+ print more detailed statistics, can be specified up to 3 times
+
+ -d: detailed events, L1 and LLC data cache
+-d -d: more detailed events, dTLB and iTLB events
+ -d -d -d: very detailed events, adding prefetch events
+
-r::
--repeat=::
repeat command and print average + stddev (max: 100). 0 means forever.
[tip:x86/microcode] x86/microcode/intel: Drop orig_sum from ext signature checksum
Commit-ID: 4ace2e7a48ab426eaa9745ace4c50c6a7adb3992
Gitweb: http://git.kernel.org/tip/4ace2e7a48ab426eaa9745ace4c50c6a7adb3992
Author: Borislav Petkov
AuthorDate: Mon, 7 Mar 2016 11:10:04 +0100
Committer: Thomas Gleixner
CommitDate: Tue, 8 Mar 2016 09:08:45 +0100
x86/microcode/intel: Drop orig_sum from ext signature checksum
It is 0 because for !0 values we would have exited already.
Signed-off-by: Borislav Petkov
Link: http://lkml.kernel.org/r/1457345404-28884-6-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner
---
arch/x86/kernel/cpu/microcode/intel_lib.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel_lib.c
b/arch/x86/kernel/cpu/microcode/intel_lib.c
index 23b1d92..2ce1a7d 100644
--- a/arch/x86/kernel/cpu/microcode/intel_lib.c
+++ b/arch/x86/kernel/cpu/microcode/intel_lib.c
@@ -130,9 +130,9 @@ int microcode_sanity_check(void *mc, int print_err)
for (i = 0; i < ext_sigcount; i++) {
ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
EXT_SIGNATURE_SIZE * i;
- sum = orig_sum
- - (mc_header->sig + mc_header->pf + mc_header->cksum)
- + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
+
+ sum = (mc_header->sig + mc_header->pf + mc_header->cksum) -
+ (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
if (sum) {
if (print_err)
pr_err("Bad extended signature checksum,
aborting.\n");
[tip:x86/microcode] x86/microcode/intel: Improve microcode sanity-checking error messages
Commit-ID: 5b46b5e003724547f0c83041cada15f9f496590d
Gitweb: http://git.kernel.org/tip/5b46b5e003724547f0c83041cada15f9f496590d
Author: Borislav Petkov
AuthorDate: Mon, 7 Mar 2016 11:10:03 +0100
Committer: Thomas Gleixner
CommitDate: Tue, 8 Mar 2016 09:08:45 +0100
x86/microcode/intel: Improve microcode sanity-checking error messages
Turn them into proper sentences. Add comments to microcode_sanity_check() to
explain what it does.
Signed-off-by: Borislav Petkov
Link: http://lkml.kernel.org/r/1457345404-28884-5-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner
---
arch/x86/kernel/cpu/microcode/intel_lib.c | 36 ++-
1 file changed, 26 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel_lib.c
b/arch/x86/kernel/cpu/microcode/intel_lib.c
index ffb1bbf..23b1d92 100644
--- a/arch/x86/kernel/cpu/microcode/intel_lib.c
+++ b/arch/x86/kernel/cpu/microcode/intel_lib.c
@@ -57,15 +57,16 @@ int microcode_sanity_check(void *mc, int print_err)
if (data_size + MC_HEADER_SIZE > total_size) {
if (print_err)
- pr_err("error! Bad data size in microcode data file\n");
+ pr_err("Error: bad microcode data file size.\n");
return -EINVAL;
}
if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
if (print_err)
- pr_err("error! Unknown microcode update format\n");
+ pr_err("Error: invalid/unknown microcode update
format.\n");
return -EINVAL;
}
+
ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
if (ext_table_size) {
u32 ext_table_sum = 0;
@@ -74,43 +75,58 @@ int microcode_sanity_check(void *mc, int print_err)
if ((ext_table_size < EXT_HEADER_SIZE)
|| ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
if (print_err)
- pr_err("error! Small exttable size in microcode
data file\n");
+ pr_err("Error: truncated extended signature
table.\n");
return -EINVAL;
}
+
ext_header = mc + MC_HEADER_SIZE + data_size;
if (ext_table_size != exttable_size(ext_header)) {
if (print_err)
- pr_err("error! Bad exttable size in microcode
data file\n");
+ pr_err("Error: extended signature table size
mismatch.\n");
return -EFAULT;
}
+
ext_sigcount = ext_header->count;
- /* check extended table checksum */
+ /*
+* Check extended table checksum: the sum of all dwords that
+* comprise a valid table must be 0.
+*/
ext_tablep = (u32 *)ext_header;
i = ext_table_size / sizeof(u32);
while (i--)
ext_table_sum += ext_tablep[i];
+
if (ext_table_sum) {
if (print_err)
- pr_warn("aborting, bad extended signature table
checksum\n");
+ pr_warn("Bad extended signature table checksum,
aborting.\n");
return -EINVAL;
}
}
- /* calculate the checksum */
+ /*
+* Calculate the checksum of update data and header. The checksum of
+* valid update data and header including the extended signature table
+* must be 0.
+*/
orig_sum = 0;
i = (MC_HEADER_SIZE + data_size) / sizeof(u32);
while (i--)
orig_sum += ((u32 *)mc)[i];
+
if (orig_sum) {
if (print_err)
- pr_err("aborting, bad checksum\n");
+ pr_err("Bad microcode data checksum, aborting.\n");
return -EINVAL;
}
+
if (!ext_table_size)
return 0;
- /* check extended signature checksum */
+
+ /*
+* Check extended signature checksum: 0 => valid.
+*/
for (i = 0; i < ext_sigcount; i++) {
ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
EXT_SIGNATURE_SIZE * i;
@@ -119,7 +135,7 @@ int microcode_sanity_check(void *mc, int print_err)
+ (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
if (sum) {
if (print_err)
- pr_err("aborting, bad checksum\n");
+ pr_err("Bad extended signature checksum,
aborting.\n");
return -EINVAL;
}
}
[tip:x86/microcode] x86/microcode/intel: Merge two consecutive if-statements
Commit-ID: 7d0161569a3b66aaa01520002c3e5fd7126d071f
Gitweb: http://git.kernel.org/tip/7d0161569a3b66aaa01520002c3e5fd7126d071f
Author: Borislav Petkov
AuthorDate: Mon, 7 Mar 2016 11:10:02 +0100
Committer: Thomas Gleixner
CommitDate: Tue, 8 Mar 2016 09:08:45 +0100
x86/microcode/intel: Merge two consecutive if-statements
Merge the two consecutive "if (ext_table_size)". No functional change.
Signed-off-by: Borislav Petkov
Link: http://lkml.kernel.org/r/1457345404-28884-4-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner
---
arch/x86/kernel/cpu/microcode/intel_lib.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel_lib.c
b/arch/x86/kernel/cpu/microcode/intel_lib.c
index 2b2d135..ffb1bbf 100644
--- a/arch/x86/kernel/cpu/microcode/intel_lib.c
+++ b/arch/x86/kernel/cpu/microcode/intel_lib.c
@@ -68,6 +68,9 @@ int microcode_sanity_check(void *mc, int print_err)
}
ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
if (ext_table_size) {
+ u32 ext_table_sum = 0;
+ u32 *ext_tablep;
+
if ((ext_table_size < EXT_HEADER_SIZE)
|| ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
if (print_err)
@@ -81,12 +84,9 @@ int microcode_sanity_check(void *mc, int print_err)
return -EFAULT;
}
ext_sigcount = ext_header->count;
- }
- /* check extended table checksum */
- if (ext_table_size) {
- u32 ext_table_sum = 0;
- u32 *ext_tablep = (u32 *)ext_header;
+ /* check extended table checksum */
+ ext_tablep = (u32 *)ext_header;
i = ext_table_size / sizeof(u32);
while (i--)
[tip:x86/microcode] x86/microcode/intel: Get rid of DWSIZE
Commit-ID: c0414622177ae4739a49ca7dad4306a681e2878b
Gitweb: http://git.kernel.org/tip/c0414622177ae4739a49ca7dad4306a681e2878b
Author: Borislav Petkov
AuthorDate: Mon, 7 Mar 2016 11:10:01 +0100
Committer: Thomas Gleixner
CommitDate: Tue, 8 Mar 2016 09:08:44 +0100
x86/microcode/intel: Get rid of DWSIZE
sizeof(u32) is perfectly clear as it is.
Signed-off-by: Borislav Petkov
Link: http://lkml.kernel.org/r/1457345404-28884-3-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner
---
arch/x86/include/asm/microcode_intel.h| 1 -
arch/x86/kernel/cpu/microcode/intel_lib.c | 4 ++--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/microcode_intel.h
b/arch/x86/include/asm/microcode_intel.h
index 8559b01..603417f 100644
--- a/arch/x86/include/asm/microcode_intel.h
+++ b/arch/x86/include/asm/microcode_intel.h
@@ -40,7 +40,6 @@ struct extended_sigtable {
#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
#define EXT_HEADER_SIZE(sizeof(struct extended_sigtable))
#define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
-#define DWSIZE (sizeof(u32))
#define get_totalsize(mc) \
(((struct microcode_intel *)mc)->hdr.datasize ? \
diff --git a/arch/x86/kernel/cpu/microcode/intel_lib.c
b/arch/x86/kernel/cpu/microcode/intel_lib.c
index 99ca2c9..2b2d135 100644
--- a/arch/x86/kernel/cpu/microcode/intel_lib.c
+++ b/arch/x86/kernel/cpu/microcode/intel_lib.c
@@ -88,7 +88,7 @@ int microcode_sanity_check(void *mc, int print_err)
u32 ext_table_sum = 0;
u32 *ext_tablep = (u32 *)ext_header;
- i = ext_table_size / DWSIZE;
+ i = ext_table_size / sizeof(u32);
while (i--)
ext_table_sum += ext_tablep[i];
if (ext_table_sum) {
@@ -100,7 +100,7 @@ int microcode_sanity_check(void *mc, int print_err)
/* calculate the checksum */
orig_sum = 0;
- i = (MC_HEADER_SIZE + data_size) / DWSIZE;
+ i = (MC_HEADER_SIZE + data_size) / sizeof(u32);
while (i--)
orig_sum += ((u32 *)mc)[i];
if (orig_sum) {
[tip:x86/mm] x86/mm/ptdump: Remove paravirt_enabled()
Commit-ID: b176862fca8625b0a8bee207bca9b611413e5e24
Gitweb: http://git.kernel.org/tip/b176862fca8625b0a8bee207bca9b611413e5e24
Author: Borislav Petkov
AuthorDate: Thu, 18 Feb 2016 21:00:41 +0100
Committer: Ingo Molnar
CommitDate: Sat, 20 Feb 2016 12:25:45 +0100
x86/mm/ptdump: Remove paravirt_enabled()
is_hypervisor_range() can simply check if the PGD index is
within 8000 - 87ff which is the range
reserved for a hypervisor. That range is practically an ABI, see
Documentation/x86/x86_64/mm.txt.
Tested-by: Boris Ostrovsky # Under Xen, as PV guest
Signed-off-by: Borislav Petkov
Cc: Andy Lutomirski
Cc: Linus Torvalds
Cc: Luis R. Rodriguez
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1455825641-19585-1-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/mm/dump_pagetables.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index 4a6f1d9..99bfb19 100644
--- a/arch/x86/mm/dump_pagetables.c
+++ b/arch/x86/mm/dump_pagetables.c
@@ -358,20 +358,19 @@ static void walk_pud_level(struct seq_file *m, struct
pg_state *st, pgd_t addr,
#define pgd_none(a) pud_none(__pud(pgd_val(a)))
#endif
-#ifdef CONFIG_X86_64
static inline bool is_hypervisor_range(int idx)
{
+#ifdef CONFIG_X86_64
/*
* 8000 - 87ff is reserved for
* the hypervisor.
*/
- return paravirt_enabled() &&
- (idx >= pgd_index(__PAGE_OFFSET) - 16) &&
- (idx < pgd_index(__PAGE_OFFSET));
-}
+ return (idx >= pgd_index(__PAGE_OFFSET) - 16) &&
+ (idx < pgd_index(__PAGE_OFFSET));
#else
-static inline bool is_hypervisor_range(int idx) { return false; }
+ return false;
#endif
+}
static void ptdump_walk_pgd_level_core(struct seq_file *m, pgd_t *pgd,
bool checkwx)
[tip:perf/core] perf/x86: Move perf_event_intel_bts.c ........ => x86/events/intel/bts.c
Commit-ID: af5d3aabc04a4b7732b1d3404feebadfe5ae9362
Gitweb: http://git.kernel.org/tip/af5d3aabc04a4b7732b1d3404feebadfe5ae9362
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:07 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:09:45 +0100
perf/x86: Move perf_event_intel_bts.c => x86/events/intel/bts.c
Start moving the Intel bits.
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 1 +
arch/x86/{kernel/cpu/perf_event_intel_bts.c => events/intel/bts.c} | 2 +-
arch/x86/kernel/cpu/Makefile | 2 +-
3 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index 7d1ecff..bcd1e21 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_X86_LOCAL_APIC)+= amd/ibs.o
ifdef CONFIG_AMD_IOMMU
obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/bts.o
diff --git a/arch/x86/kernel/cpu/perf_event_intel_bts.c
b/arch/x86/events/intel/bts.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_intel_bts.c
rename to arch/x86/events/intel/bts.c
index 2cad71d..2bd4833 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_bts.c
+++ b/arch/x86/events/intel/bts.c
@@ -26,7 +26,7 @@
#include
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
struct bts_ctx {
struct perf_output_handle handle;
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 7edbeb9..e28f931 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -34,7 +34,7 @@ ifdef CONFIG_PERF_EVENTS
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o
perf_event_p4.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_lbr.o
perf_event_intel_ds.o perf_event_intel.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_rapl.o
perf_event_intel_cqm.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_pt.o
perf_event_intel_bts.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_pt.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_cstate.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore.o \
[tip:perf/core] perf/x86: Move perf_event.h to its new home
Commit-ID: 27f6d22b037b2be6685e0e27cce929779d634119
Gitweb: http://git.kernel.org/tip/27f6d22b037b2be6685e0e27cce929779d634119
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:23 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:11:36 +0100
perf/x86: Move perf_event.h to its new home
Now that all functionality has been moved to arch/x86/events/, move the
perf_event.h header and adjust include paths.
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-18-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/amd/core.c | 2 +-
arch/x86/events/amd/ibs.c| 2 +-
arch/x86/events/amd/iommu.c | 2 +-
arch/x86/events/core.c | 2 +-
arch/x86/events/intel/bts.c | 2 +-
arch/x86/events/intel/core.c | 2 +-
arch/x86/events/intel/cqm.c | 2 +-
arch/x86/events/intel/cstate.c | 2 +-
arch/x86/events/intel/ds.c | 2 +-
arch/x86/events/intel/knc.c | 2 +-
arch/x86/events/intel/lbr.c | 2 +-
arch/x86/events/intel/p4.c | 2 +-
arch/x86/events/intel/p6.c | 2 +-
arch/x86/events/intel/pt.c | 2 +-
arch/x86/events/intel/rapl.c | 2 +-
arch/x86/events/intel/uncore.h | 2 +-
arch/x86/{kernel/cpu => events}/perf_event.h | 0
arch/x86/xen/pmu.c | 2 +-
18 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
index 51b1658..049ada8d 100644
--- a/arch/x86/events/amd/core.c
+++ b/arch/x86/events/amd/core.c
@@ -5,7 +5,7 @@
#include
#include
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
static __initconst const u64 amd_hw_cache_event_ids
[PERF_COUNT_HW_CACHE_MAX]
diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index a8abd08..51087c2 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -14,7 +14,7 @@
#include
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
static u32 ibs_caps;
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index 629bc70..635e5eb 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -16,7 +16,7 @@
#include
#include
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
#include "iommu.h"
#define COUNTER_SHIFT 16
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 90ca601..7402c818 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -37,7 +37,7 @@
#include
#include
-#include "../kernel/cpu/perf_event.h"
+#include "perf_event.h"
struct x86_pmu x86_pmu __read_mostly;
diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c
index 2bd4833..b99dc92 100644
--- a/arch/x86/events/intel/bts.c
+++ b/arch/x86/events/intel/bts.c
@@ -26,7 +26,7 @@
#include
#include
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
struct bts_ctx {
struct perf_output_handle handle;
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 1edf301..a7ec685 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -18,7 +18,7 @@
#include
#include
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
/*
* Intel PerfMon, used on Core and later.
diff --git a/arch/x86/events/intel/cqm.c b/arch/x86/events/intel/cqm.c
index d1b623a..1b064c4 100644
--- a/arch/x86/events/intel/cqm.c
+++ b/arch/x86/events/intel/cqm.c
@@ -7,7 +7,7 @@
#include
#include
#include
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
#define MSR_IA32_PQR_ASSOC 0x0c8f
#define MSR_IA32_QM_CTR0x0c8e
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 1bbf37e..7946c42 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -89,7 +89,7 @@
#include
#include
#include
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
#define DEFINE_CSTATE_FORMAT_ATTR(_var, _name, _format)\
static ssize_t __cstate_##_var##_show(struct kobject *kobj,\
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 9677207..c8a243d 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -5,7 +5,7 @@
#include
#include
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
/* The size of a BTS record in bytes: */
#define BTS_RECORD_SIZE24
diff --git a/arch/x86/events/intel/knc.c b/arch/x86/events/intel/
[tip:perf/core] perf/x86: Move perf_event_msr.c .............. => x86/events/msr.c
Commit-ID: 65a27a3510c82f16e673548b4c819462fabb12ae
Gitweb: http://git.kernel.org/tip/65a27a3510c82f16e673548b4c819462fabb12ae
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:22 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:11:36 +0100
perf/x86: Move perf_event_msr.c .. => x86/events/msr.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-17-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 4 ++--
arch/x86/{kernel/cpu/perf_event_msr.c => events/msr.c} | 0
arch/x86/kernel/cpu/Makefile | 6 --
3 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index b4e80d02..fdfea15 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -1,13 +1,13 @@
obj-y += core.o
obj-$(CONFIG_CPU_SUP_AMD) += amd/core.o amd/uncore.o
-obj-$(CONFIG_X86_LOCAL_APIC)+= amd/ibs.o
+obj-$(CONFIG_X86_LOCAL_APIC)+= amd/ibs.o msr.o
ifdef CONFIG_AMD_IOMMU
obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o
intel/knc.o
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/lbr.o intel/p4.o intel/p6.o
intel/pt.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= intel/rapl.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/rapl.o msr.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore.o intel/uncore_nhmex.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore_snb.o
intel/uncore_snbep.o
diff --git a/arch/x86/kernel/cpu/perf_event_msr.c b/arch/x86/events/msr.c
similarity index 100%
rename from arch/x86/kernel/cpu/perf_event_msr.c
rename to arch/x86/events/msr.c
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 5cc09fc..7a60424 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -30,12 +30,6 @@ obj-$(CONFIG_CPU_SUP_CENTAUR)+= centaur.o
obj-$(CONFIG_CPU_SUP_TRANSMETA_32) += transmeta.o
obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
-ifdef CONFIG_PERF_EVENTS
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_msr.o
-obj-$(CONFIG_CPU_SUP_AMD) += perf_event_msr.o
-endif
-
-
obj-$(CONFIG_X86_MCE) += mcheck/
obj-$(CONFIG_MTRR) += mtrr/
obj-$(CONFIG_MICROCODE)+= microcode/
[tip:perf/core] perf/x86: Move perf_event_intel_rapl.c ....... => x86/events/intel/rapl.c
Commit-ID: 609d809f832ddda20f03029c865dd052596ea394
Gitweb: http://git.kernel.org/tip/609d809f832ddda20f03029c865dd052596ea394
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:14 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:09:47 +0100
perf/x86: Move perf_event_intel_rapl.c ... => x86/events/intel/rapl.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-9-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 2 +-
arch/x86/{kernel/cpu/perf_event_intel_rapl.c => events/intel/rapl.c} | 2 +-
arch/x86/kernel/cpu/Makefile | 1 -
3 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index 2a2f55d..f68232c 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -7,4 +7,4 @@ obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o intel/lbr.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= intel/pt.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/pt.o intel/rapl.o
diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c
b/arch/x86/events/intel/rapl.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_intel_rapl.c
rename to arch/x86/events/intel/rapl.c
index 24a351a..9541f50 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_rapl.c
+++ b/arch/x86/events/intel/rapl.c
@@ -48,7 +48,7 @@
#include
#include
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
/*
* RAPL energy status counters
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 595e3ff..018451a 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -32,7 +32,6 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o
perf_event_p4.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_rapl.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore.o \
perf_event_intel_uncore_snb.o \
[tip:perf/core] perf/x86: Move perf_event_intel_pt.[ch] ...... => x86/events/intel/pt.[ch]
Commit-ID: fd1c601c25785ef38d698ff0091b5fe253074715
Gitweb: http://git.kernel.org/tip/fd1c601c25785ef38d698ff0091b5fe253074715
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:13 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:09:47 +0100
perf/x86: Move perf_event_intel_pt.[ch] .. => x86/events/intel/pt.[ch]
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-8-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 1 +
arch/x86/{kernel/cpu/perf_event_intel_pt.c => events/intel/pt.c} | 4 ++--
arch/x86/{kernel/cpu/intel_pt.h => events/intel/pt.h}| 0
arch/x86/kernel/cpu/Makefile | 1 -
4 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index 48097fd..2a2f55d 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o intel/lbr.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/pt.o
diff --git a/arch/x86/kernel/cpu/perf_event_intel_pt.c
b/arch/x86/events/intel/pt.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_intel_pt.c
rename to arch/x86/events/intel/pt.c
index c0bbd10..e56cebe 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_pt.c
+++ b/arch/x86/events/intel/pt.c
@@ -29,8 +29,8 @@
#include
#include
-#include "perf_event.h"
-#include "intel_pt.h"
+#include "../../kernel/cpu/perf_event.h"
+#include "pt.h"
static DEFINE_PER_CPU(struct pt, pt_ctx);
diff --git a/arch/x86/kernel/cpu/intel_pt.h b/arch/x86/events/intel/pt.h
similarity index 100%
rename from arch/x86/kernel/cpu/intel_pt.h
rename to arch/x86/events/intel/pt.h
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index d52ed9b..595e3ff 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -33,7 +33,6 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o
perf_event_p4.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_rapl.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_pt.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore.o \
perf_event_intel_uncore_snb.o \
[tip:perf/core] perf/x86: Move perf_event_p6.c ............... => x86/events/intel/p6.c
Commit-ID: 5e865ed44b39fa991a8fb1d7d9c0338f8fedac33
Gitweb: http://git.kernel.org/tip/5e865ed44b39fa991a8fb1d7d9c0338f8fedac33
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:21 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:11:36 +0100
perf/x86: Move perf_event_p6.c ... => x86/events/intel/p6.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-16-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 2 +-
arch/x86/{kernel/cpu/perf_event_p6.c => events/intel/p6.c} | 2 +-
arch/x86/kernel/cpu/Makefile | 2 --
3 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index 5a6f20d..b4e80d02 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -7,7 +7,7 @@ obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o
intel/knc.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= intel/lbr.o intel/p4.o intel/pt.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/lbr.o intel/p4.o intel/p6.o
intel/pt.o
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/rapl.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore.o intel/uncore_nhmex.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore_snb.o
intel/uncore_snbep.o
diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/events/intel/p6.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_p6.c
rename to arch/x86/events/intel/p6.c
index 7c1a0c0..ee5c4e8 100644
--- a/arch/x86/kernel/cpu/perf_event_p6.c
+++ b/arch/x86/events/intel/p6.c
@@ -1,7 +1,7 @@
#include
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
/*
* Not sure about some of these
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 2bb41d0..5cc09fc 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -31,8 +31,6 @@ obj-$(CONFIG_CPU_SUP_TRANSMETA_32)+= transmeta.o
obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o
-
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_msr.o
obj-$(CONFIG_CPU_SUP_AMD) += perf_event_msr.o
endif
[tip:perf/core] perf/x86: Move perf_event_p4.c ............... => x86/events/intel/p4.c
Commit-ID: f03e97dbd2bb7d9436400fb6946502268ab33542
Gitweb: http://git.kernel.org/tip/f03e97dbd2bb7d9436400fb6946502268ab33542
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:20 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:11:35 +0100
perf/x86: Move perf_event_p4.c ... => x86/events/intel/p4.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-15-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 3 ++-
arch/x86/{kernel/cpu/perf_event_p4.c => events/intel/p4.c} | 2 +-
arch/x86/kernel/cpu/Makefile | 2 +-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index c1647a6..5a6f20d 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o
intel/knc.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= intel/lbr.o intel/pt.o intel/rapl.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/lbr.o intel/p4.o intel/pt.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/rapl.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore.o intel/uncore_nhmex.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore_snb.o
intel/uncore_snbep.o
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/events/intel/p4.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_p4.c
rename to arch/x86/events/intel/p4.c
index f2e5678..1c72fed 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/events/intel/p4.c
@@ -13,7 +13,7 @@
#include
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
#define P4_CNTR_LIMIT 3
/*
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 3195f7d..2bb41d0 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -31,7 +31,7 @@ obj-$(CONFIG_CPU_SUP_TRANSMETA_32)+= transmeta.o
obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_p4.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_msr.o
obj-$(CONFIG_CPU_SUP_AMD) += perf_event_msr.o
[tip:perf/core] perf/x86: Move perf_event_knc.c .............. => x86/events/intel/knc.c
Commit-ID: edbb591870dc8d1fd855014ea5360475f7bc46af
Gitweb: http://git.kernel.org/tip/edbb591870dc8d1fd855014ea5360475f7bc46af
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:19 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:11:35 +0100
perf/x86: Move perf_event_knc.c .. => x86/events/intel/knc.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-14-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 4 ++--
arch/x86/{kernel/cpu/perf_event_knc.c => events/intel/knc.c} | 2 +-
arch/x86/kernel/cpu/Makefile | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index 8c939ca..c1647a6 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -6,7 +6,7 @@ ifdef CONFIG_AMD_IOMMU
obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o intel/lbr.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= intel/pt.o intel/rapl.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o
intel/knc.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/lbr.o intel/pt.o intel/rapl.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore.o intel/uncore_nhmex.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore_snb.o
intel/uncore_snbep.o
diff --git a/arch/x86/kernel/cpu/perf_event_knc.c b/arch/x86/events/intel/knc.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_knc.c
rename to arch/x86/events/intel/knc.c
index 5b0c232..630bcba 100644
--- a/arch/x86/kernel/cpu/perf_event_knc.c
+++ b/arch/x86/events/intel/knc.c
@@ -5,7 +5,7 @@
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
static const u64 knc_perfmon_event_map[] =
{
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 973b77b..3195f7d 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -31,7 +31,7 @@ obj-$(CONFIG_CPU_SUP_TRANSMETA_32)+= transmeta.o
obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o
perf_event_p4.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_p4.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_msr.o
obj-$(CONFIG_CPU_SUP_AMD) += perf_event_msr.o
[tip:perf/core] perf/x86: Move perf_event_intel_uncore_snbep.c => x86/events/intel/uncore_snbep.c
Commit-ID: ed367e6ca42716a11a6d1b5162fdd378f9494eff Gitweb: http://git.kernel.org/tip/ed367e6ca42716a11a6d1b5162fdd378f9494eff Author: Borislav Petkov AuthorDate: Wed, 10 Feb 2016 10:55:18 +0100 Committer: Ingo Molnar CommitDate: Wed, 17 Feb 2016 10:11:34 +0100 perf/x86: Move perf_event_intel_uncore_snbep.c => x86/events/intel/uncore_snbep.c Signed-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-13-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/events/Makefile| 2 +- .../cpu/perf_event_intel_uncore_snbep.c => events/intel/uncore_snbep.c} | 2 +- arch/x86/kernel/cpu/Makefile| 1 - 3 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile index eb0d921..8c939ca 100644 --- a/arch/x86/events/Makefile +++ b/arch/x86/events/Makefile @@ -9,4 +9,4 @@ obj-$(CONFIG_CPU_SUP_INTEL) += intel/core.o intel/bts.o intel/cqm.o obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o intel/lbr.o obj-$(CONFIG_CPU_SUP_INTEL)+= intel/pt.o intel/rapl.o obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore.o intel/uncore_nhmex.o -obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore_snb.o +obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore_snb.o intel/uncore_snbep.o diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c similarity index 99% rename from arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c rename to arch/x86/events/intel/uncore_snbep.c index 188e18a..0c801f7 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -1,5 +1,5 @@ /* SandyBridge-EP/IvyTown uncore support */ -#include "../../events/intel/uncore.h" +#include "uncore.h" /* SNB-EP Box level control */ #define SNBEP_PMON_BOX_CTL_RST_CTRL(1 << 0) diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile index 696d106..973b77b 100644 --- a/arch/x86/kernel/cpu/Makefile +++ b/arch/x86/kernel/cpu/Makefile @@ -33,7 +33,6 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o ifdef CONFIG_PERF_EVENTS obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o perf_event_p4.o -obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore_snbep.o obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_msr.o obj-$(CONFIG_CPU_SUP_AMD) += perf_event_msr.o endif
[tip:perf/core] perf/x86: Move perf_event_intel_uncore.[ch] .. => x86/events/intel/uncore.[ch]
Commit-ID: 6bcb2db547be8263a98ae9413127df9385b38763
Gitweb: http://git.kernel.org/tip/6bcb2db547be8263a98ae9413127df9385b38763
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:15 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:09:47 +0100
perf/x86: Move perf_event_intel_uncore.[ch] .. => x86/events/intel/uncore.[ch]
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-10-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 1 +
.../{kernel/cpu/perf_event_intel_uncore.c => events/intel/uncore.c}| 2 +-
.../{kernel/cpu/perf_event_intel_uncore.h => events/intel/uncore.h}| 2 +-
arch/x86/kernel/cpu/Makefile | 3 +--
arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c| 2 +-
arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 2 +-
arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c| 3 +--
7 files changed, 7 insertions(+), 8 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index f68232c..aae3e53 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -8,3 +8,4 @@ endif
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o intel/lbr.o
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/pt.o intel/rapl.o
+obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore.o
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
b/arch/x86/events/intel/uncore.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_intel_uncore.c
rename to arch/x86/events/intel/uncore.c
index 3bf41d4..91a18d6 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -1,4 +1,4 @@
-#include "perf_event_intel_uncore.h"
+#include "uncore.h"
static struct intel_uncore_type *empty_uncore[] = { NULL, };
struct intel_uncore_type **uncore_msr_uncores = empty_uncore;
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.h
b/arch/x86/events/intel/uncore.h
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_intel_uncore.h
rename to arch/x86/events/intel/uncore.h
index a7086b8..1dea204 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.h
+++ b/arch/x86/events/intel/uncore.h
@@ -2,7 +2,7 @@
#include
#include
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
#define UNCORE_PMU_NAME_LEN32
#define UNCORE_PMU_HRTIMER_INTERVAL(60LL * NSEC_PER_SEC)
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 018451a..875d1b1 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -33,8 +33,7 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o
perf_event_p4.o
-obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore.o \
- perf_event_intel_uncore_snb.o \
+obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore_snb.o \
perf_event_intel_uncore_snbep.o \
perf_event_intel_uncore_nhmex.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_msr.o
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c
b/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c
index 2749965..d70cfe0 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c
@@ -1,5 +1,5 @@
/* Nehalem-EX/Westmere-EX uncore support */
-#include "perf_event_intel_uncore.h"
+#include "../../events/intel/uncore.h"
/* NHM-EX event control */
#define NHMEX_PMON_CTL_EV_SEL_MASK 0x00ff
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
index 2bd030d..e0e41f5 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
@@ -1,5 +1,5 @@
/* Nehalem/SandBridge/Haswell uncore support */
-#include "perf_event_intel_uncore.h"
+#include "../../events/intel/uncore.h"
/* Uncore IMC PCI IDs */
#define PCI_DEVICE_ID_INTEL_SNB_IMC0x0100
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c
b/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c
index 33acb88..188e18a 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c
@@ -1,6 +1,5 @@
/* SandyBridge-EP/IvyTown uncore support */
-#include "perf_event_intel_uncore.h"
-
+#include "../../events/intel/uncore.h"
/* SNB-EP Bo
[tip:perf/core] perf/x86: Move perf_event_intel_uncore_snb.c => x86/events/intel/uncore_snb.c
Commit-ID: 92553e40c6292408faa069b34a6db0dab4055080 Gitweb: http://git.kernel.org/tip/92553e40c6292408faa069b34a6db0dab4055080 Author: Borislav Petkov AuthorDate: Wed, 10 Feb 2016 10:55:17 +0100 Committer: Ingo Molnar CommitDate: Wed, 17 Feb 2016 10:11:26 +0100 perf/x86: Move perf_event_intel_uncore_snb.c => x86/events/intel/uncore_snb.c Signed-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-12-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/events/Makefile | 1 + .../cpu/perf_event_intel_uncore_snb.c => events/intel/uncore_snb.c}| 2 +- arch/x86/kernel/cpu/Makefile | 3 +-- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile index 70aedfe..eb0d921 100644 --- a/arch/x86/events/Makefile +++ b/arch/x86/events/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_CPU_SUP_INTEL) += intel/core.o intel/bts.o intel/cqm.o obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o intel/lbr.o obj-$(CONFIG_CPU_SUP_INTEL)+= intel/pt.o intel/rapl.o obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore.o intel/uncore_nhmex.o +obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore_snb.o diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c b/arch/x86/events/intel/uncore_snb.c similarity index 99% rename from arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c rename to arch/x86/events/intel/uncore_snb.c index e0e41f5..2049d26 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c +++ b/arch/x86/events/intel/uncore_snb.c @@ -1,5 +1,5 @@ /* Nehalem/SandBridge/Haswell uncore support */ -#include "../../events/intel/uncore.h" +#include "uncore.h" /* Uncore IMC PCI IDs */ #define PCI_DEVICE_ID_INTEL_SNB_IMC0x0100 diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile index 316f53a..696d106 100644 --- a/arch/x86/kernel/cpu/Makefile +++ b/arch/x86/kernel/cpu/Makefile @@ -33,8 +33,7 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o ifdef CONFIG_PERF_EVENTS obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o perf_event_p4.o -obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore_snb.o \ - perf_event_intel_uncore_snbep.o +obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore_snbep.o obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_msr.o obj-$(CONFIG_CPU_SUP_AMD) += perf_event_msr.o endif
[tip:perf/core] perf/x86: Move perf_event_intel_uncore_nhmex.c => x86/events/intel/uncore_nmhex.c
Commit-ID: 35bf705c25e875f40ff8ed6af415315335973977 Gitweb: http://git.kernel.org/tip/35bf705c25e875f40ff8ed6af415315335973977 Author: Borislav Petkov AuthorDate: Wed, 10 Feb 2016 10:55:16 +0100 Committer: Ingo Molnar CommitDate: Wed, 17 Feb 2016 10:09:48 +0100 perf/x86: Move perf_event_intel_uncore_nhmex.c => x86/events/intel/uncore_nmhex.c Signed-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-11-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/events/Makefile | 2 +- .../perf_event_intel_uncore_nhmex.c => events/intel/uncore_nhmex.c}| 2 +- arch/x86/kernel/cpu/Makefile | 3 +-- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile index aae3e53..70aedfe 100644 --- a/arch/x86/events/Makefile +++ b/arch/x86/events/Makefile @@ -8,4 +8,4 @@ endif obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o intel/lbr.o obj-$(CONFIG_CPU_SUP_INTEL)+= intel/pt.o intel/rapl.o -obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore.o +obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore.o intel/uncore_nhmex.o diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c b/arch/x86/events/intel/uncore_nhmex.c similarity index 99% rename from arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c rename to arch/x86/events/intel/uncore_nhmex.c index d70cfe0..e89bf5c 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c +++ b/arch/x86/events/intel/uncore_nhmex.c @@ -1,5 +1,5 @@ /* Nehalem-EX/Westmere-EX uncore support */ -#include "../../events/intel/uncore.h" +#include "uncore.h" /* NHM-EX event control */ #define NHMEX_PMON_CTL_EV_SEL_MASK 0x00ff diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile index 875d1b1..316f53a 100644 --- a/arch/x86/kernel/cpu/Makefile +++ b/arch/x86/kernel/cpu/Makefile @@ -34,8 +34,7 @@ ifdef CONFIG_PERF_EVENTS obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o perf_event_p4.o obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore_snb.o \ - perf_event_intel_uncore_snbep.o \ - perf_event_intel_uncore_nhmex.o + perf_event_intel_uncore_snbep.o obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_msr.o obj-$(CONFIG_CPU_SUP_AMD) += perf_event_msr.o endif
[tip:perf/core] perf/x86: Move perf_event_intel_ds.c ......... => x86/events/intel/ds.c
Commit-ID: 7010d129137aa44a79a6a1911881e07e1cd5da60
Gitweb: http://git.kernel.org/tip/7010d129137aa44a79a6a1911881e07e1cd5da60
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:11 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:09:46 +0100
perf/x86: Move perf_event_intel_ds.c . => x86/events/intel/ds.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 2 +-
arch/x86/{kernel/cpu/perf_event_intel_ds.c => events/intel/ds.c} | 2 +-
arch/x86/kernel/cpu/Makefile | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index e0a70fe..c4d41b6 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -6,4 +6,4 @@ ifdef CONFIG_AMD_IOMMU
obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c
b/arch/x86/events/intel/ds.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_intel_ds.c
rename to arch/x86/events/intel/ds.c
index 7c79261..9677207 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -5,7 +5,7 @@
#include
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
/* The size of a BTS record in bytes: */
#define BTS_RECORD_SIZE24
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 1bc881b..035bdb6 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -32,7 +32,7 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o
perf_event_p4.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_lbr.o
perf_event_intel_ds.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_lbr.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_rapl.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_pt.o
[tip:perf/core] perf/x86: Move perf_event_intel_cqm.c ........ => x86/events/intel/cqm.c
Commit-ID: 5c781a3daa3053c355259894f9e7a478deb0cb46
Gitweb: http://git.kernel.org/tip/5c781a3daa3053c355259894f9e7a478deb0cb46
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:09 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:09:46 +0100
perf/x86: Move perf_event_intel_cqm.c => x86/events/intel/cqm.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 2 +-
arch/x86/{kernel/cpu/perf_event_intel_cqm.c => events/intel/cqm.c} | 2 +-
arch/x86/kernel/cpu/Makefile | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index 834e9ae..f97c283 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -5,4 +5,4 @@ obj-$(CONFIG_X86_LOCAL_APIC)+= amd/ibs.o
ifdef CONFIG_AMD_IOMMU
obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
-obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o
diff --git a/arch/x86/kernel/cpu/perf_event_intel_cqm.c
b/arch/x86/events/intel/cqm.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_intel_cqm.c
rename to arch/x86/events/intel/cqm.c
index a316ca9..d1b623a 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_cqm.c
+++ b/arch/x86/events/intel/cqm.c
@@ -7,7 +7,7 @@
#include
#include
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
#define MSR_IA32_PQR_ASSOC 0x0c8f
#define MSR_IA32_QM_CTR0x0c8e
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 0a27243..64781cf 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -33,7 +33,7 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o
perf_event_p4.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_lbr.o
perf_event_intel_ds.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_rapl.o
perf_event_intel_cqm.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_rapl.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_pt.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_cstate.o
[tip:perf/core] perf/x86: Move perf_event_intel_cstate.c ..... => x86/events/intel/cstate.c
Commit-ID: 6aec1ad7365661315e9ab13b17eeb97ab3c38176
Gitweb: http://git.kernel.org/tip/6aec1ad7365661315e9ab13b17eeb97ab3c38176
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:10 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:09:46 +0100
perf/x86: Move perf_event_intel_cstate.c . => x86/events/intel/cstate.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-5-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile| 1 +
.../x86/{kernel/cpu/perf_event_intel_cstate.c => events/intel/cstate.c} | 2 +-
arch/x86/kernel/cpu/Makefile| 1 -
3 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index f97c283..e0a70fe 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -6,3 +6,4 @@ ifdef CONFIG_AMD_IOMMU
obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o
diff --git a/arch/x86/kernel/cpu/perf_event_intel_cstate.c
b/arch/x86/events/intel/cstate.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_intel_cstate.c
rename to arch/x86/events/intel/cstate.c
index 75a38b5..1bbf37e 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -89,7 +89,7 @@
#include
#include
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
#define DEFINE_CSTATE_FORMAT_ATTR(_var, _name, _format)\
static ssize_t __cstate_##_var##_show(struct kobject *kobj,\
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 64781cf..1bc881b 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -35,7 +35,6 @@ obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_p6.o
perf_event_knc.o perf_event_p4.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_lbr.o
perf_event_intel_ds.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_rapl.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_pt.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_cstate.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore.o \
perf_event_intel_uncore_snb.o \
[tip:perf/core] perf/x86: Move perf_event_intel_lbr.c ........ => x86/events/intel/lbr.c
Commit-ID: c85cc4497f823b83379a23e798018d69fe566185
Gitweb: http://git.kernel.org/tip/c85cc4497f823b83379a23e798018d69fe566185
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:12 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:09:46 +0100
perf/x86: Move perf_event_intel_lbr.c => x86/events/intel/lbr.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 2 +-
arch/x86/{kernel/cpu/perf_event_intel_lbr.c => events/intel/lbr.c} | 2 +-
arch/x86/kernel/cpu/Makefile | 1 -
3 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index c4d41b6..48097fd 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -6,4 +6,4 @@ ifdef CONFIG_AMD_IOMMU
obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o intel/cqm.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/cstate.o intel/ds.o intel/lbr.o
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
b/arch/x86/events/intel/lbr.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_intel_lbr.c
rename to arch/x86/events/intel/lbr.c
index 653f88d..78c88f9 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -5,7 +5,7 @@
#include
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
enum {
LBR_FORMAT_32 = 0x00,
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 035bdb6..d52ed9b 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -32,7 +32,6 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o
perf_event_p4.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_lbr.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_rapl.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_pt.o
[tip:perf/core] perf/x86: Move perf_event_intel.c ............ => x86/events/intel/core.c
Commit-ID: e1069839dd6893d2135b2fc4d96e5d03d73c2c3d
Gitweb: http://git.kernel.org/tip/e1069839dd6893d2135b2fc4d96e5d03d73c2c3d
Author: Borislav Petkov
AuthorDate: Wed, 10 Feb 2016 10:55:08 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 10:09:45 +0100
perf/x86: Move perf_event_intel.c => x86/events/intel/core.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1455098123-11740-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile| 2 +-
arch/x86/{kernel/cpu/perf_event_intel.c => events/intel/core.c} | 2 +-
arch/x86/kernel/cpu/Makefile| 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index bcd1e21..834e9ae 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -5,4 +5,4 @@ obj-$(CONFIG_X86_LOCAL_APIC)+= amd/ibs.o
ifdef CONFIG_AMD_IOMMU
obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
endif
-obj-$(CONFIG_CPU_SUP_INTEL)+= intel/bts.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= intel/core.o intel/bts.o
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c
b/arch/x86/events/intel/core.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_intel.c
rename to arch/x86/events/intel/core.c
index fed2ab1..1edf301 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/events/intel/core.c
@@ -18,7 +18,7 @@
#include
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
/*
* Intel PerfMon, used on Core and later.
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index e28f931..0a27243 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -32,7 +32,7 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o
perf_event_p4.o
-obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_lbr.o
perf_event_intel_ds.o perf_event_intel.o
+obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_lbr.o
perf_event_intel_ds.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_rapl.o
perf_event_intel_cqm.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_pt.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_cstate.o
[tip:x86/asm] x86/msr: Document msr-index.h rule for addition
Commit-ID: 053080a9d1c8cf1950115ad92ce94242ebc5f25c Gitweb: http://git.kernel.org/tip/053080a9d1c8cf1950115ad92ce94242ebc5f25c Author: Borislav Petkov AuthorDate: Tue, 16 Feb 2016 09:43:22 +0100 Committer: Ingo Molnar CommitDate: Wed, 17 Feb 2016 08:47:55 +0100 x86/msr: Document msr-index.h rule for addition In order to keep this file's size sensible and not cause too much unnecessary churn, make the rule explicit - similar to pci_ids.h - that only MSRs which are used in multiple compilation units, should get added to it. Signed-off-by: Borislav Petkov Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Brian Gerst Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Linus Torvalds Cc: Paolo Bonzini Cc: Peter Zijlstra Cc: Suravee Suthikulpanit Cc: Thomas Gleixner Cc: alex.william...@redhat.com Cc: g...@kernel.org Cc: j...@8bytes.org Cc: k...@vger.kernel.org Cc: sherry.hurw...@amd.com Cc: w...@redhat.com Link: http://lkml.kernel.org/r/1455612202-14414-5-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/include/asm/msr-index.h | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index b05402e..984ab75 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1,7 +1,12 @@ #ifndef _ASM_X86_MSR_INDEX_H #define _ASM_X86_MSR_INDEX_H -/* CPU model specific register (MSR) numbers */ +/* + * CPU model specific register (MSR) numbers. + * + * Do not add new entries to this file unless the definitions are shared + * between multiple compilation units. + */ /* x86-64 specific MSRs */ #define MSR_EFER 0xc080 /* extended feature register */
[tip:x86/asm] x86/ftrace, x86/asm: Kill ftrace_caller_end label
Commit-ID: f1b92bb6b5a4e17b508f128b084fa00e0eda590c
Gitweb: http://git.kernel.org/tip/f1b92bb6b5a4e17b508f128b084fa00e0eda590c
Author: Borislav Petkov
AuthorDate: Tue, 16 Feb 2016 09:43:21 +0100
Committer: Ingo Molnar
CommitDate: Wed, 17 Feb 2016 08:47:22 +0100
x86/ftrace, x86/asm: Kill ftrace_caller_end label
One of ftrace_caller_end and ftrace_return is redundant so unify them.
Rename ftrace_return to ftrace_epilogue to mean that everything after
that label represents, like an afterword, work which happens *after* the
ftrace call, e.g., the function graph tracer for one.
Steve wants this to rather mean "[a]n event which reflects meaningfully
on a recently ended conflict or struggle." I can imagine that ftrace can
be a struggle sometimes.
Anyway, beef up the comment about the code contents and layout before
ftrace_epilogue label.
Signed-off-by: Borislav Petkov
Reviewed-by: Steven Rostedt
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1455612202-14414-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/ftrace.c| 11 +--
arch/x86/kernel/mcount_64.S | 14 --
2 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c
index 29408d6..04f9641e 100644
--- a/arch/x86/kernel/ftrace.c
+++ b/arch/x86/kernel/ftrace.c
@@ -697,9 +697,8 @@ static inline void tramp_free(void *tramp) { }
#endif
/* Defined as markers to the end of the ftrace default trampolines */
-extern void ftrace_caller_end(void);
extern void ftrace_regs_caller_end(void);
-extern void ftrace_return(void);
+extern void ftrace_epilogue(void);
extern void ftrace_caller_op_ptr(void);
extern void ftrace_regs_caller_op_ptr(void);
@@ -746,7 +745,7 @@ create_trampoline(struct ftrace_ops *ops, unsigned int
*tramp_size)
op_offset = (unsigned long)ftrace_regs_caller_op_ptr;
} else {
start_offset = (unsigned long)ftrace_caller;
- end_offset = (unsigned long)ftrace_caller_end;
+ end_offset = (unsigned long)ftrace_epilogue;
op_offset = (unsigned long)ftrace_caller_op_ptr;
}
@@ -754,7 +753,7 @@ create_trampoline(struct ftrace_ops *ops, unsigned int
*tramp_size)
/*
* Allocate enough size to store the ftrace_caller code,
-* the jmp to ftrace_return, as well as the address of
+* the jmp to ftrace_epilogue, as well as the address of
* the ftrace_ops this trampoline is used for.
*/
trampoline = alloc_tramp(size + MCOUNT_INSN_SIZE + sizeof(void *));
@@ -772,8 +771,8 @@ create_trampoline(struct ftrace_ops *ops, unsigned int
*tramp_size)
ip = (unsigned long)trampoline + size;
- /* The trampoline ends with a jmp to ftrace_return */
- jmp = ftrace_jmp_replace(ip, (unsigned long)ftrace_return);
+ /* The trampoline ends with a jmp to ftrace_epilogue */
+ jmp = ftrace_jmp_replace(ip, (unsigned long)ftrace_epilogue);
memcpy(trampoline + size, jmp, MCOUNT_INSN_SIZE);
/*
diff --git a/arch/x86/kernel/mcount_64.S b/arch/x86/kernel/mcount_64.S
index 87e1762..ed48a9f 100644
--- a/arch/x86/kernel/mcount_64.S
+++ b/arch/x86/kernel/mcount_64.S
@@ -168,12 +168,14 @@ GLOBAL(ftrace_call)
restore_mcount_regs
/*
-* The copied trampoline must call ftrace_return as it
+* The copied trampoline must call ftrace_epilogue as it
* still may need to call the function graph tracer.
+*
+* The code up to this label is copied into trampolines so
+* think twice before adding any new code or changing the
+* layout here.
*/
-GLOBAL(ftrace_caller_end)
-
-GLOBAL(ftrace_return)
+GLOBAL(ftrace_epilogue)
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
GLOBAL(ftrace_graph_call)
@@ -244,14 +246,14 @@ GLOBAL(ftrace_regs_call)
popfq
/*
-* As this jmp to ftrace_return can be a short jump
+* As this jmp to ftrace_epilogue can be a short jump
* it must not be copied into the trampoline.
* The trampoline will add the code to jump
* to the return.
*/
GLOBAL(ftrace_regs_caller_end)
- jmp ftrace_return
+ jmp ftrace_epilogue
END(ftrace_regs_caller)
[tip:x86/asm] x86/cpufeature: Speed up cpu_feature_enabled()
Commit-ID: f2cc8e0791c70833758101d9756609a08dd601ec Gitweb: http://git.kernel.org/tip/f2cc8e0791c70833758101d9756609a08dd601ec Author: Borislav Petkov AuthorDate: Tue, 16 Feb 2016 00:19:18 +0100 Committer: Ingo Molnar CommitDate: Tue, 16 Feb 2016 08:45:15 +0100 x86/cpufeature: Speed up cpu_feature_enabled() When GCC cannot do constant folding for this macro, it falls back to cpu_has(). But static_cpu_has() is optimal and it works at all times now. So use it and speedup the fallback case. Before we had this: mov0x99d674(%rip),%rdx# 81b0d9f4 shr$0x2e,%rdx and$0x1,%edx jne811704e9 After alternatives patching, it turns into: jmp0x81170390 nopl (%rax) ... callq 81056e00 81170390: mov0x170(%r12),%rdi Signed-off-by: Borislav Petkov Cc: Joerg Roedel Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1455578358-28347-1-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/include/asm/cpufeature.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index 9fba7a5..68e4e82 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -88,8 +88,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; * is not relevant. */ #define cpu_feature_enabled(bit) \ - (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : \ -cpu_has(&boot_cpu_data, bit)) + (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit)) #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
[tip:x86/microcode] x86/microcode: Document builtin microcode loading method
Commit-ID: b584303261b7041f209afde4bf7ddb7a21598a1f Gitweb: http://git.kernel.org/tip/b584303261b7041f209afde4bf7ddb7a21598a1f Author: Borislav Petkov AuthorDate: Wed, 3 Feb 2016 12:33:45 +0100 Committer: Ingo Molnar CommitDate: Tue, 9 Feb 2016 11:41:19 +0100 x86/microcode: Document builtin microcode loading method Add some text and an example to Documentation/x86/early-microcode.txt explaining how to build in microcode. Tested-by: Thomas Voegtle Signed-off-by: Borislav Petkov Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1454499225-21544-18-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- Documentation/x86/early-microcode.txt | 25 + 1 file changed, 25 insertions(+) diff --git a/Documentation/x86/early-microcode.txt b/Documentation/x86/early-microcode.txt index d62bea6..c956d99 100644 --- a/Documentation/x86/early-microcode.txt +++ b/Documentation/x86/early-microcode.txt @@ -40,3 +40,28 @@ cp ../microcode.bin kernel/x86/microcode/GenuineIntel.bin (or AuthenticAMD.bin) find . | cpio -o -H newc >../ucode.cpio cd .. cat ucode.cpio /boot/initrd-3.5.0.img >/boot/initrd-3.5.0.ucode.img + +Builtin microcode += + +We can also load builtin microcode supplied through the regular firmware +builtin method CONFIG_FIRMWARE_IN_KERNEL. Here's an example: + +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="intel-ucode/06-3a-09 amd-ucode/microcode_amd_fam15h.bin" +CONFIG_EXTRA_FIRMWARE_DIR="/lib/firmware" + +This basically means, you have the following tree structure locally: + +/lib/firmware/ +|-- amd-ucode +... +| |-- microcode_amd_fam15h.bin +... +|-- intel-ucode +... +| |-- 06-3a-09 +... + +so that the build system can find those files and integrate them into +the final kernel image. The early loader finds them and applies them.
[tip:x86/microcode] x86/microcode/intel: Cleanup get_matching_model_microcode()
Commit-ID: f96fde531946524b26d25d4eed9625695837f524
Gitweb: http://git.kernel.org/tip/f96fde531946524b26d25d4eed9625695837f524
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:43 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:18 +0100
x86/microcode/intel: Cleanup get_matching_model_microcode()
Reflow arguments, sort local variables in reverse christmas tree, kill
"out" label.
No functionality change.
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-16-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/intel.c | 25 +++--
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c
b/arch/x86/kernel/cpu/microcode/intel.c
index 0c67fd0..cb397947 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -287,19 +287,17 @@ static unsigned int _save_mc(struct microcode_intel
**mc_saved,
* BSP can stay in the platform.
*/
static enum ucode_state __init
-get_matching_model_microcode(unsigned long start,
-void *data, size_t size,
-struct mc_saved_data *mcs,
-unsigned long *mc_ptrs,
+get_matching_model_microcode(unsigned long start, void *data, size_t size,
+struct mc_saved_data *mcs, unsigned long *mc_ptrs,
struct ucode_cpu_info *uci)
{
- u8 *ucode_ptr = data;
- unsigned int leftover = size;
- enum ucode_state state = UCODE_OK;
- unsigned int mc_size;
- struct microcode_header_intel *mc_header;
struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
+ struct microcode_header_intel *mc_header;
unsigned int num_saved = mcs->num_saved;
+ enum ucode_state state = UCODE_OK;
+ unsigned int leftover = size;
+ u8 *ucode_ptr = data;
+ unsigned int mc_size;
int i;
while (leftover && num_saved < ARRAY_SIZE(mc_saved_tmp)) {
@@ -321,8 +319,7 @@ get_matching_model_microcode(unsigned long start,
* the platform, we need to find and save microcode patches
* with the same family and model as the BSP.
*/
- if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
-UCODE_OK) {
+ if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
UCODE_OK) {
ucode_ptr += mc_size;
continue;
}
@@ -334,19 +331,19 @@ get_matching_model_microcode(unsigned long start,
if (leftover) {
state = UCODE_ERROR;
- goto out;
+ return state;
}
if (!num_saved) {
state = UCODE_NFOUND;
- goto out;
+ return state;
}
for (i = 0; i < num_saved; i++)
mc_ptrs[i] = (unsigned long)mc_saved_tmp[i] - start;
mcs->num_saved = num_saved;
-out:
+
return state;
}
[tip:x86/microcode] x86/microcode/AMD: Issue microcode updated message later
Commit-ID: f7eb59dda129e46be5e195a46bfd0dde76db9bbd
Gitweb: http://git.kernel.org/tip/f7eb59dda129e46be5e195a46bfd0dde76db9bbd
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:44 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:18 +0100
x86/microcode/AMD: Issue microcode updated message later
Before this, we issued this message from save_microcode_in_initrd()
which is called from free_initrd_mem(), i.e., only when we have an
initrd enabled. However, we can update from builtin microcode too but
then we don't issue the update message.
Fix it by issuing that message on the generic driver init path.
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-17-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/amd.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/amd.c
b/arch/x86/kernel/cpu/microcode/amd.c
index 9f5ccef..f66cbfe 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -431,10 +431,6 @@ int __init save_microcode_in_initrd_amd(void)
else
container = cont_va;
- if (ucode_new_rev)
- pr_info_once("microcode updated early to new
patch_level=0x%08x\n",
-ucode_new_rev);
-
eax = cpuid_eax(0x0001);
eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
@@ -956,6 +952,10 @@ struct microcode_ops * __init init_amd_microcode(void)
return NULL;
}
+ if (ucode_new_rev)
+ pr_info_once("microcode updated early to new
patch_level=0x%08x\n",
+ucode_new_rev);
+
return µcode_amd_ops;
}
[tip:x86/microcode] x86/microcode/intel: Remove unused arg of get_matching_model_microcode()
Commit-ID: 2f303c524ed021825671cfa9b1934338bc04f8ab Gitweb: http://git.kernel.org/tip/2f303c524ed021825671cfa9b1934338bc04f8ab Author: Borislav Petkov AuthorDate: Wed, 3 Feb 2016 12:33:42 +0100 Committer: Ingo Molnar CommitDate: Tue, 9 Feb 2016 11:41:18 +0100 x86/microcode/intel: Remove unused arg of get_matching_model_microcode() @cpu is unused, kill it. No functionality change. Tested-by: Thomas Voegtle Signed-off-by: Borislav Petkov Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1454499225-21544-15-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/microcode/intel.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 5970758..0c67fd0 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -287,7 +287,7 @@ static unsigned int _save_mc(struct microcode_intel **mc_saved, * BSP can stay in the platform. */ static enum ucode_state __init -get_matching_model_microcode(int cpu, unsigned long start, +get_matching_model_microcode(unsigned long start, void *data, size_t size, struct mc_saved_data *mcs, unsigned long *mc_ptrs, @@ -564,7 +564,7 @@ scan_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs, return UCODE_ERROR; } - return get_matching_model_microcode(0, start, cd.data, cd.size, + return get_matching_model_microcode(start, cd.data, cd.size, mcs, mc_ptrs, uci); }
[tip:x86/microcode] x86/microcode/intel: Rename mc_saved_in_initrd
Commit-ID: f8bb45e2c4acf1395bb6e61a135ce8c9107388cf
Gitweb: http://git.kernel.org/tip/f8bb45e2c4acf1395bb6e61a135ce8c9107388cf
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:41 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:18 +0100
x86/microcode/intel: Rename mc_saved_in_initrd
Rename it to mc_tmp_ptrs to denote better what it is - a temporary array
for saving pointers to microcode blobs. And "initrd" is not accurate
anymore since initrd is not the only source for early microcode.
Therefore, rename copy_initrd_ptrs() to copy_ptrs() simply and
"initrd_start" to "offset".
And then do the following convention: the global variable is called
"mc_tmp_ptrs" and the local function arguments "mc_ptrs" for
differentiation.
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-14-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/intel.c | 52 +++
1 file changed, 28 insertions(+), 24 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c
b/arch/x86/kernel/cpu/microcode/intel.c
index ff0b449..5970758 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -39,7 +39,13 @@
#include
#include
-static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
+/*
+ * Temporary microcode blobs pointers storage. We note here the pointers to
+ * microcode blobs we've got from whatever storage (detached initrd, builtin).
+ * Later on, we put those into final storage mc_saved_data.mc_saved.
+ */
+static unsigned long mc_tmp_ptrs[MAX_UCODE_COUNT];
+
static struct mc_saved_data {
unsigned int num_saved;
struct microcode_intel **mc_saved;
@@ -78,13 +84,13 @@ load_microcode_early(struct microcode_intel **saved,
}
static inline void
-copy_initrd_ptrs(struct microcode_intel **mc_saved, unsigned long *initrd,
- unsigned long off, int num_saved)
+copy_ptrs(struct microcode_intel **mc_saved, unsigned long *mc_ptrs,
+ unsigned long off, int num_saved)
{
int i;
for (i = 0; i < num_saved; i++)
- mc_saved[i] = (struct microcode_intel *)(initrd[i] + off);
+ mc_saved[i] = (struct microcode_intel *)(mc_ptrs[i] + off);
}
#ifdef CONFIG_X86_32
@@ -106,14 +112,14 @@ microcode_phys(struct microcode_intel **mc_saved_tmp,
struct mc_saved_data *mcs)
#endif
static enum ucode_state
-load_microcode(struct mc_saved_data *mcs, unsigned long *initrd,
- unsigned long initrd_start, struct ucode_cpu_info *uci)
+load_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
+ unsigned long offset, struct ucode_cpu_info *uci)
{
struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
unsigned int count = mcs->num_saved;
if (!mcs->mc_saved) {
- copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count);
+ copy_ptrs(mc_saved_tmp, mc_ptrs, offset, count);
return load_microcode_early(mc_saved_tmp, count, uci);
} else {
@@ -284,7 +290,7 @@ static enum ucode_state __init
get_matching_model_microcode(int cpu, unsigned long start,
void *data, size_t size,
struct mc_saved_data *mcs,
-unsigned long *mc_saved_in_initrd,
+unsigned long *mc_ptrs,
struct ucode_cpu_info *uci)
{
u8 *ucode_ptr = data;
@@ -337,7 +343,7 @@ get_matching_model_microcode(int cpu, unsigned long start,
}
for (i = 0; i < num_saved; i++)
- mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
+ mc_ptrs[i] = (unsigned long)mc_saved_tmp[i] - start;
mcs->num_saved = num_saved;
out:
@@ -533,7 +539,7 @@ static bool __init load_builtin_intel_microcode(struct
cpio_data *cp)
static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
static __init enum ucode_state
-scan_microcode(struct mc_saved_data *mcs, unsigned long *initrd,
+scan_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
unsigned long start, unsigned long size,
struct ucode_cpu_info *uci)
{
@@ -559,7 +565,7 @@ scan_microcode(struct mc_saved_data *mcs, unsigned long
*initrd,
}
return get_matching_model_microcode(0, start, cd.data, cd.size,
- mcs, initrd, uci);
+ mcs, mc_ptrs, uci);
}
/*
@@ -675,7 +681,7 @@ static int apply_microcode_early(struct ucode_cpu_info
*uci, bool early)
/*
* This function converts microcode patch offsets previously stored in
- * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data.
+ * mc_tmp_ptrs to pointers and stores the pointers i
[tip:x86/microcode] x86/microcode/intel: Use *wrmsrl variants
Commit-ID: c416e6117575213a5a962149620684a09f9e4ece Gitweb: http://git.kernel.org/tip/c416e6117575213a5a962149620684a09f9e4ece Author: Borislav Petkov AuthorDate: Wed, 3 Feb 2016 12:33:40 +0100 Committer: Ingo Molnar CommitDate: Tue, 9 Feb 2016 11:41:17 +0100 x86/microcode/intel: Use *wrmsrl variants ... and drop the 32-bit casting games which we had to do at the time because wrmsr() was unforgiving then, see c3fd0bd5e19a from the full history tree: commit c3fd0bd5e19aaff9cdd104edff136a2023db657e Author: Linus Torvalds Date: Tue Feb 17 23:23:41 2004 -0800 Fix up the microcode update on regular 32-bit x86. Our wrmsr() is a bit unforgiving and really doesn't like 64-bit values. ... Tested-by: Thomas Voegtle Signed-off-by: Borislav Petkov Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1454499225-21544-13-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/microcode/intel.c | 14 +- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 35186a0..ff0b449 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -370,7 +370,7 @@ static int collect_cpu_info_early(struct ucode_cpu_info *uci) native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); csig.pf = 1 << ((val[1] >> 18) & 7); } - native_wrmsr(MSR_IA32_UCODE_REV, 0, 0); + native_wrmsrl(MSR_IA32_UCODE_REV, 0); /* As documented in the SDM: Do a CPUID 1 here */ sync_core(); @@ -648,10 +648,8 @@ static int apply_microcode_early(struct ucode_cpu_info *uci, bool early) return 0; /* write microcode via MSR 0x79 */ - native_wrmsr(MSR_IA32_UCODE_WRITE, - (unsigned long)mc->bits, - (unsigned long)mc->bits >> 16 >> 16); - native_wrmsr(MSR_IA32_UCODE_REV, 0, 0); + native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); + native_wrmsrl(MSR_IA32_UCODE_REV, 0); /* As documented in the SDM: Do a CPUID 1 here */ sync_core(); @@ -860,10 +858,8 @@ static int apply_microcode_intel(int cpu) return 0; /* write microcode via MSR 0x79 */ - wrmsr(MSR_IA32_UCODE_WRITE, - (unsigned long) mc->bits, - (unsigned long) mc->bits >> 16 >> 16); - wrmsr(MSR_IA32_UCODE_REV, 0, 0); + wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); + wrmsrl(MSR_IA32_UCODE_REV, 0); /* As documented in the SDM: Do a CPUID 1 here */ sync_core();
[tip:x86/microcode] x86/microcode/intel: Move the BUG_ON up and turn it into WARN_ON
Commit-ID: 58b5f2cc4bdbc9b616e68639f5a84886aa5be590 Gitweb: http://git.kernel.org/tip/58b5f2cc4bdbc9b616e68639f5a84886aa5be590 Author: Borislav Petkov AuthorDate: Wed, 3 Feb 2016 12:33:38 +0100 Committer: Ingo Molnar CommitDate: Tue, 9 Feb 2016 11:41:17 +0100 x86/microcode/intel: Move the BUG_ON up and turn it into WARN_ON If we're going to BUG_ON() because we're running on the wrong CPU, we better do it as the first thing we do when entering that function. And also, turn it into a WARN_ON() because it is not worth to panic the system if we apply the microcode on the wrong CPU - we're simply going to exit early. Tested-by: Thomas Voegtle Signed-off-by: Borislav Petkov Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1454499225-21544-11-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/microcode/intel.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index d1b2f58..c029c2b 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -843,12 +843,12 @@ static int apply_microcode_intel(int cpu) int cpu_num = raw_smp_processor_id(); struct cpuinfo_x86 *c = &cpu_data(cpu_num); - uci = ucode_cpu_info + cpu; - mc = uci->mc; - /* We should bind the task to the CPU */ - BUG_ON(cpu_num != cpu); + if (WARN_ON(cpu_num != cpu)) + return -1; + uci = ucode_cpu_info + cpu; + mc = uci->mc; if (!mc) return 0;
[tip:x86/microcode] x86/microcode/intel: Cleanup apply_microcode_intel()
Commit-ID: 26cbaa4dc676a444aa626cbc642c4c8181ef1378
Gitweb: http://git.kernel.org/tip/26cbaa4dc676a444aa626cbc642c4c8181ef1378
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:39 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:17 +0100
x86/microcode/intel: Cleanup apply_microcode_intel()
Get rid of local variable cpu_num as it is equal to @cpu now. Deref
cpu_data() only when it is really needed at the end.
No functionality change.
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-12-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/intel.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c
b/arch/x86/kernel/cpu/microcode/intel.c
index c029c2b..35186a0 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -839,12 +839,11 @@ static int apply_microcode_intel(int cpu)
{
struct microcode_intel *mc;
struct ucode_cpu_info *uci;
+ struct cpuinfo_x86 *c;
unsigned int val[2];
- int cpu_num = raw_smp_processor_id();
- struct cpuinfo_x86 *c = &cpu_data(cpu_num);
/* We should bind the task to the CPU */
- if (WARN_ON(cpu_num != cpu))
+ if (WARN_ON(raw_smp_processor_id() != cpu))
return -1;
uci = ucode_cpu_info + cpu;
@@ -874,15 +873,18 @@ static int apply_microcode_intel(int cpu)
if (val[1] != mc->hdr.rev) {
pr_err("CPU%d update to revision 0x%x failed\n",
- cpu_num, mc->hdr.rev);
+ cpu, mc->hdr.rev);
return -1;
}
+
pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
- cpu_num, val[1],
+ cpu, val[1],
mc->hdr.date & 0x,
mc->hdr.date >> 24,
(mc->hdr.date >> 16) & 0xff);
+ c = &cpu_data(cpu);
+
uci->cpu_sig.rev = val[1];
c->microcode = val[1];
[tip:x86/microcode] x86/microcode/intel: Rename mc_saved_count to num_saved
Commit-ID: 4fe9349fc3b042b481692b577bda97cde4d6f517
Gitweb: http://git.kernel.org/tip/4fe9349fc3b042b481692b577bda97cde4d6f517
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:36 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:17 +0100
x86/microcode/intel: Rename mc_saved_count to num_saved
It is shorter and easier on the eyes. Change the "== 0" tests to "!..."
while at it.
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-9-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/intel.c | 61 ++-
1 file changed, 31 insertions(+), 30 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c
b/arch/x86/kernel/cpu/microcode/intel.c
index 4af30bee..9f5fe72 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -41,7 +41,7 @@
static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
static struct mc_saved_data {
- unsigned int mc_saved_count;
+ unsigned int num_saved;
struct microcode_intel **mc_saved;
} mc_saved_data;
@@ -96,7 +96,7 @@ microcode_phys(struct microcode_intel **mc_saved_tmp, struct
mc_saved_data *mcs)
mc_saved = (struct microcode_intel ***)__pa_nodebug(&mcs->mc_saved);
- for (i = 0; i < mcs->mc_saved_count; i++) {
+ for (i = 0; i < mcs->num_saved; i++) {
struct microcode_intel *p;
p = *(struct microcode_intel **)__pa_nodebug(mcs->mc_saved + i);
@@ -110,7 +110,7 @@ load_microcode(struct mc_saved_data *mcs, unsigned long
*initrd,
unsigned long initrd_start, struct ucode_cpu_info *uci)
{
struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
- unsigned int count = mcs->mc_saved_count;
+ unsigned int count = mcs->num_saved;
if (!mcs->mc_saved) {
copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count);
@@ -174,23 +174,23 @@ matching_model_microcode(struct microcode_header_intel
*mc_header,
static int
save_microcode(struct mc_saved_data *mcs,
struct microcode_intel **mc_saved_src,
- unsigned int mc_saved_count)
+ unsigned int num_saved)
{
int i, j;
struct microcode_intel **saved_ptr;
int ret;
- if (!mc_saved_count)
+ if (!num_saved)
return -EINVAL;
/*
* Copy new microcode data.
*/
- saved_ptr = kcalloc(mc_saved_count, sizeof(struct microcode_intel *),
GFP_KERNEL);
+ saved_ptr = kcalloc(num_saved, sizeof(struct microcode_intel *),
GFP_KERNEL);
if (!saved_ptr)
return -ENOMEM;
- for (i = 0; i < mc_saved_count; i++) {
+ for (i = 0; i < num_saved; i++) {
struct microcode_header_intel *mc_hdr;
struct microcode_intel *mc;
unsigned long size;
@@ -216,8 +216,8 @@ save_microcode(struct mc_saved_data *mcs,
/*
* Point to newly saved microcode.
*/
- mcs->mc_saved = saved_ptr;
- mcs->mc_saved_count = mc_saved_count;
+ mcs->mc_saved = saved_ptr;
+ mcs->num_saved = num_saved;
return 0;
@@ -293,10 +293,10 @@ get_matching_model_microcode(int cpu, unsigned long start,
unsigned int mc_size;
struct microcode_header_intel *mc_header;
struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
- unsigned int mc_saved_count = mcs->mc_saved_count;
+ unsigned int num_saved = mcs->num_saved;
int i;
- while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) {
+ while (leftover && num_saved < ARRAY_SIZE(mc_saved_tmp)) {
if (leftover < sizeof(mc_header))
break;
@@ -321,7 +321,7 @@ get_matching_model_microcode(int cpu, unsigned long start,
continue;
}
- mc_saved_count = _save_mc(mc_saved_tmp, ucode_ptr,
mc_saved_count);
+ num_saved = _save_mc(mc_saved_tmp, ucode_ptr, num_saved);
ucode_ptr += mc_size;
}
@@ -331,15 +331,15 @@ get_matching_model_microcode(int cpu, unsigned long start,
goto out;
}
- if (mc_saved_count == 0) {
+ if (!num_saved) {
state = UCODE_NFOUND;
goto out;
}
- for (i = 0; i < mc_saved_count; i++)
+ for (i = 0; i < num_saved; i++)
mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
- mcs->mc_saved_count = mc_saved_count;
+ mcs->num_saved = num_saved;
out:
return state;
}
@@ -393,11 +393,11 @@ static void show_saved_mc(void)
unsigned int sig, pf, rev, total_size, data_size, date;
struct ucode_cpu_info uci;
- if (mc_saved_data.mc_saved_count == 0) {
[tip:x86/microcode] x86/microcode/intel: Rename mc_intel variable to mc
Commit-ID: de778275c295825e6638f3f74103f40642d45caa
Gitweb: http://git.kernel.org/tip/de778275c295825e6638f3f74103f40642d45caa
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:37 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:17 +0100
x86/microcode/intel: Rename mc_intel variable to mc
Well, it is apparent what it points to - microcode. And since it is the
intel loader, no need for the "_intel" suffix. Use "!" for the 0/NULL
checks, while at it.
No functionality change.
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-10-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/intel.c | 58 +--
1 file changed, 29 insertions(+), 29 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c
b/arch/x86/kernel/cpu/microcode/intel.c
index 9f5fe72..d1b2f58 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -601,19 +601,19 @@ void show_ucode_info_early(void)
*/
static void print_ucode(struct ucode_cpu_info *uci)
{
- struct microcode_intel *mc_intel;
+ struct microcode_intel *mc;
int *delay_ucode_info_p;
int *current_mc_date_p;
- mc_intel = uci->mc;
- if (mc_intel == NULL)
+ mc = uci->mc;
+ if (!mc)
return;
delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date);
*delay_ucode_info_p = 1;
- *current_mc_date_p = mc_intel->hdr.date;
+ *current_mc_date_p = mc->hdr.date;
}
#else
@@ -628,29 +628,29 @@ static inline void flush_tlb_early(void)
static inline void print_ucode(struct ucode_cpu_info *uci)
{
- struct microcode_intel *mc_intel;
+ struct microcode_intel *mc;
- mc_intel = uci->mc;
- if (mc_intel == NULL)
+ mc = uci->mc;
+ if (!mc)
return;
- print_ucode_info(uci, mc_intel->hdr.date);
+ print_ucode_info(uci, mc->hdr.date);
}
#endif
static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
{
- struct microcode_intel *mc_intel;
+ struct microcode_intel *mc;
unsigned int val[2];
- mc_intel = uci->mc;
- if (mc_intel == NULL)
+ mc = uci->mc;
+ if (!mc)
return 0;
/* write microcode via MSR 0x79 */
native_wrmsr(MSR_IA32_UCODE_WRITE,
- (unsigned long) mc_intel->bits,
- (unsigned long) mc_intel->bits >> 16 >> 16);
+ (unsigned long)mc->bits,
+ (unsigned long)mc->bits >> 16 >> 16);
native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
/* As documented in the SDM: Do a CPUID 1 here */
@@ -658,7 +658,7 @@ static int apply_microcode_early(struct ucode_cpu_info
*uci, bool early)
/* get the current revision from MSR 0x8B */
native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
- if (val[1] != mc_intel->hdr.rev)
+ if (val[1] != mc->hdr.rev)
return -1;
#ifdef CONFIG_X86_64
@@ -670,7 +670,7 @@ static int apply_microcode_early(struct ucode_cpu_info
*uci, bool early)
if (early)
print_ucode(uci);
else
- print_ucode_info(uci, mc_intel->hdr.date);
+ print_ucode_info(uci, mc->hdr.date);
return 0;
}
@@ -821,7 +821,7 @@ static int collect_cpu_info(int cpu_num, struct
cpu_signature *csig)
* return 0 - no update found
* return 1 - found update
*/
-static int get_matching_mc(struct microcode_intel *mc_intel, int cpu)
+static int get_matching_mc(struct microcode_intel *mc, int cpu)
{
struct cpu_signature cpu_sig;
unsigned int csig, cpf, crev;
@@ -832,38 +832,38 @@ static int get_matching_mc(struct microcode_intel
*mc_intel, int cpu)
cpf = cpu_sig.pf;
crev = cpu_sig.rev;
- return has_newer_microcode(mc_intel, csig, cpf, crev);
+ return has_newer_microcode(mc, csig, cpf, crev);
}
static int apply_microcode_intel(int cpu)
{
- struct microcode_intel *mc_intel;
+ struct microcode_intel *mc;
struct ucode_cpu_info *uci;
unsigned int val[2];
int cpu_num = raw_smp_processor_id();
struct cpuinfo_x86 *c = &cpu_data(cpu_num);
uci = ucode_cpu_info + cpu;
- mc_intel = uci->mc;
+ mc = uci->mc;
/* We should bind the task to the CPU */
BUG_ON(cpu_num != cpu);
- if (mc_intel == NULL)
+ if (!mc)
return 0;
/*
* Microcode on this CPU could be updated earlier. Only apply the
-* microcode patch in mc_intel when it is newer than the one on this
+* microcode patch in mc when it is newer than the one on this
* CPU.
*/
- if (get_matching_mc(mc_intel, cpu) == 0)
[tip:x86/microcode] x86/microcode/AMD: Drop redundant printk prefix
Commit-ID: a58017c62b5fa23e532b731e70a63ded54cc2c02
Gitweb: http://git.kernel.org/tip/a58017c62b5fa23e532b731e70a63ded54cc2c02
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:34 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:16 +0100
x86/microcode/AMD: Drop redundant printk prefix
It is supplied by pr_fmt already.
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/amd.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/amd.c
b/arch/x86/kernel/cpu/microcode/amd.c
index 5b63e2f..9f5ccef 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -469,8 +469,7 @@ void reload_ucode_amd(void)
if (mc && rev < mc->hdr.patch_id) {
if (!__apply_microcode_amd(mc)) {
ucode_new_rev = mc->hdr.patch_id;
- pr_info("microcode: reload patch_level=0x%08x\n",
- ucode_new_rev);
+ pr_info("reload patch_level=0x%08x\n", ucode_new_rev);
}
}
}
[tip:x86/microcode] x86/microcode/intel: Rename local variables of type struct mc_saved_data
Commit-ID: bd6fe58d8e60d45c80ed664a55ef0df5fa076014
Gitweb: http://git.kernel.org/tip/bd6fe58d8e60d45c80ed664a55ef0df5fa076014
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:35 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:16 +0100
x86/microcode/intel: Rename local variables of type struct mc_saved_data
So it is always a head-twister when trying to stare at code which has a
bunch of
struct mc_saved_data *mc_saved_data;
local function variables *and* a global mc_saved_data of the same name.
Rename all locals to "mcs" to differentiate from the global one.
No functionality change.
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-8-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/intel.c | 58 ---
1 file changed, 27 insertions(+), 31 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c
b/arch/x86/kernel/cpu/microcode/intel.c
index f4bc5fe..4af30bee 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -89,42 +89,39 @@ copy_initrd_ptrs(struct microcode_intel **mc_saved,
unsigned long *initrd,
#ifdef CONFIG_X86_32
static void
-microcode_phys(struct microcode_intel **mc_saved_tmp,
- struct mc_saved_data *mc_saved_data)
+microcode_phys(struct microcode_intel **mc_saved_tmp, struct mc_saved_data
*mcs)
{
int i;
struct microcode_intel ***mc_saved;
- mc_saved = (struct microcode_intel ***)
- __pa_nodebug(&mc_saved_data->mc_saved);
- for (i = 0; i < mc_saved_data->mc_saved_count; i++) {
+ mc_saved = (struct microcode_intel ***)__pa_nodebug(&mcs->mc_saved);
+
+ for (i = 0; i < mcs->mc_saved_count; i++) {
struct microcode_intel *p;
- p = *(struct microcode_intel **)
- __pa_nodebug(mc_saved_data->mc_saved + i);
+ p = *(struct microcode_intel **)__pa_nodebug(mcs->mc_saved + i);
mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
}
}
#endif
static enum ucode_state
-load_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
+load_microcode(struct mc_saved_data *mcs, unsigned long *initrd,
unsigned long initrd_start, struct ucode_cpu_info *uci)
{
struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
- unsigned int count = mc_saved_data->mc_saved_count;
+ unsigned int count = mcs->mc_saved_count;
- if (!mc_saved_data->mc_saved) {
+ if (!mcs->mc_saved) {
copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count);
return load_microcode_early(mc_saved_tmp, count, uci);
} else {
#ifdef CONFIG_X86_32
- microcode_phys(mc_saved_tmp, mc_saved_data);
+ microcode_phys(mc_saved_tmp, mcs);
return load_microcode_early(mc_saved_tmp, count, uci);
#else
- return load_microcode_early(mc_saved_data->mc_saved,
- count, uci);
+ return load_microcode_early(mcs->mc_saved, count, uci);
#endif
}
}
@@ -175,7 +172,7 @@ matching_model_microcode(struct microcode_header_intel
*mc_header,
}
static int
-save_microcode(struct mc_saved_data *mc_saved_data,
+save_microcode(struct mc_saved_data *mcs,
struct microcode_intel **mc_saved_src,
unsigned int mc_saved_count)
{
@@ -219,8 +216,8 @@ save_microcode(struct mc_saved_data *mc_saved_data,
/*
* Point to newly saved microcode.
*/
- mc_saved_data->mc_saved = saved_ptr;
- mc_saved_data->mc_saved_count = mc_saved_count;
+ mcs->mc_saved = saved_ptr;
+ mcs->mc_saved_count = mc_saved_count;
return 0;
@@ -286,7 +283,7 @@ static unsigned int _save_mc(struct microcode_intel
**mc_saved,
static enum ucode_state __init
get_matching_model_microcode(int cpu, unsigned long start,
void *data, size_t size,
-struct mc_saved_data *mc_saved_data,
+struct mc_saved_data *mcs,
unsigned long *mc_saved_in_initrd,
struct ucode_cpu_info *uci)
{
@@ -296,7 +293,7 @@ get_matching_model_microcode(int cpu, unsigned long start,
unsigned int mc_size;
struct microcode_header_intel *mc_header;
struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
- unsigned int mc_saved_count = mc_saved_data->mc_saved_count;
+ unsigned int mc_saved_count = mcs->mc_saved_count;
int i;
while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) {
@@ -342,7 +339,7 @@ get_matching_model_microcode(int cpu, unsigned long start,
for (i = 0; i < mc
[tip:x86/microcode] x86/microcode: Issue update message only once
Commit-ID: b7f500aedd4551a9bf29c617804c13f0ff18c879
Gitweb: http://git.kernel.org/tip/b7f500aedd4551a9bf29c617804c13f0ff18c879
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:33 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:16 +0100
x86/microcode: Issue update message only once
This is especially annoying on large boxes:
x86: Booting SMP configuration:
node #0, CPUs: #1
microcode: CPU1 microcode updated early to revision 0x428, date = 2014-05-29
#2
microcode: CPU2 microcode updated early to revision 0x428, date = 2014-05-29
#3
...
so issue the update message only once.
$ grep microcode /proc/cpuinfo
shows whether every core got updated properly.
Reported-by: Ingo Molnar
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/amd.c | 4 ++--
arch/x86/kernel/cpu/microcode/intel.c | 13 +
2 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/amd.c
b/arch/x86/kernel/cpu/microcode/amd.c
index 2233f8a..5b63e2f 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -432,8 +432,8 @@ int __init save_microcode_in_initrd_amd(void)
container = cont_va;
if (ucode_new_rev)
- pr_info("microcode: updated early to new patch_level=0x%08x\n",
- ucode_new_rev);
+ pr_info_once("microcode updated early to new
patch_level=0x%08x\n",
+ucode_new_rev);
eax = cpuid_eax(0x0001);
eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
diff --git a/arch/x86/kernel/cpu/microcode/intel.c
b/arch/x86/kernel/cpu/microcode/intel.c
index 4f4735b..f4bc5fe 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -571,14 +571,11 @@ scan_microcode(struct mc_saved_data *mc_saved_data,
unsigned long *initrd,
static void
print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
{
- int cpu = smp_processor_id();
-
- pr_info("CPU%d microcode updated early to revision 0x%x, date =
%04x-%02x-%02x\n",
- cpu,
- uci->cpu_sig.rev,
- date & 0x,
- date >> 24,
- (date >> 16) & 0xff);
+ pr_info_once("microcode updated early to revision 0x%x, date =
%04x-%02x-%02x\n",
+uci->cpu_sig.rev,
+date & 0x,
+date >> 24,
+(date >> 16) & 0xff);
}
#ifdef CONFIG_X86_32
[tip:x86/microcode] x86/microcode: Remove redundant __setup() param parsing
Commit-ID: e8c8165ecfb1cfd6650777c193361d33b0f7f59e
Gitweb: http://git.kernel.org/tip/e8c8165ecfb1cfd6650777c193361d33b0f7f59e
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:31 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:15 +0100
x86/microcode: Remove redundant __setup() param parsing
We do parse for the disable microcode loader chicken bit very early.
After the driver merge, the __setup() param parsing method is not needed
anymore so get rid of it.
In addition, fix a compiler warning from an old SLES11 gcc (4.3.4)
reported by Jan Beulich :
arch/x86/kernel/cpu/microcode/core.c: In function ‘load_ucode_bsp’:
arch/x86/kernel/cpu/microcode/core.c:96: warning: array subscript is above
array bounds
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/core.c | 15 ---
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/core.c
b/arch/x86/kernel/cpu/microcode/core.c
index faec712..bca4e48 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -43,16 +43,8 @@
#define MICROCODE_VERSION "2.01"
static struct microcode_ops*microcode_ops;
-
static bool dis_ucode_ldr;
-static int __init disable_loader(char *str)
-{
- dis_ucode_ldr = true;
- return 1;
-}
-__setup("dis_ucode_ldr", disable_loader);
-
/*
* Synchronization.
*
@@ -81,15 +73,16 @@ struct cpu_info_ctx {
static bool __init check_loader_disabled_bsp(void)
{
+ static const char *__dis_opt_str = "dis_ucode_ldr";
+
#ifdef CONFIG_X86_32
const char *cmdline = (const char *)__pa_nodebug(boot_command_line);
- const char *opt = "dis_ucode_ldr";
- const char *option = (const char *)__pa_nodebug(opt);
+ const char *option = (const char *)__pa_nodebug(__dis_opt_str);
bool *res = (bool *)__pa_nodebug(&dis_ucode_ldr);
#else /* CONFIG_X86_64 */
const char *cmdline = boot_command_line;
- const char *option = "dis_ucode_ldr";
+ const char *option = __dis_opt_str;
bool *res = &dis_ucode_ldr;
#endif
[tip:x86/microcode] x86/microcode/intel: Make early loader look for builtin microcode too
Commit-ID: 264285ac01673e70557c43ecee338ce97c4c0672
Gitweb: http://git.kernel.org/tip/264285ac01673e70557c43ecee338ce97c4c0672
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:30 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:15 +0100
x86/microcode/intel: Make early loader look for builtin microcode too
Set the initrd @start depending on the presence of an initrd. Otherwise,
builtin microcode loading doesn't work as the start is wrong and we're
using it to compute offset to the microcode blobs.
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: # 4.4
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/intel.c | 24
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c
b/arch/x86/kernel/cpu/microcode/intel.c
index 044c..4f4735b 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -551,10 +551,14 @@ scan_microcode(struct mc_saved_data *mc_saved_data,
unsigned long *initrd,
cd.data = NULL;
cd.size = 0;
- cd = find_cpio_data(p, (void *)start, size, &offset);
- if (!cd.data) {
+ /* try built-in microcode if no initrd */
+ if (!size) {
if (!load_builtin_intel_microcode(&cd))
return UCODE_ERROR;
+ } else {
+ cd = find_cpio_data(p, (void *)start, size, &offset);
+ if (!cd.data)
+ return UCODE_ERROR;
}
return get_matching_model_microcode(0, start, cd.data, cd.size,
@@ -728,16 +732,20 @@ void __init load_ucode_intel_bsp(void)
struct boot_params *p;
p = (struct boot_params *)__pa_nodebug(&boot_params);
- start = p->hdr.ramdisk_image;
size= p->hdr.ramdisk_size;
- _load_ucode_intel_bsp(
- (struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
- (unsigned long *)__pa_nodebug(&mc_saved_in_initrd),
- start, size);
+ /*
+* Set start only if we have an initrd image. We cannot use initrd_start
+* because it is not set that early yet.
+*/
+ start = (size ? p->hdr.ramdisk_image : 0);
+
+ _load_ucode_intel_bsp((struct mc_saved_data
*)__pa_nodebug(&mc_saved_data),
+ (unsigned long
*)__pa_nodebug(&mc_saved_in_initrd),
+ start, size);
#else
- start = boot_params.hdr.ramdisk_image + PAGE_OFFSET;
size= boot_params.hdr.ramdisk_size;
+ start = (size ? boot_params.hdr.ramdisk_image + PAGE_OFFSET : 0);
_load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, start, size);
#endif
[tip:x86/microcode] x86/microcode: Untangle from BLK_DEV_INITRD
Commit-ID: 5f9c01aa7c49a2d74474d6d879a797b8badf29e6
Gitweb: http://git.kernel.org/tip/5f9c01aa7c49a2d74474d6d879a797b8badf29e6
Author: Borislav Petkov
AuthorDate: Wed, 3 Feb 2016 12:33:29 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 11:41:15 +0100
x86/microcode: Untangle from BLK_DEV_INITRD
Thomas Voegtle reported that doing oldconfig with a .config which has
CONFIG_MICROCODE enabled but BLK_DEV_INITRD disabled prevents the
microcode loading mechanism from being built.
So untangle it from the BLK_DEV_INITRD dependency so that oldconfig
doesn't turn it off and add an explanatory text to its Kconfig help what
the supported methods for supplying microcode are.
Reported-by: Thomas Voegtle
Tested-by: Thomas Voegtle
Signed-off-by: Borislav Petkov
Cc: # 4.4
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1454499225-21544-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/Kconfig | 27 ++-
arch/x86/include/asm/microcode.h | 26 ++
arch/x86/kernel/cpu/microcode/intel.c | 14 --
3 files changed, 44 insertions(+), 23 deletions(-)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 9af2e63..405b185 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1159,22 +1159,23 @@ config MICROCODE
bool "CPU microcode loading support"
default y
depends on CPU_SUP_AMD || CPU_SUP_INTEL
- depends on BLK_DEV_INITRD
select FW_LOADER
---help---
-
If you say Y here, you will be able to update the microcode on
- certain Intel and AMD processors. The Intel support is for the
- IA32 family, e.g. Pentium Pro, Pentium II, Pentium III, Pentium 4,
- Xeon etc. The AMD support is for families 0x10 and later. You will
- obviously need the actual microcode binary data itself which is not
- shipped with the Linux kernel.
-
- This option selects the general module only, you need to select
- at least one vendor specific module as well.
-
- To compile this driver as a module, choose M here: the module
- will be called microcode.
+ Intel and AMD processors. The Intel support is for the IA32 family,
+ e.g. Pentium Pro, Pentium II, Pentium III, Pentium 4, Xeon etc. The
+ AMD support is for families 0x10 and later. You will obviously need
+ the actual microcode binary data itself which is not shipped with
+ the Linux kernel.
+
+ The preferred method to load microcode from a detached initrd is
described
+ in Documentation/x86/early-microcode.txt. For that you need to enable
+ CONFIG_BLK_DEV_INITRD in order for the loader to be able to scan the
+ initrd for microcode blobs.
+
+ In addition, you can build-in the microcode into the kernel. For that
you
+ need to enable FIRMWARE_IN_KERNEL and add the vendor-supplied
microcode
+ to the CONFIG_EXTRA_FIRMWARE config option.
config MICROCODE_INTEL
bool "Intel microcode loading support"
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 1e1b07a..9d3a96c 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -3,6 +3,7 @@
#include
#include
+#include
#define native_rdmsr(msr, val1, val2) \
do { \
@@ -143,4 +144,29 @@ static inline void reload_early_microcode(void)
{ }
static inline bool
get_builtin_firmware(struct cpio_data *cd, const char *name) { return false;
}
#endif
+
+static inline unsigned long get_initrd_start(void)
+{
+#ifdef CONFIG_BLK_DEV_INITRD
+ return initrd_start;
+#else
+ return 0;
+#endif
+}
+
+static inline unsigned long get_initrd_start_addr(void)
+{
+#ifdef CONFIG_BLK_DEV_INITRD
+#ifdef CONFIG_X86_32
+ unsigned long *initrd_start_p = (unsigned long
*)__pa_nodebug(&initrd_start);
+
+ return (unsigned long)__pa_nodebug(*initrd_start_p);
+#else
+ return get_initrd_start();
+#endif
+#else /* CONFIG_BLK_DEV_INITRD */
+ return 0;
+#endif
+}
+
#endif /* _ASM_X86_MICROCODE_H */
diff --git a/arch/x86/kernel/cpu/microcode/intel.c
b/arch/x86/kernel/cpu/microcode/intel.c
index ee81c54..044c 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -690,7 +690,7 @@ int __init save_microcode_in_initrd_intel(void)
if (count == 0)
return ret;
- copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, initrd_start, count);
+ copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, get_initrd_start(),
count);
ret = save_microcode(&mc_saved_data, mc_saved, count);
if (ret)
pr_err("Cannot save microcode patches from initrd.\n");
@@ -748,20 +748,14 @@ void load_ucode_intel_ap(void)
struct
[tip:perf/core] perf/x86: Move perf_event_amd_uncore.c .... => x86/events/amd/uncore.c
Commit-ID: d0af1c0525d561fe3ab6d7a767cdd52704da25cd
Gitweb: http://git.kernel.org/tip/d0af1c0525d561fe3ab6d7a767cdd52704da25cd
Author: Borislav Petkov
AuthorDate: Mon, 8 Feb 2016 17:09:08 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 10:23:50 +0100
perf/x86: Move perf_event_amd_uncore.c => x86/events/amd/uncore.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1454947748-28629-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 2 +-
arch/x86/{kernel/cpu/perf_event_amd_uncore.c => events/amd/uncore.c} | 0
arch/x86/kernel/cpu/Makefile | 1 -
3 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index 838195d..7d1ecff 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -1,6 +1,6 @@
obj-y += core.o
-obj-$(CONFIG_CPU_SUP_AMD) += amd/core.o
+obj-$(CONFIG_CPU_SUP_AMD) += amd/core.o amd/uncore.o
obj-$(CONFIG_X86_LOCAL_APIC)+= amd/ibs.o
ifdef CONFIG_AMD_IOMMU
obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
diff --git a/arch/x86/kernel/cpu/perf_event_amd_uncore.c
b/arch/x86/events/amd/uncore.c
similarity index 100%
rename from arch/x86/kernel/cpu/perf_event_amd_uncore.c
rename to arch/x86/events/amd/uncore.c
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 2e15d9d..7edbeb9 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -31,7 +31,6 @@ obj-$(CONFIG_CPU_SUP_TRANSMETA_32)+= transmeta.o
obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
-obj-$(CONFIG_CPU_SUP_AMD) += perf_event_amd_uncore.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o
perf_event_p4.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_lbr.o
perf_event_intel_ds.o perf_event_intel.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_rapl.o
perf_event_intel_cqm.o
[tip:perf/core] perf/x86: Move perf_event_amd_iommu.[ch] .. => x86/events/amd/iommu.[ch]
Commit-ID: 5b26547dd7faa84e1293baa144a0f3e74ed7d4c7
Gitweb: http://git.kernel.org/tip/5b26547dd7faa84e1293baa144a0f3e74ed7d4c7
Author: Borislav Petkov
AuthorDate: Mon, 8 Feb 2016 17:09:07 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 10:23:50 +0100
perf/x86: Move perf_event_amd_iommu.[ch] .. => x86/events/amd/iommu.[ch]
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Joerg Roedel
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1454947748-28629-5-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 3 +++
arch/x86/{kernel/cpu/perf_event_amd_iommu.c => events/amd/iommu.c} | 4 ++--
arch/x86/{kernel/cpu/perf_event_amd_iommu.h => events/amd/iommu.h} | 0
arch/x86/kernel/cpu/Makefile | 3 ---
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index 88f7873..838195d 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -2,3 +2,6 @@ obj-y += core.o
obj-$(CONFIG_CPU_SUP_AMD) += amd/core.o
obj-$(CONFIG_X86_LOCAL_APIC)+= amd/ibs.o
+ifdef CONFIG_AMD_IOMMU
+obj-$(CONFIG_CPU_SUP_AMD) += amd/iommu.o
+endif
diff --git a/arch/x86/kernel/cpu/perf_event_amd_iommu.c
b/arch/x86/events/amd/iommu.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_amd_iommu.c
rename to arch/x86/events/amd/iommu.c
index 97242a9..629bc70 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -16,8 +16,8 @@
#include
#include
-#include "perf_event.h"
-#include "perf_event_amd_iommu.h"
+#include "../../kernel/cpu/perf_event.h"
+#include "iommu.h"
#define COUNTER_SHIFT 16
diff --git a/arch/x86/kernel/cpu/perf_event_amd_iommu.h
b/arch/x86/events/amd/iommu.h
similarity index 100%
rename from arch/x86/kernel/cpu/perf_event_amd_iommu.h
rename to arch/x86/events/amd/iommu.h
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index dddba22..2e15d9d 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -32,9 +32,6 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
obj-$(CONFIG_CPU_SUP_AMD) += perf_event_amd_uncore.o
-ifdef CONFIG_AMD_IOMMU
-obj-$(CONFIG_CPU_SUP_AMD) += perf_event_amd_iommu.o
-endif
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_p6.o perf_event_knc.o
perf_event_p4.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_lbr.o
perf_event_intel_ds.o perf_event_intel.o
obj-$(CONFIG_CPU_SUP_INTEL)+= perf_event_intel_rapl.o
perf_event_intel_cqm.o
[tip:perf/core] perf/x86: Move perf_event_amd_ibs.c ....... => x86/events/amd/ibs.c
Commit-ID: 218cfe4ed8885f988d67ac5f52efeff7233ae1f2
Gitweb: http://git.kernel.org/tip/218cfe4ed8885f988d67ac5f52efeff7233ae1f2
Author: Borislav Petkov
AuthorDate: Mon, 8 Feb 2016 17:09:06 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 10:23:49 +0100
perf/x86: Move perf_event_amd_ibs.c ... => x86/events/amd/ibs.c
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1454947748-28629-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile | 1 +
arch/x86/{kernel/cpu/perf_event_amd_ibs.c => events/amd/ibs.c} | 2 +-
arch/x86/kernel/cpu/Makefile | 2 +-
3 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index e0560b6..88f7873 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -1,3 +1,4 @@
obj-y += core.o
obj-$(CONFIG_CPU_SUP_AMD) += amd/core.o
+obj-$(CONFIG_X86_LOCAL_APIC)+= amd/ibs.o
diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c
b/arch/x86/events/amd/ibs.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_amd_ibs.c
rename to arch/x86/events/amd/ibs.c
index aa12f95..a8abd08 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -14,7 +14,7 @@
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
static u32 ibs_caps;
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index d549b02..dddba22 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -54,7 +54,7 @@ obj-$(CONFIG_X86_MCE) += mcheck/
obj-$(CONFIG_MTRR) += mtrr/
obj-$(CONFIG_MICROCODE)+= microcode/
-obj-$(CONFIG_X86_LOCAL_APIC) += perfctr-watchdog.o
perf_event_amd_ibs.o
+obj-$(CONFIG_X86_LOCAL_APIC) += perfctr-watchdog.o
obj-$(CONFIG_HYPERVISOR_GUEST) += vmware.o hypervisor.o mshyperv.o
[tip:perf/core] perf/x86: Move perf_event_amd.c ........... => x86/events/amd/core.c
Commit-ID: 39b0332a215832ce3a8f8f57344da4a64370e3ca
Gitweb: http://git.kernel.org/tip/39b0332a215832ce3a8f8f57344da4a64370e3ca
Author: Borislav Petkov
AuthorDate: Mon, 8 Feb 2016 17:09:05 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 10:23:49 +0100
perf/x86: Move perf_event_amd.c ... => x86/events/amd/core.c
We distribute those in vendor subdirs, starting with .../events/amd/.
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1454947748-28629-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/events/Makefile| 2 ++
arch/x86/{kernel/cpu/perf_event_amd.c => events/amd/core.c} | 2 +-
arch/x86/kernel/cpu/Makefile| 2 +-
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index 3fad3ce..e0560b6 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -1 +1,3 @@
obj-y += core.o
+
+obj-$(CONFIG_CPU_SUP_AMD) += amd/core.o
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/events/amd/core.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event_amd.c
rename to arch/x86/events/amd/core.c
index 5861053..51b1658 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/events/amd/core.c
@@ -5,7 +5,7 @@
#include
#include
-#include "perf_event.h"
+#include "../../kernel/cpu/perf_event.h"
static __initconst const u64 amd_hw_cache_event_ids
[PERF_COUNT_HW_CACHE_MAX]
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 77000d5..d549b02 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -31,7 +31,7 @@ obj-$(CONFIG_CPU_SUP_TRANSMETA_32)+= transmeta.o
obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS
-obj-$(CONFIG_CPU_SUP_AMD) += perf_event_amd.o
perf_event_amd_uncore.o
+obj-$(CONFIG_CPU_SUP_AMD) += perf_event_amd_uncore.o
ifdef CONFIG_AMD_IOMMU
obj-$(CONFIG_CPU_SUP_AMD) += perf_event_amd_iommu.o
endif
[tip:perf/core] perf/x86: Move perf_event.c ............... => x86/events/core.c
Commit-ID: fa9cbf320e996eaa3d219344b6f7013b096cafd9
Gitweb: http://git.kernel.org/tip/fa9cbf320e996eaa3d219344b6f7013b096cafd9
Author: Borislav Petkov
AuthorDate: Mon, 8 Feb 2016 17:09:04 +0100
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 10:23:49 +0100
perf/x86: Move perf_event.c ... => x86/events/core.c
Also, keep the churn at minimum by adjusting the include "perf_event.h"
when each file gets moved.
Signed-off-by: Borislav Petkov
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Vince Weaver
Link: http://lkml.kernel.org/r/1454947748-28629-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/Kbuild | 3 ++-
arch/x86/events/Makefile| 1 +
arch/x86/{kernel/cpu/perf_event.c => events/core.c} | 2 +-
arch/x86/kernel/cpu/Makefile| 2 --
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/Kbuild b/arch/x86/Kbuild
index 1538562..eb3abf8 100644
--- a/arch/x86/Kbuild
+++ b/arch/x86/Kbuild
@@ -1,6 +1,7 @@
-
obj-y += entry/
+obj-$(CONFIG_PERF_EVENTS) += events/
+
obj-$(CONFIG_KVM) += kvm/
# Xen paravirtualization support
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
new file mode 100644
index 000..3fad3ce
--- /dev/null
+++ b/arch/x86/events/Makefile
@@ -0,0 +1 @@
+obj-y += core.o
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/events/core.c
similarity index 99%
rename from arch/x86/kernel/cpu/perf_event.c
rename to arch/x86/events/core.c
index 7402c818..90ca601 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/events/core.c
@@ -37,7 +37,7 @@
#include
#include
-#include "perf_event.h"
+#include "../kernel/cpu/perf_event.h"
struct x86_pmu x86_pmu __read_mostly;
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 5803130..77000d5 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -30,8 +30,6 @@ obj-$(CONFIG_CPU_SUP_CENTAUR) += centaur.o
obj-$(CONFIG_CPU_SUP_TRANSMETA_32) += transmeta.o
obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
-obj-$(CONFIG_PERF_EVENTS) += perf_event.o
-
ifdef CONFIG_PERF_EVENTS
obj-$(CONFIG_CPU_SUP_AMD) += perf_event_amd.o
perf_event_amd_uncore.o
ifdef CONFIG_AMD_IOMMU
[tip:ras/core] x86/mce/AMD: Carve out threshold block preparation
Commit-ID: 429893b16d35d309ed6b35136aad5f908a08d9b9
Gitweb: http://git.kernel.org/tip/429893b16d35d309ed6b35136aad5f908a08d9b9
Author: Borislav Petkov
AuthorDate: Mon, 25 Jan 2016 20:41:52 +0100
Committer: Ingo Molnar
CommitDate: Mon, 1 Feb 2016 10:53:58 +0100
x86/mce/AMD: Carve out threshold block preparation
mce_amd_feature_init() was getting pretty fat, carve out the
threshold_block setup into a separate function in order to
simplify flow and make it more understandable.
No functionality change.
Signed-off-by: Borislav Petkov
Cc: Aravind Gopalakrishnan
Cc: Borislav Petkov
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: Tony Luck
Link: http://lkml.kernel.org/r/1453750913-4781-8-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/mcheck/mce_amd.c | 87
1 file changed, 49 insertions(+), 38 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c
b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index a77a452..f2860a1 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -267,14 +267,59 @@ static void deferred_error_interrupt_enable(struct
cpuinfo_x86 *c)
wrmsr(MSR_CU_DEF_ERR, low, high);
}
+static int
+prepare_threshold_block(unsigned int bank, unsigned int block, u32 addr,
+ int offset, u32 misc_high)
+{
+ unsigned int cpu = smp_processor_id();
+ struct threshold_block b;
+ int new;
+
+ if (!block)
+ per_cpu(bank_map, cpu) |= (1 << bank);
+
+ memset(&b, 0, sizeof(b));
+ b.cpu = cpu;
+ b.bank = bank;
+ b.block = block;
+ b.address = addr;
+ b.interrupt_capable = lvt_interrupt_supported(bank, misc_high);
+
+ if (!b.interrupt_capable)
+ goto done;
+
+ b.interrupt_enable = 1;
+
+ if (mce_flags.smca) {
+ u32 smca_low, smca_high;
+
+ /* Gather LVT offset for thresholding: */
+ if (rdmsr_safe(MSR_CU_DEF_ERR, &smca_low, &smca_high))
+ goto out;
+
+ new = (smca_low & SMCA_THR_LVT_OFF) >> 12;
+ } else {
+ new = (misc_high & MASK_LVTOFF_HI) >> 20;
+ }
+
+ offset = setup_APIC_mce_threshold(offset, new);
+
+ if ((offset == new) && (mce_threshold_vector !=
amd_threshold_interrupt))
+ mce_threshold_vector = amd_threshold_interrupt;
+
+done:
+ mce_threshold_block_init(&b, offset);
+
+out:
+ return offset;
+}
+
/* cpu init entry point, called from mce.c with preempt off */
void mce_amd_feature_init(struct cpuinfo_x86 *c)
{
- struct threshold_block b;
- unsigned int cpu = smp_processor_id();
u32 low = 0, high = 0, address = 0;
unsigned int bank, block;
- int offset = -1, new;
+ int offset = -1;
for (bank = 0; bank < mca_cfg.banks; ++bank) {
for (block = 0; block < NR_BLOCKS; ++block) {
@@ -299,41 +344,7 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
(high & MASK_LOCKED_HI))
continue;
- if (!block)
- per_cpu(bank_map, cpu) |= (1 << bank);
-
- memset(&b, 0, sizeof(b));
- b.cpu = cpu;
- b.bank = bank;
- b.block = block;
- b.address = address;
- b.interrupt_capable = lvt_interrupt_supported(bank,
high);
-
- if (!b.interrupt_capable)
- goto init;
-
- b.interrupt_enable = 1;
-
- if (mce_flags.smca) {
- u32 smca_low, smca_high;
-
- /* Gather LVT offset for thresholding: */
- if (rdmsr_safe(MSR_CU_DEF_ERR, &smca_low,
&smca_high))
- break;
-
- new = (smca_low & SMCA_THR_LVT_OFF) >> 12;
- } else {
- new = (high & MASK_LVTOFF_HI) >> 20;
- }
-
- offset = setup_APIC_mce_threshold(offset, new);
-
- if ((offset == new) &&
- (mce_threshold_vector != amd_threshold_interrupt))
- mce_threshold_vector = amd_threshold_interrupt;
-
-init:
- mce_threshold_block_init(&b, offset);
+ offset = prepare_threshold_block(bank, block, address,
offset, high);
}
}
[tip:x86/asm] x86/vdso: Use static_cpu_has()
Commit-ID: 8c725306993198f845038dc9e45a1267099867a6 Gitweb: http://git.kernel.org/tip/8c725306993198f845038dc9e45a1267099867a6 Author: Borislav Petkov AuthorDate: Tue, 26 Jan 2016 22:12:09 +0100 Committer: Ingo Molnar CommitDate: Sat, 30 Jan 2016 11:22:23 +0100 x86/vdso: Use static_cpu_has() ... and simplify and speed up a tad. Signed-off-by: Borislav Petkov Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Brian Gerst Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1453842730-28463-10-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/entry/vdso/vma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/entry/vdso/vma.c b/arch/x86/entry/vdso/vma.c index 429d54d..10f7045 100644 --- a/arch/x86/entry/vdso/vma.c +++ b/arch/x86/entry/vdso/vma.c @@ -285,7 +285,7 @@ static void vgetcpu_cpu_init(void *arg) #ifdef CONFIG_NUMA node = cpu_to_node(cpu); #endif - if (cpu_has(&cpu_data(cpu), X86_FEATURE_RDTSCP)) + if (static_cpu_has(X86_FEATURE_RDTSCP)) write_rdtscp_aux((node << 12) | cpu); /*
[tip:x86/asm] x86/alternatives: Add an auxilary section
Commit-ID: 337e4cc84021212a87b04b77b6549304909e
Gitweb: http://git.kernel.org/tip/337e4cc84021212a87b04b77b6549304909e
Author: Borislav Petkov
AuthorDate: Tue, 26 Jan 2016 22:12:07 +0100
Committer: Ingo Molnar
CommitDate: Sat, 30 Jan 2016 11:22:20 +0100
x86/alternatives: Add an auxilary section
Add .altinstr_aux for additional instructions which will be used
before and/or during patching. All stuff which needs more
sophisticated patching should go there. See next patch.
Signed-off-by: Borislav Petkov
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1453842730-28463-8-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/vmlinux.lds.S | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index 74e4bf1..92dc211 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -195,6 +195,17 @@ SECTIONS
:init
#endif
+ /*
+* Section for code used exclusively before alternatives are run. All
+* references to such code must be patched out by alternatives, normally
+* by using X86_FEATURE_ALWAYS CPU feature bit.
+*
+* See static_cpu_has() for an example.
+*/
+ .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
+ *(.altinstr_aux)
+ }
+
INIT_DATA_SECTION(16)
.x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
[tip:x86/asm] x86/cpufeature: Get rid of the non-asm goto variant
Commit-ID: a362bf9f5e7dd659b96d01382da7b855f4e5a7a1
Gitweb: http://git.kernel.org/tip/a362bf9f5e7dd659b96d01382da7b855f4e5a7a1
Author: Borislav Petkov
AuthorDate: Wed, 27 Jan 2016 09:43:25 +0100
Committer: Ingo Molnar
CommitDate: Sat, 30 Jan 2016 11:22:19 +0100
x86/cpufeature: Get rid of the non-asm goto variant
I can simply quote hpa from the mail:
"Get rid of the non-asm goto variant and just fall back to
dynamic if asm goto is unavailable. It doesn't make any sense,
really, if it is supposed to be safe, and by now the asm
goto-capable gcc is in more wide use. (Originally the gcc 3.x
fallback to pure dynamic didn't exist, either.)"
Booy, am I lazy.
Cleanup the whole CC_HAVE_ASM_GOTO ifdeffery too, while at it.
Suggested-by: H. Peter Anvin
Signed-off-by: Borislav Petkov
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/20160127084325.gb30...@pd.tnic
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/cpufeature.h | 49 ---
1 file changed, 5 insertions(+), 44 deletions(-)
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index a261cf2..9048c1b 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -129,17 +129,16 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
* fast paths and boot_cpu_has() otherwise!
*/
-#if __GNUC__ >= 4 && defined(CONFIG_X86_FAST_FEATURE_TESTS)
+#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_X86_FAST_FEATURE_TESTS)
extern bool __static_cpu_has(u16 bit);
/*
* Static testing of CPU features. Used the same as boot_cpu_has().
- * These are only valid after alternatives have run, but will statically
- * patch the target code for additional performance.
+ * These will statically patch the target code for additional
+ * performance.
*/
static __always_inline __pure bool _static_cpu_has(u16 bit)
{
-#ifdef CC_HAVE_ASM_GOTO
asm_volatile_goto("1: jmp %l[t_dynamic]\n"
"2:\n"
".skip -(((5f-4f) - (2b-1b)) > 0) * "
@@ -172,45 +171,6 @@ static __always_inline __pure bool _static_cpu_has(u16 bit)
return false;
t_dynamic:
return __static_cpu_has(bit);
-#else
- u8 flag;
- /* Open-coded due to __stringify() in ALTERNATIVE() */
- asm volatile("1: movb $2,%0\n"
-"2:\n"
-".section .altinstructions,\"a\"\n"
-" .long 1b - .\n" /* src offset */
-" .long 3f - .\n" /* repl offset */
-" .word %P2\n" /* always replace */
-" .byte 2b - 1b\n" /* source len */
-" .byte 4f - 3f\n" /* replacement len */
-" .byte 0\n" /* pad len */
-".previous\n"
-".section .discard,\"aw\",@progbits\n"
-" .byte 0xff + (4f-3f) - (2b-1b)\n" /* size check
*/
-".previous\n"
-".section .altinstr_replacement,\"ax\"\n"
-"3: movb $0,%0\n"
-"4:\n"
-".previous\n"
-".section .altinstructions,\"a\"\n"
-" .long 1b - .\n" /* src offset */
-" .long 5f - .\n" /* repl offset */
-" .word %P1\n" /* feature bit */
-" .byte 4b - 3b\n" /* src len */
-" .byte 6f - 5f\n" /* repl len */
-" .byte 0\n" /* pad len */
-".previous\n"
-".section .discard,\"aw\",@progbits\n"
-" .byte 0xff + (6f-5f) - (4b-3b)\n" /* size check
*/
-".previous\n"
-".section .altinstr_replacement,\"ax\"\n"
-"5: movb $1,%0\n"
-"6:\n"
-".previous\n"
-: "=qm" (flag)
-: "i" (bit), "i" (X86_FEATURE_ALWAYS));
- return (flag == 2 ? __static_cpu_has(bit) : flag);
-#endif /* CC_HAVE_ASM_GOTO */
}
#define static_cpu_has(bit)\
@@ -221,7 +181,8 @@ static __always_inline __pure bool _static_cpu_has(u16 bit)
)
#else
/*
- * gcc 3.x is too stupid to do the static test; fall back to dynamic.
+ * Fall back to dynamic for gcc versions which don't support asm goto. Should
be
+ * a minority now anyw
[tip:x86/asm] x86/cpufeature: Carve out X86_FEATURE_*
Commit-ID: cd4d09ec6f6c12a2cc3db5b7d8876a325a53545b
Gitweb: http://git.kernel.org/tip/cd4d09ec6f6c12a2cc3db5b7d8876a325a53545b
Author: Borislav Petkov
AuthorDate: Tue, 26 Jan 2016 22:12:04 +0100
Committer: Ingo Molnar
CommitDate: Sat, 30 Jan 2016 11:22:17 +0100
x86/cpufeature: Carve out X86_FEATURE_*
Move them to a separate header and have the following
dependency:
x86/cpufeatures.h <- x86/processor.h <- x86/cpufeature.h
This makes it easier to use the header in asm code and not
include the whole cpufeature.h and add guards for asm.
Suggested-by: H. Peter Anvin
Signed-off-by: Borislav Petkov
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1453842730-28463-5-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
Documentation/kernel-parameters.txt| 2 +-
arch/x86/boot/cpuflags.h | 2 +-
arch/x86/boot/mkcpustr.c | 2 +-
arch/x86/crypto/crc32-pclmul_glue.c| 2 +-
arch/x86/crypto/crc32c-intel_glue.c| 2 +-
arch/x86/crypto/crct10dif-pclmul_glue.c| 2 +-
arch/x86/entry/common.c| 1 +
arch/x86/entry/entry_32.S | 2 +-
arch/x86/entry/vdso/vdso32-setup.c | 1 -
arch/x86/entry/vdso/vdso32/system_call.S | 2 +-
arch/x86/entry/vdso/vma.c | 1 +
arch/x86/include/asm/alternative.h | 6 -
arch/x86/include/asm/apic.h| 1 -
arch/x86/include/asm/arch_hweight.h| 2 +
arch/x86/include/asm/cmpxchg.h | 1 +
arch/x86/include/asm/cpufeature.h | 284 +
.../include/asm/{cpufeature.h => cpufeatures.h}| 336 +
arch/x86/include/asm/fpu/internal.h| 1 +
arch/x86/include/asm/irq_work.h| 2 +-
arch/x86/include/asm/mwait.h | 2 +
arch/x86/include/asm/processor.h | 3 +-
arch/x86/include/asm/smap.h| 2 +-
arch/x86/include/asm/smp.h | 1 -
arch/x86/include/asm/thread_info.h | 2 +-
arch/x86/include/asm/tlbflush.h| 1 +
arch/x86/include/asm/uaccess_64.h | 2 +-
arch/x86/kernel/cpu/Makefile | 2 +-
arch/x86/kernel/cpu/centaur.c | 2 +-
arch/x86/kernel/cpu/cyrix.c| 1 +
arch/x86/kernel/cpu/intel.c| 2 +-
arch/x86/kernel/cpu/intel_cacheinfo.c | 2 +-
arch/x86/kernel/cpu/match.c| 2 +-
arch/x86/kernel/cpu/mkcapflags.sh | 6 +-
arch/x86/kernel/cpu/mtrr/main.c| 2 +-
arch/x86/kernel/cpu/transmeta.c| 2 +-
arch/x86/kernel/e820.c | 1 +
arch/x86/kernel/head_32.S | 2 +-
arch/x86/kernel/hpet.c | 1 +
arch/x86/kernel/msr.c | 2 +-
arch/x86/kernel/verify_cpu.S | 2 +-
arch/x86/lib/clear_page_64.S | 2 +-
arch/x86/lib/copy_page_64.S| 2 +-
arch/x86/lib/copy_user_64.S| 2 +-
arch/x86/lib/memcpy_64.S | 2 +-
arch/x86/lib/memmove_64.S | 2 +-
arch/x86/lib/memset_64.S | 2 +-
arch/x86/mm/setup_nx.c | 1 +
arch/x86/oprofile/op_model_amd.c | 1 -
arch/x86/um/asm/barrier.h | 2 +-
lib/atomic64_test.c| 2 +-
50 files changed, 54 insertions(+), 658 deletions(-)
diff --git a/Documentation/kernel-parameters.txt
b/Documentation/kernel-parameters.txt
index 87d40a7..c0c6253 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -666,7 +666,7 @@ bytes respectively. Such letter suffixes can also be
entirely omitted.
clearcpuid=BITNUM [X86]
Disable CPUID feature X for the kernel. See
- arch/x86/include/asm/cpufeature.h for the valid bit
+ arch/x86/include/asm/cpufeatures.h for the valid bit
numbers. Note the Linux specific bits are not
necessarily
stable over kernel options, but the vendor specific
ones should be.
diff --git a/arch/x86/boot/cpuflags.h b/arch/x86/boot/cpuflags.h
index ea97697..4cb404f 100644
--- a/arch/x86/boot/cpuflags.h
+++ b/arch/x86/boot/cpuflags.h
@@ -1,7 +1,7 @@
#ifndef BOOT_CPUFLAGS_H
#define BOOT_CPUFLAGS_H
-#include
+#include
#include
[tip:x86/asm] x86/cpufeature: Replace the old static_cpu_has() with safe variant
Commit-ID: bc696ca05f5a8927329ec276a892341e006b00ba
Gitweb: http://git.kernel.org/tip/bc696ca05f5a8927329ec276a892341e006b00ba
Author: Borislav Petkov
AuthorDate: Tue, 26 Jan 2016 22:12:05 +0100
Committer: Ingo Molnar
CommitDate: Sat, 30 Jan 2016 11:22:18 +0100
x86/cpufeature: Replace the old static_cpu_has() with safe variant
So the old one didn't work properly before alternatives had run.
And it was supposed to provide an optimized JMP because the
assumption was that the offset it is jumping to is within a
signed byte and thus a two-byte JMP.
So I did an x86_64 allyesconfig build and dumped all possible
sites where static_cpu_has() was used. The optimization amounted
to all in all 12(!) places where static_cpu_has() had generated
a 2-byte JMP. Which has saved us a whopping 36 bytes!
This clearly is not worth the trouble so we can remove it. The
only place where the optimization might count - in __switch_to()
- we will handle differently. But that's not subject of this
patch.
Signed-off-by: Borislav Petkov
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1453842730-28463-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/Kconfig.debug | 10
arch/x86/include/asm/cpufeature.h| 100 +++
arch/x86/include/asm/fpu/internal.h | 14 ++---
arch/x86/kernel/apic/apic_numachip.c | 4 +-
arch/x86/kernel/cpu/common.c | 12 +
arch/x86/kernel/vm86_32.c| 2 +-
drivers/cpufreq/intel_pstate.c | 2 +-
fs/btrfs/disk-io.c | 2 +-
8 files changed, 21 insertions(+), 125 deletions(-)
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index 9b18ed9..68a2d1f 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -350,16 +350,6 @@ config DEBUG_IMR_SELFTEST
If unsure say N here.
-config X86_DEBUG_STATIC_CPU_HAS
- bool "Debug alternatives"
- depends on DEBUG_KERNEL
- ---help---
- This option causes additional code to be generated which
- fails if static_cpu_has() is used before alternatives have
- run.
-
- If unsure, say N.
-
config X86_DEBUG_FPU
bool "Debug the x86 FPU code"
depends on DEBUG_KERNEL
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 3cce9f3..a261cf2 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -125,103 +125,19 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
#define cpu_has_osxsaveboot_cpu_has(X86_FEATURE_OSXSAVE)
#define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR)
/*
- * Do not add any more of those clumsy macros - use static_cpu_has_safe() for
+ * Do not add any more of those clumsy macros - use static_cpu_has() for
* fast paths and boot_cpu_has() otherwise!
*/
#if __GNUC__ >= 4 && defined(CONFIG_X86_FAST_FEATURE_TESTS)
-extern void warn_pre_alternatives(void);
-extern bool __static_cpu_has_safe(u16 bit);
+extern bool __static_cpu_has(u16 bit);
/*
* Static testing of CPU features. Used the same as boot_cpu_has().
* These are only valid after alternatives have run, but will statically
* patch the target code for additional performance.
*/
-static __always_inline __pure bool __static_cpu_has(u16 bit)
-{
-#ifdef CC_HAVE_ASM_GOTO
-
-#ifdef CONFIG_X86_DEBUG_STATIC_CPU_HAS
-
- /*
-* Catch too early usage of this before alternatives
-* have run.
-*/
- asm_volatile_goto("1: jmp %l[t_warn]\n"
-"2:\n"
-".section .altinstructions,\"a\"\n"
-" .long 1b - .\n"
-" .long 0\n" /* no replacement */
-" .word %P0\n" /* 1: do replace */
-" .byte 2b - 1b\n" /* source len */
-" .byte 0\n" /* replacement len */
-" .byte 0\n" /* pad len */
-".previous\n"
-/* skipping size check since replacement size = 0 */
-: : "i" (X86_FEATURE_ALWAYS) : : t_warn);
-
-#endif
-
- asm_volatile_goto("1: jmp %l[t_no]\n"
-"2:\n"
-".section .altinstructions,\"a\"\n"
-" .long 1b - .\n"
-" .long 0\n" /* no replacement */
-" .word %P0\n" /* feature bit */
-" .byte 2b - 1b\n" /* source len */
-" .byte 0\n" /* replacement len */
-" .byte 0\n" /* pad len */
-".previous\n"
-
[tip:x86/cleanups] x86/mm: Align macro defines
Commit-ID: 4baf7fe40790c8ffdab54edc8e5b7051cfce3968
Gitweb: http://git.kernel.org/tip/4baf7fe40790c8ffdab54edc8e5b7051cfce3968
Author: Borislav Petkov
AuthorDate: Mon, 7 Dec 2015 10:24:28 +0100
Committer: Thomas Gleixner
CommitDate: Sat, 19 Dec 2015 11:53:40 +0100
x86/mm: Align macro defines
Bring PAGE_{SHIFT,SIZE,MASK} to the same indentation level as the rest
of the header.
Signed-off-by: Borislav Petkov
Link: http://lkml.kernel.org/r/1449480268-26583-1-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner
---
arch/x86/include/asm/page_types.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/page_types.h
b/arch/x86/include/asm/page_types.h
index cc071c6..7bd0099 100644
--- a/arch/x86/include/asm/page_types.h
+++ b/arch/x86/include/asm/page_types.h
@@ -5,9 +5,9 @@
#include
/* PAGE_SHIFT determines the page size */
-#define PAGE_SHIFT 12
-#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
-#define PAGE_MASK (~(PAGE_SIZE-1))
+#define PAGE_SHIFT 12
+#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
+#define PAGE_MASK (~(PAGE_SIZE-1))
#define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
#define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1))
--
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[tip:x86/cleanups] x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros
Commit-ID: 362f924b64ba0f4be2ee0cb697690c33d40be721
Gitweb: http://git.kernel.org/tip/362f924b64ba0f4be2ee0cb697690c33d40be721
Author: Borislav Petkov
AuthorDate: Mon, 7 Dec 2015 10:39:41 +0100
Committer: Thomas Gleixner
CommitDate: Sat, 19 Dec 2015 11:49:55 +0100
x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros
Those are stupid and code should use static_cpu_has_safe() or
boot_cpu_has() instead. Kill the least used and unused ones.
The remaining ones need more careful inspection before a conversion can
happen. On the TODO.
Signed-off-by: Borislav Petkov
Link: http://lkml.kernel.org/r/1449481182-27541-4-git-send-email...@alien8.de
Cc: David Sterba
Cc: Herbert Xu
Cc: Peter Zijlstra
Cc: Matt Mackall
Cc: Chris Mason
Cc: Josef Bacik
Signed-off-by: Thomas Gleixner
---
arch/x86/crypto/chacha20_glue.c | 2 +-
arch/x86/crypto/crc32c-intel_glue.c | 2 +-
arch/x86/include/asm/cmpxchg_32.h | 2 +-
arch/x86/include/asm/cmpxchg_64.h | 2 +-
arch/x86/include/asm/cpufeature.h | 37 -
arch/x86/include/asm/xor_32.h | 2 +-
arch/x86/kernel/cpu/amd.c | 4 ++--
arch/x86/kernel/cpu/common.c| 4 +++-
arch/x86/kernel/cpu/intel.c | 3 ++-
arch/x86/kernel/cpu/intel_cacheinfo.c | 6 ++---
arch/x86/kernel/cpu/mtrr/generic.c | 2 +-
arch/x86/kernel/cpu/mtrr/main.c | 2 +-
arch/x86/kernel/cpu/perf_event_amd.c| 4 ++--
arch/x86/kernel/cpu/perf_event_amd_uncore.c | 11 +
arch/x86/kernel/fpu/init.c | 4 ++--
arch/x86/kernel/hw_breakpoint.c | 6 +++--
arch/x86/kernel/smpboot.c | 2 +-
arch/x86/kernel/vm86_32.c | 4 +++-
arch/x86/mm/setup_nx.c | 4 ++--
drivers/char/hw_random/via-rng.c| 5 ++--
drivers/crypto/padlock-aes.c| 2 +-
drivers/crypto/padlock-sha.c| 2 +-
drivers/iommu/intel_irq_remapping.c | 2 +-
fs/btrfs/disk-io.c | 2 +-
24 files changed, 48 insertions(+), 68 deletions(-)
diff --git a/arch/x86/crypto/chacha20_glue.c b/arch/x86/crypto/chacha20_glue.c
index 722bace..8baaff5 100644
--- a/arch/x86/crypto/chacha20_glue.c
+++ b/arch/x86/crypto/chacha20_glue.c
@@ -125,7 +125,7 @@ static struct crypto_alg alg = {
static int __init chacha20_simd_mod_init(void)
{
- if (!cpu_has_ssse3)
+ if (!boot_cpu_has(X86_FEATURE_SSSE3))
return -ENODEV;
#ifdef CONFIG_AS_AVX2
diff --git a/arch/x86/crypto/crc32c-intel_glue.c
b/arch/x86/crypto/crc32c-intel_glue.c
index 81a595d..0e98716 100644
--- a/arch/x86/crypto/crc32c-intel_glue.c
+++ b/arch/x86/crypto/crc32c-intel_glue.c
@@ -257,7 +257,7 @@ static int __init crc32c_intel_mod_init(void)
if (!x86_match_cpu(crc32c_cpu_id))
return -ENODEV;
#ifdef CONFIG_X86_64
- if (cpu_has_pclmulqdq) {
+ if (boot_cpu_has(X86_FEATURE_PCLMULQDQ)) {
alg.update = crc32c_pcl_intel_update;
alg.finup = crc32c_pcl_intel_finup;
alg.digest = crc32c_pcl_intel_digest;
diff --git a/arch/x86/include/asm/cmpxchg_32.h
b/arch/x86/include/asm/cmpxchg_32.h
index f7e1429..e4959d0 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -109,6 +109,6 @@ static inline u64 __cmpxchg64_local(volatile u64 *ptr, u64
old, u64 new)
#endif
-#define system_has_cmpxchg_double() cpu_has_cx8
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX8)
#endif /* _ASM_X86_CMPXCHG_32_H */
diff --git a/arch/x86/include/asm/cmpxchg_64.h
b/arch/x86/include/asm/cmpxchg_64.h
index 1af9469..caa23a3 100644
--- a/arch/x86/include/asm/cmpxchg_64.h
+++ b/arch/x86/include/asm/cmpxchg_64.h
@@ -18,6 +18,6 @@ static inline void set_64bit(volatile u64 *ptr, u64 val)
cmpxchg_local((ptr), (o), (n)); \
})
-#define system_has_cmpxchg_double() cpu_has_cx16
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX16)
#endif /* _ASM_X86_CMPXCHG_64_H */
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 35401fe..144b042 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -385,58 +385,29 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
} while (0)
#define cpu_has_fpuboot_cpu_has(X86_FEATURE_FPU)
-#define cpu_has_de boot_cpu_has(X86_FEATURE_DE)
#define cpu_has_pseboot_cpu_has(X86_FEATURE_PSE)
#define cpu_has_tscboot_cpu_has(X86_FEATURE_TSC)
#define cpu_has_pgeboot_cpu_has(X86_FEATURE_PGE)
#define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC)
-#define cpu_has_sepboot_cpu_has(X86_FEATURE_SEP)
-#define cpu_has_mtrr boot_cpu_has(X86_FEATURE_MTRR)
-#define cpu_has_mmx
[tip:x86/cleanups] x86/cpu: Provide a config option to disable static_cpu_has
Commit-ID: 6e1315fe82308cd29e7550eab967262e8bbc71a3 Gitweb: http://git.kernel.org/tip/6e1315fe82308cd29e7550eab967262e8bbc71a3 Author: Borislav Petkov AuthorDate: Mon, 7 Dec 2015 10:39:42 +0100 Committer: Thomas Gleixner CommitDate: Sat, 19 Dec 2015 11:49:55 +0100 x86/cpu: Provide a config option to disable static_cpu_has This brings .text savings of about ~1.6K when building a tinyconfig. It is off by default so nothing changes for the default. Kconfig help text from Josh. Signed-off-by: Borislav Petkov Reviewed-by: Josh Triplett Link: http://lkml.kernel.org/r/1449481182-27541-5-git-send-email...@alien8.de Signed-off-by: Thomas Gleixner --- arch/x86/Kconfig | 11 +++ arch/x86/include/asm/cpufeature.h | 2 +- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index db3622f..a2abc2f 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -349,6 +349,17 @@ config X86_FEATURE_NAMES If in doubt, say Y. +config X86_FAST_FEATURE_TESTS + bool "Fast CPU feature tests" if EMBEDDED + default y + ---help--- + Some fast-paths in the kernel depend on the capabilities of the CPU. + Say Y here for the kernel to patch in the appropriate code at runtime + based on the capabilities of the CPU. The infrastructure for patching + code at runtime takes up some additional space; space-constrained + embedded systems may wish to say N here to produce smaller, slightly + slower code. + config X86_X2APIC bool "Support x2apic" depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index 144b042..43e1444 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -409,7 +409,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; * fast paths and boot_cpu_has() otherwise! */ -#if __GNUC__ >= 4 +#if __GNUC__ >= 4 && defined(CONFIG_X86_FAST_FEATURE_TESTS) extern void warn_pre_alternatives(void); extern bool __static_cpu_has_safe(u16 bit); -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[tip:x86/cleanups] x86/cpufeature: Cleanup get_cpu_cap()
Commit-ID: 39c06df4dc10a41de5fe706f4378ee5f09beba73
Gitweb: http://git.kernel.org/tip/39c06df4dc10a41de5fe706f4378ee5f09beba73
Author: Borislav Petkov
AuthorDate: Mon, 7 Dec 2015 10:39:40 +0100
Committer: Thomas Gleixner
CommitDate: Sat, 19 Dec 2015 11:49:54 +0100
x86/cpufeature: Cleanup get_cpu_cap()
Add an enum for the ->x86_capability array indices and cleanup
get_cpu_cap() by killing some redundant local vars.
Signed-off-by: Borislav Petkov
Link: http://lkml.kernel.org/r/1449481182-27541-3-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner
---
arch/x86/include/asm/cpufeature.h | 20 +
arch/x86/kernel/cpu/centaur.c | 2 +-
arch/x86/kernel/cpu/common.c | 47 ++-
arch/x86/kernel/cpu/transmeta.c | 4 ++--
4 files changed, 45 insertions(+), 28 deletions(-)
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 13d78e0..35401fe 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -288,6 +288,26 @@
#include
#include
+enum cpuid_leafs
+{
+ CPUID_1_EDX = 0,
+ CPUID_8000_0001_EDX,
+ CPUID_8086_0001_EDX,
+ CPUID_LNX_1,
+ CPUID_1_ECX,
+ CPUID_C000_0001_EDX,
+ CPUID_8000_0001_ECX,
+ CPUID_LNX_2,
+ CPUID_LNX_3,
+ CPUID_7_0_EBX,
+ CPUID_D_1_EAX,
+ CPUID_F_0_EDX,
+ CPUID_F_1_EDX,
+ CPUID_8000_0008_EBX,
+ CPUID_6_EAX,
+ CPUID_8000_000A_EDX,
+};
+
#ifdef CONFIG_X86_FEATURE_NAMES
extern const char * const x86_cap_flags[NCAPINTS*32];
extern const char * const x86_power_flags[32];
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index d8fba5c..ae20be6 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -43,7 +43,7 @@ static void init_c3(struct cpuinfo_x86 *c)
/* store Centaur Extended Feature Flags as
* word 5 of the CPU capability bit array
*/
- c->x86_capability[5] = cpuid_edx(0xC001);
+ c->x86_capability[CPUID_C000_0001_EDX] = cpuid_edx(0xC001);
}
#ifdef CONFIG_X86_32
/* Cyrix III family needs CX8 & PGE explicitly enabled. */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c755173..e14d5bd 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -599,52 +599,47 @@ void cpu_detect(struct cpuinfo_x86 *c)
void get_cpu_cap(struct cpuinfo_x86 *c)
{
- u32 tfms, xlvl;
- u32 ebx;
+ u32 eax, ebx, ecx, edx;
/* Intel-defined flags: level 0x0001 */
if (c->cpuid_level >= 0x0001) {
- u32 capability, excap;
+ cpuid(0x0001, &eax, &ebx, &ecx, &edx);
- cpuid(0x0001, &tfms, &ebx, &excap, &capability);
- c->x86_capability[0] = capability;
- c->x86_capability[4] = excap;
+ c->x86_capability[CPUID_1_ECX] = ecx;
+ c->x86_capability[CPUID_1_EDX] = edx;
}
/* Additional Intel-defined flags: level 0x0007 */
if (c->cpuid_level >= 0x0007) {
- u32 eax, ebx, ecx, edx;
-
cpuid_count(0x0007, 0, &eax, &ebx, &ecx, &edx);
- c->x86_capability[9] = ebx;
+ c->x86_capability[CPUID_7_0_EBX] = ebx;
- c->x86_capability[14] = cpuid_eax(0x0006);
+ c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x0006);
}
/* Extended state features: level 0x000d */
if (c->cpuid_level >= 0x000d) {
- u32 eax, ebx, ecx, edx;
-
cpuid_count(0x000d, 1, &eax, &ebx, &ecx, &edx);
- c->x86_capability[10] = eax;
+ c->x86_capability[CPUID_D_1_EAX] = eax;
}
/* Additional Intel-defined flags: level 0x000F */
if (c->cpuid_level >= 0x000F) {
- u32 eax, ebx, ecx, edx;
/* QoS sub-leaf, EAX=0Fh, ECX=0 */
cpuid_count(0x000F, 0, &eax, &ebx, &ecx, &edx);
- c->x86_capability[11] = edx;
+ c->x86_capability[CPUID_F_0_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
/* will be overridden if occupancy monitoring exists */
c->x86_cache_max_rmid = ebx;
/* QoS sub-leaf, EAX=0Fh, ECX=1 */
cpuid_count(0x000F, 1, &eax, &ebx, &ecx, &edx);
- c->x86_capability[12] = edx;
+ c->x86_capability[CPUID_F_1_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) {
c->x86_cache_max_rmid = ecx;
c->x86_cache_occ_scale = ebx;
@@ -656,22 +651,24 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
}
[tip:x86/cleanups] x86/cpufeature: Move some of the scattered feature bits to x86_capability
Commit-ID: 2ccd71f1b278d450a6f8c8c737c7fe237ca06dc6 Gitweb: http://git.kernel.org/tip/2ccd71f1b278d450a6f8c8c737c7fe237ca06dc6 Author: Borislav Petkov AuthorDate: Mon, 7 Dec 2015 10:39:39 +0100 Committer: Thomas Gleixner CommitDate: Sat, 19 Dec 2015 11:49:53 +0100 x86/cpufeature: Move some of the scattered feature bits to x86_capability Turn the CPUID leafs which are proper CPUID feature bit leafs into separate ->x86_capability words. Signed-off-by: Borislav Petkov Link: http://lkml.kernel.org/r/1449481182-27541-2-git-send-email...@alien8.de Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/cpufeature.h | 54 +++ arch/x86/kernel/cpu/common.c | 5 arch/x86/kernel/cpu/scattered.c | 20 --- 3 files changed, 37 insertions(+), 42 deletions(-) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index e4f8010..13d78e0 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -12,7 +12,7 @@ #include #endif -#define NCAPINTS 14 /* N 32-bit words worth of info */ +#define NCAPINTS 16 /* N 32-bit words worth of info */ #define NBUGINTS 1 /* N 32-bit bug flags */ /* @@ -181,22 +181,17 @@ /* * Auxiliary flags: Linux defined - For features scattered in various - * CPUID levels like 0x6, 0xA etc, word 7 + * CPUID levels like 0x6, 0xA etc, word 7. + * + * Reuse free bits when adding new feature flags! */ -#define X86_FEATURE_IDA( 7*32+ 0) /* Intel Dynamic Acceleration */ -#define X86_FEATURE_ARAT ( 7*32+ 1) /* Always Running APIC Timer */ + #define X86_FEATURE_CPB( 7*32+ 2) /* AMD Core Performance Boost */ #define X86_FEATURE_EPB( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */ -#define X86_FEATURE_PLN( 7*32+ 5) /* Intel Power Limit Notification */ -#define X86_FEATURE_PTS( 7*32+ 6) /* Intel Package Thermal Status */ -#define X86_FEATURE_DTHERM ( 7*32+ 7) /* Digital Thermal Sensor */ + #define X86_FEATURE_HW_PSTATE ( 7*32+ 8) /* AMD HW-PState */ #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */ -#define X86_FEATURE_HWP( 7*32+ 10) /* "hwp" Intel HWP */ -#define X86_FEATURE_HWP_NOTIFY ( 7*32+ 11) /* Intel HWP_NOTIFY */ -#define X86_FEATURE_HWP_ACT_WINDOW ( 7*32+ 12) /* Intel HWP_ACT_WINDOW */ -#define X86_FEATURE_HWP_EPP( 7*32+13) /* Intel HWP_EPP */ -#define X86_FEATURE_HWP_PKG_REQ ( 7*32+14) /* Intel HWP_PKG_REQ */ + #define X86_FEATURE_INTEL_PT ( 7*32+15) /* Intel Processor Trace */ /* Virtualization flags: Linux defined, word 8 */ @@ -205,16 +200,7 @@ #define X86_FEATURE_FLEXPRIORITY ( 8*32+ 2) /* Intel FlexPriority */ #define X86_FEATURE_EPT ( 8*32+ 3) /* Intel Extended Page Table */ #define X86_FEATURE_VPID( 8*32+ 4) /* Intel Virtual Processor ID */ -#define X86_FEATURE_NPT( 8*32+ 5) /* AMD Nested Page Table support */ -#define X86_FEATURE_LBRV ( 8*32+ 6) /* AMD LBR Virtualization support */ -#define X86_FEATURE_SVML ( 8*32+ 7) /* "svm_lock" AMD SVM locking MSR */ -#define X86_FEATURE_NRIPS ( 8*32+ 8) /* "nrip_save" AMD SVM next_rip save */ -#define X86_FEATURE_TSCRATEMSR ( 8*32+ 9) /* "tsc_scale" AMD TSC scaling support */ -#define X86_FEATURE_VMCBCLEAN ( 8*32+10) /* "vmcb_clean" AMD VMCB clean bits support */ -#define X86_FEATURE_FLUSHBYASID ( 8*32+11) /* AMD flush-by-ASID support */ -#define X86_FEATURE_DECODEASSISTS ( 8*32+12) /* AMD Decode Assists support */ -#define X86_FEATURE_PAUSEFILTER ( 8*32+13) /* AMD filtered pause intercept */ -#define X86_FEATURE_PFTHRESHOLD ( 8*32+14) /* AMD pause filter threshold */ + #define X86_FEATURE_VMMCALL ( 8*32+15) /* Prefer vmmcall to vmcall */ @@ -258,6 +244,30 @@ /* AMD-defined CPU features, CPUID level 0x8008 (ebx), word 13 */ #define X86_FEATURE_CLZERO (13*32+0) /* CLZERO instruction */ +/* Thermal and Power Management Leaf, CPUID level 0x0006 (eax), word 14 */ +#define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */ +#define X86_FEATURE_IDA(14*32+ 1) /* Intel Dynamic Acceleration */ +#define X86_FEATURE_ARAT (14*32+ 2) /* Always Running APIC Timer */ +#define X86_FEATURE_PLN(14*32+ 4) /* Intel Power Limit Notification */ +#define X86_FEATURE_PTS(14*32+ 6) /* Intel Package Thermal Status */ +#define X86_FEATURE_HWP(14*32+ 7) /* Intel Hardware P-states */ +#define X86_FEATURE_HWP_NOTIFY (14*32+ 8) /* HWP Notification */ +#define X86_FEATURE_HWP_ACT_WINDOW (14*32+ 9) /* HWP Activity Window */ +#define X86_FEATURE_HWP_EPP(14*32+10) /* HWP Energy Perf. Preference */ +#define X86_FEATURE_HWP_PKG_REQ (14*32+11) /* HWP Package Level Request */ + +/* AMD SVM Feature Identification, CPUID level 0x800a (edx), word 15 */ +#define X86_FEATURE_NPT(1
[tip:x86/cpufeature] x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros
Commit-ID: ae8348667c30175867f2c60e490097289135ac99
Gitweb: http://git.kernel.org/tip/ae8348667c30175867f2c60e490097289135ac99
Author: Borislav Petkov
AuthorDate: Mon, 7 Dec 2015 10:39:41 +0100
Committer: Thomas Gleixner
CommitDate: Sat, 19 Dec 2015 11:14:00 +0100
x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros
Those are stupid and code should use static_cpu_has_safe() or
boot_cpu_has() instead. Kill the least used and unused ones.
The remaining ones need more careful inspection before a conversion can
happen. On the TODO.
Signed-off-by: Borislav Petkov
Link: http://lkml.kernel.org/r/1449481182-27541-4-git-send-email...@alien8.de
Cc: David Sterba
Cc: Herbert Xu
Cc: Peter Zijlstra
Cc: Matt Mackall
Cc: Chris Mason
Cc: Josef Bacik
Signed-off-by: Thomas Gleixner
---
arch/x86/crypto/chacha20_glue.c | 2 +-
arch/x86/crypto/crc32c-intel_glue.c | 2 +-
arch/x86/include/asm/cmpxchg_32.h | 2 +-
arch/x86/include/asm/cmpxchg_64.h | 2 +-
arch/x86/include/asm/cpufeature.h | 37 -
arch/x86/include/asm/xor_32.h | 2 +-
arch/x86/kernel/cpu/amd.c | 4 ++--
arch/x86/kernel/cpu/common.c| 4 +++-
arch/x86/kernel/cpu/intel.c | 3 ++-
arch/x86/kernel/cpu/intel_cacheinfo.c | 6 ++---
arch/x86/kernel/cpu/mtrr/generic.c | 2 +-
arch/x86/kernel/cpu/mtrr/main.c | 2 +-
arch/x86/kernel/cpu/perf_event_amd.c| 4 ++--
arch/x86/kernel/cpu/perf_event_amd_uncore.c | 11 +
arch/x86/kernel/fpu/init.c | 4 ++--
arch/x86/kernel/hw_breakpoint.c | 6 +++--
arch/x86/kernel/smpboot.c | 2 +-
arch/x86/kernel/vm86_32.c | 4 +++-
arch/x86/mm/setup_nx.c | 4 ++--
drivers/char/hw_random/via-rng.c| 5 ++--
drivers/crypto/padlock-aes.c| 2 +-
drivers/crypto/padlock-sha.c| 2 +-
drivers/iommu/intel_irq_remapping.c | 2 +-
fs/btrfs/disk-io.c | 2 +-
24 files changed, 48 insertions(+), 68 deletions(-)
diff --git a/arch/x86/crypto/chacha20_glue.c b/arch/x86/crypto/chacha20_glue.c
index 722bace..8baaff5 100644
--- a/arch/x86/crypto/chacha20_glue.c
+++ b/arch/x86/crypto/chacha20_glue.c
@@ -125,7 +125,7 @@ static struct crypto_alg alg = {
static int __init chacha20_simd_mod_init(void)
{
- if (!cpu_has_ssse3)
+ if (!boot_cpu_has(X86_FEATURE_SSSE3))
return -ENODEV;
#ifdef CONFIG_AS_AVX2
diff --git a/arch/x86/crypto/crc32c-intel_glue.c
b/arch/x86/crypto/crc32c-intel_glue.c
index 81a595d..0e98716 100644
--- a/arch/x86/crypto/crc32c-intel_glue.c
+++ b/arch/x86/crypto/crc32c-intel_glue.c
@@ -257,7 +257,7 @@ static int __init crc32c_intel_mod_init(void)
if (!x86_match_cpu(crc32c_cpu_id))
return -ENODEV;
#ifdef CONFIG_X86_64
- if (cpu_has_pclmulqdq) {
+ if (boot_cpu_has(X86_FEATURE_PCLMULQDQ)) {
alg.update = crc32c_pcl_intel_update;
alg.finup = crc32c_pcl_intel_finup;
alg.digest = crc32c_pcl_intel_digest;
diff --git a/arch/x86/include/asm/cmpxchg_32.h
b/arch/x86/include/asm/cmpxchg_32.h
index f7e1429..e4959d0 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -109,6 +109,6 @@ static inline u64 __cmpxchg64_local(volatile u64 *ptr, u64
old, u64 new)
#endif
-#define system_has_cmpxchg_double() cpu_has_cx8
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX8)
#endif /* _ASM_X86_CMPXCHG_32_H */
diff --git a/arch/x86/include/asm/cmpxchg_64.h
b/arch/x86/include/asm/cmpxchg_64.h
index 1af9469..caa23a3 100644
--- a/arch/x86/include/asm/cmpxchg_64.h
+++ b/arch/x86/include/asm/cmpxchg_64.h
@@ -18,6 +18,6 @@ static inline void set_64bit(volatile u64 *ptr, u64 val)
cmpxchg_local((ptr), (o), (n)); \
})
-#define system_has_cmpxchg_double() cpu_has_cx16
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX16)
#endif /* _ASM_X86_CMPXCHG_64_H */
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 35401fe..144b042 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -385,58 +385,29 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
} while (0)
#define cpu_has_fpuboot_cpu_has(X86_FEATURE_FPU)
-#define cpu_has_de boot_cpu_has(X86_FEATURE_DE)
#define cpu_has_pseboot_cpu_has(X86_FEATURE_PSE)
#define cpu_has_tscboot_cpu_has(X86_FEATURE_TSC)
#define cpu_has_pgeboot_cpu_has(X86_FEATURE_PGE)
#define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC)
-#define cpu_has_sepboot_cpu_has(X86_FEATURE_SEP)
-#define cpu_has_mtrr boot_cpu_has(X86_FEATURE_MTRR)
-#define cpu_has_mmx
[tip:x86/cpufeature] x86/cpu: Provide a config option to disable static_cpu_has
Commit-ID: a4eb0afca79fd699b33e059f81d204e84f2b6760 Gitweb: http://git.kernel.org/tip/a4eb0afca79fd699b33e059f81d204e84f2b6760 Author: Borislav Petkov AuthorDate: Mon, 7 Dec 2015 10:39:42 +0100 Committer: Thomas Gleixner CommitDate: Sat, 19 Dec 2015 11:14:01 +0100 x86/cpu: Provide a config option to disable static_cpu_has This brings .text savings of about ~1.6K when building a tinyconfig. It is off by default so nothing changes for the default. Kconfig help text from Josh. Signed-off-by: Borislav Petkov Reviewed-by: Josh Triplett Link: http://lkml.kernel.org/r/1449481182-27541-5-git-send-email...@alien8.de Signed-off-by: Thomas Gleixner --- arch/x86/Kconfig | 11 +++ arch/x86/include/asm/cpufeature.h | 2 +- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index db3622f..a2abc2f 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -349,6 +349,17 @@ config X86_FEATURE_NAMES If in doubt, say Y. +config X86_FAST_FEATURE_TESTS + bool "Fast CPU feature tests" if EMBEDDED + default y + ---help--- + Some fast-paths in the kernel depend on the capabilities of the CPU. + Say Y here for the kernel to patch in the appropriate code at runtime + based on the capabilities of the CPU. The infrastructure for patching + code at runtime takes up some additional space; space-constrained + embedded systems may wish to say N here to produce smaller, slightly + slower code. + config X86_X2APIC bool "Support x2apic" depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index 144b042..43e1444 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -409,7 +409,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; * fast paths and boot_cpu_has() otherwise! */ -#if __GNUC__ >= 4 +#if __GNUC__ >= 4 && defined(CONFIG_X86_FAST_FEATURE_TESTS) extern void warn_pre_alternatives(void); extern bool __static_cpu_has_safe(u16 bit); -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[tip:x86/cpufeature] x86/cpufeature: Move some of the scattered feature bits to x86_capability
Commit-ID: fde850b74a0167e06d5c057dc68cd1b35700f06d Gitweb: http://git.kernel.org/tip/fde850b74a0167e06d5c057dc68cd1b35700f06d Author: Borislav Petkov AuthorDate: Mon, 7 Dec 2015 10:39:39 +0100 Committer: Thomas Gleixner CommitDate: Sat, 19 Dec 2015 11:14:00 +0100 x86/cpufeature: Move some of the scattered feature bits to x86_capability Turn the CPUID leafs which are proper CPUID feature bit leafs into separate ->x86_capability words. Signed-off-by: Borislav Petkov Link: http://lkml.kernel.org/r/1449481182-27541-2-git-send-email...@alien8.de Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/cpufeature.h | 54 +++ arch/x86/kernel/cpu/common.c | 5 arch/x86/kernel/cpu/scattered.c | 20 --- 3 files changed, 37 insertions(+), 42 deletions(-) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index e4f8010..13d78e0 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -12,7 +12,7 @@ #include #endif -#define NCAPINTS 14 /* N 32-bit words worth of info */ +#define NCAPINTS 16 /* N 32-bit words worth of info */ #define NBUGINTS 1 /* N 32-bit bug flags */ /* @@ -181,22 +181,17 @@ /* * Auxiliary flags: Linux defined - For features scattered in various - * CPUID levels like 0x6, 0xA etc, word 7 + * CPUID levels like 0x6, 0xA etc, word 7. + * + * Reuse free bits when adding new feature flags! */ -#define X86_FEATURE_IDA( 7*32+ 0) /* Intel Dynamic Acceleration */ -#define X86_FEATURE_ARAT ( 7*32+ 1) /* Always Running APIC Timer */ + #define X86_FEATURE_CPB( 7*32+ 2) /* AMD Core Performance Boost */ #define X86_FEATURE_EPB( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */ -#define X86_FEATURE_PLN( 7*32+ 5) /* Intel Power Limit Notification */ -#define X86_FEATURE_PTS( 7*32+ 6) /* Intel Package Thermal Status */ -#define X86_FEATURE_DTHERM ( 7*32+ 7) /* Digital Thermal Sensor */ + #define X86_FEATURE_HW_PSTATE ( 7*32+ 8) /* AMD HW-PState */ #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */ -#define X86_FEATURE_HWP( 7*32+ 10) /* "hwp" Intel HWP */ -#define X86_FEATURE_HWP_NOTIFY ( 7*32+ 11) /* Intel HWP_NOTIFY */ -#define X86_FEATURE_HWP_ACT_WINDOW ( 7*32+ 12) /* Intel HWP_ACT_WINDOW */ -#define X86_FEATURE_HWP_EPP( 7*32+13) /* Intel HWP_EPP */ -#define X86_FEATURE_HWP_PKG_REQ ( 7*32+14) /* Intel HWP_PKG_REQ */ + #define X86_FEATURE_INTEL_PT ( 7*32+15) /* Intel Processor Trace */ /* Virtualization flags: Linux defined, word 8 */ @@ -205,16 +200,7 @@ #define X86_FEATURE_FLEXPRIORITY ( 8*32+ 2) /* Intel FlexPriority */ #define X86_FEATURE_EPT ( 8*32+ 3) /* Intel Extended Page Table */ #define X86_FEATURE_VPID( 8*32+ 4) /* Intel Virtual Processor ID */ -#define X86_FEATURE_NPT( 8*32+ 5) /* AMD Nested Page Table support */ -#define X86_FEATURE_LBRV ( 8*32+ 6) /* AMD LBR Virtualization support */ -#define X86_FEATURE_SVML ( 8*32+ 7) /* "svm_lock" AMD SVM locking MSR */ -#define X86_FEATURE_NRIPS ( 8*32+ 8) /* "nrip_save" AMD SVM next_rip save */ -#define X86_FEATURE_TSCRATEMSR ( 8*32+ 9) /* "tsc_scale" AMD TSC scaling support */ -#define X86_FEATURE_VMCBCLEAN ( 8*32+10) /* "vmcb_clean" AMD VMCB clean bits support */ -#define X86_FEATURE_FLUSHBYASID ( 8*32+11) /* AMD flush-by-ASID support */ -#define X86_FEATURE_DECODEASSISTS ( 8*32+12) /* AMD Decode Assists support */ -#define X86_FEATURE_PAUSEFILTER ( 8*32+13) /* AMD filtered pause intercept */ -#define X86_FEATURE_PFTHRESHOLD ( 8*32+14) /* AMD pause filter threshold */ + #define X86_FEATURE_VMMCALL ( 8*32+15) /* Prefer vmmcall to vmcall */ @@ -258,6 +244,30 @@ /* AMD-defined CPU features, CPUID level 0x8008 (ebx), word 13 */ #define X86_FEATURE_CLZERO (13*32+0) /* CLZERO instruction */ +/* Thermal and Power Management Leaf, CPUID level 0x0006 (eax), word 14 */ +#define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */ +#define X86_FEATURE_IDA(14*32+ 1) /* Intel Dynamic Acceleration */ +#define X86_FEATURE_ARAT (14*32+ 2) /* Always Running APIC Timer */ +#define X86_FEATURE_PLN(14*32+ 4) /* Intel Power Limit Notification */ +#define X86_FEATURE_PTS(14*32+ 6) /* Intel Package Thermal Status */ +#define X86_FEATURE_HWP(14*32+ 7) /* Intel Hardware P-states */ +#define X86_FEATURE_HWP_NOTIFY (14*32+ 8) /* HWP Notification */ +#define X86_FEATURE_HWP_ACT_WINDOW (14*32+ 9) /* HWP Activity Window */ +#define X86_FEATURE_HWP_EPP(14*32+10) /* HWP Energy Perf. Preference */ +#define X86_FEATURE_HWP_PKG_REQ (14*32+11) /* HWP Package Level Request */ + +/* AMD SVM Feature Identification, CPUID level 0x800a (edx), word 15 */ +#define X86_FEATURE_NPT(1
[tip:x86/cpufeature] x86/cpufeature: Cleanup get_cpu_cap()
Commit-ID: 54ed92a012c82ad344e9e41193d3e5e83a5f73be
Gitweb: http://git.kernel.org/tip/54ed92a012c82ad344e9e41193d3e5e83a5f73be
Author: Borislav Petkov
AuthorDate: Mon, 7 Dec 2015 10:39:40 +0100
Committer: Thomas Gleixner
CommitDate: Sat, 19 Dec 2015 11:14:00 +0100
x86/cpufeature: Cleanup get_cpu_cap()
Add an enum for the ->x86_capability array indices and cleanup
get_cpu_cap() by killing some redundant local vars.
Signed-off-by: Borislav Petkov
Link: http://lkml.kernel.org/r/1449481182-27541-3-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner
---
arch/x86/include/asm/cpufeature.h | 20 +
arch/x86/kernel/cpu/centaur.c | 2 +-
arch/x86/kernel/cpu/common.c | 47 ++-
arch/x86/kernel/cpu/transmeta.c | 4 ++--
4 files changed, 45 insertions(+), 28 deletions(-)
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 13d78e0..35401fe 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -288,6 +288,26 @@
#include
#include
+enum cpuid_leafs
+{
+ CPUID_1_EDX = 0,
+ CPUID_8000_0001_EDX,
+ CPUID_8086_0001_EDX,
+ CPUID_LNX_1,
+ CPUID_1_ECX,
+ CPUID_C000_0001_EDX,
+ CPUID_8000_0001_ECX,
+ CPUID_LNX_2,
+ CPUID_LNX_3,
+ CPUID_7_0_EBX,
+ CPUID_D_1_EAX,
+ CPUID_F_0_EDX,
+ CPUID_F_1_EDX,
+ CPUID_8000_0008_EBX,
+ CPUID_6_EAX,
+ CPUID_8000_000A_EDX,
+};
+
#ifdef CONFIG_X86_FEATURE_NAMES
extern const char * const x86_cap_flags[NCAPINTS*32];
extern const char * const x86_power_flags[32];
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index d8fba5c..ae20be6 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -43,7 +43,7 @@ static void init_c3(struct cpuinfo_x86 *c)
/* store Centaur Extended Feature Flags as
* word 5 of the CPU capability bit array
*/
- c->x86_capability[5] = cpuid_edx(0xC001);
+ c->x86_capability[CPUID_C000_0001_EDX] = cpuid_edx(0xC001);
}
#ifdef CONFIG_X86_32
/* Cyrix III family needs CX8 & PGE explicitly enabled. */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c755173..e14d5bd 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -599,52 +599,47 @@ void cpu_detect(struct cpuinfo_x86 *c)
void get_cpu_cap(struct cpuinfo_x86 *c)
{
- u32 tfms, xlvl;
- u32 ebx;
+ u32 eax, ebx, ecx, edx;
/* Intel-defined flags: level 0x0001 */
if (c->cpuid_level >= 0x0001) {
- u32 capability, excap;
+ cpuid(0x0001, &eax, &ebx, &ecx, &edx);
- cpuid(0x0001, &tfms, &ebx, &excap, &capability);
- c->x86_capability[0] = capability;
- c->x86_capability[4] = excap;
+ c->x86_capability[CPUID_1_ECX] = ecx;
+ c->x86_capability[CPUID_1_EDX] = edx;
}
/* Additional Intel-defined flags: level 0x0007 */
if (c->cpuid_level >= 0x0007) {
- u32 eax, ebx, ecx, edx;
-
cpuid_count(0x0007, 0, &eax, &ebx, &ecx, &edx);
- c->x86_capability[9] = ebx;
+ c->x86_capability[CPUID_7_0_EBX] = ebx;
- c->x86_capability[14] = cpuid_eax(0x0006);
+ c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x0006);
}
/* Extended state features: level 0x000d */
if (c->cpuid_level >= 0x000d) {
- u32 eax, ebx, ecx, edx;
-
cpuid_count(0x000d, 1, &eax, &ebx, &ecx, &edx);
- c->x86_capability[10] = eax;
+ c->x86_capability[CPUID_D_1_EAX] = eax;
}
/* Additional Intel-defined flags: level 0x000F */
if (c->cpuid_level >= 0x000F) {
- u32 eax, ebx, ecx, edx;
/* QoS sub-leaf, EAX=0Fh, ECX=0 */
cpuid_count(0x000F, 0, &eax, &ebx, &ecx, &edx);
- c->x86_capability[11] = edx;
+ c->x86_capability[CPUID_F_0_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
/* will be overridden if occupancy monitoring exists */
c->x86_cache_max_rmid = ebx;
/* QoS sub-leaf, EAX=0Fh, ECX=1 */
cpuid_count(0x000F, 1, &eax, &ebx, &ecx, &edx);
- c->x86_capability[12] = edx;
+ c->x86_capability[CPUID_F_1_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) {
c->x86_cache_max_rmid = ecx;
c->x86_cache_occ_scale = ebx;
@@ -656,22 +651,24 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
}
[tip:x86/asm] x86/entry/64_compat: Make labels local
Commit-ID: f74acf0e4326bfaa2c0be1e82f23801fe347cd9c Gitweb: http://git.kernel.org/tip/f74acf0e4326bfaa2c0be1e82f23801fe347cd9c Author: Borislav Petkov AuthorDate: Sat, 12 Dec 2015 11:27:57 +0100 Committer: Ingo Molnar CommitDate: Mon, 14 Dec 2015 09:28:48 +0100 x86/entry/64_compat: Make labels local ... so that they don't appear as symbols in the final ELF. Signed-off-by: Borislav Petkov Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Brian Gerst Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1449916077-6506-1-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/entry/entry_64_compat.S | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S index bbcb285..8d802a1 100644 --- a/arch/x86/entry/entry_64_compat.S +++ b/arch/x86/entry/entry_64_compat.S @@ -96,15 +96,15 @@ ENTRY(entry_SYSENTER_compat) * This needs to happen before enabling interrupts so that * we don't get preempted with NT set. * -* NB.: sysenter_fix_flags is a label with the code under it moved +* NB.: .Lsysenter_fix_flags is a label with the code under it moved * out-of-line as an optimization: NT is unlikely to be set in the * majority of the cases and instead of polluting the I$ unnecessarily, * we're keeping that code behind a branch which will predict as * not-taken and therefore its instructions won't be fetched. */ testl $X86_EFLAGS_NT, EFLAGS(%rsp) - jnz sysenter_fix_flags -sysenter_flags_fixed: + jnz .Lsysenter_fix_flags +.Lsysenter_flags_fixed: /* * User mode is traced as though IRQs are on, and SYSENTER @@ -119,10 +119,10 @@ sysenter_flags_fixed: "jmp .Lsyscall_32_done", X86_FEATURE_XENPV jmp sysret32_from_system_call -sysenter_fix_flags: +.Lsysenter_fix_flags: pushq $X86_EFLAGS_FIXED popfq - jmp sysenter_flags_fixed + jmp .Lsysenter_flags_fixed ENDPROC(entry_SYSENTER_compat) /* -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[tip:x86/mm] x86/mm/ptdump: Make (debugfs)/ kernel_page_tables read-only
Commit-ID: 071ac0c4e8e90d5de05f0779b03ae69ce84820d5
Gitweb: http://git.kernel.org/tip/071ac0c4e8e90d5de05f0779b03ae69ce84820d5
Author: Borislav Petkov
AuthorDate: Mon, 30 Nov 2015 13:12:59 +0100
Committer: Ingo Molnar
CommitDate: Fri, 4 Dec 2015 12:55:01 +0100
x86/mm/ptdump: Make (debugfs)/kernel_page_tables read-only
File should be created with S_IRUSR and not with S_IWUSR too
because writing to it doesn't make any sense. I mean, we don't
have a ->write method anyway but let's have the permissions
correct too.
Signed-off-by: Borislav Petkov
Cc: Andrew Morton
Cc: Andy Lutomirski
Cc: Arjan van de Ven
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Kees Cook
Cc: Linus Torvalds
Cc: Paul E. McKenney
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1448885579-32506-1-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/mm/debug_pagetables.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/mm/debug_pagetables.c b/arch/x86/mm/debug_pagetables.c
index b35ee86..bfcffdf 100644
--- a/arch/x86/mm/debug_pagetables.c
+++ b/arch/x86/mm/debug_pagetables.c
@@ -26,7 +26,7 @@ static struct dentry *pe;
static int __init pt_dump_debug_init(void)
{
- pe = debugfs_create_file("kernel_page_tables", 0600, NULL, NULL,
+ pe = debugfs_create_file("kernel_page_tables", S_IRUSR, NULL, NULL,
&ptdump_fops);
if (!pe)
return -ENOMEM;
--
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[tip:ras/core] x86/mce: Add the missing memory error check on AMD
Commit-ID: db548a28fcee0f38cf4c7c726becf24c8afacf02
Gitweb: http://git.kernel.org/tip/db548a28fcee0f38cf4c7c726becf24c8afacf02
Author: Borislav Petkov
AuthorDate: Tue, 24 Nov 2015 08:41:19 +0100
Committer: Ingo Molnar
CommitDate: Tue, 24 Nov 2015 09:12:35 +0100
x86/mce: Add the missing memory error check on AMD
We simply need to look at the extended error code when detecting
whether the error is of type memory.
Signed-off-by: Borislav Petkov
Acked-by: Tony Luck
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1448350880-5573-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/mcheck/mce.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index fb8b1db..e00e85a 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -522,10 +522,10 @@ static bool memory_error(struct mce *m)
struct cpuinfo_x86 *c = &boot_cpu_data;
if (c->x86_vendor == X86_VENDOR_AMD) {
- /*
-* coming soon
-*/
- return false;
+ /* ErrCodeExt[20:16] */
+ u8 xec = (m->status >> 16) & 0x1f;
+
+ return (xec == 0x0 || xec == 0x8);
} else if (c->x86_vendor == X86_VENDOR_INTEL) {
/*
* Intel SDM Volume 3B - 15.9.2 Compound Error Codes
--
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[tip:x86/fpu] x86/fpu: Get rid of xstate_fault()
Commit-ID: b7106fa0f29f9fd83d2d1905ab690d334ef855c1
Gitweb: http://git.kernel.org/tip/b7106fa0f29f9fd83d2d1905ab690d334ef855c1
Author: Borislav Petkov
AuthorDate: Thu, 19 Nov 2015 12:25:26 +0100
Committer: Ingo Molnar
CommitDate: Tue, 24 Nov 2015 09:52:52 +0100
x86/fpu: Get rid of xstate_fault()
Add macros for the alternative XSAVE*/XRSTOR* operations which
contain the fault handling and use them. Kill xstate_fault().
Also, copy_xregs_to_kernel() didn't have the extended state as
memory reference in the asm.
Signed-off-by: Borislav Petkov
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Dave Hansen
Cc: Denys Vlasenko
Cc: Fenghua Yu
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Oleg Nesterov
Cc: Peter Zijlstra
Cc: Quentin Casasnovas
Cc: Rik van Riel
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1447932326-4371-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/fpu/internal.h | 105 ++--
1 file changed, 52 insertions(+), 53 deletions(-)
diff --git a/arch/x86/include/asm/fpu/internal.h
b/arch/x86/include/asm/fpu/internal.h
index 709a3df..eadcdd5 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -224,19 +224,6 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
#define XRSTOR ".byte " REX_PREFIX "0x0f,0xae,0x2f"
#define XRSTORS".byte " REX_PREFIX "0x0f,0xc7,0x1f"
-/* xstate instruction fault handler: */
-#define xstate_fault(__err)\
- \
- ".section .fixup,\"ax\"\n" \
- \
- "3: movl $-2,%[_err]\n"\
- "jmp 2b\n" \
- \
- ".previous\n" \
- \
- _ASM_EXTABLE(1b, 3b)\
- : [_err] "=r" (__err)
-
#define XSTATE_OP(op, st, lmask, hmask, err) \
asm volatile("1:" op "\n\t" \
"xor %[err], %[err]\n" \
@@ -250,6 +237,54 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
: "D" (st), "m" (*st), "a" (lmask), "d" (hmask)\
: "memory")
+/*
+ * If XSAVES is enabled, it replaces XSAVEOPT because it supports a compact
+ * format and supervisor states in addition to modified optimization in
+ * XSAVEOPT.
+ *
+ * Otherwise, if XSAVEOPT is enabled, XSAVEOPT replaces XSAVE because XSAVEOPT
+ * supports modified optimization which is not supported by XSAVE.
+ *
+ * We use XSAVE as a fallback.
+ *
+ * The 661 label is defined in the ALTERNATIVE* macros as the address of the
+ * original instruction which gets replaced. We need to use it here as the
+ * address of the instruction where we might get an exception at.
+ */
+#define XSTATE_XSAVE(st, lmask, hmask, err)\
+ asm volatile(ALTERNATIVE_2(XSAVE, \
+ XSAVEOPT, X86_FEATURE_XSAVEOPT, \
+ XSAVES, X86_FEATURE_XSAVES)\
+"\n" \
+"xor %[err], %[err]\n" \
+"3:\n" \
+".pushsection .fixup,\"ax\"\n" \
+"4: movl $-2, %[err]\n"\
+"jmp 3b\n" \
+".popsection\n"\
+_ASM_EXTABLE(661b, 4b) \
+: [err] "=r" (err) \
+: "D" (st), "m" (*st), "a" (lmask), "d" (hmask)\
+: "memory")
+
+/*
+ * Use XRSTORS to restore context if it is enabled. XRSTORS supports compact
+ * XSAVE area format.
+ */
+#define XSTATE_XRESTORE(st, lmask, hmask, err) \
+ asm volatile(ALTERNATIVE(XRSTOR,\
+XRSTORS, X86_FEATURE_XSAVES) \
+"\n" \
+"xor %[err], %[err]\n" \
+"3:\n" \
+".pushsection .fixup,\"ax\"\n" \
+"4: movl $-2, %[err]\n"\
+"jmp 3b\n" \
+".popsection\n"\
+_ASM_EXTABLE(661b, 4b) \
+: [err] "=r" (err)
[tip:x86/fpu] x86/fpu: Add an XSTATE_OP() macro
Commit-ID: b74a0cf1b3db30173eefa00c411775d2b1697700
Gitweb: http://git.kernel.org/tip/b74a0cf1b3db30173eefa00c411775d2b1697700
Author: Borislav Petkov
AuthorDate: Thu, 19 Nov 2015 12:25:25 +0100
Committer: Ingo Molnar
CommitDate: Tue, 24 Nov 2015 09:52:52 +0100
x86/fpu: Add an XSTATE_OP() macro
Add an XSTATE_OP() macro which contains the XSAVE* fault handling
and replace all non-alternatives users of xstate_fault() with
it.
This fixes also the buglet in copy_xregs_to_user() and
copy_user_to_xregs() where the inline asm didn't have @xstate as
memory reference and thus potentially causing unwanted
reordering of accesses to the extended state.
Signed-off-by: Borislav Petkov
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Dave Hansen
Cc: Denys Vlasenko
Cc: Fenghua Yu
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Oleg Nesterov
Cc: Peter Zijlstra
Cc: Quentin Casasnovas
Cc: Rik van Riel
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1447932326-4371-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/fpu/internal.h | 68 +
1 file changed, 31 insertions(+), 37 deletions(-)
diff --git a/arch/x86/include/asm/fpu/internal.h
b/arch/x86/include/asm/fpu/internal.h
index 3c3550c..709a3df 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -237,6 +237,20 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
_ASM_EXTABLE(1b, 3b)\
: [_err] "=r" (__err)
+#define XSTATE_OP(op, st, lmask, hmask, err) \
+ asm volatile("1:" op "\n\t" \
+"xor %[err], %[err]\n" \
+"2:\n\t" \
+".pushsection .fixup,\"ax\"\n\t" \
+"3: movl $-2,%[err]\n\t" \
+"jmp 2b\n\t" \
+".popsection\n\t" \
+_ASM_EXTABLE(1b, 3b) \
+: [err] "=r" (err) \
+: "D" (st), "m" (*st), "a" (lmask), "d" (hmask)\
+: "memory")
+
+
/*
* This function is called only during boot time when x86 caps are not set
* up and alternative can not be used yet.
@@ -246,22 +260,14 @@ static inline void copy_xregs_to_kernel_booting(struct
xregs_state *xstate)
u64 mask = -1;
u32 lmask = mask;
u32 hmask = mask >> 32;
- int err = 0;
+ int err;
WARN_ON(system_state != SYSTEM_BOOTING);
- if (boot_cpu_has(X86_FEATURE_XSAVES))
- asm volatile("1:"XSAVES"\n\t"
- "2:\n\t"
-xstate_fault(err)
- : "D" (xstate), "m" (*xstate), "a" (lmask), "d"
(hmask), "0" (err)
- : "memory");
+ if (static_cpu_has_safe(X86_FEATURE_XSAVES))
+ XSTATE_OP(XSAVES, xstate, lmask, hmask, err);
else
- asm volatile("1:"XSAVE"\n\t"
- "2:\n\t"
-xstate_fault(err)
- : "D" (xstate), "m" (*xstate), "a" (lmask), "d"
(hmask), "0" (err)
- : "memory");
+ XSTATE_OP(XSAVE, xstate, lmask, hmask, err);
/* We should never fault when copying to a kernel buffer: */
WARN_ON_FPU(err);
@@ -276,22 +282,14 @@ static inline void copy_kernel_to_xregs_booting(struct
xregs_state *xstate)
u64 mask = -1;
u32 lmask = mask;
u32 hmask = mask >> 32;
- int err = 0;
+ int err;
WARN_ON(system_state != SYSTEM_BOOTING);
- if (boot_cpu_has(X86_FEATURE_XSAVES))
- asm volatile("1:"XRSTORS"\n\t"
- "2:\n\t"
-xstate_fault(err)
- : "D" (xstate), "m" (*xstate), "a" (lmask), "d"
(hmask), "0" (err)
- : "memory");
+ if (static_cpu_has_safe(X86_FEATURE_XSAVES))
+ XSTATE_OP(XRSTORS, xstate, lmask, hmask, err);
else
- asm volatile("1:"XRSTOR"\n\t"
- "2:\n\t"
-xstate_fault(err)
- : "D" (xstate), "m" (*xstate), "a" (lmask), "d"
(hmask), "0" (err)
- : "memory");
+ XSTATE_OP(XRSTOR, xstate, lmask, hmask, err);
/* We should never fault when copying from a kernel buffer: */
WARN_ON_FPU(err);
@@ -388,12 +386,10 @@ static inline int copy_xregs_to_user(struct xregs_state
__user *buf)
if (unlikely(err))
return -EFAULT;
- __asm__ __volatile__(ASM_STAC "\n"
-"1:"XSAVE"\n"
-
[tip:x86/cpu] x86/cpu: Fix MSR value truncation issue
Commit-ID: 31ac34ca5636e596485c6e03df1879643bde585e Gitweb: http://git.kernel.org/tip/31ac34ca5636e596485c6e03df1879643bde585e Author: Borislav Petkov AuthorDate: Mon, 23 Nov 2015 11:12:25 +0100 Committer: Ingo Molnar CommitDate: Tue, 24 Nov 2015 09:15:55 +0100 x86/cpu: Fix MSR value truncation issue So sparse rightfully complains that the u64 MSR value we're writing into the STAR MSR, i.e. 0xc081, is being truncated: ./arch/x86/include/asm/msr.h:193:36: warning: cast truncates bits from constant value (230010 becomes 0) because the actual value doesn't fit into the unsigned 32-bit quantity which are the @low and @high wrmsrl() parameters. This is not a problem, practically, because gcc is actually being smart enough here and does the right thing: .loc 3 87 0 xorl%esi, %esi# we needz a 32-bit zero movl$2293776, %edx# 0x00230010 == (__USER32_CS << 16) | __KERNEL_CS go into the high bits movl$-1073741695, %ecx# MSR_STAR, i.e., 0xc081 movl%esi, %eax# low order 32 bits in the MSR which are 0 #APP # 87 "./arch/x86/include/asm/msr.h" 1 wrmsr More specifically, MSR_STAR[31:0] is being set to 0. That field is reserved on Intel and on AMD it is 32-bit SYSCALL Target EIP. I'd strongly guess because Intel doesn't have SYSCALL in compat/legacy mode and we're using SYSENTER and INT80 there. And for compat syscalls in long mode we use CSTAR. So let's fix the sparse warning by writing SYSRET and SYSCALL CS and SS into the high 32-bit half of STAR and 0 in the low half explicitly. [ Actually, if we had to be precise, we would have to read what's in STAR[31:0] and write it back unchanged on Intel and write 0 on AMD. I guess the current writing to 0 is still ok since Intel can apparently stomach it. ] The resulting code is identical to what we have above: .loc 3 87 0 xorl%esi, %esi # tmp104 movl$2293776, %eax #, tmp103 movl$-1073741695, %ecx #, tmp102 movl%esi, %edx # tmp104, tmp104 ... wrmsr Signed-off-by: Borislav Petkov Cc: Andy Lutomirski Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Brian Gerst Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1448273546-2567-6-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 0bed416..105da8d 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1180,7 +1180,7 @@ void syscall_init(void) * They both write to the same internal register. STAR allows to * set CS/DS but only a 32bit target. LSTAR sets the 64bit rip. */ - wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32); + wrmsr(MSR_STAR, 0, (__USER32_CS << 16) | __KERNEL_CS); wrmsrl(MSR_LSTAR, (unsigned long)entry_SYSCALL_64); #ifdef CONFIG_IA32_EMULATION -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[tip:x86/cpu] x86/MSR: Chop off lower 32-bit value
Commit-ID: 679bcea857d72868e3431dde3a0e158bf0ed9119
Gitweb: http://git.kernel.org/tip/679bcea857d72868e3431dde3a0e158bf0ed9119
Author: Borislav Petkov
AuthorDate: Mon, 23 Nov 2015 11:12:26 +0100
Committer: Ingo Molnar
CommitDate: Tue, 24 Nov 2015 09:15:55 +0100
x86/MSR: Chop off lower 32-bit value
sparse complains that the cast truncates the high bits. But here
we really do know what we're doing and we need the lower 32 bits
only as the @low argument. So make that explicit.
Suggested-by: Andy Lutomirski
Signed-off-by: Borislav Petkov
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1448273546-2567-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/msr.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 77d8b28..8613382 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -190,7 +190,7 @@ static inline void wrmsr(unsigned msr, unsigned low,
unsigned high)
static inline void wrmsrl(unsigned msr, u64 val)
{
- native_write_msr(msr, (u32)val, (u32)(val >> 32));
+ native_write_msr(msr, (u32)(val & 0xULL), (u32)(val >> 32));
}
/* wrmsr with exception handling */
--
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[tip:x86/cpu] x86/cpu/amd, kvm: Satisfy guest kernel reads of IC_CFG MSR
Commit-ID: ae8b787543d872cf89a7f9ef8aa302f3ef9bcbd7
Gitweb: http://git.kernel.org/tip/ae8b787543d872cf89a7f9ef8aa302f3ef9bcbd7
Author: Borislav Petkov
AuthorDate: Mon, 23 Nov 2015 11:12:23 +0100
Committer: Ingo Molnar
CommitDate: Tue, 24 Nov 2015 09:15:54 +0100
x86/cpu/amd, kvm: Satisfy guest kernel reads of IC_CFG MSR
The kernel accesses IC_CFG MSR (0xc0011021) on AMD because it
checks whether the way access filter is enabled on some F15h
models, and, if so, disables it.
kvm doesn't handle that MSR access and complains about it, which
can get really noisy in dmesg when one starts kvm guests all the
time for testing. And it is useless anyway - guest kernel
shouldn't be doing such changes anyway so tell it that that
filter is disabled.
Signed-off-by: Borislav Petkov
Reviewed-by: Paolo Bonzini
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1448273546-2567-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/kernel/cpu/amd.c| 4 ++--
arch/x86/kvm/svm.c | 17 +
3 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 690b402..b05402e 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -321,6 +321,7 @@
#define MSR_F15H_PERF_CTR 0xc0010201
#define MSR_F15H_NB_PERF_CTL 0xc0010240
#define MSR_F15H_NB_PERF_CTR 0xc0010241
+#define MSR_F15H_IC_CFG0xc0011021
/* Fam 10h MSRs */
#define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index a8816b3..e229640 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -678,9 +678,9 @@ static void init_amd_bd(struct cpuinfo_x86 *c)
* Disable it on the affected CPUs.
*/
if ((c->x86_model >= 0x02) && (c->x86_model < 0x20)) {
- if (!rdmsrl_safe(0xc0011021, &value) && !(value & 0x1E)) {
+ if (!rdmsrl_safe(MSR_F15H_IC_CFG, &value) && !(value & 0x1E)) {
value |= 0x1E;
- wrmsrl_safe(0xc0011021, value);
+ wrmsrl_safe(MSR_F15H_IC_CFG, value);
}
}
}
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 83a1c64..58b64c1 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3053,6 +3053,23 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
case MSR_IA32_UCODE_REV:
msr_info->data = 0x0165;
break;
+ case MSR_F15H_IC_CFG: {
+
+ int family, model;
+
+ family = guest_cpuid_family(vcpu);
+ model = guest_cpuid_model(vcpu);
+
+ if (family < 0 || model < 0)
+ return kvm_get_msr_common(vcpu, msr_info);
+
+ msr_info->data = 0;
+
+ if (family == 0x15 &&
+ (model >= 0x2 && model < 0x20))
+ msr_info->data = 0x1E;
+ }
+ break;
default:
return kvm_get_msr_common(vcpu, msr_info);
}
--
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[tip:x86/cpu] x86/cpu: Unify CPU family, model, stepping calculation
Commit-ID: 99f925ce927e4ac313d9af8bd1bf55796e2cdcb1
Gitweb: http://git.kernel.org/tip/99f925ce927e4ac313d9af8bd1bf55796e2cdcb1
Author: Borislav Petkov
AuthorDate: Mon, 23 Nov 2015 11:12:21 +0100
Committer: Ingo Molnar
CommitDate: Tue, 24 Nov 2015 09:15:54 +0100
x86/cpu: Unify CPU family, model, stepping calculation
Add generic functions which calc family, model and stepping from
the CPUID_1.EAX leaf and stick them into the library we have.
Rename those which do call CPUID with the prefix "x86_cpuid" as
suggested by Paolo Bonzini.
No functionality change.
Signed-off-by: Borislav Petkov
Reviewed-by: Paolo Bonzini
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1448273546-2567-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/cpu.h| 3 +++
arch/x86/include/asm/microcode.h | 39 +++
arch/x86/kernel/cpu/common.c | 11 +++---
arch/x86/kernel/cpu/microcode/core.c | 12 +--
arch/x86/kernel/cpu/microcode/intel.c | 16 ++
arch/x86/lib/Makefile | 2 +-
arch/x86/lib/cpu.c| 35 +++
7 files changed, 61 insertions(+), 57 deletions(-)
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index bf2caa1..678637a 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -36,4 +36,7 @@ extern int _debug_hotplug_cpu(int cpu, int action);
int mwait_usable(const struct cpuinfo_x86 *);
+unsigned int x86_family(unsigned int sig);
+unsigned int x86_model(unsigned int sig);
+unsigned int x86_stepping(unsigned int sig);
#endif /* _ASM_X86_CPU_H */
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 34e62b1..1e1b07a 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -1,6 +1,7 @@
#ifndef _ASM_X86_MICROCODE_H
#define _ASM_X86_MICROCODE_H
+#include
#include
#define native_rdmsr(msr, val1, val2) \
@@ -95,14 +96,14 @@ static inline void __exit exit_amd_microcode(void) {}
/*
* In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
- * x86_vendor() gets vendor id for BSP.
+ * x86_cpuid_vendor() gets vendor id for BSP.
*
* In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
- * coding, we still use x86_vendor() to get vendor id for AP.
+ * coding, we still use x86_cpuid_vendor() to get vendor id for AP.
*
- * x86_vendor() gets vendor information directly from CPUID.
+ * x86_cpuid_vendor() gets vendor information directly from CPUID.
*/
-static inline int x86_vendor(void)
+static inline int x86_cpuid_vendor(void)
{
u32 eax = 0x;
u32 ebx, ecx = 0, edx;
@@ -118,40 +119,14 @@ static inline int x86_vendor(void)
return X86_VENDOR_UNKNOWN;
}
-static inline unsigned int __x86_family(unsigned int sig)
-{
- unsigned int x86;
-
- x86 = (sig >> 8) & 0xf;
-
- if (x86 == 0xf)
- x86 += (sig >> 20) & 0xff;
-
- return x86;
-}
-
-static inline unsigned int x86_family(void)
+static inline unsigned int x86_cpuid_family(void)
{
u32 eax = 0x0001;
u32 ebx, ecx = 0, edx;
native_cpuid(&eax, &ebx, &ecx, &edx);
- return __x86_family(eax);
-}
-
-static inline unsigned int x86_model(unsigned int sig)
-{
- unsigned int x86, model;
-
- x86 = __x86_family(sig);
-
- model = (sig >> 4) & 0xf;
-
- if (x86 == 0x6 || x86 == 0xf)
- model += ((sig >> 16) & 0xf) << 4;
-
- return model;
+ return x86_family(eax);
}
#ifdef CONFIG_MICROCODE
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c2b7522..0bed416 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -581,14 +581,9 @@ void cpu_detect(struct cpuinfo_x86 *c)
u32 junk, tfms, cap0, misc;
cpuid(0x0001, &tfms, &misc, &junk, &cap0);
- c->x86 = (tfms >> 8) & 0xf;
- c->x86_model = (tfms >> 4) & 0xf;
- c->x86_mask = tfms & 0xf;
-
- if (c->x86 == 0xf)
- c->x86 += (tfms >> 20) & 0xff;
- if (c->x86 >= 0x6)
- c->x86_model += ((tfms >> 16) & 0xf) << 4;
+ c->x86 = x86_family(tfms);
+ c->x86_model= x86_model(tfms);
+ c->x86_mask = x86_stepping(tfms);
if (cap0 & (1<<19)) {
c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
diff --git a/arch/x86/kernel/cpu/microcode/core.c
b/arch/x86/kernel/cpu/microcode/core.c
index 7fc27f1..3aaffb6 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -129,8 +129,8 @@ void _
[tip:x86/cpu] kvm: Add accessors for guest CPU's family, model, stepping
Commit-ID: 91713faf386be6d7e6556b656436813f8c4ee552
Gitweb: http://git.kernel.org/tip/91713faf386be6d7e6556b656436813f8c4ee552
Author: Borislav Petkov
AuthorDate: Mon, 23 Nov 2015 11:12:22 +0100
Committer: Ingo Molnar
CommitDate: Tue, 24 Nov 2015 09:15:54 +0100
kvm: Add accessors for guest CPU's family, model, stepping
Those give the family, model and stepping of the guest vcpu.
Signed-off-by: Borislav Petkov
Reviewed-by: Paolo Bonzini
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1448273546-2567-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kvm/cpuid.h | 34 ++
1 file changed, 34 insertions(+)
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index 06332cb..5d47e0d 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -2,6 +2,7 @@
#define ARCH_X86_KVM_CPUID_H
#include "x86.h"
+#include
int kvm_update_cpuid(struct kvm_vcpu *vcpu);
struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
@@ -170,4 +171,37 @@ static inline bool guest_cpuid_has_nrips(struct kvm_vcpu
*vcpu)
}
#undef BIT_NRIPS
+static inline int guest_cpuid_family(struct kvm_vcpu *vcpu)
+{
+ struct kvm_cpuid_entry2 *best;
+
+ best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
+ if (!best)
+ return -1;
+
+ return x86_family(best->eax);
+}
+
+static inline int guest_cpuid_model(struct kvm_vcpu *vcpu)
+{
+ struct kvm_cpuid_entry2 *best;
+
+ best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
+ if (!best)
+ return -1;
+
+ return x86_model(best->eax);
+}
+
+static inline int guest_cpuid_stepping(struct kvm_vcpu *vcpu)
+{
+ struct kvm_cpuid_entry2 *best;
+
+ best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
+ if (!best)
+ return -1;
+
+ return x86_stepping(best->eax);
+}
+
#endif
--
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[tip:ras/core] x86/mce: Make usable address checks Intel-only
Commit-ID: feab21f8356bde572663e29c9d9e48c964292e05
Gitweb: http://git.kernel.org/tip/feab21f8356bde572663e29c9d9e48c964292e05
Author: Borislav Petkov
AuthorDate: Tue, 24 Nov 2015 08:41:20 +0100
Committer: Ingo Molnar
CommitDate: Tue, 24 Nov 2015 09:12:35 +0100
x86/mce: Make usable address checks Intel-only
The MCi_MISC bitfield definitions mce_usable_address() checks
are Intel-only. Make them so.
While at it, move mce_usable_address() up, before all its
callers and get rid of the forward declaration.
Signed-off-by: Borislav Petkov
Acked-by: Tony Luck
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1448350880-5573-5-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/mcheck/mce.c | 40 ++--
1 file changed, 22 insertions(+), 18 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index e00e85a..3865e95 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -114,7 +114,6 @@ static struct work_struct mce_work;
static struct irq_work mce_irq_work;
static void (*quirk_no_way_out)(int bank, struct mce *m, struct pt_regs *regs);
-static int mce_usable_address(struct mce *m);
/*
* CPU/chipset specific EDAC code can register a notifier call here to print
@@ -475,6 +474,28 @@ static void mce_report_event(struct pt_regs *regs)
irq_work_queue(&mce_irq_work);
}
+/*
+ * Check if the address reported by the CPU is in a format we can parse.
+ * It would be possible to add code for most other cases, but all would
+ * be somewhat complicated (e.g. segment offset would require an instruction
+ * parser). So only support physical addresses up to page granuality for now.
+ */
+static int mce_usable_address(struct mce *m)
+{
+ if (!(m->status & MCI_STATUS_MISCV) || !(m->status & MCI_STATUS_ADDRV))
+ return 0;
+
+ /* Checks after this one are Intel-specific: */
+ if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
+ return 1;
+
+ if (MCI_MISC_ADDR_LSB(m->misc) > PAGE_SHIFT)
+ return 0;
+ if (MCI_MISC_ADDR_MODE(m->misc) != MCI_MISC_ADDR_PHYS)
+ return 0;
+ return 1;
+}
+
static int srao_decode_notifier(struct notifier_block *nb, unsigned long val,
void *data)
{
@@ -930,23 +951,6 @@ reset:
return ret;
}
-/*
- * Check if the address reported by the CPU is in a format we can parse.
- * It would be possible to add code for most other cases, but all would
- * be somewhat complicated (e.g. segment offset would require an instruction
- * parser). So only support physical addresses up to page granuality for now.
- */
-static int mce_usable_address(struct mce *m)
-{
- if (!(m->status & MCI_STATUS_MISCV) || !(m->status & MCI_STATUS_ADDRV))
- return 0;
- if (MCI_MISC_ADDR_LSB(m->misc) > PAGE_SHIFT)
- return 0;
- if (MCI_MISC_ADDR_MODE(m->misc) != MCI_MISC_ADDR_PHYS)
- return 0;
- return 1;
-}
-
static void mce_clear_state(unsigned long *toclear)
{
int i;
--
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[tip:ras/core] x86/RAS: Remove mce.usable_addr
Commit-ID: c0ec382e1928402031e754ad0391ecbdabb18c43
Gitweb: http://git.kernel.org/tip/c0ec382e1928402031e754ad0391ecbdabb18c43
Author: Borislav Petkov
AuthorDate: Tue, 24 Nov 2015 08:41:18 +0100
Committer: Ingo Molnar
CommitDate: Tue, 24 Nov 2015 09:12:35 +0100
x86/RAS: Remove mce.usable_addr
It is useless and we can use the function instead. Besides,
mcelog(8) hasn't managed to make use of it yet. So kill it.
Signed-off-by: Borislav Petkov
Acked-by: Tony Luck
Cc: Andy Lutomirski
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1448350880-5573-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/include/uapi/asm/mce.h | 2 +-
arch/x86/kernel/cpu/mcheck/mce.c | 12
2 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/arch/x86/include/uapi/asm/mce.h b/arch/x86/include/uapi/asm/mce.h
index 03429da..2184943 100644
--- a/arch/x86/include/uapi/asm/mce.h
+++ b/arch/x86/include/uapi/asm/mce.h
@@ -16,7 +16,7 @@ struct mce {
__u8 cpuvendor;/* cpu vendor as encoded in system.h */
__u8 inject_flags; /* software inject flags */
__u8 severity;
- __u8 usable_addr;
+ __u8 pad;
__u32 cpuid;/* CPUID 1 EAX */
__u8 cs; /* code segment */
__u8 bank; /* machine check bank */
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 6531cb4..fb8b1db 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -484,7 +484,7 @@ static int srao_decode_notifier(struct notifier_block *nb,
unsigned long val,
if (!mce)
return NOTIFY_DONE;
- if (mce->usable_addr && (mce->severity == MCE_AO_SEVERITY)) {
+ if (mce_usable_address(mce) && (mce->severity == MCE_AO_SEVERITY)) {
pfn = mce->addr >> PAGE_SHIFT;
memory_failure(pfn, MCE_VECTOR, 0);
}
@@ -610,12 +610,9 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t
*b)
severity = mce_severity(&m, mca_cfg.tolerant, NULL, false);
- if (severity == MCE_DEFERRED_SEVERITY && memory_error(&m)) {
- if (m.status & MCI_STATUS_ADDRV) {
+ if (severity == MCE_DEFERRED_SEVERITY && memory_error(&m))
+ if (m.status & MCI_STATUS_ADDRV)
m.severity = severity;
- m.usable_addr = mce_usable_address(&m);
- }
- }
/*
* Don't get the IP here because it's unlikely to
@@ -623,7 +620,7 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t
*b)
*/
if (!(flags & MCP_DONTLOG) && !mca_cfg.dont_log_ce)
mce_log(&m);
- else if (m.usable_addr) {
+ else if (mce_usable_address(&m)) {
/*
* Although we skipped logging this, we still want
* to take action. Add to the pool so the registered
@@ -1091,7 +1088,6 @@ void do_machine_check(struct pt_regs *regs, long
error_code)
/* assuming valid severity level != 0 */
m.severity = severity;
- m.usable_addr = mce_usable_address(&m);
mce_log(&m);
--
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[tip:x86/urgent] x86/microcode: Initialize the driver late when facilities are up
Commit-ID: 2d5be37d686c4dae8e60d20283d6f44ac2c44f65 Gitweb: http://git.kernel.org/tip/2d5be37d686c4dae8e60d20283d6f44ac2c44f65 Author: Borislav Petkov AuthorDate: Fri, 20 Nov 2015 12:24:00 +0100 Committer: Ingo Molnar CommitDate: Mon, 23 Nov 2015 10:39:49 +0100 x86/microcode: Initialize the driver late when facilities are up Running microcode_init() from setup_arch() is a bad idea because not even kmalloc() is ready at that point and the loader does all kinds of allocations and init/registration with various subsystems. Make it a late initcall when required facilities are initialized so that the microcode driver initialization can succeed too. Reported-and-tested-by: Markus Trippelsdorf Signed-off-by: Borislav Petkov Cc: Andrew Morton Cc: Linus Torvalds Cc: Paul E. McKenney Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/20151120112400.gc4...@pd.tnic Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/microcode/core.c | 1 + arch/x86/kernel/setup.c | 2 -- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c index 7fc27f1..b3e94ef 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -698,3 +698,4 @@ int __init microcode_init(void) return error; } +late_initcall(microcode_init); diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 29db25f..d2bbe34 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1250,8 +1250,6 @@ void __init setup_arch(char **cmdline_p) if (efi_enabled(EFI_BOOT)) efi_apply_memmap_quirks(); #endif - - microcode_init(); } #ifdef CONFIG_X86_32 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[tip:x86/cleanups] x86/paravirt: Kill some unused patching functions
Commit-ID: 79f1d836925c545b4612f7ed19423f0950978b5e
Gitweb: http://git.kernel.org/tip/79f1d836925c545b4612f7ed19423f0950978b5e
Author: Borislav Petkov
AuthorDate: Tue, 3 Nov 2015 10:18:49 +0100
Committer: Thomas Gleixner
CommitDate: Sat, 7 Nov 2015 18:09:35 +0100
x86/paravirt: Kill some unused patching functions
paravirt_patch_ignore() is completely unused and paravirt_patch_nop()
doesn't do a whole lot. Remove them both.
Signed-off-by: Borislav Petkov
Reviewed-by: Juergen Gross
Cc: Andrew Morton
Cc: Andy Lutomirski
Cc: Chris Wright
Cc: Jeremy Fitzhardinge
Cc: "Peter Zijlstra (Intel)"
Cc: Rusty Russell
Cc: virtualizat...@lists.linux-foundation.org
Cc: xen-de...@lists.xenproject.org
Link: http://lkml.kernel.org/r/1446542329-32037-1-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner
---
arch/x86/include/asm/paravirt_types.h | 2 --
arch/x86/kernel/paravirt.c| 13 +
2 files changed, 1 insertion(+), 14 deletions(-)
diff --git a/arch/x86/include/asm/paravirt_types.h
b/arch/x86/include/asm/paravirt_types.h
index 31247b5..e1f31df 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -402,10 +402,8 @@ extern struct pv_lock_ops pv_lock_ops;
__visible extern const char start_##ops##_##name[],
end_##ops##_##name[]; \
asm(NATIVE_LABEL("start_", ops, name) code NATIVE_LABEL("end_", ops,
name))
-unsigned paravirt_patch_nop(void);
unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
-unsigned paravirt_patch_ignore(unsigned len);
unsigned paravirt_patch_call(void *insnbuf,
const void *target, u16 tgt_clobbers,
unsigned long addr, u16 site_clobbers,
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index c2130ae..4f32a10 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -74,16 +74,6 @@ void __init default_banner(void)
/* Undefined instruction for dealing with missing ops pointers. */
static const unsigned char ud2a[] = { 0x0f, 0x0b };
-unsigned paravirt_patch_nop(void)
-{
- return 0;
-}
-
-unsigned paravirt_patch_ignore(unsigned len)
-{
- return len;
-}
-
struct branch {
unsigned char opcode;
u32 delta;
@@ -152,8 +142,7 @@ unsigned paravirt_patch_default(u8 type, u16 clobbers, void
*insnbuf,
/* If there's no function, patch it with a ud2a (BUG) */
ret = paravirt_patch_insns(insnbuf, len, ud2a,
ud2a+sizeof(ud2a));
else if (opfunc == _paravirt_nop)
- /* If the operation is a nop, then nop the callsite */
- ret = paravirt_patch_nop();
+ ret = 0;
/* identity functions just return their single argument */
else if (opfunc == _paravirt_ident_32)
--
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[tip:x86/urgent] x86/cpu: Call verify_cpu() after having entered long mode too
Commit-ID: 04633df0c43d710e5f696b06539c100898678235 Gitweb: http://git.kernel.org/tip/04633df0c43d710e5f696b06539c100898678235 Author: Borislav Petkov AuthorDate: Thu, 5 Nov 2015 16:57:56 +0100 Committer: Thomas Gleixner CommitDate: Sat, 7 Nov 2015 10:45:02 +0100 x86/cpu: Call verify_cpu() after having entered long mode too When we get loaded by a 64-bit bootloader, kernel entry point is startup_64 in head_64.S. We don't trust any and all bootloaders because some will fiddle with CPU configuration so we go ahead and massage each CPU into sanity again. For example, some dell BIOSes have this XD disable feature which set IA32_MISC_ENABLE[34] and disable NX. This might be some dumb workaround for other OSes but Linux sure doesn't need it. A similar thing is present in the Surface 3 firmware - see https://bugzilla.kernel.org/show_bug.cgi?id=106051 - which sets this bit only on the BSP: # rdmsr -a 0x1a0 400850089 850089 850089 850089 I know, right?! There's not even an off switch in there. So fix all those cases by sanitizing the 64-bit entry point too. For that, make verify_cpu() callable in 64-bit mode also. Requested-and-debugged-by: "H. Peter Anvin" Reported-and-tested-by: Bastien Nocera Signed-off-by: Borislav Petkov Cc: Matt Fleming Cc: Peter Zijlstra Cc: sta...@vger.kernel.org Link: http://lkml.kernel.org/r/1446739076-21303-1-git-send-email...@alien8.de Signed-off-by: Thomas Gleixner --- arch/x86/kernel/head_64.S| 8 arch/x86/kernel/verify_cpu.S | 12 +++- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index 1d40ca8..ffdc0e8 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -65,6 +65,9 @@ startup_64: * tables and then reload them. */ + /* Sanitize CPU configuration */ + call verify_cpu + /* * Compute the delta between the address I am compiled to run at and the * address I am actually running at. @@ -174,6 +177,9 @@ ENTRY(secondary_startup_64) * after the boot processor executes this code. */ + /* Sanitize CPU configuration */ + call verify_cpu + movq$(init_level4_pgt - __START_KERNEL_map), %rax 1: @@ -288,6 +294,8 @@ ENTRY(secondary_startup_64) pushq %rax# target address in negative space lretq +#include "verify_cpu.S" + #ifdef CONFIG_HOTPLUG_CPU /* * Boot CPU0 entry point. It's called from play_dead(). Everything has been set diff --git a/arch/x86/kernel/verify_cpu.S b/arch/x86/kernel/verify_cpu.S index b9242ba..4cf401f 100644 --- a/arch/x86/kernel/verify_cpu.S +++ b/arch/x86/kernel/verify_cpu.S @@ -34,10 +34,11 @@ #include verify_cpu: - pushfl # Save caller passed flags - pushl $0 # Kill any dangerous flags - popfl + pushf # Save caller passed flags + push$0 # Kill any dangerous flags + popf +#ifndef __x86_64__ pushfl # standard way to check for cpuid popl%eax movl%eax,%ebx @@ -48,6 +49,7 @@ verify_cpu: popl%eax cmpl%eax,%ebx jz verify_cpu_no_longmode # cpu has no cpuid +#endif movl$0x0,%eax # See if cpuid 1 is implemented cpuid @@ -130,10 +132,10 @@ verify_cpu_sse_test: jmp verify_cpu_sse_test # try again verify_cpu_no_longmode: - popfl # Restore caller passed flags + popf# Restore caller passed flags movl $1,%eax ret verify_cpu_sse_ok: - popfl # Restore caller passed flags + popf# Restore caller passed flags xorl %eax, %eax ret -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[tip:ras/core] x86/mce: Add a default case to the switch in __mcheck_cpu_ancient_init()
Commit-ID: dc34bdd2367fd31744ee3ba1de1b1cc0fa2ce193 Gitweb: http://git.kernel.org/tip/dc34bdd2367fd31744ee3ba1de1b1cc0fa2ce193 Author: Borislav Petkov AuthorDate: Fri, 30 Oct 2015 13:11:38 +0100 Committer: Ingo Molnar CommitDate: Sun, 1 Nov 2015 11:26:14 +0100 x86/mce: Add a default case to the switch in __mcheck_cpu_ancient_init() Caught by building with W= which enable -Wswitch-default also. Signed-off-by: Borislav Petkov Cc: Borislav Petkov Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Cc: Tony Luck Link: http://lkml.kernel.org/r/1446207099-24948-3-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/mcheck/mce.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 3d631c4..c5b0d56 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -1586,6 +1586,8 @@ static int __mcheck_cpu_ancient_init(struct cpuinfo_x86 *c) winchip_mcheck_init(c); return 1; break; + default: + return 0; } return 0; -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[tip:ras/core] MAINTAINERS: Unify the microcode driver section
Commit-ID: 79ebdc9536c132eb92b4bcce26daaed7f4bf359e Gitweb: http://git.kernel.org/tip/79ebdc9536c132eb92b4bcce26daaed7f4bf359e Author: Borislav Petkov AuthorDate: Tue, 20 Oct 2015 11:54:49 +0200 Committer: Ingo Molnar CommitDate: Wed, 21 Oct 2015 11:22:13 +0200 MAINTAINERS: Unify the microcode driver section Merge the AMD and Intel sections and generalize the file patterns. Signed-off-by: Borislav Petkov Cc: Andy Lutomirski Cc: Arjan van de Ven Cc: Borislav Petkov Cc: Brian Gerst Cc: Dave Jones Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Len Brown Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Rafael J. Wysocki Cc: Thomas Gleixner Cc: Tony Luck Link: http://lkml.kernel.org/r/1445334889-300-7-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- MAINTAINERS | 16 +--- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 5f46784..3a39ef4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -654,11 +654,6 @@ F: drivers/gpu/drm/radeon/radeon_kfd.c F: drivers/gpu/drm/radeon/radeon_kfd.h F: include/uapi/linux/kfd_ioctl.h -AMD MICROCODE UPDATE SUPPORT -M: Borislav Petkov -S: Maintained -F: arch/x86/kernel/cpu/microcode/amd* - AMD XGBE DRIVER M: Tom Lendacky L: net...@vger.kernel.org @@ -5430,12 +5425,6 @@ W: https://01.org/linux-acpi S: Supported F: drivers/platform/x86/intel_menlow.c -INTEL IA32 MICROCODE UPDATE SUPPORT -M: Borislav Petkov -S: Maintained -F: arch/x86/kernel/cpu/microcode/core* -F: arch/x86/kernel/cpu/microcode/intel* - INTEL I/OAT DMA DRIVER M: Dave Jiang R: Dan Williams @@ -11451,6 +11440,11 @@ L: linux-e...@vger.kernel.org S: Maintained F: arch/x86/kernel/cpu/mcheck/* +X86 MICROCODE UPDATE SUPPORT +M: Borislav Petkov +S: Maintained +F: arch/x86/kernel/cpu/microcode/* + X86 VDSO M: Andy Lutomirski L: linux-kernel@vger.kernel.org -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[tip:ras/core] x86/microcode/intel: Move #ifdef DEBUG inside the function
Commit-ID: c595ac2bac930ce79f336c7a7e45e1ea38abfe16
Gitweb: http://git.kernel.org/tip/c595ac2bac930ce79f336c7a7e45e1ea38abfe16
Author: Borislav Petkov
AuthorDate: Tue, 20 Oct 2015 11:54:48 +0200
Committer: Ingo Molnar
CommitDate: Wed, 21 Oct 2015 11:22:12 +0200
x86/microcode/intel: Move #ifdef DEBUG inside the function
... and save us the stub.
Signed-off-by: Borislav Petkov
Cc: Andy Lutomirski
Cc: Arjan van de Ven
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Dave Jones
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Len Brown
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Rafael J. Wysocki
Cc: Thomas Gleixner
Cc: Tony Luck
Link: http://lkml.kernel.org/r/1445334889-300-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/cpu/microcode/intel.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c
b/arch/x86/kernel/cpu/microcode/intel.c
index 3f32558..ce47402 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -389,9 +389,9 @@ static int collect_cpu_info_early(struct ucode_cpu_info
*uci)
return 0;
}
-#ifdef DEBUG
static void show_saved_mc(void)
{
+#ifdef DEBUG
int i, j;
unsigned int sig, pf, rev, total_size, data_size, date;
struct ucode_cpu_info uci;
@@ -449,12 +449,8 @@ static void show_saved_mc(void)
}
}
-}
-#else
-static inline void show_saved_mc(void)
-{
-}
#endif
+}
#ifdef CONFIG_HOTPLUG_CPU
static DEFINE_MUTEX(x86_cpu_microcode_mutex);
--
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[tip:ras/core] x86/microcode/amd: Remove maintainers from comments
Commit-ID: 6f7fc44bf1eef6768f9dcb527c737ab24a3203ac Gitweb: http://git.kernel.org/tip/6f7fc44bf1eef6768f9dcb527c737ab24a3203ac Author: Borislav Petkov AuthorDate: Tue, 20 Oct 2015 11:54:47 +0200 Committer: Ingo Molnar CommitDate: Wed, 21 Oct 2015 11:22:12 +0200 x86/microcode/amd: Remove maintainers from comments We have the MAINTAINERS file for that. Also, Andreas doesn't have the time for this work anymore. Signed-off-by: Borislav Petkov Cc: Andreas Herrmann Cc: Andy Lutomirski Cc: Arjan van de Ven Cc: Borislav Petkov Cc: Brian Gerst Cc: Dave Jones Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Len Brown Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Rafael J. Wysocki Cc: Thomas Gleixner Cc: Tony Luck Link: http://lkml.kernel.org/r/1445334889-300-5-git-send-email...@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/microcode/amd.c | 4 1 file changed, 4 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c index 6eeda7b..2233f8a 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -11,10 +11,6 @@ * Based on work by: * Tigran Aivazian * - * Maintainers: - * Andreas Herrmann - * Borislav Petkov - * * early loader: * Copyright (C) 2013 Advanced Micro Devices, Inc. * -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[tip:ras/core] x86/microcode: Merge the early microcode loader
Commit-ID: fe055896c040df571e4ff56fb196d6845130057b
Gitweb: http://git.kernel.org/tip/fe055896c040df571e4ff56fb196d6845130057b
Author: Borislav Petkov
AuthorDate: Tue, 20 Oct 2015 11:54:45 +0200
Committer: Ingo Molnar
CommitDate: Wed, 21 Oct 2015 11:22:12 +0200
x86/microcode: Merge the early microcode loader
Merge the early loader functionality into the driver proper. The
diff is huge but logically, it is simply moving code from the
_early.c files into the main driver.
Signed-off-by: Borislav Petkov
Cc: Andy Lutomirski
Cc: Arjan van de Ven
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Dave Jones
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Len Brown
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Rafael J. Wysocki
Cc: Thomas Gleixner
Cc: Tony Luck
Link: http://lkml.kernel.org/r/1445334889-300-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/Kconfig| 19 +-
arch/x86/include/asm/microcode.h| 19 +-
arch/x86/include/asm/microcode_amd.h| 2 +-
arch/x86/include/asm/microcode_intel.h | 10 +-
arch/x86/kernel/cpu/microcode/Makefile | 3 -
arch/x86/kernel/cpu/microcode/amd.c | 446 ++-
arch/x86/kernel/cpu/microcode/amd_early.c | 444 ---
arch/x86/kernel/cpu/microcode/core.c| 160 +-
arch/x86/kernel/cpu/microcode/core_early.c | 170 --
arch/x86/kernel/cpu/microcode/intel.c | 788 ++-
arch/x86/kernel/cpu/microcode/intel_early.c | 808
arch/x86/kernel/head_32.S | 5 +-
arch/x86/mm/init.c | 2 -
13 files changed, 1399 insertions(+), 1477 deletions(-)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index fdf1f0c..255ea22 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1126,6 +1126,7 @@ config MICROCODE
bool "CPU microcode loading support"
default y
depends on CPU_SUP_AMD || CPU_SUP_INTEL
+ depends on BLK_DEV_INITRD
select FW_LOADER
---help---
@@ -1167,24 +1168,6 @@ config MICROCODE_OLD_INTERFACE
def_bool y
depends on MICROCODE
-config MICROCODE_INTEL_EARLY
- bool
-
-config MICROCODE_AMD_EARLY
- bool
-
-config MICROCODE_EARLY
- bool "Early load microcode"
- depends on MICROCODE && BLK_DEV_INITRD
- select MICROCODE_INTEL_EARLY if MICROCODE_INTEL
- select MICROCODE_AMD_EARLY if MICROCODE_AMD
- default y
- help
- This option provides functionality to read additional microcode data
- at the beginning of initrd image. The data tells kernel to load
- microcode to CPU's as early as possible. No functional change if no
- microcode data is glued to the initrd, therefore it's safe to say Y.
-
config X86_MSR
tristate "/dev/cpu/*/msr - Model-specific register support"
---help---
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index d1ff724f..9f953f7 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -81,7 +81,6 @@ static inline struct microcode_ops * __init
init_amd_microcode(void)
static inline void __exit exit_amd_microcode(void) {}
#endif
-#ifdef CONFIG_MICROCODE_EARLY
#define MAX_UCODE_COUNT 128
#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
@@ -156,22 +155,18 @@ static inline unsigned int x86_model(unsigned int sig)
return model;
}
+#ifdef CONFIG_MICROCODE
extern void __init load_ucode_bsp(void);
extern void load_ucode_ap(void);
extern int __init save_microcode_in_initrd(void);
void reload_early_microcode(void);
extern bool get_builtin_firmware(struct cpio_data *cd, const char *name);
#else
-static inline void __init load_ucode_bsp(void) {}
-static inline void load_ucode_ap(void) {}
-static inline int __init save_microcode_in_initrd(void)
-{
- return 0;
-}
-static inline void reload_early_microcode(void) {}
-static inline bool get_builtin_firmware(struct cpio_data *cd, const char *name)
-{
- return false;
-}
+static inline void __init load_ucode_bsp(void) { }
+static inline void load_ucode_ap(void) { }
+static inline int __init save_microcode_in_initrd(void){
return 0; }
+static inline void reload_early_microcode(void){ }
+static inline bool
+get_builtin_firmware(struct cpio_data *cd, const char *name) { return false;
}
#endif
#endif /* _ASM_X86_MICROCODE_H */
diff --git a/arch/x86/include/asm/microcode_amd.h
b/arch/x86/include/asm/microcode_amd.h
index d3e86cf..adfc847 100644
--- a/arch/x86/include/asm/microcode_amd.h
+++ b/arch/x86/include/asm/microcode_amd.h
@@ -64,7 +64,7 @@ extern enum ucode_state load_microcode_amd(int cpu, u8
family, const u8 *data, s
#define PATCH_MAX_SIZE PAGE_SIZE
extern u8 amd_ucode_patch[PATCH_MAX_SIZE];
-#ifdef CONFIG_MICROCODE_AMD_EARLY
+#ifdef CONFI
[tip:ras/core] x86/microcode: Remove modularization leftovers
Commit-ID: 6b26e1bf66bb4bf1b1b9b4f27d1f324875689cf0
Gitweb: http://git.kernel.org/tip/6b26e1bf66bb4bf1b1b9b4f27d1f324875689cf0
Author: Borislav Petkov
AuthorDate: Tue, 20 Oct 2015 11:54:46 +0200
Committer: Ingo Molnar
CommitDate: Wed, 21 Oct 2015 11:22:12 +0200
x86/microcode: Remove modularization leftovers
Remove the remaining module functionality leftovers. Make
"dis_ucode_ldr" an early_param and make it static again. Drop
module aliases, autoloading table, description, etc.
Bump version number, while at it.
Signed-off-by: Borislav Petkov
Cc: Andy Lutomirski
Cc: Arjan van de Ven
Cc: Borislav Petkov
Cc: Brian Gerst
Cc: Dave Jones
Cc: Denys Vlasenko
Cc: H. Peter Anvin
Cc: Len Brown
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Rafael J. Wysocki
Cc: Thomas Gleixner
Cc: Tony Luck
Link: http://lkml.kernel.org/r/1445334889-300-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/microcode.h | 1 -
arch/x86/kernel/cpu/microcode/amd.c | 7 +-
arch/x86/kernel/cpu/microcode/core.c | 36 +--
arch/x86/kernel/cpu/microcode/intel.c | 7 +-
arch/x86/kernel/cpu/microcode/intel_lib.c | 1 -
5 files changed, 12 insertions(+), 40 deletions(-)
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 9f953f7..34e62b1 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -27,7 +27,6 @@ struct cpu_signature {
struct device;
enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND };
-extern bool dis_ucode_ldr;
struct microcode_ops {
enum ucode_state (*request_microcode_user) (int cpu,
diff --git a/arch/x86/kernel/cpu/microcode/amd.c
b/arch/x86/kernel/cpu/microcode/amd.c
index 20297fb..6eeda7b 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -24,7 +24,7 @@
* Licensed under the terms of the GNU General Public
* License version 2. See file COPYING for details.
*/
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#define pr_fmt(fmt) "microcode: " fmt
#include
#include
@@ -32,7 +32,6 @@
#include
#include
#include
-#include
#include
#include
@@ -42,10 +41,6 @@
#include
#include
-MODULE_DESCRIPTION("AMD Microcode Update Driver");
-MODULE_AUTHOR("Peter Oruba");
-MODULE_LICENSE("GPL v2");
-
static struct equiv_cpu_entry *equiv_cpu_table;
struct ucode_patch {
diff --git a/arch/x86/kernel/cpu/microcode/core.c
b/arch/x86/kernel/cpu/microcode/core.c
index 18848c7..7fc27f1 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -19,7 +19,7 @@
* 2 of the License, or (at your option) any later version.
*/
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#define pr_fmt(fmt) "microcode: " fmt
#include
#include
@@ -27,7 +27,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -41,16 +40,18 @@
#include
#include
-MODULE_DESCRIPTION("Microcode Update Driver");
-MODULE_AUTHOR("Tigran Aivazian ");
-MODULE_LICENSE("GPL");
-
-#define MICROCODE_VERSION "2.00"
+#define MICROCODE_VERSION "2.01"
static struct microcode_ops*microcode_ops;
-bool dis_ucode_ldr;
-module_param(dis_ucode_ldr, bool, 0);
+static bool dis_ucode_ldr;
+
+static int __init disable_loader(char *str)
+{
+ dis_ucode_ldr = true;
+ return 1;
+}
+__setup("dis_ucode_ldr", disable_loader);
/*
* Synchronization.
@@ -364,9 +365,6 @@ static void __exit microcode_dev_exit(void)
{
misc_deregister(µcode_dev);
}
-
-MODULE_ALIAS_MISCDEV(MICROCODE_MINOR);
-MODULE_ALIAS("devname:cpu/microcode");
#else
#define microcode_dev_init() 0
#define microcode_dev_exit() do { } while (0)
@@ -617,20 +615,6 @@ static struct notifier_block mc_cpu_notifier = {
.notifier_call = mc_cpu_callback,
};
-#ifdef MODULE
-/* Autoload on Intel and AMD systems */
-static const struct x86_cpu_id __initconst microcode_id[] = {
-#ifdef CONFIG_MICROCODE_INTEL
- { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, },
-#endif
-#ifdef CONFIG_MICROCODE_AMD
- { X86_VENDOR_AMD, X86_FAMILY_ANY, X86_MODEL_ANY, },
-#endif
- {}
-};
-MODULE_DEVICE_TABLE(x86cpu, microcode_id);
-#endif
-
static struct attribute *cpu_root_microcode_attrs[] = {
&dev_attr_reload.attr,
NULL
diff --git a/arch/x86/kernel/cpu/microcode/intel.c
b/arch/x86/kernel/cpu/microcode/intel.c
index 2e09171..3f32558 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -21,7 +21,7 @@
*
*#define DEBUG
*/
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#define pr_fmt(fmt) "microcode: " fmt
#include
#include
@@ -29,7 +29,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -40,10 +39,6 @@
#include
#include
-MODULE_DESCRIPTION("Microcode Update Driver");
-MODULE_AUTHOR("Tigran Aivazian ");
-MODULE_LICENSE("GPL");
-
static unsigned long
