Re: [PATCH] ARM: dts: omap3: Fix ISP syscon register offset

[Tony Lindgren]

* Sebastian Reichel  [160422 06:17]:
> Hi,
> 
> On Fri, Apr 22, 2016 at 07:34:43AM +0300, Ivaylo Dimitrov wrote:
> > On 16.04.2016 09:20, Ivaylo Dimitrov wrote:
> > >According to the TRM, SCM CONTROL_CSIRXFE register is on offset 0x6c
> > >
> > >Signed-off-by: Ivaylo Dimitrov 
> > >---
> > >  arch/arm/boot/dts/omap34xx.dtsi | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > >diff --git a/arch/arm/boot/dts/omap34xx.dtsi 
> > >b/arch/arm/boot/dts/omap34xx.dtsi
> > >index 5cdba1f..e446562 100644
> > >--- a/arch/arm/boot/dts/omap34xx.dtsi
> > >+++ b/arch/arm/boot/dts/omap34xx.dtsi
> > >@@ -46,7 +46,7 @@
> > >  0x480bd800 0x017c>;
> > >   interrupts = <24>;
> > >   iommus = <_isp>;
> > >-  syscon = <_conf 0xdc>;
> > >+  syscon = <_conf 0x6c>;
> > >   ti,phy-type = ;
> > >   #clock-cells = <1>;
> > >   ports {
> > >
> 
> You may want to add the hint, that 0xdc (the old, wrong "offset")
> represents the last few bits of the register address. I guess
> somebody didn't notice, that scm_conf does not start at a register
> address ending with 00 (like most other modules).
> 
> Reviewed-By: Sebastian Reichel 

Applying into omap-for-v4.6/fixes-rc5 thanks.

Tony

Re: [PATCH] ARM: dts: omap3: Fix ISP syscon register offset

[Tony Lindgren]

* Sebastian Reichel  [160422 06:17]:
> Hi,
> 
> On Fri, Apr 22, 2016 at 07:34:43AM +0300, Ivaylo Dimitrov wrote:
> > On 16.04.2016 09:20, Ivaylo Dimitrov wrote:
> > >According to the TRM, SCM CONTROL_CSIRXFE register is on offset 0x6c
> > >
> > >Signed-off-by: Ivaylo Dimitrov 
> > >---
> > >  arch/arm/boot/dts/omap34xx.dtsi | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > >diff --git a/arch/arm/boot/dts/omap34xx.dtsi 
> > >b/arch/arm/boot/dts/omap34xx.dtsi
> > >index 5cdba1f..e446562 100644
> > >--- a/arch/arm/boot/dts/omap34xx.dtsi
> > >+++ b/arch/arm/boot/dts/omap34xx.dtsi
> > >@@ -46,7 +46,7 @@
> > >  0x480bd800 0x017c>;
> > >   interrupts = <24>;
> > >   iommus = <_isp>;
> > >-  syscon = <_conf 0xdc>;
> > >+  syscon = <_conf 0x6c>;
> > >   ti,phy-type = ;
> > >   #clock-cells = <1>;
> > >   ports {
> > >
> 
> You may want to add the hint, that 0xdc (the old, wrong "offset")
> represents the last few bits of the register address. I guess
> somebody didn't notice, that scm_conf does not start at a register
> address ending with 00 (like most other modules).
> 
> Reviewed-By: Sebastian Reichel 

Applying into omap-for-v4.6/fixes-rc5 thanks.

Tony

Re: [PATCH] ARM: dts: omap3: Fix ISP syscon register offset

[Sebastian Reichel]

Hi,

On Fri, Apr 22, 2016 at 07:34:43AM +0300, Ivaylo Dimitrov wrote:
> On 16.04.2016 09:20, Ivaylo Dimitrov wrote:
> >According to the TRM, SCM CONTROL_CSIRXFE register is on offset 0x6c
> >
> >Signed-off-by: Ivaylo Dimitrov 
> >---
> >  arch/arm/boot/dts/omap34xx.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/arch/arm/boot/dts/omap34xx.dtsi 
> >b/arch/arm/boot/dts/omap34xx.dtsi
> >index 5cdba1f..e446562 100644
> >--- a/arch/arm/boot/dts/omap34xx.dtsi
> >+++ b/arch/arm/boot/dts/omap34xx.dtsi
> >@@ -46,7 +46,7 @@
> >0x480bd800 0x017c>;
> > interrupts = <24>;
> > iommus = <_isp>;
> >-syscon = <_conf 0xdc>;
> >+syscon = <_conf 0x6c>;
> > ti,phy-type = ;
> > #clock-cells = <1>;
> > ports {
> >

You may want to add the hint, that 0xdc (the old, wrong "offset")
represents the last few bits of the register address. I guess
somebody didn't notice, that scm_conf does not start at a register
address ending with 00 (like most other modules).

Reviewed-By: Sebastian Reichel 

-- Sebastian


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Re: [PATCH] ARM: dts: omap3: Fix ISP syscon register offset

[Sebastian Reichel]

Hi,

On Fri, Apr 22, 2016 at 07:34:43AM +0300, Ivaylo Dimitrov wrote:
> On 16.04.2016 09:20, Ivaylo Dimitrov wrote:
> >According to the TRM, SCM CONTROL_CSIRXFE register is on offset 0x6c
> >
> >Signed-off-by: Ivaylo Dimitrov 
> >---
> >  arch/arm/boot/dts/omap34xx.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/arch/arm/boot/dts/omap34xx.dtsi 
> >b/arch/arm/boot/dts/omap34xx.dtsi
> >index 5cdba1f..e446562 100644
> >--- a/arch/arm/boot/dts/omap34xx.dtsi
> >+++ b/arch/arm/boot/dts/omap34xx.dtsi
> >@@ -46,7 +46,7 @@
> >0x480bd800 0x017c>;
> > interrupts = <24>;
> > iommus = <_isp>;
> >-syscon = <_conf 0xdc>;
> >+syscon = <_conf 0x6c>;
> > ti,phy-type = ;
> > #clock-cells = <1>;
> > ports {
> >

You may want to add the hint, that 0xdc (the old, wrong "offset")
represents the last few bits of the register address. I guess
somebody didn't notice, that scm_conf does not start at a register
address ending with 00 (like most other modules).

Reviewed-By: Sebastian Reichel 

-- Sebastian


signature.asc
Description: PGP signature

Re: [PATCH] ARM: dts: omap3: Fix ISP syscon register offset

[Ivaylo Dimitrov]

On 16.04.2016 09:20, Ivaylo Dimitrov wrote:

According to the TRM, SCM CONTROL_CSIRXFE register is on offset 0x6c

Signed-off-by: Ivaylo Dimitrov 
---
  arch/arm/boot/dts/omap34xx.dtsi | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
index 5cdba1f..e446562 100644
--- a/arch/arm/boot/dts/omap34xx.dtsi
+++ b/arch/arm/boot/dts/omap34xx.dtsi
@@ -46,7 +46,7 @@
   0x480bd800 0x017c>;
interrupts = <24>;
iommus = <_isp>;
-   syscon = <_conf 0xdc>;
+   syscon = <_conf 0x6c>;
ti,phy-type = ;
#clock-cells = <1>;
ports {



Anyone going to review that?

Re: [PATCH] ARM: dts: omap3: Fix ISP syscon register offset

[Ivaylo Dimitrov]

On 16.04.2016 09:20, Ivaylo Dimitrov wrote:

According to the TRM, SCM CONTROL_CSIRXFE register is on offset 0x6c

Signed-off-by: Ivaylo Dimitrov 
---
  arch/arm/boot/dts/omap34xx.dtsi | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
index 5cdba1f..e446562 100644
--- a/arch/arm/boot/dts/omap34xx.dtsi
+++ b/arch/arm/boot/dts/omap34xx.dtsi
@@ -46,7 +46,7 @@
   0x480bd800 0x017c>;
interrupts = <24>;
iommus = <_isp>;
-   syscon = <_conf 0xdc>;
+   syscon = <_conf 0x6c>;
ti,phy-type = ;
#clock-cells = <1>;
ports {



Anyone going to review that?

[PATCH] ARM: dts: omap3: Fix ISP syscon register offset

[Ivaylo Dimitrov]

According to the TRM, SCM CONTROL_CSIRXFE register is on offset 0x6c

Signed-off-by: Ivaylo Dimitrov 
---
 arch/arm/boot/dts/omap34xx.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
index 5cdba1f..e446562 100644
--- a/arch/arm/boot/dts/omap34xx.dtsi
+++ b/arch/arm/boot/dts/omap34xx.dtsi
@@ -46,7 +46,7 @@
   0x480bd800 0x017c>;
interrupts = <24>;
iommus = <_isp>;
-   syscon = <_conf 0xdc>;
+   syscon = <_conf 0x6c>;
ti,phy-type = ;
#clock-cells = <1>;
ports {
-- 
1.9.1

[PATCH] ARM: dts: omap3: Fix ISP syscon register offset

[Ivaylo Dimitrov]

According to the TRM, SCM CONTROL_CSIRXFE register is on offset 0x6c

Signed-off-by: Ivaylo Dimitrov 
---
 arch/arm/boot/dts/omap34xx.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
index 5cdba1f..e446562 100644
--- a/arch/arm/boot/dts/omap34xx.dtsi
+++ b/arch/arm/boot/dts/omap34xx.dtsi
@@ -46,7 +46,7 @@
   0x480bd800 0x017c>;
interrupts = <24>;
iommus = <_isp>;
-   syscon = <_conf 0xdc>;
+   syscon = <_conf 0x6c>;
ti,phy-type = ;
#clock-cells = <1>;
ports {
-- 
1.9.1