Re: [PATCH] MIPS: lb60: Fix pin mappings

2019-06-11 Thread Paul Burton
Hello,

Paul Cercueil wrote:
> The pin mappings introduced in commit 636f8ba67fb6
> ("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers")
> are completely wrong. The pinctrl driver name is incorrect, and the
> function and group fields are swapped.
> 
> Fixes: 636f8ba67fb6 ("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for 
> several drivers")
> Cc: 
> Signed-off-by: Paul Cercueil 
> Reviewed-by: Linus Walleij 

Applied to mips-next.

Thanks,
Paul

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  then please email paul.bur...@mips.com to report it. ]


Re: [PATCH] MIPS: lb60: Fix pin mappings

2019-06-11 Thread Paul Burton
Hi Linus / Paul,

On Sat, Jun 08, 2019 at 03:39:07PM +0200, Linus Walleij wrote:
> > Yes, that's definitely what's planned; right now the blockers are
> > patchsets [1] and [2]. [1] is ignored by everybody because there's no
> > maintainer for drivers/memory/. [2] is a year-long effort that still
> > doesn't show me the light at the end of the tunnel.
> >
> > [1] https://lkml.org/lkml/2019/6/4/743
> > [2] https://lkml.org/lkml/2019/5/21/679
> 
> What? That's unacceptable, the last resort is usually to send the
> patches to Andrew Morton (whether fair or not) when nothing gets
> applied.
> 
> In this case I would however encourage the MIPS maintainer to
> simply queue this stuff in the MIPS tree as blocking his arch work
> if not merged, Ralf would you consider just queueing this?
> I do not think the other Linus would mind.

I'd be happy to queue up [1] in mips-next, it looks pretty innocuous.

I can definitely feel Paul's pain on [2], but I see v12 is still getting
feedback so...

Thanks,
Paul


Re: [PATCH] MIPS: lb60: Fix pin mappings

2019-06-08 Thread Paul Cercueil




Le sam. 8 juin 2019 à 15:39, Linus Walleij  
a écrit :
On Sat, Jun 8, 2019 at 12:14 PM Paul Cercueil  
wrote:
 Le sam. 8 juin 2019 à 0:10, Linus Walleij 
 a

 écrit :
 > On Tue, Jun 4, 2019 at 6:34 PM Paul Cercueil 


 > wrote:
 >
 >>  The pin mappings introduced in commit 636f8ba67fb6
 >>  ("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several
 >> drivers")
 >>  are completely wrong. The pinctrl driver name is incorrect, and 
the

 >>  function and group fields are swapped.
 >>
 >>  Fixes: 636f8ba67fb6 ("MIPS: JZ4740: Qi LB60: Add pinctrl
 >> configuration for several drivers")
 >>  Cc: 
 >>  Signed-off-by: Paul Cercueil 
 >
 > Reviewed-by: Linus Walleij 
 >
 > Such things happen. Are you planning to phase all the board files 
over

 > to use devicetree eventually?

 Yes, that's definitely what's planned; right now the blockers are
 patchsets [1] and [2]. [1] is ignored by everybody because there's 
no

 maintainer for drivers/memory/. [2] is a year-long effort that still
 doesn't show me the light at the end of the tunnel.

 [1] https://lkml.org/lkml/2019/6/4/743
 [2] https://lkml.org/lkml/2019/5/21/679


What? That's unacceptable, the last resort is usually to send the
patches to Andrew Morton (whether fair or not) when nothing gets
applied.

In this case I would however encourage the MIPS maintainer to
simply queue this stuff in the MIPS tree as blocking his arch work
if not merged, Ralf would you consider just queueing this?
I do not think the other Linus would mind.


It's not that critical - it's not blocking until [2] gets merged too.
But yes, it's been sitting idle for a while.


Yours,
Linus Walleij





Re: [PATCH] MIPS: lb60: Fix pin mappings

2019-06-08 Thread Linus Walleij
On Sat, Jun 8, 2019 at 12:14 PM Paul Cercueil  wrote:
> Le sam. 8 juin 2019 à 0:10, Linus Walleij  a
> écrit :
> > On Tue, Jun 4, 2019 at 6:34 PM Paul Cercueil 
> > wrote:
> >
> >>  The pin mappings introduced in commit 636f8ba67fb6
> >>  ("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several
> >> drivers")
> >>  are completely wrong. The pinctrl driver name is incorrect, and the
> >>  function and group fields are swapped.
> >>
> >>  Fixes: 636f8ba67fb6 ("MIPS: JZ4740: Qi LB60: Add pinctrl
> >> configuration for several drivers")
> >>  Cc: 
> >>  Signed-off-by: Paul Cercueil 
> >
> > Reviewed-by: Linus Walleij 
> >
> > Such things happen. Are you planning to phase all the board files over
> > to use devicetree eventually?
>
> Yes, that's definitely what's planned; right now the blockers are
> patchsets [1] and [2]. [1] is ignored by everybody because there's no
> maintainer for drivers/memory/. [2] is a year-long effort that still
> doesn't show me the light at the end of the tunnel.
>
> [1] https://lkml.org/lkml/2019/6/4/743
> [2] https://lkml.org/lkml/2019/5/21/679

What? That's unacceptable, the last resort is usually to send the
patches to Andrew Morton (whether fair or not) when nothing gets
applied.

In this case I would however encourage the MIPS maintainer to
simply queue this stuff in the MIPS tree as blocking his arch work
if not merged, Ralf would you consider just queueing this?
I do not think the other Linus would mind.

Yours,
Linus Walleij


Re: [PATCH] MIPS: lb60: Fix pin mappings

2019-06-08 Thread Paul Cercueil




Le sam. 8 juin 2019 à 0:10, Linus Walleij  a 
écrit :
On Tue, Jun 4, 2019 at 6:34 PM Paul Cercueil  
wrote:



 The pin mappings introduced in commit 636f8ba67fb6
 ("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several 
drivers")

 are completely wrong. The pinctrl driver name is incorrect, and the
 function and group fields are swapped.

 Fixes: 636f8ba67fb6 ("MIPS: JZ4740: Qi LB60: Add pinctrl 
configuration for several drivers")

 Cc: 
 Signed-off-by: Paul Cercueil 


Reviewed-by: Linus Walleij 

Such things happen. Are you planning to phase all the board files over
to use devicetree eventually?


Yes, that's definitely what's planned; right now the blockers are
patchsets [1] and [2]. [1] is ignored by everybody because there's no
maintainer for drivers/memory/. [2] is a year-long effort that still
doesn't show me the light at the end of the tunnel.

[1] https://lkml.org/lkml/2019/6/4/743
[2] https://lkml.org/lkml/2019/5/21/679

Cheers
-Paul




Re: [PATCH] MIPS: lb60: Fix pin mappings

2019-06-07 Thread Linus Walleij
On Tue, Jun 4, 2019 at 6:34 PM Paul Cercueil  wrote:

> The pin mappings introduced in commit 636f8ba67fb6
> ("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers")
> are completely wrong. The pinctrl driver name is incorrect, and the
> function and group fields are swapped.
>
> Fixes: 636f8ba67fb6 ("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for 
> several drivers")
> Cc: 
> Signed-off-by: Paul Cercueil 

Reviewed-by: Linus Walleij 

Such things happen. Are you planning to phase all the board files over
to use devicetree eventually?

Yours,
Linus Walleij


[PATCH] MIPS: lb60: Fix pin mappings

2019-06-04 Thread Paul Cercueil
The pin mappings introduced in commit 636f8ba67fb6
("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers")
are completely wrong. The pinctrl driver name is incorrect, and the
function and group fields are swapped.

Fixes: 636f8ba67fb6 ("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for 
several drivers")
Cc: 
Signed-off-by: Paul Cercueil 
---
 arch/mips/jz4740/board-qi_lb60.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index 071e9d94eea7..daed44ee116d 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -466,27 +466,27 @@ static unsigned long pin_cfg_bias_disable[] = {
 static struct pinctrl_map pin_map[] __initdata = {
/* NAND pin configuration */
PIN_MAP_MUX_GROUP_DEFAULT("jz4740-nand",
-   "1001.jz4740-pinctrl", "nand", "nand-cs1"),
+   "1001.pin-controller", "nand-cs1", "nand"),
 
/* fbdev pin configuration */
PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_DEFAULT,
-   "1001.jz4740-pinctrl", "lcd", "lcd-8bit"),
+   "1001.pin-controller", "lcd-8bit", "lcd"),
PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_SLEEP,
-   "1001.jz4740-pinctrl", "lcd", "lcd-no-pins"),
+   "1001.pin-controller", "lcd-no-pins", "lcd"),
 
/* MMC pin configuration */
PIN_MAP_MUX_GROUP_DEFAULT("jz4740-mmc.0",
-   "1001.jz4740-pinctrl", "mmc", "mmc-1bit"),
+   "1001.pin-controller", "mmc-1bit", "mmc"),
PIN_MAP_MUX_GROUP_DEFAULT("jz4740-mmc.0",
-   "1001.jz4740-pinctrl", "mmc", "mmc-4bit"),
+   "1001.pin-controller", "mmc-4bit", "mmc"),
PIN_MAP_CONFIGS_PIN_DEFAULT("jz4740-mmc.0",
-   "1001.jz4740-pinctrl", "PD0", pin_cfg_bias_disable),
+   "1001.pin-controller", "PD0", pin_cfg_bias_disable),
PIN_MAP_CONFIGS_PIN_DEFAULT("jz4740-mmc.0",
-   "1001.jz4740-pinctrl", "PD2", pin_cfg_bias_disable),
+   "1001.pin-controller", "PD2", pin_cfg_bias_disable),
 
/* PWM pin configuration */
PIN_MAP_MUX_GROUP_DEFAULT("jz4740-pwm",
-   "1001.jz4740-pinctrl", "pwm4", "pwm4"),
+   "1001.pin-controller", "pwm4", "pwm4"),
 };
 
 
-- 
2.21.0.593.g511ec345e18