Re: [PATCH] clk: ingenic: Fix recalc_rate for clocks with fixed divider
On 11/01, Paul Cercueil wrote: > Previously, the clocks with a fixed divider would report their rate > as being the same as the one of their parent, independently of the > divider in use. This commit fixes this behaviour. > > This went unnoticed as neither the jz4740 nor the jz4780 CGU code > have clocks with fixed dividers yet. > > Signed-off-by: Paul Cercueil> --- Nobody replied or reviewed it so I'll bite. Do we have a user of this code path? If not, please reserve this patch until such a time and then include it in the series. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH] clk: ingenic: Fix recalc_rate for clocks with fixed divider
On 11/01, Paul Cercueil wrote: > Previously, the clocks with a fixed divider would report their rate > as being the same as the one of their parent, independently of the > divider in use. This commit fixes this behaviour. > > This went unnoticed as neither the jz4740 nor the jz4780 CGU code > have clocks with fixed dividers yet. > > Signed-off-by: Paul Cercueil > --- Nobody replied or reviewed it so I'll bite. Do we have a user of this code path? If not, please reserve this patch until such a time and then include it in the series. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH] clk: ingenic: Fix recalc_rate for clocks with fixed divider
Previously, the clocks with a fixed divider would report their rate as being the same as the one of their parent, independently of the divider in use. This commit fixes this behaviour. This went unnoticed as neither the jz4740 nor the jz4780 CGU code have clocks with fixed dividers yet. Signed-off-by: Paul Cercueil--- drivers/clk/ingenic/cgu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index e8248f9..eb9002c 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -328,6 +328,8 @@ ingenic_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) div *= clk_info->div.div; rate /= div; + } else if (clk_info->type & CGU_CLK_FIXDIV) { + rate /= clk_info->fixdiv.div; } return rate; -- 2.10.1
[PATCH] clk: ingenic: Fix recalc_rate for clocks with fixed divider
Previously, the clocks with a fixed divider would report their rate as being the same as the one of their parent, independently of the divider in use. This commit fixes this behaviour. This went unnoticed as neither the jz4740 nor the jz4780 CGU code have clocks with fixed dividers yet. Signed-off-by: Paul Cercueil --- drivers/clk/ingenic/cgu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index e8248f9..eb9002c 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -328,6 +328,8 @@ ingenic_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) div *= clk_info->div.div; rate /= div; + } else if (clk_info->type & CGU_CLK_FIXDIV) { + rate /= clk_info->fixdiv.div; } return rate; -- 2.10.1