Re: [PATCH] dt-bindings: fpga: fpga-region: Convert to sugar syntax

[Moritz Fischer]

Hi Geert,

On Fri, Apr 02, 2021 at 01:57:49PM +0200, Geert Uytterhoeven wrote:
> Using overlay sugar syntax makes the DTS files easier to read (and
> write).
> 
> While at it, fix two build issues:
>   - "/dts-v1/" and "/plugin/" must be separate statements.
>   - Add a missing closing curly brace.
> 
> Signed-off-by: Geert Uytterhoeven 
> ---
>  .../devicetree/bindings/fpga/fpga-region.txt  | 187 --
>  1 file changed, 85 insertions(+), 102 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt 
> b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> index e811cf8250199b14..d787d57491a1c537 100644
> --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
> +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> @@ -245,36 +245,31 @@ Base tree contains:
>  
>  Overlay contains:
>  
> -/dts-v1/ /plugin/;
> -/ {
> - fragment@0 {
> - target = <&fpga_region0>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - __overlay__ {
> - #address-cells = <1>;
> - #size-cells = <1>;
> -
> - firmware-name = "soc_system.rbf";
> - fpga-bridges = <&fpga_bridge1>;
> - ranges = <0x2 0xff20 0x10>,
> -  <0x0 0xc000 0x2000>;
> -
> - gpio@10040 {
> - compatible = "altr,pio-1.0";
> - reg = <0x10040 0x20>;
> - altr,ngpio = <4>;
> - #gpio-cells = <2>;
> - clocks = <2>;
> - gpio-controller;
> - };
> -
> - onchip-memory {
> - device_type = "memory";
> - compatible = "altr,onchipmem-15.1";
> - reg = <0x0 0x1>;
> - };
> - };
> +/dts-v1/;
> +/plugin/;
> +
> +&fpga_region0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + firmware-name = "soc_system.rbf";
> + fpga-bridges = <&fpga_bridge1>;
> + ranges = <0x2 0xff20 0x10>,
> +  <0x0 0xc000 0x2000>;
> +
> + gpio@10040 {
> + compatible = "altr,pio-1.0";
> + reg = <0x10040 0x20>;
> + altr,ngpio = <4>;
> + #gpio-cells = <2>;
> + clocks = <2>;
> + gpio-controller;
> + };
> +
> + onchip-memory {
> + device_type = "memory";
> + compatible = "altr,onchipmem-15.1";
> + reg = <0x0 0x1>;
>   };
>  };
>  
> @@ -371,25 +366,22 @@ Live Device Tree contains:
>   };
>  
>  DT Overlay contains:
> -/dts-v1/ /plugin/;
> -/ {
> -fragment@0 {
> - target = <&fpga_region0>;
> +
> +/dts-v1/;
> +/plugin/;
> +
> +&fpga_region0 {
>   #address-cells = <1>;
>   #size-cells = <1>;
> - __overlay__ {
> - #address-cells = <1>;
> - #size-cells = <1>;
>  
> - firmware-name = "zynq-gpio.bin";
> + firmware-name = "zynq-gpio.bin";
>  
> - gpio1: gpio@4000 {
> - compatible = "xlnx,xps-gpio-1.00.a";
> - reg = <0x4000 0x1>;
> - gpio-controller;
> - #gpio-cells = <0x2>;
> - xlnx,gpio-width= <0x6>;
> - };
> + gpio1: gpio@4000 {
> + compatible = "xlnx,xps-gpio-1.00.a";
> + reg = <0x4000 0x1>;
> + gpio-controller;
> + #gpio-cells = <0x2>;
> + xlnx,gpio-width= <0x6>;
>   };
>  };
>  
> @@ -402,41 +394,37 @@ This example programs the FPGA to have two regions that 
> can later be partially
>  configured.  Each region has its own bridge in the FPGA fabric.
>  
>  DT Overlay contains:
> -/dts-v1/ /plugin/;
> -/ {
> - fragment@0 {
> - target = <&fpga_region0>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - __overlay__ {
> - #address-cells = <1>;
> - #size-cells = <1>;
> -
> - firmware-name = "base.rbf";
> -
> - fpga-bridge@4400 {
> - compatible = "altr,freeze-bridge-controller";
> - reg = <0x4400 0x10>;
> -
> - fpga_region1: fpga-region1 {
> - compatible = "fpga-region";
> - #address-cells = <0x1>;
> - #size-cells = <0x1>;
> - ranges;
> - };
> - };
> -
> - fpga-bridge@4420 {
> - compatible = "altr,freeze-bridge-controller";
> -   

[PATCH] dt-bindings: fpga: fpga-region: Convert to sugar syntax

[Geert Uytterhoeven]

Using overlay sugar syntax makes the DTS files easier to read (and
write).

While at it, fix two build issues:
  - "/dts-v1/" and "/plugin/" must be separate statements.
  - Add a missing closing curly brace.

Signed-off-by: Geert Uytterhoeven 
---
 .../devicetree/bindings/fpga/fpga-region.txt  | 187 --
 1 file changed, 85 insertions(+), 102 deletions(-)

diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt 
b/Documentation/devicetree/bindings/fpga/fpga-region.txt
index e811cf8250199b14..d787d57491a1c537 100644
--- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
+++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
@@ -245,36 +245,31 @@ Base tree contains:
 
 Overlay contains:
 
-/dts-v1/ /plugin/;
-/ {
-   fragment@0 {
-   target = <&fpga_region0>;
-   #address-cells = <1>;
-   #size-cells = <1>;
-   __overlay__ {
-   #address-cells = <1>;
-   #size-cells = <1>;
-
-   firmware-name = "soc_system.rbf";
-   fpga-bridges = <&fpga_bridge1>;
-   ranges = <0x2 0xff20 0x10>,
-<0x0 0xc000 0x2000>;
-
-   gpio@10040 {
-   compatible = "altr,pio-1.0";
-   reg = <0x10040 0x20>;
-   altr,ngpio = <4>;
-   #gpio-cells = <2>;
-   clocks = <2>;
-   gpio-controller;
-   };
-
-   onchip-memory {
-   device_type = "memory";
-   compatible = "altr,onchipmem-15.1";
-   reg = <0x0 0x1>;
-   };
-   };
+/dts-v1/;
+/plugin/;
+
+&fpga_region0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   firmware-name = "soc_system.rbf";
+   fpga-bridges = <&fpga_bridge1>;
+   ranges = <0x2 0xff20 0x10>,
+<0x0 0xc000 0x2000>;
+
+   gpio@10040 {
+   compatible = "altr,pio-1.0";
+   reg = <0x10040 0x20>;
+   altr,ngpio = <4>;
+   #gpio-cells = <2>;
+   clocks = <2>;
+   gpio-controller;
+   };
+
+   onchip-memory {
+   device_type = "memory";
+   compatible = "altr,onchipmem-15.1";
+   reg = <0x0 0x1>;
};
 };
 
@@ -371,25 +366,22 @@ Live Device Tree contains:
};
 
 DT Overlay contains:
-/dts-v1/ /plugin/;
-/ {
-fragment@0 {
-   target = <&fpga_region0>;
+
+/dts-v1/;
+/plugin/;
+
+&fpga_region0 {
#address-cells = <1>;
#size-cells = <1>;
-   __overlay__ {
-   #address-cells = <1>;
-   #size-cells = <1>;
 
-   firmware-name = "zynq-gpio.bin";
+   firmware-name = "zynq-gpio.bin";
 
-   gpio1: gpio@4000 {
-   compatible = "xlnx,xps-gpio-1.00.a";
-   reg = <0x4000 0x1>;
-   gpio-controller;
-   #gpio-cells = <0x2>;
-   xlnx,gpio-width= <0x6>;
-   };
+   gpio1: gpio@4000 {
+   compatible = "xlnx,xps-gpio-1.00.a";
+   reg = <0x4000 0x1>;
+   gpio-controller;
+   #gpio-cells = <0x2>;
+   xlnx,gpio-width= <0x6>;
};
 };
 
@@ -402,41 +394,37 @@ This example programs the FPGA to have two regions that 
can later be partially
 configured.  Each region has its own bridge in the FPGA fabric.
 
 DT Overlay contains:
-/dts-v1/ /plugin/;
-/ {
-   fragment@0 {
-   target = <&fpga_region0>;
-   #address-cells = <1>;
-   #size-cells = <1>;
-   __overlay__ {
-   #address-cells = <1>;
-   #size-cells = <1>;
-
-   firmware-name = "base.rbf";
-
-   fpga-bridge@4400 {
-   compatible = "altr,freeze-bridge-controller";
-   reg = <0x4400 0x10>;
-
-   fpga_region1: fpga-region1 {
-   compatible = "fpga-region";
-   #address-cells = <0x1>;
-   #size-cells = <0x1>;
-   ranges;
-   };
-   };
-
-   fpga-bridge@4420 {
-   compatible = "altr,freeze-bridge-controller";
-   reg = <0x4420 0x10>;
-
-   fpga_region2: fpga-region2 {
-   compatible = "fpga-region";
-