Re: [PATCH] edac i5000, i5400: fix use of MTR_DRAM_WIDTH macro

2017-03-09 Thread Borislav Petkov
On Wed, Mar 08, 2017 at 08:18:09PM -0500, Jérémy Lefaure wrote:
> The MTR_DRAM_WIDTH macro returns the data width. It is sometimes used as
> if it returned a boolean true if the width if 8. This patch fixes the
> tests where MTR_DRAM_WIDTH is misused.
> 
> Signed-off-by: Jérémy Lefaure 
> ---
>  drivers/edac/i5000_edac.c | 2 +-
>  drivers/edac/i5400_edac.c | 5 +++--
>  2 files changed, 4 insertions(+), 3 deletions(-)

Applied, thanks.

-- 
Regards/Gruss,
Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.


Re: [PATCH] edac i5000, i5400: fix use of MTR_DRAM_WIDTH macro

2017-03-09 Thread Borislav Petkov
On Wed, Mar 08, 2017 at 08:18:09PM -0500, Jérémy Lefaure wrote:
> The MTR_DRAM_WIDTH macro returns the data width. It is sometimes used as
> if it returned a boolean true if the width if 8. This patch fixes the
> tests where MTR_DRAM_WIDTH is misused.
> 
> Signed-off-by: Jérémy Lefaure 
> ---
>  drivers/edac/i5000_edac.c | 2 +-
>  drivers/edac/i5400_edac.c | 5 +++--
>  2 files changed, 4 insertions(+), 3 deletions(-)

Applied, thanks.

-- 
Regards/Gruss,
Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.


[PATCH] edac i5000, i5400: fix use of MTR_DRAM_WIDTH macro

2017-03-08 Thread Jérémy Lefaure
The MTR_DRAM_WIDTH macro returns the data width. It is sometimes used as
if it returned a boolean true if the width if 8. This patch fixes the
tests where MTR_DRAM_WIDTH is misused.

Signed-off-by: Jérémy Lefaure 
---
 drivers/edac/i5000_edac.c | 2 +-
 drivers/edac/i5400_edac.c | 5 +++--
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index 1670d27bcac8..f683919981b0 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -1293,7 +1293,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci)
dimm->mtype = MEM_FB_DDR2;
 
/* ask what device type on this row */
-   if (MTR_DRAM_WIDTH(mtr))
+   if (MTR_DRAM_WIDTH(mtr) == 8)
dimm->dtype = DEV_X8;
else
dimm->dtype = DEV_X4;
diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c
index abf6ef22e220..37a9ba71da44 100644
--- a/drivers/edac/i5400_edac.c
+++ b/drivers/edac/i5400_edac.c
@@ -1207,13 +1207,14 @@ static int i5400_init_dimms(struct mem_ctl_info *mci)
 
dimm->nr_pages = size_mb << 8;
dimm->grain = 8;
-   dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4;
+   dimm->dtype = MTR_DRAM_WIDTH(mtr) == 8 ?
+ DEV_X8 : DEV_X4;
dimm->mtype = MEM_FB_DDR2;
/*
 * The eccc mechanism is SDDC (aka SECC), with
 * is similar to Chipkill.
 */
-   dimm->edac_mode = MTR_DRAM_WIDTH(mtr) ?
+   dimm->edac_mode = MTR_DRAM_WIDTH(mtr) == 8 ?
  EDAC_S8ECD8ED : EDAC_S4ECD4ED;
ndimms++;
}
-- 
2.12.0



[PATCH] edac i5000, i5400: fix use of MTR_DRAM_WIDTH macro

2017-03-08 Thread Jérémy Lefaure
The MTR_DRAM_WIDTH macro returns the data width. It is sometimes used as
if it returned a boolean true if the width if 8. This patch fixes the
tests where MTR_DRAM_WIDTH is misused.

Signed-off-by: Jérémy Lefaure 
---
 drivers/edac/i5000_edac.c | 2 +-
 drivers/edac/i5400_edac.c | 5 +++--
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index 1670d27bcac8..f683919981b0 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -1293,7 +1293,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci)
dimm->mtype = MEM_FB_DDR2;
 
/* ask what device type on this row */
-   if (MTR_DRAM_WIDTH(mtr))
+   if (MTR_DRAM_WIDTH(mtr) == 8)
dimm->dtype = DEV_X8;
else
dimm->dtype = DEV_X4;
diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c
index abf6ef22e220..37a9ba71da44 100644
--- a/drivers/edac/i5400_edac.c
+++ b/drivers/edac/i5400_edac.c
@@ -1207,13 +1207,14 @@ static int i5400_init_dimms(struct mem_ctl_info *mci)
 
dimm->nr_pages = size_mb << 8;
dimm->grain = 8;
-   dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4;
+   dimm->dtype = MTR_DRAM_WIDTH(mtr) == 8 ?
+ DEV_X8 : DEV_X4;
dimm->mtype = MEM_FB_DDR2;
/*
 * The eccc mechanism is SDDC (aka SECC), with
 * is similar to Chipkill.
 */
-   dimm->edac_mode = MTR_DRAM_WIDTH(mtr) ?
+   dimm->edac_mode = MTR_DRAM_WIDTH(mtr) == 8 ?
  EDAC_S8ECD8ED : EDAC_S4ECD4ED;
ndimms++;
}
-- 
2.12.0