Re: [PATCH] pinctrl: rockchip: populate platform device for rockchip gpio
Am Dienstag, 8. September 2020, 04:19:13 CEST schrieb Jianqun Xu:
> Register both gpio driver and device as part of driver model, so that
> the '-gpio'/'-gpios' dependency in dts can be correctly handled by
> of_devlink/of_fwlink.
>
> Signed-off-by: Jianqun Xu
Reviewed-by: Heiko Stuebner
> ---
> drivers/pinctrl/pinctrl-rockchip.c | 305 +
> 1 file changed, 175 insertions(+), 130 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-rockchip.c
> b/drivers/pinctrl/pinctrl-rockchip.c
> index c98bd352f831..2e4fc711d0d1 100644
> --- a/drivers/pinctrl/pinctrl-rockchip.c
> +++ b/drivers/pinctrl/pinctrl-rockchip.c
> @@ -3370,139 +3370,121 @@ static void rockchip_irq_disable(struct irq_data *d)
> }
>
> static int rockchip_interrupts_register(struct platform_device *pdev,
> - struct rockchip_pinctrl *info)
> + struct rockchip_pin_bank *bank)
> {
> - struct rockchip_pin_ctrl *ctrl = info->ctrl;
> - struct rockchip_pin_bank *bank = ctrl->pin_banks;
> unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
> struct irq_chip_generic *gc;
> int ret;
> - int i;
>
> - for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
> - if (!bank->valid) {
> - dev_warn(>dev, "bank %s is not valid\n",
> - bank->name);
> - continue;
> - }
> + if (!bank->valid) {
> + dev_warn(>dev, "bank %s is not valid\n",
> + bank->name);
> + return -EINVAL;
> + }
>
> - ret = clk_enable(bank->clk);
> - if (ret) {
> - dev_err(>dev, "failed to enable clock for bank
> %s\n",
> - bank->name);
> - continue;
> - }
> + ret = clk_enable(bank->clk);
> + if (ret) {
> + dev_err(>dev, "failed to enable clock for bank %s\n",
> + bank->name);
> + return ret;
> + }
>
> - bank->domain = irq_domain_add_linear(bank->of_node, 32,
> - _generic_chip_ops, NULL);
> - if (!bank->domain) {
> - dev_warn(>dev, "could not initialize irq domain
> for bank %s\n",
> - bank->name);
> - clk_disable(bank->clk);
> - continue;
> - }
> + bank->domain = irq_domain_add_linear(bank->of_node, 32,
> + _generic_chip_ops, NULL);
> + if (!bank->domain) {
> + dev_warn(>dev, "could not initialize irq domain for bank
> %s\n",
> + bank->name);
> + clk_disable(bank->clk);
> + return -EINVAL;
> + }
>
> - ret = irq_alloc_domain_generic_chips(bank->domain, 32, 1,
> - "rockchip_gpio_irq", handle_level_irq,
> - clr, 0, 0);
> - if (ret) {
> - dev_err(>dev, "could not alloc generic chips for
> bank %s\n",
> - bank->name);
> - irq_domain_remove(bank->domain);
> - clk_disable(bank->clk);
> - continue;
> - }
> + ret = irq_alloc_domain_generic_chips(bank->domain, 32, 1,
> + "rockchip_gpio_irq", handle_level_irq,
> + clr, 0, 0);
> + if (ret) {
> + dev_err(>dev, "could not alloc generic chips for bank
> %s\n",
> + bank->name);
> + irq_domain_remove(bank->domain);
> + clk_disable(bank->clk);
> + return ret;
> + }
>
> - gc = irq_get_domain_generic_chip(bank->domain, 0);
> - gc->reg_base = bank->reg_base;
> - gc->private = bank;
> - gc->chip_types[0].regs.mask = GPIO_INTMASK;
> - gc->chip_types[0].regs.ack = GPIO_PORTS_EOI;
> - gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
> - gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;
> - gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;
> - gc->chip_types[0].chip.irq_enable = rockchip_irq_enable;
> - gc->chip_types[0].chip.irq_disable = rockchip_irq_disable;
> - gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake;
> - gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend;
> - gc->chip_types[0].chip.irq_resume = rockchip_irq_resume;
> - gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type;
> - gc->wake_enabled = IRQ_MSK(bank->nr_pins);
> + gc = irq_get_domain_generic_chip(bank->domain, 0);
> + gc->reg_base = bank->reg_base;
> + gc->private = bank;
> +
[PATCH] pinctrl: rockchip: populate platform device for rockchip gpio
Register both gpio driver and device as part of driver model, so that
the '-gpio'/'-gpios' dependency in dts can be correctly handled by
of_devlink/of_fwlink.
Signed-off-by: Jianqun Xu
---
drivers/pinctrl/pinctrl-rockchip.c | 305 +
1 file changed, 175 insertions(+), 130 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c
b/drivers/pinctrl/pinctrl-rockchip.c
index c98bd352f831..2e4fc711d0d1 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -3370,139 +3370,121 @@ static void rockchip_irq_disable(struct irq_data *d)
}
static int rockchip_interrupts_register(struct platform_device *pdev,
- struct rockchip_pinctrl *info)
+ struct rockchip_pin_bank *bank)
{
- struct rockchip_pin_ctrl *ctrl = info->ctrl;
- struct rockchip_pin_bank *bank = ctrl->pin_banks;
unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
struct irq_chip_generic *gc;
int ret;
- int i;
- for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
- if (!bank->valid) {
- dev_warn(>dev, "bank %s is not valid\n",
-bank->name);
- continue;
- }
+ if (!bank->valid) {
+ dev_warn(>dev, "bank %s is not valid\n",
+bank->name);
+ return -EINVAL;
+ }
- ret = clk_enable(bank->clk);
- if (ret) {
- dev_err(>dev, "failed to enable clock for bank
%s\n",
- bank->name);
- continue;
- }
+ ret = clk_enable(bank->clk);
+ if (ret) {
+ dev_err(>dev, "failed to enable clock for bank %s\n",
+ bank->name);
+ return ret;
+ }
- bank->domain = irq_domain_add_linear(bank->of_node, 32,
- _generic_chip_ops, NULL);
- if (!bank->domain) {
- dev_warn(>dev, "could not initialize irq domain
for bank %s\n",
-bank->name);
- clk_disable(bank->clk);
- continue;
- }
+ bank->domain = irq_domain_add_linear(bank->of_node, 32,
+ _generic_chip_ops, NULL);
+ if (!bank->domain) {
+ dev_warn(>dev, "could not initialize irq domain for bank
%s\n",
+bank->name);
+ clk_disable(bank->clk);
+ return -EINVAL;
+ }
- ret = irq_alloc_domain_generic_chips(bank->domain, 32, 1,
-"rockchip_gpio_irq", handle_level_irq,
-clr, 0, 0);
- if (ret) {
- dev_err(>dev, "could not alloc generic chips for
bank %s\n",
- bank->name);
- irq_domain_remove(bank->domain);
- clk_disable(bank->clk);
- continue;
- }
+ ret = irq_alloc_domain_generic_chips(bank->domain, 32, 1,
+"rockchip_gpio_irq", handle_level_irq,
+clr, 0, 0);
+ if (ret) {
+ dev_err(>dev, "could not alloc generic chips for bank
%s\n",
+ bank->name);
+ irq_domain_remove(bank->domain);
+ clk_disable(bank->clk);
+ return ret;
+ }
- gc = irq_get_domain_generic_chip(bank->domain, 0);
- gc->reg_base = bank->reg_base;
- gc->private = bank;
- gc->chip_types[0].regs.mask = GPIO_INTMASK;
- gc->chip_types[0].regs.ack = GPIO_PORTS_EOI;
- gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
- gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;
- gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;
- gc->chip_types[0].chip.irq_enable = rockchip_irq_enable;
- gc->chip_types[0].chip.irq_disable = rockchip_irq_disable;
- gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake;
- gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend;
- gc->chip_types[0].chip.irq_resume = rockchip_irq_resume;
- gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type;
- gc->wake_enabled = IRQ_MSK(bank->nr_pins);
+ gc = irq_get_domain_generic_chip(bank->domain, 0);
+ gc->reg_base = bank->reg_base;
+ gc->private = bank;
+ gc->chip_types[0].regs.mask = GPIO_INTMASK;
+ gc->chip_types[0].regs.ack = GPIO_PORTS_EOI;
+ gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
+
