subject:"\[PATCH\] thermal\: qcom\: tsens\-v0

Re: [PATCH] thermal: qcom: tsens-v0_1: Add support for MDM9607

2021-01-27 Thread Konrad Dybcio



> Afaict, there's no need to initialize base0 and base1, they are both
> assigned to before used.
>
> Also, they are temporary variables within each case (even with the
> fallthrough), so you should only need a single "base".
>
Right. Fixed, will send in a v3 (I sent a v2 shortly after this one because I 
misplaced the #defines).


> How about:
>
>   mode = field_get(MDM9607_CAL_SEL_MASK, qfprom_cdata[2]);
>
> and same below.
>
> (I see that this would break the style of the file, perhaps we can clean
> that up?)
>
I'd rather not change that to keep it comparable to the downstream driver, 
should anything ever break and need investigation..


> qfprom_csel seems unused and uninitialized.

Fixed as well.


Konrad

Re: [PATCH] thermal: qcom: tsens-v0_1: Add support for MDM9607

2021-01-27 Thread Bjorn Andersson

On Wed 27 Jan 12:14 CST 2021, Konrad Dybcio wrote:

> MDM9607 TSENS IP is very similar to the one of MSM8916, with
> minor adjustments to various tuning values.
> 
> Signed-off-by: Konrad Dybcio 
> ---
>  .../bindings/thermal/qcom-tsens.yaml  |   2 +
>  drivers/thermal/qcom/tsens-v0_1.c | 100 +-
>  drivers/thermal/qcom/tsens.c  |   3 +
>  drivers/thermal/qcom/tsens.h  |   2 +-
>  4 files changed, 105 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml 
> b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
> index 95462e071ab4..8ad9dc139c23 100644
> --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
> +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
> @@ -22,6 +22,7 @@ properties:
>- description: v0.1 of TSENS
>  items:
>- enum:
> +  - qcom,mdm9607-tsens
>- qcom,msm8916-tsens
>- qcom,msm8939-tsens
>- qcom,msm8974-tsens
> @@ -94,6 +95,7 @@ allOf:
>  compatible:
>contains:
>  enum:
> +  - qcom,mdm9607-tsens
>- qcom,msm8916-tsens
>- qcom,msm8974-tsens
>- qcom,msm8976-tsens
> diff --git a/drivers/thermal/qcom/tsens-v0_1.c 
> b/drivers/thermal/qcom/tsens-v0_1.c
> index 4ffa2e2c0145..8efe925b860f 100644
> --- a/drivers/thermal/qcom/tsens-v0_1.c
> +++ b/drivers/thermal/qcom/tsens-v0_1.c
> @@ -126,6 +126,39 @@
>  #define CAL_SEL_SHIFT30
>  #define CAL_SEL_SHIFT_2  28
>  
> +/* eeprom layout data for mdm9607 */
> +#define MDM9607_BASE0_MASK   0x00ff
> +#define MDM9607_BASE1_MASK   0x000ff000
> +#define MDM9607_BASE0_SHIFT  0
> +#define MDM9607_BASE1_SHIFT  12
> +
> +#define MDM9607_S0_P1_MASK   0x3f00
> +#define MDM9607_S1_P1_MASK   0x03f0
> +#define MDM9607_S2_P1_MASK   0x003f
> +#define MDM9607_S3_P1_MASK   0x0003f000
> +#define MDM9607_S4_P1_MASK   0x003f
> +
> +#define MDM9607_S0_P2_MASK   0x000fc000
> +#define MDM9607_S1_P2_MASK   0xfc00
> +#define MDM9607_S2_P2_MASK   0x0fc0
> +#define MDM9607_S3_P2_MASK   0x00fc
> +#define MDM9607_S4_P2_MASK   0x0fc0
> +
> +#define MDM9607_S0_P1_SHIFT  8
> +#define MDM9607_S1_P1_SHIFT  20
> +#define MDM9607_S2_P1_SHIFT  0
> +#define MDM9607_S3_P1_SHIFT  12
> +#define MDM9607_S4_P1_SHIFT  0
> +
> +#define MDM9607_S0_P2_SHIFT  14
> +#define MDM9607_S1_P2_SHIFT  26
> +#define MDM9607_S2_P2_SHIFT  6
> +#define MDM9607_S3_P2_SHIFT  18
> +#define MDM9607_S4_P2_SHIFT  6
> +
> +#define MDM9607_CAL_SEL_MASK 0x0070
> +#define MDM9607_CAL_SEL_SHIFT20
> +
>  #define S0_P1_SHIFT  8
>  #define S1_P1_SHIFT  14
>  #define S2_P1_SHIFT  20
> @@ -452,7 +485,57 @@ static int calibrate_8974(struct tsens_priv *priv)
>   return 0;
>  }
>  
> -/* v0.1: 8916, 8939, 8974 */
> +static int calibrate_9607(struct tsens_priv *priv)
> +{
> + int base0 = 0, base1 = 0, i;

Afaict, there's no need to initialize base0 and base1, they are both
assigned to before used.

Also, they are temporary variables within each case (even with the
fallthrough), so you should only need a single "base".

> + u32 p1[5], p2[5];
> + int mode = 0;
> + u32 *qfprom_cdata, *qfprom_csel;
> +
> + qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
> + if (IS_ERR(qfprom_cdata))
> + return PTR_ERR(qfprom_cdata);
> +
> + mode = (qfprom_cdata[2] & MDM9607_CAL_SEL_MASK) >> 
> MDM9607_CAL_SEL_SHIFT;

How about:

mode = field_get(MDM9607_CAL_SEL_MASK, qfprom_cdata[2]);

and same below.

(I see that this would break the style of the file, perhaps we can clean
that up?)

> + dev_dbg(priv->dev, "calibration mode is %d\n", mode);
> +
> + switch (mode) {
> + case TWO_PT_CALIB:
> + base1 = (qfprom_cdata[2] & MDM9607_BASE1_MASK) >> 
> MDM9607_BASE1_SHIFT;
> + p2[0] = (qfprom_cdata[0] & MDM9607_S0_P2_MASK) >> 
> MDM9607_S0_P2_SHIFT;
> + p2[1] = (qfprom_cdata[0] & MDM9607_S1_P2_MASK) >> 
> MDM9607_S1_P2_SHIFT;
> + p2[2] = (qfprom_cdata[1] & MDM9607_S2_P2_MASK) >> 
> MDM9607_S2_P2_SHIFT;
> + p2[3] = (qfprom_cdata[1] & MDM9607_S3_P2_MASK) >> 
> MDM9607_S3_P2_SHIFT;
> + p2[4] = (qfprom_cdata[2] & MDM9607_S4_P2_MASK) >> 
> MDM9607_S4_P2_SHIFT;
> + for (i = 0; i < priv->num_sensors; i++)
> + p2[i] = ((base1 + p2[i]) << 2);
> + fallthrough;
> + case ONE_PT_CALIB2:
> + base0 = (qfprom_cdata[0] & MDM9607_BASE0_MASK);
> + p1[0] = (qfprom_cdata[0] & MDM9607_S0_P1_MASK) >> 
> MDM9607_S0_P1_SHIFT;
> + p1[1] = (qfprom_cdata[0] & MDM9607_S1_P1_MASK) >> 
> MDM9607_S1_P1_SHIFT;
> + p1[2] = (qfprom_cdata[1] & MDM9607_S2_P1_MASK) >> 
> MDM9607_S2_P1_SHIFT;
> + p1[3] = (qfprom_cdata[1] &

[PATCH] thermal: qcom: tsens-v0_1: Add support for MDM9607

2021-01-27 Thread Konrad Dybcio

MDM9607 TSENS IP is very similar to the one of MSM8916, with
minor adjustments to various tuning values.

Signed-off-by: Konrad Dybcio 
---
 .../bindings/thermal/qcom-tsens.yaml  |   2 +
 drivers/thermal/qcom/tsens-v0_1.c | 100 +-
 drivers/thermal/qcom/tsens.c  |   3 +
 drivers/thermal/qcom/tsens.h  |   2 +-
 4 files changed, 105 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml 
b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index 95462e071ab4..8ad9dc139c23 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -22,6 +22,7 @@ properties:
   - description: v0.1 of TSENS
 items:
   - enum:
+  - qcom,mdm9607-tsens
   - qcom,msm8916-tsens
   - qcom,msm8939-tsens
   - qcom,msm8974-tsens
@@ -94,6 +95,7 @@ allOf:
 compatible:
   contains:
 enum:
+  - qcom,mdm9607-tsens
   - qcom,msm8916-tsens
   - qcom,msm8974-tsens
   - qcom,msm8976-tsens
diff --git a/drivers/thermal/qcom/tsens-v0_1.c 
b/drivers/thermal/qcom/tsens-v0_1.c
index 4ffa2e2c0145..8efe925b860f 100644
--- a/drivers/thermal/qcom/tsens-v0_1.c
+++ b/drivers/thermal/qcom/tsens-v0_1.c
@@ -126,6 +126,39 @@
 #define CAL_SEL_SHIFT  30
 #define CAL_SEL_SHIFT_228
 
+/* eeprom layout data for mdm9607 */
+#define MDM9607_BASE0_MASK 0x00ff
+#define MDM9607_BASE1_MASK 0x000ff000
+#define MDM9607_BASE0_SHIFT0
+#define MDM9607_BASE1_SHIFT12
+
+#define MDM9607_S0_P1_MASK 0x3f00
+#define MDM9607_S1_P1_MASK 0x03f0
+#define MDM9607_S2_P1_MASK 0x003f
+#define MDM9607_S3_P1_MASK 0x0003f000
+#define MDM9607_S4_P1_MASK 0x003f
+
+#define MDM9607_S0_P2_MASK 0x000fc000
+#define MDM9607_S1_P2_MASK 0xfc00
+#define MDM9607_S2_P2_MASK 0x0fc0
+#define MDM9607_S3_P2_MASK 0x00fc
+#define MDM9607_S4_P2_MASK 0x0fc0
+
+#define MDM9607_S0_P1_SHIFT8
+#define MDM9607_S1_P1_SHIFT20
+#define MDM9607_S2_P1_SHIFT0
+#define MDM9607_S3_P1_SHIFT12
+#define MDM9607_S4_P1_SHIFT0
+
+#define MDM9607_S0_P2_SHIFT14
+#define MDM9607_S1_P2_SHIFT26
+#define MDM9607_S2_P2_SHIFT6
+#define MDM9607_S3_P2_SHIFT18
+#define MDM9607_S4_P2_SHIFT6
+
+#define MDM9607_CAL_SEL_MASK   0x0070
+#define MDM9607_CAL_SEL_SHIFT  20
+
 #define S0_P1_SHIFT8
 #define S1_P1_SHIFT14
 #define S2_P1_SHIFT20
@@ -452,7 +485,57 @@ static int calibrate_8974(struct tsens_priv *priv)
return 0;
 }
 
-/* v0.1: 8916, 8939, 8974 */
+static int calibrate_9607(struct tsens_priv *priv)
+{
+   int base0 = 0, base1 = 0, i;
+   u32 p1[5], p2[5];
+   int mode = 0;
+   u32 *qfprom_cdata, *qfprom_csel;
+
+   qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
+   if (IS_ERR(qfprom_cdata))
+   return PTR_ERR(qfprom_cdata);
+
+   mode = (qfprom_cdata[2] & MDM9607_CAL_SEL_MASK) >> 
MDM9607_CAL_SEL_SHIFT;
+   dev_dbg(priv->dev, "calibration mode is %d\n", mode);
+
+   switch (mode) {
+   case TWO_PT_CALIB:
+   base1 = (qfprom_cdata[2] & MDM9607_BASE1_MASK) >> 
MDM9607_BASE1_SHIFT;
+   p2[0] = (qfprom_cdata[0] & MDM9607_S0_P2_MASK) >> 
MDM9607_S0_P2_SHIFT;
+   p2[1] = (qfprom_cdata[0] & MDM9607_S1_P2_MASK) >> 
MDM9607_S1_P2_SHIFT;
+   p2[2] = (qfprom_cdata[1] & MDM9607_S2_P2_MASK) >> 
MDM9607_S2_P2_SHIFT;
+   p2[3] = (qfprom_cdata[1] & MDM9607_S3_P2_MASK) >> 
MDM9607_S3_P2_SHIFT;
+   p2[4] = (qfprom_cdata[2] & MDM9607_S4_P2_MASK) >> 
MDM9607_S4_P2_SHIFT;
+   for (i = 0; i < priv->num_sensors; i++)
+   p2[i] = ((base1 + p2[i]) << 2);
+   fallthrough;
+   case ONE_PT_CALIB2:
+   base0 = (qfprom_cdata[0] & MDM9607_BASE0_MASK);
+   p1[0] = (qfprom_cdata[0] & MDM9607_S0_P1_MASK) >> 
MDM9607_S0_P1_SHIFT;
+   p1[1] = (qfprom_cdata[0] & MDM9607_S1_P1_MASK) >> 
MDM9607_S1_P1_SHIFT;
+   p1[2] = (qfprom_cdata[1] & MDM9607_S2_P1_MASK) >> 
MDM9607_S2_P1_SHIFT;
+   p1[3] = (qfprom_cdata[1] & MDM9607_S3_P1_MASK) >> 
MDM9607_S3_P1_SHIFT;
+   p1[4] = (qfprom_cdata[2] & MDM9607_S4_P1_MASK) >> 
MDM9607_S4_P1_SHIFT;
+   for (i = 0; i < priv->num_sensors; i++)
+   p1[i] = (((base0) + p1[i]) << 2);
+   break;
+   default:
+   for (i = 0; i < priv->num_sensors; i++) {
+   p1[i] = 500;
+   p2[i] = 780;
+   }
+   break;
+   }
+
+   compute_intercept_slope(priv, p1, p2, mode);
+   kfree(qfprom_cdata);
+   kfree(qfprom_csel);
+
+   return 0;
+}
+

Re: [PATCH] thermal: qcom: tsens-v0_1: Add support for MDM9607

Re: [PATCH] thermal: qcom: tsens-v0_1: Add support for MDM9607

[PATCH] thermal: qcom: tsens-v0_1: Add support for MDM9607

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