Re: [tpmdd-devel] [RESEND][PATCH] tpm: read burstcount from TPM_STS in one 32-bit transaction

[Jarkko Sakkinen]

On Fri, Jul 01, 2016 at 11:45:45AM +0300, Jarkko Sakkinen wrote:
> On Fri, Jul 01, 2016 at 11:43:23AM +0300, Jarkko Sakkinen wrote:
> > On Thu, Jun 30, 2016 at 10:25:43AM -0700, apro...@chromium.org wrote:
> > > From: Andrey Pronin 
> > > 
> > > Some chips incorrectly support partial reads from TPM_STS register
> > > at non-zero offsets. Read the entire 32-bits register instead of
> > > making two 8-bit reads to support such devices and reduce the number
> > > of bus transactions when obtaining the burstcount from TPM_STS.
> > > 
> > > Signed-off-by: Andrey Pronin 
> > 
> > Reviewed-by: Jarkko Sakkinen 
> 
> Applied to my master branch.

I added also added a fixes line.

/Jarkko

Re: [tpmdd-devel] [RESEND][PATCH] tpm: read burstcount from TPM_STS in one 32-bit transaction

[Jarkko Sakkinen]

On Fri, Jul 01, 2016 at 11:45:45AM +0300, Jarkko Sakkinen wrote:
> On Fri, Jul 01, 2016 at 11:43:23AM +0300, Jarkko Sakkinen wrote:
> > On Thu, Jun 30, 2016 at 10:25:43AM -0700, apro...@chromium.org wrote:
> > > From: Andrey Pronin 
> > > 
> > > Some chips incorrectly support partial reads from TPM_STS register
> > > at non-zero offsets. Read the entire 32-bits register instead of
> > > making two 8-bit reads to support such devices and reduce the number
> > > of bus transactions when obtaining the burstcount from TPM_STS.
> > > 
> > > Signed-off-by: Andrey Pronin 
> > 
> > Reviewed-by: Jarkko Sakkinen 
> 
> Applied to my master branch.

I added also added a fixes line.

/Jarkko

Re: [RESEND][PATCH] tpm: read burstcount from TPM_STS in one 32-bit transaction

[Jarkko Sakkinen]

On Fri, Jul 01, 2016 at 11:43:23AM +0300, Jarkko Sakkinen wrote:
> On Thu, Jun 30, 2016 at 10:25:43AM -0700, apro...@chromium.org wrote:
> > From: Andrey Pronin 
> > 
> > Some chips incorrectly support partial reads from TPM_STS register
> > at non-zero offsets. Read the entire 32-bits register instead of
> > making two 8-bit reads to support such devices and reduce the number
> > of bus transactions when obtaining the burstcount from TPM_STS.
> > 
> > Signed-off-by: Andrey Pronin 
> 
> Reviewed-by: Jarkko Sakkinen 

Applied to my master branch.

/Jarkko

> 
> /Jarkko
> 
> > ---
> > 
> > No changes. 
> > Re-sending to tpmdd-devel member-only list after subscribing.
> > 
> >  drivers/char/tpm/tpm_tis_core.c | 11 +++
> >  1 file changed, 3 insertions(+), 8 deletions(-)
> > 
> > diff --git a/drivers/char/tpm/tpm_tis_core.c 
> > b/drivers/char/tpm/tpm_tis_core.c
> > index 03a06b3..8110b52 100644
> > --- a/drivers/char/tpm/tpm_tis_core.c
> > +++ b/drivers/char/tpm/tpm_tis_core.c
> > @@ -157,22 +157,17 @@ static int get_burstcount(struct tpm_chip *chip)
> > struct tpm_tis_data *priv = dev_get_drvdata(>dev);
> > unsigned long stop;
> > int burstcnt, rc;
> > -   u8 value;
> > +   u32 value;
> >  
> > /* wait for burstcount */
> > /* which timeout value, spec has 2 answers (c & d) */
> > stop = jiffies + chip->timeout_d;
> > do {
> > -   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 1, );
> > +   rc = tpm_tis_read32(priv, TPM_STS(priv->locality), );
> > if (rc < 0)
> > return rc;
> >  
> > -   burstcnt = value;
> > -   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 2, );
> > -   if (rc < 0)
> > -   return rc;
> > -
> > -   burstcnt += value << 8;
> > +   burstcnt = (value >> 8) & 0x;
> > if (burstcnt)
> > return burstcnt;
> > msleep(TPM_TIMEOUT);
> > -- 
> > 2.6.6
> > 

Re: [RESEND][PATCH] tpm: read burstcount from TPM_STS in one 32-bit transaction

[Jarkko Sakkinen]

On Fri, Jul 01, 2016 at 11:43:23AM +0300, Jarkko Sakkinen wrote:
> On Thu, Jun 30, 2016 at 10:25:43AM -0700, apro...@chromium.org wrote:
> > From: Andrey Pronin 
> > 
> > Some chips incorrectly support partial reads from TPM_STS register
> > at non-zero offsets. Read the entire 32-bits register instead of
> > making two 8-bit reads to support such devices and reduce the number
> > of bus transactions when obtaining the burstcount from TPM_STS.
> > 
> > Signed-off-by: Andrey Pronin 
> 
> Reviewed-by: Jarkko Sakkinen 

Applied to my master branch.

/Jarkko

> 
> /Jarkko
> 
> > ---
> > 
> > No changes. 
> > Re-sending to tpmdd-devel member-only list after subscribing.
> > 
> >  drivers/char/tpm/tpm_tis_core.c | 11 +++
> >  1 file changed, 3 insertions(+), 8 deletions(-)
> > 
> > diff --git a/drivers/char/tpm/tpm_tis_core.c 
> > b/drivers/char/tpm/tpm_tis_core.c
> > index 03a06b3..8110b52 100644
> > --- a/drivers/char/tpm/tpm_tis_core.c
> > +++ b/drivers/char/tpm/tpm_tis_core.c
> > @@ -157,22 +157,17 @@ static int get_burstcount(struct tpm_chip *chip)
> > struct tpm_tis_data *priv = dev_get_drvdata(>dev);
> > unsigned long stop;
> > int burstcnt, rc;
> > -   u8 value;
> > +   u32 value;
> >  
> > /* wait for burstcount */
> > /* which timeout value, spec has 2 answers (c & d) */
> > stop = jiffies + chip->timeout_d;
> > do {
> > -   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 1, );
> > +   rc = tpm_tis_read32(priv, TPM_STS(priv->locality), );
> > if (rc < 0)
> > return rc;
> >  
> > -   burstcnt = value;
> > -   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 2, );
> > -   if (rc < 0)
> > -   return rc;
> > -
> > -   burstcnt += value << 8;
> > +   burstcnt = (value >> 8) & 0x;
> > if (burstcnt)
> > return burstcnt;
> > msleep(TPM_TIMEOUT);
> > -- 
> > 2.6.6
> > 

Re: [RESEND][PATCH] tpm: read burstcount from TPM_STS in one 32-bit transaction

[Jarkko Sakkinen]

On Thu, Jun 30, 2016 at 10:25:43AM -0700, apro...@chromium.org wrote:
> From: Andrey Pronin 
> 
> Some chips incorrectly support partial reads from TPM_STS register
> at non-zero offsets. Read the entire 32-bits register instead of
> making two 8-bit reads to support such devices and reduce the number
> of bus transactions when obtaining the burstcount from TPM_STS.
> 
> Signed-off-by: Andrey Pronin 

Reviewed-by: Jarkko Sakkinen 

/Jarkko

> ---
> 
> No changes. 
> Re-sending to tpmdd-devel member-only list after subscribing.
> 
>  drivers/char/tpm/tpm_tis_core.c | 11 +++
>  1 file changed, 3 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c
> index 03a06b3..8110b52 100644
> --- a/drivers/char/tpm/tpm_tis_core.c
> +++ b/drivers/char/tpm/tpm_tis_core.c
> @@ -157,22 +157,17 @@ static int get_burstcount(struct tpm_chip *chip)
>   struct tpm_tis_data *priv = dev_get_drvdata(>dev);
>   unsigned long stop;
>   int burstcnt, rc;
> - u8 value;
> + u32 value;
>  
>   /* wait for burstcount */
>   /* which timeout value, spec has 2 answers (c & d) */
>   stop = jiffies + chip->timeout_d;
>   do {
> - rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 1, );
> + rc = tpm_tis_read32(priv, TPM_STS(priv->locality), );
>   if (rc < 0)
>   return rc;
>  
> - burstcnt = value;
> - rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 2, );
> - if (rc < 0)
> - return rc;
> -
> - burstcnt += value << 8;
> + burstcnt = (value >> 8) & 0x;
>   if (burstcnt)
>   return burstcnt;
>   msleep(TPM_TIMEOUT);
> -- 
> 2.6.6
> 

Re: [RESEND][PATCH] tpm: read burstcount from TPM_STS in one 32-bit transaction

[Jarkko Sakkinen]

On Thu, Jun 30, 2016 at 10:25:43AM -0700, apro...@chromium.org wrote:
> From: Andrey Pronin 
> 
> Some chips incorrectly support partial reads from TPM_STS register
> at non-zero offsets. Read the entire 32-bits register instead of
> making two 8-bit reads to support such devices and reduce the number
> of bus transactions when obtaining the burstcount from TPM_STS.
> 
> Signed-off-by: Andrey Pronin 

Reviewed-by: Jarkko Sakkinen 

/Jarkko

> ---
> 
> No changes. 
> Re-sending to tpmdd-devel member-only list after subscribing.
> 
>  drivers/char/tpm/tpm_tis_core.c | 11 +++
>  1 file changed, 3 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c
> index 03a06b3..8110b52 100644
> --- a/drivers/char/tpm/tpm_tis_core.c
> +++ b/drivers/char/tpm/tpm_tis_core.c
> @@ -157,22 +157,17 @@ static int get_burstcount(struct tpm_chip *chip)
>   struct tpm_tis_data *priv = dev_get_drvdata(>dev);
>   unsigned long stop;
>   int burstcnt, rc;
> - u8 value;
> + u32 value;
>  
>   /* wait for burstcount */
>   /* which timeout value, spec has 2 answers (c & d) */
>   stop = jiffies + chip->timeout_d;
>   do {
> - rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 1, );
> + rc = tpm_tis_read32(priv, TPM_STS(priv->locality), );
>   if (rc < 0)
>   return rc;
>  
> - burstcnt = value;
> - rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 2, );
> - if (rc < 0)
> - return rc;
> -
> - burstcnt += value << 8;
> + burstcnt = (value >> 8) & 0x;
>   if (burstcnt)
>   return burstcnt;
>   msleep(TPM_TIMEOUT);
> -- 
> 2.6.6
> 

[RESEND][PATCH] tpm: read burstcount from TPM_STS in one 32-bit transaction

[apronin]

From: Andrey Pronin 

Some chips incorrectly support partial reads from TPM_STS register
at non-zero offsets. Read the entire 32-bits register instead of
making two 8-bit reads to support such devices and reduce the number
of bus transactions when obtaining the burstcount from TPM_STS.

Signed-off-by: Andrey Pronin 
---

No changes. 
Re-sending to tpmdd-devel member-only list after subscribing.

 drivers/char/tpm/tpm_tis_core.c | 11 +++
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c
index 03a06b3..8110b52 100644
--- a/drivers/char/tpm/tpm_tis_core.c
+++ b/drivers/char/tpm/tpm_tis_core.c
@@ -157,22 +157,17 @@ static int get_burstcount(struct tpm_chip *chip)
struct tpm_tis_data *priv = dev_get_drvdata(>dev);
unsigned long stop;
int burstcnt, rc;
-   u8 value;
+   u32 value;
 
/* wait for burstcount */
/* which timeout value, spec has 2 answers (c & d) */
stop = jiffies + chip->timeout_d;
do {
-   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 1, );
+   rc = tpm_tis_read32(priv, TPM_STS(priv->locality), );
if (rc < 0)
return rc;
 
-   burstcnt = value;
-   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 2, );
-   if (rc < 0)
-   return rc;
-
-   burstcnt += value << 8;
+   burstcnt = (value >> 8) & 0x;
if (burstcnt)
return burstcnt;
msleep(TPM_TIMEOUT);
-- 
2.6.6

[RESEND][PATCH] tpm: read burstcount from TPM_STS in one 32-bit transaction

[apronin]

From: Andrey Pronin 

Some chips incorrectly support partial reads from TPM_STS register
at non-zero offsets. Read the entire 32-bits register instead of
making two 8-bit reads to support such devices and reduce the number
of bus transactions when obtaining the burstcount from TPM_STS.

Signed-off-by: Andrey Pronin 
---

No changes. 
Re-sending to tpmdd-devel member-only list after subscribing.

 drivers/char/tpm/tpm_tis_core.c | 11 +++
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c
index 03a06b3..8110b52 100644
--- a/drivers/char/tpm/tpm_tis_core.c
+++ b/drivers/char/tpm/tpm_tis_core.c
@@ -157,22 +157,17 @@ static int get_burstcount(struct tpm_chip *chip)
struct tpm_tis_data *priv = dev_get_drvdata(>dev);
unsigned long stop;
int burstcnt, rc;
-   u8 value;
+   u32 value;
 
/* wait for burstcount */
/* which timeout value, spec has 2 answers (c & d) */
stop = jiffies + chip->timeout_d;
do {
-   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 1, );
+   rc = tpm_tis_read32(priv, TPM_STS(priv->locality), );
if (rc < 0)
return rc;
 
-   burstcnt = value;
-   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 2, );
-   if (rc < 0)
-   return rc;
-
-   burstcnt += value << 8;
+   burstcnt = (value >> 8) & 0x;
if (burstcnt)
return burstcnt;
msleep(TPM_TIMEOUT);
-- 
2.6.6

[PATCH] tpm: read burstcount from TPM_STS in one 32-bit transaction

[apronin]

From: Andrey Pronin 

Some chips incorrectly support partial reads from TPM_STS register
at non-zero offsets. Read the entire 32-bits register instead of
making two 8-bit reads to support such devices and reduce the number
of bus transactions when obtaining the burstcount from TPM_STS.

Signed-off-by: Andrey Pronin 
---
 drivers/char/tpm/tpm_tis_core.c | 11 +++
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c
index 03a06b3..8110b52 100644
--- a/drivers/char/tpm/tpm_tis_core.c
+++ b/drivers/char/tpm/tpm_tis_core.c
@@ -157,22 +157,17 @@ static int get_burstcount(struct tpm_chip *chip)
struct tpm_tis_data *priv = dev_get_drvdata(>dev);
unsigned long stop;
int burstcnt, rc;
-   u8 value;
+   u32 value;
 
/* wait for burstcount */
/* which timeout value, spec has 2 answers (c & d) */
stop = jiffies + chip->timeout_d;
do {
-   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 1, );
+   rc = tpm_tis_read32(priv, TPM_STS(priv->locality), );
if (rc < 0)
return rc;
 
-   burstcnt = value;
-   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 2, );
-   if (rc < 0)
-   return rc;
-
-   burstcnt += value << 8;
+   burstcnt = (value >> 8) & 0x;
if (burstcnt)
return burstcnt;
msleep(TPM_TIMEOUT);
-- 
2.6.6

[PATCH] tpm: read burstcount from TPM_STS in one 32-bit transaction

[apronin]

From: Andrey Pronin 

Some chips incorrectly support partial reads from TPM_STS register
at non-zero offsets. Read the entire 32-bits register instead of
making two 8-bit reads to support such devices and reduce the number
of bus transactions when obtaining the burstcount from TPM_STS.

Signed-off-by: Andrey Pronin 
---
 drivers/char/tpm/tpm_tis_core.c | 11 +++
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c
index 03a06b3..8110b52 100644
--- a/drivers/char/tpm/tpm_tis_core.c
+++ b/drivers/char/tpm/tpm_tis_core.c
@@ -157,22 +157,17 @@ static int get_burstcount(struct tpm_chip *chip)
struct tpm_tis_data *priv = dev_get_drvdata(>dev);
unsigned long stop;
int burstcnt, rc;
-   u8 value;
+   u32 value;
 
/* wait for burstcount */
/* which timeout value, spec has 2 answers (c & d) */
stop = jiffies + chip->timeout_d;
do {
-   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 1, );
+   rc = tpm_tis_read32(priv, TPM_STS(priv->locality), );
if (rc < 0)
return rc;
 
-   burstcnt = value;
-   rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 2, );
-   if (rc < 0)
-   return rc;
-
-   burstcnt += value << 8;
+   burstcnt = (value >> 8) & 0x;
if (burstcnt)
return burstcnt;
msleep(TPM_TIMEOUT);
-- 
2.6.6