Re: [PATCH] x86 tsc: Add the Intel Denverton Processor to native_calibrate_tsc()

[Len Brown]

> Already upstream, as per:
>
>   695085b4bc76 x86/tsc: Add the Intel Denverton Processor to 
> native_calibrate_tsc()

Thanks, Ingo,
Sorry for the repeat.

Len Brown, Intel Open Source Technology Center

Re: [PATCH] x86 tsc: Add the Intel Denverton Processor to native_calibrate_tsc()

[Len Brown]

> Already upstream, as per:
>
>   695085b4bc76 x86/tsc: Add the Intel Denverton Processor to 
> native_calibrate_tsc()

Thanks, Ingo,
Sorry for the repeat.

Len Brown, Intel Open Source Technology Center

Re: [PATCH] x86 tsc: Add the Intel Denverton Processor to native_calibrate_tsc()

[Ingo Molnar]

* Len Brown  wrote:

> From: Len Brown 
> 
> The Intel Denverton microserver uses a 25 MHz TSC crystal,
> so we can derive its exact * TSC frequency
> using CPUID and some arithmetic, eg.
> 
> TSC: 1800 MHz (2500 Hz * 216 / 3 / 100)
> 
> * 'exact' is only as good as the crystal, which should be +/- 20ppm
> 
> Signed-off-by: Len Brown 
> ---
>  arch/x86/kernel/tsc.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
> index 46b2f41f8b05..b3e397a0f29d 100644
> --- a/arch/x86/kernel/tsc.c
> +++ b/arch/x86/kernel/tsc.c
> @@ -694,6 +694,7 @@ unsigned long native_calibrate_tsc(void)
>   crystal_khz = 24000;/* 24.0 MHz */
>   break;
>   case INTEL_FAM6_SKYLAKE_X:
> + case INTEL_FAM6_ATOM_DENVERTON:
>   crystal_khz = 25000;/* 25.0 MHz */
>   break;
>   case INTEL_FAM6_ATOM_GOLDMONT:

Already upstream, as per:

  695085b4bc76 x86/tsc: Add the Intel Denverton Processor to 
native_calibrate_tsc()

Thanks,

Ingo

Re: [PATCH] x86 tsc: Add the Intel Denverton Processor to native_calibrate_tsc()

[Ingo Molnar]

* Len Brown  wrote:

> From: Len Brown 
> 
> The Intel Denverton microserver uses a 25 MHz TSC crystal,
> so we can derive its exact * TSC frequency
> using CPUID and some arithmetic, eg.
> 
> TSC: 1800 MHz (2500 Hz * 216 / 3 / 100)
> 
> * 'exact' is only as good as the crystal, which should be +/- 20ppm
> 
> Signed-off-by: Len Brown 
> ---
>  arch/x86/kernel/tsc.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
> index 46b2f41f8b05..b3e397a0f29d 100644
> --- a/arch/x86/kernel/tsc.c
> +++ b/arch/x86/kernel/tsc.c
> @@ -694,6 +694,7 @@ unsigned long native_calibrate_tsc(void)
>   crystal_khz = 24000;/* 24.0 MHz */
>   break;
>   case INTEL_FAM6_SKYLAKE_X:
> + case INTEL_FAM6_ATOM_DENVERTON:
>   crystal_khz = 25000;/* 25.0 MHz */
>   break;
>   case INTEL_FAM6_ATOM_GOLDMONT:

Already upstream, as per:

  695085b4bc76 x86/tsc: Add the Intel Denverton Processor to 
native_calibrate_tsc()

Thanks,

Ingo

[PATCH] x86 tsc: Add the Intel Denverton Processor to native_calibrate_tsc()

[Len Brown]

From: Len Brown 

The Intel Denverton microserver uses a 25 MHz TSC crystal,
so we can derive its exact * TSC frequency
using CPUID and some arithmetic, eg.

TSC: 1800 MHz (2500 Hz * 216 / 3 / 100)

* 'exact' is only as good as the crystal, which should be +/- 20ppm

Signed-off-by: Len Brown 
---
 arch/x86/kernel/tsc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 46b2f41f8b05..b3e397a0f29d 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -694,6 +694,7 @@ unsigned long native_calibrate_tsc(void)
crystal_khz = 24000;/* 24.0 MHz */
break;
case INTEL_FAM6_SKYLAKE_X:
+   case INTEL_FAM6_ATOM_DENVERTON:
crystal_khz = 25000;/* 25.0 MHz */
break;
case INTEL_FAM6_ATOM_GOLDMONT:
-- 
2.11.0.161.g6610af872

[PATCH] x86 tsc: Add the Intel Denverton Processor to native_calibrate_tsc()

[Len Brown]

From: Len Brown 

The Intel Denverton microserver uses a 25 MHz TSC crystal,
so we can derive its exact * TSC frequency
using CPUID and some arithmetic, eg.

TSC: 1800 MHz (2500 Hz * 216 / 3 / 100)

* 'exact' is only as good as the crystal, which should be +/- 20ppm

Signed-off-by: Len Brown 
---
 arch/x86/kernel/tsc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 46b2f41f8b05..b3e397a0f29d 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -694,6 +694,7 @@ unsigned long native_calibrate_tsc(void)
crystal_khz = 24000;/* 24.0 MHz */
break;
case INTEL_FAM6_SKYLAKE_X:
+   case INTEL_FAM6_ATOM_DENVERTON:
crystal_khz = 25000;/* 25.0 MHz */
break;
case INTEL_FAM6_ATOM_GOLDMONT:
-- 
2.11.0.161.g6610af872

[PATCH] x86 tsc: Add the Intel Denverton Processor to native_calibrate_tsc()

[Len Brown]

From: Len Brown 

The Intel Denverton microserver uses a 25 MHz TSC crystal,
so we can derive its exact * TSC frequency
using CPUID and some arithmetic, eg.

TSC: 1800 MHz (2500 Hz * 216 / 3 / 100)

* 'exact' is only as good as the crystal, which should be +/- 20ppm

Signed-off-by: Len Brown 
---
 arch/x86/kernel/tsc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 46b2f41f8b05..b3e397a0f29d 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -694,6 +694,7 @@ unsigned long native_calibrate_tsc(void)
crystal_khz = 24000;/* 24.0 MHz */
break;
case INTEL_FAM6_SKYLAKE_X:
+   case INTEL_FAM6_ATOM_DENVERTON:
crystal_khz = 25000;/* 25.0 MHz */
break;
case INTEL_FAM6_ATOM_GOLDMONT:
-- 
2.11.0.161.g6610af872

[PATCH] x86 tsc: Add the Intel Denverton Processor to native_calibrate_tsc()

[Len Brown]

From: Len Brown 

The Intel Denverton microserver uses a 25 MHz TSC crystal,
so we can derive its exact * TSC frequency
using CPUID and some arithmetic, eg.

TSC: 1800 MHz (2500 Hz * 216 / 3 / 100)

* 'exact' is only as good as the crystal, which should be +/- 20ppm

Signed-off-by: Len Brown 
---
 arch/x86/kernel/tsc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 46b2f41f8b05..b3e397a0f29d 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -694,6 +694,7 @@ unsigned long native_calibrate_tsc(void)
crystal_khz = 24000;/* 24.0 MHz */
break;
case INTEL_FAM6_SKYLAKE_X:
+   case INTEL_FAM6_ATOM_DENVERTON:
crystal_khz = 25000;/* 25.0 MHz */
break;
case INTEL_FAM6_ATOM_GOLDMONT:
-- 
2.11.0.161.g6610af872