Re: [PATCH 02/11] clk: microchip: Initialize SOSC clock rate for PIC32MZDA.

2016-08-24 Thread Stephen Boyd
On 05/17, Purna Chandra Mandal wrote:
> Optional SOSC is an external fixed clock running at 32768HZ.
> So Initialize SOSC rate as per PIC32MZDA datasheet.
> 
> Signed-off-by: Purna Chandra Mandal 
> 
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project


Re: [PATCH 02/11] clk: microchip: Initialize SOSC clock rate for PIC32MZDA.

2016-08-24 Thread Stephen Boyd
On 05/17, Purna Chandra Mandal wrote:
> Optional SOSC is an external fixed clock running at 32768HZ.
> So Initialize SOSC rate as per PIC32MZDA datasheet.
> 
> Signed-off-by: Purna Chandra Mandal 
> 
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project


[PATCH 02/11] clk: microchip: Initialize SOSC clock rate for PIC32MZDA.

2016-05-16 Thread Purna Chandra Mandal
Optional SOSC is an external fixed clock running at 32768HZ.
So Initialize SOSC rate as per PIC32MZDA datasheet.

Signed-off-by: Purna Chandra Mandal 

---
Note: Please pull this complete series through the MIPS tree.

---

 drivers/clk/microchip/clk-pic32mzda.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/microchip/clk-pic32mzda.c 
b/drivers/clk/microchip/clk-pic32mzda.c
index 020a29a..210694b 100644
--- a/drivers/clk/microchip/clk-pic32mzda.c
+++ b/drivers/clk/microchip/clk-pic32mzda.c
@@ -118,6 +118,7 @@ static const struct pic32_sec_osc_data sosc_clk = {
.status_reg = 0x1d0,
.enable_mask = BIT(1),
.status_mask = BIT(4),
+   .fixed_rate = 32768,
.init_data = {
.name = "sosc_clk",
.parent_names = NULL,
-- 
1.8.3.1



[PATCH 02/11] clk: microchip: Initialize SOSC clock rate for PIC32MZDA.

2016-05-16 Thread Purna Chandra Mandal
Optional SOSC is an external fixed clock running at 32768HZ.
So Initialize SOSC rate as per PIC32MZDA datasheet.

Signed-off-by: Purna Chandra Mandal 

---
Note: Please pull this complete series through the MIPS tree.

---

 drivers/clk/microchip/clk-pic32mzda.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/microchip/clk-pic32mzda.c 
b/drivers/clk/microchip/clk-pic32mzda.c
index 020a29a..210694b 100644
--- a/drivers/clk/microchip/clk-pic32mzda.c
+++ b/drivers/clk/microchip/clk-pic32mzda.c
@@ -118,6 +118,7 @@ static const struct pic32_sec_osc_data sosc_clk = {
.status_reg = 0x1d0,
.enable_mask = BIT(1),
.status_mask = BIT(4),
+   .fixed_rate = 32768,
.init_data = {
.name = "sosc_clk",
.parent_names = NULL,
-- 
1.8.3.1