Re: [PATCH 02/11] dt-bindings: clk: Extend binding doc for Stingray SOC

2017-05-14 Thread Anup Patel 
On Fri, May 12, 2017 at 8:51 PM, Rob Herring  wrote:
> On Sat, May 06, 2017 at 05:24:37PM +0530, Anup Patel wrote:
>> From: Sandeep Tripathy 
>>
>> Update iproc clock dt-binding documentation with
>> Stingray pll and clock details.
>>
>> Signed-off-by: Sandeep Tripathy 
>> Reviewed-by: Ray Jui 
>> Reviewed-by: Scott Branden 
>> ---
>>  .../bindings/clock/brcm,iproc-clocks.txt   | 76 
>> ++
>>  1 file changed, 76 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt 
>> b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
>> index 6f66e9a..f2c5f0e4a 100644
>> --- a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
>> +++ b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
>> @@ -219,3 +219,79 @@ BCM63138
>>  
>>  PLL and leaf clock compatible strings for BCM63138 are:
>>  "brcm,bcm63138-armpll"
>> +
>> +Stingray
>> +---
>> +PLL and leaf clock compatible strings for Stingray are:
>> +"brcm,sr-genpll0"
>> +"brcm,sr-genpll1"
>> +"brcm,sr-genpll2"
>> +"brcm,sr-genpll3"
>> +"brcm,sr-genpll4"
>> +"brcm,sr-genpll5"
>> +"brcm,sr-genpll6"
>> +
>> +"brcm,sr-lcpll0"
>> +"brcm,sr-lcpll1"
>> +"brcm,sr-lcpll-pcie"
>> +
>> +
>> +The following table defines the set of PLL/clock index and ID for Stingray.
>> +These clock IDs are defined in:
>> +"include/dt-bindings/clock/bcm-sr.h"
>
> This header should be part of this commit. With that,

Sure, I will include bcm-sr.h as-part of this commit.

>
> Acked-by: Rob Herring 

Thanks,
Anup

Re: [PATCH 02/11] dt-bindings: clk: Extend binding doc for Stingray SOC

2017-05-14 Thread Anup Patel 
On Fri, May 12, 2017 at 8:51 PM, Rob Herring  wrote:
> On Sat, May 06, 2017 at 05:24:37PM +0530, Anup Patel wrote:
>> From: Sandeep Tripathy 
>>
>> Update iproc clock dt-binding documentation with
>> Stingray pll and clock details.
>>
>> Signed-off-by: Sandeep Tripathy 
>> Reviewed-by: Ray Jui 
>> Reviewed-by: Scott Branden 
>> ---
>>  .../bindings/clock/brcm,iproc-clocks.txt   | 76 
>> ++
>>  1 file changed, 76 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt 
>> b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
>> index 6f66e9a..f2c5f0e4a 100644
>> --- a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
>> +++ b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
>> @@ -219,3 +219,79 @@ BCM63138
>>  
>>  PLL and leaf clock compatible strings for BCM63138 are:
>>  "brcm,bcm63138-armpll"
>> +
>> +Stingray
>> +---
>> +PLL and leaf clock compatible strings for Stingray are:
>> +"brcm,sr-genpll0"
>> +"brcm,sr-genpll1"
>> +"brcm,sr-genpll2"
>> +"brcm,sr-genpll3"
>> +"brcm,sr-genpll4"
>> +"brcm,sr-genpll5"
>> +"brcm,sr-genpll6"
>> +
>> +"brcm,sr-lcpll0"
>> +"brcm,sr-lcpll1"
>> +"brcm,sr-lcpll-pcie"
>> +
>> +
>> +The following table defines the set of PLL/clock index and ID for Stingray.
>> +These clock IDs are defined in:
>> +"include/dt-bindings/clock/bcm-sr.h"
>
> This header should be part of this commit. With that,

Sure, I will include bcm-sr.h as-part of this commit.

>
> Acked-by: Rob Herring 

Thanks,
Anup

Re: [PATCH 02/11] dt-bindings: clk: Extend binding doc for Stingray SOC

2017-05-12 Thread Rob Herring 
On Sat, May 06, 2017 at 05:24:37PM +0530, Anup Patel wrote:
> From: Sandeep Tripathy 
> 
> Update iproc clock dt-binding documentation with
> Stingray pll and clock details.
> 
> Signed-off-by: Sandeep Tripathy 
> Reviewed-by: Ray Jui 
> Reviewed-by: Scott Branden 
> ---
>  .../bindings/clock/brcm,iproc-clocks.txt   | 76 
> ++
>  1 file changed, 76 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt 
> b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
> index 6f66e9a..f2c5f0e4a 100644
> --- a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
> +++ b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
> @@ -219,3 +219,79 @@ BCM63138
>  
>  PLL and leaf clock compatible strings for BCM63138 are:
>  "brcm,bcm63138-armpll"
> +
> +Stingray
> +---
> +PLL and leaf clock compatible strings for Stingray are:
> +"brcm,sr-genpll0"
> +"brcm,sr-genpll1"
> +"brcm,sr-genpll2"
> +"brcm,sr-genpll3"
> +"brcm,sr-genpll4"
> +"brcm,sr-genpll5"
> +"brcm,sr-genpll6"
> +
> +"brcm,sr-lcpll0"
> +"brcm,sr-lcpll1"
> +"brcm,sr-lcpll-pcie"
> +
> +
> +The following table defines the set of PLL/clock index and ID for Stingray.
> +These clock IDs are defined in:
> +"include/dt-bindings/clock/bcm-sr.h"

This header should be part of this commit. With that,

Acked-by: Rob Herring

Re: [PATCH 02/11] dt-bindings: clk: Extend binding doc for Stingray SOC

2017-05-12 Thread Rob Herring 
On Sat, May 06, 2017 at 05:24:37PM +0530, Anup Patel wrote:
> From: Sandeep Tripathy 
> 
> Update iproc clock dt-binding documentation with
> Stingray pll and clock details.
> 
> Signed-off-by: Sandeep Tripathy 
> Reviewed-by: Ray Jui 
> Reviewed-by: Scott Branden 
> ---
>  .../bindings/clock/brcm,iproc-clocks.txt   | 76 
> ++
>  1 file changed, 76 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt 
> b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
> index 6f66e9a..f2c5f0e4a 100644
> --- a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
> +++ b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
> @@ -219,3 +219,79 @@ BCM63138
>  
>  PLL and leaf clock compatible strings for BCM63138 are:
>  "brcm,bcm63138-armpll"
> +
> +Stingray
> +---
> +PLL and leaf clock compatible strings for Stingray are:
> +"brcm,sr-genpll0"
> +"brcm,sr-genpll1"
> +"brcm,sr-genpll2"
> +"brcm,sr-genpll3"
> +"brcm,sr-genpll4"
> +"brcm,sr-genpll5"
> +"brcm,sr-genpll6"
> +
> +"brcm,sr-lcpll0"
> +"brcm,sr-lcpll1"
> +"brcm,sr-lcpll-pcie"
> +
> +
> +The following table defines the set of PLL/clock index and ID for Stingray.
> +These clock IDs are defined in:
> +"include/dt-bindings/clock/bcm-sr.h"

This header should be part of this commit. With that,

Acked-by: Rob Herring

[PATCH 02/11] dt-bindings: clk: Extend binding doc for Stingray SOC

2017-05-06 Thread Anup Patel 
From: Sandeep Tripathy 

Update iproc clock dt-binding documentation with
Stingray pll and clock details.

Signed-off-by: Sandeep Tripathy 
Reviewed-by: Ray Jui 
Reviewed-by: Scott Branden 
---
 .../bindings/clock/brcm,iproc-clocks.txt   | 76 ++
 1 file changed, 76 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt 
b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
index 6f66e9a..f2c5f0e4a 100644
--- a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
@@ -219,3 +219,79 @@ BCM63138
 
 PLL and leaf clock compatible strings for BCM63138 are:
 "brcm,bcm63138-armpll"
+
+Stingray
+---
+PLL and leaf clock compatible strings for Stingray are:
+"brcm,sr-genpll0"
+"brcm,sr-genpll1"
+"brcm,sr-genpll2"
+"brcm,sr-genpll3"
+"brcm,sr-genpll4"
+"brcm,sr-genpll5"
+"brcm,sr-genpll6"
+
+"brcm,sr-lcpll0"
+"brcm,sr-lcpll1"
+"brcm,sr-lcpll-pcie"
+
+
+The following table defines the set of PLL/clock index and ID for Stingray.
+These clock IDs are defined in:
+"include/dt-bindings/clock/bcm-sr.h"
+
+Clock  Source  Index   ID
+----   -   -
+crystalN/A N/A N/A
+crmu_ref25mcrystal N/A N/A
+
+genpll0crystal 0   BCM_SR_GENPLL0
+clk_125m   genpll0 1   BCM_SR_GENPLL0_125M_CLK
+clk_scrgenpll0 2   BCM_SR_GENPLL0_SCR_CLK
+clk_250genpll0 3   BCM_SR_GENPLL0_250M_CLK
+clk_pcie_axi   genpll0 4   BCM_SR_GENPLL0_PCIE_AXI_CLK
+clk_paxc_axi_x2genpll0 5   BCM_SR_GENPLL0_PAXC_AXI_X2_CLK
+clk_paxc_axi   genpll0 6   BCM_SR_GENPLL0_PAXC_AXI_CLK
+
+genpll1crystal 0   BCM_SR_GENPLL1
+clk_pcie_tlgenpll1 1   
BCM_SR_GENPLL1_PCIE_TL_CLK
+clk_mhb_apbgenpll1 2   
BCM_SR_GENPLL1_MHB_APB_CLK
+
+genpll2crystal 0   BCM_SR_GENPLL2
+clk_nicgenpll2 1   BCM_SR_GENPLL2_NIC_CLK
+clk_ts_500_ref genpll2 2   BCM_SR_GENPLL2_TS_500_REF_CLK
+clk_125_nitro  genpll2 3   BCM_SR_GENPLL2_125_NITRO_CLK
+clk_chimp  genpll2 4   BCM_SR_GENPLL2_CHIMP_CLK
+clk_nic_flash  genpll2 5   BCM_SR_GENPLL2_NIC_FLASH
+
+genpll3crystal 0   BCM_SR_GENPLL3
+clk_hsls   genpll3 1   BCM_SR_GENPLL3_HSLS_CLK
+clk_sdio   genpll3 2   BCM_SR_GENPLL3_SDIO_CLK
+
+genpll4crystal 0   BCM_SR_GENPLL4
+ccngenpll4 1   BCM_SR_GENPLL4_CCN_CLK
+clk_tpiu_pll   genpll4 2   BCM_SR_GENPLL4_TPIU_PLL_CLK
+noc_clkgenpll4 3   BCM_SR_GENPLL4_NOC_CLK
+clk_chclk_fs4  genpll4 4   BCM_SR_GENPLL4_CHCLK_FS4_CLK
+clk_bridge_fscpu   genpll4 5   BCM_SR_GENPLL4_BRIDGE_FSCPU_CLK
+
+
+genpll5crystal 0   BCM_SR_GENPLL5
+fs4_hf_clk genpll5 1   BCM_SR_GENPLL5_FS4_HF_CLK
+crypto_ae_clk  genpll5 2   BCM_SR_GENPLL5_CRYPTO_AE_CLK
+raid_ae_clkgenpll5 3   
BCM_SR_GENPLL5_RAID_AE_CLK
+
+genpll6crystal 0   BCM_SR_GENPLL6
+48_usb genpll6 1   BCM_SR_GENPLL6_48_USB_CLK
+
+lcpll0 crystal 0   BCM_SR_LCPLL0
+clk_sata_refp  lcpll0  1   BCM_SR_LCPLL0_SATA_REFP_CLK
+clk_sata_refn  lcpll0  2   BCM_SR_LCPLL0_SATA_REFN_CLK
+clk_usb_reflcpll0  3   
BCM_SR_LCPLL0_USB_REF_CLK
+sata_refpn lcpll0  3   BCM_SR_LCPLL0_SATA_REFPN_CLK
+
+lcpll1 crystal 0   BCM_SR_LCPLL1
+wanlcpll1  1   BCM_SR_LCPLL0_WAN_CLK
+
+lcpll_pcie crystal 0   BCM_SR_LCPLL_PCIE
+pcie_phy_ref   lcpll1  1   BCM_SR_LCPLL_PCIE_PHY_REF_CLK
-- 
2.7.4

[PATCH 02/11] dt-bindings: clk: Extend binding doc for Stingray SOC

2017-05-06 Thread Anup Patel 
From: Sandeep Tripathy 

Update iproc clock dt-binding documentation with
Stingray pll and clock details.

Signed-off-by: Sandeep Tripathy 
Reviewed-by: Ray Jui 
Reviewed-by: Scott Branden 
---
 .../bindings/clock/brcm,iproc-clocks.txt   | 76 ++
 1 file changed, 76 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt 
b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
index 6f66e9a..f2c5f0e4a 100644
--- a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
@@ -219,3 +219,79 @@ BCM63138
 
 PLL and leaf clock compatible strings for BCM63138 are:
 "brcm,bcm63138-armpll"
+
+Stingray
+---
+PLL and leaf clock compatible strings for Stingray are:
+"brcm,sr-genpll0"
+"brcm,sr-genpll1"
+"brcm,sr-genpll2"
+"brcm,sr-genpll3"
+"brcm,sr-genpll4"
+"brcm,sr-genpll5"
+"brcm,sr-genpll6"
+
+"brcm,sr-lcpll0"
+"brcm,sr-lcpll1"
+"brcm,sr-lcpll-pcie"
+
+
+The following table defines the set of PLL/clock index and ID for Stingray.
+These clock IDs are defined in:
+"include/dt-bindings/clock/bcm-sr.h"
+
+Clock  Source  Index   ID
+----   -   -
+crystalN/A N/A N/A
+crmu_ref25mcrystal N/A N/A
+
+genpll0crystal 0   BCM_SR_GENPLL0
+clk_125m   genpll0 1   BCM_SR_GENPLL0_125M_CLK
+clk_scrgenpll0 2   BCM_SR_GENPLL0_SCR_CLK
+clk_250genpll0 3   BCM_SR_GENPLL0_250M_CLK
+clk_pcie_axi   genpll0 4   BCM_SR_GENPLL0_PCIE_AXI_CLK
+clk_paxc_axi_x2genpll0 5   BCM_SR_GENPLL0_PAXC_AXI_X2_CLK
+clk_paxc_axi   genpll0 6   BCM_SR_GENPLL0_PAXC_AXI_CLK
+
+genpll1crystal 0   BCM_SR_GENPLL1
+clk_pcie_tlgenpll1 1   
BCM_SR_GENPLL1_PCIE_TL_CLK
+clk_mhb_apbgenpll1 2   
BCM_SR_GENPLL1_MHB_APB_CLK
+
+genpll2crystal 0   BCM_SR_GENPLL2
+clk_nicgenpll2 1   BCM_SR_GENPLL2_NIC_CLK
+clk_ts_500_ref genpll2 2   BCM_SR_GENPLL2_TS_500_REF_CLK
+clk_125_nitro  genpll2 3   BCM_SR_GENPLL2_125_NITRO_CLK
+clk_chimp  genpll2 4   BCM_SR_GENPLL2_CHIMP_CLK
+clk_nic_flash  genpll2 5   BCM_SR_GENPLL2_NIC_FLASH
+
+genpll3crystal 0   BCM_SR_GENPLL3
+clk_hsls   genpll3 1   BCM_SR_GENPLL3_HSLS_CLK
+clk_sdio   genpll3 2   BCM_SR_GENPLL3_SDIO_CLK
+
+genpll4crystal 0   BCM_SR_GENPLL4
+ccngenpll4 1   BCM_SR_GENPLL4_CCN_CLK
+clk_tpiu_pll   genpll4 2   BCM_SR_GENPLL4_TPIU_PLL_CLK
+noc_clkgenpll4 3   BCM_SR_GENPLL4_NOC_CLK
+clk_chclk_fs4  genpll4 4   BCM_SR_GENPLL4_CHCLK_FS4_CLK
+clk_bridge_fscpu   genpll4 5   BCM_SR_GENPLL4_BRIDGE_FSCPU_CLK
+
+
+genpll5crystal 0   BCM_SR_GENPLL5
+fs4_hf_clk genpll5 1   BCM_SR_GENPLL5_FS4_HF_CLK
+crypto_ae_clk  genpll5 2   BCM_SR_GENPLL5_CRYPTO_AE_CLK
+raid_ae_clkgenpll5 3   
BCM_SR_GENPLL5_RAID_AE_CLK
+
+genpll6crystal 0   BCM_SR_GENPLL6
+48_usb genpll6 1   BCM_SR_GENPLL6_48_USB_CLK
+
+lcpll0 crystal 0   BCM_SR_LCPLL0
+clk_sata_refp  lcpll0  1   BCM_SR_LCPLL0_SATA_REFP_CLK
+clk_sata_refn  lcpll0  2   BCM_SR_LCPLL0_SATA_REFN_CLK
+clk_usb_reflcpll0  3   
BCM_SR_LCPLL0_USB_REF_CLK
+sata_refpn lcpll0  3   BCM_SR_LCPLL0_SATA_REFPN_CLK
+
+lcpll1 crystal 0   BCM_SR_LCPLL1
+wanlcpll1  1   BCM_SR_LCPLL0_WAN_CLK
+
+lcpll_pcie crystal 0   BCM_SR_LCPLL_PCIE
+pcie_phy_ref   lcpll1  1   BCM_SR_LCPLL_PCIE_PHY_REF_CLK
-- 
2.7.4