Re: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
On 04/17, Andy Tang wrote: > Hi Stephen and Michael, > > This patch set has been pending for more than two months since it was first > sent. > I have not received any response from you until now. > > Could you give some comments on it? > Hmm I think it was sent near the merge window so I put it in the review queue. Looks ok so let's apply it. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
On 03/20, Yuantian Tang wrote: > From: Scott Wood > > ls1012a has separate input root clocks for core PLLs versus the platform > PLL, with the latter described as sysclk in the hw docs. > Update the qoriq-clock binding to allow a second input clock, named > "coreclk". If present, this clock will be used for the core PLLs. > > Signed-off-by: Scott Wood > Signed-off-by: Tang Yuantian > Acked-by: Rob Herring > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
Hi Stephen and Michael, How many times do I need to push those patch get merged? Regards, Andy -Original Message- From: Andy Tang Sent: Monday, April 17, 2017 9:37 AM To: 'mturque...@baylibre.com' ; 'sb...@codeaurora.org' Cc: 'robh...@kernel.org' ; 'mark.rutl...@arm.com' ; 'linux-...@vger.kernel.org' ; 'devicet...@vger.kernel.org' ; 'linux-kernel@vger.kernel.org' ; 'linux-arm-ker...@lists.infradead.org' ; 'Scott Wood' Subject: RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk Hi Stephen and Michael, This patch set has been pending for more than two months since it was first sent. I have not received any response from you until now. Could you give some comments on it? Regards, Andy -Original Message- From: Andy Tang Sent: Wednesday, April 05, 2017 2:16 PM To: mturque...@baylibre.com; sb...@codeaurora.org Cc: robh...@kernel.org; mark.rutl...@arm.com; linux-...@vger.kernel.org; devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Scott Wood Subject: RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk Hello Do you have any comments on this patch set which was acked by Rob? Regards, Andy > -Original Message- > From: Yuantian Tang [mailto:andy.t...@nxp.com] > Sent: Monday, March 20, 2017 10:37 AM > To: mturque...@baylibre.com > Cc: sb...@codeaurora.org; robh...@kernel.org; mark.rutl...@arm.com; > linux-...@vger.kernel.org; devicet...@vger.kernel.org; linux- > ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Scott > Wood ; Andy Tang > Subject: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk > > From: Scott Wood > > ls1012a has separate input root clocks for core PLLs versus the > platform PLL, with the latter described as sysclk in the hw docs. > Update the qoriq-clock binding to allow a second input clock, named > "coreclk". If present, this clock will be used for the core PLLs. > > Signed-off-by: Scott Wood > Signed-off-by: Tang Yuantian > Acked-by: Rob Herring > --- > v2: > -- change the author to Scott > Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > index aa3526f..119cafd 100644 > --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > @@ -56,6 +56,11 @@ Optional properties: > - clocks: If clock-frequency is not specified, sysclk may be provided > as an input clock. Either clock-frequency or clocks must be > provided. > + A second input clock, called "coreclk", may be provided if > + core PLLs are based on a different input clock from the > + platform PLL. > +- clock-names: Required if a coreclk is present. Valid names are > + "sysclk" and "coreclk". > > 2. Clock Provider > > @@ -72,6 +77,7 @@ second cell is the clock index for the specified type. > 2 hwaccel index (n in CLKCGnHWACSR) > 3 fman0 for fm1, 1 for fm2 > 4 platform pll0=pll, 1=pll/2, 2=pll/3, 3=pll/4 > + 5 coreclk must be 0 > > 3. Example > > -- > 2.1.0.27.g96db324
RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
Hi Robh, Could you please take a look at this patch set? They are pending for a really long time. Don't know why they have not been merged. Patch links: https://patchwork.kernel.org/patch/9633007/ https://patchwork.kernel.org/patch/9633009/ Regards, Andy > -Original Message- > From: Andy Tang > Sent: Monday, April 24, 2017 11:15 AM > To: mturque...@baylibre.com; sb...@codeaurora.org > Cc: robh...@kernel.org; mark.rutl...@arm.com; linux-...@vger.kernel.org; > devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm- > ker...@lists.infradead.org; Scott Wood > Subject: RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk > > Does anyone give me a clue why this patch set can't be responded after so > long time? > > Thanks, > Andy > > -Original Message- > From: Andy Tang > Sent: Monday, April 17, 2017 9:37 AM > To: 'mturque...@baylibre.com' ; > 'sb...@codeaurora.org' > Cc: 'robh...@kernel.org' ; 'mark.rutl...@arm.com' > ; 'linux-...@vger.kernel.org' c...@vger.kernel.org>; 'devicet...@vger.kernel.org' > ; 'linux-kernel@vger.kernel.org' ker...@vger.kernel.org>; 'linux-arm-ker...@lists.infradead.org' ker...@lists.infradead.org>; 'Scott Wood' > Subject: RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk > > Hi Stephen and Michael, > > This patch set has been pending for more than two months since it was first > sent. > I have not received any response from you until now. > > Could you give some comments on it? > > Regards, > Andy > > -Original Message- > From: Andy Tang > Sent: Wednesday, April 05, 2017 2:16 PM > To: mturque...@baylibre.com; sb...@codeaurora.org > Cc: robh...@kernel.org; mark.rutl...@arm.com; linux-...@vger.kernel.org; > devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm- > ker...@lists.infradead.org; Scott Wood > Subject: RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk > > Hello > > Do you have any comments on this patch set which was acked by Rob? > > Regards, > Andy > > > -Original Message- > > From: Yuantian Tang [mailto:andy.t...@nxp.com] > > Sent: Monday, March 20, 2017 10:37 AM > > To: mturque...@baylibre.com > > Cc: sb...@codeaurora.org; robh...@kernel.org; mark.rutl...@arm.com; > > linux-...@vger.kernel.org; devicet...@vger.kernel.org; linux- > > ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Scott > > Wood ; Andy Tang > > Subject: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk > > > > From: Scott Wood > > > > ls1012a has separate input root clocks for core PLLs versus the > > platform PLL, with the latter described as sysclk in the hw docs. > > Update the qoriq-clock binding to allow a second input clock, named > > "coreclk". If present, this clock will be used for the core PLLs. > > > > Signed-off-by: Scott Wood > > Signed-off-by: Tang Yuantian > > Acked-by: Rob Herring > > --- > > v2: > > -- change the author to Scott > > Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > > b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > > index aa3526f..119cafd 100644 > > --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > > +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > > @@ -56,6 +56,11 @@ Optional properties: > > - clocks: If clock-frequency is not specified, sysclk may be provided > > as an input clock. Either clock-frequency or clocks must be > > provided. > > + A second input clock, called "coreclk", may be provided if > > + core PLLs are based on a different input clock from the > > + platform PLL. > > +- clock-names: Required if a coreclk is present. Valid names are > > + "sysclk" and "coreclk". > > > > 2. Clock Provider > > > > @@ -72,6 +77,7 @@ second cell is the clock index for the specified type. > > 2 hwaccel index (n in CLKCGnHWACSR) > > 3 fman0 for fm1, 1 for fm2 > > 4 platform pll0=pll, 1=pll/2, 2=pll/3, 3=pll/4 > > + 5 coreclk must be 0 > > > > 3. Example > > > > -- > > 2.1.0.27.g96db324
RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
Does anyone give me a clue why this patch set can't be responded after so long time? Thanks, Andy -Original Message- From: Andy Tang Sent: Monday, April 17, 2017 9:37 AM To: 'mturque...@baylibre.com' ; 'sb...@codeaurora.org' Cc: 'robh...@kernel.org' ; 'mark.rutl...@arm.com' ; 'linux-...@vger.kernel.org' ; 'devicet...@vger.kernel.org' ; 'linux-kernel@vger.kernel.org' ; 'linux-arm-ker...@lists.infradead.org' ; 'Scott Wood' Subject: RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk Hi Stephen and Michael, This patch set has been pending for more than two months since it was first sent. I have not received any response from you until now. Could you give some comments on it? Regards, Andy -Original Message- From: Andy Tang Sent: Wednesday, April 05, 2017 2:16 PM To: mturque...@baylibre.com; sb...@codeaurora.org Cc: robh...@kernel.org; mark.rutl...@arm.com; linux-...@vger.kernel.org; devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Scott Wood Subject: RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk Hello Do you have any comments on this patch set which was acked by Rob? Regards, Andy > -Original Message- > From: Yuantian Tang [mailto:andy.t...@nxp.com] > Sent: Monday, March 20, 2017 10:37 AM > To: mturque...@baylibre.com > Cc: sb...@codeaurora.org; robh...@kernel.org; mark.rutl...@arm.com; > linux-...@vger.kernel.org; devicet...@vger.kernel.org; linux- > ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Scott > Wood ; Andy Tang > Subject: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk > > From: Scott Wood > > ls1012a has separate input root clocks for core PLLs versus the > platform PLL, with the latter described as sysclk in the hw docs. > Update the qoriq-clock binding to allow a second input clock, named > "coreclk". If present, this clock will be used for the core PLLs. > > Signed-off-by: Scott Wood > Signed-off-by: Tang Yuantian > Acked-by: Rob Herring > --- > v2: > -- change the author to Scott > Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > index aa3526f..119cafd 100644 > --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > @@ -56,6 +56,11 @@ Optional properties: > - clocks: If clock-frequency is not specified, sysclk may be provided > as an input clock. Either clock-frequency or clocks must be > provided. > + A second input clock, called "coreclk", may be provided if > + core PLLs are based on a different input clock from the > + platform PLL. > +- clock-names: Required if a coreclk is present. Valid names are > + "sysclk" and "coreclk". > > 2. Clock Provider > > @@ -72,6 +77,7 @@ second cell is the clock index for the specified type. > 2 hwaccel index (n in CLKCGnHWACSR) > 3 fman0 for fm1, 1 for fm2 > 4 platform pll0=pll, 1=pll/2, 2=pll/3, 3=pll/4 > + 5 coreclk must be 0 > > 3. Example > > -- > 2.1.0.27.g96db324
RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
Hi Stephen and Michael, This patch set has been pending for more than two months since it was first sent. I have not received any response from you until now. Could you give some comments on it? Regards, Andy -Original Message- From: Andy Tang Sent: Wednesday, April 05, 2017 2:16 PM To: mturque...@baylibre.com; sb...@codeaurora.org Cc: robh...@kernel.org; mark.rutl...@arm.com; linux-...@vger.kernel.org; devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Scott Wood Subject: RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk Hello Do you have any comments on this patch set which was acked by Rob? Regards, Andy > -Original Message- > From: Yuantian Tang [mailto:andy.t...@nxp.com] > Sent: Monday, March 20, 2017 10:37 AM > To: mturque...@baylibre.com > Cc: sb...@codeaurora.org; robh...@kernel.org; mark.rutl...@arm.com; > linux-...@vger.kernel.org; devicet...@vger.kernel.org; linux- > ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Scott > Wood ; Andy Tang > Subject: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk > > From: Scott Wood > > ls1012a has separate input root clocks for core PLLs versus the > platform PLL, with the latter described as sysclk in the hw docs. > Update the qoriq-clock binding to allow a second input clock, named > "coreclk". If present, this clock will be used for the core PLLs. > > Signed-off-by: Scott Wood > Signed-off-by: Tang Yuantian > Acked-by: Rob Herring > --- > v2: > -- change the author to Scott > Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > index aa3526f..119cafd 100644 > --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > @@ -56,6 +56,11 @@ Optional properties: > - clocks: If clock-frequency is not specified, sysclk may be provided > as an input clock. Either clock-frequency or clocks must be > provided. > + A second input clock, called "coreclk", may be provided if > + core PLLs are based on a different input clock from the > + platform PLL. > +- clock-names: Required if a coreclk is present. Valid names are > + "sysclk" and "coreclk". > > 2. Clock Provider > > @@ -72,6 +77,7 @@ second cell is the clock index for the specified type. > 2 hwaccel index (n in CLKCGnHWACSR) > 3 fman0 for fm1, 1 for fm2 > 4 platform pll0=pll, 1=pll/2, 2=pll/3, 3=pll/4 > + 5 coreclk must be 0 > > 3. Example > > -- > 2.1.0.27.g96db324
RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
Hello Stephen and Michael, Do you have any comments on this patch set which was acked by Rob? Regards, Andy > -Original Message- > From: Yuantian Tang [mailto:andy.t...@nxp.com] > Sent: Monday, March 20, 2017 10:37 AM > To: mturque...@baylibre.com > Cc: sb...@codeaurora.org; robh...@kernel.org; mark.rutl...@arm.com; > linux-...@vger.kernel.org; devicet...@vger.kernel.org; linux- > ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Scott Wood > ; Andy Tang > Subject: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk > > From: Scott Wood > > ls1012a has separate input root clocks for core PLLs versus the platform PLL, > with the latter described as sysclk in the hw docs. > Update the qoriq-clock binding to allow a second input clock, named > "coreclk". If present, this clock will be used for the core PLLs. > > Signed-off-by: Scott Wood > Signed-off-by: Tang Yuantian > Acked-by: Rob Herring > --- > v2: > -- change the author to Scott > Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > index aa3526f..119cafd 100644 > --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > @@ -56,6 +56,11 @@ Optional properties: > - clocks: If clock-frequency is not specified, sysclk may be provided > as an input clock. Either clock-frequency or clocks must be > provided. > + A second input clock, called "coreclk", may be provided if > + core PLLs are based on a different input clock from the > + platform PLL. > +- clock-names: Required if a coreclk is present. Valid names are > + "sysclk" and "coreclk". > > 2. Clock Provider > > @@ -72,6 +77,7 @@ second cell is the clock index for the specified type. > 2 hwaccel index (n in CLKCGnHWACSR) > 3 fman0 for fm1, 1 for fm2 > 4 platform pll0=pll, 1=pll/2, 2=pll/3, 3=pll/4 > + 5 coreclk must be 0 > > 3. Example > > -- > 2.1.0.27.g96db324
RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
PING! Regards, Yuantian > -Original Message- > From: Yuantian Tang [mailto:andy.t...@nxp.com] > Sent: Monday, March 20, 2017 10:37 AM > To: mturque...@baylibre.com > Cc: sb...@codeaurora.org; robh...@kernel.org; mark.rutl...@arm.com; > linux-...@vger.kernel.org; devicet...@vger.kernel.org; linux- > ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Scott Wood; > Andy Tang > Subject: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk > > From: Scott Wood > > ls1012a has separate input root clocks for core PLLs versus the platform PLL, > with the latter described as sysclk in the hw docs. > Update the qoriq-clock binding to allow a second input clock, named > "coreclk". If present, this clock will be used for the core PLLs. > > Signed-off-by: Scott Wood > Signed-off-by: Tang Yuantian > Acked-by: Rob Herring > --- > v2: > -- change the author to Scott > Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > index aa3526f..119cafd 100644 > --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt > +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt > @@ -56,6 +56,11 @@ Optional properties: > - clocks: If clock-frequency is not specified, sysclk may be provided > as an input clock. Either clock-frequency or clocks must be > provided. > + A second input clock, called "coreclk", may be provided if > + core PLLs are based on a different input clock from the > + platform PLL. > +- clock-names: Required if a coreclk is present. Valid names are > + "sysclk" and "coreclk". > > 2. Clock Provider > > @@ -72,6 +77,7 @@ second cell is the clock index for the specified type. > 2 hwaccel index (n in CLKCGnHWACSR) > 3 fman0 for fm1, 1 for fm2 > 4 platform pll0=pll, 1=pll/2, 2=pll/3, 3=pll/4 > + 5 coreclk must be 0 > > 3. Example > > -- > 2.1.0.27.g96db324
[PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
From: Scott Wood ls1012a has separate input root clocks for core PLLs versus the platform PLL, with the latter described as sysclk in the hw docs. Update the qoriq-clock binding to allow a second input clock, named "coreclk". If present, this clock will be used for the core PLLs. Signed-off-by: Scott Wood Signed-off-by: Tang Yuantian Acked-by: Rob Herring --- v2: -- change the author to Scott Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt index aa3526f..119cafd 100644 --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt @@ -56,6 +56,11 @@ Optional properties: - clocks: If clock-frequency is not specified, sysclk may be provided as an input clock. Either clock-frequency or clocks must be provided. + A second input clock, called "coreclk", may be provided if + core PLLs are based on a different input clock from the + platform PLL. +- clock-names: Required if a coreclk is present. Valid names are + "sysclk" and "coreclk". 2. Clock Provider @@ -72,6 +77,7 @@ second cell is the clock index for the specified type. 2 hwaccel index (n in CLKCGnHWACSR) 3 fman0 for fm1, 1 for fm2 4 platform pll0=pll, 1=pll/2, 2=pll/3, 3=pll/4 + 5 coreclk must be 0 3. Example -- 2.1.0.27.g96db324
