Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Hi Guenter, On Sun, Sep 22, 2013 at 08:37:23PM -0700, Guenter Roeck wrote: > On 09/21/2013 07:00 AM, Maxime Ripard wrote: > > [ ... ] > > >>+ /* assert cpu core reset */ > >>+ writel(0, sunxi7i_cc_base + CPUX_RESET_CTL(cpu)); > >>+ /* L1RSTDISABLE hold low */ > >>+ pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_GENCTL); > >>+ pwr_reg &= ~(1< >>+ writel(pwr_reg, sunxi7i_cc_base + AW_CPUCFG_GENCTL); > >>+ /* DBGPWRDUP hold low */ > >>+ pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_DBGCTL1); > >>+ pwr_reg &= ~(1< > > >Use BIT(cpu) here. And you should run scripts/checkpatch.pl on your > >patches before sending them. > > > > For the record: > > $ scripts/checkpatch.pl --strict allwinner.patch > total: 0 errors, 0 warnings, 0 checks, 527 lines checked > > allwinner.patch has no obvious style problems and is ready for submission. > > This is on top of "v3.12-rc1-336-gd8524ae". > > checkpatch.pl does not complain as long as the number of spaces before > and after an operator is the same. There is a patch pending to change > this with the --strict option, but it will still not complain in 'normal' > operation. Hmmm, ok. Somehow, I was convinced that it was triggering a warning. Thanks for the heads up :) Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Hi, On Mon, Sep 23, 2013 at 10:43:55PM +0800, cinifr wrote: > > In which case this kernel patch needs instead to speak the bootloader > > wakeup protocol instead of speaking to the h/w directly like you've done > > here, right? > > > > Or is it possible for the bootloader to set these things up and then put > > the CPU back to sleep such that it both retains any settings and is > > wakable by this patch? This code contains core resets and power control, > > which makes me suspect not. > > And I think secondary cpus remains setting after h/w boot. > >> > Wouldn't it be better to do all this stuff in the bootloader and > >> either > >> > implement PSCI or have the bootloader do the traditional holding pen > >> and > >> > mbox address thing? > Uboot doesnot support PSCI, it use traditional holding pen for sunxi > platform now. > > >> > > >> I have modified uboot to set cntfrq and cntvoff in all smp cpus,and it > >> works well. I guess kernel should believe all cpu should be all same > >> when kernel boot. Bootloader should do it to ensure that. > > > > Yes, I think all CPUs must be in the same state at boot. > > > > But if you've done all that then what is this patch for? > > > > Do you have links to your u-boot patches? > > > > Ian. > Yes, This is my patch for uboot. > My working uboot code is in https://github.com/linux-sunxi/u-boot-sunxi.git > Note this is only test patch. I have not commit it formally for uboot. Please do so. I'd like very much to avoid ending up in a situation where we would break the mainline kernel for the A20, without any bootloader we can point the users to to fix the issues. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On Mon, Sep 23, 2013 at 09:19:17PM +0300, Maxime Ripard wrote: > Hi Guenter, > > On Sun, Sep 22, 2013 at 08:37:23PM -0700, Guenter Roeck wrote: > > On 09/21/2013 07:00 AM, Maxime Ripard wrote: > > > > [ ... ] > > > > >>+ /* assert cpu core reset */ > > >>+ writel(0, sunxi7i_cc_base + CPUX_RESET_CTL(cpu)); > > >>+ /* L1RSTDISABLE hold low */ > > >>+ pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_GENCTL); > > >>+ pwr_reg &= ~(1< > >>+ writel(pwr_reg, sunxi7i_cc_base + AW_CPUCFG_GENCTL); > > >>+ /* DBGPWRDUP hold low */ > > >>+ pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_DBGCTL1); > > >>+ pwr_reg &= ~(1< > > > > >Use BIT(cpu) here. And you should run scripts/checkpatch.pl on your > > >patches before sending them. > > > > > > > For the record: > > > > $ scripts/checkpatch.pl --strict allwinner.patch > > total: 0 errors, 0 warnings, 0 checks, 527 lines checked > > > > allwinner.patch has no obvious style problems and is ready for submission. > > > > This is on top of "v3.12-rc1-336-gd8524ae". > > > > checkpatch.pl does not complain as long as the number of spaces before > > and after an operator is the same. There is a patch pending to change > > this with the --strict option, but it will still not complain in 'normal' > > operation. > > Hmmm, ok. Somehow, I was convinced that it was triggering a warning. > Thanks for the heads up :) > Yes, me too until I realized that it doesn't :(. Guenter -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
> In which case this kernel patch needs instead to speak the bootloader > wakeup protocol instead of speaking to the h/w directly like you've done > here, right? > > Or is it possible for the bootloader to set these things up and then put > the CPU back to sleep such that it both retains any settings and is > wakable by this patch? This code contains core resets and power control, > which makes me suspect not. And I think secondary cpus remains setting after h/w boot. >> > Wouldn't it be better to do all this stuff in the bootloader and >> either >> > implement PSCI or have the bootloader do the traditional holding pen >> and >> > mbox address thing? Uboot doesnot support PSCI, it use traditional holding pen for sunxi platform now. >> > >> I have modified uboot to set cntfrq and cntvoff in all smp cpus,and it >> works well. I guess kernel should believe all cpu should be all same >> when kernel boot. Bootloader should do it to ensure that. > > Yes, I think all CPUs must be in the same state at boot. > > But if you've done all that then what is this patch for? > > Do you have links to your u-boot patches? > > Ian. Yes, This is my patch for uboot. My working uboot code is in https://github.com/linux-sunxi/u-boot-sunxi.git Note this is only test patch. I have not commit it formally for uboot. Fan 0001-Add-setting-CNTVOFF-and-CNTFRQ-for-all-smp-cpus.patch Description: Binary data
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On Sun, 2013-09-22 at 23:31 +0800, cinifr wrote: > > > On Sunday, 22 September 2013, Ian Campbell wrote: > > On Sun, 2013-09-22 at 20:21 +0800, Fan Rong wrote: > > > >> + /* Set boot addr */ > >> + paddr = virt_to_phys(sun7i_secondary_startup); > >> + writel(paddr, sunxi7i_cc_base + SUN7I_CPUCFG_BOOTADDR); > > > > This means that the secondary cores will miss out on any setup which > the > > bootloader might have done for the primary CPU, e.g. switching to NS > HYP > > mode, setting the CNTFRQ etc. > Yes, I think that is what bootloader should do. In which case this kernel patch needs instead to speak the bootloader wakeup protocol instead of speaking to the h/w directly like you've done here, right? Or is it possible for the bootloader to set these things up and then put the CPU back to sleep such that it both retains any settings and is wakable by this patch? This code contains core resets and power control, which makes me suspect not. > > Wouldn't it be better to do all this stuff in the bootloader and > either > > implement PSCI or have the bootloader do the traditional holding pen > and > > mbox address thing? > > > I have modified uboot to set cntfrq and cntvoff in all smp cpus,and it > works well. I guess kernel should believe all cpu should be all same > when kernel boot. Bootloader should do it to ensure that. Yes, I think all CPUs must be in the same state at boot. But if you've done all that then what is this patch for? Do you have links to your u-boot patches? Ian. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Hello, On Sat, Sep 21, 2013 at 05:49:00PM -0500, Maxime Ripard wrote: > On Sun, Sep 22, 2013 at 12:49:45AM +0800, cinifr wrote: > > Thanks. I have modify my patch as you said. > > It is in attachments. Maybe I remail the new patch? > > Yes, remail the whole serie and change the prefix to PATCHv3 (you can > use the --subject-prefix option of git format-patch to do so). git >= 1.8.2 also support --reroll-count 3 which also changes the filenames of the patches. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König| Industrial Linux Solutions | http://www.pengutronix.de/ | -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Hello, On Sat, Sep 21, 2013 at 05:49:00PM -0500, Maxime Ripard wrote: On Sun, Sep 22, 2013 at 12:49:45AM +0800, cinifr wrote: Thanks. I have modify my patch as you said. It is in attachments. Maybe I remail the new patch? Yes, remail the whole serie and change the prefix to PATCHv3 (you can use the --subject-prefix option of git format-patch to do so). git = 1.8.2 also support --reroll-count 3 which also changes the filenames of the patches. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König| Industrial Linux Solutions | http://www.pengutronix.de/ | -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On Sun, 2013-09-22 at 23:31 +0800, cinifr wrote: On Sunday, 22 September 2013, Ian Campbell i...@hellion.org.uk wrote: On Sun, 2013-09-22 at 20:21 +0800, Fan Rong wrote: + /* Set boot addr */ + paddr = virt_to_phys(sun7i_secondary_startup); + writel(paddr, sunxi7i_cc_base + SUN7I_CPUCFG_BOOTADDR); This means that the secondary cores will miss out on any setup which the bootloader might have done for the primary CPU, e.g. switching to NS HYP mode, setting the CNTFRQ etc. Yes, I think that is what bootloader should do. In which case this kernel patch needs instead to speak the bootloader wakeup protocol instead of speaking to the h/w directly like you've done here, right? Or is it possible for the bootloader to set these things up and then put the CPU back to sleep such that it both retains any settings and is wakable by this patch? This code contains core resets and power control, which makes me suspect not. Wouldn't it be better to do all this stuff in the bootloader and either implement PSCI or have the bootloader do the traditional holding pen and mbox address thing? I have modified uboot to set cntfrq and cntvoff in all smp cpus,and it works well. I guess kernel should believe all cpu should be all same when kernel boot. Bootloader should do it to ensure that. Yes, I think all CPUs must be in the same state at boot. But if you've done all that then what is this patch for? Do you have links to your u-boot patches? Ian. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
In which case this kernel patch needs instead to speak the bootloader wakeup protocol instead of speaking to the h/w directly like you've done here, right? Or is it possible for the bootloader to set these things up and then put the CPU back to sleep such that it both retains any settings and is wakable by this patch? This code contains core resets and power control, which makes me suspect not. And I think secondary cpus remains setting after h/w boot. Wouldn't it be better to do all this stuff in the bootloader and either implement PSCI or have the bootloader do the traditional holding pen and mbox address thing? Uboot doesnot support PSCI, it use traditional holding pen for sunxi platform now. I have modified uboot to set cntfrq and cntvoff in all smp cpus,and it works well. I guess kernel should believe all cpu should be all same when kernel boot. Bootloader should do it to ensure that. Yes, I think all CPUs must be in the same state at boot. But if you've done all that then what is this patch for? Do you have links to your u-boot patches? Ian. Yes, This is my patch for uboot. My working uboot code is in https://github.com/linux-sunxi/u-boot-sunxi.git Note this is only test patch. I have not commit it formally for uboot. Fan 0001-Add-setting-CNTVOFF-and-CNTFRQ-for-all-smp-cpus.patch Description: Binary data
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On Mon, Sep 23, 2013 at 09:19:17PM +0300, Maxime Ripard wrote: Hi Guenter, On Sun, Sep 22, 2013 at 08:37:23PM -0700, Guenter Roeck wrote: On 09/21/2013 07:00 AM, Maxime Ripard wrote: [ ... ] + /* assert cpu core reset */ + writel(0, sunxi7i_cc_base + CPUX_RESET_CTL(cpu)); + /* L1RSTDISABLE hold low */ + pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_GENCTL); + pwr_reg = ~(1cpu); + writel(pwr_reg, sunxi7i_cc_base + AW_CPUCFG_GENCTL); + /* DBGPWRDUP hold low */ + pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_DBGCTL1); + pwr_reg = ~(1cpu); Use BIT(cpu) here. And you should run scripts/checkpatch.pl on your patches before sending them. For the record: $ scripts/checkpatch.pl --strict allwinner.patch total: 0 errors, 0 warnings, 0 checks, 527 lines checked allwinner.patch has no obvious style problems and is ready for submission. This is on top of v3.12-rc1-336-gd8524ae. checkpatch.pl does not complain as long as the number of spaces before and after an operator is the same. There is a patch pending to change this with the --strict option, but it will still not complain in 'normal' operation. Hmmm, ok. Somehow, I was convinced that it was triggering a warning. Thanks for the heads up :) Yes, me too until I realized that it doesn't :(. Guenter -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Hi, On Mon, Sep 23, 2013 at 10:43:55PM +0800, cinifr wrote: In which case this kernel patch needs instead to speak the bootloader wakeup protocol instead of speaking to the h/w directly like you've done here, right? Or is it possible for the bootloader to set these things up and then put the CPU back to sleep such that it both retains any settings and is wakable by this patch? This code contains core resets and power control, which makes me suspect not. And I think secondary cpus remains setting after h/w boot. Wouldn't it be better to do all this stuff in the bootloader and either implement PSCI or have the bootloader do the traditional holding pen and mbox address thing? Uboot doesnot support PSCI, it use traditional holding pen for sunxi platform now. I have modified uboot to set cntfrq and cntvoff in all smp cpus,and it works well. I guess kernel should believe all cpu should be all same when kernel boot. Bootloader should do it to ensure that. Yes, I think all CPUs must be in the same state at boot. But if you've done all that then what is this patch for? Do you have links to your u-boot patches? Ian. Yes, This is my patch for uboot. My working uboot code is in https://github.com/linux-sunxi/u-boot-sunxi.git Note this is only test patch. I have not commit it formally for uboot. Please do so. I'd like very much to avoid ending up in a situation where we would break the mainline kernel for the A20, without any bootloader we can point the users to to fix the issues. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Hi Guenter, On Sun, Sep 22, 2013 at 08:37:23PM -0700, Guenter Roeck wrote: On 09/21/2013 07:00 AM, Maxime Ripard wrote: [ ... ] + /* assert cpu core reset */ + writel(0, sunxi7i_cc_base + CPUX_RESET_CTL(cpu)); + /* L1RSTDISABLE hold low */ + pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_GENCTL); + pwr_reg = ~(1cpu); + writel(pwr_reg, sunxi7i_cc_base + AW_CPUCFG_GENCTL); + /* DBGPWRDUP hold low */ + pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_DBGCTL1); + pwr_reg = ~(1cpu); Use BIT(cpu) here. And you should run scripts/checkpatch.pl on your patches before sending them. For the record: $ scripts/checkpatch.pl --strict allwinner.patch total: 0 errors, 0 warnings, 0 checks, 527 lines checked allwinner.patch has no obvious style problems and is ready for submission. This is on top of v3.12-rc1-336-gd8524ae. checkpatch.pl does not complain as long as the number of spaces before and after an operator is the same. There is a patch pending to change this with the --strict option, but it will still not complain in 'normal' operation. Hmmm, ok. Somehow, I was convinced that it was triggering a warning. Thanks for the heads up :) Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On 09/21/2013 07:00 AM, Maxime Ripard wrote: [ ... ] + /* assert cpu core reset */ + writel(0, sunxi7i_cc_base + CPUX_RESET_CTL(cpu)); + /* L1RSTDISABLE hold low */ + pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_GENCTL); + pwr_reg &= ~(1< Use BIT(cpu) here. And you should run scripts/checkpatch.pl on your patches before sending them. For the record: $ scripts/checkpatch.pl --strict allwinner.patch total: 0 errors, 0 warnings, 0 checks, 527 lines checked allwinner.patch has no obvious style problems and is ready for submission. This is on top of "v3.12-rc1-336-gd8524ae". checkpatch.pl does not complain as long as the number of spaces before and after an operator is the same. There is a patch pending to change this with the --strict option, but it will still not complain in 'normal' operation. Guenter -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On 09/21/2013 07:00 AM, Maxime Ripard wrote: [ ... ] + /* assert cpu core reset */ + writel(0, sunxi7i_cc_base + CPUX_RESET_CTL(cpu)); + /* L1RSTDISABLE hold low */ + pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_GENCTL); + pwr_reg = ~(1cpu); + writel(pwr_reg, sunxi7i_cc_base + AW_CPUCFG_GENCTL); + /* DBGPWRDUP hold low */ + pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_DBGCTL1); + pwr_reg = ~(1cpu); Use BIT(cpu) here. And you should run scripts/checkpatch.pl on your patches before sending them. For the record: $ scripts/checkpatch.pl --strict allwinner.patch total: 0 errors, 0 warnings, 0 checks, 527 lines checked allwinner.patch has no obvious style problems and is ready for submission. This is on top of v3.12-rc1-336-gd8524ae. checkpatch.pl does not complain as long as the number of spaces before and after an operator is the same. There is a patch pending to change this with the --strict option, but it will still not complain in 'normal' operation. Guenter -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On Sun, Sep 22, 2013 at 12:49:45AM +0800, cinifr wrote: > Thanks. I have modify my patch as you said. > It is in attachments. Maybe I remail the new patch? Yes, remail the whole serie and change the prefix to PATCHv3 (you can use the --subject-prefix option of git format-patch to do so). Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On Sun, Sep 22, 2013 at 12:49:45AM +0800, cinifr wrote: > Thanks. I have modify my patch as you said. > It is in attachments. Maybe I remail the new patch? Please don't attach patches (or if you do, ensure that they have an inline disposition) as non-inline attachments can't be easily quoted and replied to. Thanks. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Thanks. I have modify my patch as you said. It is in attachments. Maybe I remail the new patch? 0001-Add-smp-support-for-Allwinner-A20-sunxi-7i.patch Description: Binary data
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Hi Fan, On Sat, Sep 21, 2013 at 09:05:14PM +0800, Fan Rong wrote: > Signed-off-by: Fan Rong I'd prefer a more verbose commit log here, and for the following patches as well. Usually, you detail what you're doing in the commit "title", and the rest of the commit log would be why you're doing so, the possible consequences it might have (for example, in your architected timer related patch, it would be great to have a mention that in order to use it, you need to upgrade your bootloader, or it will fail to boot). This will ensure to have a decent history, and we can easily get the context of a given change. > --- > arch/arm/mach-sunxi/Makefile | 2 + > arch/arm/mach-sunxi/headsmp.S | 12 ++ > arch/arm/mach-sunxi/platform.h | 347 > + > arch/arm/mach-sunxi/platsmp.c | 100 > arch/arm/mach-sunxi/sunxi.c| 34 +++- > 5 files changed, 494 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/mach-sunxi/headsmp.S > create mode 100644 arch/arm/mach-sunxi/platform.h > create mode 100644 arch/arm/mach-sunxi/platsmp.c > > diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile > index 93bebfc..d7f1ef4 100644 > --- a/arch/arm/mach-sunxi/Makefile > +++ b/arch/arm/mach-sunxi/Makefile > @@ -1 +1,3 @@ > obj-$(CONFIG_ARCH_SUNXI) += sunxi.o > +obj-$(CONFIG_ARCH_SUNXI) += platsmp.o > +obj-$(CONFIG_ARCH_SUNXI) += headsmp.o > diff --git a/arch/arm/mach-sunxi/headsmp.S b/arch/arm/mach-sunxi/headsmp.S > new file mode 100644 > index 000..b400602 > --- /dev/null > +++ b/arch/arm/mach-sunxi/headsmp.S > @@ -0,0 +1,12 @@ > +#include > +#include > + > +.section ".text.head", "ax" > + __CPUINIT > + > +ENTRY(sun7i_secondary_startup) > + msr cpsr_fsxc, #0xd3 > + mov r0, #0 > + ldr r1, =0x I don't think setting r0 and r1 is needed here. > + b secondary_startup > +ENDPROC(sun7i_secondary_startup) > diff --git a/arch/arm/mach-sunxi/platform.h b/arch/arm/mach-sunxi/platform.h > new file mode 100644 > index 000..7e127c9 > --- /dev/null > +++ b/arch/arm/mach-sunxi/platform.h > @@ -0,0 +1,347 @@ > +/* > + * arch/arm/plat-sunxi/include/plat/platform.h > + * Please remove this file. We don't need it at all. > + * (C) Copyright 2007-2012 > + * Allwinner Technology Co., Ltd. > + * Benn Huang > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > +extern struct smp_operations sunxi7i_smp_ops; > +extern void __iomem *sunxi7i_cc_base; > +void sun7i_secondary_startup(void); > + > +#ifndef __SW_PLATFORM_H > +#define __SW_PLATFORM_H > + > + > + > +/* Physical Address */ > +#define SW_PA_BROM_START 0x > +#define SW_PA_BROM_END0x7fff /* 32KB */ > + > +#define SW_PA_SRAM_BASE 0x > + > +/* sun7i sram addresses */ > +#define SW_PA_SRAM_A1_BASE0x > +#define SW_PA_SRAM_A2_BASE0x4000 > +#define SW_PA_SRAM_A3_BASE0x8000 > +#define SW_PA_SRAM_A4_BASE0xb400 > +#define SW_PA_SRAM_D_BASE 0x0001 > +#define SW_PA_SRAM_B_BASE 0x0002 > + > +#define SW_PA_SDRAM_START 0x4000 > +#define SW_PA_IO_BASE 0x01c0 > +#define SW_PA_SRAM_IO_BASE0x01c0 /* 4KB */ > +#define SW_PA_DRAM_IO_BASE0x01c01000 > +#define SW_PA_DMAC_IO_BASE0x01c02000 > +#define SW_PA_NANDFLASHC_IO_BASE 0x01c03000 > +#define SW_PA_TSI_IO_BASE 0x01c04000 > +#define SW_PA_SPI0_IO_BASE0x01c05000 > +#define SW_PA_SPI1_IO_BASE0x01c06000 > +#define SW_PA_MSCC_IO_BASE0x01c07000 > +#define SW_PA_TVD_IO_BASE 0x01c08000 > +#define SW_PA_CSI0_IO_BASE0x01c09000 > +#define SW_PA_TVE_IO_BASE 0x01c0a000 > +#define SW_PA_EMAC_IO_BASE0x01c0b000 > +#define SW_PA_TCON0_IO_BASE 0x01c0c000 > +#define SW_PA_TCON1_IO_BASE 0x01c0d000 > +#define SW_PA_VE_IO_BASE 0x01c0e000 > +#define SW_PA_SDC0_IO_BASE0x01c0f000 > +#define SW_PA_SDC1_IO_BASE0x01c1 > +#define
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On Sat, Sep 21, 2013 at 09:05:14PM +0800, Fan Rong wrote: > @@ -0,0 +1,12 @@ > +#include > +#include > + > +.section ".text.head", "ax" Please use a tab instead of 8 spaces. > + __CPUINIT __CPUINIT has been removed. > + > +ENTRY(sun7i_secondary_startup) > + msr cpsr_fsxc, #0xd3 > + mov r0, #0 > + ldr r1, =0x You don't need to set r0 nor r1 here. > + b secondary_startup > +ENDPROC(sun7i_secondary_startup) > diff --git a/arch/arm/mach-sunxi/platform.h b/arch/arm/mach-sunxi/platform.h > new file mode 100644 > index 000..7e127c9 > --- /dev/null > +++ b/arch/arm/mach-sunxi/platform.h > @@ -0,0 +1,347 @@ > +/* > + * arch/arm/plat-sunxi/include/plat/platform.h > + * > + * (C) Copyright 2007-2012 > + * Allwinner Technology Co., Ltd. > + * Benn Huang > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA Just the first paragraph is sufficient. Also are you sure you want the "or any later version"? The kernel is predominantly a GPLv2 only project. What are the origins of this file - do you have the ability to change this? > + /* step3: clear power-off gating */ > + pwr_reg = readl(sunxi7i_cc_base + AW_CPU1_PWROFF_REG); > + pwr_reg &= ~(1); I think I've said this before. The parens around '1' are not required. What do you think you gain by having the additional parens? > + writel(pwr_reg, sunxi7i_cc_base + AW_CPU1_PWROFF_REG); > + mdelay(1); > + > + /* step4: de-assert core reset */ > + writel(3, sunxi7i_cc_base + CPUX_RESET_CTL(cpu)); > + > + /* step5: assert DBGPWRDUP signal */ > + pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_DBGCTL1); > + pwr_reg |= (1
[PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Signed-off-by: Fan Rong --- arch/arm/mach-sunxi/Makefile | 2 + arch/arm/mach-sunxi/headsmp.S | 12 ++ arch/arm/mach-sunxi/platform.h | 347 + arch/arm/mach-sunxi/platsmp.c | 100 arch/arm/mach-sunxi/sunxi.c| 34 +++- 5 files changed, 494 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-sunxi/headsmp.S create mode 100644 arch/arm/mach-sunxi/platform.h create mode 100644 arch/arm/mach-sunxi/platsmp.c diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index 93bebfc..d7f1ef4 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -1 +1,3 @@ obj-$(CONFIG_ARCH_SUNXI) += sunxi.o +obj-$(CONFIG_ARCH_SUNXI) += platsmp.o +obj-$(CONFIG_ARCH_SUNXI) += headsmp.o diff --git a/arch/arm/mach-sunxi/headsmp.S b/arch/arm/mach-sunxi/headsmp.S new file mode 100644 index 000..b400602 --- /dev/null +++ b/arch/arm/mach-sunxi/headsmp.S @@ -0,0 +1,12 @@ +#include +#include + +.section ".text.head", "ax" + __CPUINIT + +ENTRY(sun7i_secondary_startup) + msr cpsr_fsxc, #0xd3 + mov r0, #0 + ldr r1, =0x + b secondary_startup +ENDPROC(sun7i_secondary_startup) diff --git a/arch/arm/mach-sunxi/platform.h b/arch/arm/mach-sunxi/platform.h new file mode 100644 index 000..7e127c9 --- /dev/null +++ b/arch/arm/mach-sunxi/platform.h @@ -0,0 +1,347 @@ +/* + * arch/arm/plat-sunxi/include/plat/platform.h + * + * (C) Copyright 2007-2012 + * Allwinner Technology Co., Ltd. + * Benn Huang + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +extern struct smp_operations sunxi7i_smp_ops; +extern void __iomem *sunxi7i_cc_base; +void sun7i_secondary_startup(void); + +#ifndef __SW_PLATFORM_H +#define __SW_PLATFORM_H + + + +/* Physical Address */ +#define SW_PA_BROM_START 0x +#define SW_PA_BROM_END0x7fff /* 32KB */ + +#define SW_PA_SRAM_BASE 0x + +/* sun7i sram addresses */ +#define SW_PA_SRAM_A1_BASE0x +#define SW_PA_SRAM_A2_BASE0x4000 +#define SW_PA_SRAM_A3_BASE0x8000 +#define SW_PA_SRAM_A4_BASE0xb400 +#define SW_PA_SRAM_D_BASE 0x0001 +#define SW_PA_SRAM_B_BASE 0x0002 + +#define SW_PA_SDRAM_START 0x4000 +#define SW_PA_IO_BASE 0x01c0 +#define SW_PA_SRAM_IO_BASE0x01c0 /* 4KB */ +#define SW_PA_DRAM_IO_BASE0x01c01000 +#define SW_PA_DMAC_IO_BASE0x01c02000 +#define SW_PA_NANDFLASHC_IO_BASE 0x01c03000 +#define SW_PA_TSI_IO_BASE 0x01c04000 +#define SW_PA_SPI0_IO_BASE0x01c05000 +#define SW_PA_SPI1_IO_BASE0x01c06000 +#define SW_PA_MSCC_IO_BASE0x01c07000 +#define SW_PA_TVD_IO_BASE 0x01c08000 +#define SW_PA_CSI0_IO_BASE0x01c09000 +#define SW_PA_TVE_IO_BASE 0x01c0a000 +#define SW_PA_EMAC_IO_BASE0x01c0b000 +#define SW_PA_TCON0_IO_BASE 0x01c0c000 +#define SW_PA_TCON1_IO_BASE 0x01c0d000 +#define SW_PA_VE_IO_BASE 0x01c0e000 +#define SW_PA_SDC0_IO_BASE0x01c0f000 +#define SW_PA_SDC1_IO_BASE0x01c1 +#define SW_PA_SDC2_IO_BASE0x01c11000 +#define SW_PA_SDC3_IO_BASE0x01c12000 +#define SW_PA_USB0_IO_BASE0x01c13000 +#define SW_PA_USB1_IO_BASE0x01c14000 +#define SW_PA_SSE_IO_BASE 0x01c15000 +#define SW_PA_HDMI_IO_BASE0x01c16000 +#define SW_PA_SPI2_IO_BASE0x01c17000 +#define SW_PA_SATA_IO_BASE0x01c18000 +#define SW_PA_PATA_IO_BASE0x01c19000 +#define SW_PA_ACE_IO_BASE 0x01c1a000 +#define SW_PA_TVE1_IO_BASE0x01c1b000 +#define SW_PA_USB2_IO_BASE0x01c1c000 +#define SW_PA_CSI1_IO_BASE0x01c1d000 +#define SW_PA_TZASC_IO_BASE 0x01c1e000 +#define SW_PA_SPI3_IO_BASE0x01c1f000 +#define SW_PA_CCM_IO_BASE 0x01c2 +#define SW_PA_INT_IO_BASE
[PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Signed-off-by: Fan Rong cin...@gmail.com --- arch/arm/mach-sunxi/Makefile | 2 + arch/arm/mach-sunxi/headsmp.S | 12 ++ arch/arm/mach-sunxi/platform.h | 347 + arch/arm/mach-sunxi/platsmp.c | 100 arch/arm/mach-sunxi/sunxi.c| 34 +++- 5 files changed, 494 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-sunxi/headsmp.S create mode 100644 arch/arm/mach-sunxi/platform.h create mode 100644 arch/arm/mach-sunxi/platsmp.c diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index 93bebfc..d7f1ef4 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -1 +1,3 @@ obj-$(CONFIG_ARCH_SUNXI) += sunxi.o +obj-$(CONFIG_ARCH_SUNXI) += platsmp.o +obj-$(CONFIG_ARCH_SUNXI) += headsmp.o diff --git a/arch/arm/mach-sunxi/headsmp.S b/arch/arm/mach-sunxi/headsmp.S new file mode 100644 index 000..b400602 --- /dev/null +++ b/arch/arm/mach-sunxi/headsmp.S @@ -0,0 +1,12 @@ +#include linux/linkage.h +#include linux/init.h + +.section .text.head, ax + __CPUINIT + +ENTRY(sun7i_secondary_startup) + msr cpsr_fsxc, #0xd3 + mov r0, #0 + ldr r1, =0x + b secondary_startup +ENDPROC(sun7i_secondary_startup) diff --git a/arch/arm/mach-sunxi/platform.h b/arch/arm/mach-sunxi/platform.h new file mode 100644 index 000..7e127c9 --- /dev/null +++ b/arch/arm/mach-sunxi/platform.h @@ -0,0 +1,347 @@ +/* + * arch/arm/plat-sunxi/include/plat/platform.h + * + * (C) Copyright 2007-2012 + * Allwinner Technology Co., Ltd. www.allwinnertech.com + * Benn Huang b...@allwinnertech.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +extern struct smp_operations sunxi7i_smp_ops; +extern void __iomem *sunxi7i_cc_base; +void sun7i_secondary_startup(void); + +#ifndef __SW_PLATFORM_H +#define __SW_PLATFORM_H + + + +/* Physical Address */ +#define SW_PA_BROM_START 0x +#define SW_PA_BROM_END0x7fff /* 32KB */ + +#define SW_PA_SRAM_BASE 0x + +/* sun7i sram addresses */ +#define SW_PA_SRAM_A1_BASE0x +#define SW_PA_SRAM_A2_BASE0x4000 +#define SW_PA_SRAM_A3_BASE0x8000 +#define SW_PA_SRAM_A4_BASE0xb400 +#define SW_PA_SRAM_D_BASE 0x0001 +#define SW_PA_SRAM_B_BASE 0x0002 + +#define SW_PA_SDRAM_START 0x4000 +#define SW_PA_IO_BASE 0x01c0 +#define SW_PA_SRAM_IO_BASE0x01c0 /* 4KB */ +#define SW_PA_DRAM_IO_BASE0x01c01000 +#define SW_PA_DMAC_IO_BASE0x01c02000 +#define SW_PA_NANDFLASHC_IO_BASE 0x01c03000 +#define SW_PA_TSI_IO_BASE 0x01c04000 +#define SW_PA_SPI0_IO_BASE0x01c05000 +#define SW_PA_SPI1_IO_BASE0x01c06000 +#define SW_PA_MSCC_IO_BASE0x01c07000 +#define SW_PA_TVD_IO_BASE 0x01c08000 +#define SW_PA_CSI0_IO_BASE0x01c09000 +#define SW_PA_TVE_IO_BASE 0x01c0a000 +#define SW_PA_EMAC_IO_BASE0x01c0b000 +#define SW_PA_TCON0_IO_BASE 0x01c0c000 +#define SW_PA_TCON1_IO_BASE 0x01c0d000 +#define SW_PA_VE_IO_BASE 0x01c0e000 +#define SW_PA_SDC0_IO_BASE0x01c0f000 +#define SW_PA_SDC1_IO_BASE0x01c1 +#define SW_PA_SDC2_IO_BASE0x01c11000 +#define SW_PA_SDC3_IO_BASE0x01c12000 +#define SW_PA_USB0_IO_BASE0x01c13000 +#define SW_PA_USB1_IO_BASE0x01c14000 +#define SW_PA_SSE_IO_BASE 0x01c15000 +#define SW_PA_HDMI_IO_BASE0x01c16000 +#define SW_PA_SPI2_IO_BASE0x01c17000 +#define SW_PA_SATA_IO_BASE0x01c18000 +#define SW_PA_PATA_IO_BASE0x01c19000 +#define SW_PA_ACE_IO_BASE 0x01c1a000 +#define SW_PA_TVE1_IO_BASE0x01c1b000 +#define SW_PA_USB2_IO_BASE0x01c1c000 +#define SW_PA_CSI1_IO_BASE0x01c1d000 +#define SW_PA_TZASC_IO_BASE 0x01c1e000 +#define SW_PA_SPI3_IO_BASE0x01c1f000 +#define
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On Sat, Sep 21, 2013 at 09:05:14PM +0800, Fan Rong wrote: @@ -0,0 +1,12 @@ +#include linux/linkage.h +#include linux/init.h + +.section .text.head, ax Please use a tab instead of 8 spaces. + __CPUINIT __CPUINIT has been removed. + +ENTRY(sun7i_secondary_startup) + msr cpsr_fsxc, #0xd3 + mov r0, #0 + ldr r1, =0x You don't need to set r0 nor r1 here. + b secondary_startup +ENDPROC(sun7i_secondary_startup) diff --git a/arch/arm/mach-sunxi/platform.h b/arch/arm/mach-sunxi/platform.h new file mode 100644 index 000..7e127c9 --- /dev/null +++ b/arch/arm/mach-sunxi/platform.h @@ -0,0 +1,347 @@ +/* + * arch/arm/plat-sunxi/include/plat/platform.h + * + * (C) Copyright 2007-2012 + * Allwinner Technology Co., Ltd. www.allwinnertech.com + * Benn Huang b...@allwinnertech.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA Just the first paragraph is sufficient. Also are you sure you want the or any later version? The kernel is predominantly a GPLv2 only project. What are the origins of this file - do you have the ability to change this? + /* step3: clear power-off gating */ + pwr_reg = readl(sunxi7i_cc_base + AW_CPU1_PWROFF_REG); + pwr_reg = ~(1); I think I've said this before. The parens around '1' are not required. What do you think you gain by having the additional parens? + writel(pwr_reg, sunxi7i_cc_base + AW_CPU1_PWROFF_REG); + mdelay(1); + + /* step4: de-assert core reset */ + writel(3, sunxi7i_cc_base + CPUX_RESET_CTL(cpu)); + + /* step5: assert DBGPWRDUP signal */ + pwr_reg = readl(sunxi7i_cc_base + AW_CPUCFG_DBGCTL1); + pwr_reg |= (1cpu); The parens around 1cpu are not required. What do you think you gain by having them? Coding style also suggests placing a space before and after the operation as well. Again, I've said this in my previous review. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Hi Fan, On Sat, Sep 21, 2013 at 09:05:14PM +0800, Fan Rong wrote: Signed-off-by: Fan Rong cin...@gmail.com I'd prefer a more verbose commit log here, and for the following patches as well. Usually, you detail what you're doing in the commit title, and the rest of the commit log would be why you're doing so, the possible consequences it might have (for example, in your architected timer related patch, it would be great to have a mention that in order to use it, you need to upgrade your bootloader, or it will fail to boot). This will ensure to have a decent history, and we can easily get the context of a given change. --- arch/arm/mach-sunxi/Makefile | 2 + arch/arm/mach-sunxi/headsmp.S | 12 ++ arch/arm/mach-sunxi/platform.h | 347 + arch/arm/mach-sunxi/platsmp.c | 100 arch/arm/mach-sunxi/sunxi.c| 34 +++- 5 files changed, 494 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-sunxi/headsmp.S create mode 100644 arch/arm/mach-sunxi/platform.h create mode 100644 arch/arm/mach-sunxi/platsmp.c diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index 93bebfc..d7f1ef4 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -1 +1,3 @@ obj-$(CONFIG_ARCH_SUNXI) += sunxi.o +obj-$(CONFIG_ARCH_SUNXI) += platsmp.o +obj-$(CONFIG_ARCH_SUNXI) += headsmp.o diff --git a/arch/arm/mach-sunxi/headsmp.S b/arch/arm/mach-sunxi/headsmp.S new file mode 100644 index 000..b400602 --- /dev/null +++ b/arch/arm/mach-sunxi/headsmp.S @@ -0,0 +1,12 @@ +#include linux/linkage.h +#include linux/init.h + +.section .text.head, ax + __CPUINIT + +ENTRY(sun7i_secondary_startup) + msr cpsr_fsxc, #0xd3 + mov r0, #0 + ldr r1, =0x I don't think setting r0 and r1 is needed here. + b secondary_startup +ENDPROC(sun7i_secondary_startup) diff --git a/arch/arm/mach-sunxi/platform.h b/arch/arm/mach-sunxi/platform.h new file mode 100644 index 000..7e127c9 --- /dev/null +++ b/arch/arm/mach-sunxi/platform.h @@ -0,0 +1,347 @@ +/* + * arch/arm/plat-sunxi/include/plat/platform.h + * Please remove this file. We don't need it at all. + * (C) Copyright 2007-2012 + * Allwinner Technology Co., Ltd. www.allwinnertech.com + * Benn Huang b...@allwinnertech.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +extern struct smp_operations sunxi7i_smp_ops; +extern void __iomem *sunxi7i_cc_base; +void sun7i_secondary_startup(void); + +#ifndef __SW_PLATFORM_H +#define __SW_PLATFORM_H + + + +/* Physical Address */ +#define SW_PA_BROM_START 0x +#define SW_PA_BROM_END0x7fff /* 32KB */ + +#define SW_PA_SRAM_BASE 0x + +/* sun7i sram addresses */ +#define SW_PA_SRAM_A1_BASE0x +#define SW_PA_SRAM_A2_BASE0x4000 +#define SW_PA_SRAM_A3_BASE0x8000 +#define SW_PA_SRAM_A4_BASE0xb400 +#define SW_PA_SRAM_D_BASE 0x0001 +#define SW_PA_SRAM_B_BASE 0x0002 + +#define SW_PA_SDRAM_START 0x4000 +#define SW_PA_IO_BASE 0x01c0 +#define SW_PA_SRAM_IO_BASE0x01c0 /* 4KB */ +#define SW_PA_DRAM_IO_BASE0x01c01000 +#define SW_PA_DMAC_IO_BASE0x01c02000 +#define SW_PA_NANDFLASHC_IO_BASE 0x01c03000 +#define SW_PA_TSI_IO_BASE 0x01c04000 +#define SW_PA_SPI0_IO_BASE0x01c05000 +#define SW_PA_SPI1_IO_BASE0x01c06000 +#define SW_PA_MSCC_IO_BASE0x01c07000 +#define SW_PA_TVD_IO_BASE 0x01c08000 +#define SW_PA_CSI0_IO_BASE0x01c09000 +#define SW_PA_TVE_IO_BASE 0x01c0a000 +#define SW_PA_EMAC_IO_BASE0x01c0b000 +#define SW_PA_TCON0_IO_BASE 0x01c0c000 +#define SW_PA_TCON1_IO_BASE 0x01c0d000 +#define SW_PA_VE_IO_BASE 0x01c0e000 +#define SW_PA_SDC0_IO_BASE0x01c0f000 +#define SW_PA_SDC1_IO_BASE0x01c1 +#define SW_PA_SDC2_IO_BASE
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
Thanks. I have modify my patch as you said. It is in attachments. Maybe I remail the new patch? 0001-Add-smp-support-for-Allwinner-A20-sunxi-7i.patch Description: Binary data
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On Sun, Sep 22, 2013 at 12:49:45AM +0800, cinifr wrote: Thanks. I have modify my patch as you said. It is in attachments. Maybe I remail the new patch? Please don't attach patches (or if you do, ensure that they have an inline disposition) as non-inline attachments can't be easily quoted and replied to. Thanks. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).
On Sun, Sep 22, 2013 at 12:49:45AM +0800, cinifr wrote: Thanks. I have modify my patch as you said. It is in attachments. Maybe I remail the new patch? Yes, remail the whole serie and change the prefix to PATCHv3 (you can use the --subject-prefix option of git format-patch to do so). Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
