Re: [PATCH 1/4] ARM: dts: imx6sx: move GIC to right location in DT

2019-07-23 Thread Shawn Guo
On Thu, Jul 18, 2019 at 05:15:05PM +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang 
> 
> GIC is inside of SoC from architecture perspective, it should
> be located inside of soc node in DT.
> 
> Signed-off-by: Anson Huang 

Applied all, thanks.


[PATCH 1/4] ARM: dts: imx6sx: move GIC to right location in DT

2019-07-18 Thread Anson . Huang
From: Anson Huang 

GIC is inside of SoC from architecture perspective, it should
be located inside of soc node in DT.

Signed-off-by: Anson Huang 
---
 arch/arm/boot/dts/imx6sx.dtsi | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index bb25add..fe00f9a 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -90,15 +90,6 @@
};
};
 
-   intc: interrupt-controller@a01000 {
-   compatible = "arm,cortex-a9-gic";
-   #interrupt-cells = <3>;
-   interrupt-controller;
-   reg = <0x00a01000 0x1000>,
- <0x00a00100 0x100>;
-   interrupt-parent = <>;
-   };
-
ckil: clock-ckil {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -181,6 +172,15 @@
clocks = < IMX6SX_CLK_OCRAM>;
};
 
+   intc: interrupt-controller@a01000 {
+   compatible = "arm,cortex-a9-gic";
+   #interrupt-cells = <3>;
+   interrupt-controller;
+   reg = <0x00a01000 0x1000>,
+ <0x00a00100 0x100>;
+   interrupt-parent = <>;
+   };
+
L2: l2-cache@a02000 {
compatible = "arm,pl310-cache";
reg = <0x00a02000 0x1000>;
-- 
2.7.4