Add clock information to device nodes.
Signed-off-by: Prashant Gaikwad
---
Tested on Ventana (Tegra20) and Cardhu (Tegra30).
This series depends on ccf-rework patch series.
---
arch/arm/boot/dts/tegra20.dtsi | 41
1 files changed, 41 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index be3421d..8cc5295 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -17,6 +17,7 @@
reg = <0x5000 0x00024000>;
interrupts = <0 65 0x04 /* mpcore syncpt */
0 67 0x04>; /* mpcore general */
+ clocks = <&tegra_car 28>;
#address-cells = <1>;
#size-cells = <1>;
@@ -27,41 +28,48 @@
compatible = "nvidia,tegra20-mpe";
reg = <0x5404 0x0004>;
interrupts = <0 68 0x04>;
+ clocks = <&tegra_car 60>;
};
vi {
compatible = "nvidia,tegra20-vi";
reg = <0x5408 0x0004>;
interrupts = <0 69 0x04>;
+ clocks = <&tegra_car 100>;
};
epp {
compatible = "nvidia,tegra20-epp";
reg = <0x540c 0x0004>;
interrupts = <0 70 0x04>;
+ clocks = <&tegra_car 19>;
};
isp {
compatible = "nvidia,tegra20-isp";
reg = <0x5410 0x0004>;
interrupts = <0 71 0x04>;
+ clocks = <&tegra_car 23>;
};
gr2d {
compatible = "nvidia,tegra20-gr2d";
reg = <0x5414 0x0004>;
interrupts = <0 72 0x04>;
+ clocks = <&tegra_car 21>;
};
gr3d {
compatible = "nvidia,tegra20-gr3d";
reg = <0x5418 0x0004>;
+ clocks = <&tegra_car 24>;
};
dc@5420 {
compatible = "nvidia,tegra20-dc";
reg = <0x5420 0x0004>;
interrupts = <0 73 0x04>;
+ clocks = <&tegra_car 27>;
rgb {
status = "disabled";
@@ -72,6 +80,7 @@
compatible = "nvidia,tegra20-dc";
reg = <0x5424 0x0004>;
interrupts = <0 74 0x04>;
+ clocks = <&tegra_car 26>;
rgb {
status = "disabled";
@@ -83,6 +92,7 @@
reg = <0x5428 0x0004>;
interrupts = <0 75 0x04>;
status = "disabled";
+ clocks = <&tegra_car 51>;
};
tvo {
@@ -90,12 +100,14 @@
reg = <0x542c 0x0004>;
interrupts = <0 76 0x04>;
status = "disabled";
+ clocks = <&tegra_car 102>;
};
dsi {
compatible = "nvidia,tegra20-dsi";
reg = <0x5430 0x0004>;
status = "disabled";
+ clocks = <&tegra_car 48>;
};
};
@@ -156,6 +168,7 @@
0 117 0x04
0 118 0x04
0 119 0x04>;
+ clocks = <&tegra_car 34>;
};
ahb {
@@ -198,6 +211,7 @@
interrupts = <0 13 0x04>;
nvidia,dma-request-selector = <&apbdma 2>;
status = "disabled";
+ clocks = <&tegra_car 11>;
};
tegra_i2s2: i2s@70002a00 {
@@ -206,6 +220,7 @@
interrupts = <0 3 0x04>;
nvidia,dma-request-selector = <&apbdma 1>;
status = "disabled";
+ clocks = <&tegra_car 18>;
};
/*
@@ -222,6 +237,7 @@
interrupts = <0 36 0x04>;
nvidia,dma-request-selector = <&apbdma 8>;
status = "disabled";
+ clocks = <&tegra_car 6>;
};
uartb: serial@70006040 {
@@ -231,6 +247,7 @@
interrupts = <0 37 0x04>;
nvidia,dma-request-selector = <&apbdma 9>;
status = "disabled";
+ clocks = <&tegra_car 96>;
};
uartc: serial@70006200 {
@@ -240,6 +257,7 @@
interrupts = <0 46 0x04>;
nvidia,dma-request-selector = <&apbdma 10>