Re: [PATCH 10/16] CRIS architecture: Correct compile errors
On Thu, Nov 01, 2007 at 11:48:11AM +0100, Jesper Nilsson wrote:
> On Tue, Oct 30, 2007 at 03:14:17PM -0700, Andrew Morton wrote:
> > On Tue, 30 Oct 2007 10:33:28 +0100
> > Jesper Nilsson <[EMAIL PROTECTED]> wrote:
> >
> > > New and improved serial driver for cris v10.
> >
> > I wasn't able to apply this due to extensive patch rejects.
>
> Here is an updated patch, I've cleaned up all checkpatch warnings and errors,
> and also removed a lot of stuff that wasn't needed anymore.
Unfortunately, I failed to include the headerfile, which had a number
of checkpatch warnings. I've removed all except the volatile warnings,
which need a rewrite of the driver. I'll put that one on the list to
be looked at.
Signed-off-by: Jesper Nilsson <[EMAIL PROTECTED]>
---
crisv10.h | 151 ++
1 file changed, 151 insertions(+)
--- /dev/null 2007-10-06 06:38:38.348072750 +0200
+++ drivers/serial/crisv10.h2007-11-01 16:39:35.0 +0100
@@ -0,0 +1,151 @@
+/*
+ * serial.h: Arch-dep definitions for the Etrax100 serial driver.
+ *
+ * Copyright (C) 1998-2007 Axis Communications AB
+ */
+
+#ifndef _ETRAX_SERIAL_H
+#define _ETRAX_SERIAL_H
+
+#include
+#include
+#include
+#include
+
+/* Software state per channel */
+
+#ifdef __KERNEL__
+/*
+ * This is our internal structure for each serial port's state.
+ *
+ * Many fields are paralleled by the structure used by the serial_struct
+ * structure.
+ *
+ * For definitions of the flags field, see tty.h
+ */
+
+#define SERIAL_RECV_DESCRIPTORS 8
+
+struct etrax_recv_buffer {
+ struct etrax_recv_buffer *next;
+ unsigned short length;
+ unsigned char error;
+ unsigned char pad;
+
+ unsigned char buffer[0];
+};
+
+struct e100_serial {
+ int baud;
+ volatile u8 *port; /* R_SERIALx_CTRL */
+ u32 irq;/* bitnr in R_IRQ_MASK2 for dmaX_descr */
+
+ /* Output registers */
+ volatile u8 *oclrintradr; /* adr to R_DMA_CHx_CLR_INTR */
+ volatile u32 *ofirstadr;/* adr to R_DMA_CHx_FIRST */
+ volatile u8 *ocmdadr; /* adr to R_DMA_CHx_CMD */
+ const volatile u8 *ostatusadr; /* adr to R_DMA_CHx_STATUS */
+
+ /* Input registers */
+ volatile u8 *iclrintradr; /* adr to R_DMA_CHx_CLR_INTR */
+ volatile u32 *ifirstadr;/* adr to R_DMA_CHx_FIRST */
+ volatile u8 *icmdadr; /* adr to R_DMA_CHx_CMD */
+ volatile u32 *idescradr;/* adr to R_DMA_CHx_DESCR */
+
+ int flags; /* defined in tty.h */
+
+ u8 rx_ctrl; /* shadow for R_SERIALx_REC_CTRL */
+ u8 tx_ctrl; /* shadow for R_SERIALx_TR_CTRL */
+ u8 iseteop; /* bit number for R_SET_EOP for the input dma */
+ int enabled;/* Set to 1 if the port is enabled in HW config */
+
+ u8 dma_out_enabled:1; /* Set to 1 if DMA should be used */
+ u8 dma_in_enabled:1;/* Set to 1 if DMA should be used */
+
+ /* end of fields defined in rs_table[] in .c-file */
+ int dma_owner;
+ unsigned intdma_in_nbr;
+ unsigned intdma_out_nbr;
+ unsigned intdma_in_irq_nbr;
+ unsigned intdma_out_irq_nbr;
+ unsigned long dma_in_irq_flags;
+ unsigned long dma_out_irq_flags;
+ char*dma_in_irq_description;
+ char*dma_out_irq_description;
+
+ enum cris_io_interface io_if;
+ char*io_if_description;
+
+ u8 uses_dma_in; /* Set to 1 if DMA is used */
+ u8 uses_dma_out; /* Set to 1 if DMA is used */
+ u8 forced_eop; /* a fifo eop has been forced */
+ int baud_base; /* For special baudrates */
+ int custom_divisor; /* For special baudrates */
+ struct etrax_dma_descr tr_descr;
+ struct etrax_dma_descr rec_descr[SERIAL_RECV_DESCRIPTORS];
+ int cur_rec_descr;
+
+ volatile inttr_running; /* 1 if output is running */
+
+ struct tty_struct *tty;
+ int read_status_mask;
+ int ignore_status_mask;
+ int x_char; /* xon/xoff character */
+ int close_delay;
+ unsigned short closing_wait;
+ unsigned short closing_wait2;
+ unsigned long event;
+ unsigned long last_active;
+ int line;
+ int type; /* PORT_ETRAX */
+ int count; /* # of fd on device */
+ int blocked_open; /* # of blocked opens */
+ struct circ_buf xmit;
+ struct etrax_recv_buffer *first_recv_buffer;
+ struct etrax_recv_buffer *last_recv_buffer;
+ unsigned intrecv_cnt;
+ unsigned intm
Re: [PATCH 10/16] CRIS architecture: Correct compile errors
On Tue, Oct 30, 2007 at 03:14:17PM -0700, Andrew Morton wrote: > On Tue, 30 Oct 2007 10:33:28 +0100 > Jesper Nilsson <[EMAIL PROTECTED]> wrote: > > > New and improved serial driver for cris v10. > > I wasn't able to apply this due to extensive patch rejects. Yes, I noticed that too when trying to apply to Linus git tree after I sent the patches. I'll return with an updated patch. /^JN - Jesper Nilsson -- Jesper Nilsson -- [EMAIL PROTECTED] - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 10/16] CRIS architecture: Correct compile errors
On Tue, 30 Oct 2007 15:14:17 -0700 Andrew Morton <[EMAIL PROTECTED]> wrote: > On Tue, 30 Oct 2007 10:33:28 +0100 > Jesper Nilsson <[EMAIL PROTECTED]> wrote: > > > New and improved serial driver for cris v10. > > I wasn't able to apply this due to extensive patch rejects. Jesper - can you send me a copy of the serial driver for review as well please. I'm trying to get the serial layer into conformance with standards and good behaviour so would appreciate the opportunity to review new entrants. Alan - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 10/16] CRIS architecture: Correct compile errors
On Tue, 30 Oct 2007 10:33:28 +0100 Jesper Nilsson <[EMAIL PROTECTED]> wrote: > New and improved serial driver for cris v10. I wasn't able to apply this due to extensive patch rejects. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 10/16] CRIS architecture: Correct compile errors
New and improved serial driver for cris v10. Signed-off-by: Jesper Nilsson <[EMAIL PROTECTED]> --- linux-2.6.23-mod/drivers/serial/crisv10.h | 151 + linux-2.6.23/drivers/serial/crisv10.c | 797 +- 2 files changed, 520 insertions(+), 428 deletions(-) diff -urBb -X /h/jespern/.exclude_files clean_linux-2.6.23/drivers/serial/crisv10.c linux-2.6.23/drivers/serial/crisv10.c --- clean_linux-2.6.23/drivers/serial/crisv10.c 2007-10-09 22:31:38.0 +0200 +++ linux-2.6.23/drivers/serial/crisv10.c 2007-10-23 10:49:53.0 +0200 @@ -2,7 +2,7 @@ * * Serial port driver for the ETRAX 100LX chip * - *Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB + *Copyright (C) 1998-2007 Axis Communications AB * *Many, many authors. Based once upon a time on serial.c for 16x50. * @@ -445,6 +445,7 @@ #include #include +#include #include #include #include @@ -454,8 +455,9 @@ /* non-arch dependent serial structures are in linux/serial.h */ #include /* while we keep our own stuff (struct e100_serial) in a local .h file */ -#include "serial.h" +#include "crisv10.h" #include +#include #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER #ifndef CONFIG_ETRAX_FAST_TIMER @@ -586,11 +588,10 @@ static void change_speed(struct e100_serial *info); static void rs_throttle(struct tty_struct * tty); static void rs_wait_until_sent(struct tty_struct *tty, int timeout); -static int rs_write(struct tty_struct * tty, int from_user, +static int rs_write(struct tty_struct * tty, const unsigned char *buf, int count); #ifdef CONFIG_ETRAX_RS485 -static int e100_write_rs485(struct tty_struct * tty, int from_user, -const unsigned char *buf, int count); +static int e100_write_rs485(struct tty_struct * tty, const unsigned char *buf, int count); #endif static int get_lsr_info(struct e100_serial * info, unsigned int *value); @@ -677,20 +678,39 @@ .rx_ctrl = DEF_RX, .tx_ctrl = DEF_TX, .iseteop = 2, + .dma_owner = dma_ser0, + .io_if = if_serial_0, #ifdef CONFIG_ETRAX_SERIAL_PORT0 .enabled = 1, #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT .dma_out_enabled = 1, + .dma_out_nbr = SER0_TX_DMA_NBR, + .dma_out_irq_nbr = SER0_DMA_TX_IRQ_NBR, + .dma_out_irq_flags = IRQF_DISABLED, + .dma_out_irq_description = "serial 0 dma tr", #else .dma_out_enabled = 0, + .dma_out_nbr = UINT_MAX, + .dma_out_irq_nbr = 0, + .dma_out_irq_flags = 0, + .dma_out_irq_description = NULL, #endif #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN .dma_in_enabled = 1, + .dma_in_nbr = SER0_RX_DMA_NBR, + .dma_in_irq_nbr = SER0_DMA_RX_IRQ_NBR, + .dma_in_irq_flags = IRQF_DISABLED, + .dma_in_irq_description = "serial 0 dma rec", #else - .dma_in_enabled = 0 + .dma_in_enabled = 0, + .dma_in_nbr = UINT_MAX, + .dma_in_irq_nbr = 0, + .dma_in_irq_flags = 0, + .dma_in_irq_description = NULL, #endif #else .enabled = 0, + .io_if_description = NULL, .dma_out_enabled = 0, .dma_in_enabled = 0 #endif @@ -712,20 +732,42 @@ .rx_ctrl = DEF_RX, .tx_ctrl = DEF_TX, .iseteop = 3, + .dma_owner = dma_ser1, + .io_if = if_serial_1, #ifdef CONFIG_ETRAX_SERIAL_PORT1 .enabled = 1, + .io_if_description = "ser1", #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT .dma_out_enabled = 1, + .dma_out_nbr = SER1_TX_DMA_NBR, + .dma_out_irq_nbr = SER1_DMA_TX_IRQ_NBR, + .dma_out_irq_flags = IRQF_DISABLED, + .dma_out_irq_description = "serial 1 dma tr", #else .dma_out_enabled = 0, + .dma_out_nbr = UINT_MAX, + .dma_out_irq_nbr = 0, + .dma_out_irq_flags = 0, + .dma_out_irq_description = NULL, #endif #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN .dma_in_enabled = 1, + .dma_in_nbr = SER1_RX_DMA_NBR, + .dma_in_irq_nbr = SER1_DMA_RX_IRQ_NBR, + .dma_in_irq_flags = IRQF_DISABLED, + .dma_in_irq_description = "serial 1 dma rec", #else - .dma_in_enabled = 0 + .dma_in_enabled = 0, + .dma_in_enabled = 0, + .dma_in_nbr = UINT_MAX, + .dma_in_irq_nbr = 0, + .dma_in_irq_flags = 0, + .dma_in_irq_description = NULL, #endif #else .enabled = 0, + .io_if_description = NULL, + .dma_in_irq_nbr = 0, .dma_out_enabled = 0, .dma_in_enabled = 0 #endif @@ -746,20 +788,40 @@ .rx_ctrl = DEF_RX, .tx_ctrl = DEF_TX, .iseteop = 0, + .dma_owner = dma_ser2, + .io_if = if_serial_2, #ifdef CONFIG_ETRAX_SERIAL_PORT2 .enabled = 1, + .io_i
