[PATCH 12/30] KVM: x86: hyper-v: Honor HV_MSR_SYNTIMER_AVAILABLE privilege bit

[Vitaly Kuznetsov]

Synthetic timers MSRs (HV_X64_MSR_STIMER[0-3]_CONFIG,
HV_X64_MSR_STIMER[0-3]_COUNT) are only available to guest when
HV_MSR_SYNTIMER_AVAILABLE bit is exposed.

Signed-off-by: Vitaly Kuznetsov <vkuzn...@redhat.com>
---
 arch/x86/kvm/hyperv.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/x86/kvm/hyperv.c b/arch/x86/kvm/hyperv.c
index 17bdf8e8196e..2582c23126fa 100644
--- a/arch/x86/kvm/hyperv.c
+++ b/arch/x86/kvm/hyperv.c
@@ -1227,6 +1227,16 @@ static bool hv_check_msr_access(struct kvm_vcpu_hv 
*hv_vcpu, u32 msr)
        case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
                return hv_vcpu->cpuid_cache.features_eax &
                        HV_MSR_SYNIC_AVAILABLE;
+       case HV_X64_MSR_STIMER0_CONFIG:
+       case HV_X64_MSR_STIMER1_CONFIG:
+       case HV_X64_MSR_STIMER2_CONFIG:
+       case HV_X64_MSR_STIMER3_CONFIG:
+       case HV_X64_MSR_STIMER0_COUNT:
+       case HV_X64_MSR_STIMER1_COUNT:
+       case HV_X64_MSR_STIMER2_COUNT:
+       case HV_X64_MSR_STIMER3_COUNT:
+               return hv_vcpu->cpuid_cache.features_eax &
+                       HV_MSR_SYNTIMER_AVAILABLE;
        default:
                break;
        }
-- 
2.30.2