Re: [PATCH 2/2] ARM: dts: imx53: add support for USB armory board

2016-06-28 Thread Andrej Rosano
On 2016-06-28, Shawn Guo wrote:
> Maybe GPL/X11 dual licence to consider non-Linux users.  There are
> plenty of dual licence examples under arch/arm/boot/dts.

Applied this change along with the others you suggested in the patchset v2.

Thanks,
Andrej

--
Andrej Rosano   Inverse Path Srl
  http://www.inversepath.com

0x01939B215BB8 574E 68E8 D841 E18F  D5E9 CEAD E0CF 0193 9B21


Re: [PATCH 2/2] ARM: dts: imx53: add support for USB armory board

2016-06-27 Thread Shawn Guo
On Tue, Jun 21, 2016 at 04:50:53PM +0200, and...@inversepath.com wrote:
> From: Andrej Rosano 
> 
> Add support for Inverse Path USB armory board, an open source
> flash-drive sized computer based on NXP i.MX53 SoC.
> 
> https://inversepath.com/usbarmory
> 
> Signed-off-by: Andrej Rosano 
> ---
>  arch/arm/boot/dts/Makefile|   1 +
>  arch/arm/boot/dts/imx53-usbarmory.dts | 239 
> ++
>  2 files changed, 240 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx53-usbarmory.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 414b427..f8f85ab 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -303,6 +303,7 @@ dtb-$(CONFIG_SOC_IMX53) += \
>   imx53-smd.dtb \
>   imx53-tx53-x03x.dtb \
>   imx53-tx53-x13x.dtb \
> + imx53-usbarmory.dtb \
>   imx53-voipac-bsb.dtb
>  dtb-$(CONFIG_SOC_IMX6Q) += \
>   imx6dl-apf6dev.dtb \
> diff --git a/arch/arm/boot/dts/imx53-usbarmory.dts 
> b/arch/arm/boot/dts/imx53-usbarmory.dts
> new file mode 100644
> index 000..9a172fd
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx53-usbarmory.dts
> @@ -0,0 +1,239 @@
> +/*
> + * USB armory MkI device tree include file
> + * https://inversepath.com/usbarmory
> + *
> + * Copyright (C) 2015, Inverse Path
> + * Andrej Rosano 
> + *
> + * Licensed under GPLv2
> + */

Maybe GPL/X11 dual licence to consider non-Linux users.  There are
plenty of dual licence examples under arch/arm/boot/dts.

> +
> +/dts-v1/;
> +#include "imx53.dtsi"
> +
> +/ {
> + model = "Inverse Path USB armory";
> + compatible = "inversepath,imx53-usbarmory", "fsl,imx53";
> +};
> +
> +/ {
> + chosen {
> + stdout-path = &uart1;
> + };
> +
> + memory {
> + reg = <0x7000 0x2000>;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&led_pin_gpio4_27>;
> +
> + user {
> + label = "LED";
> + gpios = <&gpio4 27 0>;

Use the macro in include/dt-bindings/gpio/gpio.h for polarity.

> + linux,default-trigger = "heartbeat";
> + };
> + };
> +};
> +
> +&cpu0 {
> + operating-points = <
> + /* kHz */
> + 16  85
> + 40  90
> + 80 105
> + >;

Can you put some comments in there explaining why you need a custom opp
table for the board?

> +};
> +
> +&esdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_esdhc1>;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl-names = "default";

The property makes no sense where there is no pinctrl-0 property.

> +
> + imx53-usbarmory {

This container node can be dropped to save an indentation level.

> + led_pin_gpio4_27: led_gpio4_27@0 {

Can this node be named in a similar scheme as other pinctrl entries?

> + fsl,pins = <
> + MX53_PAD_DISP0_DAT6__GPIO4_27 0x0
> + >;
> + };
> +
> + pinctrl_esdhc1: esdhc1grp {
> + fsl,pins = <
> + MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
> + MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
> + MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
> + MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
> + MX53_PAD_SD1_CMD__ESDHC1_CMD0x1d5
> + MX53_PAD_SD1_CLK__ESDHC1_CLK0x1d5
> + >;
> + };
> +
> + pinctrl_i2c1_pmic: i2c1grp_pmic {

Please try to sort these pinctrl entries alphabetically.

> + fsl,pins = <
> + MX53_PAD_EIM_D21__I2C1_SCL  0x0
> + MX53_PAD_EIM_D28__I2C1_SDA  0x0
> + >;
> + };
> +
> + /*
> +  * UART mode pin header configration
> +  * 3 - GPIO5[26], pull-down 100K
> +  * 4 - GPIO5[27], pull-down 100K
> +  * 5 - TX, pull-up 100K
> +  * 6 - RX, pull-up 100K
> +  * 7 - GPIO5[30], pull-down 100K
> +  */
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + MX53_PAD_CSI0_DAT8__GPIO5_260xc0
> + MX53_PAD_CSI0_DAT9__GPIO5_270xc0
> + MX53_PAD_CSI0_DAT10__UART1_TXD_MUX  0x1e4
> + MX53_PAD_CSI0_DAT11__UART1_RXD_MUX  0x1e4
> + MX53_PAD_CSI0_DAT12__GPIO5_30   0xc0
> + >;
> + };
> +
> + /*
> +  * GPIO mode pin header configuration
> +

[PATCH 2/2] ARM: dts: imx53: add support for USB armory board

2016-06-21 Thread andrej
From: Andrej Rosano 

Add support for Inverse Path USB armory board, an open source
flash-drive sized computer based on NXP i.MX53 SoC.

https://inversepath.com/usbarmory

Signed-off-by: Andrej Rosano 
---
 arch/arm/boot/dts/Makefile|   1 +
 arch/arm/boot/dts/imx53-usbarmory.dts | 239 ++
 2 files changed, 240 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx53-usbarmory.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 414b427..f8f85ab 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -303,6 +303,7 @@ dtb-$(CONFIG_SOC_IMX53) += \
imx53-smd.dtb \
imx53-tx53-x03x.dtb \
imx53-tx53-x13x.dtb \
+   imx53-usbarmory.dtb \
imx53-voipac-bsb.dtb
 dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-apf6dev.dtb \
diff --git a/arch/arm/boot/dts/imx53-usbarmory.dts 
b/arch/arm/boot/dts/imx53-usbarmory.dts
new file mode 100644
index 000..9a172fd
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-usbarmory.dts
@@ -0,0 +1,239 @@
+/*
+ * USB armory MkI device tree include file
+ * https://inversepath.com/usbarmory
+ *
+ * Copyright (C) 2015, Inverse Path
+ * Andrej Rosano 
+ *
+ * Licensed under GPLv2
+ */
+
+/dts-v1/;
+#include "imx53.dtsi"
+
+/ {
+   model = "Inverse Path USB armory";
+   compatible = "inversepath,imx53-usbarmory", "fsl,imx53";
+};
+
+/ {
+   chosen {
+   stdout-path = &uart1;
+   };
+
+   memory {
+   reg = <0x7000 0x2000>;
+   };
+
+   leds {
+   compatible = "gpio-leds";
+   pinctrl-names = "default";
+   pinctrl-0 = <&led_pin_gpio4_27>;
+
+   user {
+   label = "LED";
+   gpios = <&gpio4 27 0>;
+   linux,default-trigger = "heartbeat";
+   };
+   };
+};
+
+&cpu0 {
+   operating-points = <
+   /* kHz */
+   16  85
+   40  90
+   80 105
+   >;
+};
+
+&esdhc1 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_esdhc1>;
+   status = "okay";
+};
+
+&iomuxc {
+   pinctrl-names = "default";
+
+   imx53-usbarmory {
+   led_pin_gpio4_27: led_gpio4_27@0 {
+   fsl,pins = <
+   MX53_PAD_DISP0_DAT6__GPIO4_27 0x0
+   >;
+   };
+
+   pinctrl_esdhc1: esdhc1grp {
+   fsl,pins = <
+   MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
+   MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
+   MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
+   MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
+   MX53_PAD_SD1_CMD__ESDHC1_CMD0x1d5
+   MX53_PAD_SD1_CLK__ESDHC1_CLK0x1d5
+   >;
+   };
+
+   pinctrl_i2c1_pmic: i2c1grp_pmic {
+   fsl,pins = <
+   MX53_PAD_EIM_D21__I2C1_SCL  0x0
+   MX53_PAD_EIM_D28__I2C1_SDA  0x0
+   >;
+   };
+
+   /*
+* UART mode pin header configration
+* 3 - GPIO5[26], pull-down 100K
+* 4 - GPIO5[27], pull-down 100K
+* 5 - TX, pull-up 100K
+* 6 - RX, pull-up 100K
+* 7 - GPIO5[30], pull-down 100K
+*/
+   pinctrl_uart1: uart1grp {
+   fsl,pins = <
+   MX53_PAD_CSI0_DAT8__GPIO5_260xc0
+   MX53_PAD_CSI0_DAT9__GPIO5_270xc0
+   MX53_PAD_CSI0_DAT10__UART1_TXD_MUX  0x1e4
+   MX53_PAD_CSI0_DAT11__UART1_RXD_MUX  0x1e4
+   MX53_PAD_CSI0_DAT12__GPIO5_30   0xc0
+   >;
+   };
+
+   /*
+* GPIO mode pin header configuration
+* 3 - GPIO5[26], pull-down 100K
+* 4 - GPIO5[27], pull-down 100K
+* 5 - GPIO5[28], pull-down 100K
+* 6 - GPIO5[29], pull-down 100K
+* 7 - GPIO5[30], pull-down 100K
+*/
+   pinctrl_gpio5: gpio5grp {
+   fsl,pins = <
+   MX53_PAD_CSI0_DAT8__GPIO5_260xc0
+   MX53_PAD_CSI0_DAT9__GPIO5_270xc0
+   MX53_PAD_CSI0_DAT10__GPIO5_28   0xc0
+   MX53_PAD_CSI0_DAT11__GPIO5_29   0xc0
+   MX53_PAD_CSI0_DAT12__GPIO5_30   0xc0
+   >;
+   };
+
+   /*
+