On Tue, Dec 11, 2018 at 07:42:51PM +, Martyn Welch wrote:
> The Phytec phyBOARD Segin is i.MX6 based SBC, available with either an
> i.MX6UL or i.MX6ULL SOM and various add-on boards.
>
> The following adds support for the "Full Featured" version of the Segin,
> which is provided with the i.MX6UL SOM and the PEB-EVAL-01 evaluation
> module.
>
> Its hardware specifications are:
>
> * 512MB DDR3 memory
> * 512MB NAND flash
> * Dual 10/100 Ethernet
> * USB Host and USB OTG
> * RS232
> * MicroSD external storage
> * Audio, RS232, I2C, SPI, CAN headers
> * Further I/O options via A/V and Expansion headers
>
> Signed-off-by: Martyn Welch
>
> ---
>
> arch/arm/boot/dts/Makefile| 1 +
> arch/arm/boot/dts/imx6ul-phytec-pcl063.dtsi | 152
> .../boot/dts/imx6ul-phytec-peb-eval-01.dtsi | 55 +++
> .../dts/imx6ul-phytec-phyboard-segin-full.dts | 103 ++
> .../dts/imx6ul-phytec-phyboard-segin.dtsi | 341 ++
> 5 files changed, 652 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6ul-phytec-pcl063.dtsi
> create mode 100644 arch/arm/boot/dts/imx6ul-phytec-peb-eval-01.dtsi
> create mode 100644 arch/arm/boot/dts/imx6ul-phytec-phyboard-segin-full.dts
> create mode 100644 arch/arm/boot/dts/imx6ul-phytec-phyboard-segin.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index b0e966d625b9..6ca286f6b37c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -557,6 +557,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
> imx6ul-liteboard.dtb \
> imx6ul-opos6uldev.dtb \
> imx6ul-pico-hobbit.dtb \
> + imx6ul-phytec-phyboard-segin-full.dtb \
> imx6ul-tx6ul-0010.dtb \
> imx6ul-tx6ul-0011.dtb \
> imx6ul-tx6ul-mainboard.dtb \
> diff --git a/arch/arm/boot/dts/imx6ul-phytec-pcl063.dtsi
> b/arch/arm/boot/dts/imx6ul-phytec-pcl063.dtsi
> new file mode 100644
> index ..ede24105044f
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6ul-phytec-pcl063.dtsi
> @@ -0,0 +1,152 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2016 PHYTEC Messtechnik GmbH
> + * Author: Christian Hemp
> + */
> +
> +#include
> +#include
> +#include
> +#include "imx6ul.dtsi"
> +
> +/ {
> +
> + model = "Phytec phyCORE i.MX6 UltraLite";
> + compatible = "phytec,imx6ul-pcl063", "fsl,imx6ul";
> +
> + chosen {
> + stdout-path =
> + };
> +
> +
One newline is enough.
> + /*
> + * Set the minimum memory size here and
> + * let the bootloader set the real size.
> + */
> + memory {
> + reg = <0x8000 0x800>;
> + };
> +
> + gpio_leds_som: somleds {
leds for node name?
> + pinctrl-names = "default";
> + pinctrl-0 = <_gpioleds_som>;
> + compatible = "gpio-leds";
> + status = "okay";
The okay status is generally used to flip the disabled devices.
> +
> + som_green {
led-green?
> + label = "phycore:green";
> + gpios = < 4 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +};
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_enet1>;
> + phy-mode = "rmii";
> + phy-handle = <>;
> + status = "okay";
> +
> + mdio: mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ethphy0: ethernet-phy@1 {
> + reg = <1>;
> + interrupt-parent = <>;
> + interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
> + micrel,led-mode = <1>;
> + clocks = < IMX6UL_CLK_ENET_REF>;
> + clock-names = "rmii-ref";
> + };
> + };
> +};
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_gpmi_nand>;
> + nand-on-flash-bbt;
> + status = "okay";
> +};
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 =<_i2c1>;
> + clock-frequency = <10>;
> + status = "okay";
> +
> + eeprom@52 {
> + compatible = "catalyst,24c32", "atmel,24c32";
> + reg = <0x52>;
> + };
> +};
> +
> +_poweroff {
> + status = "okay";
> +};
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_uart1>;
> + status = "okay";
> +};
> +
> + {
> + pinctrl-names = "default";
> +
> + pinctrl_enet1: enet1grp {
> + fsl,pins = <
> + MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
> + MX6UL_PAD_GPIO1_IO06__ENET1_MDIO0x1b0b0
> + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
> + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
> + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
> + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
> + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN