Re: [PATCH 2/2] clk: qcom: rpmhcc: Add sc8180x rpmh clocks

2021-02-08 Thread Stephen Boyd
Quoting Bjorn Andersson (2021-01-20 14:37:41)
> Add clocks provides by RPMH in the Qualcomm SC8180x platform.
> 
> Signed-off-by: Bjorn Andersson 
> ---

Applied to clk-next


[PATCH 2/2] clk: qcom: rpmhcc: Add sc8180x rpmh clocks

2021-01-20 Thread Bjorn Andersson
Add clocks provides by RPMH in the Qualcomm SC8180x platform.

Signed-off-by: Bjorn Andersson 
---
 drivers/clk/qcom/clk-rpmh.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index 6a2a13c5058e..e356291f3ce7 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c
@@ -348,6 +348,10 @@ DEFINE_CLK_RPMH_VRM(sdm845, rf_clk1, rf_clk1_ao, 
"rfclka1", 1);
 DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, rf_clk2_ao, "rfclka2", 1);
 DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, rf_clk3_ao, "rfclka3", 1);
 DEFINE_CLK_RPMH_VRM(sm8150, rf_clk3, rf_clk3_ao, "rfclka3", 1);
+DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk1, rf_clk1_ao, "rfclkd1", 1);
+DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk2, rf_clk2_ao, "rfclkd2", 1);
+DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk3, rf_clk3_ao, "rfclkd3", 1);
+DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk4, rf_clk4_ao, "rfclkd4", 1);
 DEFINE_CLK_RPMH_BCM(sdm845, ipa, "IP0");
 DEFINE_CLK_RPMH_BCM(sdm845, ce, "CE0");
 
@@ -431,6 +435,26 @@ static const struct clk_rpmh_desc clk_rpmh_sc7180 = {
.num_clks = ARRAY_SIZE(sc7180_rpmh_clocks),
 };
 
+static struct clk_hw *sc8180x_rpmh_clocks[] = {
+   [RPMH_CXO_CLK]  = &sdm845_bi_tcxo.hw,
+   [RPMH_CXO_CLK_A]= &sdm845_bi_tcxo_ao.hw,
+   [RPMH_LN_BB_CLK2]   = &sdm845_ln_bb_clk2.hw,
+   [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw,
+   [RPMH_LN_BB_CLK3]   = &sdm845_ln_bb_clk3.hw,
+   [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw,
+   [RPMH_RF_CLK1]  = &sc8180x_rf_clk1.hw,
+   [RPMH_RF_CLK1_A]= &sc8180x_rf_clk1_ao.hw,
+   [RPMH_RF_CLK2]  = &sc8180x_rf_clk2.hw,
+   [RPMH_RF_CLK2_A]= &sc8180x_rf_clk2_ao.hw,
+   [RPMH_RF_CLK3]  = &sc8180x_rf_clk3.hw,
+   [RPMH_RF_CLK3_A]= &sc8180x_rf_clk3_ao.hw,
+};
+
+static const struct clk_rpmh_desc clk_rpmh_sc8180x = {
+   .clks = sc8180x_rpmh_clocks,
+   .num_clks = ARRAY_SIZE(sc8180x_rpmh_clocks),
+};
+
 DEFINE_CLK_RPMH_VRM(sm8250, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 2);
 
 static struct clk_hw *sm8250_rpmh_clocks[] = {
@@ -570,6 +594,7 @@ static int clk_rpmh_probe(struct platform_device *pdev)
 
 static const struct of_device_id clk_rpmh_match_table[] = {
{ .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180},
+   { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x},
{ .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845},
{ .compatible = "qcom,sdx55-rpmh-clk",  .data = &clk_rpmh_sdx55},
{ .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150},
-- 
2.29.2