[PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c

2016-09-15 Thread Moshe Green 
Fix the following warning types:
 - line length
 - block comment line * prefix
 - trailing */ on a separate line
found by the checkpatch.pl tool in multiple block comments.

Fix a single spelling error in a comment.

Signed-off-by: Moshe Green 
---
 drivers/staging/sm750fb/ddk750_chip.c | 49 +++
 1 file changed, 27 insertions(+), 22 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_chip.c 
b/drivers/staging/sm750fb/ddk750_chip.c
index 7cba1ab..f557b6d 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -145,8 +145,9 @@ static void setMasterClock(unsigned int frequency)
return;
 
if (frequency) {
-   /* Set the frequency to the maximum frequency that the SM750 
engine can
-   run, which is about 190 MHz. */
+   /* Set the frequency to the maximum frequency
+* that the SM750 engine can run, which is about 190 MHz.
+*/
if (frequency > MHz(190))
frequency = MHz(190);
 
@@ -243,9 +244,10 @@ int ddk750_initHw(initchip_param_t *pInitParam)
setMasterClock(MHz(pInitParam->masterClock));
 
 
-   /* Reset the memory controller. If the memory controller is not reset 
in SM750,
-  the system might hang when sw accesses the memory.
-  The memory should be resetted after changing the MXCLK.
+   /* Reset the memory controller.
+* If the memory controller is not reset in SM750,
+* the system might hang when sw accesses the memory.
+* The memory should be resetted after changing the MXCLK.
 */
if (pInitParam->resetMemory == 1) {
reg = PEEK32(MISC_CTRL);
@@ -289,21 +291,22 @@ int ddk750_initHw(initchip_param_t *pInitParam)
 }
 
 /*
-   monk liu @ 4/6/2011:
-  re-write the calculatePLL function of ddk750.
-  the original version function does not use some mathematics 
tricks and shortcut
-  when it doing the calculation of the best N,M,D combination
-  I think this version gives a little upgrade in speed
-
-   750 pll clock formular:
-   Request Clock = (Input Clock * M )/(N * X)
-
-   Input Clock = 14318181 hz
-   X = 2 power D
-   D ={0,1,2,3,4,5,6}
-   M = {1,...,255}
-   N = {2,...,15}
-*/
+ * monk liu @ 4/6/2011:
+ * re-write the calculatePLL function of ddk750.
+ * the original version function does not use
+ * some mathematics tricks and shortcut
+ * when it doing the calculation of the best N,M,D combination
+ * I think this version gives a little upgrade in speed
+ *
+ * 750 pll clock formular:
+ * Request Clock = (Input Clock * M )/(N * X)
+ *
+ * Input Clock = 14318181 hz
+ * X = 2 power D
+ * D ={0,1,2,3,4,5,6}
+ * M = {1,...,255}
+ * N = {2,...,15}
+ */
 unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
 {
/* as sm750 register definition,
@@ -318,8 +321,10 @@ unsigned int calcPllValue(unsigned int request_orig, 
pll_value_t *pll)
int max_d = 6;
 
if (getChipType() == SM750LE) {
-   /* SM750LE don't have prgrammable PLL and M/N values to work on.
-   Just return the requested clock. */
+   /* SM750LE don't have
+* programmable PLL and M/N values to work on.
+* Just return the requested clock.
+*/
return request_orig;
}
 
-- 
2.7.4

[PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c

2016-09-15 Thread Moshe Green 
Fix the following warning types:
 - line length
 - block comment line * prefix
 - trailing */ on a separate line
found by the checkpatch.pl tool in multiple block comments.

Fix a single spelling error in a comment.

Signed-off-by: Moshe Green 
---
 drivers/staging/sm750fb/ddk750_chip.c | 49 +++
 1 file changed, 27 insertions(+), 22 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_chip.c 
b/drivers/staging/sm750fb/ddk750_chip.c
index 7cba1ab..f557b6d 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -145,8 +145,9 @@ static void setMasterClock(unsigned int frequency)
return;
 
if (frequency) {
-   /* Set the frequency to the maximum frequency that the SM750 
engine can
-   run, which is about 190 MHz. */
+   /* Set the frequency to the maximum frequency
+* that the SM750 engine can run, which is about 190 MHz.
+*/
if (frequency > MHz(190))
frequency = MHz(190);
 
@@ -243,9 +244,10 @@ int ddk750_initHw(initchip_param_t *pInitParam)
setMasterClock(MHz(pInitParam->masterClock));
 
 
-   /* Reset the memory controller. If the memory controller is not reset 
in SM750,
-  the system might hang when sw accesses the memory.
-  The memory should be resetted after changing the MXCLK.
+   /* Reset the memory controller.
+* If the memory controller is not reset in SM750,
+* the system might hang when sw accesses the memory.
+* The memory should be resetted after changing the MXCLK.
 */
if (pInitParam->resetMemory == 1) {
reg = PEEK32(MISC_CTRL);
@@ -289,21 +291,22 @@ int ddk750_initHw(initchip_param_t *pInitParam)
 }
 
 /*
-   monk liu @ 4/6/2011:
-  re-write the calculatePLL function of ddk750.
-  the original version function does not use some mathematics 
tricks and shortcut
-  when it doing the calculation of the best N,M,D combination
-  I think this version gives a little upgrade in speed
-
-   750 pll clock formular:
-   Request Clock = (Input Clock * M )/(N * X)
-
-   Input Clock = 14318181 hz
-   X = 2 power D
-   D ={0,1,2,3,4,5,6}
-   M = {1,...,255}
-   N = {2,...,15}
-*/
+ * monk liu @ 4/6/2011:
+ * re-write the calculatePLL function of ddk750.
+ * the original version function does not use
+ * some mathematics tricks and shortcut
+ * when it doing the calculation of the best N,M,D combination
+ * I think this version gives a little upgrade in speed
+ *
+ * 750 pll clock formular:
+ * Request Clock = (Input Clock * M )/(N * X)
+ *
+ * Input Clock = 14318181 hz
+ * X = 2 power D
+ * D ={0,1,2,3,4,5,6}
+ * M = {1,...,255}
+ * N = {2,...,15}
+ */
 unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
 {
/* as sm750 register definition,
@@ -318,8 +321,10 @@ unsigned int calcPllValue(unsigned int request_orig, 
pll_value_t *pll)
int max_d = 6;
 
if (getChipType() == SM750LE) {
-   /* SM750LE don't have prgrammable PLL and M/N values to work on.
-   Just return the requested clock. */
+   /* SM750LE don't have
+* programmable PLL and M/N values to work on.
+* Just return the requested clock.
+*/
return request_orig;
}
 
-- 
2.7.4

Re: [PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c

2016-09-15 Thread Moshe Green 
On Mon, Sep 12, 2016 at 01:17:25PM +0200, Greg KH wrote:
> On Sun, Sep 04, 2016 at 09:04:10PM +0300, Moshe Green wrote:
> > Fix the following warning types:
> >  - line length
> >  - block comment line * prefix
> >  - trailing */ on a separate line
> > found by the checkpatch.pl tool in multiple block comments.
> > 
> > Fix a single spelling error in a comment.
> > 
> > Signed-off-by: Moshe Green 
> > ---
> >  drivers/staging/sm750fb/ddk750_chip.c | 49 
> > +++
> >  1 file changed, 27 insertions(+), 22 deletions(-)
> 
> As I didn't take the first patch, this one didn't apply :(
> 
> Please resend when you send the first one again.
> 
> thanks,
> 
> greg k-h

Will do.
Thanks

Moshe Green

Re: [PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c

2016-09-15 Thread Moshe Green 
On Mon, Sep 12, 2016 at 01:17:25PM +0200, Greg KH wrote:
> On Sun, Sep 04, 2016 at 09:04:10PM +0300, Moshe Green wrote:
> > Fix the following warning types:
> >  - line length
> >  - block comment line * prefix
> >  - trailing */ on a separate line
> > found by the checkpatch.pl tool in multiple block comments.
> > 
> > Fix a single spelling error in a comment.
> > 
> > Signed-off-by: Moshe Green 
> > ---
> >  drivers/staging/sm750fb/ddk750_chip.c | 49 
> > +++
> >  1 file changed, 27 insertions(+), 22 deletions(-)
> 
> As I didn't take the first patch, this one didn't apply :(
> 
> Please resend when you send the first one again.
> 
> thanks,
> 
> greg k-h

Will do.
Thanks

Moshe Green

Re: [PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c

2016-09-12 Thread Greg KH 
On Sun, Sep 04, 2016 at 09:04:10PM +0300, Moshe Green wrote:
> Fix the following warning types:
>  - line length
>  - block comment line * prefix
>  - trailing */ on a separate line
> found by the checkpatch.pl tool in multiple block comments.
> 
> Fix a single spelling error in a comment.
> 
> Signed-off-by: Moshe Green 
> ---
>  drivers/staging/sm750fb/ddk750_chip.c | 49 
> +++
>  1 file changed, 27 insertions(+), 22 deletions(-)

As I didn't take the first patch, this one didn't apply :(

Please resend when you send the first one again.

thanks,

greg k-h

Re: [PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c

2016-09-12 Thread Greg KH 
On Sun, Sep 04, 2016 at 09:04:10PM +0300, Moshe Green wrote:
> Fix the following warning types:
>  - line length
>  - block comment line * prefix
>  - trailing */ on a separate line
> found by the checkpatch.pl tool in multiple block comments.
> 
> Fix a single spelling error in a comment.
> 
> Signed-off-by: Moshe Green 
> ---
>  drivers/staging/sm750fb/ddk750_chip.c | 49 
> +++
>  1 file changed, 27 insertions(+), 22 deletions(-)

As I didn't take the first patch, this one didn't apply :(

Please resend when you send the first one again.

thanks,

greg k-h

[PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c

2016-09-04 Thread Moshe Green 
Fix the following warning types:
 - line length
 - block comment line * prefix
 - trailing */ on a separate line
found by the checkpatch.pl tool in multiple block comments.

Fix a single spelling error in a comment.

Signed-off-by: Moshe Green 
---
 drivers/staging/sm750fb/ddk750_chip.c | 49 +++
 1 file changed, 27 insertions(+), 22 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_chip.c 
b/drivers/staging/sm750fb/ddk750_chip.c
index 76aaeaa..09fda26 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -144,8 +144,9 @@ static void setMasterClock(unsigned int frequency)
return;
 
if (frequency) {
-   /* Set the frequency to the maximum frequency that the SM750 
engine can
-   run, which is about 190 MHz. */
+   /* Set the frequency to the maximum frequency
+* that the SM750 engine can run, which is about 190 MHz.
+*/
if (frequency > MHz(190))
frequency = MHz(190);
 
@@ -242,9 +243,10 @@ int ddk750_initHw(initchip_param_t *pInitParam)
setMasterClock(MHz(pInitParam->masterClock));
 
 
-   /* Reset the memory controller. If the memory controller is not reset 
in SM750,
-  the system might hang when sw accesses the memory.
-  The memory should be resetted after changing the MXCLK.
+   /* Reset the memory controller.
+* If the memory controller is not reset in SM750,
+* the system might hang when sw accesses the memory.
+* The memory should be resetted after changing the MXCLK.
 */
if (pInitParam->resetMemory == 1) {
reg = PEEK32(MISC_CTRL);
@@ -288,21 +290,22 @@ int ddk750_initHw(initchip_param_t *pInitParam)
 }
 
 /*
-   monk liu @ 4/6/2011:
-  re-write the calculatePLL function of ddk750.
-  the original version function does not use some mathematics 
tricks and shortcut
-  when it doing the calculation of the best N,M,D combination
-  I think this version gives a little upgrade in speed
-
-   750 pll clock formular:
-   Request Clock = (Input Clock * M )/(N * X)
-
-   Input Clock = 14318181 hz
-   X = 2 power D
-   D ={0,1,2,3,4,5,6}
-   M = {1,...,255}
-   N = {2,...,15}
-*/
+ * monk liu @ 4/6/2011:
+ * re-write the calculatePLL function of ddk750.
+ * the original version function does not use
+ * some mathematics tricks and shortcut
+ * when it doing the calculation of the best N,M,D combination
+ * I think this version gives a little upgrade in speed
+ *
+ * 750 pll clock formular:
+ * Request Clock = (Input Clock * M )/(N * X)
+ *
+ * Input Clock = 14318181 hz
+ * X = 2 power D
+ * D ={0,1,2,3,4,5,6}
+ * M = {1,...,255}
+ * N = {2,...,15}
+ */
 unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
 {
/* as sm750 register definition,
@@ -317,8 +320,10 @@ unsigned int calcPllValue(unsigned int request_orig, 
pll_value_t *pll)
int max_d = 6;
 
if (getChipType() == SM750LE) {
-   /* SM750LE don't have prgrammable PLL and M/N values to work on.
-   Just return the requested clock. */
+   /* SM750LE don't have
+* programmable PLL and M/N values to work on.
+* Just return the requested clock.
+*/
return request_orig;
}
 
-- 
2.7.4

[PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c

2016-09-04 Thread Moshe Green 
Fix the following warning types:
 - line length
 - block comment line * prefix
 - trailing */ on a separate line
found by the checkpatch.pl tool in multiple block comments.

Fix a single spelling error in a comment.

Signed-off-by: Moshe Green 
---
 drivers/staging/sm750fb/ddk750_chip.c | 49 +++
 1 file changed, 27 insertions(+), 22 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_chip.c 
b/drivers/staging/sm750fb/ddk750_chip.c
index 76aaeaa..09fda26 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -144,8 +144,9 @@ static void setMasterClock(unsigned int frequency)
return;
 
if (frequency) {
-   /* Set the frequency to the maximum frequency that the SM750 
engine can
-   run, which is about 190 MHz. */
+   /* Set the frequency to the maximum frequency
+* that the SM750 engine can run, which is about 190 MHz.
+*/
if (frequency > MHz(190))
frequency = MHz(190);
 
@@ -242,9 +243,10 @@ int ddk750_initHw(initchip_param_t *pInitParam)
setMasterClock(MHz(pInitParam->masterClock));
 
 
-   /* Reset the memory controller. If the memory controller is not reset 
in SM750,
-  the system might hang when sw accesses the memory.
-  The memory should be resetted after changing the MXCLK.
+   /* Reset the memory controller.
+* If the memory controller is not reset in SM750,
+* the system might hang when sw accesses the memory.
+* The memory should be resetted after changing the MXCLK.
 */
if (pInitParam->resetMemory == 1) {
reg = PEEK32(MISC_CTRL);
@@ -288,21 +290,22 @@ int ddk750_initHw(initchip_param_t *pInitParam)
 }
 
 /*
-   monk liu @ 4/6/2011:
-  re-write the calculatePLL function of ddk750.
-  the original version function does not use some mathematics 
tricks and shortcut
-  when it doing the calculation of the best N,M,D combination
-  I think this version gives a little upgrade in speed
-
-   750 pll clock formular:
-   Request Clock = (Input Clock * M )/(N * X)
-
-   Input Clock = 14318181 hz
-   X = 2 power D
-   D ={0,1,2,3,4,5,6}
-   M = {1,...,255}
-   N = {2,...,15}
-*/
+ * monk liu @ 4/6/2011:
+ * re-write the calculatePLL function of ddk750.
+ * the original version function does not use
+ * some mathematics tricks and shortcut
+ * when it doing the calculation of the best N,M,D combination
+ * I think this version gives a little upgrade in speed
+ *
+ * 750 pll clock formular:
+ * Request Clock = (Input Clock * M )/(N * X)
+ *
+ * Input Clock = 14318181 hz
+ * X = 2 power D
+ * D ={0,1,2,3,4,5,6}
+ * M = {1,...,255}
+ * N = {2,...,15}
+ */
 unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
 {
/* as sm750 register definition,
@@ -317,8 +320,10 @@ unsigned int calcPllValue(unsigned int request_orig, 
pll_value_t *pll)
int max_d = 6;
 
if (getChipType() == SM750LE) {
-   /* SM750LE don't have prgrammable PLL and M/N values to work on.
-   Just return the requested clock. */
+   /* SM750LE don't have
+* programmable PLL and M/N values to work on.
+* Just return the requested clock.
+*/
return request_orig;
}
 
-- 
2.7.4