Re: [PATCH 2/4] clk: arizona: Add clock driver for the Arizona devices

[Stephen Boyd]

On 01/05, Charles Keepax wrote:
> Add an initial clock driver for the Arizona series audio CODECs.
> Currently this driver only provides support for parsing the two input
> clocks (mclk1, mclk2) and providing the internally consumed 32k clock.
> 
> Signed-off-by: Charles Keepax 

Can this go through clk-tree without the other three patches and
nothing breaks?

> diff --git a/drivers/clk/clk-arizona.c b/drivers/clk/clk-arizona.c
> new file mode 100644
> index 000..1ab69ee
> --- /dev/null
> +++ b/drivers/clk/clk-arizona.c
> @@ -0,0 +1,192 @@
> +
> +static int arizona_32k_enable(struct clk_hw *hw)
> +{
> + struct arizona_clk *clkdata = clk32k_to_arizona_clk(hw);
> + struct arizona *arizona = clkdata->arizona;
> + int ret;
> +
> + switch (arizona->pdata.clk32k_src) {
> + case ARIZONA_32KZ_MCLK1:
> + ret = pm_runtime_get_sync(arizona->dev);
> + if (ret != 0)

typically we write this as

if (ret)


> + goto out;
> + break;
> + }
> +
> + ret = regmap_update_bits_async(arizona->regmap, ARIZONA_CLOCK_32K_1,
> +ARIZONA_CLK_32K_ENA,
> +ARIZONA_CLK_32K_ENA);
> +
> +out:
> + return ret;
> +}
> +
> +static int arizona_clk_of_get_pdata(struct arizona *arizona)
> +{
> + const char * const pins[] = { "mclk1", "mclk2" };
> + struct clk *mclk;
> + int i;
> +
> + if (!of_property_read_bool(arizona->dev->of_node, "clocks"))
> + return 0;
> +
> + for (i = 0; i < ARRAY_SIZE(pins); ++i) {
> + mclk = of_clk_get_by_name(arizona->dev->of_node, pins[i]);
> + if (IS_ERR(mclk))
> + return PTR_ERR(mclk);
> +
> + if (clk_get_rate(mclk) == CLK32K_RATE) {
> + arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK1 + i;
> + arizona->pdata.clk32k_parent = __clk_get_name(mclk);
> + }
> +
> + clk_put(mclk);

Is this configuring some mux for the 32kHz source? Perhaps this
can be done with assigned clock parents and a set_parent clk_op
instead of with of_clk_get_by_name() in a loop over the possible
parents?

> + }
> +
> + return 0;
> +}
> +
> +static int arizona_clk_probe(struct platform_device *pdev)
> +{
[..]
> +
> + if (arizona->pdata.clk32k_parent) {
> + clk32k_init.num_parents = 1;
> + clk32k_init.parent_names = >pdata.clk32k_parent;
> + } else {
> + clk32k_init.flags |= CLK_IS_ROOT;
> + }
> +
> + clkdata->clk32k_hw.init = _init;
> + clkdata->clk32k = devm_clk_register(>dev, >clk32k_hw);
> + if (IS_ERR(clkdata->clk32k)) {
> + ret = PTR_ERR(clkdata->clk32k);
> + dev_err(arizona->dev, "Failed to register 32k clock: %d\n",
> + ret);
> + return ret;
> + }
> +
> + ret = clk_register_clkdev(clkdata->clk32k, "arizona-32k",
> +   dev_name(arizona->dev));

Any reason we register with clkdev but don't register an of clk
provider?

> + if (ret) {
> + dev_err(arizona->dev, "Failed to register 32k clock dev: %d\n",
> + ret);
> + return ret;
> + }
> +
> + platform_set_drvdata(pdev, clkdata);
> +
> + return 0;
> +}

-- 
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[PATCH 2/4] clk: arizona: Add clock driver for the Arizona devices

[Charles Keepax]

Add an initial clock driver for the Arizona series audio CODECs.
Currently this driver only provides support for parsing the two input
clocks (mclk1, mclk2) and providing the internally consumed 32k clock.

Signed-off-by: Charles Keepax 
---
 MAINTAINERS   |   1 +
 drivers/clk/Kconfig   |   6 ++
 drivers/clk/Makefile  |   1 +
 drivers/clk/clk-arizona.c | 192 ++
 include/linux/mfd/arizona/pdata.h |   3 +
 5 files changed, 203 insertions(+)
 create mode 100644 drivers/clk/clk-arizona.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 233f834..29e161a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11681,6 +11681,7 @@ F:  
Documentation/devicetree/bindings/regulator/arizona-regulator.txt
 F: Documentation/devicetree/bindings/mfd/arizona.txt
 F: arch/arm/mach-s3c64xx/mach-crag6410*
 F: drivers/clk/clk-wm83*.c
+F: drivers/clk/clk-arizona.c
 F: drivers/extcon/extcon-arizona.c
 F: drivers/leds/leds-wm83*.c
 F: drivers/gpio/gpio-*wm*.c
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index c3e3a02..becd743 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -25,6 +25,12 @@ config COMMON_CLK
 menu "Common Clock Framework"
depends on COMMON_CLK
 
+config COMMON_CLK_ARIZONA
+   tristate "Clock driver for Arizona devices"
+   depends on MFD_ARIZONA
+   ---help---
+ This driver supports the clocking on the Arizona devices.
+
 config COMMON_CLK_WM831X
tristate "Clock driver for WM831x/2x PMICs"
depends on MFD_WM831X
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 820714c..11e3aaa 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -17,6 +17,7 @@ endif
 
 # hardware specific clock types
 # please keep this section sorted lexicographically by file/directory path name
+obj-$(CONFIG_COMMON_CLK_ARIZONA)   += clk-arizona.o
 obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o
 obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN)+= clk-axi-clkgen.o
 obj-$(CONFIG_ARCH_AXXIA)   += clk-axm5516.o
diff --git a/drivers/clk/clk-arizona.c b/drivers/clk/clk-arizona.c
new file mode 100644
index 000..1ab69ee
--- /dev/null
+++ b/drivers/clk/clk-arizona.c
@@ -0,0 +1,192 @@
+/*
+ * Arizona clock control
+ *
+ * Copyright 2016 Cirrus Logic, Inc.
+ *
+ * Author: Charles Keepax 
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#define CLK32K_RATE 32768
+
+struct arizona_clk {
+   struct arizona *arizona;
+
+   struct clk_hw clk32k_hw;
+   struct clk *clk32k;
+};
+
+static inline struct arizona_clk *clk32k_to_arizona_clk(struct clk_hw *hw)
+{
+   return container_of(hw, struct arizona_clk, clk32k_hw);
+}
+
+static int arizona_32k_enable(struct clk_hw *hw)
+{
+   struct arizona_clk *clkdata = clk32k_to_arizona_clk(hw);
+   struct arizona *arizona = clkdata->arizona;
+   int ret;
+
+   switch (arizona->pdata.clk32k_src) {
+   case ARIZONA_32KZ_MCLK1:
+   ret = pm_runtime_get_sync(arizona->dev);
+   if (ret != 0)
+   goto out;
+   break;
+   }
+
+   ret = regmap_update_bits_async(arizona->regmap, ARIZONA_CLOCK_32K_1,
+  ARIZONA_CLK_32K_ENA,
+  ARIZONA_CLK_32K_ENA);
+
+out:
+   return ret;
+}
+
+static void arizona_32k_disable(struct clk_hw *hw)
+{
+   struct arizona_clk *clkdata = clk32k_to_arizona_clk(hw);
+   struct arizona *arizona = clkdata->arizona;
+
+   regmap_update_bits_async(arizona->regmap, ARIZONA_CLOCK_32K_1,
+ARIZONA_CLK_32K_ENA, 0);
+
+   switch (arizona->pdata.clk32k_src) {
+   case ARIZONA_32KZ_MCLK1:
+   pm_runtime_put_sync(arizona->dev);
+   break;
+   }
+}
+
+static const struct clk_ops arizona_32k_ops = {
+   .prepare = arizona_32k_enable,
+   .unprepare = arizona_32k_disable,
+};
+
+static int arizona_clk_of_get_pdata(struct arizona *arizona)
+{
+   const char * const pins[] = { "mclk1", "mclk2" };
+   struct clk *mclk;
+   int i;
+
+   if (!of_property_read_bool(arizona->dev->of_node, "clocks"))
+   return 0;
+
+   for (i = 0; i < ARRAY_SIZE(pins); ++i) {
+   mclk = of_clk_get_by_name(arizona->dev->of_node, pins[i]);
+   if (IS_ERR(mclk))
+   return PTR_ERR(mclk);
+
+   if (clk_get_rate(mclk) == CLK32K_RATE) {
+   arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK1 + i;
+   

[PATCH 2/4] clk: arizona: Add clock driver for the Arizona devices

[Charles Keepax]

Add an initial clock driver for the Arizona series audio CODECs.
Currently this driver only provides support for parsing the two input
clocks (mclk1, mclk2) and providing the internally consumed 32k clock.

Signed-off-by: Charles Keepax 
---
 MAINTAINERS   |   1 +
 drivers/clk/Kconfig   |   6 ++
 drivers/clk/Makefile  |   1 +
 drivers/clk/clk-arizona.c | 192 ++
 include/linux/mfd/arizona/pdata.h |   3 +
 5 files changed, 203 insertions(+)
 create mode 100644 drivers/clk/clk-arizona.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 233f834..29e161a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11681,6 +11681,7 @@ F:  
Documentation/devicetree/bindings/regulator/arizona-regulator.txt
 F: Documentation/devicetree/bindings/mfd/arizona.txt
 F: arch/arm/mach-s3c64xx/mach-crag6410*
 F: drivers/clk/clk-wm83*.c
+F: drivers/clk/clk-arizona.c
 F: drivers/extcon/extcon-arizona.c
 F: drivers/leds/leds-wm83*.c
 F: drivers/gpio/gpio-*wm*.c
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index c3e3a02..becd743 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -25,6 +25,12 @@ config COMMON_CLK
 menu "Common Clock Framework"
depends on COMMON_CLK
 
+config COMMON_CLK_ARIZONA
+   tristate "Clock driver for Arizona devices"
+   depends on MFD_ARIZONA
+   ---help---
+ This driver supports the clocking on the Arizona devices.
+
 config COMMON_CLK_WM831X
tristate "Clock driver for WM831x/2x PMICs"
depends on MFD_WM831X
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 820714c..11e3aaa 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -17,6 +17,7 @@ endif
 
 # hardware specific clock types
 # please keep this section sorted lexicographically by file/directory path name
+obj-$(CONFIG_COMMON_CLK_ARIZONA)   += clk-arizona.o
 obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o
 obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN)+= clk-axi-clkgen.o
 obj-$(CONFIG_ARCH_AXXIA)   += clk-axm5516.o
diff --git a/drivers/clk/clk-arizona.c b/drivers/clk/clk-arizona.c
new file mode 100644
index 000..1ab69ee
--- /dev/null
+++ b/drivers/clk/clk-arizona.c
@@ -0,0 +1,192 @@
+/*
+ * Arizona clock control
+ *
+ * Copyright 2016 Cirrus Logic, Inc.
+ *
+ * Author: Charles Keepax 
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#define CLK32K_RATE 32768
+
+struct arizona_clk {
+   struct arizona *arizona;
+
+   struct clk_hw clk32k_hw;
+   struct clk *clk32k;
+};
+
+static inline struct arizona_clk *clk32k_to_arizona_clk(struct clk_hw *hw)
+{
+   return container_of(hw, struct arizona_clk, clk32k_hw);
+}
+
+static int arizona_32k_enable(struct clk_hw *hw)
+{
+   struct arizona_clk *clkdata = clk32k_to_arizona_clk(hw);
+   struct arizona *arizona = clkdata->arizona;
+   int ret;
+
+   switch (arizona->pdata.clk32k_src) {
+   case ARIZONA_32KZ_MCLK1:
+   ret = pm_runtime_get_sync(arizona->dev);
+   if (ret != 0)
+   goto out;
+   break;
+   }
+
+   ret = regmap_update_bits_async(arizona->regmap, ARIZONA_CLOCK_32K_1,
+  ARIZONA_CLK_32K_ENA,
+  ARIZONA_CLK_32K_ENA);
+
+out:
+   return ret;
+}
+
+static void arizona_32k_disable(struct clk_hw *hw)
+{
+   struct arizona_clk *clkdata = clk32k_to_arizona_clk(hw);
+   struct arizona *arizona = clkdata->arizona;
+
+   regmap_update_bits_async(arizona->regmap, ARIZONA_CLOCK_32K_1,
+ARIZONA_CLK_32K_ENA, 0);
+
+   switch (arizona->pdata.clk32k_src) {
+   case ARIZONA_32KZ_MCLK1:
+   pm_runtime_put_sync(arizona->dev);
+   break;
+   }
+}
+
+static const struct clk_ops arizona_32k_ops = {
+   .prepare = arizona_32k_enable,
+   .unprepare = arizona_32k_disable,
+};
+
+static int arizona_clk_of_get_pdata(struct arizona *arizona)
+{
+   const char * const pins[] = { "mclk1", "mclk2" };
+   struct clk *mclk;
+   int i;
+
+   if (!of_property_read_bool(arizona->dev->of_node, "clocks"))
+   return 0;
+
+   for (i = 0; i < ARRAY_SIZE(pins); ++i) {
+   mclk = of_clk_get_by_name(arizona->dev->of_node, pins[i]);
+   if (IS_ERR(mclk))
+   return PTR_ERR(mclk);
+
+   if (clk_get_rate(mclk) == CLK32K_RATE) {
+   arizona->pdata.clk32k_src = 

Re: [PATCH 2/4] clk: arizona: Add clock driver for the Arizona devices

[Stephen Boyd]

On 01/05, Charles Keepax wrote:
> Add an initial clock driver for the Arizona series audio CODECs.
> Currently this driver only provides support for parsing the two input
> clocks (mclk1, mclk2) and providing the internally consumed 32k clock.
> 
> Signed-off-by: Charles Keepax 

Can this go through clk-tree without the other three patches and
nothing breaks?

> diff --git a/drivers/clk/clk-arizona.c b/drivers/clk/clk-arizona.c
> new file mode 100644
> index 000..1ab69ee
> --- /dev/null
> +++ b/drivers/clk/clk-arizona.c
> @@ -0,0 +1,192 @@
> +
> +static int arizona_32k_enable(struct clk_hw *hw)
> +{
> + struct arizona_clk *clkdata = clk32k_to_arizona_clk(hw);
> + struct arizona *arizona = clkdata->arizona;
> + int ret;
> +
> + switch (arizona->pdata.clk32k_src) {
> + case ARIZONA_32KZ_MCLK1:
> + ret = pm_runtime_get_sync(arizona->dev);
> + if (ret != 0)

typically we write this as

if (ret)


> + goto out;
> + break;
> + }
> +
> + ret = regmap_update_bits_async(arizona->regmap, ARIZONA_CLOCK_32K_1,
> +ARIZONA_CLK_32K_ENA,
> +ARIZONA_CLK_32K_ENA);
> +
> +out:
> + return ret;
> +}
> +
> +static int arizona_clk_of_get_pdata(struct arizona *arizona)
> +{
> + const char * const pins[] = { "mclk1", "mclk2" };
> + struct clk *mclk;
> + int i;
> +
> + if (!of_property_read_bool(arizona->dev->of_node, "clocks"))
> + return 0;
> +
> + for (i = 0; i < ARRAY_SIZE(pins); ++i) {
> + mclk = of_clk_get_by_name(arizona->dev->of_node, pins[i]);
> + if (IS_ERR(mclk))
> + return PTR_ERR(mclk);
> +
> + if (clk_get_rate(mclk) == CLK32K_RATE) {
> + arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK1 + i;
> + arizona->pdata.clk32k_parent = __clk_get_name(mclk);
> + }
> +
> + clk_put(mclk);

Is this configuring some mux for the 32kHz source? Perhaps this
can be done with assigned clock parents and a set_parent clk_op
instead of with of_clk_get_by_name() in a loop over the possible
parents?

> + }
> +
> + return 0;
> +}
> +
> +static int arizona_clk_probe(struct platform_device *pdev)
> +{
[..]
> +
> + if (arizona->pdata.clk32k_parent) {
> + clk32k_init.num_parents = 1;
> + clk32k_init.parent_names = >pdata.clk32k_parent;
> + } else {
> + clk32k_init.flags |= CLK_IS_ROOT;
> + }
> +
> + clkdata->clk32k_hw.init = _init;
> + clkdata->clk32k = devm_clk_register(>dev, >clk32k_hw);
> + if (IS_ERR(clkdata->clk32k)) {
> + ret = PTR_ERR(clkdata->clk32k);
> + dev_err(arizona->dev, "Failed to register 32k clock: %d\n",
> + ret);
> + return ret;
> + }
> +
> + ret = clk_register_clkdev(clkdata->clk32k, "arizona-32k",
> +   dev_name(arizona->dev));

Any reason we register with clkdev but don't register an of clk
provider?

> + if (ret) {
> + dev_err(arizona->dev, "Failed to register 32k clock dev: %d\n",
> + ret);
> + return ret;
> + }
> +
> + platform_set_drvdata(pdev, clkdata);
> +
> + return 0;
> +}

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/