[PATCH 2/4] fb: vt8500: Convert to use vendor register names
Change all the #defines to match the vendor defined names, and change the references in wm8505fb.c and wmt_ge_rops.c. Add all the missing register offsets as well to prevent churn in the future. Signed-off-by: Tony Prisk --- drivers/video/wm8505fb.c| 159 drivers/video/wmt_ge_rops.c | 280 +-- 2 files changed, 332 insertions(+), 107 deletions(-) diff --git a/drivers/video/wm8505fb.c b/drivers/video/wm8505fb.c index f824af8..167a9e2 100644 --- a/drivers/video/wm8505fb.c +++ b/drivers/video/wm8505fb.c @@ -38,29 +38,94 @@ #define DRIVER_NAME "wm8505-fb" -#define WMT_GOVR_COLORSPACE1 0x030 -#define WMT_GOVR_MIF_ENABLE0x080 -#define WMT_GOVR_FBADDR0x090 -#define WMT_GOVR_FBADDR1 0x094 -#define WMT_GOVR_XRES 0x098 -#define WMT_GOVR_XRES_VIRTUAL 0x09c -#define WMT_GOVR_YPAN 0x0a0 -#define WMT_GOVR_XPAN 0x0a4 -#define WMT_GOVR_FHI 0x0a8 -#define WMT_GOVR_REG_UPDATE0x0e4 -#define WMT_GOVR_TG0x100 -#define WMT_GOVR_TIMING_H_ALL 0x108 -#define WMT_GOVR_TIMING_V_ALL 0x10c -#define WMT_GOVR_TIMING_V_START0x110 -#define WMT_GOVR_TIMING_V_END 0x114 -#define WMT_GOVR_TIMING_H_START0x118 -#define WMT_GOVR_TIMING_H_END 0x11c -#define WMT_GOVR_TIMING_V_SYNC 0x128 -#define WMT_GOVR_TIMING_H_SYNC 0x12c -#define WMT_GOVR_DVO_SET 0x148 -#define WMT_GOVR_CONTRAST 0x1b8 -#define WMT_GOVR_BRGHTNESS 0x1bc -#define WMT_GOVR_COLORSPACE0x1e4 +#define REG_GOVRH_CUR_ADDR 0x +#define REG_GOVRH_CUR_WIDTH0x0004 +#define REG_GOVRH_CUR_FB_WIDTH 0x0008 +#define REG_GOVRH_CUR_VCROP0x000C +#define REG_GOVRH_CUR_HCROP0x0010 +#define REG_GOVRH_CUR_HCOORD 0x0014 +#define REG_GOVRH_CUR_VCOORD 0x0018 +#define REG_GOVRH_CUR_STATUS 0x001C +#define REG_GOVRH_CUR_COLOR_KEY0x0020 +#define REG_GOVRH_DVO_PIX 0x0030 +#define REG_GOVRH_DVO_DLY_SEL 0x0034 +#define REG_GOVRH_INT 0x0038 +#define REG_GOVRH_DVO_BLANK_DATA 0x003C +#define REG_GOVRH_DIRPATH 0x0040 /* WM8750+ */ +#define REG_GOVRH_MIF 0x0080 +#define REG_GOVRH_COLFMT 0x0084 +#define REG_GOVRH_SRCFMT 0x0088 +#define REG_GOVRH_DSTFMT 0x008C +#define REG_GOVRH_YSA 0x0090 +#define REG_GOVRH_CSA 0x0094 +#define REG_GOVRH_PIXWID 0x0098 +#define REG_GOVRH_BUFWID 0x009C +#define REG_GOVRH_VCROP0x00A0 +#define REG_GOVRH_HCROP0x00A4 +#define REG_GOVRH_FHI 0x00A8 +#define REG_GOVRH_COLFMT2 0x00AC +#define REG_GOVRH_YSA2 0x00B0 /* WM8950 */ +#define REG_GOVRH_CSA2 0x00B4 /* WM8950 */ +#define REG_GOVRH_MIF_FRAME_MODE 0x00B8 /* WM8950 */ +#define REG_GOVRH_REG_STS 0x00E4 +#define REG_GOVRH_SWFLD0x00E8 +#define REG_GOVRH_TG_ENABLE0x0100 +#define REG_GOVRH_READ_CYC 0x0104 +#define REG_GOVRH_H_ALLPXL 0x0108 +#define REG_GOVRH_V_ALLLN 0x010C +#define REG_GOVRH_ACTLN_BG 0x0110 +#define REG_GOVRH_ACTLN_END0x0114 +#define REG_GOVRH_ACTPX_BG 0x0118 +#define REG_GOVRH_ACTPX_END0x011C +#define REG_GOVRH_VBIE_LINE0x0120 +#define REG_GOVRH_PVBI_LINE0x0124 +#define REG_GOVRH_HDMI_VBISW 0x0128 +#define REG_GOVRH_HDMI_HSYNW 0x012C +#define REG_GOVRH_VSYNC_OFFSET 0x0130 +#define REG_GOVRH_FIELD_STATUS 0x0134 +#define REG_GOVRH_HDMI_3D 0x013C /* WM8950 */ +#define REG_GOVRH_DVO_SET 0x0148 +#define REG_GOVRH_CB_ENABLE0x0150 +#define REG_GOVRH_H_ALLPXL20x0158 +#define REG_GOVRH_V_ALLLN2 0x015C +#define REG_GOVRH_ACTLN_BG20x0160 +#define REG_GOVRH_ACTLN_END2 0x0164 +#define REG_GOVRH_ACTPX_BG20x0168 +#define REG_GOVRH_ACTPX_END2 0x016C +#define REG_GOVRH_VBIE_LINE2 0x0170 +#define REG_GOVRH_PVBI_LINE2 0x0174 +#define REG_GOVRH_HDMI_VBISW2 0x0178 +#define REG_GOVRH_HDMI_HSYNW2 0x017C +#define REG_GOVRH_LVDS_CTRL0x0180 /* WM8750+ */ +#define REG_GOVRH_LVDS_CTRL2 0x0184 /* WM8750+ */ +#define REG_GOVRH_DAC_LP_SENSE_VAL 0x0188 /* WM8750 */ +#define REG_GOVRH_DAC_TEST_MODE0x018C /* WM8750 */ +#define REG_GOVRH_VGA_HSYNW0x0190 /* WM8750 */ +#define REG_GOVRH_VGA_VSYNW0x0194 /* WM8750 */ +#define REG_GOVRH_VGA_SYNPOLAR 0x0198 /* WM8750 */ +#define REG_GOVRH_DAC_MOD 0x019C /* WM8750 */ +#define REG_GOVRH_DAC_VAL 0x01A0 /* WM8750 */ +#define REG_GOVRH_DAC_CON 0x01A4 /* WM8750 */ +#define
[PATCH 2/4] fb: vt8500: Convert to use vendor register names
Change all the #defines to match the vendor defined names, and change the references in wm8505fb.c and wmt_ge_rops.c. Add all the missing register offsets as well to prevent churn in the future. Signed-off-by: Tony Prisk li...@prisktech.co.nz --- drivers/video/wm8505fb.c| 159 drivers/video/wmt_ge_rops.c | 280 +-- 2 files changed, 332 insertions(+), 107 deletions(-) diff --git a/drivers/video/wm8505fb.c b/drivers/video/wm8505fb.c index f824af8..167a9e2 100644 --- a/drivers/video/wm8505fb.c +++ b/drivers/video/wm8505fb.c @@ -38,29 +38,94 @@ #define DRIVER_NAME wm8505-fb -#define WMT_GOVR_COLORSPACE1 0x030 -#define WMT_GOVR_MIF_ENABLE0x080 -#define WMT_GOVR_FBADDR0x090 -#define WMT_GOVR_FBADDR1 0x094 -#define WMT_GOVR_XRES 0x098 -#define WMT_GOVR_XRES_VIRTUAL 0x09c -#define WMT_GOVR_YPAN 0x0a0 -#define WMT_GOVR_XPAN 0x0a4 -#define WMT_GOVR_FHI 0x0a8 -#define WMT_GOVR_REG_UPDATE0x0e4 -#define WMT_GOVR_TG0x100 -#define WMT_GOVR_TIMING_H_ALL 0x108 -#define WMT_GOVR_TIMING_V_ALL 0x10c -#define WMT_GOVR_TIMING_V_START0x110 -#define WMT_GOVR_TIMING_V_END 0x114 -#define WMT_GOVR_TIMING_H_START0x118 -#define WMT_GOVR_TIMING_H_END 0x11c -#define WMT_GOVR_TIMING_V_SYNC 0x128 -#define WMT_GOVR_TIMING_H_SYNC 0x12c -#define WMT_GOVR_DVO_SET 0x148 -#define WMT_GOVR_CONTRAST 0x1b8 -#define WMT_GOVR_BRGHTNESS 0x1bc -#define WMT_GOVR_COLORSPACE0x1e4 +#define REG_GOVRH_CUR_ADDR 0x +#define REG_GOVRH_CUR_WIDTH0x0004 +#define REG_GOVRH_CUR_FB_WIDTH 0x0008 +#define REG_GOVRH_CUR_VCROP0x000C +#define REG_GOVRH_CUR_HCROP0x0010 +#define REG_GOVRH_CUR_HCOORD 0x0014 +#define REG_GOVRH_CUR_VCOORD 0x0018 +#define REG_GOVRH_CUR_STATUS 0x001C +#define REG_GOVRH_CUR_COLOR_KEY0x0020 +#define REG_GOVRH_DVO_PIX 0x0030 +#define REG_GOVRH_DVO_DLY_SEL 0x0034 +#define REG_GOVRH_INT 0x0038 +#define REG_GOVRH_DVO_BLANK_DATA 0x003C +#define REG_GOVRH_DIRPATH 0x0040 /* WM8750+ */ +#define REG_GOVRH_MIF 0x0080 +#define REG_GOVRH_COLFMT 0x0084 +#define REG_GOVRH_SRCFMT 0x0088 +#define REG_GOVRH_DSTFMT 0x008C +#define REG_GOVRH_YSA 0x0090 +#define REG_GOVRH_CSA 0x0094 +#define REG_GOVRH_PIXWID 0x0098 +#define REG_GOVRH_BUFWID 0x009C +#define REG_GOVRH_VCROP0x00A0 +#define REG_GOVRH_HCROP0x00A4 +#define REG_GOVRH_FHI 0x00A8 +#define REG_GOVRH_COLFMT2 0x00AC +#define REG_GOVRH_YSA2 0x00B0 /* WM8950 */ +#define REG_GOVRH_CSA2 0x00B4 /* WM8950 */ +#define REG_GOVRH_MIF_FRAME_MODE 0x00B8 /* WM8950 */ +#define REG_GOVRH_REG_STS 0x00E4 +#define REG_GOVRH_SWFLD0x00E8 +#define REG_GOVRH_TG_ENABLE0x0100 +#define REG_GOVRH_READ_CYC 0x0104 +#define REG_GOVRH_H_ALLPXL 0x0108 +#define REG_GOVRH_V_ALLLN 0x010C +#define REG_GOVRH_ACTLN_BG 0x0110 +#define REG_GOVRH_ACTLN_END0x0114 +#define REG_GOVRH_ACTPX_BG 0x0118 +#define REG_GOVRH_ACTPX_END0x011C +#define REG_GOVRH_VBIE_LINE0x0120 +#define REG_GOVRH_PVBI_LINE0x0124 +#define REG_GOVRH_HDMI_VBISW 0x0128 +#define REG_GOVRH_HDMI_HSYNW 0x012C +#define REG_GOVRH_VSYNC_OFFSET 0x0130 +#define REG_GOVRH_FIELD_STATUS 0x0134 +#define REG_GOVRH_HDMI_3D 0x013C /* WM8950 */ +#define REG_GOVRH_DVO_SET 0x0148 +#define REG_GOVRH_CB_ENABLE0x0150 +#define REG_GOVRH_H_ALLPXL20x0158 +#define REG_GOVRH_V_ALLLN2 0x015C +#define REG_GOVRH_ACTLN_BG20x0160 +#define REG_GOVRH_ACTLN_END2 0x0164 +#define REG_GOVRH_ACTPX_BG20x0168 +#define REG_GOVRH_ACTPX_END2 0x016C +#define REG_GOVRH_VBIE_LINE2 0x0170 +#define REG_GOVRH_PVBI_LINE2 0x0174 +#define REG_GOVRH_HDMI_VBISW2 0x0178 +#define REG_GOVRH_HDMI_HSYNW2 0x017C +#define REG_GOVRH_LVDS_CTRL0x0180 /* WM8750+ */ +#define REG_GOVRH_LVDS_CTRL2 0x0184 /* WM8750+ */ +#define REG_GOVRH_DAC_LP_SENSE_VAL 0x0188 /* WM8750 */ +#define REG_GOVRH_DAC_TEST_MODE0x018C /* WM8750 */ +#define REG_GOVRH_VGA_HSYNW0x0190 /* WM8750 */ +#define REG_GOVRH_VGA_VSYNW0x0194 /* WM8750 */ +#define REG_GOVRH_VGA_SYNPOLAR 0x0198 /* WM8750 */ +#define REG_GOVRH_DAC_MOD 0x019C /* WM8750 */ +#define REG_GOVRH_DAC_VAL 0x01A0 /* WM8750 */ +#define REG_GOVRH_DAC_CON 0x01A4 /*
