Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
On 01/22/2018 09:25 AM, Linus Walleij wrote: On Mon, Dec 11, 2017 at 9:54 AM, Alexandre Torguewrote: This patch which adds STM32F769 pinctrl and GPIO support, relies on the generic STM32 pinctrl driver. Signed-off-by: Alexandre Torgue Patch applied as Patrice poked me. I hope it works fine being applied in isolation from the other patches? Yes it does. I will add other patches in my next pull request (for v4.17). Thanks Alex Yours, Linus Walleij
Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
On 01/22/2018 09:25 AM, Linus Walleij wrote: On Mon, Dec 11, 2017 at 9:54 AM, Alexandre Torgue wrote: This patch which adds STM32F769 pinctrl and GPIO support, relies on the generic STM32 pinctrl driver. Signed-off-by: Alexandre Torgue Patch applied as Patrice poked me. I hope it works fine being applied in isolation from the other patches? Yes it does. I will add other patches in my next pull request (for v4.17). Thanks Alex Yours, Linus Walleij
Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
On Thu, Jan 18, 2018 at 3:05 PM, Patrice CHOTARDwrote: > It's a gentle reminder because this patch seems not yet merged in any of > your pinctrl branch. > > Thanks > > Patrice Poking is fine. > On 12/11/2017 09:54 AM, Alexandre Torgue wrote: >> This patch which adds STM32F769 pinctrl and GPIO support, relies on the >> generic STM32 pinctrl driver. >> >> Signed-off-by: Alexandre Torgue Since you are so eager to get it in I will record it with your Acked-by :) (Maybe you acked 0/5 or something, sorry for the mess.) Yours, Linus Walleij
Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
On Thu, Jan 18, 2018 at 3:05 PM, Patrice CHOTARD wrote: > It's a gentle reminder because this patch seems not yet merged in any of > your pinctrl branch. > > Thanks > > Patrice Poking is fine. > On 12/11/2017 09:54 AM, Alexandre Torgue wrote: >> This patch which adds STM32F769 pinctrl and GPIO support, relies on the >> generic STM32 pinctrl driver. >> >> Signed-off-by: Alexandre Torgue Since you are so eager to get it in I will record it with your Acked-by :) (Maybe you acked 0/5 or something, sorry for the mess.) Yours, Linus Walleij
Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
On Mon, Dec 11, 2017 at 9:54 AM, Alexandre Torguewrote: > This patch which adds STM32F769 pinctrl and GPIO support, relies on the > generic STM32 pinctrl driver. > > Signed-off-by: Alexandre Torgue Patch applied as Patrice poked me. I hope it works fine being applied in isolation from the other patches? Yours, Linus Walleij
Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
On Mon, Dec 11, 2017 at 9:54 AM, Alexandre Torgue wrote: > This patch which adds STM32F769 pinctrl and GPIO support, relies on the > generic STM32 pinctrl driver. > > Signed-off-by: Alexandre Torgue Patch applied as Patrice poked me. I hope it works fine being applied in isolation from the other patches? Yours, Linus Walleij
Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
Hi Linus It's a gentle reminder because this patch seems not yet merged in any of your pinctrl branch. Thanks Patrice On 12/11/2017 09:54 AM, Alexandre Torgue wrote: > This patch which adds STM32F769 pinctrl and GPIO support, relies on the > generic STM32 pinctrl driver. > > Signed-off-by: Alexandre Torgue> > diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig > index 7e1fe39..397f8c1 100644 > --- a/drivers/pinctrl/stm32/Kconfig > +++ b/drivers/pinctrl/stm32/Kconfig > @@ -27,6 +27,12 @@ config PINCTRL_STM32F746 > default MACH_STM32F746 > select PINCTRL_STM32 > > +config PINCTRL_STM32F769 > + bool "STMicroelectronics STM32F769 pin control" if COMPILE_TEST && > !MACH_STM32F769 > + depends on OF > + default MACH_STM32F769 > + select PINCTRL_STM32 > + > config PINCTRL_STM32H743 > bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && > !MACH_STM32H743 > depends on OF > diff --git a/drivers/pinctrl/stm32/Makefile b/drivers/pinctrl/stm32/Makefile > index d13ca35..7d63e4a 100644 > --- a/drivers/pinctrl/stm32/Makefile > +++ b/drivers/pinctrl/stm32/Makefile > @@ -6,4 +6,5 @@ obj-$(CONFIG_PINCTRL_STM32) += pinctrl-stm32.o > obj-$(CONFIG_PINCTRL_STM32F429) += pinctrl-stm32f429.o > obj-$(CONFIG_PINCTRL_STM32F469) += pinctrl-stm32f469.o > obj-$(CONFIG_PINCTRL_STM32F746) += pinctrl-stm32f746.o > +obj-$(CONFIG_PINCTRL_STM32F769) += pinctrl-stm32f769.o > obj-$(CONFIG_PINCTRL_STM32H743) += pinctrl-stm32h743.o > diff --git a/drivers/pinctrl/stm32/pinctrl-stm32f769.c > b/drivers/pinctrl/stm32/pinctrl-stm32f769.c > new file mode 100644 > index 000..f81c51c > --- /dev/null > +++ b/drivers/pinctrl/stm32/pinctrl-stm32f769.c > @@ -0,0 +1,1827 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) STMicroelectronics 2017 > + * Author: Alexandre Torgue for > STMicroelectronics. > + */ > +#include > +#include > +#include > + > +#include "pinctrl-stm32.h" > + > +static const struct stm32_desc_pin stm32f769_pins[] = { > + STM32_PIN( > + PINCTRL_PIN(0, "PA0"), > + STM32_FUNCTION(0, "GPIOA0"), > + STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"), > + STM32_FUNCTION(3, "TIM5_CH1"), > + STM32_FUNCTION(4, "TIM8_ETR"), > + STM32_FUNCTION(8, "USART2_CTS"), > + STM32_FUNCTION(9, "UART4_TX"), > + STM32_FUNCTION(11, "SAI2_SD_B"), > + STM32_FUNCTION(12, "ETH_MII_CRS"), > + STM32_FUNCTION(16, "EVENTOUT"), > + STM32_FUNCTION(17, "ANALOG") > + ), > + STM32_PIN( > + PINCTRL_PIN(1, "PA1"), > + STM32_FUNCTION(0, "GPIOA1"), > + STM32_FUNCTION(2, "TIM2_CH2"), > + STM32_FUNCTION(3, "TIM5_CH2"), > + STM32_FUNCTION(8, "USART2_RTS"), > + STM32_FUNCTION(9, "UART4_RX"), > + STM32_FUNCTION(10, "QUADSPI_BK1_IO3"), > + STM32_FUNCTION(11, "SAI2_MCLK_B"), > + STM32_FUNCTION(12, "ETH_MII_RX_CLK ETH_RMII_REF_CLK"), > + STM32_FUNCTION(15, "LCD_R2"), > + STM32_FUNCTION(16, "EVENTOUT"), > + STM32_FUNCTION(17, "ANALOG") > + ), > + STM32_PIN( > + PINCTRL_PIN(2, "PA2"), > + STM32_FUNCTION(0, "GPIOA2"), > + STM32_FUNCTION(2, "TIM2_CH3"), > + STM32_FUNCTION(3, "TIM5_CH3"), > + STM32_FUNCTION(4, "TIM9_CH1"), > + STM32_FUNCTION(8, "USART2_TX"), > + STM32_FUNCTION(9, "SAI2_SCK_B"), > + STM32_FUNCTION(12, "ETH_MDIO"), > + STM32_FUNCTION(13, "MDIOS_MDIO"), > + STM32_FUNCTION(15, "LCD_R1"), > + STM32_FUNCTION(16, "EVENTOUT"), > + STM32_FUNCTION(17, "ANALOG") > + ), > + STM32_PIN( > + PINCTRL_PIN(3, "PA3"), > + STM32_FUNCTION(0, "GPIOA3"), > + STM32_FUNCTION(2, "TIM2_CH4"), > + STM32_FUNCTION(3, "TIM5_CH4"), > + STM32_FUNCTION(4, "TIM9_CH2"), > + STM32_FUNCTION(8, "USART2_RX"), > + STM32_FUNCTION(10, "LCD_B2"), > + STM32_FUNCTION(11, "OTG_HS_ULPI_D0"), > + STM32_FUNCTION(12, "ETH_MII_COL"), > + STM32_FUNCTION(15, "LCD_B5"), > + STM32_FUNCTION(16, "EVENTOUT"), > + STM32_FUNCTION(17, "ANALOG") > + ), > + STM32_PIN( > + PINCTRL_PIN(4, "PA4"), > + STM32_FUNCTION(0, "GPIOA4"), > + STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"), > + STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"), > + STM32_FUNCTION(8, "USART2_CK"), > + STM32_FUNCTION(9, "SPI6_NSS"), > + STM32_FUNCTION(13, "OTG_HS_SOF"), > + STM32_FUNCTION(14, "DCMI_HSYNC"), > + STM32_FUNCTION(15, "LCD_VSYNC"), > + STM32_FUNCTION(16, "EVENTOUT"), > +
Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
Hi Linus It's a gentle reminder because this patch seems not yet merged in any of your pinctrl branch. Thanks Patrice On 12/11/2017 09:54 AM, Alexandre Torgue wrote: > This patch which adds STM32F769 pinctrl and GPIO support, relies on the > generic STM32 pinctrl driver. > > Signed-off-by: Alexandre Torgue > > diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig > index 7e1fe39..397f8c1 100644 > --- a/drivers/pinctrl/stm32/Kconfig > +++ b/drivers/pinctrl/stm32/Kconfig > @@ -27,6 +27,12 @@ config PINCTRL_STM32F746 > default MACH_STM32F746 > select PINCTRL_STM32 > > +config PINCTRL_STM32F769 > + bool "STMicroelectronics STM32F769 pin control" if COMPILE_TEST && > !MACH_STM32F769 > + depends on OF > + default MACH_STM32F769 > + select PINCTRL_STM32 > + > config PINCTRL_STM32H743 > bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && > !MACH_STM32H743 > depends on OF > diff --git a/drivers/pinctrl/stm32/Makefile b/drivers/pinctrl/stm32/Makefile > index d13ca35..7d63e4a 100644 > --- a/drivers/pinctrl/stm32/Makefile > +++ b/drivers/pinctrl/stm32/Makefile > @@ -6,4 +6,5 @@ obj-$(CONFIG_PINCTRL_STM32) += pinctrl-stm32.o > obj-$(CONFIG_PINCTRL_STM32F429) += pinctrl-stm32f429.o > obj-$(CONFIG_PINCTRL_STM32F469) += pinctrl-stm32f469.o > obj-$(CONFIG_PINCTRL_STM32F746) += pinctrl-stm32f746.o > +obj-$(CONFIG_PINCTRL_STM32F769) += pinctrl-stm32f769.o > obj-$(CONFIG_PINCTRL_STM32H743) += pinctrl-stm32h743.o > diff --git a/drivers/pinctrl/stm32/pinctrl-stm32f769.c > b/drivers/pinctrl/stm32/pinctrl-stm32f769.c > new file mode 100644 > index 000..f81c51c > --- /dev/null > +++ b/drivers/pinctrl/stm32/pinctrl-stm32f769.c > @@ -0,0 +1,1827 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) STMicroelectronics 2017 > + * Author: Alexandre Torgue for > STMicroelectronics. > + */ > +#include > +#include > +#include > + > +#include "pinctrl-stm32.h" > + > +static const struct stm32_desc_pin stm32f769_pins[] = { > + STM32_PIN( > + PINCTRL_PIN(0, "PA0"), > + STM32_FUNCTION(0, "GPIOA0"), > + STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"), > + STM32_FUNCTION(3, "TIM5_CH1"), > + STM32_FUNCTION(4, "TIM8_ETR"), > + STM32_FUNCTION(8, "USART2_CTS"), > + STM32_FUNCTION(9, "UART4_TX"), > + STM32_FUNCTION(11, "SAI2_SD_B"), > + STM32_FUNCTION(12, "ETH_MII_CRS"), > + STM32_FUNCTION(16, "EVENTOUT"), > + STM32_FUNCTION(17, "ANALOG") > + ), > + STM32_PIN( > + PINCTRL_PIN(1, "PA1"), > + STM32_FUNCTION(0, "GPIOA1"), > + STM32_FUNCTION(2, "TIM2_CH2"), > + STM32_FUNCTION(3, "TIM5_CH2"), > + STM32_FUNCTION(8, "USART2_RTS"), > + STM32_FUNCTION(9, "UART4_RX"), > + STM32_FUNCTION(10, "QUADSPI_BK1_IO3"), > + STM32_FUNCTION(11, "SAI2_MCLK_B"), > + STM32_FUNCTION(12, "ETH_MII_RX_CLK ETH_RMII_REF_CLK"), > + STM32_FUNCTION(15, "LCD_R2"), > + STM32_FUNCTION(16, "EVENTOUT"), > + STM32_FUNCTION(17, "ANALOG") > + ), > + STM32_PIN( > + PINCTRL_PIN(2, "PA2"), > + STM32_FUNCTION(0, "GPIOA2"), > + STM32_FUNCTION(2, "TIM2_CH3"), > + STM32_FUNCTION(3, "TIM5_CH3"), > + STM32_FUNCTION(4, "TIM9_CH1"), > + STM32_FUNCTION(8, "USART2_TX"), > + STM32_FUNCTION(9, "SAI2_SCK_B"), > + STM32_FUNCTION(12, "ETH_MDIO"), > + STM32_FUNCTION(13, "MDIOS_MDIO"), > + STM32_FUNCTION(15, "LCD_R1"), > + STM32_FUNCTION(16, "EVENTOUT"), > + STM32_FUNCTION(17, "ANALOG") > + ), > + STM32_PIN( > + PINCTRL_PIN(3, "PA3"), > + STM32_FUNCTION(0, "GPIOA3"), > + STM32_FUNCTION(2, "TIM2_CH4"), > + STM32_FUNCTION(3, "TIM5_CH4"), > + STM32_FUNCTION(4, "TIM9_CH2"), > + STM32_FUNCTION(8, "USART2_RX"), > + STM32_FUNCTION(10, "LCD_B2"), > + STM32_FUNCTION(11, "OTG_HS_ULPI_D0"), > + STM32_FUNCTION(12, "ETH_MII_COL"), > + STM32_FUNCTION(15, "LCD_B5"), > + STM32_FUNCTION(16, "EVENTOUT"), > + STM32_FUNCTION(17, "ANALOG") > + ), > + STM32_PIN( > + PINCTRL_PIN(4, "PA4"), > + STM32_FUNCTION(0, "GPIOA4"), > + STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"), > + STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"), > + STM32_FUNCTION(8, "USART2_CK"), > + STM32_FUNCTION(9, "SPI6_NSS"), > + STM32_FUNCTION(13, "OTG_HS_SOF"), > + STM32_FUNCTION(14, "DCMI_HSYNC"), > + STM32_FUNCTION(15, "LCD_VSYNC"), > + STM32_FUNCTION(16, "EVENTOUT"), > + STM32_FUNCTION(17, "ANALOG") > + ), > +
[PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
This patch which adds STM32F769 pinctrl and GPIO support, relies on the generic STM32 pinctrl driver. Signed-off-by: Alexandre Torguediff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig index 7e1fe39..397f8c1 100644 --- a/drivers/pinctrl/stm32/Kconfig +++ b/drivers/pinctrl/stm32/Kconfig @@ -27,6 +27,12 @@ config PINCTRL_STM32F746 default MACH_STM32F746 select PINCTRL_STM32 +config PINCTRL_STM32F769 + bool "STMicroelectronics STM32F769 pin control" if COMPILE_TEST && !MACH_STM32F769 + depends on OF + default MACH_STM32F769 + select PINCTRL_STM32 + config PINCTRL_STM32H743 bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743 depends on OF diff --git a/drivers/pinctrl/stm32/Makefile b/drivers/pinctrl/stm32/Makefile index d13ca35..7d63e4a 100644 --- a/drivers/pinctrl/stm32/Makefile +++ b/drivers/pinctrl/stm32/Makefile @@ -6,4 +6,5 @@ obj-$(CONFIG_PINCTRL_STM32) += pinctrl-stm32.o obj-$(CONFIG_PINCTRL_STM32F429)+= pinctrl-stm32f429.o obj-$(CONFIG_PINCTRL_STM32F469)+= pinctrl-stm32f469.o obj-$(CONFIG_PINCTRL_STM32F746)+= pinctrl-stm32f746.o +obj-$(CONFIG_PINCTRL_STM32F769)+= pinctrl-stm32f769.o obj-$(CONFIG_PINCTRL_STM32H743)+= pinctrl-stm32h743.o diff --git a/drivers/pinctrl/stm32/pinctrl-stm32f769.c b/drivers/pinctrl/stm32/pinctrl-stm32f769.c new file mode 100644 index 000..f81c51c --- /dev/null +++ b/drivers/pinctrl/stm32/pinctrl-stm32f769.c @@ -0,0 +1,1827 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) STMicroelectronics 2017 + * Author: Alexandre Torgue for STMicroelectronics. + */ +#include +#include +#include + +#include "pinctrl-stm32.h" + +static const struct stm32_desc_pin stm32f769_pins[] = { + STM32_PIN( + PINCTRL_PIN(0, "PA0"), + STM32_FUNCTION(0, "GPIOA0"), + STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"), + STM32_FUNCTION(3, "TIM5_CH1"), + STM32_FUNCTION(4, "TIM8_ETR"), + STM32_FUNCTION(8, "USART2_CTS"), + STM32_FUNCTION(9, "UART4_TX"), + STM32_FUNCTION(11, "SAI2_SD_B"), + STM32_FUNCTION(12, "ETH_MII_CRS"), + STM32_FUNCTION(16, "EVENTOUT"), + STM32_FUNCTION(17, "ANALOG") + ), + STM32_PIN( + PINCTRL_PIN(1, "PA1"), + STM32_FUNCTION(0, "GPIOA1"), + STM32_FUNCTION(2, "TIM2_CH2"), + STM32_FUNCTION(3, "TIM5_CH2"), + STM32_FUNCTION(8, "USART2_RTS"), + STM32_FUNCTION(9, "UART4_RX"), + STM32_FUNCTION(10, "QUADSPI_BK1_IO3"), + STM32_FUNCTION(11, "SAI2_MCLK_B"), + STM32_FUNCTION(12, "ETH_MII_RX_CLK ETH_RMII_REF_CLK"), + STM32_FUNCTION(15, "LCD_R2"), + STM32_FUNCTION(16, "EVENTOUT"), + STM32_FUNCTION(17, "ANALOG") + ), + STM32_PIN( + PINCTRL_PIN(2, "PA2"), + STM32_FUNCTION(0, "GPIOA2"), + STM32_FUNCTION(2, "TIM2_CH3"), + STM32_FUNCTION(3, "TIM5_CH3"), + STM32_FUNCTION(4, "TIM9_CH1"), + STM32_FUNCTION(8, "USART2_TX"), + STM32_FUNCTION(9, "SAI2_SCK_B"), + STM32_FUNCTION(12, "ETH_MDIO"), + STM32_FUNCTION(13, "MDIOS_MDIO"), + STM32_FUNCTION(15, "LCD_R1"), + STM32_FUNCTION(16, "EVENTOUT"), + STM32_FUNCTION(17, "ANALOG") + ), + STM32_PIN( + PINCTRL_PIN(3, "PA3"), + STM32_FUNCTION(0, "GPIOA3"), + STM32_FUNCTION(2, "TIM2_CH4"), + STM32_FUNCTION(3, "TIM5_CH4"), + STM32_FUNCTION(4, "TIM9_CH2"), + STM32_FUNCTION(8, "USART2_RX"), + STM32_FUNCTION(10, "LCD_B2"), + STM32_FUNCTION(11, "OTG_HS_ULPI_D0"), + STM32_FUNCTION(12, "ETH_MII_COL"), + STM32_FUNCTION(15, "LCD_B5"), + STM32_FUNCTION(16, "EVENTOUT"), + STM32_FUNCTION(17, "ANALOG") + ), + STM32_PIN( + PINCTRL_PIN(4, "PA4"), + STM32_FUNCTION(0, "GPIOA4"), + STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"), + STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"), + STM32_FUNCTION(8, "USART2_CK"), + STM32_FUNCTION(9, "SPI6_NSS"), + STM32_FUNCTION(13, "OTG_HS_SOF"), + STM32_FUNCTION(14, "DCMI_HSYNC"), + STM32_FUNCTION(15, "LCD_VSYNC"), + STM32_FUNCTION(16, "EVENTOUT"), + STM32_FUNCTION(17, "ANALOG") + ), + STM32_PIN( + PINCTRL_PIN(5, "PA5"), + STM32_FUNCTION(0, "GPIOA5"), + STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"), + STM32_FUNCTION(4, "TIM8_CH1N"), +
[PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
This patch which adds STM32F769 pinctrl and GPIO support, relies on the generic STM32 pinctrl driver. Signed-off-by: Alexandre Torgue diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig index 7e1fe39..397f8c1 100644 --- a/drivers/pinctrl/stm32/Kconfig +++ b/drivers/pinctrl/stm32/Kconfig @@ -27,6 +27,12 @@ config PINCTRL_STM32F746 default MACH_STM32F746 select PINCTRL_STM32 +config PINCTRL_STM32F769 + bool "STMicroelectronics STM32F769 pin control" if COMPILE_TEST && !MACH_STM32F769 + depends on OF + default MACH_STM32F769 + select PINCTRL_STM32 + config PINCTRL_STM32H743 bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743 depends on OF diff --git a/drivers/pinctrl/stm32/Makefile b/drivers/pinctrl/stm32/Makefile index d13ca35..7d63e4a 100644 --- a/drivers/pinctrl/stm32/Makefile +++ b/drivers/pinctrl/stm32/Makefile @@ -6,4 +6,5 @@ obj-$(CONFIG_PINCTRL_STM32) += pinctrl-stm32.o obj-$(CONFIG_PINCTRL_STM32F429)+= pinctrl-stm32f429.o obj-$(CONFIG_PINCTRL_STM32F469)+= pinctrl-stm32f469.o obj-$(CONFIG_PINCTRL_STM32F746)+= pinctrl-stm32f746.o +obj-$(CONFIG_PINCTRL_STM32F769)+= pinctrl-stm32f769.o obj-$(CONFIG_PINCTRL_STM32H743)+= pinctrl-stm32h743.o diff --git a/drivers/pinctrl/stm32/pinctrl-stm32f769.c b/drivers/pinctrl/stm32/pinctrl-stm32f769.c new file mode 100644 index 000..f81c51c --- /dev/null +++ b/drivers/pinctrl/stm32/pinctrl-stm32f769.c @@ -0,0 +1,1827 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) STMicroelectronics 2017 + * Author: Alexandre Torgue for STMicroelectronics. + */ +#include +#include +#include + +#include "pinctrl-stm32.h" + +static const struct stm32_desc_pin stm32f769_pins[] = { + STM32_PIN( + PINCTRL_PIN(0, "PA0"), + STM32_FUNCTION(0, "GPIOA0"), + STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"), + STM32_FUNCTION(3, "TIM5_CH1"), + STM32_FUNCTION(4, "TIM8_ETR"), + STM32_FUNCTION(8, "USART2_CTS"), + STM32_FUNCTION(9, "UART4_TX"), + STM32_FUNCTION(11, "SAI2_SD_B"), + STM32_FUNCTION(12, "ETH_MII_CRS"), + STM32_FUNCTION(16, "EVENTOUT"), + STM32_FUNCTION(17, "ANALOG") + ), + STM32_PIN( + PINCTRL_PIN(1, "PA1"), + STM32_FUNCTION(0, "GPIOA1"), + STM32_FUNCTION(2, "TIM2_CH2"), + STM32_FUNCTION(3, "TIM5_CH2"), + STM32_FUNCTION(8, "USART2_RTS"), + STM32_FUNCTION(9, "UART4_RX"), + STM32_FUNCTION(10, "QUADSPI_BK1_IO3"), + STM32_FUNCTION(11, "SAI2_MCLK_B"), + STM32_FUNCTION(12, "ETH_MII_RX_CLK ETH_RMII_REF_CLK"), + STM32_FUNCTION(15, "LCD_R2"), + STM32_FUNCTION(16, "EVENTOUT"), + STM32_FUNCTION(17, "ANALOG") + ), + STM32_PIN( + PINCTRL_PIN(2, "PA2"), + STM32_FUNCTION(0, "GPIOA2"), + STM32_FUNCTION(2, "TIM2_CH3"), + STM32_FUNCTION(3, "TIM5_CH3"), + STM32_FUNCTION(4, "TIM9_CH1"), + STM32_FUNCTION(8, "USART2_TX"), + STM32_FUNCTION(9, "SAI2_SCK_B"), + STM32_FUNCTION(12, "ETH_MDIO"), + STM32_FUNCTION(13, "MDIOS_MDIO"), + STM32_FUNCTION(15, "LCD_R1"), + STM32_FUNCTION(16, "EVENTOUT"), + STM32_FUNCTION(17, "ANALOG") + ), + STM32_PIN( + PINCTRL_PIN(3, "PA3"), + STM32_FUNCTION(0, "GPIOA3"), + STM32_FUNCTION(2, "TIM2_CH4"), + STM32_FUNCTION(3, "TIM5_CH4"), + STM32_FUNCTION(4, "TIM9_CH2"), + STM32_FUNCTION(8, "USART2_RX"), + STM32_FUNCTION(10, "LCD_B2"), + STM32_FUNCTION(11, "OTG_HS_ULPI_D0"), + STM32_FUNCTION(12, "ETH_MII_COL"), + STM32_FUNCTION(15, "LCD_B5"), + STM32_FUNCTION(16, "EVENTOUT"), + STM32_FUNCTION(17, "ANALOG") + ), + STM32_PIN( + PINCTRL_PIN(4, "PA4"), + STM32_FUNCTION(0, "GPIOA4"), + STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"), + STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"), + STM32_FUNCTION(8, "USART2_CK"), + STM32_FUNCTION(9, "SPI6_NSS"), + STM32_FUNCTION(13, "OTG_HS_SOF"), + STM32_FUNCTION(14, "DCMI_HSYNC"), + STM32_FUNCTION(15, "LCD_VSYNC"), + STM32_FUNCTION(16, "EVENTOUT"), + STM32_FUNCTION(17, "ANALOG") + ), + STM32_PIN( + PINCTRL_PIN(5, "PA5"), + STM32_FUNCTION(0, "GPIOA5"), + STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"), + STM32_FUNCTION(4, "TIM8_CH1N"), + STM32_FUNCTION(6, "SPI1_SCK I2S1_CK"), +