Re: [PATCH 2/6] GICv3: Add ITS entry to THUNDER dts

2015-06-26 Thread Marc Zyngier 
On 26/06/15 00:19, Chalamarla, Tirumalesh wrote:
> Hi Marc,
> 
> Any feed back on this. 
> Do you want me to submit this as a separate patch?so that it is easy for 
> getting acceptance. 

It looks good to me, so you can add my Acked-by on it.

I think you should repost it and get it merged through arm-soc.

Thanks,

M.

> Thanks,
> Tirumalesh. 
> 
>> On Sep 24, 2014, at 8:37 AM, Robert Richter  wrote:
>>
>> From: Tirumalesh Chalamarla 
>>
>> The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
>> Thunder SoCs by adding an entry to DT.
>>
>> Signed-off-by: Tirumalesh Chalamarla 
>> Signed-off-by: Robert Richter 
>> ---
>> arch/arm64/boot/dts/thunder-88xx.dtsi | 9 +
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/thunder-88xx.dtsi 
>> b/arch/arm64/boot/dts/thunder-88xx.dtsi
>> index d8c0bdc51882..9cb7cf94284a 100644
>> --- a/arch/arm64/boot/dts/thunder-88xx.dtsi
>> +++ b/arch/arm64/boot/dts/thunder-88xx.dtsi
>> @@ -376,10 +376,19 @@
>>  gic0: interrupt-controller@8010, {
>>  compatible = "arm,gic-v3";
>>  #interrupt-cells = <3>;
>> +#address-cells = <2>;
>> +#size-cells = <2>;
>> +ranges;
>>  interrupt-controller;
>>  reg = <0x8010 0x 0x0 0x01>, /* GICD */
>><0x8010 0x8000 0x0 0x60>; /* GICR */
>>  interrupts = <1 9 0xf04>;
>> +
>> +its: gic-its@8010,0002 {
>> +compatible = "arm,gic-v3-its";
>> +msi-controller;
>> +reg = <0x8010 0x2 0x0 0x20>;
>> +};
>>  };
>>
>>  uaa0: serial@87e0,2400 {
>> -- 
>> 2.1.0
>>
> 


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Re: [PATCH 2/6] GICv3: Add ITS entry to THUNDER dts

2015-06-26 Thread Marc Zyngier 
On 26/06/15 00:19, Chalamarla, Tirumalesh wrote:
 Hi Marc,
 
 Any feed back on this. 
 Do you want me to submit this as a separate patch?so that it is easy for 
 getting acceptance. 

It looks good to me, so you can add my Acked-by on it.

I think you should repost it and get it merged through arm-soc.

Thanks,

M.

 Thanks,
 Tirumalesh. 
 
 On Sep 24, 2014, at 8:37 AM, Robert Richter r...@kernel.org wrote:

 From: Tirumalesh Chalamarla tchalama...@cavium.com

 The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
 Thunder SoCs by adding an entry to DT.

 Signed-off-by: Tirumalesh Chalamarla tchalama...@cavium.com
 Signed-off-by: Robert Richter rrich...@cavium.com
 ---
 arch/arm64/boot/dts/thunder-88xx.dtsi | 9 +
 1 file changed, 9 insertions(+)

 diff --git a/arch/arm64/boot/dts/thunder-88xx.dtsi 
 b/arch/arm64/boot/dts/thunder-88xx.dtsi
 index d8c0bdc51882..9cb7cf94284a 100644
 --- a/arch/arm64/boot/dts/thunder-88xx.dtsi
 +++ b/arch/arm64/boot/dts/thunder-88xx.dtsi
 @@ -376,10 +376,19 @@
  gic0: interrupt-controller@8010, {
  compatible = arm,gic-v3;
  #interrupt-cells = 3;
 +#address-cells = 2;
 +#size-cells = 2;
 +ranges;
  interrupt-controller;
  reg = 0x8010 0x 0x0 0x01, /* GICD */
0x8010 0x8000 0x0 0x60; /* GICR */
  interrupts = 1 9 0xf04;
 +
 +its: gic-its@8010,0002 {
 +compatible = arm,gic-v3-its;
 +msi-controller;
 +reg = 0x8010 0x2 0x0 0x20;
 +};
  };

  uaa0: serial@87e0,2400 {
 -- 
 2.1.0

 


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Re: [PATCH 2/6] GICv3: Add ITS entry to THUNDER dts

2015-06-25 Thread Chalamarla, Tirumalesh 
Hi Marc,

Any feed back on this. 
Do you want me to submit this as a separate patch?so that it is easy for 
getting acceptance. 

Thanks,
Tirumalesh. 

> On Sep 24, 2014, at 8:37 AM, Robert Richter  wrote:
> 
> From: Tirumalesh Chalamarla 
> 
> The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
> Thunder SoCs by adding an entry to DT.
> 
> Signed-off-by: Tirumalesh Chalamarla 
> Signed-off-by: Robert Richter 
> ---
> arch/arm64/boot/dts/thunder-88xx.dtsi | 9 +
> 1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/thunder-88xx.dtsi 
> b/arch/arm64/boot/dts/thunder-88xx.dtsi
> index d8c0bdc51882..9cb7cf94284a 100644
> --- a/arch/arm64/boot/dts/thunder-88xx.dtsi
> +++ b/arch/arm64/boot/dts/thunder-88xx.dtsi
> @@ -376,10 +376,19 @@
>   gic0: interrupt-controller@8010, {
>   compatible = "arm,gic-v3";
>   #interrupt-cells = <3>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
>   interrupt-controller;
>   reg = <0x8010 0x 0x0 0x01>, /* GICD */
> <0x8010 0x8000 0x0 0x60>; /* GICR */
>   interrupts = <1 9 0xf04>;
> +
> + its: gic-its@8010,0002 {
> + compatible = "arm,gic-v3-its";
> + msi-controller;
> + reg = <0x8010 0x2 0x0 0x20>;
> + };
>   };
> 
>   uaa0: serial@87e0,2400 {
> -- 
> 2.1.0
> 

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Re: [PATCH 2/6] GICv3: Add ITS entry to THUNDER dts

2015-06-25 Thread Chalamarla, Tirumalesh 
Hi Marc,

Any feed back on this. 
Do you want me to submit this as a separate patch?so that it is easy for 
getting acceptance. 

Thanks,
Tirumalesh. 

 On Sep 24, 2014, at 8:37 AM, Robert Richter r...@kernel.org wrote:
 
 From: Tirumalesh Chalamarla tchalama...@cavium.com
 
 The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
 Thunder SoCs by adding an entry to DT.
 
 Signed-off-by: Tirumalesh Chalamarla tchalama...@cavium.com
 Signed-off-by: Robert Richter rrich...@cavium.com
 ---
 arch/arm64/boot/dts/thunder-88xx.dtsi | 9 +
 1 file changed, 9 insertions(+)
 
 diff --git a/arch/arm64/boot/dts/thunder-88xx.dtsi 
 b/arch/arm64/boot/dts/thunder-88xx.dtsi
 index d8c0bdc51882..9cb7cf94284a 100644
 --- a/arch/arm64/boot/dts/thunder-88xx.dtsi
 +++ b/arch/arm64/boot/dts/thunder-88xx.dtsi
 @@ -376,10 +376,19 @@
   gic0: interrupt-controller@8010, {
   compatible = arm,gic-v3;
   #interrupt-cells = 3;
 + #address-cells = 2;
 + #size-cells = 2;
 + ranges;
   interrupt-controller;
   reg = 0x8010 0x 0x0 0x01, /* GICD */
 0x8010 0x8000 0x0 0x60; /* GICR */
   interrupts = 1 9 0xf04;
 +
 + its: gic-its@8010,0002 {
 + compatible = arm,gic-v3-its;
 + msi-controller;
 + reg = 0x8010 0x2 0x0 0x20;
 + };
   };
 
   uaa0: serial@87e0,2400 {
 -- 
 2.1.0
 

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[PATCH 2/6] GICv3: Add ITS entry to THUNDER dts

2014-09-24 Thread Robert Richter 
From: Tirumalesh Chalamarla 

The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
Thunder SoCs by adding an entry to DT.

Signed-off-by: Tirumalesh Chalamarla 
Signed-off-by: Robert Richter 
---
 arch/arm64/boot/dts/thunder-88xx.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/thunder-88xx.dtsi 
b/arch/arm64/boot/dts/thunder-88xx.dtsi
index d8c0bdc51882..9cb7cf94284a 100644
--- a/arch/arm64/boot/dts/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/thunder-88xx.dtsi
@@ -376,10 +376,19 @@
gic0: interrupt-controller@8010, {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
interrupt-controller;
reg = <0x8010 0x 0x0 0x01>, /* GICD */
  <0x8010 0x8000 0x0 0x60>; /* GICR */
interrupts = <1 9 0xf04>;
+
+   its: gic-its@8010,0002 {
+   compatible = "arm,gic-v3-its";
+   msi-controller;
+   reg = <0x8010 0x2 0x0 0x20>;
+   };
};
 
uaa0: serial@87e0,2400 {
-- 
2.1.0

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[PATCH 2/6] GICv3: Add ITS entry to THUNDER dts

2014-09-24 Thread Robert Richter 
From: Tirumalesh Chalamarla tchalama...@cavium.com

The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
Thunder SoCs by adding an entry to DT.

Signed-off-by: Tirumalesh Chalamarla tchalama...@cavium.com
Signed-off-by: Robert Richter rrich...@cavium.com
---
 arch/arm64/boot/dts/thunder-88xx.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/thunder-88xx.dtsi 
b/arch/arm64/boot/dts/thunder-88xx.dtsi
index d8c0bdc51882..9cb7cf94284a 100644
--- a/arch/arm64/boot/dts/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/thunder-88xx.dtsi
@@ -376,10 +376,19 @@
gic0: interrupt-controller@8010, {
compatible = arm,gic-v3;
#interrupt-cells = 3;
+   #address-cells = 2;
+   #size-cells = 2;
+   ranges;
interrupt-controller;
reg = 0x8010 0x 0x0 0x01, /* GICD */
  0x8010 0x8000 0x0 0x60; /* GICR */
interrupts = 1 9 0xf04;
+
+   its: gic-its@8010,0002 {
+   compatible = arm,gic-v3-its;
+   msi-controller;
+   reg = 0x8010 0x2 0x0 0x20;
+   };
};
 
uaa0: serial@87e0,2400 {
-- 
2.1.0

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