[PATCH 3/13] scsi: arcmsr: add codes for ACB_ADAPTER_TYPE_E to support new adapter ARC-1884

2017-11-08 Thread Ching Huang 
From: Ching Huang 

add codes for ACB_ADAPTER_TYPE_E to support new adapter ARC-1884

Signed-off-by: Ching Huang 
---

diff -uprN a/drivers/scsi/arcmsr/arcmsr.h b/drivers/scsi/arcmsr/arcmsr.h
--- a/drivers/scsi/arcmsr/arcmsr.h  2017-08-03 18:54:46.0 +0800
+++ b/drivers/scsi/arcmsr/arcmsr.h  2017-08-04 11:19:22.0 +0800
@@ -65,6 +65,7 @@ struct device_attribute;
 #define ARCMSR_MAX_HBB_POSTQUEUE   
264
 #define ARCMSR_MAX_ARC1214_POSTQUEUE   256
 #define ARCMSR_MAX_ARC1214_DONEQUEUE   257
+#define ARCMSR_MAX_HBE_DONEQUEUE   512
 #define ARCMSR_MAX_XFER_LEN
0x26000 /* 152K */
 #define ARCMSR_CDB_SG_PAGE_LENGTH  
256 
 #define ARCMST_NUM_MSIX_VECTORS4
@@ -77,6 +78,9 @@ struct device_attribute;
 #ifndef PCI_DEVICE_ID_ARECA_1203
#define PCI_DEVICE_ID_ARECA_12030x1203
 #endif
+#ifndef PCI_DEVICE_ID_ARECA_1884
+   #define PCI_DEVICE_ID_ARECA_18840x1884
+#endif
 /*
 
**
 **
@@ -405,6 +409,31 @@ struct FIRMWARE_INFO
 /*ARCMSR_HBAMU_MESSAGE_FIRMWARE_OK*/
 #define ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK 0x8000
 #define ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR   0x0001
+/* 
+***
+**SPEC. for Areca Type E adapter
+***
+*/
+#define ARCMSR_SIGNATURE_1884  0x188417D3
+
+#define ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK 0x0002
+#define ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK  0x0004
+#define ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE  0x0008
+
+#define ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK 0x0002
+#define ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK  0x0004
+#define ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE  0x0008
+
+#define ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK   0x8000
+
+#define ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR 0x0001
+#define ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR0x0008
+#define ARCMSR_HBEMU_ALL_INTMASKENABLE 0x0009
+
+/* ARC-1884 doorbell sync */
+#define ARCMSR_HBEMU_DOORBELL_SYNC 0x100
+#define ARCMSR_ARC188X_RESET_ADAPTER   0x0004
+#define ARCMSR_ARC1884_DiagWrite_ENABLE0x0080
 /*
 ***
 **ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504)
@@ -614,6 +643,88 @@ struct MessageUnit_D {
u32 __iomem *msgcode_rwbuffer;  /* 0x2200 */
 };
 /*
+*
+** Messaging Unit (MU) of Type E processor(LSI)
+*
+*/
+struct MessageUnit_E{
+   uint32_tiobound_doorbell;   /* 0003*/
+   uint32_twrite_sequence_3xxx;/*0004 0007*/
+   uint32_thost_diagnostic_3xxx;   /*0008 000B*/
+   uint32_tposted_outbound_doorbell;   /*000C 000F*/
+   uint32_tmaster_error_attribute; /*0010 0013*/
+   uint32_tmaster_error_address_low;   /*0014 0017*/
+   uint32_tmaster_error_address_high;  /*0018 001B*/
+   uint32_thcb_size;   /*001C 001F*/
+   uint32_tinbound_doorbell;   /*0020 0023*/
+   uint32_tdiagnostic_rw_data; /*0024 0027*/
+   uint32_tdiagnostic_rw_address_low;  /*0028 002B*/
+   uint32_tdiagnostic_rw_address_high; /*002C 002F*/
+   uint32_thost_int_status;/*0030 0033*/
+   uint32_thost_int_mask;  /*0034 0037*/
+   uint32_tdcr_data;   /*0038 003B*/
+   uint32_tdcr_address;/*003C 003F*/
+   uint32_tinbound_queueport;  /*0040 0043*/
+   uint32_toutbound_queueport; /*0044 0047*/
+   uint32_thcb_pci_address_low;/*0048 004B*/
+   uint32_thcb_pci_address_high;   /*004C 004F*/
+   uint32_tiop_int_status; /*0050 0053*/
+   uint32_tiop_int_mask;   /*0054 0057*/
+   uint32_tiop_inbound_queue_port; /*0058 005B*/
+   uint32_tiop_outbound_queue_port;/*005C 005F*/
+   uint32_tinbound_free_list_index;/*0060 0063*/
+   uint32_t

[PATCH 3/13] scsi: arcmsr: add codes for ACB_ADAPTER_TYPE_E to support new adapter ARC-1884

2017-11-08 Thread Ching Huang 
From: Ching Huang 

add codes for ACB_ADAPTER_TYPE_E to support new adapter ARC-1884

Signed-off-by: Ching Huang 
---

diff -uprN a/drivers/scsi/arcmsr/arcmsr.h b/drivers/scsi/arcmsr/arcmsr.h
--- a/drivers/scsi/arcmsr/arcmsr.h  2017-08-03 18:54:46.0 +0800
+++ b/drivers/scsi/arcmsr/arcmsr.h  2017-08-04 11:19:22.0 +0800
@@ -65,6 +65,7 @@ struct device_attribute;
 #define ARCMSR_MAX_HBB_POSTQUEUE   
264
 #define ARCMSR_MAX_ARC1214_POSTQUEUE   256
 #define ARCMSR_MAX_ARC1214_DONEQUEUE   257
+#define ARCMSR_MAX_HBE_DONEQUEUE   512
 #define ARCMSR_MAX_XFER_LEN
0x26000 /* 152K */
 #define ARCMSR_CDB_SG_PAGE_LENGTH  
256 
 #define ARCMST_NUM_MSIX_VECTORS4
@@ -77,6 +78,9 @@ struct device_attribute;
 #ifndef PCI_DEVICE_ID_ARECA_1203
#define PCI_DEVICE_ID_ARECA_12030x1203
 #endif
+#ifndef PCI_DEVICE_ID_ARECA_1884
+   #define PCI_DEVICE_ID_ARECA_18840x1884
+#endif
 /*
 
**
 **
@@ -405,6 +409,31 @@ struct FIRMWARE_INFO
 /*ARCMSR_HBAMU_MESSAGE_FIRMWARE_OK*/
 #define ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK 0x8000
 #define ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR   0x0001
+/* 
+***
+**SPEC. for Areca Type E adapter
+***
+*/
+#define ARCMSR_SIGNATURE_1884  0x188417D3
+
+#define ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK 0x0002
+#define ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK  0x0004
+#define ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE  0x0008
+
+#define ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK 0x0002
+#define ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK  0x0004
+#define ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE  0x0008
+
+#define ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK   0x8000
+
+#define ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR 0x0001
+#define ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR0x0008
+#define ARCMSR_HBEMU_ALL_INTMASKENABLE 0x0009
+
+/* ARC-1884 doorbell sync */
+#define ARCMSR_HBEMU_DOORBELL_SYNC 0x100
+#define ARCMSR_ARC188X_RESET_ADAPTER   0x0004
+#define ARCMSR_ARC1884_DiagWrite_ENABLE0x0080
 /*
 ***
 **ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504)
@@ -614,6 +643,88 @@ struct MessageUnit_D {
u32 __iomem *msgcode_rwbuffer;  /* 0x2200 */
 };
 /*
+*
+** Messaging Unit (MU) of Type E processor(LSI)
+*
+*/
+struct MessageUnit_E{
+   uint32_tiobound_doorbell;   /* 0003*/
+   uint32_twrite_sequence_3xxx;/*0004 0007*/
+   uint32_thost_diagnostic_3xxx;   /*0008 000B*/
+   uint32_tposted_outbound_doorbell;   /*000C 000F*/
+   uint32_tmaster_error_attribute; /*0010 0013*/
+   uint32_tmaster_error_address_low;   /*0014 0017*/
+   uint32_tmaster_error_address_high;  /*0018 001B*/
+   uint32_thcb_size;   /*001C 001F*/
+   uint32_tinbound_doorbell;   /*0020 0023*/
+   uint32_tdiagnostic_rw_data; /*0024 0027*/
+   uint32_tdiagnostic_rw_address_low;  /*0028 002B*/
+   uint32_tdiagnostic_rw_address_high; /*002C 002F*/
+   uint32_thost_int_status;/*0030 0033*/
+   uint32_thost_int_mask;  /*0034 0037*/
+   uint32_tdcr_data;   /*0038 003B*/
+   uint32_tdcr_address;/*003C 003F*/
+   uint32_tinbound_queueport;  /*0040 0043*/
+   uint32_toutbound_queueport; /*0044 0047*/
+   uint32_thcb_pci_address_low;/*0048 004B*/
+   uint32_thcb_pci_address_high;   /*004C 004F*/
+   uint32_tiop_int_status; /*0050 0053*/
+   uint32_tiop_int_mask;   /*0054 0057*/
+   uint32_tiop_inbound_queue_port; /*0058 005B*/
+   uint32_tiop_outbound_queue_port;/*005C 005F*/
+   uint32_tinbound_free_list_index;/*0060 0063*/
+   uint32_tinbound_post_list_index;/*0064 0067*/
+   uint32_t